The document contains multiple choice questions and explanations related to 8086 microprocessor architecture. It tests knowledge of 8086 instruction set, addressing modes, registers, flags, bus architecture and timing. Several questions cover concepts like physical vs logical addresses, minimum and maximum modes, interrupt priorities and the purpose of the microprocessor and its components like EU, BIU and pin functions.
The document contains multiple choice questions and explanations related to 8086 microprocessor architecture. It tests knowledge of 8086 instruction set, addressing modes, registers, flags, bus architecture and timing. Several questions cover concepts like physical vs logical addresses, minimum and maximum modes, interrupt priorities and the purpose of the microprocessor and its components like EU, BIU and pin functions.
The document contains multiple choice questions and explanations related to 8086 microprocessor architecture. It tests knowledge of 8086 instruction set, addressing modes, registers, flags, bus architecture and timing. Several questions cover concepts like physical vs logical addresses, minimum and maximum modes, interrupt priorities and the purpose of the microprocessor and its components like EU, BIU and pin functions.
ROL AX, 3 Line4. INT 21H Line5. END Upon successful execution, the resultant value of AX is 0000 0101 0010 1000 0101 0000 NONE Correct Answer:C Explanation: No Explaination
Consider the code snippet Line1. MOV AL,20H
Line2. MOV CL,3 Line3. SHL AL,CL What are the results of AL? D4H EAH A0H C8H Correct Answer:C Explanation: No Explaination Consider the following Line1. MOV AL, 69H Line2. NOT AL Upon successful execution, the resultant value of AL is? 0110 1001 1111 0000 1001 0110 None Correct Answer:C Explanation: No Explaination
Identify if there is any error in the following
program Line1. REPEAT1: MOV AX, ARR[SI] Line2. CMP ARR[SI], ARR[SI+2] Line3. JBE NEXT Line4. XCHG AX, ARR[SI+2] Line5. MOV ARR[SI],AX Line6. NEXT: ADD SI,0002H Line7. DEC CL Line8. JNZ REPEAT1 Error(if any) exists in which line number? 2.0 4.0 7.0 No Error Correct Answer:A Explanation: No Explaination Consider the following snippet Line1. N1 DW 0006H Line2. N2 DB 03H Line3 ---- Line4 ---- Line5 MOV AX, N1 Line6 DIV N2 Line7 ---- Which of the following register holds quotient after the execution of div instruction? AL AH AX DX Correct Answer:A Explanation: No Explaination
Line1.CODE Line2. MOV AX, 0A H Line3. ROR
AX, 2 Line4. INT 21H Line5. END Upon successful execution, the resultant value of AX is 0000 0101 1000 0010 0101 0000 NONE Correct Answer:B Explanation: No Explaination Fill up the blanks in the macro given below Line1. DISP MACRO M1 Line2. MOV ---,---- Line3. LEA DX,M1 Line4. INT 21H Line5. ENDM AH,01H AH,02H AH,06H AH,09H Correct Answer:D Explanation: No Explaination
Consider the following Code Snippet Line1.
MOV CX, 0 Line2. DLOOP: JCXZ SKIP Line3. BACK: SUB AX,2H Line4. ADD AX,05H Line5. LOOP BACK Line6. SKIP: INC AX How many times will the loop execute if JCXZ wasn't there? 0.0 1.0 2.0 3.0 Correct Answer:B Explanation: No Explaination Consider 8086 flag register bit pattern as follows. 0111 1101 0101 0101 Which among the following is true? Both sign flag and carry flag are enabled Both overflow flag and direction flag are set Both interrupt flag and parity flag are set All are true Correct Answer:B Explanation: No Explaination
The following code read?s a character from
the keyboard Line1. MOV AH, 01H //keyboard input subprogram Line2. INT 21H Which of the following register holds the input character? AL BL CL DL Correct Answer:A Explanation: No Explaination Consider the instruction Line1. MOV AX, 1234 H Line2. OUT 07H, AX Which of the following is true? Transfer the contents of the AX to the port 07H Transfer the contents from location 07H to AX Transfer 12 to the port 07H and 34 to port 08H None Correct Answer:C Explanation: No Explaination
Consider the following code Line1. ORG 100H
Line2. MOV AX, 1234H Line3. PUSH AX Line4. MOV AX, 5678H Line5. POP AX Line6. RET Line7. END The content of AX after the execution of RET instruction is? 1234H 5678H 0000H 1278H Correct Answer:A Explanation: No Explaination
Consider the following procedure: Line1.
CURRTIME PROC Line2. MOV AH,2CH ;service number to read system time Line3. INT 21H Line4. MOV AL,CH Line5. AAM Line6. ADD AX,3030H Line7. ?. Line8. ?. Line9. ? Line10. RET Line11. CURRTIME ENDP Line12. END What is the data that is present in CH register? SECONDS MINUTES HOURS COUNT Correct Answer:C Explanation: No Explaination
Which among the following is true?
Both offset address and physical address are 16 bit long 8086 can address up to 1 mb, as there are 16 address lines Only physical address is 20 bits long All are false Correct Answer:C Explanation: No Explaination
Consider the following code snippet Line1.
.DATA Line2. FIRST DB 07 Line3. SECOND DB 09 Line4. THIRD DW ? Line5. .CODE . . . Line6. MOV AL, FIRST Line7. ADD AL, SECOND Line8. AAA Line9. MOV THIRD, AX . . Line10. END Upon successful execution, the resultant value of THIRD is? 0709 0907 0601 0106 Correct Answer:D Explanation: No Explaination [9:12 pm, 25/05/2020] +91 73308 83738: 8086 Instruction Queue is only ___Byte long 1 Byte 2 Byte 4 Byte 6 Byte Correct Answer:d Explanation: No Explaination
Instructions using ____ addressing mode have
no operands Direct I/O port Addressing Indirect I/O port Addressing Relative Addressing Implied Addressing Correct Answer:d Explanation: No Explaination
The offset value of a particular segment
ranges from 000H to FFFH 00H to FFH 00000H to FFFFFH 0000H to FFFFH Correct Answer:d Explanation: No Explaination
Which pin is used by the 8086 bus controller
to generate bus timing and control signals LOCK INTR QS0,QS1 S0,s1,s2 Correct Answer:d Explanation: No Explaination
Instruction STC belongs to Addressing Mode
Direct I/O port Addressing Indirect I/O port Addressing Relative Addressing Implied Addressing Correct Answer:d Explanation: No Explaination
Which pin of 8086 corresponds to Minimum
Mode and Maximum Mode ALE BHE Mn/Mx NMI Correct Answer:c Explanation: No Explaination Which among the following is not a control flag Trap flag Interrupt flag Direction flag Zero flag Correct Answer:d Explanation: No Explaination
Maximum size of an instruction in the
instruction set of 8086 is ___ byte long 1 Byte 2 Byte 4 Byte 6 Byte Correct Answer:d Explanation: No Explaination
The microprocessor can read/write 16 bit
data from or to ____ Memory I O Device Processor Register Correct Answer:a Explanation: No Explaination
Physical address can be calculated by adding
Effective address and offset value Effective address and base address Offset value and segment register bits None Correct Answer:c Explanation: No Explaination
WHICH OF THE FOLLOWING DOES NOT USE
DISPLACEMENT FIELD IN SOURCE OPERAND? Register Indirect Addressing Based Addressing Indexed Addressing Based Index Addressing Correct Answer:a Explanation: No Explaination The purpose of the microprocessor is to control __ Memory Switches Processing Tasks Correct Answer:a Explanation: No Explaination
cycles 4.0 2.0 3.0 1.0 Correct Answer:b Explanation: No Explaination
In ___ addressing mode, the effective address
of a program instruction is specified relative to Instruction Pointer (IP) by an 8-bit signed displacement. Direct I/O port Addressing Indirect I/O port Addressing Relative Addressing Implied Addressing Correct Answer:c Explanation: No Explaination
Which flag is used for single step execution
Interrupt flag Direction flag Zero flag Trap flag Correct Answer:d Explanation: No Explaination
IN BASED ADDRESSING, WHICH REGISTERS IS
USED TO HOLD THE BASE VALUE FOR EFFECTIVE ADDRESS SI OR DI BX OR BP BX OR SI BP & DI Correct Answer:b Explanation: No Explaination
The bits that are modified according to the
result of the execution of logical and arithmetic instructions are called byte addressable bit control flag bits status flag bit none of the mentioned Correct Answer:c Explanation: No Explaination In direct port addressing mode, an __ bit port address is directly specified in the instruction. 8 bit 16 bit 20 bit None Correct Answer:a Explanation: No Explaination
The BIU contains FIFO register of size ____
bytes 8.0 4.0 12.0 6.0 Correct Answer:d Explanation: No Explaination
The pin of minimum mode AD0-AD15 has
address 16 bit 20 bit 32 bit 4 bit Correct Answer:b Explanation: No Explaination
The address bits are sent out on lines through
_ A16-19 A0-17 D0-D17 C0-C17 Correct Answer:a Explanation: No Explaination
The work of EU is ____
Encoding Decoding Processing Calculations Correct Answer:b Explanation: No Explaination
Which pin of 8086 is Used to demultiplex the
address and data lines using external latches READY TEST ALE BHE Correct Answer:c Explanation: No Explaination
In immediate Addressing mode, what is the
minimum and Maximum size of data specified in Instruction. 16 bits & 32 bits 8 bits & 16 bits 16 bits & 16 Bits None Correct Answer:b Explanation: No Explaination
In order to empty the queue in 8086, what
should be the values of Queue status bits (Qs1,Qs0) 00 01 10 11 Correct Answer:c Explanation: No Explaination
If the pin LOCK (active low based) is low at the
trailing edge of the first ALE pulse, then till the start of the next machine cycle, the pin LOCK (active low) is low high low or high Cannot predict Correct Answer:a Explanation: No Explaination
A microprocessor is a ___ chip integrating all
the functions of a CPU of a computer. Multiple Single Double Triple Correct Answer:b Explanation: No Explaination The interrupt for which the processor has the highest priority among all the external interrupts is Keyboard interrupt Trap NMI INT Correct Answer:c Explanation: No Explaination
A microprocessor is a ___ chip integrating all
the functions of a CPU of a computer. Multiple Single Double Triple Correct Answer:b Explanation: No Explaination
The purpose of the microprocessor is to
control __ Memory Switches Processing Tasks Correct Answer:a Explanation: No Explaination
The microprocessor can read/write 16 bit
data from or to ____ Memory I O Device Processor Register Correct Answer:a Explanation: No Explaination
The work of EU is ____
Encoding Decoding Processing Calculations Correct Answer:b Explanation: No Explaination The BIU contains FIFO register of size ____ bytes 8.0 4.0 12.0 6.0 Correct Answer:d Explanation: No Explaination
result of the execution of logical and arithmetic instructions are called byte addressable bit control flag bits status flag bit none of the mentioned Correct Answer:c Explanation: No Explaination
The interrupt for which the processor has the
highest priority among all the external interrupts is Keyboard interrupt Trap NMI INT Correct Answer:c Explanation: No Explaination
The pin of minimum mode AD0-AD15 has
address 16 bit 20 bit 32 bit 4 bit Correct Answer:b Explanation: No Explaination
The address bits are sent out on lines through
_ A16-19 A0-17 D0-D17 C0-C17 Correct Answer:a Explanation: No Explaination
The NMI pin should remain high for atleast __
cycles 4.0 2.0 3.0 1.0 Correct Answer:b Explanation: No Explaination
If the pin LOCK (active low based) is low at the
trailing edge of the first ALE pulse, then till the start of the next machine cycle, the pin LOCK (active low) is low high low or high Cannot predict Correct Answer:a Explanation: No Explaination
In 8086, which among the following is an
example for Register Addressing Mode? MOV AX, 0A9FH MOV BX, [1234H] MOV BL,CL MOV CL, [0400H] Correct Answer:c Explanation: No Explaination
IN BASED ADDRESSING, WHICH REGISTERS IS
USED TO HOLD THE BASE VALUE FOR EFFECTIVE ADDRESS SI OR DI BX OR BP BX OR SI BP & DI Correct Answer:b Explanation: No Explaination
In direct port addressing mode, an __ bit port
address is directly specified in the instruction. 8 bit 16 bit 20 bit None Correct Answer:a Explanation: No Explaination
Physical address can be calculated by adding
Effective address and offset value Effective address and base address Offset value and segment register bits None Correct Answer:c Explanation: No Explaination WHICH OF THE FOLLOWING DOES NOT USE DISPLACEMENT FIELD IN SOURCE OPERAND? Register Indirect Addressing Based Addressing Indexed Addressing Based Index Addressing Correct Answer:a Explanation: No Explaination
Instruction STC belongs to Addressing Mode
Direct I/O port Addressing Indirect I/O port Addressing Relative Addressing Implied Addressing Correct Answer:d Explanation: No Explaination
In immediate Addressing mode, what is the
minimum and Maximum size of data specified in Instruction. 16 bits & 32 bits 8 bits & 16 bits 16 bits & 16 Bits None Correct Answer:b Explanation: No Explaination
flag Trap flag Interrupt flag Direction flag Zero flag Correct Answer:d Explanation: No Explaination
Which flag is used for single step execution
Interrupt flag Direction flag Zero flag Trap flag Correct Answer:d Explanation: No Explaination
Maximum size of an instruction in the
instruction set of 8086 is ___ byte long 1 Byte 2 Byte 4 Byte 6 Byte Correct Answer:d Explanation: No Explaination
8086 Instruction Queue is only ___Byte long
1 Byte 2 Byte 4 Byte 6 Byte Correct Answer:d Explanation: No Explaination The offset value of a particular segment ranges from 000H to FFFH 00H to FFH 00000H to FFFFFH 0000H to FFFFH Correct Answer:d Explanation: No Explaination
The maximum size of an instruction pointer is
16 Bits 32 Bits 64 Bits 128 Bits Correct Answer:a Explanation: No Explaination Which pin of 8086 corresponds to Minimum Mode and Maximum Mode ALE BHE Mn/Mx NMI Correct Answer:c Explanation: No Explaination
In order to empty the queue in 8086, what
should be the values of Queue status bits (Qs1,Qs0) 00 01 10 11 Correct Answer:c Explanation: No Explaination
Which pin of 8086 is Used to demultiplex the
address and data lines using external latches READY TEST ALE BHE Correct Answer:c Explanation: No Explaination
Which pin is used by the 8086 bus controller
to generate bus timing and control signals LOCK INTR QS0,QS1 S0,s1,s2 Correct Answer:d Explanation: No Explaination
In ___ addressing mode, the effective address
of a program instruction is specified relative to Instruction Pointer (IP) by an 8-bit signed displacement. Direct I/O port Addressing Indirect I/O port Addressing Relative Addressing Implied Addressing Correct Answer:c Explanation: No Explaination
Instructions using ____ addressing mode have
no operands Direct I/O port Addressing Indirect I/O port Addressing Relative Addressing Implied Addressing Correct Answer:d Explanation: No Explaination