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ldUics and uner conpliments are ava lable as inputs.

95. The immigration rules of a country allow the issue of work-cum-stay


applicant only if the applicant staisfies any one of the permits to an 5 2008
following conditions:
The spouse of the applicant is a permanent resident of that
lived there for at least 5 years. country, having
OR
The
applicant possesses certain special skills in the 'Skill
of the country and is sponsored by a Requirement List
parmanent resident of that country.
The inputs are:
A: The spouse or
sponsor has parmanent residence siatus.
B: The spouse has lived in the
country for 5 or more years.
C: The applicant
possesses the required special skills.
D: Sponsorship by a
parmanent resident.
Output:
X- Denotes eligible for
pernmit issue. [1 indicates Yes and O indicates No in alll
(a) Draw the truth table for the inputs and outputs
given above and write SOP
expi ession for
X(A, B, C, D).
(b) Reduce X(A, B, C, D) using Karnaugh's map.
Draw the logic gate diagram for the reduced SOP
using AND, OR gates. You may
expression for X(A, B, . D)
use gates with two or more
variables and their compliments inputs. Assume that
are available as inputs.
96. How is XOR gate is different from
an an OR gate? Draw a truth table
a 3-input XOR gate operation. Derive its SOP representating 4
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expression and draw the
logic gate
diagram for the SOP expression.
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112. The Panchayat Union of a particular village consists of 4 members- a president and
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Sthree officer-incharges. Any decision taken on development plans of the village can
mor be implemented only if:
The president and at least one officer vote a YES.
OR
All three officers vote a YES each.
The inputs are:
A: Denotes the president's vote.
B: Denotes the first officer's vote.
C: Denotes the second officer's vote.
D : Denotes the third officer's vote.
Output:
X-Denotes that a plan can be
) Draw the truth table for theimplemented. [1 indicates YES and 0 indicates
inputs and outputs given above and write SOPNO
expression for X(A, B, C, D). 4
(i) Reduce X(A, B, C, D)
Draw the logic gate
using Karnaugh's map.
diagram for the reduced SOP 6
using AND, OR gates. You may use expression for X(A, B, C,
D)
variables and their gates with two or more
compliments are available as inputs, inputs. Assume that
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