Important Descriptive Questions for Test-II(Modules-3,4,5)

1. Explain charge sharing in brief.

2. Explain different Clock generation styles in brief.
3. Compare Semi custom and full custom design.
4. Write Short Note on
a. Input circuit.
b. Interconnect Delay Model.
c. ESD Protection
5. Implement SR latch using CMOS design and draw its layout using based rules.
6. Explain Carry select Adder circuit in detail.
7. Design 4X4 array multiplier.
8. Implement Barrel shifter circuit using MOS.
9. Compare FPGA and CPLD.
10. Draw carry circuit for 3-bit CLA adder using MOS.
11. Draw layout for inverter using lambda rules.
12. Draw D flip flop and write an HDL program for it.
13. Explain clock distribution scheme.
14. Implement a full adder circuit using CMOS.
15. Design circuit for 4-bit Carry skip adder.
16. Implement clocked J-K latch using CMOS and draw layout for it using Lambda design
rules