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Manual ABB
Manual ABB
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Manufacturer:
ABB Inc.
3450 Harvester Road
Burlington, ON L7N 3W5, Canada
Phone: (905) 639-8840
Fax: (905) 333-7565
ABB Inc.
7036 Snowdrift Road
Allentown, PA 18106, USA
Phone: (610) 395-7333
Toll Free: (800) 634-6005
Fax: (610) 395-1055
Contents
Chapter Page
Authorization ...................................................................................... 44
Authorization handling in the tool.................................................. 44
Authorization handling in the IED ................................................. 50
Self supervision with internal event list .............................................. 51
Introduction ................................................................................... 51
Principle of operation .................................................................... 51
Internal signals ........................................................................ 52
Run-time model ....................................................................... 54
Function block............................................................................... 56
Output signals............................................................................... 56
Setting parameters ....................................................................... 56
Technical data .............................................................................. 56
Time synchronization ......................................................................... 57
Introduction ................................................................................... 57
Principle of operation .................................................................... 57
General concepts .................................................................... 57
Real Time Clock (RTC) operation............................................ 58
Synchronization alternatives.................................................... 59
Function block............................................................................... 62
Output signals............................................................................... 62
Setting parameters ....................................................................... 62
Technical data .............................................................................. 65
Parameter setting groups .................................................................. 66
Introduction ................................................................................... 66
Principle of operation .................................................................... 66
Function block............................................................................... 67
Input and output signals................................................................ 68
Setting parameters ....................................................................... 68
Test mode functionality ...................................................................... 70
Introduction ................................................................................... 70
Principle of operation .................................................................... 70
Function block............................................................................... 71
Input and output signals................................................................ 71
Setting parameters ....................................................................... 72
IED identifiers .................................................................................... 73
Introduction ................................................................................... 73
Setting parameters ....................................................................... 73
Signal matrix for binary inputs (SMBI) ............................................... 74
Introduction ................................................................................... 74
Principle of operation .................................................................... 74
Function block............................................................................... 74
Input and output signals................................................................ 74
Signal matrix for binary outputs (SMBO) ........................................... 76
Introduction ................................................................................... 76
Principle of operation .................................................................... 76
Function block............................................................................... 76
Input and output signals................................................................ 76
Signal matrix for mA inputs (SMMI) ................................................... 78
Introduction ................................................................................... 78
Principle of operation .................................................................... 78
Function block............................................................................... 78
Input and output signals................................................................ 78
Signal matrix for analog inputs (SMAI) .............................................. 79
Contents
Introduction ................................................................................... 79
Principle of operation .................................................................... 79
Function block .............................................................................. 79
Input and output signals ............................................................... 80
Setting parameters ....................................................................... 81
Summation block 3 phase (SUM3Ph)................................................ 83
Introduction ................................................................................... 83
Principle of operation .................................................................... 83
Function block .............................................................................. 83
Input and output signals ............................................................... 83
Setting parameters ....................................................................... 84
Authority status (AUTS) ..................................................................... 85
Introduction ................................................................................... 85
Principle of operation .................................................................... 85
Function block .............................................................................. 85
Output signals............................................................................... 85
Setting parameters ....................................................................... 85
Goose binary receive......................................................................... 86
Function block .............................................................................. 86
Input and output signals ............................................................... 87
Setting parameters ....................................................................... 88
Scheme communication
logic for distance protection (PSCH, 85) ............................. 634
Introduction ................................................................................. 634
Principle of operation .................................................................. 634
Blocking scheme ................................................................... 634
Permissive underreach scheme ............................................ 635
Permissive overreach scheme .............................................. 635
Unblocking scheme ............................................................... 635
Intertrip scheme..................................................................... 636
Contents
Overview.......................................................................................... 896
Variants of case- and HMI display size....................................... 896
Case from the rear side .............................................................. 897
Hardware modules........................................................................... 902
Overview..................................................................................... 902
Combined backplane module (CBM).......................................... 903
Introduction............................................................................ 903
Contents
Introduction............................................................................ 936
Functionality .......................................................................... 936
Design ................................................................................... 936
Technical data ....................................................................... 937
mA input module (MIM) .............................................................. 937
Introduction............................................................................ 937
Design ................................................................................... 937
Technical data ....................................................................... 939
GPS time synchronization module (GSM) .................................. 939
Introduction............................................................................ 939
Design ................................................................................... 939
Technical data ....................................................................... 942
GPS antenna .............................................................................. 942
Introduction............................................................................ 942
Design ................................................................................... 942
Technical data ....................................................................... 944
IRIG-B time synchronization module IRIG-B .............................. 945
Introduction............................................................................ 945
Design ................................................................................... 945
Technical data ....................................................................... 946
Dimensions ...................................................................................... 947
Case without rear cover.............................................................. 947
Case with rear cover................................................................... 948
Flush mounting dimensions ........................................................ 949
Side-by-side flush mounting dimensions .................................... 950
Wall mounting dimensions.......................................................... 952
External resistor unit for high impedance differential protection . 953
Mounting alternatives....................................................................... 954
Flush mounting ........................................................................... 954
Overview................................................................................ 954
Mounting procedure for flush mounting ................................. 955
19” panel rack mounting ............................................................. 956
Overview................................................................................ 956
Mounting procedure for 19” panel rack mounting.................. 957
Wall mounting ............................................................................. 957
Overview................................................................................ 957
Mounting procedure for wall mounting .................................. 958
How to reach the rear side of the IED ................................... 958
Side-by-side 19” rack mounting .................................................. 959
Overview................................................................................ 959
Mounting procedure for side-by-side rack mounting ............. 960
IED 670 mounted with a RHGS6 case .................................. 960
Side-by-side flush mounting ....................................................... 961
Overview................................................................................ 961
Mounting procedure for side-by-side flush mounting............. 962
Technical data ................................................................................. 963
Enclosure.................................................................................... 963
Connection system ..................................................................... 963
Influencing factors ...................................................................... 964
Type tests according to standard ............................................... 965
Contents
Glossary......................................................................................... 1012
About this chapter Chapter 1
Introduction
Chapter 1 Introduction
1
Introduction to the technical reference manual Chapter 1
Introduction
en06000097.vsd
The Application Manual (AM) contains application descriptions, setting guidelines and setting
parameters sorted per function. The application manual should be used to find out when and for
what purpose a typical protection function could be used. The manual should also be used when
calculating settings.
The Technical Reference Manual (TRM) contains application and functionality descriptions
and it lists function blocks, logic diagrams, input and output signals, setting parameters and tech-
nical data sorted per function. The technical reference manual should be used as a technical ref-
erence during the engineering phase, installation and commissioning phase, and during normal
service.
The Installation and Commissioning Manual (ICM) contains instructions on how to install
and commission the protection IED. The manual can also be used as a reference during periodic
testing. The manual covers procedures for mechanical and electrical installation, energizing and
checking of external circuitry, setting and configuration as well as verifying settings and per-
forming directional tests. The chapters are organized in the chronological order (indicated by
chapter/section numbers) in which the protection IED should be installed and commissioned.
The Operator’s Manual (OM) contains instructions on how to operate the protection IED dur-
ing normal service once it has been commissioned. The operator’s manual can be used to find
out how to handle disturbances or how to view calculated and measured network data in order
to determine the cause of a fault.
The IED 670 Engineering guide (EG) contains instructions on how to engineer the IED 670
products. The manual guides to use the different tool components for IED 670 engineering. It
also guides how to handle the tool component available to read disturbance files from the IEDs
on the basis of the IEC 61850 definitions. The third part is an introduction about the diagnostic
tool components available for IED 670 products and the PCM 600 tool.
The IEC 61850 Station Engineering guide contains descriptions of IEC 61850 station engi-
neering and process signal routing. The manual presents the PCM 600 and CCT tool used for
station engineering. It describes the IEC 61850 attribute editor and how to set up projects and
communication.
2
Introduction to the technical reference manual Chapter 1
Introduction
• The chapter “Local human-machine interface” describes the control panel on the
IED. Display characteristics, control keys and various local human-machine in-
terface features are explained.
• The chapter “Basic IED functions” presents functions that are included in all
IEDs regardless of the type of protection they are designed for. These are func-
tions like Time synchronization, Self supervision with event list, Test mode and
other functions of a general nature.
• The chapter “Distance protection” describes the functions for distance zones
with their quadrilateral characteristics, phase selection with load encroachment,
power swing detection and similar.
• The chapter “Current protection” describes functions such as overcurrent pro-
tection, breaker failure protection and pole discordance.
• The chapter “Voltage protection” describes functions like undervoltage and ov-
ervoltage protection as well as residual overvoltage protection.
• The chapter “Frequency protection” describes functions for overfrequency, un-
derfrequency and rate of change of frequency.
• The chapter “Multipurpose protection” describes the general protection function
for current and voltage.
• The chapter “Secondary system supervision” includes descriptions of functions
like current based Current circuit supervision and Fuse failure supervision.
• The chapter “Control” describes the control functions. These are functions like
the Synchronization and energizing check as well as several others which are
product specific.
• The chapter “Scheme communication” describes among others functions related
to current reversal and weak end infeed logic.
• The chapter “Logic” describes trip logic and related functions.
• The chapter “Monitoring” describes measurement related functions used to pro-
vide data regarding relevant quantities, events, faults and the like.
• The chapter “Metering” describes primarily Pulse counter logic.
• The chapter “Station communication” describes Ethernet based communication
in general including the use of IEC61850, and horizontal communication via
GOOSE.
• The chapter “Remote communication” describes binary and analog signal trans-
fer, and the associated hardware.
• The chapter “Hardware” provides descriptions of the IED and its components.
• The chapter “Connection diagrams” provides terminal wiring diagrams and in-
formation regarding connections to and from the IED.
• The chapter “Time inverse characteristics” describes and explains inverse time
delay, inverse time curves and their effects.
• The chapter “Glossary” is a list of terms, acronyms and abbreviations used in
ABB technical documentation.
3
Introduction to the technical reference manual Chapter 1
Introduction
1.3.1 Introduction
Outlines the implementation of a particular protection function.
Logic diagrams
Logic diagrams describe the signal logic inside the function block and are bordered by dashed
lines.
Signal names
Input and output logic signals consist of two groups of letters separated by two dashes. The first
group consists of up to four letters and presents the abbreviated name for the corresponding
function. The second group presents the functionality of the particular signal. According to this
explanation, the meaning of the signal BLKTR in figure 4 is as follows:
• BLKTR informs the user that the signal will BLOCK the TRIP command from
the under-voltage function, when its value is a logical one (1).
Input signals are always on the left hand side, and output signals on the right hand side. Settings
are not displayed.
Input and output signals can be configured using the CAP531 tool. They can be connected to the
inputs and outputs of other functions and to binary inputs and outputs. Examples of input signals
are BLKTR, BLOCK and VTSU. Examples output signals are TRIP, START, STL1, STL2,
STL3.
Setting parameters
Signals in frames with a shaded area on their right hand side represent setting parameter signals.
These parameters can only be set via the PST or LHMI. Their values are high (1) only when the
corresponding setting parameter is set to the symbolic value specified within the frame. Example
is the signal Block TUV=Yes. Their logical values correspond automatically to the selected set-
ting value.
Internal signals
Internal signals are illustrated graphically and end approximately. 2 mm from the frame edge. If
an internal signal path cannot be drawn with a continuous line, the suffix -int is added to the sig-
nal name to indicate where the signal starts and continues, see figure 3.
4
Introduction to the technical reference manual Chapter 1
Introduction
BLKTR
TEST
TEST
AND
Block TUV=Yes BLOCK-int.
OR
BLOCK
VTSU
BLOCK-int.
AND
PU_V_A
BLOCK-int.
AND 0-t TRIP
AND OR
PU_V_B 0
BLOCK-int.
PICKUP
AND
PU_V_C
PU_A
PU_B
PU_C
xx04000375_ansi.vsd
Figure 1: Logic diagram example with -int signals
External signals
Signal paths that extend beyond the logic diagram and continue in another diagram have the suf-
fix “-cont.”, see figure 2 and figure 3.
5
Introduction to the technical reference manual Chapter 1
Introduction
STZMPP-cont.
OR
PHSEL
PUND_AB-cont.
AND
AB
PUND_BC-cont.
AND
BC
PUND_CA-cont.
AND
CA
PUND_AG-cont.
AND
AG
PUND_BG-cont.
AND
BG
PUND_CG-cont.
AND
CG
PUND_GND-cont.
OR
OR
LOVBZ PU_ND
AND
1--BLOCK OR
BLK-cont.
xx04000376_ansi.vsd
STND_AG-cont.
or
STND_BG-cont.
0 PU_A
AND
STND_CG-cont. 15 ms
STND_AB-cont. or 0 PU_B
AND
STND_BC-cont. 15 ms
0 PU_C
STND_CA-cont. AND
or 15 ms
AND 0 PICKUP
or 15 ms
BLK-cont.
Xx04000377_ansi.vsd
6
Introduction to the technical reference manual Chapter 1
Introduction
Input signals are always on the left hand side, and output signals on the right hand side. Settings
are not displayed. Special kinds of settings are sometimes available. These are supposed to be
connected to constants in the configuration scheme, and are therefore depicted as inputs. Such
signals will be found in the signal list but described in the settings table.
IEC 61850 - 8 -1
CAP531 Name Logical Node
Inputs TUV1-
PH2PUVM
U3P TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
Outputs
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2 Diagram
ST2L1 Number
ST2L2
ST2L3
en05000330.vsd
7
Introduction to the technical reference manual Chapter 1
Introduction
1.4.2 Requirements
The system engineer must have a thorough knowledge of protection systems, protection equip-
ment, protection functions and the configured functional logics in the protective devices. The
installation and commissioning personnel must have a basic knowledge in the handling electron-
ic equipment.
8
Introduction to the technical reference manual Chapter 1
Introduction
Revision Description
- First release
9
Introduction to the technical reference manual Chapter 1
Introduction
10
About this chapter Chapter 2
Local human-machine interface
Chapter 2 Local
human-machine
interface
11
Medium size graphic HMI Chapter 2
Local human-machine interface
1.1 Design
The different parts of the medium size LHMI is shown in figure 5The LHMI, exists in an IEC
version and in an ANSI version. The difference is on the keypad operation buttons and the yel-
low LED designation.
12
Medium size graphic HMI Chapter 2
Local human-machine interface
13
Keypad Chapter 2
Local human-machine interface
2 Keypad
The keypad is used to monitor and operate the IED. The keypad has the same look and feel in
all IEDs in the IED 670 series. LCD screens and other details may differ but the way the keys
function is identical. The keypad is illustrated in figure 6.
The keys used to operate the IED are described below in table 1.
14
Keypad Chapter 2
Local human-machine interface
The help key brings up two submenus. Key operation and IED information.
Opens the main menu, and used to move to the default screen.
The Local/Remote key is used to set the IED in local or remote control mode.
The E key starts editing mode and confirms setting changes when in editing mode.
The right arrow key navigates forward between screens and moves right in editing mode.
The left arrow key navigates backwards between screens and moves left in editing mode.
The up arrow key is used to move up in the single line diagram and in menu tree.
The down arrow key is used to move down in the single line diagram and in menu tree.
15
LHMI related functions Chapter 2
Local human-machine interface
3.1 Introduction
The adaptation of the LHMI to the application and user preferences is made with:
The function block can be used if any of the signals are required in a configuration logic.
16
LHMI related functions Chapter 2
Local human-machine interface
LHMI-
LocalHMI
RSTLEDS HMI-ON
RED-S
YELLOW-S
YELLOW-F
RSTPULSE
LEDSRST
en05000773_ansi.vsd
Each indication LED on the LHMI can be set individually to operate in six different sequences;
two as follow type and four as latch type. Two of the latching sequence types are intended to be
used as a protection indication system, either in collecting or restarting mode, with reset func-
tionality. The other two are intended to be used as signalling system in collecting (coll) mode
with an acknowledgment functionality. The light from the LEDs can be steady (-S) or flickering
(-F). For details, refer to Technical reference manual.
17
LHMI related functions Chapter 2
Local human-machine interface
3.4.2 Design
The information on the LEDs is stored at loss of the auxiliary power to the IED in some of the
modes of the HLED. The latest LED picture appears immediately after the IED is successfully
restarted.
Operating modes
• Collecting mode
- LEDs which are used in collecting mode of operation are accumulated con-
tinuously until the unit is acknowledged manually. This mode is suitable
when the LEDs are used as a simplified alarm system.
• Re-starting mode
- In the re-starting mode of operation each new pickup resets all previous ac-
tive LEDs and activates only those which appear during one disturbance.
Only LEDs defined for re-starting mode with the latched sequence type 6
(LatchedReset-S) will initiate a reset and a restart at a new disturbance. A
disturbance is defined to end a settable time after the reset of the activated
input signals or when the maximum time limit has elapsed.
Acknowledgment/reset
• From local HMI
- The active indications can be acknowledged/reset manually. Manual ac-
knowledgment and manual reset have the same meaning and is a common
signal for all the operating sequences and LEDs. The function is positive
edge triggered, not level triggered. The acknowledgment/reset is performed
via the Reset-button and menus on the LHMI. For details, refer to the “Op-
erators manual”.
• Automatic reset
- The automatic reset can only be performed for indications defined for
re-starting mode with the latched sequence type 6 (LatchedReset-S). When
the automatic reset of the LEDs has been performed, still persisting indica-
tions will be indicated with a steady light.
Operating sequences
The sequences can be of type Follow or Latched. For the Follow type the LED follow the input
signal completely. For the Latched type each LED latches to the corresponding input signal until
it is reset.
18
LHMI related functions Chapter 2
Local human-machine interface
The figures below show the function of available sequences selectable for each LED separately.
For sequence 1 and 2 (Follow type), the acknowledgment/reset function is not applicable. Se-
quence 3 and 4 (Latched type with acknowledgement) are only working in collecting mode. Se-
quence 5 is working according to Latched type and collecting mode while sequence 6 is working
according to Latched type and re-starting mode. The letters S and F in the sequence names have
the meaning S = Steady and F = Flash.
At the activation of the input signal, the indication operates according to the selected sequence
diagrams below.
In the sequence diagrams the LEDs have the characteristics shown in figure 8.
en05000506.vsd
Sequence 1 (Follow-S)
This sequence follows all the time, with a steady light, the corresponding input signals. It does
not react on acknowledgment or reset. Every LED is independent of the other LEDs in its oper-
ation.
Activating
signal
LED
en01000228.vsd
Sequence 2 (Follow-F)
This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing instead of showing
steady light.
Sequence 3 (LatchedAck-F-S)
This sequence has a latched function and works in collecting mode. Every LED is independent
of the other LEDs in its operation. At the activation of the input signal, the indication starts flash-
ing. After acknowledgment the indication disappears if the signal is not present any more. If the
signal is still present after acknowledgment it gets a steady light.
19
LHMI related functions Chapter 2
Local human-machine interface
Activating
signal
LED
Acknow.
en01000231.vsd
Sequence 4 (LatchedAck-S-F)
This sequence has the same functionality as sequence 3, but steady and flashing light have been
alternated.
Sequence 5 (LatchedColl-S)
This sequence has a latched function and works in collecting mode. At the activation of the input
signal, the indication will light up with a steady light. The difference to sequence 3 and 4 is that
indications that are still activated will not be affected by the reset i.e. immediately after the pos-
itive edge of the reset has been executed a new reading and storing of active signals is performed.
Every LED is independent of the other LEDs in its operation.
Activating
signal
LED
Reset
en01000235.vsd
Sequence 6 (LatchedReset-S)
In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are automatically
reset at a new disturbance when activating any input signal for other LEDs set to sequence 6
(LatchedReset-S). Also in this case indications that are still activated will not be affected by
manual reset, i.e. immediately after the positive edge of that the manual reset has been executed
a new reading and storing of active signals is performed. LEDs set for sequence 6 are completely
independent in its operation of LEDs set for other sequences.
20
LHMI related functions Chapter 2
Local human-machine interface
Definition of a disturbance
A disturbance is defined to last from the first LED set as LatchedReset-S is activated until a set-
table time, tRestart, has elapsed after that all activating signals for the LEDs set as Latche-
dReset-S have reset. However if all activating signals have reset and some signal again becomes
active before tRestart has elapsed, the tRestart timer does not restart the timing sequence. A new
disturbance start will be issued first when all signals have reset after tRestart has elapsed. A di-
agram of this functionality is shown in figure 12.
From
disturbance
length control OR New
per LED OR disturbance
set to
sequence 6
tRestart
0
AND
0-100s
AND
OR
OR
AND
en01000237_ansi.vsd
In order not to have a lock-up of the indications in the case of a persisting signal each LED is
provided with a timer, tMax, after which time the influence on the definition of a disturbance of
that specific LED is inhibited. This functionality is shown i diagram in figure 13.
Activating signal
To LED
To disturbance
AND
length control
0-tMax
0
en05000507_ansi.vsd
21
LHMI related functions Chapter 2
Local human-machine interface
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000239.vsd
Figure 14: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
Figure 15 shows the timing diagram for a new indication after tRestart time has elapsed.
22
LHMI related functions Chapter 2
Local human-machine interface
Disturbance Disturbance
t Restart t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000240.vsd
Figure 16 shows the timing diagram when a new indication appears after the first one has reset
but before tRestart has elapsed.
23
LHMI related functions Chapter 2
Local human-machine interface
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000241.vsd
Figure 16: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
but with reset of activating signal between
24
LHMI related functions Chapter 2
Local human-machine interface
Disturbance
t Restart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
en01000242.vsd
HLED-
LEDMonitor
BLOCK NEWIND
RESET ACK
LEDTEST
en05000508.vsd
25
LHMI related functions Chapter 2
Local human-machine interface
26
LHMI related functions Chapter 2
Local human-machine interface
27
LHMI related functions Chapter 2
Local human-machine interface
28
About this chapter Chapter 3
Basic IED functions
29
Analog inputs Chapter 3
Basic IED functions
1 Analog inputs
1.1 Introduction
In order to get correct measurement results as well as correct protection operations the analog
input channels must be configured and properly set. For power measuring and all directional and
differential functions the directions of the input currents must be properly defined. The measur-
ing and protection algorithms in IED 670 are using primary system quantities and the set values
are done in primary quantities as well. Therefore it is extremely important to properly set the
data about the connected current and voltage transformers.
In order to make Service Values reading easier it is possible to define a reference PhaseAn-
gleRef. Then this analog channels phase angle will be always fixed to zero degree and all other
angle information will be shown in relation to this analog input. During testing and commission-
ing of the IED the reference channel can be freely change in order to facilitate testing and service
values reading.
Note!
VT inputs are sometimes not available depending on ordered type of Transformer Input Module
(TRM).
30
Analog inputs Chapter 3
Basic IED functions
Protected Object
Line, transformer, etc
e.g. P, Q, I e.g. P, Q, I
Measured quantity is Measured quantity is
positive when flowing positive when flowing
towards the object towards the object
en05000456_ansi.vsd
Figure 19: Internal convention of the directionality in IED 670
With correct setting of the primary CT direction, CTStarPoint set to FromObject or ToObject, a
positive quantities always flowing towards the object and a direction defined as Forward always
is looking towards the object. To be able to use primary system quantities for settings and cal-
culation in the IED the ratios of the main CTs and VTs must be known. This information is given
to the IED by setting of the rated secondary and primary currents and voltages of the CTs and
VTs.
The CT and VT ratio and the name on respective channel is done under General settings/Analog
module in the parameter settings tool PST.
TB40-
ANALOGIN6I
ERROR
CH1
NAMECH1
CH2
NAMECH2
CH3
NAMECH3
CH4
NAMECH4
CH5
NAMECH5
CH6
NAMECH6
en05000712.vsd
31
Analog inputs Chapter 3
Basic IED functions
TC40-
ANALOGIN9I3U
ERROR
NAMECH1
CH1
CH2
NAMECH2
NAMECH3
CH3
CH4
NAMECH4
NAMECH5
CH5
CH6
NAMECH6
NAMECH7
CH7
CH8
NAMECH8
NAMECH9
CH9
CH10
NAMECH10
NAMECH11
CH11
CH12
NAMECH12
en05000713.vsd
TD40-
ANALOGIN6I6U
ERROR
NAMECH1
CH1
CH2
NAMECH2
NAMECH3
CH3
CH4
NAMECH4
NAMECH5
CH5
CH6
NAMECH6
NAMECH7
CH7
CH8
NAMECH8
NAMECH9
CH9
CH10
NAMECH10
NAMECH11
CH11
CH12
NAMECH12
en05000714.vsd
32
Analog inputs Chapter 3
Basic IED functions
33
Analog inputs Chapter 3
Basic IED functions
Table 10: Output signals for the ANALOGIN6I6U (TD40-) function block
Signal Description
ERROR Analog input module status
CH1 Analog input 1
CH2 Analog input 2
CH3 Analog input 3
CH4 Analog input 4
CH5 Analog input 5
CH6 Analog input 6
CH7 Analog input 7
CH8 Analog input 8
CH9 Analog input 9
CH10 Analog input 10
CH11 Analog input 11
CH12 Analog input 12
Table 12: Basic general settings for the ANALOGIN12I (TA40-) function
Parameter Range Step Default Unit Description
CT_WyePoint1 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec1 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim1 1 - 99999 1 3000 A Rated CT primary current
CT_WyePoint2 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec2 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim2 1 - 99999 1 3000 A Rated CT primary current
CT_WyePoint3 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
34
Analog inputs Chapter 3
Basic IED functions
35
Analog inputs Chapter 3
Basic IED functions
Table 13: Basic general settings for the ANALOGIN9I3U (TC40-) function
Parameter Range Step Default Unit Description
CT_WyePoint1 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec1 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim1 1 - 99999 1 3000 A Rated CT primary current
CT_WyePoint2 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec2 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim2 1 - 99999 1 3000 A Rated CT primary current
CT_WyePoint3 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec3 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim3 1 - 99999 1 3000 A Rated CT primary current
CT_WyePoint4 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec4 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim4 1 - 99999 1 3000 A Rated CT primary current
CT_WyePoint5 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec5 1 - 10 1 1 A Rated CT secondary cur-
rent
36
Analog inputs Chapter 3
Basic IED functions
37
Analog inputs Chapter 3
Basic IED functions
Table 14: Basic general settings for the ANALOGIN6I6U (TD40-) function
Parameter Range Step Default Unit Description
CT_WyePoint1 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec1 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim1 1 - 99999 1 3000 A Rated CT primary current
CT_WyePoint2 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec2 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim2 1 - 99999 1 3000 A Rated CT primary current
CT_WyePoint3 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec3 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim3 1 - 99999 1 3000 A Rated CT primary current
CT_WyePoint4 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec4 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim4 1 - 99999 1 3000 A Rated CT primary current
CT_WyePoint5 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec5 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim5 1 - 99999 1 3000 A Rated CT primary current
CT_WyePoint6 FromObject - ToObject - ToObject= towards pro-
ToObject tected object, FromOb-
ject= the opposite
CTsec6 1 - 10 1 1 A Rated CT secondary cur-
rent
CTprim6 1 - 99999 1 3000 A Rated CT primary current
VTsec7 0.001 - 999.999 0.001 110.000 V Rated VT secondary volt-
age
VTprim7 0.05 - 2000.00 0.05 400.00 kV Rated VT primary voltage
VTsec8 0.001 - 999.999 0.001 110.000 V Rated VT secondary volt-
age
VTprim8 0.05 - 2000.00 0.05 400.00 kV Rated VT primary voltage
VTsec9 0.001 - 999.999 0.001 110.000 V Rated VT secondary volt-
age
38
Analog inputs Chapter 3
Basic IED functions
39
Authorization Chapter 3
Basic IED functions
2 Authorization
To safeguard the interests of our customers, both the IED 670 and the tools that are accessing
the IED 670 are protected, subject of authorization handling. The concept of authorization, as it
is implemented in the IED 670 and the associated tools is based on the following facts:
The IED users can be created, deleted and edited only with the User Management Tool (UMT)
within PCM 600. The user can only LogOn or LogOff on the LHMI of the IED, there are no
users, groups or functions that can be defined on the IED LHMI.
40
Authorization Chapter 3
Basic IED functions
Figure 20: Right-clicking to get the User Management Tool – “IED Users”.
By left-clicking on the “IED Users” submenu, the tool will open in the right-side panel:
41
Authorization Chapter 3
Basic IED functions
By default, the IEDs are delivered so that users are not required to log on to operate the IED.
The default user is the SuperUser. Before doing any changes to the User Management in the IED
it is recommendable that the administrator uploads the Users and Groups existent in the IED.
If situation requires so, one can restore the factory settings, overwriting all existing settings in
the User Management Tool database.
Note!
Even if the administrator empties the tool database, the users previously defined are still in the
IED. They cannot be erased by downloading the empty list into the IED (the tool won’t down-
load an empty list), so it is strongly recommended that before you create any user you create
one that belongs to the SuperUser group.
If the administrator marks the check box “User must logon to this IED”, then the fields under
the “User Management” tab are becoming accessible and one can add, delete and edit users.
To add a new user, the administrator will press the button that is marked with a black arrow, see
figure 22 on the “User” subtab:
42
Authorization Chapter 3
Basic IED functions
Upon pressing this button, a window will appear, enabling the administrator to enter details
about the user, assign an access password and (after pressing “Next” and advancing to the next
window) assign the user to a group:
43
Authorization Chapter 3
Basic IED functions
Once the new user is created, it will appear in the list of users. Once in the list, there are several
operations that can be performed on the users, shown in figure 25
No. Description
1 Delete selected user
2 Change password
3 Add another group to the user permissions
44
Authorization Chapter 3
Basic IED functions
The “Group” subtab is displaying all the pre-defined groups and gives short details of the per-
missions allowed to the members of a particular group:
It also allows the administrator to add another (already created) user to a group, in the same way
it could assign one more group to an user, on the “Users” subtab.
The “Functions” subtab is a descriptional area, showing in detail what Read/Write permissions
has each user group, in respect to various tools and components.
Finally, after the desired users are created and permissions assigned to them by means of user
groups, the whole list must be downloaded in the IED, in the same way as from the other tools:
45
Authorization Chapter 3
Basic IED functions
No. Description
1 Upload from IED
2 Download to IED
Once a user is created and downloaded into the IED, that user can perform a LogOn, introducing
the password assigned in the tool.
If there is no user created, an attempt to log on will cause the display to show a message box
saying: “No user defined!”
If one user leaves the IED without logging off, then after the timeout (set in Settings\General
Settings\HMI\Screen\ Display Timeout ) elapses, the IED will return to a Guest state, when only
reading is possible. The display time out is set to 60 minutes at delivery.
If there are one or more users created with the UMT and downloaded into the IED, then, when
a user intentionally attempts a LogOn or when the user attempts to perform an operation that is
password protected, the LogOn window will appear
The cursor is focused on the “User identity” field, so upon pressing the “E” key, one can change
the user name, by browsing the list of users, with the “up” and “down” arrows. After choosing
the right user name, the user must press the “E” key again. When it comes to password, upon
pressing the “E” key, the following character will show up: “$”. The user must scroll for every
letter in the pasword. After all the letters are introduced (passwords are case sensitive!) choose
OK and press “E” key again.
If everything is O.K. at a voluntary LogOn the LHMI returns to the Authorization screen. If the
LogOn is OK, when required to change for example a password protected setting, the LHMI re-
turns to the actual setting folder. If the LogOn has failed, then the LogOn window will pop-up
again, until either the user makes it right or presses “Cancel”.
46
Self supervision with internal event list Chapter 3
Basic IED functions
3.1 Introduction
The self-supervision function listens and reacts to internal system events, generated by the dif-
ferent built-in self-supervision elements. The internal events are saved in an internal event list.
The self-supervision status can be monitored from the local HMI or a SMS/SCS system.
Under the Diagnostics menu in the local HMI the present information from the self-supervision
function can be reviewed. The information can be found under Diagnostics\Internal Events or
Diagnostics\IED Status\General. Refer to the “Installation and Commissioning manual” for a
detailed list of supervision signals that can be generated and displayed in the local HMI.
A self-supervision summary can be obtained by means of the potential free alarm contact (IN-
TERNAL FAIL) located on the power supply module. The function of this output relay is an
OR-function between the INT-FAIL signal see figure 28 and a couple of more severe faults that
can occur in the IED, see figure 27
en04000520_ansi.vsd
47
Self supervision with internal event list Chapter 3
Basic IED functions
Some signals are available from the IES (IntErrorSign) function block. The signals from this
function block are sent as events to the station level of the control system. The signals from the
IES function block can also be connected to binary outputs for signalization via output relays or
they can be used as conditions for other functions if required/desired.
Individual error signals from I/O modules can be obtained from respective module in the Signal
Matrix Tool. Error signals from time synchronization can be obtained from the time synchroni-
zation block TIME.
48
Self supervision with internal event list Chapter 3
Basic IED functions
49
Self supervision with internal event list Chapter 3
Basic IED functions
50
Self supervision with internal event list Chapter 3
Basic IED functions
The technique to split the analog input signal into two A/D converters with different amplifica-
tion makes it possible to supervise the incoming signals under normal conditions where the sig-
nals from the two converters should be identical. An alarm is given if the signals are out of the
boundaries. Another benefit is that it improves the dynamic performance of the A/D conversion.
The self-supervision of the A/D conversion is controlled by the ADx_Controller function. One
of the tasks for the controller is to perform a validation of the input signals. This is done in a
validation filter which has mainly two objects: First is the validation part, i.e. checks that the
A/D conversion seems to work as expected. Secondly, the filter chooses which of the two signals
that shall be sent to the CPU, i.e. the signal that has the most suitable level, the ADx_LO or the
16 times higherADx_HI.
When the signal is within measurable limits on both channels, a direct comparison of the two
channels can be performed. If the validation fails, the CPU will be informed and an alarm will
be given.
51
Self supervision with internal event list Chapter 3
Basic IED functions
IS---
InternalSignal
FAIL
WARNING
CPUFAIL
CPUWARN
TSYNCERR
RTCERR
en04000392.vsd
52
Time synchronization Chapter 3
Basic IED functions
4 Time synchronization
4.1 Introduction
Use the time synchronization source selector to select a common source of absolute time for the
IED when it is a part of a protection system. This makes comparison of events and disturbance
data between all IEDs in a SA system possible.
Time definitions
The error of a clock is the difference between the actual time of the clock, and the time the clock
is intended to have. The rate accuracy of a clock is normally called the clock accuracy and means
how much the error increases, i.e. how much the clock gains or loses time. A disciplined clock
is a clock that “knows” its own faults and tries to compensate for them, i.e. a trained clock.
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical structure. A module
is synchronized from a higher level and provides synchronization to lower levels.
Syncronization from
a higher level
Module
Optional syncronization of
modules at a lower level
en05000206.vsd
53
Time synchronization Chapter 3
Basic IED functions
RTC at startup
At IED startup, the internal time is free running. If the RTC is still alive since the last up time,
the time in the IED will be quite accurate (may drift 35 ppm), but if the RTC power has been
lost during power off (will happen after 5 days), the IED time will start at 01-01-1970. For more
information, please refer to section "Time synchronization startup procedure" and section "Ex-
ample, binary synchronization".
• If the synchronization message, that is similar to the other messages from its or-
igin has an offset compared to the internal time in the IED, the message is used
directly for synchronization, that is for adjusting the internal clock to obtain zero
offset at the next coming time message.
• If the synchronization message has an offset that is large compared to the other
messages, a “spike-filter” in the IED will remove this time-message.
• If the synchronization message has an offset that is large, and the following mes-
sage also has a large offset, the spike filter will not act and the offset in the syn-
chronization message will be compared to a threshold that defaults to 100
milliseconds. If the offset is more than the threshold, the IED is brought into a
safe state and the clock is thereafter set to the correct time. If the offset is lower
than the threshold, the clock will be adjusted with 1000 ppm until the offset is
removed. With an adjustment of 1000 ppm, it will take 100 seconds or 1.7 min-
utes to remove an offset of 100 milliseconds.
Synchronization messages configured as coarse will only be used for initial setting of the time.
After this has been done, the messages are checked against the internal time and only an offset
of more than 10 seconds will reset the time.
Rate accuracy
In the REx670 IED, the rate accuracy at cold start is about 100 ppm, but if the IED is synchro-
nized for a while, the rate accuracy will be approximately 1 ppm if the surrounding temperature
is constant. Normally it will take 20 minutes to reach full accuracy.
54
Time synchronization Chapter 3
Basic IED functions
• Coarse message is sent every minute and comprises complete date and time, i.e.
year, month, day, hours, minutes, seconds and milliseconds.
• Fine message is sent every second and comprises only seconds and milliseconds.
The minute pulse is connected to any channel on any Binary Input Module in the IED. The elec-
trical characteristic is thereby the same as for any other binary input.
If the objective of synchronization is to achieve a relative time within the substation and if no
station master clock with minute pulse output is available, a simple minute pulse generator can
be designed and used for synchronization of the IEDs. The minute pulse generator can be created
using the logical elements and timers available in the IED.
The definition of a minute pulse is that it occurs one minute after the last pulse. As only the
flanks are detected, the flank of the minute pulse shall occur one minute after the last flank.
55
Time synchronization Chapter 3
Basic IED functions
Pulse data:
en05000251.vsd
The default time-out-time for a minute pulse is two minutes, and if no valid minute pulse is re-
ceived within two minutes a SYNCERR will be given.
If contact bounces occurs, only the first pulse will be detected as a minute pulse. The next minute
pulse will be registered first 60 s - 50 ms after the last contact bounce.
If the minute pulses are perfect, e.g. it is exactly 60 seconds between the pulses, contact bounces
might occur 49 ms after the actual minute pulse without effecting the system. If contact bounces
occurs more than 50 ms, e.g. it is less than 59950 ms between the two most adjacent positive (or
negative) flanks, the minute pulse will not be accepted.
56
Time synchronization Chapter 3
Basic IED functions
time offset is more than 100 ms, or adjust the time, if the time offset is small enough. If the time
is set, the application will be brought to a safe state before the time is set. If the time is adjusted,
the time will reach its destination within 1.7 minutes.
The DNP3.0 communication can be ? to be the source of the Course time synchronisation. The
fine synch source must be another when high accuracy time working is required.
The IRIG interface to the IED supplies two possible synchronization methods, IRIG-B and PPS.
IRIG-B
IRIG-B is a protocol used only for time synchronization. A clock can provide local time of the
year in this format. The “B” in IRIG-B states that 100 bits per second are transmitted, and the
message is sent every second. After IRIG-B there is a number of figures stating if and how the
signal is modulated and the information transmitted.
To receive IRIG-B there are two connectors in the IRIG module, one galvanic BNC connector
and one optical ST connector. IRIG-B 12x messages can be supplied via the galvanic interface,
and IRIG-B 00x messages can be supplied via either the galvanic interface or the optical inter-
face, where x (in 00x or 12x) means a figure in the range 1-7.
“00” means that a base band is used, and the information can be fed into the IRIG-B module via
the BNC contact or an optical fiber. “12” means that a 1 kHz modulation is used. In this case the
information must go into the module via the BNC connector.
If the x in 00x or 12x is 4, 5, 6 or 7, the time message from IRIG-B contains information of the
year. If x is 0, 1, 2 or 3, the information only contains the time within the year, and year infor-
mation has to come from the tool or HMI.
The IRIG Module also takes care of IEEE1344 messages that are sent by many IRIG-B clocks,
as IRIG-B previously did not have any year information. IEE1344 is compatible with IRIG-B
and contains year information and information of time-zone.
It is recommended to use IEEE 1344 for supplying time information to the IRIG module. In this
case, also send the local time in the messages, as this local time plus the TZ Offset supplied in
the message equals UTC at all times.
PPS
An optical PPS signal can be supplied to the optical interface of the IRIG module.
The PPS signal is a transition from dark to light, that occurs 1 second +- 2 us after another PPS
signal. The allowed jitter of 2 us is settable.
57
Time synchronization Chapter 3
Basic IED functions
TIME-
TIME
TSYNCERR
RTCERR
en05000425.vsd
Table 21: Basic general settings for the TimeSynch (TSYN-) function
Parameter Range Step Default Unit Description
CoarseSyncSrc Disabled - Off - Coarse time synchroniza-
SPA tion source
LON
SNTP
DNP
FineSyncSource Disabled - Off - Fine time synchronization
SPA source
LON
BIN
GPS
GPS+SPA
GPS+LON
GPS+BIN
SNTP
GPS+SNTP
IRIG-B
GPS+IRIG-B
PPS
SyncMaster Disabled - Off - Activate IEDas synchro-
SNTP-Server nization master
58
Time synchronization Chapter 3
Basic IED functions
59
Time synchronization Chapter 3
Basic IED functions
60
Time synchronization Chapter 3
Basic IED functions
Table 27: Basic general settings for the TimeSynchIRIGB (TIRI-) function
Parameter Range Step Default Unit Description
SynchType BNC - Opto - Type of synchronization
Opto
TimeDomain LocalTime - LocalTime - Time domain
UTC
Encoding IRIG-B - IRIG-B - Type of encoding
1344
1344TZ
TimeZoneAs1344 MinusTZ - PlusTZ - Time zone as in 1344
PlusTZ standard
61
Parameter setting groups Chapter 3
Basic IED functions
5.1 Introduction
Use the six sets of settings to optimize IED operation for different system conditions. By creat-
ing and switching between fine tuned setting sets, either from the human-machine interface or
configurable binary inputs, results in a highly adaptable IED that can cope with a variety of sys-
tem scenarios.
A setting group is selected by using the local HMI, from a front connected personal computer,
remotely from the station control or station monitoring system or by activating the correspond-
ing input to the ACGR function block.
Each input of the function block can be configured to connect to any of the binary inputs in the
IED. To do this the PCM 600 configuration tool must be used.
The external control signals are used for activating a suitable setting group when adaptive func-
tionality is necessary. Input signals that should activate setting groups must be either permanent
or a pulse exceeding 400 ms.
More than one input may be activated at the same time. In such cases the lower order setting
group has priority. This means that if for example both group four and group two are set to ac-
tivate, group two will be the one activated.
Every time the active group is changed, the output signal GRP_CHGD is sending a pulse.
The parameter MAXSETGR defines the maximum number of setting groups in use to switch be-
tween.
62
Parameter setting groups Chapter 3
Basic IED functions
ACTIVATE GROUP 6
ACTIVATE GROUP 5
ACTIVATE GROUP 4
ACTIVATE GROUP 3
ACTIVATE GROUP 2
+RL2 ACTIVATE GROUP 1
ACGR-
IOx-Bly1 ActiveGroup
∅ ACTGRP1 GRP1
IOx-Bly2
∅ ACTGRP2 GRP2
IOx-Bly3
∅ ACTGRP3 GRP3
IOx-Bly4
∅ ACTGRP4 GRP4
IOx-Bly5
∅ ACTGRP5 GRP5
IOx-Bly6 ACTGRP6
∅ GRP6
GRP_CHGD
en05000119_ansi.vsd
The above example also includes seven output signals, for confirmation of which group that is
active.
The SGC function block has an input where the number of setting groups used is defined.
Switching can only be done within that number of groups. The number of setting groups selected
to be used will be filtered so only the setting groups used will be shown on the PST setting tool.
ACGR-
ActiveGroup
ACTGRP1 GRP1
ACTGRP2 GRP2
ACTGRP3 GRP3
ACTGRP4 GRP4
ACTGRP5 GRP5
ACTGRP6 GRP6
GRP_CHGD
en05000433_ansi.vsd
63
Parameter setting groups Chapter 3
Basic IED functions
SGC--
NoOfSetGrp
MAXSETGR
en05000716.vsd
Table 30: Output signals for the ActiveGroup (ACGR-) function block
Signal Description
GRP1 Setting group 1 is active
GRP2 Setting group 2 is active
GRP3 Setting group 3 is active
GRP4 Setting group 4 is active
GRP5 Setting group 5 is active
GRP6 Setting group 6 is active
GRP_CHGD Pulse when setting changed
64
Parameter setting groups Chapter 3
Basic IED functions
65
Test mode functionality Chapter 3
Basic IED functions
6.1 Introduction
Most of the functions in the IED can individually be blocked by means of settings from the local
HMI or PST. To enable these blockings the IED must be set in test mode. When leaving the test
mode, i.e. entering normal mode, these blockings are disabled and everything is set to normal
operation. All testing will be done with actually set and configured values within the IED. No
settings will be changed, thus mistakes are avoided.
While the IED is in test mode, the ACTIVE output of the function block TEST is activated. The
other two outputs of the function block TEST are showing which is the generator of the “Test
mode: On” state — input from configuration (OUTPUT output activated) or setting from LHMI
(SETTING output activated).
While the IED is in test mode, the yellow PICKUP LED will flash and all functions are blocked.
Any function can be de-blocked individually regarding functionality and event signalling.
Most of the functions in the IED can individually be blocked by means of settings from the local
HMI. To enable these blockings the IED must be set in test mode (the output ACTIVE in func-
tion block TEST is set to true), see example in figure 36. When leaving the test mode, i.e. enter-
ing normal mode, these blockings are disabled and everything is set to normal operation. All
testing will be done with actually set and configured values within the IED. No settings will be
changed, thus no mistakes are possible.
The blocked functions will still be blocked next time entering the test mode, if the blockings
were not reset.
The blocking of a function concerns all output signals from the actual function, so no outputs
will be activated.
The TEST function block might be used to automatically block functions when a test handle is
inserted in a test switch. A contact in the test switch (RTXP24 contact 29-30) or an FT switch
finger can supply a binary input which in turn is configured to the TEST function block.
Each of the protection functions includes the blocking from TEST function block. A typical ex-
ample from the undervoltage function is shown in figure 36.
The functions can also be blocked from sending events over IEC 61850 station bus to prevent
filling station and SCADA databases with test events e.g. during a maintenance test.
66
Test mode functionality Chapter 3
Basic IED functions
V Disconnection
Normal voltage
Pickup1
Pickup2
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466_ansi.vsd
Figure 36: Example of blocking the time delayed undervoltage protection function.
TEST-
Test
INPUT ACTIVE
OUTPUT
SETTING
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67
Test mode functionality Chapter 3
Basic IED functions
Table 34: Output signals for the Test (TEST-) function block
Signal Description
ACTIVE IED in test mode when active
OUTPUT Test input is active
SETTING Test mode setting is (Enabled) or not (Disabled)
NOEVENT Event disabled during testmode
68
IED identifiers Chapter 3
Basic IED functions
7 IED identifiers
7.1 Introduction
There are two functions that allow you to identify each IED individually: ProductInformation
function has seven pre-set, settings that are unchangeable but nevertheless very important:
• IED Type
• ProductDef
• FirmwareVer
• IEDMainFunType
• SerialNo.
• Ordering No.
• ProductionDate.
Diagnostics/IED Status/ProductIdentifiers
They are very helpful in case of support process (such as repair or maintenance). TerminalID
function is allowing you to identify the individual IED in your system, not only in the substation,
but in a whole region or a country.
69
Signal matrix for binary inputs (SMBI) Chapter 3
Basic IED functions
8.1 Introduction
The SMBI function block is used within the CAP tool in direct relation with the Signal Matrix
Tool SMT (please see the overview of the engineering process in the “Application manual”,
chapter “Engineering of the IED”). It represents the way binary inputs are brought in for one
IED 670 configuration.
SI01-
SMBI
INSTNAME BI1
BI1NAME BI2
BI2NAME BI3
BI3NAME BI4
BI4NAME BI5
BI5NAME BI6
BI6NAME BI7
BI7NAME BI8
BI8NAME BI9
BI9NAME BI10
BI10NAME
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Signal matrix for binary inputs (SMBI) Chapter 3
Basic IED functions
Signal Description
BI6 Binary input 6
BI7 Binary input 7
BI8 Binary input 8
BI9 Binary input 9
BI10 Binary input 10
71
Signal matrix for binary outputs (SMBO) Chapter 3
Basic IED functions
9.1 Introduction
The SMBO function block is used within the CAP tool in direct relation with the Signal Matrix
Tool SMT (please see the overview of the engineering process in the “Application manual”,
chapter “Engineering of the IED”). It represents the way binary outputs are sent from one
IED 670 configuration.
SO01-
SMBO
BO1 INSTNAME
BO2 BO1NAME
BO3 BO2NAME
BO4 BO3NAME
BO5 BO4NAME
BO6 BO5NAME
BO7 BO6NAME
BO8 BO7NAME
BO9 BO8NAME
BO10 BO9NAME
BO10NAME
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Signal matrix for binary outputs (SMBO) Chapter 3
Basic IED functions
Signal Description
BO6 Signal name for BO6 in Signal Matrix Tool
BO7 Signal name for BO7 in Signal Matrix Tool
BO8 Signal name for BO8 in Signal Matrix Tool
BO9 Signal name for BO9 in Signal Matrix Tool
BO10 Signal name for BO10 in Signal Matrix Tool
73
Signal matrix for mA inputs (SMMI) Chapter 3
Basic IED functions
10.1 Introduction
The SMMI function block is used within the CAP tool in direct relation with the Signal Matrix
Tool SMT (please see the overview of the engineering process in the “Application manual”,
chapter “Engineering of the IED”). It represents the way milliamp (mA) inputs are brought in
for one IED670 configuration.
The outputs on the SMMI are normally connected to the MVGGIO function block for further
use of the mA signals.
SMI1-
SMMI
INSTNAME AI1
AI1NAME AI2
AI2NAME AI3
AI3NAME AI4
AI4NAME AI5
AI5NAME AI6
AI6NAME
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74
Signal matrix for analog inputs (SMAI) Chapter 3
Basic IED functions
11.1 Introduction
The SMAI function block (or the pre-processing function block, as it is also known) is used
within the PCM 600 in direct relation with the Signal Matrix Tool SMT (please see the overview
of the engineering process in the “Application manual”, chapter “Engineering of the IED”). It
represents the way analog inputs are brought in for one IED 670 configuration.
The output singal AI1 to AI4 are direct output of the in SMT connected input to AI1 to AI4. AIN
is always the neutral current, calculated residual sum or the signal connected to AI4. Note that
function block will always calculate the residual sum of current/voltage if the input is not con-
nected in SMT. Applications with a few exceptions (HEDIF, BBDIF) shall always be connected
to AI3P.
PR01-
SMAI
BLOCK SYNCOUT
DFTSPFC SPFCOUT
GRPNAME AI3P
AI1NAME AI1
AI2NAME AI2
AI3NAME AI3
AI4NAME AI4
TYPE AIN
NOSMPLCY
en05000705.vsd
PR02-
SMAI
BLOCK AI3P
GRPNAME AI1
AI1NAME AI2
AI2NAME AI3
AI3NAME AI4
AI4NAME AIN
TYPE
en07000130.vsd
75
Signal matrix for analog inputs (SMAI) Chapter 3
Basic IED functions
Table 41: Output signals for the SMAI (PR01-) function block
Signal Description
SYNCOUT Synchronisation signal from internal DFT reference function
SPFCOUT Number of samples per fundamental cycle from internal DFT ref-
erence function
AI3P Group 1 analog input 3-phase group
AI1 Group 1 analog input 1
AI2 Group 1 analog input 2
AI3 Group 1 analog input 3
AI4 Group 1 analog input 4
AIN Group 1 analog input residual for disturbance recorder
Table 42: Input signals for the SMAI (PR02-) function block
Signal Description
BLOCK Block group 2
Table 43: Output signals for the SMAI (PR02-) function block
Signal Description
AI3P Group 2 analog input 3-phase group
AI1 Group 2 analog input 1
AI2 Group 2 analog input 2
AI3 Group 2 analog input 3
AI4 Group 2 analog input 4
AIN Group 2 analog input residual for disturbance recorder
76
Signal matrix for analog inputs (SMAI) Chapter 3
Basic IED functions
Note!
Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no
VT inputs are available. Internal nominal frequency DFT reference is then the reference.
Table 44: Basic general settings for the SMAI (PR01-) function
Parameter Range Step Default Unit Description
DFTRefExtOut InternalDFTRef - InternalDFTRef - DFT reference for exter-
AdDFTRefCh1 nal output
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
DFTReference InternalDFTRef - InternalDFTRef - DFT reference
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
ConnectionType Ph-N - Ph-N - Input connection type
Ph-Ph
TYPE 1-2 1 1 Ch 1=Voltage,2=Current
77
Signal matrix for analog inputs (SMAI) Chapter 3
Basic IED functions
Table 45: Advanced general settings for the SMAI (PR01-) function
Parameter Range Step Default Unit Description
Negation Disabled - Disabled - Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 1 10 % Limit for frequency calcu-
lation in % of VBase
VBase 0.05 - 2000.00 0.05 400.00 kV Base Voltage
Table 46: Basic general settings for the SMAI (PR02-) function
Parameter Range Step Default Unit Description
DFTReference InternalDFTRef - InternalDFTRef - DFT reference
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
ConnectionType Ph-N - Ph-N - Input connection type
Ph-Ph
TYPE 1-2 1 1 Ch 1=Voltage,2=Current
Table 47: Advanced general settings for the SMAI (PR02-) function
Parameter Range Step Default Unit Description
Negation Disabled - Off - Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 1 10 % Limit for frequency calcu-
lation in % of VBase
VBase 0.05 - 2000.00 0.05 400.00 kV Base Voltage
78
Summation block 3 phase (SUM3Ph) Chapter 3
Basic IED functions
12.1 Introduction
The SUM3Ph function block is used in order to get the sum of two sets of 3 ph analog signals
(of the same type) for those IED functions that might need it.
SU01-
Sum3Ph
BLOCK AI3P
DFTSYNC AI1
DFTSPFC AI2
G1AI3P AI3
G2AI3P AI4
en05000441.vsd
Table 49: Output signals for the Sum3Ph (SU01-) function block
Signal Description
AI3P Group analog input 3-phase group
AI1 Group 1 analog input
AI2 Group 2 analog input
AI3 Group 3 analog input
AI4 Group 4 analog input
79
Summation block 3 phase (SUM3Ph) Chapter 3
Basic IED functions
Note!
Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no
VT inputs are available.
Table 50: Basic general settings for the Sum3Ph (SU01-) function
Parameter Range Step Default Unit Description
SummationType Group1+Group2 - Group1+Group2 - Summation type
Group1-Group2
Group2-Group1
-(Group1+Group2)
DFTReference InternalDFTRef - InternalDFTRef - DFT reference
AdDFTRefCh1
External DFT ref
Table 51: Advanced general settings for the Sum3Ph (SU01-) function
Parameter Range Step Default Unit Description
FreqMeasMinVal 5 - 200 1 10 % Magnitude limit for fre-
quency calculation in %
of Vbase
VBase 0.05 - 2000.00 0.05 400.00 kV Base voltage
80
Authority status (AUTS) Chapter 3
Basic IED functions
13.1 Introduction
The AUTS function block (or the authority status function block) is an indication function block,
which informs about two events related to the IED and the user authorization:
• the fact that at least one user has tried to log on wrongly into the IED and it was
blocked (the output USRBLKED)
• the fact that at least one user is logged on (the output LOGGEDON)
AUTS-
AuthStatus
USRBLKED
LOGGEDON
en06000503.vsd
81
Goose binary receive Chapter 3
Basic IED functions
GB01-
GooseBinRcv
BLOCK OUT1
INSTNAME OUT1VAL
OUT2
OUT2VAL
OUT3
OUT3VAL
OUT4
OUT4VAL
OUT5
OUT5VAL
OUT6
OUT6VAL
OUT7
OUT7VAL
OUT8
OUT8VAL
OUT9
OUT9VAL
OUT10
OUT10VAL
OUT11
OUT11VAL
OUT12
OUT12VAL
OUT13
OUT13VAL
OUT14
OUT14VAL
OUT15
OUT15VAL
OUT16
OUT16VAL
OUT1NAM
OUT2NAM
OUT3NAM
OUT4NAM
OUT5NAM
OUT6NAM
OUT7NAM
OUT8NAM
OUT9NAM
OUT10NAM
OUT11NAM
OUT12NAM
OUT13NAM
OUT14NAM
OUT15NAM
OUT16NAM
en07000047.vsd
82
Goose binary receive Chapter 3
Basic IED functions
Table 54: Output signals for the GooseBinRcv (GB01-) function block
Signal Description
OUT1 Binary output 1
OUT1VAL Valid data on binary output 1
OUT2 Binary output 2
OUT2VAL Valid data on binary output 2
OUT3 Binary output 3
OUT3VAL Valid data on binary output 3
OUT4 Binary output 4
OUT4VAL Valid data on binary output 4
OUT5 Binary output 5
OUT5VAL Valid data on binary output 5
OUT6 Binary output 6
OUT6VAL Valid data on binary output 6
OUT7 Binary output 7
OUT7VAL Valid data on binary output 7
OUT8 Binary output 8
OUT8VAL Valid data on binary output 8
OUT9 Binary output 9
OUT9VAL Valid data on binary output 9
OUT10 Binary output 10
OUT10VAL Valid data on binary output 10
OUT11 Binary output 11
OUT11VAL Valid data on binary output 11
OUT12 Binary output 12
OUT12VAL Valid data on binary output 12
OUT13 Binary output 13
OUT13VAL Valid data on binary output 13
OUT14 Binary output 14
OUT14VAL Valid data on binary output 14
OUT15 Binary output 15
OUT15VAL Valid data on binary output 15
OUT16 Binary output 16
83
Goose binary receive Chapter 3
Basic IED functions
Signal Description
OUT16VAL Valid data on binary output 16
OUT1NAM Signal name for reservation request in Signal Matrix Tool
OUT2NAM Signal name for reservation request in Signal Matrix Tool
OUT3NAM Signal name for reservation request in Signal Matrix Tool
OUT4NAM Signal name for reservation request in Signal Matrix Tool
OUT5NAM Signal name for reservation request in Signal Matrix Tool
OUT6NAM Signal name for reservation request in Signal Matrix Tool
OUT7NAM Signal name for reservation request in Signal Matrix Tool
OUT8NAM Signal name for reservation request in Signal Matrix Tool
OUT9NAM Signal name for reservation request in Signal Matrix Tool
OUT10NAM Signal name for reservation request in Signal Matrix Tool
OUT11NAM Signal name for reservation request in Signal Matrix Tool
OUT12NAM Signal name for reservation request in Signal Matrix Tool
OUT13NAM Signal name for reservation request in Signal Matrix Tool
OUT14NAM Signal name for reservation request in Signal Matrix Tool
OUT15NAM Signal name for reservation request in Signal Matrix Tool
OUT16NAM Signal name for reservation request in Signal Matrix Tool
84
About this chapter Chapter 4
Differential protection
Chapter 4 Differential
protection
85
High impedance differential protection Chapter 4
(PDIF, 87) Differential protection
1.1 Introduction
The high impedance differential protection can be used when the involved CT cores have the
same turn ratio and similar magnetizing characteristic. It utilizes an external summation of the
phases and neutral current and a series resistor and a voltage dependent resistor externally to the
relay.
86
High impedance differential protection Chapter 4
(PDIF, 87) Differential protection
AlarmPickup
0-tAlarm
0
AlarmPickup
0.03s
0
en05000301_ansi.vsd
HZD1-
HZPDIF_87
ISI TRIP
BLOCK ALARM
BLKTR MEASVOLT
en05000363_ansi.vsd
87
High impedance differential protection Chapter 4
(PDIF, 87) Differential protection
Table 57: Output signals for the HZPDIF_87 (HZD1-) function block
Signal Description
TRIP Trip signal
ALARM Alarm signal
MEASVOLT Measured RMS voltage on CT secondary side
88
About this chapter Chapter 5
Impedance protection
Chapter 5 Impedance
protection
89
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
1.1 Introduction
The line distance protection is a five zone full scheme protection with three fault loops for phase
to phase faults and three fault loops for phase to ground fault for each of the independent zones.
Individual settings for each zone in resistive and reactive reach gives flexibility for use on over-
head lines and cables of different types and lengths.
The function has a functionality for load encroachment which increases the possibility to detect
high resistive faults on heavily loaded lines (see figure 48).
X(Ohm)
ZL
R(Ohm)
en06000375.vsd
Figure 48: Typical Mho distance protection zone with load encroachment function activated
The independent measurement of impedance for each fault loop together with a sensitive and
reliable built in phase selection makes the function suitable in applications with single phase au-
to-reclosing.
90
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load exporting
end at phase to ground faults on heavily loaded power lines.
The distance protection zones can operate, independent of each other, in directional (forward or
reverse) or non-directional mode. This makes them suitable, together with different communi-
cation schemes, for the protection of power lines and cables in complex network configurations,
such as parallel lines, multi-terminal lines etc.
Figure 49 presents an outline of the different measuring loops for the basic five, imped-
ance-measuring zones l.
en05000458_ansi.vsd
Figure 49: The different measuring loops at line-ground fault and phase-phase fault.
The use of full scheme technique gives faster operation time compared to switched schemes
which mostly uses a pickup of an overreaching element to select correct voltages and current
depending on fault type. Each distance protection zone performs like one independent distance
protection relay with six measuring elements.
The distance measuring zone will essentially operate according to the non-directional imped-
ance characteristics presented in figure 50 and figure 51. The phase-to-ground characteristic is
illustrated with the full loop reach while the phase-to-phase characteristic presents the per-phase
reach.
91
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
X0 − X1
Xn =
3
X1+Xn R0 − R1
Rn =
3
f N f N
R (Ohm/loop)
RFPG RFPG
X1+Xn
en05000661_ansi.vsd
Figure 50: Characteristic for the phase-to-ground measuring loops, ohm/loop domain.
92
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
X (Ohm/phase)
2·X1
R (Ohm/phase)
RFPP RFPP
2·X1
The fault loop reach with respect to each fault type may also be presented as in figure 52. Note
in particular the difference in definition regarding the (fault) resistive reach for phase-to-phase
faults and three-phase faults.
93
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
Ip R1 + j X1
Phase-to-ground
VA
element
Phase-to-ground
fault in phase A RFPG
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
IA R1 + j X1 Phase-to-phase
VA element A-B
Phase-to-phase
fault in phase A-B RFPP
IB
VB (Arc resistance)
R1 + j X1
IA R1 + j X1 0.5·RFPP Phase-to-phase
VA element A-C
Three-phase
fault
IC
VC
R1 + j X1 0.5·RFPP
en05000181_ansi.vsd
where:
n designates anyone of the three phases (1, 2 or 3) and
m represents the phase that is leading phase n with 120 degrees (i.e. 3, 1 or 2).
The R1 and jX1 in figure 52 represents the positive sequence impedance from the measuring
point to the fault location. The RFPG and RFPP is the eventual fault resistance in the fault place.
94
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
Regarding the illustration of three-phase fault in figure 52, there is of course fault current flow-
ing also in the third phase during a three-phase fault. The illustration merely reflects the loop
measurement, which is made phase-to-phase.
The theoretical parameters p and q outline the area of operation in quadrant 1 when varied from
0 to 1.0. That is, for any combination of p and q, where both are between 0 and 1.0, the corre-
sponding impedance is within the reach of the characteristic.
The zone may be set to operate in Non-directional, Forward or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in figure 53. It may be
convenient to once again mention that the impedance reach is symmetric, in the sense that it is
conform for forward and reverse direction. Therefore, all reach settings apply to both directions.
X X X
R R R
en05000182.vsd
The phase-to-ground loop AG (BG or CG) is blocked if IA (IB or IC) < IMinPUPG.
For zone 1 with load compensation feature the additional criterion applies, that all
phase-to-ground loops will be blocked when IN < IMinOpIR, regardless of the phase currents.
IA (IB or IC) is the RMS value of the current in phase IA (IB or IC). IN is the RMS value of the
vector sum of the three phase currents, i.e. residual current 3I0.
95
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
The phase-to-phase loop AB (BC or CA) is blocked if IAB (BC or CA)< IMinPUPP.
Note!
All three current limits IMinPUPG, IminOpIR and IMinPUPP are automatically reduced to 75%
of regular set values if the zone is set to operate in reverse direction, i.e. OperationDir=Reverse.
VA - VB
Zapp =
IA - IB
(Equation 1)
Here V and I represent the corresponding voltage and current phasors in the respective phase Ln
(n = 1, 2, 3)
The return compensation applies in a conventional manner to ph-g faults (example for a phase
A to ground fault) according to equation 2.
V_A
Z app =
I _ A + IN ⋅ KN
(Equation 2)
Where:
V_A, I_A and are the phase voltage, phase current and residual current present to the IED
IN
KN is defined as:
X0 - X1
KN =
3X1
where X0 and X1 is zero and positive sequence reactance from the measuring point to
the fault on the protected line.
Here IN is a phasor of the residual current in relay point. This results in the same reach along the
line for all types of faults.
The apparent impedance is considered as an impedance loop with resistance R and reactance X.
96
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
The formula given in equation 2 is only valid for no loaded radial feeder applications. When load
is considered in the case of single line to ground fault, conventional distance protection might
overreach at exporting end and underreach at importing end. REx670 has an adaptive load com-
pensation which increases the security in such applications.
Measuring elements receive current and voltage information from the A/D converter. The check
sums are calculated and compared, and the information is distributed into memory locations. For
each of the six supervised fault loops, sampled values of voltage (V), current (I), and changes in
current between samples (ΔI) are brought from the input memory and fed to a recursive Fourier
filter.
The filter provides two orthogonal values for each input. These values are related to the loop im-
pedance according to equation 3,
X Δi
V = R⋅ i + ⋅
ω 0 Δt
(Equation 3)
X Δ Re (I )
Re (V ) = R ⋅ Re (I ) + ⋅
ω0 Δt
(Equation 4)
X Δ Im (I )
Im (V ) = R ⋅ Im (I ) + ⋅
ω0 Δt
(Equation 5)
with
ω0 = 2 ⋅ π ⋅ f 0
(Equation 6)
where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency
97
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
The algorithm calculates Rm measured resistance from the equation for the real value of the volt-
age and substitute it in the equation for the imaginary part. The equation for the Xm measured
reactance can then be solved. The final result is equal to:
The calculated Rm and Xm values are updated each sample and compared with the set zone reach.
The adaptive tripping counter counts the number of permissive tripping results. This effectively
removes any influence of errors introduced by the capacitive voltage transformers or by other
factors.
The directional evaluations are performed simultaneously in both forward and reverse direc-
tions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence
memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults
close to the relay point.
0.8·V1A + 0.2·V1AM
AngDir < ang < AngNegRes
IA
(Equation 9)
98
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
0.8·V1AB + 0.2·V1ABM
AngDir < ang < AngNegRes
IAB
(Equation 10)
where:
AngDir is the setting for the lower boundary of the forward directional characteristic, by default
set to 15 (= -15 degrees) and
AngNegRes is the setting for the upper boundary of the forward directional characteristic, by default
set to 115 degrees, see figure 54.
V1A is positive sequence phase voltage in phase A
V1AM is positive sequence memorized phase voltage in phase A
IA is phase current in phase A
V1AB is voltage difference between phase A and B (B lagging A)
V1ABM is memorized voltage difference between phase A and B (B lagging A)
IAB is current difference between phase A and B (B lagging A)
The setting of AngDir and AngNegRes is by default set to 15 (= -15) and 115 degrees respective-
ly.(see figure 54) and it should not be changed unless system studies have shown the necessity.
The ZD gives a binary coded signal on the output STDIR depending on the evaluation where
FWD_A=1 adds 1, REV_A=1 adds 2, FWD_B=1 adds 4 etc.
AngNegRes
AngDir
R
en05000722_ansi.vsd
Figure 54: Setting angles for discrimination of forward and reverse fault
99
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
The polarizing voltage is available as long as the positive-sequence voltage exceeds 4% of the
set base voltage VBase. So the directional element can use it for all unsymmetrical faults includ-
ing close-in faults.
For close-in three-phase faults, the V1AM memory voltage, based on the same positive sequence
voltage, ensures correct directional discrimination.
The memory voltage is used for 100 ms or until the positive sequence voltage is restored.
• If the current is still above the set value of the minimum operating current
(between 10 and 30% of the set terminal rated current IBase), the condition seals
in.
- If the fault has caused tripping, the trip endures.
- If the fault was detected in the reverse direction, the measuring element in
the reverse direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets
until the positive sequence voltage exceeds 10% of its rated value.
Phase-to-ground related signals are designated by AG, BG and CG. The phase-to-phase signals
are designated by AB, BC and CA.
Fulfillment of two different measuring conditions is necessary to obtain the one logical signal
for each separate measuring loop:
The PHSEL input signal represents a connection of six different integer values from the phase
selection function within the IED, which are converted within the zone measuring function into
corresponding boolean expressions for each condition separately. It is connected to the PHS
function block output STCDZ.
The internal input signal DIRCND is used to give condition for directionality for the distance
measuring zones. The signal contains binary coded information for both forward and reverse di-
rection. The zone measurement function filter out the relevant signals on the STDIR input de-
pending on the setting of the parameter OperationDir. It shall be configured to the STDIR output
on the ZD block.
100
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
PUZMPP
OR
PHSEL
NDIR_AB
AB AND
NDIR_BC
BC AND
NDIR_CA
CA AND
NDIR_A
AG AND
NDIR_B
BG AND
NDIR_C
CG AND
OR STNDPE
OR
LOVBZ PHPUND
OR AND
BLOCK
BLK
99000557_ansi.vsd
Figure 55: Conditioning by a group functional input signal PHSEL
Composition of the phase pickup signals for a case, when the zone operates in a non-directional
mode, is presented in figure 56.
101
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
NDIR_A
OR
NDIR_B
PU_A
AND 0
NIDR_C 15ms
NDIR_AB OR PU_B
AND 0
15ms
NDIR_BC
PU_C
NDIR_CA AND 0
OR 15ms
PICKUP
AND 0
OR 15ms
BLK
en00000488_ansi.vsd
Results of the directional measurement enter the logic circuits, when the zone operates in direc-
tional (forward or reverse) mode, see figure 57.
102
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
NDIR_A
DIR_A AND
OR PU_ZMPG
NDIR_B AND
DIR_B AND
NDIR_C OR PU_A
AND 0
DIR_C AND 15 ms
NDIR_AB
DIR_AB AND OR PU_B
AND 0
15 ms
NDIR_BC
DIR_BC AND
OR PU_C
NDIR_CA AND 0
AND 15 ms
DIR_CA
OR PU_ZMPP
AND
BLK
OR PICKUP
AND 0
15 ms
en05000778_ansi.vsd
Figure 57: Composition of pickup signals in directional operating mode
Tripping conditions for the distance protection zone one are symbolically presented in figure 58.
103
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
Timer tPP=Enable
AND 0-tPP
PUZMPP 0
OR
Timer tPG=Enable
AND 0-tPG
PUZMPG 0
TRIP
BLKTR AND 0
15 ms
TR_A
PU_A AND
TR_B
PU_B AND
TR_C
PU_C AND
en00000490_ansi.vsd
Figure 58: Tripping logic for the distance protection zone one
ZM01-
ZMQPDIS_21
I3P TRIP
V3P TR_A
BLOCK TR_B
LOVBZ TR_C
BLKTR PICKUP
PHSEL PU_A
DIRCND PU_B
PU_C
PHPUND
en06000256_ansi.vsd
104
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
ZD01-
ZDRDIR
I3P STDIR
V3P
en05000681_ansi.vsd
Table 61: Output signals for the ZMQPDIS_21 (ZM01-) function block
Signal Description
TRIP General Trip, issued from any phase or loop
TR_A Trip signal from phase A
TR_B Trip signal from phase B
TR_C Trip signal from phase C
PICKUP General Pickup, issued from any phase or loop
PU_A Pickup signal from phase A
PU_B Pickup signal from phase B
PU_C Pickup signal from phase C
PHPUND Non-directional pickup, issued from any selected phase or loop
Table 62: Input signals for the ZDRDIR (ZD01-) function block
Signal Description
I3P Group connection
V3P Group connection
105
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
Table 63: Output signals for the ZDRDIR (ZD01-) function block
Signal Description
STDIR All output signals binary coded
106
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
Table 65: Parameter group settings for the ZDRDIR (ZD01-) function
Parameter Range Step Default Unit Description
AngNegRes 90 - 175 1 115 Deg Angle to blinder in sec-
ond quadrant for forward
direction measured
counter clockwise
AngDir 5 - 45 1 15 Deg Angle to blinder in fourth
quadrant for forward
direction measured
clockwise
IMinOp 1 - 99999 1 10 %IB Minimum operate cur-
rent in % of IBase
IBase 1 - 99999 1 3000 A Base Current
VBase 0.05 - 2000.00 0.05 400.00 kV Base Voltage
107
Distance measuring zones, quadrilateral Chapter 5
characteristic (PDIS, 21) Impedance protection
108
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
2.1 Introduction
The line distance protection is a five zone full scheme protection with three fault loops for phase
to phase faults and three fault loops for phase to ground fault for each of the independent zones.
Individual settings for each zone resistive and reactive reach gives flexibility for use on overhead
lines and cables of different types and lengths.
The function has a functionality for load encroachment which increases the possibility to detect
high resistive faults on heavily loaded lines.
The independent measurement of impedance for each fault loop together with a sensitive and
reliable built in phase selection makes the function suitable in applications with single phase au-
to-reclosing.
Built-in adaptive load compensation algorithm for the quadrilateral function prevents overreach-
ing of zone1 at load exporting end at phase to ground faults on heavily loaded power lines.
The distance protection zones can operate, independent of each other, in directional (forward or
reverse) or non-directional mode. This makes them suitable, together with different communi-
cation schemes, for the protection of power lines and cables in complex network configurations,
such as parallel lines, multi-terminal lines etc.
Figure 61 presents an outline of the different measuring loops for the basic five, imped-
ance-measuring zones.
109
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
en05000458_ansi.vsd
Figure 61: The different measuring loops at line-ground fault and phase-phase fault.
The use of full scheme technique gives faster operation time compared to switched schemes
which mostly uses a pickup of an overreaching element to select correct voltages and current
depending on fault type. Each distance protection zone performs like one independent distance
protection relay with six measuring elements.
The distance measuring zone will essentially operate according to the non-directional imped-
ance characteristics presented in figure 62 and figure 63. The phase-to-ground characteristic is
illustrated with the full loop reach while the phase-to-phase characteristic presents the per-phase
reach.
110
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
X (Ohm/loop)
XX00PE
PG−−
X 1XRVPE
1RVPG
XNRV ==
XNRV
33
XX0 PE −X
0 PG −1XFWPE
1FWPG
XNFW==
XNFW
X1FWPG+XNFW 3 3
ϕN ϕN
R (Ohm/loop)
RFRVG RFFWPG
X1RVPG+XNRV
Figure 62: Characteristic for the phase-to-ground measuring loops, ohm/loop domain.
111
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
X (Ohm/phase)
ϕ ϕ
R (Ohm/phase)
RFRVPP RFFWPP
2 2
X1RVPP
The fault loop reach with respect to each fault type may also be presented as in figure 64. Note
in particular the difference in definition regarding the (fault) resistive reach for phase-to-phase
faults and three-phase faults.
112
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
Ip R1 + j X1
Phase-to-ground
VA
element
Phase-to-ground
fault in phase A RFPG
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
IA R1 + j X1 Phase-to-phase
VA element A-B
Phase-to-phase
fault in phase A-B RFPP
IB
VB (Arc resistance)
R1 + j X1
IA R1 + j X1 0.5·RFPP Phase-to-phase
VA element A-C
Three-phase
fault
IC
VC
R1 + j X1 0.5·RFPP
en05000181_ansi.vsd
where:
n designates anyone of the three phases (1, 2 or 3) and
m represents the phase that is leading phase n with 120 degrees (i.e. 3, 1 or 2).
The R1 and jX1 in figure 64 represents the positive sequence impedance from the measuring
point to the fault location. The RFPG and RFPP is the eventual fault resistance in the fault place.
113
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
Regarding the illustration of three-phase fault in figure 64, there is of course fault current flow-
ing also in the third phase during a three-phase fault. The illustration merely reflects the loop
measurement, which is made phase-to-phase.
The zone may be set to operate in Non-directional, Forward or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in figure 65. It may be
convenient to once again mention that the impedance reach is symmetric, forward and reverse
direction. Therefore, all reach settings apply to both directions.
X X X
R R R
en05000182.vsd
The phase-to-ground loop AG (BG or CG) is blocked if IA (IB or IC) < IMinPUPG.
For zone 1 with load compensation feature the additional criterion applies, that all
phase-to-ground loops will be blocked when IN < IMinOpIR, regardless of the phase currents.
IA (IB or IC) is the RMS value of the current in phase IA (IB or IC). IN is the RMS value of the
vector sum of the three phase currents, i.e. residual current 3I0.
The phase-to-phase loop AB (BC or CA) is blocked if IAB (BC or CA)< IMinPUPP.
Note!
All three current limits IMinPUPG, IminOpIR and IMinPUPP are automatically reduced to 75%
of regular set values if the zone is set to operate in reverse direction, i.e. OperationDir=Reverse.
114
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
VA - VB
Zapp =
IA - IB
(Equation 11)
Here V and I represent the corresponding voltage and current phasors in the respective phase.
The return compensation applies in a conventional manner to ph-g faults (example for a phase
A to ground fault) according to equation 12.
V_A
Z app =
I _ A + IN ⋅ KN
(Equation 12)
Where:
V_A, I_A and are the phase voltage, phase current and residual current present to the IED
IN
KN is defined as:
X0 - X1
KN =
3X1
where X0 and X1 is zero and positive sequence reactance from the measuring point to
the fault on the protected line.
Here IN is a phasor of the residual current at the relay point. This results in the same reach along
the line for all types of faults.
The apparent impedance is considered as an impedance loop with resistance R and reactance X.
The formula given in equation 12 is only valid for no loaded radial feeder applications. When
load is considered in the case of single line to ground fault, conventional distance protection
might overreach at exporting end and underreach at importing end. REx670 has an adaptive load
compensation which increases the security in such applications.
Measuring elements receive current and voltage information from the A/D converter. The check
sums are calculated and compared, and the information is distributed into memory locations. For
each of the six supervised fault loops, sampled values of voltage (V), current (I), and changes in
current between samples (ΔI) are brought from the input memory and fed to a recursive Fourier
filter.
115
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
The filter provides two orthogonal values for each input. These values are related to the loop im-
pedance according to equation 13,
X Δi
V = R⋅ i + ⋅
ω 0 Δt
(Equation 13)
X Δ Re (I )
Re (V ) = R ⋅ Re (I ) + ⋅
ω0 Δt
(Equation 14)
X Δ Im (I )
Im (V ) = R ⋅ Im (I ) + ⋅
ω0 Δt
(Equation 15)
with
ω0 = 2 ⋅ π ⋅ f 0
(Equation 16)
where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency
The algorithm calculates Rm measured resistance from the equation for the real value of the volt-
age and substitute it in the equation for the imaginary part. The equation for the Xm measured
reactance can then be solved. The final result is equal to:
116
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
The calculated Rm and Xm values are updated each sample and compared with the set zone reach.
The adaptive tripping counter counts the number of permissive tripping results. This effectively
removes any influence of errors introduced by the capacitive voltage transformers or by other
factors.
The directional evaluations are performed simultaneously in both forward and reverse direc-
tions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence
memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults
close to the relay point.
The polarizing voltage is a memorized positive sequence voltage. The memory is continuously
synchronized via a positive sequence filter. The memory is starting to run freely instantaneously
when a voltage change is detected in any phase. A non-directional impedance measurement is
used to detect a fault and identify the faulty phase or phases.
At a three phase fault when no positive sequence voltage remains (all three phases are discon-
nected) the memory is used for direction polarization during 100 ms.
The memory predicts the phase of the positive sequence voltage with the pre-fault frequency.
This extrapolation is made with a high accuracy and it is not the accuracy of the memory that
limits the time the memory can be used. The network is at a three phase fault under way to a new
equilibrium and the post-fault condition can only be predicted accurately for a limited time from
the pre-fault condition.
In case of a three phase fault after 100 ms the phase of the memorized voltage can not be relied
upon and the directional measurement has to be blocked. The achieved direction criteria are
sealed-in when the directional measurement is blocked and kept until the impedance fault crite-
ria is reset (the direction is stored until the fault is cleared).
This memory control allows in the time domain unlimited correct directional measurement for
all unsymmetrical faults also at voltage reversal. Only at three phase fault within the range of
the set impedance reach of the criteria for control of the polarization voltage the memory has to
be used and the measurement is limited to 100 ms and thereafter the direction is sealed-in. The
special impedance measurement to control the polarization voltage is set separately and has only
to cover (with some margin) the impedance to fault that can cause the voltage reversal.
117
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
The evaluation of the directionality takes place in the function block ZDS. Equation 19 and
equation 20 are used to classify that the fault is in forward direction for line-to-ground fault and
phase-phase fault.
V 1AM
− AngDir < a n g < AngNeg Re s
IA
(Equation 19)
V 1ABM
− AngDir < a n g < AngNeg Re s
I AB
(Equation 20)
where:
AngDir is the setting for the lower boundary of the forward directional characteristic, by default
set to 15 (= -15 degrees) and
AngNegRes is the setting for the upper boundary of the forward directional characteristic, by default
set to 115 degrees, see figure 66.
V1AM is positive sequence memorized phase voltage in phase A
IA is phase current in phase A
V1ABM is memorized voltage difference between phase A and B (B lagging A)
IAB is current difference between phase A and B (B lagging A)
The setting of AngDir and AngNegRes is by default set to 15 (= -15) and 115 degrees respective-
ly.(see figure 66) and it should not be changed unless system studies have shown the necessity.
The ZDS gives a binary coded signal on the output STDIR depending on the evaluation where
FWD_A=1 adds 1, REV_A=1 adds 2, FWD_B=1 adds 4 etc.
118
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
AngNegRes
AngDir
R
en05000722_ansi.vsd
Figure 66: Setting angles for discrimination of forward and reverse fault
Phase-to-ground related signals are designated by AG, BG and CG. The phase-to-phase signals
are designated by AB, BC and CA.
Fulfillment of two different measuring conditions is necessary to obtain the one logical signal
for each separate measuring loop:
The PHSEL input signal represents a connection of six different integer values from the phase
selection function within the IED, which are converted within the zone measuring function into
corresponding boolean expressions for each condition separately. It is connected to the PHS
function block output STCDZ.
119
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
The internal input signal DIRCND is used to give condition for directionality for the distance
measuring zones. The signal contains binary coded information for both forward and reverse di-
rection. The zone measurement function filter out the relevant signals on the STDIR input de-
pending on the setting of the parameter OperationDir. It shall be configured to the STDIR output
on the ZDS block.
PUZMPP
OR
PHSEL
NDIR_AB
AB AND
NDIR_BC
BC AND
NDIR_CA
CA AND
NDIR_A
AG AND
NDIR_B
BG AND
NDIR_C
CG AND
OR STNDPE
OR
LOVBZ PHPUND
OR AND
BLOCK
BLK
99000557_ansi.vsd
Figure 67: Conditioning by a group functional input signal PHSEL
Composition of the phase pickup signals for a case, when the zone operates in a non-directional
mode, is presented in figure 68.
120
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
NDIR_A
OR
NDIR_B
PU_A
AND 0
NIDR_C 15ms
NDIR_AB OR PU_B
AND 0
15ms
NDIR_BC
PU_C
NDIR_CA AND 0
OR 15ms
PICKUP
AND 0
OR 15ms
BLK
en00000488_ansi.vsd
Results of the directional measurement enter the logic circuits, when the zone operates in direc-
tional (forward or reverse) mode, see figure 69.
121
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
NDIR_A
DIR_A AND
OR PU_ZMPG
NDIR_B AND
DIR_B AND
NDIR_C OR PU_A
AND 0
DIR_C AND 15 ms
NDIR_AB
DIR_AB AND OR PU_B
AND 0
15 ms
NDIR_BC
DIR_BC AND
OR PU_C
NDIR_CA AND 0
AND 15 ms
DIR_CA
OR PU_ZMPP
AND
BLK
OR PICKUP
AND 0
15 ms
en05000778_ansi.vsd
Figure 69: Composition of pickup signals in directional operating mode
Tripping conditions for the distance protection zone one are symbolically presented in figure 70.
122
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
Timer tPP=Enable
AND 0-tPP
PUZMPP 0
OR
Timer tPG=Enable
AND 0-tPG
PUZMPG 0
TRIP
BLKTR AND 0
15 ms
TR_A
PU_A AND
TR_B
PU_B AND
TR_C
PU_C AND
en00000490_ansi.vsd
Figure 70: Tripping logic for the distance protection zone one
ZMC1-
ZMCPDIS_21
I3P TRIP
V3P TR_A
BLOCK TR_B
LOVBZ TR_C
BLKTR PICKUP
PHSEL PU_A
DIRCND PU_B
PU_C
PHPUND
en07000036_ansi.vsd
123
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
ZDS1-
ZDSRDIR
I3P PUFW
V3P PUREV
STDIRCND
en07000035_ansi.vsd
Table 68: Output signals for the ZMCPDIS_21 (ZMC1-) function block
Signal Description
TRIP General Trip, issued from any phase or loop
TR_A Trip signal from phase A
TR_B Trip signal from phase B
TR_C Trip signal from phase C
PICKUP General Pickup, issued from any phase or loop
PU_A Pickup signal from phase A
PU_B Pickup signal from phase B
PU_C Pickup signal from phase C
PHPUND Non-directional pickup, issued from any selected phase or loop
Table 69: Input signals for the ZDSRDIR (ZDS1-) function block
Signal Description
I3P Group connection for current
V3P Group connection for voltage
124
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
Table 70: Output signals for the ZDSRDIR (ZDS1-) function block
Signal Description
PUFW Pickup in forward direction
PUREV Pickup in reverse direction
STDIRCND Binary coded directional information per measuring loop
125
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
126
Distance protection zones, quadrilateral Chapter 5
characteristic for Impedance protection
series compensated lines (PDIS)
127
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
3.1 Introduction
The numerical mho line distance protection is a five zone full scheme protection for detection
of short circuit and earth faults. The full scheme technique provides protection of power lines
with high sensitivity and low requirement on remote end communication. The five zones have
fully independent measuring and settings which gives high flexibility for all types of lines.
The modern technical solution offers fast operating time down to 3/4 cycles.
The IED can be used up to the highest voltage levels. It is suitable for the protection of heavily
loaded lines and multi-terminal lines where the requirement for tripping is one, two-, and/or
three pole.
The independent measurement of impedance for each fault loop together with a sensitive and
reliable built in phase selection makes the function suitable in applications with single phase au-
to-reclosing.
128
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
jX
Operation area
en07000117.vsd
The distance protection zones can operate, independent of each other, in directional (forward or
reverse) or non-directional mode. This makes them suitable, together with different communi-
cation schemes, for the protection of power lines and cables in complex network configurations,
such as parallel lines, multi-terminal lines etc.
The possibility to use the phase-to-earth quadrilateral impedance characteristic together with the
mho characteristic increases the possibility to overcome eventual lack of sensitivity of the mho
element due to the shaping of the curve at remote end faults.
The integrated control and monitoring functions offers effective solutions for operating and
monitoring all types of transmission and sub transmission lines.
The use of full scheme technique gives faster operation time compare to switched schemes
which mostly uses a phase selector element to select correct voltages and current depending on
fault type. So each distance protection zone performs like one independent distance protection
relay with six measuring elements.
129
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
jX X
Mho, zone4
Mho, zone3
Zs=0
Mho, zone2
R
Mho, zone1
Zs=Z1
Zs=2Z1
en06000400.vsd
Figure 74: Mho, offset Mho characteristic and the source impedance influence on the Mho
characteristic
The mho characteristic has a dynamic expansion due to the source impedance. Instead of cross-
ing the origin as for the offset mho in the left figure 74, which is only valid where the source
impedance is zero, the crossing point is moved to the coordinates of the negative source imped-
ance given an expansion of the circle shown in the right figure 74.
The polarisation quantities used for the mho circle is 100% memorized positive sequence volt-
ages. This will give a somewhat less dynamic expansion of the mho circle during faults. How-
ever, if the source impedance is high, the dynamic expansion of the mho circle might lower the
security of the function too much with high loading and mild power swing conditions.
The mho distance element has a load encroachment function which cut off a section of the char-
acteristic when enabled. The function is enabled by setting the setting parameter LoadEnchMode
to On. Enabling of the load encroachment function increases the possibility to detect high resis-
tive faults without interfering with the load impedance. The algorithm for the load encroachment
is located in the PHSM function, where also the relevant settings can be found. Information
about the load encroachment from the PHS to the zone measurement is given in binary format
to the input signal LDCND.
Each zone can also be set to Non-directional, Forward or Reverse by setting the parameter
DirMode .
The operation for phase to ground and phase to phase fault can be individually switched On and
Off by the setting parameter OpModePG and OpModePP.
130
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
For critical applications such as for lines with high SIRs as well as CVTs, it is possible to im-
prove the security by setting the parameter ReachMode to Underreach. In this mode the reach
for faults close to the zone reach is reduced by 20% and the filtering is also introduced to in-
crease the accuracy in the measuring. If the ReachMode is set to Overreach no reduction of the
reach is introduced and no extra filtering introduced. The latter setting is recommended for over-
reaching pilot zone, zone 2 or zone 3 elements and reverse zone where overreaching on tran-
sients is not a major issue either because of less likelihood of overreach with higher settings or
the fact that these elements do not initiate tripping unconditionally.
The offset mho characteristic can be set in Non-directional, Forward or Reverse by the setting
parameter OffsetMhoDir. When Forward or Reverse is selected a directional line is introduced.
Information about the directional line is given from the directional element and given to the mea-
suring element as binary coded signal to the input DIRCND.
The zone reach for phase to ground fault and phase to phase fault is set individually in polar co-
ordinates. The impedance is set by the parameters ZPG and ZPP and the corresponding angles
by the parameters ZAngPG and ZAngPP.
Compensation for ground return path for faults involving ground is done by setting the parame-
ter KNMag and KNAng where KNMag is the magnitude of the ground return path and KNAng is
the difference of angles between KNMag and ZPG. KNMag and KNAng are defined according
to equation 21 and equation 22.
Z0-Z1
KNMag =
3 ⋅ Z1
(Equation 21)
⎛ Z 0 − Z1 ⎞
KNAng = ( ZAngPG ) − ang ⎜ ⎟
⎝ 3 ⋅ Z1 ⎠
(Equation 22)
Where:
Z0 is the complex zero sequence impedance of the line in ohm/phase
Z1 is the complex positive sequence impedance of the line in ohm/phase
ZAngP line angle of the positive line impedance
G
The phase-to-ground and phase-to-phase measuring loops can be time delayed individually by
setting the parameter tPG and tPP respectively. To release the time delay, the operation mode
for the timers, OpModetPG and OpModetPP, has to be set to On. This is also the case for instan-
taneous operation.
131
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
The activation of signal BLKZ can either be by external fuse failure function or from the loss of
voltage check in the Mho supervision logic (ZSMGAPC). In both cases the output BLKZ in the
Mho supervision logic shall be connected to the input BLKZ in the Mho distance function block
(ZMHODIS 21).
The input signal BLKZMTD is activated during some ms after fault has been detected by the
Mho supervision logic to avoid unwanted operations due to transients. It shall be connected to
the BLKZMTD output signal at the Mho supervision function.
At SIR values >10, the use of electronic CVT might cause overreach due to the built in resonance
circuit in the CVT which reduce the secondary voltage for a while. The input BLKHSIR shall
be connected to the output signal HSIR on the Mho supervision logic for increasing of the fil-
tering and high SIR values. This is valid only when permissive underreach scheme is selected
by setting ReachMode=Underreach.
Phase-to-phase fault
Mho
The plain Mho circle has the characteristic as figure 75The condition for deriving the angle β is
according to equation 23.
132
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
where:
the voltage vector difference between phases A and B
V AB
the current vector difference between phases A and B
I AB
ZPP the positive sequence impedance setting for phase to phase fault
Vpol is the polarizing voltage
The polarized voltage consists of 100% memorized positive sequence voltage (VAB for phase
A to B fault). The memorized voltage will prevent collapse of the Mho circle for close in faults.
IAB·X
Vcomp=VAB - IAB ⋅ ZPP
I AB ⋅ ZPP
ß
V pol
V AB
IAB·R
en07000109_ansi.vsd
Figure 75: Simplified mho characteristic and vectordiagram for phase A to B fault.
133
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
Offset Mho
The characteristic for offset mho is a circle where two points on the circle are the setting param-
eters ZPP and ZRevPP. The vector ZPP in the impedance plane has the settable angle AngZPP
and the angle for ZRevPP is AngZPP+180°.
The condition for operation at phase to phase fault is that the angle β between the two compen-
sated voltages Vcomp1 and Vcomp2 is greater or equal to 90° figure 76. The angle will be 90°
for fault location on the boundary of the circle.
⎛ V -IAB ⋅ ZPP ⎞
β = arg ⎜ ⎟
⎝ V -(-IAB ⋅ ZRevPP) ⎠
(Equation 24)
where:
= is the VAB voltage
V
ZRevPP = is the positive sequence impedance setting for phase to phase fault in reverse direction
134
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
IABjX
V ·
Vcomp2 = V =IF·ZF =VAB
IABR
- I AB • Z Re vPP
en07000110_ansi.vsd
Figure 76: Simplified offset mho characteristic and voltage vectors for phase A to B fault.
and
135
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
where
ArgDir is the setting parameter for directional line in fourth quadrant
ArgNegRes is the setting parameter for directional line in second quadrant
β is calculated according to equation 24
The directional information is brought to the mho distance measurement from the mho direc-
tional element as binary coded information to the input DIRCND. See chapter Mho directional
element for information about the mho directionalety element.
IABjX
ZPP
VAB
ArgNegRes f
IAB
ArgDir
en07000111_ansi
Figure 77: Simplified offset mho characteristic in forward direction for phase A to B fault.
136
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
and
The β is derived according to equation 24 for the mho circle and ϕ is the angle between the volt-
age and current.
ZPP
ArgNegRes
IAB
ArgDir R
VAB
ZRevPP
en06000469_ansi.eps
Phase-to-ground fault
Mho
The measuring of ground faults uses ground return compensation applied in a conventional way.
The compensation voltage is derived by considering the influence from the ground return path.
For a ground fault in phase L1A, we can derive the compensation voltage Vcomp see figure 79
as
137
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
where
Vpol is the polarizing voltage (memorized VA for Phase A to ground fault)
Zloop is the loop impedance, which in general terms can be expressed as
(
Z1+ZN = Z 1 ⋅ 1 + KN )
where
Z1 positive sequence impedance of the line (Ohm/phase)
KN zero sequence compensator factor
The angle β between the Vcomp and the polarize voltage Vpol for a A to ground fault is
( )
β = arg ⎡ V A − I A + IN ⋅ KN ⋅ ZPE ⎤ − arg(Vp
⎣ ⎦ (Equation 30)
where:
VA = phase voltage in faulty phase A
IA = phase current in faulty phase A
IN = zero sequence current in faulty phase A (3I0)
Z0-Z1
= the setting parameter for the zero swquence compensation consisting of the magni-
KN 3 ⋅ Z1 tude KN and the angle KNAng.
Vpol = 100% of positive sequence memorized voltage VA
It is to be noted that the angle KNAng is the difference angle between the positive sequence im-
pedance ZPE and the impedance ZN for the ground return path see figure 79
138
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
IA·X KNAng
IA·ZN
V comp
I A • Z loop
IA·ZPE
Vpol
f
IA (Ref) IA·R
en06000472_ansi.vsd
Figure 79: Simplified offset mho characteristic and vectordiagram for phase A to ground
fault.
Operation occurs if
90 ≤ β ≤ 270
(Equation 31)
Offset Mho
The characteristic for offset mho at ground fault is a circle containing the two vectors from the
origin ZPE and ZRevPE where ZPE and ZrevPE are the settting reach for the positive sequence
impedance in forward respective reverse direction. The vector ZPE in the impedance plane has
the settable angle AngZPE and the angle for ZRevPP is AngZPE+180°
The condition for operation at phase to ground fault is that the angle β between the two compen-
sated voltages Vcomp1 and Vcomp2 is greater or equal to 90° see 80. The angle will be 90° for
fault location on the boundary of the circle.
139
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
where
is the phase A phase voltage
VA
IAB•jX
V comp1 = VA - I A • ZPE
IA • ZPE
VA
V comp2 = VA - (-IA • ZRevPE)
I AB • R
- IA • Z RevPe
en 06000465_ansi. vsd
Figure 80: Simplified offset mho characteristic and voltage vector for phase A to B fault.
Operation occurs if
90 ≤ β ≤ 270
(Equation 33)
140
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
where
ArgDir is the setting parameter for directional line in fourth quadrant
ArgNegRes is the setting parameter for directional line in second quadrant.
β is calculated according to equation 32
IA jX
VA
ArgNegRes f
IA IA·R
ArgDir
en 06000466_ansi.vsd
Figure 81: Simplified characteristic for offset mho in forward direction for A to ground fault.
The conditions for operation of offset Mho in reverse direction for A to ground fault will be
90<β<270 and 180°-Argdir<ϕ<ArgNegRes+180°.
The β is derived according to equation 32 for the offset Mho circle and ϕ is the angle between
the voltage and current.
141
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
ZPE
ArgNegRes
IL1
ArgDir R
UL1
ZRevPE
en06000470.eps
142
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
ZPE
ArgNegRes
IA
ArgDir R
VA
ZRevPE
en06000470_ansi.eps
Figure 82: Simplified characteristic for offset Mho in reverse direction for A to ground fault.
ZMH1-
ZMHPDIS_21
I3P TRIP
V3P TR_A
CURR_INP TR_B
VOLT_INP TR_C
POL_VOLT TRPE
BLOCK TRPP
BLKZ PICKUP
BLKZMTD PU_A
BLKHSIR PU_B
BLKTRIP PU_C
BLKPG PHG_FLT
BLKPP PHPH_FLT
DIRCND
PHSEL
LDCND
en06000423_ansi.vsd
143
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
Table 74: Output signals for the ZMHPDIS_21 (ZMH1-) function block
Signal Description
TRIP Trip General
TR_A Trip phase A
TR_B Trip phase B
TR_C Trip phase C
TRPE Trip phase-to-ground
TRPP Trip phase-to-phase
PICKUP Pickup General
PU_A Pickup phase A
PU_B Pickup phase B
PU_C Pickup phase C
PHG_FLT Pickup phase-to-ground
PHPH_FLT Pickup phase-to-phase
144
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
145
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
Table 76: Advanced parameter group settings for the ZMHPDIS_21 (ZMH1-) function
Parameter Range Step Default Unit Description
OffsetMhoDir Non-directional - Non-directional - Direction mode for offset
Forward mho
Reverse
OpModetPG Disabled - ON - Operation mode Disable/
ON Enable of Zone timer,
Ph-G
OpModetPP Disabled - ON - Operation mode Off / On
ON of Zone timer, Ph-ph
Table 77: Basic parameter group settings for the ZSMGAPC (ZSM1-) function
Parameter Range Step Default Unit Description
IBase 1 - 99999 1 3000 A Base value for current
measurement
VBase 0.05 - 2000.00 0.05 400.00 kV Base value for voltage
measurement
PilotMode Disabled - Off - Pilot mode Off/On
Enabled
Zreach 0.1 - 3000.0 0.1 38.0 ohm Line impedance
IMinOp 10 - 30 1 20 %IB Minimum operating cur-
rent for SIR measure-
ment
146
Full-scheme distance measuring, Mho Chapter 5
characteristic, PDIS 21 Impedance protection
Table 78: Advanced parameter group settings for the ZSMGAPC (ZSM1-) function
Parameter Range Step Default Unit Description
DeltaI 0 - 200 1 10 %IB Current change level in
%IB for fault inception
detection
Delta3I0 0 - 200 1 10 %IB Zero seq current change
level in % of IB
DeltaU 0 - 100 1 5 %VB Voltage change level in
%UB for fault inception
detection
Delta3U0 0 - 100 1 5 %VB Zero seq voltage change
level in % of UB
SIRLevel 5 - 15 1 10 - Settable level for source
impedance ratio
147
Mho impedance supervision logic Chapter 5
Impedance protection
4.1 Introduction
The Mho impedance supervision logic includes features for fault inception detection and high
SIR detection. It also includes the functionality for loss of potential logic as well as for the pilot
channel blocking scheme.
The Mho Impedance Supervision logic can mainly be decomposed in two different parts:
The fault inception detection detects instantaneous changes in any phase currents or zero se-
quence current in combination with a change in the corresponding phase voltage or zero se-
quence voltage. If the change of any phase current and corresponding phase voltage or 3U0 and
3I0 exceeds the setting parameters DeltaI and DeltaU respectively Delta3U0 and Delta3I0 and
the input signal BLOCK is not activated, the ouput signal FLTDET is activated indicating that
a system fault has occoured.
If the setting pilotMode is set to On in Blocking scheme and the fault inception function has de-
tected a system fault, a block signal BLKCHST will be issued and send to remote end in order
to block the overreaching zones. Different criteria has to be fulfilled for sending the BLKCHST
signal:
OR
If it is later detected that it was an internal fault that made the function issue the BLKCHST sig-
nal, the function will issue a CHSTOP signal to unblock the remote end. The criteria that have
to be fulfilled for this are:
1. The function has to be in pilot mode, i.e. the setting parameter pilotMode has to
be set to On
2. The carrier send signal should be blocked, i.e. input signal BLOCKCS is On and,
148
Mho impedance supervision logic Chapter 5
Impedance protection
3. A reverse fault should not have been detected while the carrier send signal was
not blocked, i.e.input signals REVSTART and BLOCKCS is not activated.
The function has a built in loss of voltage detection based on the evaluation of the change in
phase voltage or the change in zero sequence voltage (3U0). It operates if the change in phase
voltages exceeds the setting dULevel or 3U0 exceeds the setting dU0Level.
If loss of voltage is detected, but not a fault inception, the distance protection function will be
blocked. This is also the case if a fuse failure is detected by the external fuse failure function and
activate the input FUSEFAIL. Those blocks are generated by activating the output BLKZ, which
shall be connected to the input BLKZ on the distance Mho function block.
During fault inception a lot of transients will be developed which in turn might cause the dis-
tance function to overreach. The Mho supervision logic will increase the filtering during the
most transient period of the fault. This is done by activating the output BLKZMD, which shall
be connected to the input BLKZMTD on mho distance function block.
The SIR function calculates the SIR value as the source impedance divided by the setting Zreach
and activates the output signal HSIR if the calculated value for any of the six basic shunt faults
exceed the setting parameter SIRLevel.The HSIR signal is intended to block the delta based mho
impedance function.
ZSM1-
ZSMGAPC
I3P BLKZMTD
U3P BLKCHST
BLOCK CHSTOP
REVSTART HSIR
BLOCKCS
CBOPEN
en06000426.vsd
ZSM1-
ZSMGAPC
I3P BLKZMTD
V3P BLKCHST
BLOCK CHSTOP
REVSTART HSIR
BLOCKCS
CBOPEN
en06000426_ansi.vsd
149
Mho impedance supervision logic Chapter 5
Impedance protection
Table 81: Output signals for the ZSMGAPC (ZSM1-) function block
Signal Description
BLKZMTD Block signal for blocking of time domained mho
BLKCHST Blocking signal to remote end to block overreaching zone
CHSTOP Stops the blocking signal to remote end
HSIR Indication of source impedance ratio above set limit
150
Mho impedance supervision logic Chapter 5
Impedance protection
Table 83: Advanced parameter group settings for the ZSMGAPC (ZSM1-) function
Parameter Range Step Default Unit Description
DeltaI 0 - 200 1 10 %IB Current change level in
%IB for fault inception
detection
Delta3I0 0 - 200 1 10 %IB Zero seq current change
level in % of IB
DeltaV 0 - 100 1 5 %UB Voltage change level in
%VB for fault inception
detection
Delta3V0 0 - 100 1 5 %UB Zero seq voltage change
level in % of VB
SIRLevel 5 - 15 1 10 - Settable level for source
impedance ratio
151
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
5.1 Introduction
The operation of transmission networks today is in many cases close to the stability limit. Due
to environmental considerations the rate of expansion and reinforcement of the power system is
reduced e.g. difficulties to get permission to build new power lines. The ability to accurately and
reliable classify the different types of fault so that single pole tripping and auto-reclosing can be
used plays an important roll in this matter. The phase selection function is designed to accurately
select the proper fault loop in the distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may make fault resis-
tance coverage difficult to achieve. Therefore the function has a built in algorithm for load en-
croachment, which gives the possibility to enlarge the resistive setting of both the phase
selection and the measuring zones without interfering with the load.
The extensive output signals from the phase selection gives also important information about
faulty phase(s) which can be used for fault analysis.
The difference, compared to the zone measuring elements, is in the combination of the measur-
ing quantities (currents and voltages) for different types of faults.
The characteristic is basically non-directional, but the PHS function uses information from the
directional function block to discriminate whether the fault is in forward or reverse. The direc-
tional lines are drawn as "line-dot-dot-line" in the figures below.
1. Residual current criteria, i.e. separation of faults with and without ground con-
nection
2. Regular quadrilateral impedance characteristic
152
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
3. Load encroachment characteristics is always active but can be switched off by se-
lecting a high setting.
X X X
60°
60° R
R R
60° 60°
en05000668_ansi.vsd
Figure 85: Characteristic for non-directional, forward and reverse operation of PHS
The setting of the load encroachment function may influence the total operating characteristic,
(for more information, refer to section 5.2.4 "Load encroachment").
The input DIRCND contains binary coded information about the directional coming from the
directionality block. It shall be connected to the STDIR output on the ZD block. This informa-
tion is also transferred to the input DIRCND on the distance measuring zones, i.e. the ZM block.
The code built up for the directionality is as follows:
STDIR=FWD_A*1+FWD_B*4+FWD_C*16+FWD_AB*64+FWD_BC*256+FWD_CA*102
4+REV_A*2+REV_B*8+REV_C*32+REV_AB*128+REV_BC*512+REV_CA*2048
153
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
If the binary information is 1 then it will be considered that we have pickup in forward direction
in phase A. If the binary code is 5 then we have pickup in forward direction in phase A and B etc.
The PHSEL (Z or I) output contains, in a similar way as DIRCND, binary coded information, in
this case information about the condition for opening correct fault loop in the distance measuring
element. It shall be connected to the PHSEL input on the ZM blocks. The code built up for re-
lease of the measuring fault loops is as follows:
PHSEL = AG*1+BG*2+CG*4+AB*8+BC*16+CA*32
VA( B , C )
ZPHSn =
IA( B , C )
(Equation 34)
where:
n corresponds to the particular phase (n=1, 2 or 3)
The characteristic for the PHS function at phase to ground fault is according to figure 86. The
characteristic has a fixed angle for the resistive boundary in the first quadrant of 60°.
The resistance RN and reactance XN is the impedance in the ground return path defined accord-
ing to equation 35 and equation 36.
R0 − R1
RN =
3
(Equation 35)
X 0 − X1
XN =
3
(Equation 36)
154
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
X (ohm/loop)
Kr·(X1+XN)
RFItRevPG RFItFwdPG
X1+XN
60 deg
RFItFwdPG
RFItRevPG R (Ohm/loop)
60 deg
X1+XN
1
Kr =
tan(60 deg)
RFItRevPG RFItFwdPG
Kr·(X1+XN)
en06000396_ansi.vsd
Figure 86: Characteristic of PHS for phase to ground fault (setting parameters in italic),
ohm/loop domain
Besides this, the 3I0 residual current must fulfil the conditions according to equation 37 and
equation 38.
3 ⋅ I 0 ≥ 0.5 ⋅ IM in O p
(Equation 37)
3I 0 Enable _ PG
3 ⋅ I0 ≥ ⋅ Iph max
100
(Equation 38)
where:
IMinOp is the minimum operation current for forward zones,
3I0Enable_PG is the setting for the minimum residual current needed to enable operation in the ph-G
fault loops (in %) and
Iphmax is the maximum phase current in any of three phases.
155
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
Vm − Vn
ZPHS =
−2 ⋅ In
(Equation 39)
X (ohm/phase)
0.5·RFltRevPP 0.5·RFltFwdPP
Kr·X1
X1
0.5·RFltFwdPP
60 deg
R (ohm/phase)
60 deg
0.5·RFltRevPP X1
1
Kr =
tan(60 deg)
Kr·X1
0.5·RFltRevPP 0.5·RFltFwdPP
en05000670_ansi.vsd
Figure 87: The operation characteristic for PHS at phase-to-phase fault (setting parameters
in Italic), ohm/phase domain
In the same way as the condition for phase-to-ground fault, there are current conditions that have
to be fulfilled in order to release the phase-to-phase loop. Those are according to equation 40 or
equation 41.
156
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
3I 0 < 3I 0Enable _ PG
(Equation 40)
3I 0 < 3I 0BLK _ PP
(Equation 41)
where:
3I0Enable_P is 3I0 limit for releasing phase-to-ground measuring loops,
G
3I0BLK_PP is 3I0 limit for blocking phase-to-phase measuring loop and
Iphmax is maximal magnitude of the phase currents.
However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all directions. At the
same time the apparent impedance is rotated 30 degrees, counter-clockwise. The characteristic
is shown in figure 88.
157
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
X (ohm/phase)
4 ⋅ X1
3
90 deg
0.5·RFltFwdPP·K3
X1·K3 4 ⋅ RFltFwdPP
6
R (ohm/phase)
0.5·RFltRevPP·K3
K3 = 2 / sqrt(3)
30 deg
en05000671_ansi.vsd
Figure 88: The characteristic of PHS for three phase fault (setting parameters in italic)
The outline of the characteristic is presented in figure 89. As illustrated, the resistive blinders
are set individually in forward and reverse direction while the angle of the sector is the same in
all four quadrants.
158
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
RLdFwd
LdAngle LdAngle
R
LdAngle LdAngle
RLdRev
en05000196_ansi.vsd
The influence of load encroachment function depending on the operation characteristic is depen-
dent on the chosen operation mode of the PHS function. When selection mode is PHSELZ, the
characteristic for the PHS (and also zone measurement depending on settings) will be reduced
by the load encroachment characteristic (see figure 90, left illustration).
When PHSELI is selected the operation characteristic will be as the right illustration in
figure 90. The reach will in this case be limit by the minimum operation current and the distance
measuring zones.
159
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
X X
R R
PHSELZ PHSELI
en05000197_ansi.vsd
Figure 90: Difference in operating characteristic depending on operation mode when load
encroachment is activated
When the "phase selection" is set to operate together with a distance measuring zone the result-
ant operate characteristic could look something like in figure 91. The figure shows a distance
measuring zone operating in forward direction. Thus, the operate area is highlighted in black.
160
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
"Phase selection"
"quadrilateral" zone
Load encroachment
characteristic
Directional line
en05000673.vsd
Figure 91: Operation characteristic in forward direction when load encroachment is enabled
161
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
X (ohm/phase)
Phase selection
”Quadrilateral” zone
R (ohm/phase)
en05000674.vsd
Figure 92: Operation characteristic for PHS in forward direction for three-phase fault,
ohm/phase domain
The phase-to-ground loop n is blocked if In<IMinPUPG, where In is the RMS value of the cur-
rent in phase n (A or B or C).
162
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
IA ≥ IMinOpPG IRELPG
& 0 STPG
AND
15ms
3I0 ≥ 3I0Enable_PG/100 ⋅ Iphmax
Bool to AND
PHSELI
BLOCK integer
en05000249_ansi.vsd
Figure 93: Phase-to-phase and phase-to-ground operating conditions (residual current crite-
ria)
A special attention is paid to correct phase selection at evolving faults. A PHSEL output signal
is created as a combination of the load encroachment characteristic and current criteria, refer to
figure 93. This signal can be configured to STCND functional input signals of the distance pro-
tection zone and this way influence the operation of the ph-ph and ph-G zone measuring ele-
ments and their phase related pickup and tripping signals.
163
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
INDIR_A
INDIR_B
INDIR_C
PHSEL_G
OR 0
15ms
IRELPG
AND
ZMA PHSEL_A
OR 0
15ms
AND
ZMB
PHSEL_B
OR 0
AND 15ms
ZMC
ZMAB PHSEL_C
AND OR 0
15ms
ZMBC3
AND INDIR_AB
INDIR_BC
ZMCA
AND
INDIR_CA
IRELPP
en00000545_ansi.vsd
Composition of the directional (forward and reverse) phase selective signals is presented sche-
matically in figure 96 and figure 95. The directional criteria appears as a condition for the cor-
rect phase selection in order to secure a high phase selectivity for simultaneous and evolving
faults on lines within the complex network configurations. Signals DFWLn and DFWLnLm
present the corresponding directional signals for measuring loops with phases Ln and Lm. Des-
ignation FW (figure 96) represents the forward direction as well as the designation RV
(figure 95) represents the reverse direction. All directional signals are derived within the corre-
sponding digital signal processor.
164
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
INDIR_A
AND
DRV_A
INDIR_AB
REV_A
AND OR 0
DRV_AB 15ms
INDIR_CA
AND
DRV_CA
REV_G
INDIR_B OR 0
15ms
AND
DRV_B
INDIR_AB
REV_B
AND OR 0
15ms
INDIR_BC INDIR_A
AND INDIR_B
DRV_BC
INDIR_C Bool to PHSELZ
INDIR_C INDIR_AB integer
AND INDIR_BC
DRV_C INDIR_CA
INDIR_BC
REV_C
AND OR 0
15ms
INDIR_CA
AND
en00000546_ansi.vsd
Figure 95: Composition of phase selection signals for reverse direction
165
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
AND
INDIR_A
AND STFW1PH
DFW_A AND OR 15ms 0
0 15ms
INDIR_AB
STFWL1
AND OR 0
DFW_AB 15ms
INDIR_CA
AND
AND
DFW_CA
0
STFWPE
INDIR_B OR
15ms
AND
DFW_B
AND
INDIR_AB 0
STFWL2
15ms
AND OR
INDIR_BC STFW2PH
AND OR 15ms 0
0 15ms
AND
DFW_BC
INDIR_C
AND AND
DFW_C STFWL3
0
INDIR_BC 15ms
AND OR
INDIR_CA STFW3PH
AND 0
15ms
AND
en05000201_ansi.vsd
Figure 96: Composition of phase selection signals for forward direction
166
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
PHS1-
FDPSPDIS_21
I3P TRIP
V3P RI
BLOCK FWD_A
DIRCND FWD_B
FWD_C
FWD_G
REV_A
REV_B
REV_C
REV_G
NDIR_A
NDIR_B
NDIR_C
NDIR_G
FWD_1PH
FWD_2PH
FWD_3PH
PHG_FLT
PHPH_FLT
PHSELZ
PHSELI
en06000258_ansi.vsd
Table 85: Output signals for the FDPSPDIS_21 (PHS--) function block
Signal Description
FWD_A Fault detected in phaseA - forward direction
FWD_B Fault detected in phase B - forward direction
FWD_C Fault detected in phase C - forward direction
FWD_G Ground fault detected in forward direction
REV_A Fault detected in phase A- reverse direction
REV_B Fault detected in phase B - reverse direction
REV_C Fault detected in phase C - reverse direction
REV_G Ground fault detected in reverse direction
NDIR_A Non directional fault detected in Phase A
NDIR_B Non directional fault detected in Phase B
167
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
Signal Description
NDIR_C Non directional fault detected in Phase C
NDIR_G Non directional phase-to-ground fault detected
FWD_1PH Single phase-to-ground fault in forward direction
FWD_2PH Phase-to-phase fault in forward direction
FWD_3PH Three phase fault in forward direction
PHG_FLT Release condition to enable phase-ground measuring elements
PHPH_FLT Release condition to enable phase-phase measuring elements
PHSELZ Composite data containing faulted phase loop selections based
on impedance loop measurement, current measurement and
load emcrochment for input to distance protection PHSELCT
PHSELI Composite data containing faulted phase loop selections based
on current measurement and load emcrochment for input to dis-
tance protection PHSELCT
168
Phase selection with load encroachment Chapter 5
(PDIS, 21) Impedance protection
169
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
6.1 Introduction
The line distance protection is a five zone protection with three fault loops for phase to ground
fault for each of the independent zones. Individual settings for each zone resistive and reactive
reach gives flexibility for use on overhead lines and cables of different types and lengths.
The function has a functionality for load encroachment which increases the possibility to detect
high resistive faults on heavily loaded lines.
The independent measurement of impedance for each fault loop together with a sensitive and
reliable built in phase selection makes the function suitable in applications with single phase au-
to-reclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load exporting
end at phase to ground faults on heavily loaded power lines.
The distance protection zones can operate, independent of each other, in directional (forward or
reverse) or non-directional mode. This makes them suitable, together with different communi-
cation schemes, for the protection of power lines and cables in complex network configurations,
such as parallel lines, multi-terminal lines etc.
Figure 98 presents an outline of the different measuring loops for the basic five, imped-
ance-measuring zones l.
170
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
en07000080_ansi.vsd
Figure 98: The different measuring loops at line-ground fault and phase-phase fault.
The distance measuring zone will essentially operate according to the non-directional imped-
ance characteristics presented in figure 99. The characteristic is illustrated with the full loop
reach.
171
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
X0 − X1
Xn =
3
X1+Xn R0 − R1
Rn =
3
f N f N
R (Ohm/loop)
RFPG RFPG
X1+Xn
en05000661_ansi.vsd
Figure 99: Characteristic for the phase-to-ground measuring loops, ohm/loop domain.
IA R1 + j X1
Phase-to-ground
VA
element
Phase-to-ground
fault in phase A RFPG
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 ) en06000412_ansi.vsd
172
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
The R1 and jX1 in figure 100 represents the positive sequence impedance from the measuring
point to the fault location. The RFPG is presented in order to “convey” the fault resistance reach.
The zone may be set to operate in Non-directional, Forward or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in figure 101. It may be
convenient to once again mention that the impedance reach is symmetric, in the sense that it is
conform for forward and reverse direction. Therefore, all reach settings apply to both directions.
X X X
R R R
en05000182.vsd
The phase-to-ground loop AG (BG or CG) is blocked if IA (IB or IC) < IMinPUPG.
For zone 1 with load compensation feature the additional criterion applies, that all
phase-to-ground loops will be blocked when IN < IMinOpIR, regardless of the phase currents.
IA (IB or IC) is the RMS value of the current in phase IA (IB or IC). IN is the RMS value of the
vector sum of the three phase currents, i.e. residual current 3I0.
Note!
Both current limits IMinPUPG and IMinOpIR are automatically reduced to 75% of regular set
values if the zone is set to operate in reverse direction, i.e. OperationDir=Reverse.
173
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
Here V and I represent the corresponding voltage and current phasors in the respective phase A,
B or C.
VA
Z app =
IA + I N ⋅ KN
(Equation 42)
Where:
VA, IA and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:
X0 - X1
KN =
3X1
where X0 and X1 is zero and positive sequence reactance from the measuring point to
the fault on the protected line.
Here IN is a phasor of the residual current in relay point. This results in the same reach along the
line for all types of faults.
The apparent impedance is considered as an impedance loop with resistance R and reactance X.
The formula given in equation 42 is only valid for no loaded radial feeder applications. When
load is considered in the case of single line to ground fault, conventional distance protection
might overreach at exporting end and underreach at importing end. REx670 has an adaptive load
compensation which increases the security in such applications.
Measuring elements receive current and voltage information from the A/D converter. The check
sums are calculated and compared, and the information is distributed into memory locations. For
each of the six supervised fault loops, sampled values of voltage (V), current (I), and changes in
current between samples (ΔI) are brought from the input memory and fed to a recursive Fourier
filter.
The filter provides two orthogonal values for each input. These values are related to the loop im-
pedance according to equation 43,
X Δi
V = R⋅ i + ⋅
ω 0 Δt
(Equation 43)
174
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
X Δ Re (I )
Re (V ) = R ⋅ Re (I ) + ⋅
ω0 Δt
(Equation 44)
X Δ Im (I )
Im (V ) = R ⋅ Im (I ) + ⋅
ω0 Δt
(Equation 45)
with
ω0 = 2 ⋅ π ⋅ f 0
(Equation 46)
where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency
The algorithm calculates Rm measured resistance from the equation for the real value of the volt-
age and substitute it in the equation for the imaginary part. The equation for the Xm measured
reactance can then be solved. The final result is equal to:
The calculated Rm and Xm values are updated each sample and compared with the set zone reach.
The adaptive tripping counter counts the number of permissive tripping results. This effectively
removes any influence of errors introduced by the capacitive voltage transformers or by other
factors.
175
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
The directional evaluations are performed simultaneously in both forward and reverse direc-
tions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence
memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults
close to the relay point.
0.85 ⋅ V 1A + 0.15 ⋅ V 1 AM
− AngDir < Ang < AngNeg Re s
IA
(Equation 49)
where:
AngDir is the setting for the lower boundary of the forward directional characteristic, by default
set to 15 (= -15 degrees) and
AngNegRes is the setting for the upper boundary of the forward directional characteristic, by default
set to 115 degrees, see figure 102.
V1A is positive sequence phase voltage in phase A
V1AM is positive sequence memorized phase voltage in phase A
IA is phase current in phase A
The setting of AngDir and AngNegRes is by default set to 15 (= -15) and 115 degrees respective-
ly (see figure 102) and it should not be changed unless system studies have shown the necessity.
The ZDM gives a binary coded signal on the output STDIRCND depending on the evaluation
where FWD_A=1 adds 1, REV_A=1 adds 2, FWD_B=1 adds 4 etc.
176
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
AngNegRes
AngDir
R
en05000722_ansi.vsd
Figure 102: Setting angles for discrimination of forward and reverse fault
The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the
set base voltage VBase. So the directional element can use it for all unsymmetrical faults includ-
ing close-in faults.
For close-in three-phase faults, the V1AM memory voltage, based on the same positive sequence
voltage, ensures correct directional discrimination.
The memory voltage is used for 100 ms or until the positive sequence voltage is restored.
• If the current is still above the set value of the minimum operating current
(between 10 and 30% of the set terminal rated current IBase), the condition seals
in.
- If the fault has caused tripping, the trip endures.
- If the fault was detected in the reverse direction, the measuring element in
the reverse direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets
until the positive sequence voltage exceeds 10% of its rated value.
177
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
Fulfillment of two different measuring conditions is necessary to obtain the one logical signal
for each separate measuring loop:
The PHSEL input signal represents a connection of six different integer values from the phase
selection function within the IED, which are converted within the zone measuring function into
corresponding boolean expressions for each condition separately. It is connected to the PHS
function block output STCNDZ.
The input signal DIRCND is used to give condition for directionality for the distance measuring
zones. The signal contains binary coded information for both forward and reverse direction. The
zone measurement function filter out the relevant signals on the DIRCND input depending on
the setting of the parameter OperationDir. It shall be configured to the DIRCND output on the
ZDM block.
PHSEL
AND NDIR_A
AG
AND NDIR_B
BG
NDIR_C
CG AND
OR NDIR_G
OR
LOVBZ PHPUND
OR AND
BLOCK
BLK
en06000408_ansi.vsd
Figure 103: Conditioning by a group functional input signal PHSEL
Composition of the phase pickup signals for a case, when the zone operates in a non-directional
mode, is presented in figure 104.
178
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
NDIR_A PU_A
AND 0
15 ms
NDIR_B
PU_B
AND 0
15 ms
NDIR_C PU_C
AND 0
15 ms
AND 0 PICKUP
OR 15 ms
BLK
en06000409_ansi.vsd
Results of the directional measurement enter the logic circuits, when the zone operates in direc-
tional (forward or reverse) mode, see figure 105.
NDIR_A
DIR_A AND
OR PU_2MPG
NDIR_B &
DIR_B AND
NDIR_C PU_A
& 0
DIR_C AND 15 ms
0
PU_B
&
15 ms
PU_C
& 0
15 ms
BLK
OR 0
PICKUP
&
15 ms
en07000081_ansi.vsd
Figure 105: Composition of pickup signals in directional operating mode
Tripping conditions for the distance protection zone one are symbolically presented in figure
106.
179
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
Timer tPG=Enable
AND 0-tPG
PUZMPG 0
TRIP
BLKTR AND 0
15 ms
TR_A
PU_A AND
TR_B
PU_B AND
TR_C
PU_C AND
en07000082_ansi.vsd
Figure 106: Tripping logic for the distance protection zone one
ZMM1-
ZMMPDIS_21
I3P TRIP
V3P TR_A
BLOCK TR_B
BLKZ TR_C
BLKTR PICKUP
PHSEL PU_A
DIRCND PU_B
PU_C
PHPUND
en06000454_ansi.vsd
180
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
Signal Description
BLOCK Block of function
BLKZ Blocks all output for LOV (or fuse failure) condition
BLKTR Blocks all trip outputs
PHSEL Faulted phase loop selection enable from phase selector
DIRCND External directional condition
Table 89: Output signals for the ZMMPDIS_21 (ZMM1-) function block
Signal Description
TRIP General Trip, issued from any phase or loop
TR_A Trip signal from phase A
TR_B Trip signal from phase B
TR_C Trip signal from phase C
PICKUP General Pickup, issued from any phase or loop
PU_A Pickup signal from phase A
PU_B Pickup signal from phase B
PU_C Pickup signal from phase C
PHPUND Non-directional pickup, issued from any selected phase or loop
181
Full scheme distance protection, quadrilateral Chapter 5
for Mho Impedance protection
182
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
7.1 Introduction
The operation of transmission networks today is in many cases close to the stability limit. Due
to environmental considerations the rate of expansion and reinforcement of the power system is
reduced e.g. difficulties to get permission to build new power lines. The ability to accurate and
reliable classifying the different types of fault so that single pole tripping and auto-reclosing can
be used plays an important roll in this matter. The phase selection function is design to accurate
select the proper fault loop in the distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may in some cases in-
terfere with the distance protection zone reach and cause unwanted operation. Therefore the
function has a built in algorithm for load encroachment, which gives the possibility to enlarge
the resistive setting of the measuring zones without interfering with the load.
The output signals from the phase selection function produce important information about faulty
phase(s) which can be used for fault analysis as well.
The function can be de-activated and activated by setting the parameter Operation Off/On The
total function can be blocked by activating the input BLOCK.
183
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
The aim of the delta based phase selector is to provide very fast and reliable phase selection for
releasing of tripping from the high speed Mho element and as well as is essential to Directional
Comparison Blocking scheme (DCB), which uses Power Line Carrier (PLC) communication
system across the protected line.
The current and voltage samples for each phase passes through a notch filter that filters out the
fundamental components. Under steady state load conditions or when no fault is present, the out-
put of the filter is zero or close to zero. When a fault occurs, currents and voltages change result-
ing in sudden changes in the current and voltages resulting in non-fundamental waveforms being
introduced on the line. At this point the notch filter produces significant non-zero output. The
filter output is processed by the delta function. The algorithm uses an adaptive relationship be-
tween phases to determine if a fault has occurred, and determines the faulty phases.
The current and voltage delta phase selector gives a real output signal if the following criteria is
fulfilled (only phase A shown):
Max(ΔVA,ΔVB,ΔVC)>DeltaVMinOp
Max(ΔIA,ΔIB,ΔIC)>DeltaIMinOp
where:
ΔVA, ΔVB and ΔVC are the voltage change between sample t and sample t-1
DeltaVMinOp and DeltaIMinOp are the minimum harmonic level settings for the voltage and current fil-
ters to decide that a fault has occured indeed. A slow evolving fault may
not produce sufficient harmonics to detect the fault; however, in such a
case speed is no longer the issue and the sequence components phase
selector will operate.
The delta voltages ΔVA(B,C) and delta current ΔIA(B,C) are the voltage and current between
sample t and sample t-1.
The delta phase selector employs adaptive techniques to determine the fault type. The logic de-
termines the fault type by summing up all phase values and dividing by the largest value. Both
voltages and currents are filtered out and evaluated. The condition for fault type classification
for the voltage and currents can be expressed as
184
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
The output signal is 1 for single line to ground fault, 2 for phase to phase fault and 3 for three
phase fault. At this point the filer does not know if ground was involved or not.
Typically there are induced harmonics in the non-faulted lines that will affect the result. This
method allows for a significant tolerance in the evaluation of FaultType over its entire range.
When a single fault has been detected, the logic determines the largest quantity, and asserts that
phase. If phase to phase fault is detected, the two largest phase quantities will be detected and
asserted as outputs.
The faults detected by the delta based phase selector are coordinated in a separate block. Differ-
ent phases of faults may be detected at slightly different times due to differences in the angles
of incidence of fault on the waveshape. The output is forcet to wait a certain time. If the timer
expires, if no other fault detection on the other phases is not detected, the fault is deemed as
phase-to-ground. This way a premature single phase to ground fault detection is not released for
a phase-phase fault. If, however, ground current is detected before the timer expires, the phase
to ground fault is released sooner.
If another phase picks up during the delay, the wait time is reduced by a certain amount. Each
detection of either ground or additional phases further reduce the initial wait time and allow the
delta phase selector output to be asserted sooner. There is not wait time, if for example, all three
phases are faulty.
The delta function is released if the input DELTAREL is activated at the same time as input
DELTABLK is not activated. Activating the DELTABLK input will block the delta function.
The release signal has an internal pulse timer of 100 ms. When the DELTAREL signal has dis-
appeared the delta logic is reset. In order not to get too abrupt change, the reset is decayed in
pre-defined steps.
185
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
The complementary based zero sequence current function evaluates the presence of ground fault
by calculating the 3I0 and comparing the result with the setting parameter INtoMaxI. The output
signal is used to release the ground fault loop. It is a complement to the ground fault signal
built-in in the sequence based phase selector. The condition for releasing the phase to ground
loop are as follows:
|3I0|>maxIph · INto Im ax ·
where:
|3I0| is the magnitude of the zero sequence current 3I0
maxIph is the maximum magnitude of the phase currents
INtoImax is a setting parameter for the relation between the magnitude of 3I0 and the maxi-
mum phase current
The ground fault loop is also released if the evaluation of the zero sequence current by the main
sequence function meets the following conditions:
|3I0|>IMinOp · k1
|3I0|>maxIph · INRelPG
where:
IMinOp is the settings of the minimum operate phase current
INRelPG is the setting of 3I0 limit for release of phase-to-ground measuring loop in % of IBase
k1 is a design parameter
IBase is the setting of the base current (A)
186
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
In systems where the source impedance for zero sequence is high the change of zero sequence
current may not be secure. In those cases the sequence based phase selector will automatically
change from evaluation of zero sequence current to evaluation of zero and negative sequence
voltage. So the release of ground fault loop can also be done if the following conditions are ful-
filled:
|3V0|>V2*k2
|3V0|>V1*k3
|V1|>k
and
3I0<IMinOp*k5
OR
3I0<ILmax · INRelPG
where:
3V0 is the magnitude of the zero sequence voltage
V2 is the magnitude of the negative sequence voltage at the relay measuring point of
phase A
k2, k3, k4 and k5 are design parameters
ILmax is the maximal phase current
IMinOp is the setting of minimum operate phase current in % of IBase
187
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
60°
UL3
L3-L1 sector
UL2 0°
180° L2-L3 sector U1L1 (Ref)
L1-L2 sector
UL1
300°
en06000383.vsd
The phase to phase loop for the faulty phases will be determined if the angle between the se-
quence voltages V2 and V1 lies within the sector defined according to figure 108 and the fol-
lowing conditions are fulfilled:
|V2|>V2MinOp
|V1|>V1MinOP
where:
V1MinOP and V2MinOp are the setting parameters for positive sequence and negative sequence mini-
mum operate voltage
If there is a three phase fault, there will not be any release of the individual phase signals, even
if the general conditions for V2 and V1 are fulfilled.
The first condition determines faulty phase at single line to ground fault by determine the angle
between V2 and I0.
188
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
80°
BG sector CG sector
V2A
(Ref)
200°
AG sector
320°
en06000384_ansi.vsd
The angle is calculated in a directional function block and gives the angle in radians as input to
the V2I0 function block. The input angle is released only if the fault is in forward direction. This
is done by the directional element. The fault is classified as forward direction if the angle be-
tween V0 and I0 lies between 20 to 200 degrees see figure 110.
Forward 20°
200° Reverse
en06000385.vsd
Figure 110: Directional element used to release the measured angle between V2 and I0
The input radians are summarized with an offset angle and the result evaluated. If the angle is
within the boundaries for a specific sector, the phase indication for that sector will be active see
figure 109. Only one sector signal is allowed to be activated at the same time.
189
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
The sector function for condition1 has an internal release signal which is active if the main se-
quence function has classified the angle between V0 and I0 as valid. The following conditions
must be fulfilled for activating the release signals:
|V2|>V2MinOp
|3I0|>IMinOp · 0.5
|3I0|>ILmax · INRelPG
where:
V2 and IN are the magnitude of the negative sequence voltage and zero sequence current (3I0)
V2MinOp is the setting parameter for minimum operate negative sequence voltage
IMinOp is the setting parameter for minimum operate phase current
The angle difference is phase shifted by 180 degrees if the fault is in reverse direction.
The condition2 looks at the angle relationship between the negative sequence voltage V2 and
the positive sequence voltage V1. Since this is a phase to phase voltage relationship, there is no
need for shifting phases if the fault is in reverse direction. A phase shift is introduced so that the
fault sectors will have the same angle boarders as for condition1. If the calculated angle between
V2 and V1 lies within one sector, the corresponding phase for that sector will be activated. The
condition2 is released if both the following conditions are fulfilled:
· |V2|>U2MinOp
· |V1|>U1MinOP
where:
|U1| and |U2| are the magnitude of the positive and negative sequence voltage
V1MinOP and are the setting parameter for positive sequence and negative sequence mini-
U2MinOpV2MinOP mum operate voltage.
190
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
140°
CG sector
20°
V1A
(Ref)
AG sector
BG sector
260° en06000413_ansi.vsd
If both conditions are true and there is sector match, the fault is deemed as single phase to
ground. If the sectors, however, do not match the fault is determined to be the complement of
the second condition, i.e. a phase to phase to ground fault.
E.g.
Condition 1 Condition 2 Fault type
CG CG CG
BG AG BCG
The sequence phase selector is blocked when groundis not involved or if a three phase fault is
detected.
|V1|>V1Level
|I1|>I1Level
or
|I1|>IMaxLoad
where:
V1 and I1 are the positive sequence voltage and current magnitude
V1Level and I1Level are the setting of limits for positive sequence voltage and current
191
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
The output signal for detection of three phase fault is only released if not ground fault and phase
to phase fault in the main sequence function is detected.
The conditions for not detecting ground fault are the inverse of equation 5 to10.
The condition for not detecting phase to phase faults is determined by three conditions. Each of
them gives condition for not detecting phase to phase fault. Those are:
Condition1:
ground fault is detected
or
|IN|>IMinOP*k2
and
|IN|>ILmax*INRelPG
Condition2:
Condition2 for phase to ground and phase to phase faults are not fulfilled
and
ILmax<IMinOp
and
|I2|<ILmax*I2ILmax
Condition3:
|IN|>maxIL*3I0BLK_PP
or
|I2|<maxIL*I2maxIL
where:
ILmax is the maximum of the phase currents IA, IB and IC
INRelPG is the setting parameter for 3I0 limit for release of phase to groundfault loops
|I2| is the magnitude of the negative sequence current
I2ILmax is the setting parameter for the relation between negative sequence current to the maximum
phase current in percent of IBase
3I0BLK_P is the setting parameter for 3I0 limit for blocking phase to phase measuring loops
P
192
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
a a>b FaultPriority
DeltaIA then c=a c Adaptive release
b else c=a dependent on result
from Delta logic
DeltaVA
Sequence based
function a<b
a
AB fault
then c=b c
OR b else c=a OR
AG fault
3 Phase fault
PU_A
IA Valid &
BLOCK
en06000386_ansi.vsd
The outline of the characteristic is presented in figure 113. As illustrated, the resistive reach are
set individually in forward and reverse direction while the angle of the sector is the same in all
four quadrants. The reach for the phase selector will be reduced by the load encroachment func-
tion, see right figure 113.
193
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
X jX
RLd
LdAngle LdAngle
R
LdAngle LdAngle R
RLd
Operation area
en06000414_ansi.vsd
Figure 113: Influence on the characteristic by load encroachment logic.
Outputs
The output of the sequence components based phase selector and the delta logic phase selector
activates the output signal(s) STL1, STL2 and STL3PU_A, PU_B and PU_C. If the phase to
ground loop have been released, then the signal STE will be activated as well.
The phase selector also gives binary coded signals that are connected to the zone measuring el-
ement for opening the correct measuring loop(s). This is done by the signal PHSEL. If only one
phase is enable (A, B or C), the corresponding phase to ground element is enabled as well. Earth
is expected to be made available for two and three phase faults for the correct output to be as-
serted. The fault loop is indicated by one of the decimal numbers below:
0= no faulted phases
1= AG
2= BG
3= CG
4= -ABG
5= -BCG
6= -L3L1N-CAG
7= -ABCG
8= -AB
9= -BC
10= -CA
11= ABC
194
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
An additional logic is applied to handle the cases when phase to groundoutputs are to be asserted
when the ground input G is not asserted.
The output signal STCNDPLE is activated when the load encroachment is operating. STCND-
PLE shall be connected to the input STCND for selected quadrilateral impedance measuring
zones (ZM0x) to be blocked. The signal STCNDLE shall be connected to the input LDCND for
selected Mho impedans measuring zones (ZMMx)
Note!
The load encroachment at the measuring zone must be activated to release the blocking from the
load encroachment function.
PHM-
FMPSPDIS
I3P PU_A
V3P PU_B
BLOCK PU_C
ZSTART PHG_FLT
TR3PH PHSCND
1POLEAR PLECND
DLECND
PICKUP
en06000429_ansi.vsd
195
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
Table 93: Output signals for the FMPSPDIS (PHM-) function block
Signal Description
PU_A Fault detected in phase A
PU_B Fault detected in phase B
PU_C Fault detected in phase C
PHG_FLT Ground fault detected
PHSCND Binary coded starts from phase selection
PLECND Binary coded starts from ph sel with load encroachment
DLECND Binary coded starts from load encroachment only
PICKUP Indicates that something has picked up
Table 95: Advanced parameter group settings for the FMPSPDIS (PHM-) function
Parameter Range Step Default Unit Description
DeltaIMinOp 5 - 100 1 10 %IB Delta current level in % of
IBase
DeltaVMinOp 5 - 100 1 20 %UB Delta voltage level in %
of UBase
V1Level 5 - 100 1 80 %UB Pos seq voltage limit for
identification of 3-ph fault
196
Faulty phase identification with load Chapter 5
enchroachment (PDIS, 21) Impedance protection
197
Directional impedance Mho (RDIR) Chapter 5
Impedance protection
8.1 Introduction
The phase-to-ground impedance elements can be optionally supervised by a phase unselective
directional function (phase unselective, because it is based on symmetrical components).
0.85 ⋅ V 1A + 0.15 ⋅ V 1 AM
− AngDir < Ang < AngNeg Re s
IA
(Equation 52)
198
Directional impedance Mho (RDIR) Chapter 5
Impedance protection
Where:
AngDir Setting for the lower boundary of the forward directional characteristic, by default set to
15 (= -15 degrees)
AngNegRes Setting for the upper boundary of the forward directional characteristic, by default set to
115 degrees, see figure 115
V1A Positive sequence phase voltage in phase A
V1AM Positive sequence memorized phase voltage in phase A
IA Phase current in phase A
V1AB Voltage difference between phase A and B (B lagging A)
V1ABM Memorized voltage difference between phase A and B (B lagging A)
IAB Current difference between phase A and B (B lagging A)
The default settings for AngDir and AngNegRes are 15 (= -15) and 115 degrees respectively (see
figure 115) and they should not be changed unless system studies show the necessity.
The directional lines are computed by means of a comparator-type calculation, meaning that the
directional lines are based on mho-circles (of infinite radius).
X
Zset reach point
AngNegRes
-AngDir R
-Zs
en06000416_ansi.vsd
The reverse directional characteristic is equal to the forward characteristic rotated by 180 de-
grees.
The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the
set base voltage VBase. So the directional element can use it for all unsymmetrical faults includ-
ing close-in faults.
199
Directional impedance Mho (RDIR) Chapter 5
Impedance protection
For close-in three-phase faults, the V1AM memory voltage, based on the same positive se-
quence voltage, ensures correct directional discrimination.
The memory voltage is used for 100ms or until the positive sequence voltage is restored. After
100ms, the following occurs:
• If the current is still above the set value of the minimum operating current the
condition seals in.
- If the fault has caused tripping, the trip endures.
- If the fault was detected in the reverse direction, the measuring element in
the reverse direction remains in operation.
• If the current decreases below the minimum operating value, no directional indi-
cations will be given until the positive sequence voltage exceeds 10% of its rated
value.
The directional function block ZDM has the following output signals:
The STDIRCND output provides an integer signal that depends on the evaluation and is derived
from a binary coded signal as follows:
The PUFW output is a logical signal with value 1 or 0. It is made up as an OR-function of all the
forward starting conditions, i.e. FWD_A, FWD_B, FWD_C, FWD_AB, FWD_BC and
RWD_CA. The PUREV output is similar to the PUFW output, the only difference being that it
is made up as an OR-function of all the reverse starting conditions, i.e. REV_A, REV_B,
REV_C. REV_AB, REV_BC and REV_CA.
Values for the following parameters are calculated, and may be viewed as service values:
• resistance phase A
• reactance phase A
• resistance phase B
• reactance phase B
• resistance phase C
• reactance phase C
• direction phase A
• direction phase B
• direction phase C
200
Directional impedance Mho (RDIR) Chapter 5
Impedance protection
8.2.2 Additional distance protection directional function for ground faults, ZDA
A Mho element needs a polarizing voltage for its operation. The positive-sequence memory-po-
larized elements are generally preferred. The benefits include:
• The greatest amount of expansion for improved resistive coverage. These ele-
ments always expand back to the source.
• Memory action for all fault types. This is very important for close-in 3-phase
faults.
• A common polarizing reference for all six distance-measuring loops. This is im-
portant for single-pole tripping, during a pole-open period.
There are however some situations that can cause security problems like reverse phase to phase
faults and double phase to ground faults during high load periods. To solve these, additional di-
rectional element is used.
For phase to ground faults, directional elements using sequence components are very reliable for
directional discrimination. The directional element can be based on one of following types of
polarization:
• Zero-sequence voltage
• Negative-sequence voltage
• Zero-sequence current
These additional directional criteria are evaluated in the function block ZDA.
Zero-sequence voltage polarization is utilizing the phase relation between the zero-sequence
voltage and the zero-sequence current at the location of the protection. The measurement prin-
ciple is illustrated in figure 116.
- 3V 0
AngleOp
AngleRCA
3I0
en06000417_ansi.vsd
Figure 116: Principle for zero-sequence voltage polarized additional directional element
201
Directional impedance Mho (RDIR) Chapter 5
Impedance protection
Negative-sequence voltage polarization is utilizing the phase relation between the negative-se-
quence voltage and the negative-sequence current at the location of the protection.
Zero-sequence current polarization is utilizing the phase relation between the zero-sequence cur-
rent at the location of the protection and some reference zero-sequence current, for example the
current in the neutral of a power transformer.
Z0 SA I0 I0
Z0 Line Z0SB
Characteristic
angle
V0 V0
K*I0
V0 + K*I0
IF
en06000418_ansi.vsd
Note that the sequence based additional directional element cannot give per phase information
about direction to fault. This is why it is an AND-function with the normal directional element
that works on a per phase base. The release signals are per phase and to have a release of a mea-
suring element in a specific phase both the additional directional element, and the normal direc-
tional element, for that phase must indicate correct direction.
Normal
directional Release of distance
element measuring element
A, B, C A, B, C
AND
Additional
directional AND per
element phase
en06000419_ansi.vsd
202
Directional impedance Mho (RDIR) Chapter 5
Impedance protection
ZDM1-
ZDMRDIR
I3P DIR_CURR
V3P DIR_VOLT
DIR_POL
PUFW
PUREV
STDIRCND
en06000422_ansi.vsd
ZDA1-
ZDARDIR
I3P FWD_G
V3P REV_G
I3PPOL DIREFCND
DIRCND
en06000425_ansi.vsd
Table 98: Output signals for the ZDMRDIR (ZDM1-) function block
Signal Description
DIR_CURR Group connection
DIR_VOLT Group connection
DIR_POL Group connection
PUFW Pickup in forward direction
PUREV Pickup in reverse direction
STDIRCND Binary coded directional information per measuring loop
203
Directional impedance Mho (RDIR) Chapter 5
Impedance protection
Table 99: Input signals for the ZDARDIR (ZDA1-) function block
Signal Description
I3P Current signals
V3P Voltage signals
I3PPOL Polarisation current signals
DIRCND Binary coded directional signal
Table 100: Output signals for the ZDARDIR (ZDA1-) function block
Signal Description
FWD_G Forward start signal from phase-to-ground directional element
REV_G Reverse start signal from phase-to-ground directional element
DIREFCND Pickuo direction Binary coded
204
Directional impedance Mho (RDIR) Chapter 5
Impedance protection
Table 102: Basic parameter group settings for the ZDARDIR (ZDA1-) function
Parameter Range Step Default Unit Description
IBase 1 - 99999 1 3000 A Base setting for current
values
VBase 0.05 - 2000.00 0.05 400.00 kV Base setting for voltage
level in kV
PolMode -3U0 - -3U0 - Polarization quantity for
-V2 opt dir function for P-G
IPol faults
Dual
-3U0Comp
-V2comp
AngleRCA -90 - 90 1 75 Deg Characteristic relay angle
(= MTA or base angle)
IPickup 1 - 200 1 5 %IB Minimum operation cur-
rent in % of IBase
VPolPU 1 - 100 1 1 %VB Minimum polarizing volt-
age in % of VBase
IPolPU 5 - 100 1 10 %IB Minimum polarizing cur-
rent in % of IBase
Table 103: Advanced parameter group settings for the ZDARDIR (ZDA1-) function
Parameter Range Step Default Unit Description
AngleOp 90 - 180 1 160 Deg Operation sector angle
Kmag 0.50 - 3000.00 0.01 40.00 ohm Boost-factor in -V0comp
and -V2comp polarization
205
Phase preference logic Chapter 5
Impedance protection
9.1 Introduction
Phase Preference Logic (PPL) is intended to be used in isolated or high impedance grounded net-
works where there is a requirement to trip only one of the faulty lines at cross-country fault.
The phase preference logic inhibits tripping for single-phase-to-ground faults in isolated and
high impedance-grounded networks, where such faults are not to be cleared by distance protec-
tion. For cross-country faults, the logic selects either the leading or the lagging phase-ground
loop for measurement and initiates tripping of the preferred fault based on the selected phase
preference. A number of different phase preference combinations are available for selection.
The function has 10 operation modes which can be set by the parameter Mode. The different
modes and their explanation are shown in table 104 below.
206
Phase preference logic Chapter 5
Impedance protection
The function can be divided into two parts; one labeled Voltage and Current Discrimination and
the second one labeled Phase Preference Evaluation, see figure 121.
The aim with the voltage and current discrimination part is to discriminate faulty phases and to
determine if there is a cross country fault. If cross country fault is detected, an internal signal
“Detected cross country fault” is created and sent to the phase preference part to be used in the
evaluation process for determining the condition for trip.
The voltage discrimination part gives phase segregated pickup signals STVA, STVB or STVC
if the respective measured phase voltage is below the setting parameter PU27PN at the same
time as the zero sequence voltage is above the setting parameter 3V0Pickup, see figure 121.
The internal signal for detection of cross country fault, DetectCrossContry, that come from the
voltage and current discrimination part of the function can be achieved in three different ways:
1. The magnitude of 3I0 has been above the setting parameter IN for a time longer
than the setting of pick-up timer tIN
2. The magnitude of 3I0 has been above the setting parameter IN at the same time
as the magnitude of 3V0 has been above the setting parameter 3V0Pickup during
a time longer than the setting of pick-up timer tVN
3. The magnitude of 3I0 has been above the setting parameter IN at the same time
as one of the following conditions are fulfilled:
• the measured phase-to phase voltage in at least one of the phase combina-
tions has been below the setting parameter PU27PP for more than 20 ms.
• At least one of the phase voltages are below the setting parameter PU27PN
for more than 20 ms
The second part, Phase preference evaluation, uses the internal signal DetectCrossCountry from
the voltage and current evaluation together with the input signal STCND and the information
from the setting parameter OperMode to determine the condition for trip. To release the phase
preference logic at least two out of three phases must be faulty. The fault classification whether
it is a single line to earth or cross country fault and which phase to be tripped at cross country
fault is converted into a binary coded signal and sent to the distance protection measuring zone
to release the correct measuring zone according to the setting of OperMode. This is done by ac-
tivating the output ZREL and it shall be connected to the input STCND on the distance zone
measuring element.
The input signal PHSELC consist of binary information of fault type and is connected to the
Phase selector output STCND. The fault must be activated in at least two phases to be classified
as a cross country fault in the phase preference part of the logic.
The input signals RELLx are additional fault release signals that can be connected to external
protection functions through binary input.
The trip output can be blocked by setting the parameter Blk1PhTr to On.
The output pickup and trip signals can be blocked by activating the input BLOCK
207
Phase preference logic Chapter 5
Impedance protection
V_A
STVA
V_B AND
V_C
V_AB STVB
AND
V_BC
V_CA
IN STVC
Voltage AND
VN
Discrimination
PU27PN OR PICKUP
AND
PU27PP
INPICKUP
Detect Cross-
VNPICKUP Country fault
AND
TR_A
OperatingMode AND
REL_AG TR_B
Phase Preference AND
REL_BG Evaluation
TR_C
REL_CG AND
STNDC
AND
AND OR
AND
AND
Blk1PhTr
BLOCK
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Figure 121: Simplified block diagram for phase preference logic
208
Phase preference logic Chapter 5
Impedance protection
PPL1-
PPLPHIZ
I3P BFI_3P
V3P ZREL
BLOCK
RELAG
RELBG
RELCG
PHSEL
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Table 106: Output signals for the PPLPHIZ (PPL1-) function block
Signal Description
BFI_3P Indicates start for earth fault(s), regardless of direction
ZREL Integer coded output release signal
209
Phase preference logic Chapter 5
Impedance protection
210
Power swing detection (RPSB, 78) Chapter 5
Impedance protection
10.1 Introduction
Power swings may occur after disconnection of heavy loads or trip of big generation plants.
Power swing detection function is used to detect power swings and initiate block of selected dis-
tance protection zones. Occurrence of ground fault currents during a power swing can block the
power swing detection function to allow fault clearance.
Its principle of operation is based on the measurement of the time it takes for a power swing tran-
sient impedance to pass through the impedance area between the outer and the inner character-
istics. Power swings are identified by transition times longer than a transition time set on
corresponding timers. The impedance measuring principle is the same as that used for the dis-
tance protection zones. The impedance and the characteristic passing times are measured in all
three phases separately. One-out-of-three or two-out-of-three operating modes can be selected
according to the specific system operating conditions.
211
Power swing detection (RPSB, 78) Chapter 5
Impedance protection
X1OutFw jX ZL R1LIn
X1InFw ΔFw
ϕ
ΔRv
R1FInRv R1FInFw
ΔFw
LdAngle ϕ
ΔRv LdAngle
ΔFw
ΔFw
R
ΔFw
ΔRv
RLdInRv RLdInFw
ΔFw
ΔRv
RLdOutRv RLdOutFw
ϕ ΔRv X1InRv
X1OutRv
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The impedance measurement within the PSD function is performed by solving equation 54 and
equation 55(Typical equations are for phase A, similar equations are applicable for phases B and
C as well).
⎛VA⎞
Re ⎜ ⎟ ≤ Rset
⎝ IA ⎠
(Equation 54)
⎛V A ⎞
Im ⎜ ⎟ ≤ Xset
⎝ IA ⎠
(Equation 55)
The Rset and Xset are R and X boundaries which are more explained in the following sections.
212
Power swing detection (RPSB, 78) Chapter 5
Impedance protection
where:
kLdRFw is a settable multiplication factor less than 1
The slope of the load encroachment inner and outer boundary is defined by setting the parameter
LdAngle.
The load encroachment in the fourth quadrant uses the same settings as in the first quadrant
(same LdAngle and RLdOutFw and calculated RLdInFw).
The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation to the dis-
tance zones. The angle is the same as the line angle and derived from the setting of the reactive
reach inner boundary X1InFw and the line resistance for the inner boundary R1LIn. The fault
resistance coverage for the inner boundary is set by the parameter R1FInFw.
From the setting parameter RLdOutFw and the calculated value RLdInFw a distance between the
inner and outer boundary, ΔFw, is calculated. This value is valid for R direction in first and
fourth quadrant and for X direction in first and second quadrant.
From the setting parameter RLdOutRv and the calculated value RLdInRv a distance between the
inner and outer boundary, ΔRv, is calculated. This value is valid for R direction in second and
third quadrant and for X direction in third and fourth quadrant.
The inner resistive characteristic in the second quadrant outside the load encroachment part cor-
responds to the setting parameter R1FInRv for the inner boundary. The outer boundary is inter-
nally calculated as the sum of ΔRv+R1FInRv.
213
Power swing detection (RPSB, 78) Chapter 5
Impedance protection
The inner resistive characteristic in the third quadrant outside the load encroachment zone con-
sist of the sum of the settings R1FInRv and the line resistance R1LIn. The angle of the tilted lines
outside the load encroachment is the same as the tilted lines in the first quadrant. The distance
between the inner and outer boundary is the same as for the load encroachment in reverse direc-
tion i.e. ΔRv.
where:
ΔFw = RLdOutFw - KLdRFw · RLdOutFw
The inner characteristic for the reactive reach in reverse direction correspond to the setting pa-
rameter X1InRv for the inner boundary and the outer boundary is defined as X1InRv + ΔRv.
where:
ΔRv = RLdOutRv - KLdRRv · RLdOutRv
• The "1-of-3" operating mode is based on detection of power swing in any of the
three phases. Figure 124 presents a composition of a detection signal
PSD-DET-A in this particular phase.
• The "2-of-3" operating mode is based on detection of power swing in at least two
out of three phases. Figure 125 presents a composition of the detection signals
DET1of3 and DET2of3.
Signals (external boundary) and ZINL1ZIN_A (internal boundary) in figure 124 are related to
the operation of the impedance measuring elements in each phase separately. They are internal
signals, calculated by the PSD-function.
The tP1 timer in figure 124 serve as detection of initial power swings, which are usually not as
fast as the later swings are. The tP2 timer become activated for the detection of the consecutive
swings, if the measured impedance exit the operate area and returns within the time delay, set
on the tW waiting timer. The upper part of figure 124 (input signal ZOUT_A, ZIN_A,
AND-gates and tP-timers etc.) are duplicated for phase B and C. All tP1 and tP2 timers in the
figure have the same settings.
214
Power swing detection (RPSB, 78) Chapter 5
Impedance protection
ZOUTA AND
0-tP1
ZINA 0 OR
-loop
0-tP2
-loop
AND
0
OR PSD-DET-A
AND AND
ZOUTB OR
ZOUTC
PSD -detected 0
0-tW
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PSD-DET-A
PSD-DET-B DET1of3 - int.
OR
PSD-DET-C
AND
DET2of3 - int.
AND OR
AND
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Figure 125: Detection of power-swing for 1-of-3 and 2-of-3 operating mode
215
Power swing detection (RPSB, 78) Chapter 5
Impedance protection
ZOUT_A ZOUT
OR
ZOUT_B ZIN_A
ZIN
ZOUT_C AND ZIN_B OR
ZIN_C
TRSP 0 AND
0-tGF
I0CHECK
AND 10ms
BLK_I0 0 OR
BLK_SS AND 0
0-tH
BLOCK
-loop
DET1of3 - int.
REL1PH
AND
BLK1PH
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Selection of the operating mode is possible by the proper configuration of the functional input
signals REL1PH, BLK1PH, REL2PH, and BLK2PH.
The load encroachment characteristic can be switched off by setting the parameter Operation-
LdCh = Off, but notice that the ΔFw and ΔRv will still be calculated. The characteristic will in
this case be only quadrilateral.
There are four different ways to form the internal INHIBIT signal:
216
Power swing detection (RPSB, 78) Chapter 5
Impedance protection
• Logical 1 on functional input BLOCK inhibits the output PICKUP signal instan-
taneously.
• The INHIBIT internal signal is activated, if the power swing has been detected
and the measured impedance remains within its operate characteristic for the
time, which is longer than the time delay set on tR2 timer. It is possible to disable
this condition by connecting the logical 1 signal to the BLK_SS functional input.
• The INHIBIT internal signal is activated after the time delay, set on tR1 timer, if
an ground fault appears during the power swing (input IOCHECK is high) and
the power swing has been detected before the ground fault (activation of the sig-
nal I0CHECK). It is possible to disable this condition by connecting the logical
1 signal to the BLK_I0 functional input.
• The INHIBIT logical signals becomes logical 1, if the functional input I0CHECK
appears within the time delay, set on tGF timer and the impedance has been seen
within the outer characteristic of the PSD operate characteristic in all three phas-
es. This function prevents the operation of the PSD function in cases, when the
circuit breaker closes onto persistent single-phase fault after single-pole auto-re-
closing dead time, if the initial single-phase fault and single-pole opening of the
circuit breaker causes the power swing in the remaining two phases.
PSD1-
ZMRPSB_78
I3P PICKUP
V3P ZOUT
BLOCK ZIN
BLK_SS
BLK_I0
BLK1PH
REL1PH
BLK2PH
REL2PH
I0CHECK
TRSP
EXT_PSD
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217
Power swing detection (RPSB, 78) Chapter 5
Impedance protection
Signal Description
BLK1PH Block one-out-of-three-phase operating mode
REL1PH Release one-out-of-three-phase operating mode
BLK2PH Block two-out-of-three-phase operating mode
REL2PH Release two-out-of-three-phase operating mode
I0CHECK Residual current (3I0) detection used to inhibit power swing
detection output
TRSP Single-pole tripping command issued by tripping function
EXT_PSD Input for external detection of power swing
Table 109: Output signals for the ZMRPSB_78 (PSD1-) function block
Signal Description
PICKUP Power swing detected
ZOUT Measured impedance within outer impedance boundary
ZIN Measured impedance within inner impedance boundary
218
Power swing detection (RPSB, 78) Chapter 5
Impedance protection
Table 111: Advanced parameter group settings for the ZMRPSB_78 (PSD1-) function
Parameter Range Step Default Unit Description
tP1 0.000 - 60.000 0.001 0.045 s Timer for detection of ini-
tial power swing
tP2 0.000 - 60.000 0.001 0.015 s Timer for detection of
subsequent power
swings
tW 0.000 - 60.000 0.001 0.250 s Waiting timer for activa-
tion of tP2 timer
tH 0.000 - 60.000 0.001 0.500 s Timer for holding power
swing PICKUP output
tR1 0.000 - 60.000 0.001 0.300 s Timer giving delay to
inhibit by the residual cur-
rent
tR2 0.000 - 60.000 0.001 2.000 s Timer giving delay to
inhibit at very slow swing
219
Power swing logic (RPSL, 78) Chapter 5
Impedance protection
11.1 Introduction
Power Swing Logic (RPSL) is a complementary function to Power Swing Detection (PSD) func-
tion. It provides possibility for selective tripping of faults on power lines during system oscilla-
tions (power swings or pole slips), when the distance protection function should normally be
blocked. The complete logic consists of two different parts:
220
Power swing logic (RPSL, 78) Chapter 5
Impedance protection
PUDOG
AR1P1 AND
PUPSD
CS
BLOCK AND 0-tCS AND
0
CSUR
BLKZMUR
AND
0
0-tTrip 0-tBlkTr
0
PLTR_CRD TRIP
OR
CR AND
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Figure 128: Simplified logic diagram – power swing communication and tripping logic
The complete logic remains blocked as long as there is a logical one on the BLOCK functional
input signal. Presence of the logical one on the PUDOG functional input signal also blocks the
logic as long as this block is not released by the logical one on the AR1P1 functional input sig-
nal. The functional output signal BLKZMUR remains logical one as long as the function is not
blocked externally (BLOCK is logical zero) and the ground-fault is detected on protected line
(PUDOG is logical one), which is connected in three-phase mode (AR1P1 is logical zero). Tim-
er tBlkTr prolongs the duration of this blocking condition, if the measured impedance remains
within the operate area of the PSD function (PUPSD input active). The BLKZMUR can be used
to block the operation of the power-swing zones.
Logical one on functional input CSUR, which is normally connected to the TRIP functional out-
put of a power swing carrier sending zone, activates functional output CS, if the function is not
blocked by one of the above conditions. It also activates the TRIP functional output.
Initiation of the CS functional output is possible only, if the PUPSD input has been active longer
than the time delay set on the security timer tCS.
Simultaneous presence of the functional input signals CACC and CR (local trip condition) also
activates the TRIP functional output, if the function is not blocked by one of the above condi-
tions and the PUPSD signal has been present longer then the time delay set on the trip timer
tTrip.
221
Power swing logic (RPSL, 78) Chapter 5
Impedance protection
AND
BLKZMOR
AND
PUZMUR
0-tZL PUZMURPS
BLOCK AND OR
0 AND
PUZMOR
PUZMPSD AND 0-tDZ
0 OR
PUPSD
AND
-loop
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Figure 129: Control of underreaching distance protection (Zone 1) at power swings caused by
the faults and their clearance on adjacent lines and other system elements
The logic is disabled by a logical one on functional inputBLOCK. It can start only if the follow-
ing conditions are simultaneously fulfilled:
• PUPSD functional input signal must be a logical zero. This means, that the PSD
function must not detect power swinging over the protected power line.
• PUZMPSD functional input must be a logical one. This means that the imped-
ance must be detected within the external boundary of the PSD function.
• PUZMOR functional input must be a logical one. This means that the fault must
be detected by the overreaching distance protection zone, for example zone 2.
The PUZMLL functional output, which can be used in complete terminal logic instead of a nor-
mal distance protection zone 1, becomes active under the following conditions:
• If the PUZMUR signal appears at the same time as the PUZMOR or if it appears
with a time delay, which is shorter than the time delay set on timer tDZ.
• If the PUZMUR signal appears after the PUZMOR signal with a time delay long-
er than the delay set on the tDZ timer, and remains active longer than the time
delay set on the tZL timer.
The BLKZMH functional output signal can be used to block the operation of the higher distance
protection zone, if the fault has moved into the zone 1 operate area after tDZ time delay.
222
Power swing logic (RPSL, 78) Chapter 5
Impedance protection
PSL1-
ZMRPSL
BLOCK TRIP
PUZMUR PUZMURPS
PUZMOR BLKZMUR
PUPSD BLKZMOR
PUDOG CS
PUZMPSD
PLTR_CRD
AR1P1
CSUR
CR
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Table 114: Output signals for the ZMRPSL (PSL1-) function block
Signal Description
TRIP Trip through Power Swing Logic
PUZMURPS Pickup of Underreaching zone controlled by PSL to be used in
configuration
BLKZMUR Block trip of underreaching impedance zone
BLKZMOR Block trip of overreaching distance protection zones
CS Carrier send signal controlled by the power swing
223
Power swing logic (RPSL, 78) Chapter 5
Impedance protection
224
Pole Slip protection (PPAM, 78) Chapter 5
Impedance protection
12.1 Introduction
Sudden events in an electrical power system such as large changes in load, fault occurrence or
fault clearance, can cause power oscillations referred to as power swings. In a non-recoverable
situation, the power swings become so severe that the synchronism is lost, a condition referred
to as pole slipping. The main purpose of the pole slip protection is to detect, evaluate, and take
the required action for pole slipping occurrences in the power system. The electrical system parts
swinging to each other can be separated with the line/s closest to the centre of the power swing
allowing the two systems to be stable as separated islands.
The movements in the impedance plain can be seen in figure 131. The transient behaviour is de-
scribed by the transient e.m.f's EA and EB, and by X'd, XT and the transient system impedance
Z S.
225
Pole Slip protection (PPAM, 78) Chapter 5
Impedance protection
Zone 1 Zone 2
EB X’d XT XS EA
REG 670
B A
jX
XS
Pole slip
impedance XT
δ Apparent generator
movement impedance R
X’d
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where:
X'd = transient reactance of the generator
XT = short-circuit reactance of the step-up transformer
ZS = impedance of the power system A
• the minimum current exceeds 0.10 IN (IN is IBase parameter set under general set-
ting).
• the maximum voltage falls below 0.92 UBase
226
Pole Slip protection (PPAM, 78) Chapter 5
Impedance protection
• the voltage Ucos (the voltage in phase with the generator current) has an angular
velocity of 0.2...8 Hz and
• the corresponding direction is not blocked.
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Figure 132: Different generator quantities as function of the angle between the equivalent gen-
erators
An alarm is given when movement of the rotor is detected and the rotor angle exceeds the angle
set for 'WarnAngle'.
When the impedance crosses the slip line between ZB and ZC it counts as being in zone 1 and
between ZC and ZA in zone 2. The entire distance ZA-ZB becomes zone 1 when 'EnableZone1'
is enabled (external device detects the direction of the centre of slipping).
After the first slip, the signals 'Zone1' or 'Zone2' and – depending on the direction of slip - either
'Generator' or 'Motor' are issued.
Every time pole slipping is detected, the impedance of the point where the slip line is crossed
and the instantaneous slip frequency are displayed as measurements.
227
Pole Slip protection (PPAM, 78) Chapter 5
Impedance protection
Further slips are only detected, if they are in the same direction and if the rate of rotor movement
has reduced in relation to the preceding slip or the slip line is crossed in the opposite direction
outside ZA-ZB. A further slip in the opposite direction within ZA-ZB resets all the signals and
is then signalled itself as a first slip.
The 'Trip1' tripping command and signal are generated after n1 slips in zone 1, providing the
rotor angle is less than 'TripAngle'. The 'Trip2' signal is generated after n2 slips in zone 2, pro-
viding the rotor angle is less than 'TripAngle'.
PICKUP
AND
0.2 ≤ Slip.Freq. ≤ 8 Hz
δ ≥ startAngle
ZONE1
AND
Z cross line ZA - ZC
ZONE2
AND
Z cross line ZC - ZB
Counter
a
a≥b
N1Limit b TRIP1
AND
δ ≤ tripAngle OR
TRIP
Counter
a
N2Limit b a≥b TRIP2
AND
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Figure 133: Simplified logic diagram for pole slip protection
228
Pole Slip protection (PPAM, 78) Chapter 5
Impedance protection
PSP1-
PSPPPAM_78
I3P TRIP
V3P TRIP1
BLOCK TRIP2
BLKGEN PICKUP
BLKMOTOR ZONE1
EXTZONE1 ZONE2
GEN
MOTOR
SFREQ
SLIPZOHM
SLIPZPER
UCOSKV
UCOSPER
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Table 117: Output signals for the PSPPPAM_78 (PSP1-) function block
Signal Description
TRIP Common trip signal
TRIP1 Trip1 after the N1Limit slip in zone1
TRIP2 Trip2 after the N2Limit slip in zone2
PICKUP Common start signal
ZONE1 First slip in zone1 region
ZONE2 First slip in zone2 region
GEN Generator is faster then the system
MOTOR Generator is slower then the system
229
Pole Slip protection (PPAM, 78) Chapter 5
Impedance protection
Signal Description
SFREQ Slip frequency
SLIPZOHM Slip impedance in ohms
SLIPZPER Slip impedance in percent of ZBase
VCOSKV VCosPhi voltage in kV
VCOSPER VCosPhi voltage in percent of VBase
Table 119: Basic parameter group settings for the PSPPPAM_78 (PSP1-) function
Parameter Range Step Default Unit Description
Operation Disabled - Disabled - Operation Enable / Dis-
Enabled able
OperationZ1 Disabled - Enabled - Operation Enable/Dis-
Enabled able zone Z1
OperationZ2 Disabled - Enabled - Operation Enable/Dis-
Enabled able zone Z2
ImpedanceZA 0.00 - 1000.00 0.01 10.00 % Forward impedance in %
of Zbase
ImpedanceZB 0.00 - 1000.00 0.01 10.00 % Reverse impedance in %
of Zbase
ImpedanceZC 0.00 - 1000.00 0.01 10.00 % Impedance of zone1 limit
in % of Zbase
230
Pole Slip protection (PPAM, 78) Chapter 5
Impedance protection
Table 120: Advanced parameter group settings for the PSPPPAM_78 (PSP1-) function
Parameter Range Step Default Unit Description
ResetTime 0.000 - 60.000 0.001 5.000 s Time without slip to reset
all signals
231
Automatic switch onto fault logic, voltage and Chapter 5
current based (SFCV) Impedance protection
13.1 Introduction
Automatic switch onto fault logic is a function that gives an instantaneous trip at closing of
breaker onto a fault. A dead line detection check is provided to activate the function when the
line is dead.
Mho distance protections can not operate for switch on to fault condition when the phase volt-
ages are close to zero. An additional logic based on VI Level is used for this purpose.
The activation from the DLD function is released if the internal signal DeadLine from the VI-
Level function is activated at the same time as the input ZACC is not activated during at least
for a duration tDLD and the setting parameter AutoInit is set to On.
When the setting AutoInit is Off the function is activated by an external binary input BC. To
get a trip also one of the following operation modes must be selected by the parameter Mode:
Mode = Impedance; trip is released if the input ZACC is activated (normal connected to non di-
rectional distance protection zone)
Mode = Both; trip is initiated based on impedance measured criteria or VILevel detection
The internal signal DeadLine from the VILevel detector is activated if all three phase currents
and voltages are below the setting IPhPickup and UVPickup.
VI Level based measurement detects the switch onto fault condition even though the voltage is
very low. The logic is based on current change for activation, current level and voltage level.
The internal signal SOTFLevel is activated if the phase voltage and corresponding phase current
is below the setting IPhPickup and UVPickup in any phase.
First of all AutoInit= On is not needed (or in some cases not even wanted) for external activation
and secondly the information is already present in the first sentence of "Principle of operation"
232
Automatic switch onto fault logic, voltage and Chapter 5
current based (SFCV) Impedance protection
BLOCK
AND 0 TRIP
15
BC
AutiInit=On
OR 0
ZACC AND 200
1000
0
IL1
deadLine
IL2
IL3
VA VILevel detector
VB
VC
IphPickup
SOTFVILevel
VphPickup
AND
Mode = Impedance
AND OR
Mode = UILevel
OR
AND
Mode = UILvl&Imp
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233
Automatic switch onto fault logic, voltage and Chapter 5
current based (SFCV) Impedance protection
Figure 135: Simplified logic diagram for current and voltage based switch onto fault logic.
SFV1-
ZCVPSOF
I3P TRIP
V3P
BLOCK
BC
ZACC
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Table 123: Output signals for the ZCVPSOF (SFV1-) function block
Signal Description
TRIP Trip by pilot communication scheme logic
234
Automatic switch onto fault logic, voltage and Chapter 5
current based (SFCV) Impedance protection
235
Automatic switch onto fault logic, voltage and Chapter 5
current based (SFCV) Impedance protection
236
About this chapter Chapter 6
Current protection
237
Instantaneous phase overcurrent protection Chapter 6
(PIOC, 50) Current protection
1.1 Introduction
The instantaneous three phase overcurrent function has a low transient overreach and short trip-
ping time to allow use as a high set short-circuit protection function, with the reach limited to
less than typical eighty percent of the fault current line at minimum source impedance.
There is an operation mode (OpModeSel) setting: “1 out of 3” or “2 out of 3”. If the parameter
is set to “1 out of 3” any phase trip signal will be activated. If the parameter is set to “2 out of
3” at least two phase signals must be activated for trip.
There is also a possibility to activate a preset change of the set operation current (MultPU) via
a binary input (MULTPU). In some applications the operation value needs to be changed, for
example due to transformer inrush currents.
IOC1-
PHPIOC_50
I3P TRIP
BLOCK TR_A
MULTPU TR_B
TR_C
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238
Instantaneous phase overcurrent protection Chapter 6
(PIOC, 50) Current protection
Table 127: Output signals for the PHPIOC_50 (IOC1-) function block
Signal Description
TRIP Trip signal from any phase
TR_A Trip signal from phase A
TR_B Trip signal from phase B
TR_C Trip signal from phase C
Table 129: Advanced parameter group settings for the PHPIOC_50 (IOC1-) function
Parameter Range Step Default Unit Description
MultPU 0.5 - 5.0 0.1 1.0 - Multiplier for operate cur-
rent level
239
Instantaneous phase overcurrent protection Chapter 6
(PIOC, 50) Current protection
240
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
2.1 Introduction
The four step phase overcurrent function has an inverse or definite time delay independent for
each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional user de-
fined time characteristic.
The function can be set to be directional or non-directional independently for each of the steps.
Note!
If VT inputs are not available or not connected, func parameter DirModeSelx shall be left to de-
fault value, Non-directional.
241
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
V3P
TRIP
Harmonic harmRestrBlock
I3P Restraint
Element
enableDir
Mode Selection
enableStep1-4
DirectionalMode1-4
en05000740_ansi.vsd
Figure 138: Functional overview of TOC.
A common setting for all steps, StPhaseSel, is used to specify the number of phase currents to
be high to enable operation. The settings can be chosen: 1 out of 3, 2 out of 3 or 3 out of 3.
The sampled analog phase currents are pre-processed in a pre-processing function blocks. By a
parameter setting within the general settings for the TOC function it is then possible to select
type of measurement which shall be used by TOC function for all overcurrent stages. It is pos-
sible to select either discrete Fourier filter (DFT) or true RMS filer (RMS). If DFT option is se-
lected then only the RMS value of the fundamental frequency components of each phase current
is derived. Influence of DC current component and higher harmonic current components are al-
most completely suppressed. If RMS option is selected then the true RMS values is used. The
true RMS value in addition to the fundamental frequency component includes the contribution
from the current DC component as well as from higher current harmonic. The selected current
values are fed to the TOC function. In a comparator, for each phase current, the DFT or RMS
values are compared to the set operation current value of the function (Pickup1, Pickup2,
Pickup3, Pickup4). If a phase current is larger than the set operation current a signal from the
comparator for this phase and step is set to true. This signal will, without delay, activate the out-
put signal Pickup for this phase/step, the Pickup signal common for all three phases for this step
and a common Pickup signal. It shall be noted that the selection of measured value (i.e. DFT or
242
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
RMS) do not influence the operation of directional part of TOC function. Service value for in-
dividually measured phase currents are available from the TOC function. This feature simplifies
testing, commissioning and in service operational checking of the function.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to the
fundamental current is used. The 2nd harmonic current is taken from the pre-processing of the
phase currents and the relation is compared to a set restrain current level.
The function can use a directional option. The direction of the fault current is given as current
angle in relation to the voltage angle. The fault current and fault voltage for the directional func-
tion is dependent of the fault type. To enable directional measurement at close in faults, causing
low measured voltage, the polarization voltage is a combination of the apparent voltage (85%)
and a memory voltage (15%). The following combinations are used.
The directional setting is given as a characteristic angle AngleRCA for the function and an angle
window AngleROA.
243
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
Reverse
Vref
RCA
ROA
ROA Forward
Idir
en05000745_ansi.vsd
The default value of AngleRCA is –65°. The parameters AngleROA gives the angle sector from
AngleRCA for directional borders.
A minimum current for directional phase pickup current signal can be set: PUMinOpPhSel.
If no blockings are given the pickup signals will start the timers of the step. The time character-
istic for each step can be chosen as definite time delay or some type of inverse time characteris-
tic. A wide range of standardized inverse time characteristics is available. It is also possible to
create a tailor made time characteristic. The possibilities for inverse time characteristics are de-
scribed in chapter 21 "Time inverse characteristics".
Different types of reset time can be selected as described in chapter21 "Time inverse character-
istics".
There is also a possibility to activate a preset change (,MultiPUx, x= 1, 2, 3 or 4) of the set op-
eration current via a binary input (enable multiplier). In some applications the operation value
needs to be changed, for example due to changed network switching state. The function can be
244
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
blocked from the binary input BLOCK. The pickup signals from the function can be blocked
from the binary input BLK. The trip signals from the function can be blocked from the binary
input BLKTR.
TOC1-
OC4PTOC_51_67
I3P TRIP
V3P TRST1
BLOCK TRST2
BLKTR TRST3
BLK1 TRST4
BLK2 TR_A
BLK3 TR_B
BLK4 TR_C
MULTPU1 TRST1_A
MULTPU2 TRST1_B
MULTPU3 TRST1_C
MULTPU4 TRST2_A
TRST2_B
TRST2_C
TRST3_A
TRST3_B
TRST3_C
TRST4_A
TRST4_B
TRST4_C
PICKUP
PU_ST1
PU_ST2
PU_ST3
PU_ST4
PU_A
PU_B
PU_C
PU_ST1_A
PU_ST1_B
PU_ST1_C
PU_ST2_A
PU_ST2_B
PU_ST2_C
PU_ST3_A
PU_ST3_B
PU_ST3_C
PU_ST4_A
PU_ST4_B
PU_ST4_C
2NDHARM
DIR_A
DIR_B
DIR_C
en06000187_ansi.vsd
245
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
Table 132: Output signals for the OC4PTOC_51_67 (TOC1-) function block
Signal Description
TRIP Trip
TRST1 Common trip signal from step1
TRST2 Common trip signal from step2
TRST3 Common trip signal from step3
TRST4 Common trip signal from step4
TR_A Trip signal from phase A
TR_B Trip signal from phase B
TR_C Trip signal from phase C
TRST1_A Trip signal from step1 phase A
TRST1_B Trip signal from step1 phase B
TRST1_C Trip signal from step1 phase C
TRST2_A Trip signal from step2 phase A
TRST2_B Trip signal from step2 phase B
TRST2_C Trip signal from step2 phase C
TRST3_A Trip signal from step3 phase A
TRST3_B Trip signal from step3 phase B
TRST3_C Trip signal from step3 phase C
TRST4_A Trip signal from step4 phase A
TRST4_B Trip signal from step4 phase B
TRST4_C Trip signal from step4 phase C
PICKUP General pickup signal
246
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
Signal Description
PU_ST1 Common pickup signal from step1
PU_ST2 Common pickup signal from step2
PU_ST3 Common pickup signal from step3
PU_ST4 Common pickup signal from step4
PU_A Pickup signal from phase A
PU_B Pickup signal from phase B
PU_C Pickup signal from phase C
PU_ST1_A Pickup signal from step1 phase A
PU_ST1_B Pickup signal from step1 phase B
PU_ST1_C Pickup signal from step1 phase C
PU_ST2_A Pickup signal from step2 phase A
PU_ST2_B Pickup signal from step2 phase B
PU_ST2_C Pickup signal from step2 phase C
PU_ST3_A Pickup signal from step3 phase A
PU_ST3_B Pickup signal from step3 phase B
PU_ST3_C Pickup signal from step3 phase C
PU_ST4_A Pickup signal from step4 phase A
PU_ST4_B Pickup signal from step4 phase B
PU_ST4_C Pickup signal from step4 phase C
2NDHARM Block from second harmonic detection
DIR_A Direction for phase A
DIR_B Direction for phase B
DIR_C Direction for phase C
247
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
Table 134: Basic parameter group settings for the OC4PTOC_51_67 (TOC1-) function
Parameter Range Step Default Unit Description
Operation Disabled - Disabled - Disable/Enable Opera-
Enabled tion
IBase 1 - 99999 1 3000 A Base current
Vbase 0.05 - 2000.00 0.05 400.00 kV Base voltage
AngleRCA 40 - 65 1 55 Deg Relay characteristic
angle (RCA)
AngleROA 40 - 89 1 80 Deg Relay operation angle
(ROA)
NumPhSel Not Used - 1 out of 3 - Number of phases
1 out of 3 required for phase selec-
2 out of 3 tion (1 of 3, 2 of 3, 3 of 3)
3 out of 3
DirModeSel1 Disabled - Non-directional - Directional mode of step
Non-directional 1 (Disabled, Nondir, For-
Forward ward, Reverse)
Reverse
Characterist1 ANSI Ext. inv. - ANSI Def. Time - Selection of time delay
ANSI Very inv. curve type for step 1
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
Pickup1 1 - 2500 1 1000 %IB Phase current operate
level for step1 in % of
IBase
t1 0.000 - 60.000 0.001 0.000 s Definitive time delay of
step 1
TD1 0.05 - 999.00 0.01 0.05 - Time multiplier for the
inverse time delay for
step 1
t1Min 0.000 - 60.000 0.001 0.000 s Minimum operate time for
inverse curves for step 1
248
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
249
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
250
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
251
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
Table 135: Advanced parameter group settings for the OC4PTOC_51_67 (TOC1-) function
Parameter Range Step Default Unit Description
PUMinOpPhSel 1 - 100 1 7 %IB Minimum current for
phase selection in % of
IBase
2ndHarmStab 5 - 100 1 20 %IB Pickup of second harm
restraint in % of Funda-
mental
ResetTypeCrv1 Instantaneous - Instantaneous - Selection of reset curve
IEC Reset type for step 1
ANSI reset
tReset1 0.000 - 60.000 0.001 0.020 s Reset time delay used in
IEC Definite Time curve
step 1
tPCrv1 0.005 - 3.000 0.001 1.000 - Parameter P for cus-
tomer programmable
curve for step 1
tACrv1 0.005 - 200.000 0.001 13.500 - Parameter A for cus-
tomer programmable
curve for step 1
tBCrv1 0.00 - 20.00 0.01 0.00 - Parameter B for cus-
tomer programmable
curve for step 1
tCCrv1 0.1 - 10.0 0.1 1.0 - Parameter C for cus-
tomer programmable
curve for step 1
tPRCrv1 0.005 - 3.000 0.001 0.500 - Parameter PR for cus-
tomer programmable
curve for step 1
tTRCrv1 0.005 - 100.000 0.001 13.500 - Parameter TR for cus-
tomer programmable
curve for step 1
tCRCrv1 0.1 - 10.0 0.1 1.0 - Parameter CR for cus-
tomer programmable
curve for step 1
HarmRestrain1 Disabled - Disabled - Enable block of step 1
Enabled from harmonic restrain
ResetTypeCrv2 Instantaneous - Instantaneous - Selection of reset curve
IEC Reset type for step 2
ANSI reset
tReset2 0.000 - 60.000 0.001 0.020 s Reset time delay used in
IEC Definite Time curve
step 2
tPCrv2 0.005 - 3.000 0.001 1.000 - Parameter P for cus-
tomer programmable
curve for step 2
tACrv2 0.005 - 200.000 0.001 13.500 - Parameter A for cus-
tomer programmable
curve for step 2
252
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
253
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
254
Four step phase overcurrent Chapter 6
protection (PTOC, 51_67) Current protection
255
Instantaneous residual overcurrent protection Chapter 6
(PIOC, 50N) Current protection
IN>>
3.1 Introduction
The single input overcurrent function has a low transient overreach and short tripping times to
allow use for instantaneous earth fault protection, with the reach limited to less than typical
eighty percent of the line at minimum source impedance. The function can be configured to mea-
sure the residual current from the three phase current inputs or the current from a separate current
input.
There is also a possibility to activate a preset change of the set operation current via a binary
input (enable multiplier ENMULT). In some applications the operation value needs to be
changed, for example due to transformer inrush currents.
The function can be blocked from the binary input BLOCK. The trip signals from the function
can be blocked from the binary input BLKAR, that can be activated during single pole trip and
autoreclosing sequences.
256
Instantaneous residual overcurrent protection Chapter 6
(PIOC, 50N) Current protection
IEF1-
EFPIOC_50N
I3P TRIP
BLOCK
BLKAR
MULTPU
en06000269_ansi.vsd
Table 138: Output signals for the EFPIOC_50N (IEF1-) function block
Signal Description
TRIP Trip signal
Table 140: Advanced parameter group settings for the EFPIOC_50N (IEF1-) function
Parameter Range Step Default Unit Description
MultPU 0.5 - 5.0 0.1 1.0 - Multiplier for operate cur-
rent level
257
Instantaneous residual overcurrent protection Chapter 6
(PIOC, 50N) Current protection
258
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
4
alt
4
4.1 Introduction
The four step residual single input overcurrent function has an inverse or definite time delay in-
dependent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional user de-
fined characteristic.
The function can be used as main protection for phase to ground faults.
The function can be used to provide a system back-up e.g. in the case of the primary protection
being out of service due to communication or voltage transformer circuit failure.
Directional operation can be combined together with corresponding communication blocks into
permissive or blocking teleprotection scheme. Current reversal and weak-end infeed functional-
ity are available as well.
The function can be configured to measure the residual current from the three phase current in-
puts or the current from a separate current input.
The function can be selected to be voltage polarized, current polarized or dual polarized.
These inputs are connected from the corresponding pre-processing function blocks in the Con-
figuration Tool within PCM.
259
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
I op = 3 ⋅ Io = IA + IB + IC
(Equation 58)
where:
IA, IB, IC are fundamental frequency phasors of three individual phase currents.
The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of the funda-
mental frequency component of the residual current is derived. The phasor magnitude is used
within the TEF function to compare it with the set operation current value of the four stages
(Pickup1, Pickup2, Pickup3 or Pickup4). If the residual current is larger than the set operation
current and the step is used in non-directional mode a signal from the comparator for this step is
set to true. This signal will, without delay, activate the output signal PICKUP for this step and a
common PICKUP signal.
The function can be set to use voltage polarizing, current polarizing or dual polarizing.
When Voltage Polarizing is selected the function will use the Residual Voltage (i.e. 3Vo) as po-
larizing quantity V3P. This voltage can be:
260
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
VVPol = 3 ⋅ Vo = VA + VB + VC
(Equation 59)
where:
VA, VB, VC are fundamental frequency phasors of three individual phase voltages.
Note! In order to use this all three phase-to-ground voltages must be connected to three IED 670 VT
inputs.
The residual voltage is pre-processed by a discrete Fourier filter. Thus the phasor of the funda-
mental frequency component of the residual voltage is derived. This phasor is used, together
with the phasor of the operating current, in order to determine the direction of the ground fault
(i.e. Forward/Reverse). In order to enable voltage polarizing the magnitude of polarizing voltage
shall be bigger than a minimum level defined by setting parameter VpolMin.
It shall be noted that –3Vo is used to determine the location of the ground fault.Thus the setting
parameter ROT3V0, located under General Settings for Earth Fault function, has default value
of “ROT3V0=180 deg”. This insures the required inversion of the polarizing voltage within the
ground fault function.
When Current Polarizing is selected the function will use the Residual Current (i.e. 3Io) as po-
larizing quantity IPol. This current can be:
261
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
I Pol = 3 ⋅ Io = IA + IB + IC
where:
IA, IB are fundamental frequency phasors of three individual phase currents. However this option can
and IC be as well only used for some special line protection applications as explained in the Applica-
tion Manual.
The residual polarizing current is pre-processed by a discrete Fourier filter. Thus the phasor of
the fundamental frequency component of the residual current is derived. This phasor is then mul-
tiplied with pre-set equivalent Zero Sequence Source Impedance in order to calculate equivalent
Polarizing Voltage VIPol in accordance with the following formula:
which will be then used, together with the phasor of the operating current, in order to determine
the direction of the ground fault (i.e. Forward/Reverse). In order to enable current polarizing the
magnitude of polarizing current shall be bigger than a minimum level defined by setting param-
eter IPollMin.
When Dual Polarizing is selected the function will use the vectorial sum of the voltage based
and current based polarizing in accordance with the following formula:
Then the phasor of the total polarizing voltage VTotPol will be used, together with the phasor of
the operating current, to determine the direction of the ground fault (i.e. Forward/Reverse).
262
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
Simplified logic diagram for one residual overcurrent stage is shown in the following figure:
263
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
BLKTR
Characteristx=DefTime tx TRINx
|IOP| AND
a 0 OR
a>b
b
MULTPUx
STINx
INxMult AND
X T
INxPU F
Inverse
BLKx
BLOCK Characteristx=Inverse
2ndH_BLOCK_Int
OR
HarmRestrain1=Disabled
DirModex=Off OR STAGEx_DIR_Int
DirModex=Non-directional
DirModex=Forward
AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int
en07000064_ansi.vsd
Figure 142: Simplified logic diagram for residual overcurrent stage x , where x=1, 2 ,3 or 4
The function can be completely blocked from the binary input BLOCK. The pickup signals from
the function for each stage can be blocked from the binary input BLKx. The trip signals from
the function can be blocked from the binary input BLKTR.
The function has integrated directional feature. As the operating quantity current IOp is always
used. The polarizing method is determined by the parameter setting polMethod. The polarizing
quantity will be selected by the function in one of the following three ways:
The operating and polarizing quantity are then used inside the directional element, as shown in
the following figure, in order to determine the direction of the ground fault.
264
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
Reverse
Area
0.4*INDirPU
Vpol=-3Vo
AngleRCA
0.4*INDirPU
Forward
Area
Iop=3Io
en07000066_ansi.vsd
• Operating Current Pickup INDirPU . However it shall be noted that the direction-
al element will be internally enabled to operate as soon as IOp cos(ϕ - AngleRCA)
is bigger then 40% of INDirPU .
• Relay characteristic angle AngleRCA which defines the position of Forward &
Reverse areas in the operating characteristic.
Directional Comparison stage, built-in within directional supervision element, will set GF func-
tion output binary signal:
These signals shall be used for communication based ground fault teleprotection schemes (i.e.
permissive or blocking).
265
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
Simplified logic diagram for directional supervision element with integrated directional compar-
ison stage is shown in the following figure:
|IOP|
a
a>b PUREV
b AND
REVERSE_Int
0.6
X
a
a>b PUFW
INDirPU b AND
FORWARD_Int
X
0.4
FWD
AND FORWARD_Int
AngleRCA
Characteristic
PolMethod=Voltage
OR
Directional
PolMethod=Current UPolMin
VIPol
RNPol X T
COMPLEX
NUMBER
XNPol 0.0 F STAGE1_DIR_Int
STAGE2_DIR_Int
OR
STAGE3_DIR_Int
STAGE4_DIR_Int
BLOCK AND
en07000067_ansi.vsd
Figure 144: Simplified logic diagram for directional supervision element with integrated di-
rectional comparison stage
266
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
In addition to the basic functionality explained above the 2nd harmonic blocking can be set in
such way to seal-in until residual current disappears. This feature might be required to stabilize
the ground fault function during switching of parallel transformers in the station. In case of par-
allel transformers there is a risk of sympathetic inrush current. If one of the transformers is in
operation, and the parallel transformer is switched in, the asymmetric inrush current of the
switched in transformer will cause partial saturation of the transformer already in service. This
is called transferred saturation. The 2nd harmonic of the inrush currents of the two transformers
will be in phase opposition. The summation of the two currents will thus give a small 2nd har-
monic current. The residual fundamental current will however be significant. The inrush current
of the transformer in service before the parallel transformer energizing, will be a little delayed
compared to the first transformer. Therefore we will have high 2nd harmonic current component
initially. After a short period this current will however be small and the normal 2nd harmonic
blocking will reset. If the BlkParTransf function is activated the 2nd harmonic restrain signal will
be latched as long as the residual current measured by the relay is larger than a selected step cur-
rent level.
This feature has been called Block for Parallel Transformers. This 2nd harmonic seal-in feature
will be activated when all of the following three conditions are simultaneously fulfilled:
Once Block for Parallel Transformers is activated the basic 2nd harmonic blocking signal will
be sealed-in until the residual current magnitude falls below a value defined by parameter setting
Use_PUValue (see condition 3 above).
Simplified logic diagram for 2nd harmonic blocking feature is shown in the following figure:
267
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
BLOCK
2ndHarmStab
X
Extract second
IOP 2NDHARMD
harmonic current a OR
a>b
component
b
Extract
fundamental
q-1
current component
0-70ms OR
AN OR 2ndH_BLOCK_Int
0 D
BlkParTransf=On
|IOP|
a
a>b
b
UseStartValue
Pickup1
Pickup2
Pickup3
Pickup4
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Figure 145: Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel
Transformers feature
The SOTF logic uses the pickup signal from step 2 or step 3 for its operation, selected by setting
parameter StepForSOTF. The SOTF logic can be activated either from change in circuit breaker
position or from circuit breaker close command pulse. The setting parameter SOTFSel can be
set for activation of CB position open change, CB position closed change or CB close command.
In case of a residual current pickup from step 2 or 3 (dependent on setting) the function will give
a trip after a set delay tSOTF. This delay is normally set to a short time (default 100 ms).
The Under-Time logic always uses the pickup signal from the step 4. The Under-Time logic will
normally be set to operate for a lower current level than the SOTF function. The Under-Time
logic can also be blocked by the 2nd harmonic restraint feature. This enables high sensitivity
even if power transformer inrush currents can occur at breaker closing. This logic is typically
used to detect asymmetry of CB poles immediately after switching of the circuit breaker. The
Under-Time logic is activated either from change in circuit breaker position or from circuit
breaker close and open command pulses. This selection is done by setting parameter ActUnder-
268
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
Time. In case of a pickup from step 4 this logic will give a trip after a set delay tUnderTime. This
delay is normally set to a relatively short time (default 300 ms). Practically the Under-Time logic
acts as circuit breaker pole-discrepancy protection, but it is only active immediately after break-
er switching. The Under-Time logic can only be used in solidly or low impedance grounded sys-
tems.
269
270
activationSOTF
Setting
tpulse
cbPosition
SOTF
posClsPls
Exec AND
PwrMode
tpulse
cbClosed
NOT SOTFActive
protection (PTOC, 51N/67N)
tpulse operationMode
Four step residual overcurrent
OR
AND
step4in AND
Setting TON
harmonic2ndRestraint AND IN Q AND
Exec NOT PT ET
cbSwitchingFaultDelayTime
Exec
en06000643_ansi.vsd
Current protection
Chapter 6
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
Figure 146: Simplified logic diagram for SOTF and Under-Time features
EF Logic Diagram Simplified logic diagram for the complete EF function is shown in the fol-
lowing Figure 1:
signal to
communication
scheme
Directional Check
Element
DirModeSel
enableDir
harmRestrBlock
3I0 Harmonic
Restraint or
Element
Blocking at parallel
transformers
SwitchOnToFault
TRIP
CB
DirModeSel pos
or cmd
enableDir
Mode
Selection enableStep1-4
DirectionalMode1-4
en 06000376_ansi. vsd
271
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
TEF1-
EF4PTOC_51N67N
I3P TRIP
V3P TRST1
I3PPOL TRST2
BLOCK TRST3
BLKTR TRST4
BLK1 TRSOTF
BLK2 PICKUP
BLK3 PUST1
BLK4 PUST2
MULTPU1 PUST3
MULTPU2 PUST4
MULTPU3 PUSOTF
MULTPU4 PUFW
52A PUREV
CLOSECMD 2NDHARMD
OPENCMD
en06000424_ansi.vsd
272
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
Table 143: Output signals for the EF4PTOC_51N67N (TEF1-) function block
Signal Description
TRIP Trip
TRST1 Trip signal from step 1
TRST2 Trip signal from step 2
TRST3 Trip signal from step 3
TRST4 Trip signal from step 4
TRSOTF Trip signal from switch onto fault function
PICKUP General pickup signal
PUST1 Pickup signal step 1
PUST2 Pickup signal step 2
PUST3 Pickup signal step 3
PUST4 Pickup signal step 4
PUSOTF Pickup signal from switch onto fault function
PUFW Forward directional pickup signal
PUREV Reverse directional pickup signal
2NDHARMD 2nd harmonic block signal
273
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
274
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
275
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
276
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
277
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
278
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
Table 145: Advanced parameter group settings for the EF4PTOC_51N67N (TEF1-) func-
tion
Parameter Range Step Default Unit Description
ActUndrTimeSel CB position - CB position - Select signal to activate
CB command under time (CB
Pos/CBCommand)
tUnderTime 0.000 - 60.000 0.001 0.300 s Time delay for under time
ResetTypeCrv1 Instantaneous - Instantaneous - Reset curve type for step
IEC Reset 1
ANSI reset
tReset1 0.000 - 60.000 0.001 0.020 s Reset curve type for step
1
tPCrv1 0.005 - 3.000 0.001 1.000 - Parameter P for cus-
tomer programmable
curve for step 1
tACrv1 0.005 - 200.000 0.001 13.500 - Parameter A for cus-
tomer programmable
curve for step 1
tBCrv1 0.00 - 20.00 0.01 0.00 - Parameter B for cus-
tomer programmable
curve for step 1
tCCrv1 0.1 - 10.0 0.1 1.0 - Parameter C for cus-
tomer programmable
curve for step 1
tPRCrv1 0.005 - 3.000 0.001 0.500 - Parameter PR for cus-
tomer programmable
curve for step 1
tTRCrv1 0.005 - 100.000 0.001 13.500 - Parameter TR for cus-
tomer programmable
curve for step 1
tCRCrv1 0.1 - 10.0 0.1 1.0 - Parameter CR for cus-
tomer programmable
curve for step 1
ResetTypeCrv2 Instantaneous - Instantaneous - Reset curve type for step
IEC Reset 2
ANSI reset
tReset2 0.000 - 60.000 0.001 0.020 s Reset curve type for step
2
tPCrv2 0.005 - 3.000 0.001 1.000 - Parameter P for cus-
tomer programmable
curve for step 2
tACrv2 0.005 - 200.000 0.001 13.500 - Parameter A for cus-
tomer programmable
curve for step 2
tBCrv2 0.00 - 20.00 0.01 0.00 - Parameter B for cus-
tomer programmable
curve for step 2
279
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
280
Four step residual overcurrent Chapter 6
protection (PTOC, 51N/67N) Current protection
281
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
5.1 Introduction
In networks with high impedance grounding, the phase to ground fault current is significantly
smaller than the short circuit currents. Another difficulty for ground fault protection is that the
magnitude of the phase to ground fault current is almost independent of the fault location in the
network.
Directional residual current can be used to detect and give selective trip of phase to ground faults
in high impedance grounded networks. The protection uses the residual current component
3I0 cos φ, where φ is the angle between the residual current and the residual voltage, compensat-
ed with a characteristic angle. Alternatively the function can be set to strict 3I0 level with an
check of angle 3I0 and cos ϕ.
Directional residual power can be used to detect and give selective trip of phase to ground faults
in high impedance grounded networks. The protection uses the residual power component
3I0 3V0 cos φ, where φ is the angle between the residual current and the reference residual volt-
age, compensated with a characteristic angle.
A normal undirectional residual current function can also be used and be with definite or inverse
time delay.
A back-up neutral point voltage function is also available for undirectional sensitive back-up
protection.
In an isolated network, i.e. the network is only coupled to ground via the capacitances between
the phase conductors and ground, the residual current always has -90º phase shift compared to
the reference residual voltage. The characteristic angle is chosen to -90º in such a network.
In resistance grounded networks or in Petersen coil, with a parallel resistor, the active residual
current component (in phase with the residual voltage) should be used for the ground fault de-
tection. In such networks the characteristic angle is chosen to 0º.
As the magnitude of the residual current is independent of the fault location the selectivity of the
ground fault protection is achieved by time selectivity.
When should the sensitive directional residual overcurrent protection be used and when should
the sensitive directional residual power protection be used? We have the following facts to con-
sider:
282
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
• In some power systems a medium size neutral point resistor is used. Such a resis-
tor will give a resistive ground fault current component of about 200 - 400 A at a
zero resistive phase to ground fault. In such a system the directional residual
power protection gives better possibilities for selectivity enabled by inverse time
power characteristics.
The sensitive directional ground fault protection has the following sub-functions included:
3I0
= ang(3I0) - ang(3Vref)
-3V0=Vref
3I0 cos
en06000648_ansi.vsd
283
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
3I0
3I0 cos
= ang(3I0) – ang(Vref)
-3V0
en06000649_ansi.vsd
For trip, both the residual current 3I0 cos φand the release voltage 3V0, shall be larger than the
set levels: INCosPhiPU and VNRelPU.
Trip from this function can be blocked from the binary input BLKTRDIR.
When the function is activated binary output signals PICKUP and PUDIRIN are activated. If the
activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are ac-
tivated. The trip from this sub-function has definite time delay.
There is a possibility to increase the operate level for currents where the angle φ is larger than a
set value as shown in the figure below. This is equivalent to blocking of the function if
φ > ROADir. This option is used to handle angle error for the instrument transformers.
284
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
-3V0=Vref RCA = 0°
3I0 cos
ROA
en06000650_ansi.vsd
The function will indicate forward/reverse direction to the fault. Reverse direction is defined as
3I0 cos (φ + 180°) ≥ the set value.
It shall also be possible to tilt the characteristic to compensate for current transformer angle error
with a setting RCAComp as shown in the figure below:
285
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
Operate area
-3V0=Vref RCA = 0°
Instrument
transformer α
RCAcomp
angle error
Characteristic after
angle compensation
en06000651_ansi.vsd
For trip, both the residual power 3I0 3V0 cos φ, the residual current 3I0 and the release voltage
3V0, shall be larger than the set levels (SN_PU, INRelPU and VNRelPU).
Trip from this function can be blocked from the binary input BLKTRDIR.
When the function is activated binary output signals PICKUP and PUDIRIN are activated. If the
activation is active after the set delay tDef or after the inverse time delay (setting TDSN) the
binary output signals TRIP and TRDIRIN are activated.
The function shall indicate forward/reverse direction to the fault. Reverse direction is defined as
3I03V0 cos (φ + 180°) 3 the set value.
This variant has the possibility of choice between definite time delay and inverse time delay.
286
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
RCA = 0°
ROA = 80°
Operate area
3I0
80 -3V0
en06000652_ansi.vsd
For trip, both the residual current 3I0 and the release voltage 3V0, shall be larger than the set
levels (INDirPU and VNRelPU) and the angle φ shall be in the set sector (ROADir and RCADir).
Trip from this function can be blocked from the binary input BLKTRDIR.
When the function is activated binary output signals PICKUP and PUDIRIN are activated. If the
activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are ac-
tivated.
The function indicate forward/reverse direction to the fault. Reverse direction is defined as φ is
within the angle sector: RCADir + 180° ± ROADir
287
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
Directional functions
For all the directional functions there are directional pickup signals PUFW: fault in the forward
direction, and PUREV: Pickup in the reverse direction. Even if the directional function is set to
operate for faults in the forward direction a fault in the reverse direction will give the pickup sig-
nal PUREV. Also if the directional function is set to operate for faults in the reverse direction a
fault in the forward direction will give the pickup signal PUFW.
If available the non-directional function is using the calculated residual current, derived as sum
of the phase currents. This will give a better ability to detect cross-country faults with high re-
sidual current, also when dedicated core balance CT for the sensitive ground fault protection will
saturate.
This variant shall have the possibility of choice between definite time delay and inverse time de-
lay. The inverse time delay shall be according to IEC 60255-3.
For trip, the residual current 3I0 shall be larger than the set levels (INNonDirPU).
Trip from this function can be blocked from the binary input BLKNDN.
When the function is activated binary output signal PUNDIN is activated. If the activation is ac-
tive after the set delay tINNonDir or after the inverse time delay the binary output signals TRIP
and TRNDIN are activated.
There shall also be a separate trip, with its own definite time delay, from this set voltage level.
For trip, the residual voltage 3V0 shall be larger than the set levels (UN_PU).
Trip from this function can be blocked from the binary input BLKVN.
When the function is activated binary output signal PUVN is activated. If the activation is active
after the set delay tVNNonDir TRIP and TRUN are activated. A simplified logical diagram of
the total function is shown in figure 154.
288
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
INNonDirPU PUNDIN
0-t TRNDIN
0
PUVN
UN_PU
0-t TRVN
0
OpMODE=INcosPhi
Pickup_N
AND
INCosPhiPU
OpMODE=INVNCosPhi
PUDIRIN
AND OR AND
INVNCosPhiPU t
SN
AND TRDIRIN
Phi in RCA +- ROA
TimeChar = InvTime
AND
OpMODE=IN and Phi
AND
TimeChar = DefTime
DirMode = Forw
AND OR
PUFW
Forw
DirMode = Rev
AND
Rev PUREV
en06000653_ansi.vsd
Figure 154: Simplified logical diagram of the sensitive ground fault current protection
289
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
SDE1-
SDEPSDE_67N
I3P TRIP
V3P TRDIRIN
BLOCK TRNDIN
BLKTR TRVN
BLKTRDIR PICKUP
BLKNDN PUDIRIN
BLKVN PUNDIN
PUVN
PUFW
PUREV
CND
VNREL
en07000032_ansi.vsd
Table 148: Basic general settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description
IBase 1 - 99999 1 100 A Base Current, in A
VBase 0.05 - 2000.00 0.05 63.50 kV Base Voltage, in kV
Phase to Neutral
SBase 0.05 - 0.05 6350.00 kVA Base Power, in kVA.
200000000.00 IBase*VBase
290
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
Table 149: Basic parameter group settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description
Operation Disabled - Disabled - Operation Dis-
Enabled abled/Enabled
OpModeSel 3I0Cosfi - 3I0Cosfi - Selection of operation
3I03V0Cosfi mode for protection
3I0 and fi
DirMode Forward - Forward - Direction of operation for-
Reverse ward or reverse
RCADir -179 - 180 1 -90 Deg Relay characteristic
angle RCA, in deg
RCAComp -10.0 - 10.0 0.1 0.0 Deg Relay characteristic
angle compensation
ROADir 0 - 90 1 90 Deg Relay open angle ROA
used as release in phase
mode, in deg
INCosPhiPU 0.25 - 200.00 0.01 1.00 %IB Set level for 3I0cosFi,
directional res over cur-
rent, in %Ib
SN_PU 0.25 - 200.00 0.01 10.00 %SB Set level for
3I03V0cosFi, pickup inv
time count, in %Sb
INDirPU 0.25 - 200.00 0.01 5.00 %IB Set level for directional
residual over current
prot, in %Ib
tDef 0.000 - 60.000 0.001 0.100 s Definite time delay direc-
tional residual overcur-
rent, in sec
SRef 0.03 - 200.00 0.01 10.00 %SB Reference value of res
power for inverse time
count, in %Sb
TDSN 0.00 - 2.00 0.01 0.10 - Time multiplier setting for
directional residual power
mode
OpINNonDir Disabled - Disabled - Operation of non-direc-
Enabled tional residual overcur-
rent protection
INNonDirPU 1.00 - 400.00 0.01 10.00 %IB Set level for non direc-
tional residual over cur-
rent, in %Ib
tINNonDir 0.000 - 60.000 0.001 1.000 s Time delay for non-direc-
tional residual over cur-
rent, in sec
291
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
Table 150: Advanced general settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description
RotResV 0 deg - 180 deg - Setting for rotating polar-
180 deg izing quantity if neces-
sary
292
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
Table 151: Advanced parameter group settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description
tReset 0.000 - 60.000 0.001 0.040 s Time delay used for reset
of definite timers, in sec
tPCrv 0.005 - 3.000 0.001 1.000 - Setting P for customer
programmable curve
tACrv 0.005 - 200.000 0.001 13.500 - Setting A for customer
programmable curve
tBCrv 0.00 - 20.00 0.01 0.00 - Setting B for customer
programmable curve
tCCrv 0.1 - 10.0 0.1 1.0 - Setting C for customer
programmable curve
ResetTypeCrv Immediate - IEC Reset - Reset mode when cur-
IEC Reset rent drops off.
ANSI reset
tPRCrv 0.005 - 3.000 0.001 0.500 - Setting PR for customer
programmable curve
tTRCrv 0.005 - 100.000 0.001 13.500 - Setting TR for customer
programmable curve
tCRCrv 0.1 - 10.0 0.1 1.0 - Setting CR for customer
programmable curve
293
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
Table 153: Basic parameter group settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Operation Disable /
Enabled Enable
OpModeSel 3I0Cosfi - 3I0Cosfi - Selection of operation
3I03V0Cosfi mode for protection
3I0 and fi
DirMode Forward - Forward - Direction of operation for-
Reverse ward or reverse
RCADir -179 - 180 1 -90 Deg Relay characteristic
angle RCA, in deg
RCAComp -10.0 - 10.0 0.1 0.0 Deg Relay characteristic
angle compensation
ROADir 0 - 90 1 90 Deg Relay open angle ROA
used as release in phase
mode, in deg
INCosPhiPU 0.25 - 200.00 0.01 1.00 %IB Set level for 3I0cosFi,
directional res over cur-
rent, in %Ib
SN_PU 0.25 - 200.00 0.01 10.00 %SB Set level for
3I03V0cosFi, starting inv
time count, in %Sb
INDirPU 0.25 - 200.00 0.01 5.00 %IB Set level for directional
residual over current
prot, in %Ib
tDef 0.000 - 60.000 0.001 0.100 s Definite time delay direc-
tional residual overcur-
rent, in sec
SRef 0.03 - 200.00 0.01 10.00 %SB Reference value of res
power for inverse time
count, in %Sb
TDSN 0.00 - 2.00 0.01 0.10 - Time multiplier setting for
directional residual power
mode
OpINNonDir Disabled - Off - Operation of non-direc-
Enabled tional residual overcur-
rent protection
INNonDirPU 1.00 - 400.00 0.01 10.00 %IB Set level for non direc-
tional residual over cur-
rent, in %Ib
tINNonDir 0.000 - 60.000 0.001 1.000 s Time delay for non-direc-
tional residual over cur-
rent, in sec
294
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
Table 154: Advanced general settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description
RotResV 0 deg - 180 deg - Setting for rotating polar-
180 deg izing quantity if neces-
sary
295
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
Table 155: Advanced parameter group settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description
tReset 0.000 - 60.000 0.001 0.040 s Time delay used for reset
of definite timers, in sec
tPCrv 0.005 - 3.000 0.001 1.000 - Setting P for customer
programmable curve
tACrv 0.005 - 200.000 0.001 13.500 - Setting A for customer
programmable curve
tBCrv 0.00 - 20.00 0.01 0.00 - Setting B for customer
programmable curve
tCCrv 0.1 - 10.0 0.1 1.0 - Setting C for customer
programmable curve
ResetTypeCrv Immediate - IEC Reset - Reset mode when cur-
IEC Reset rent drops off.
ANSI reset
tPRCrv 0.005 - 3.000 0.001 0.500 - Setting PR for customer
programmable curve
tTRCrv 0.005 - 100.000 0.001 13.500 - Setting TR for customer
programmable curve
tCRCrv 0.1 - 10.0 0.1 1.0 - Setting CR for customer
programmable curve
296
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
297
Sensitive directional residual overcurrent and Chapter 6
power protection (PSDE, 67N) Current protection
298
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
6.1 Introduction
The increasing utilizing of the power system closer to the thermal limits have generated a need
of a thermal overload function also for power lines.
A thermal overload will often not be detected by other protection functions and the introduction
of the thermal overload function can allow the protected circuit to operate closer to the thermal
limits.
The three phase current measuring function has an I2t characteristic with settable time constant
and a thermal memory.
An alarm pickup gives early warning to allow operators to take action well before the line will
be tripped.
From the largest of the three phase currents a final temperature is calculated according to the
expression:
2
⎛ I ⎞
Θ final =⎜ ⎟⎟ ⋅ Tref
⎜ I ref
⎝ ⎠
(Equation 63)
where:
I is the largest phase current,
Iref is a given reference current and
Tref is steady state temperature corresponding to Iref
299
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
The ambient temperature is added to the calculated final temperature. If this temperature is larg-
er than the set operate temperature level a pickup output signal PICKUP is activated.
⎛ Δt
⎞
Θn = Θn −1 + ( Θ final − Θ n−1 ) ⋅ ⎜ 1 − e τ ⎟
−
⎝ ⎠
(Equation 64)
where:
Θn is the calculated present temperature,
Θn-1 is the calculated temperature at the previous time step,
Θfinal is the calculated final temperature with the actual current,
Δt is the time step between calculation of the actual temperature and
τ is the set thermal time constant for the protected device (line or cable)
The actual temperature of the protected component (line or cable) is calculated by adding the
ambient temperature to the calculated temperature, as shown above. The ambient temperature
can be given a constant value. The calculated component temperature can be monitored as it is
exported from the function as a real figure.
When the component temperature reaches the set alarm level AlarmTemp the output signal
ALARM is set. When the component temperature reaches the set trip level TripTemp the output
signal TRIP is set.
There is also a calculation of the present time to operation with the present current. This calcu-
lation is only performed if the final temperature is calculated to be above the operation temper-
ature:
⎛Θ − Θ operate ⎞
toperate = −τ ⋅ ln ⎜ final
⎜ Θ final − Θ n ⎟⎟
⎝ ⎠
(Equation 65)
The calculated time to trip can be monitored as it is exported from the function as a real figure
TTRIP.
After a trip, caused by the thermal overload protection function, there can be a lockout to recon-
nect the tripped circuit. The output lockout signal LOCKOUT is activated when the device tem-
perature is above the set lockout release temperature setting ReclTemp.
The time to lockout release is calculated, i.e. a calculation of the cooling time to a set value. The
thermal content of the function can be reset with input RESET.
300
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
⎛Θ − Θlockout _ release ⎞
tlockout _ release = −τ ⋅ ln ⎜ final ⎟⎟
⎜ Θ − Θ
⎝ final n ⎠
(Equation 66)
Here the final temperature is equal to the set or measured ambient temperature. The calculated
component temperature can be monitored as it is exported from the function as a real figure.
In some applications the measured current can involve a number of parallel lines. This is often
used for cable lines where one bay connects several parallel cables. By setting the parameter IM-
ult to the number of parallel lines (cables) the actual current on one line is used in the protection
algorithm. To activate this option the input MULTPU must be activated.
The function has a reset input: RESET. By activating this input the calculated temperature is re-
set to its default initial value. This is useful during testing when secondary injected current has
given a calculated “false” temperature level.
301
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
actual temperature
Calculation
of actual
temperature
I3P Calculation
of final
temperature
TRIP
Actual Temp
> TripTemp
S LOCKOUT
R
Actual Temp
< Recl Temp
Calculation
of time to time to reset of lockout
reset of
lockout
en05000736_ansi.vsd
302
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
THL1-
LPTTR_26
I3P TRIP
BLOCK PICKUP
BLKTR ALARM
MULTPU LOCKOUT
AMBTEMP
SENSFLT
RESET
en04000396_ansi.vsd
Table 158: Output signals for the LPTTR_26 (THL1-) function block
Signal Description
TRIP Trip
PICKUP Pickup Signal
ALARM Alarm signal
LOCKOUT Lockout signal
303
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
304
Thermal overload protection, one time Chapter 6
constant (PTTR, 26) Current protection
305
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
7.1 Introduction
The circuit breaker failure function ensures fast back-up tripping of surrounding breakers. The
breaker failure protection operation can be current based, contact based or adaptive combination
between these two principles.
A current check with extremely short reset time is used as a check criteria to achieve a high se-
curity against unnecessary operation.
The breaker failure protection can be single- or three-phase initiated to allow use with single
pole tripping applications. For the three-phase version of the breaker failure protection the cur-
rent criteria can be set to operate only if two out of four e.g. two phases or one phase plus the
residual current pickups. This gives a higher security to the back-up trip command.
The function can be programmed to give a single- or three phase re-trip of the own breaker to
avoid unnecessary tripping of surrounding breakers at an incorrect initiation due to mistakes dur-
ing testing.
The initiate signal can be phase selective or general (for all three phases). Phase selective initiate
signals enable single pole re-trip function. This means that a second attempt to open the breaker
is done. The re-trip attempt can be made after a set time delay. For transmission lines single pole
trip and autoreclosing is often used. The re-trip function can be phase selective if it is initiated
from phase selective line protection. The re-trip function can be done with or without current
check. With the current check the re-trip is only performed if the current through the circuit
breaker is larger than the operate current level.
The initiate signal can be an internal or external protection trip signal. If this initiate signal gets
high at the same time as current is detected through the circuit breaker, the back-up trip timer is
started. If the opening of the breaker is successful this is detected by the function, both by detec-
tion of low RMS current and by a special adapted algorithm. The special algorithm enables a
very fast detection of successful breaker opening, i.e. fast resetting of the current measurement.
If the current detection has not detected breaker opening before the back-up timer has run its
time a back-up trip is initiated. There is also a possibility to have a second back-up trip output
activated after an added settable time after the first back-up trip.
306
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
• The minimum length of the re-trip pulse, the back-up trip pulse and the back-up
trip pulse 2 are settable. The re-trip pulse, the back-up trip pulse and the back-up
trip pulse 2 will however sustain as long as there is an indication of closed break-
er.
• In the current detection it is possible to use three different options: 1 out of 3
where it is sufficient to detect failure to open (high current) in one pole, 1 out of
4 where it is sufficient to detect failure to open (high current) in one pole or high
residual current and 2 out of 4 where at least two current (phase current and/or
residual current) shall be high for breaker failure detection.
• The current detection for the residual current can be set different from the setting
of phase current detection.
• It is possible to have different re-trip time delays for single phase faults and for
multi-phase faults.
• The back-up trip can be made without current check. It is possible to have this
option activated for small load currents only.
• It is possible to have instantaneous back-up trip function if a signal is high if the
circuit breaker is insufficient to clear faults, for example at low gas pressure.
Current
AND
BLOCK
Current & tp
PU_IA
Contact 0-t1 TRRET_A
AND AND
0
BFI_3P
OR
BFI_A
OR
TRRET
OR
AND AND
52a_A
Contact
B C
en05000832_ansi.vsd
Figure 158: Simplified logic scheme of the retrip function
307
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
1 out of 3
1 of 3
OR
Current
AND
BLOCK
1 out of 4
Current &
PU_A
AND Contact AND 1 of 4
BFI_3P OR
BFI_A OR
OR
Current
AND AND
BLOCK
Current &
PU_B
AND Contact AND AND
BFI_3P
BFI_B OR
OR
AND
AND
Current
AND
BLOCK
AND
2 of 4
Current & OR
PU_C
AND Contact AND
BFI_3P
BFI_C OR 2 out of 4
OR
Current
AND
BLOCK
PU_N
AND
BFI_3P
en05000485_ansi.vsd
308
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
Internal logical signals PU_A, PU_B, PU_C have logical value 1 when current in respective
phase has magnitude larger than setting parameter Pickup_PH.
Internal logical signal PU_N has logical value 1 when neutral current has magnitude larger than
setting parameter Pickup_N.
1 of 4 0-t2
OR
0
tp
0-t3 TRBU2
0
2 of 3
AND
en06000223_ansi.vsd
Figure 160: Simplified logic scheme of the back-up trip function
BFP1-
CCRBRF_50BF
I3P TRBU
BLOCK TRBU2
BFI_3P TRRET
BFI_A TRRET_A
BFI_B TRRET_B
BFI_C TRRET_C
52A_A CBALARM
52A_B
52A_C
52FAIL
en06000188_ansi.vsd
309
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
Table 162: Output signals for the CCRBRF_50BF (BFP1-) function block
Signal Description
TRBU Back-up trip by breaker failure protection function
TRBU2 Second back-up trip by breaker failure protection function
TRRET Retrip by breaker failure protection function
TRRET_A Retrip by breaker failure protection function phase A
TRRET_B Retrip by breaker failure protection function phase B
TRRET_C Retrip by breaker failure protection function phase C
CBALARM Alarm for faulty circuit breaker
310
Breaker failure protection (RBRF, 50BF) Chapter 6
Current protection
Table 164: Advanced parameter group settings for the CCRBRF_50BF (BFP1-) function
Parameter Range Step Default Unit Description
Pickup_BlkCont 5 - 200 1 20 %IB Current for blocking of
CB contact operation in
% of IBase
t3 0.000 - 60.000 0.001 0.030 s Additional time delay to
27P2TDLY for a second
back-up trip
tCBAlarm 0.000 - 60.000 0.001 5.000 s Time delay for CB faulty
signal
311
Stub protection (PTOC, 50STB) Chapter 6
Current protection
8.1 Introduction
When a power line is taken out of service for maintenance and the line disconnector is opened
in multi-breaker arrangements the voltage transformers will mostly be outside on the discon-
nected part. The primary line distance protection will thus not be able to operate and must be
blocked.
The stub protection covers the zone between the current transformers and the open disconnector.
The three phase instantaneous overcurrent function is released from a 89b auxiliary contact on
the line disconnector.
312
Stub protection (PTOC, 50STB) Chapter 6
Current protection
BLOCK
TRIP
PU_A AND
PU_B OR
PU_C
ENABLE
en05000731_ansi.vsd
STB1-
STBPTOC_50STB
I3P TRIP
BLOCK PICKUP
BLKTR
ENABLE
en05000678_ansi.vsd
313
Stub protection (PTOC, 50STB) Chapter 6
Current protection
Table 167: Output signals for the STBPTOC_50STB (STB1-) function block
Signal Description
TRIP Trip
PICKUP Pickup
Table 169: Advanced parameter group settings for the STBPTOC_50STB (STB1-) func-
tion
Parameter Range Step Default Unit Description
t 0.000 - 60.000 0.001 0.000 s Time delay
314
Pole discrepancy protection (RPLD, 52PD) Chapter 6
Current protection
9.1 Introduction
Single pole operated circuit breakers can due to electrical or mechanical failures end up with the
different poles in different positions (close-open). This can cause negative and zero sequence
currents which gives thermal stress on rotating machines and can cause unwanted operation of
zero sequence or negative sequence current functions.
Normally the own breaker is tripped to correct the positions. If the situation warrants, the remote
end as well as the local bus breakers can be intertripped to clear the unsymmetrical load situa-
tion.
The pole discrepancy function operates based on information from auxiliary contacts of the cir-
cuit breaker for the three phases with additional criteria from unsymmetrical phase current when
required.
C.B.
52a
52a
+
52a
52b
315
Pole discrepancy protection (RPLD, 52PD) Chapter 6
Current protection
This single binary signal is connected to a binary input of the IED. The appearance of this signal
will start a timer that will give a trip signal after the set delay.
There is also a possibility to connect all phase selective auxiliary contacts (phase contact open
and phase contact closed) to binary inputs of the IED. This is shown in figure 165
C.B.
+ 52b
poleOneOpened from C.B.
52b poleTwoOpened from C.B.
52b poleThreeOpened from C.B.
en05000288_ansi.vsd
In this case the logic is realized within the function. If the inputs are indicating pole discrepancy
the trip timer is started. This timer will give a trip signal after the set delay.
Pole discrepancy can also be detected by means of phase selective current measurement. The
sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From
the fundamental frequency components of each phase current the RMS value of each phase cur-
rent is derived. These phase current values are fed to the PD (RPLD) function. The difference
between the smallest and the largest phase current is derived. If this difference is larger than a
set ratio the trip timer is started. This timer will give a trip signal after the set delay. The current
based pole discrepancy function can be set to be active either continuously or only directly in
connection to breaker open or close command.
The function also has a binary input that can be configured from the autoreclosing function, so
that the pole discrepancy function can be blocked during sequences with a single pole open if
single pole autoreclosing is used.
The simplified block diagram of the current and contact based pole discrepancy function is
shown in figure 166.
316
Pole discrepancy protection (RPLD, 52PD) Chapter 6
Current protection
BLOCK
OR
BLKDBYAR
PolPosAuxCont
AND
52b_A
52a_A
52b_B Pole
52a_B Disc repancy
52b_C detection
52a_C 150 ms
0- t TRIP
AND
0
OR
PD signal from CB
AND
EXTPDIND
CLOSECMD t+ 200 ms
OR
OPENCMD
AND
Unsymmetry current
detection
en 05000747_ansi.vsd
Figure 166: Simplified block diagram of pole discrepancy function - contact and current based
• The terminal is in TEST mode (TEST-ACTIVE is high) and the function has
been blocked from the HMI (BlockPD=Yes)
• The input signal BLOCK is high
• The input signal BLKDBYAR is high
The BLOCK signal is a general purpose blocking signal of the pole discrepancy function. It can
be connected to a binary input of the terminal in order to receive a block command from external
devices or can be software connected to other internal functions of the terminal itself in order to
receive a block command from internal functions. Through OR gate it can be connected to both
binary inputs and internal function outputs.
The BLKDBYAR signal blocks the pole discrepancy operation when a single phase autoreclos-
ing cycle is in progress. It can be connected to the output signal AR01-1PT1 if the autoreclosing
function is integrated in the terminal; if the autoreclosing function is an external device, then
BLKDBYAR has to be connected to a binary input of the terminal and this binary input is con-
nected to a signalization “1phase autoreclosing in progress” from the external autoreclosing de-
vice.
If the pole discrepancy function is enabled, then two different criteria will generate a trip signal
TRIP:
317
Pole discrepancy protection (RPLD, 52PD) Chapter 6
Current protection
• any phase current is lower than CurrUnsymPU of the highest current in the re-
maining two phases
• the highest phase current is greater than CurrRelPU of the rated current
If these conditions are true, an unsymmetrical condition is detected and the internal signal INPS
is turned high. This detection is enabled to generate a trip after a set time delay t (0-60 s) if the
detection occurs in the next 200 ms after the circuit breaker has received a command to open trip
or close and if the unbalance persists. The 200 ms limitation is for avoiding unwanted operation
during unsymmetrical load conditions.
The pole discrepancy function is informed that a trip or close command has been given to the
circuit breaker through the inputs CLOSECMD (for closing command information) and
OPENCMD (for opening command information). These inputs can be connected to terminal bi-
nary inputs if the information are generated from the field (i.e. from auxiliary contacts of the
close and open push buttons) or may be software connected to the outputs of other integrated
functions (i.e. close command from a control function or a general trip from integrated protec-
tions).
PD01-
CCRPLD_52PD
I3P TRIP
BLOCK PICKUP
BLKDBYAR
CLOSECMD
OPENCMD
EXTPDIND
52B_A
52A_A
52B_B
52A_B
52B_C
52A_C
en06000275_ansi.vsd
318
Pole discrepancy protection (RPLD, 52PD) Chapter 6
Current protection
Table 172: Output signals for the CCRPLD_52PD (PD01-) function block
Signal Description
TRIP Trip signal to CB
PICKUP Trip condition TRUE, waiting for time delay
319
Pole discrepancy protection (RPLD, 52PD) Chapter 6
Current protection
320
Directional underpower protection (PDUP, 32) Chapter 6
Current protection
10.1 Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on
a rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that it does not
cover bearing losses and ventilation losses. Then, the synchronous generator becomes a syn-
chronous motor and starts to take electric power from the rest of the power system. This operat-
ing state, where individual synchronous machines operate as motors, implies no risk for the
machine itself. If the generator under consideration is very large and if it consumes lots of elec-
tric power, it may be desirable to disconnect it to ease the task for the rest of the power system.
Often, the motoring condition may imply that the turbine is in a very dangerous state. The task
of the reverse power protection is to protect the turbine and not to protect the generator itself.
Figure 168 illustrates the reverse power protection with underpower relay and with overpower
relay. The underpower relay gives a higher margin and should provide better dependability. On
the other hand, the risk for unwanted operation immediately after synchronization may be high-
er. One should set the underpower relay to trip if the active power from the generator is less than
about 2%. One should set the overpower relay to trip if the power flow from the network to the
generator is higher than 1% depending on the type of turbine.
Operate
Q Q
Operate
Line Line
Margin Margin
P P
en06000315.vsd
321
Directional underpower protection (PDUP, 32) Chapter 6
Current protection
Chosen current
phasors P
P = POWRE
Q = POWIM
en06000438_ansi.vsd
The function will use voltage and current phasors calculated in the pre-processing blocks. The
apparent complex power is calculated according to chosen formula as shown in table 175.
322
Directional underpower protection (PDUP, 32) Chapter 6
Current protection
Arone
S = VAB ⋅ I A* − VBC ⋅ IC *
PosSeq
S = 3 ⋅ VPosSeq ⋅ I PosSeq*
AB
S = VAB ⋅ ( I A* − I B* )
BC
S = VBC ⋅ ( I B* − IC * )
CA
S = VCA ⋅ ( I C * − I A* )
A
S = 3 ⋅ V A ⋅ I A*
B
S = 3 ⋅ VB ⋅ I B*
C
S = 3 ⋅ VC ⋅ I C *
NegSeq
S = 3 ⋅ VNegSeq ⋅ I NegSeq *
The active and reactive power is available from the function and can be used for monitoring and
fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this
angle is 0° the active power component P is calculated. If this angle is 90° the reactive power
component Q is calculated.
323
Directional underpower protection (PDUP, 32) Chapter 6
Current protection
The calculated power component is compared to the power pick up setting Power1(2). A pickup
signal PICKUP1(2) is activated if the calculated power component is smaller than the pick up
value. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the pickup sig-
nal is still active. At activation of any of the two stages a common signal PICKUP will be acti-
vated. At trip from any of the two stages also a common signal TRIP will be activated.
To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis
of the stage1(2) is Hysteresis1(2) = abs (Power1(2) + drop-power1(2)). For generator low for-
ward power protection the power setting is very low, normally down to 0.02 pu of rated gener-
ator power. The hysteresis should therefore be set to a smaller value. The drop-power value of
stage1 can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) +
Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would
be too small. In such cases, the hysteresis1 greater than (0.5 * Power1(2)) is corrected to the min-
imal value.
If the measured power drops under the drop-power1(2) value the function will reset after a set
time DropDelay1(2). The reset means that the pickup signal will drop out ant that the timer of
the stage will reset.
S = k ⋅ SOld + (1 − k ) ⋅ SCalculated
(Equation 67)
Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle
SCalcu- is the new calculated value in the present execution cycle
lated
k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is immediately
given out without any filtering (i.e. without any additional delay). When k is set to value bigger
than 0, the filtering is enabled. A typical value for k = 0.14.
324
Directional underpower protection (PDUP, 32) Chapter 6
Current protection
Magnitude
% of In compensation
-10
IMagComp5 Measured
IMagComp30 current
IMagComp100
5 30 100 % of In
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
-10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of In
-10
en05000652_ansi.vsd
The first current and voltage phase in the group signals will be used as reference and the ampli-
tude and angle compensation will be used for related input signals.
Analog outputs from the function can be used for service values or in the disturbance report. The
active power is provided as a MW value: P, or in percent of base power: PPERCENT. The re-
active power is provided as a Mvar value: Q, or in percent of base power: QPERCENT.
325
Directional underpower protection (PDUP, 32) Chapter 6
Current protection
GUP1-
GUPPDUP_37
I3P TRIP
V3P TRIP1
BLOCK TRIP2
BLOCK1 PICKUP
BLOCK2 PICKUP1
PICKUP2
P
PPERCENT
Q
QPERCENT
en07000027_ansi.vsd
Table 177: Output signals for the GUPPDUP_37 (GUP1-) function block
Signal Description
TRIP Common trip signal
TRIP1 Trip of stage 1
TRIP2 Trip of stage 2
PICKUP Common pickup
PICKUP1 Pickup of stage 1
PICKUP2 Pickup of stage 2
P Active Power in MW
PPERCENT Active power in % of SBASE
Q Reactive power in Mvar
QPERCENT Reactive power in % of SBASE
326
Directional underpower protection (PDUP, 32) Chapter 6
Current protection
Table 179: Basic parameter group settings for the GUPPDUP_37 (GUP1-) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Operation Disable /
Enabled Enable
OpMode1 Disabled - UnderPower - Operation mode 1
UnderPower
Power1 0.0 - 500.0 0.1 1.0 %SB Power setting for stage 1
in % of Sbase
Angle1 -180.0 - 180.0 0.1 0.0 Deg Angle for stage 1
TripDelay1 0.010 - 6000.000 0.001 1.000 s Trip delay for stage 1
DropDelay1 0.010 - 6000.000 0.001 0.060 s Drop delay for stage 1
OpMode2 Disabled - UnderPower - Operation mode 2
UnderPower
Power2 0.0 - 500.0 0.1 1.0 %SB Power setting for stage 2
in % of Sbase
Angle2 -180.0 - 180.0 0.1 0.0 Deg Angle for stage 2
TripDelay2 0.010 - 6000.000 0.001 1.000 s Trip delay for stage 2
DropDelay2 0.010 - 6000.000 0.001 0.060 s Drop delay for stage 2
327
Directional underpower protection (PDUP, 32) Chapter 6
Current protection
Table 180: Advanced parameter group settings for the GUPPDUP_37 (GUP1-) function
Parameter Range Step Default Unit Description
TD 0.00 - 0.99 0.01 0.00 - Low pass filter coefficient
for power measurement,
P and Q
Hysteresis1 0.2 - 5.0 0.1 0.5 pu Absolute hysteresis of
stage 1
Hysteresis2 0.2 - 5.0 0.1 0.5 pu Absolute hysteresis of
stage 2
IMagComp5 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate current at 5% of In
IMagComp30 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate current at 30% of In
IMagComp100 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate current at 100% of
In
VMagComp5 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate voltage at 5% of Vn
VMagComp30 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate voltage at 30% of
Vn
VMagComp100 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate voltage at 100% of
Vn
IAngComp5 -10.000 - 10.000 0.001 0.000 Deg Angle calibration for cur-
rent at 5% of In
IAngComp30 -10.000 - 10.000 0.001 0.000 Deg Angle calibration for cur-
rent at 30% of In
IAngComp100 -10.000 - 10.000 0.001 0.000 Deg Angle calibration for cur-
rent at 100% of In
At low setting:
(0.5-2.5)% of Sbase < ± 20% of set value
(2.5-10)% of Sbase < ± 10% of set value
Characteristic angle (-180.0–180.0) degrees 2 degrees
Timers (0.00-6000.00) s ± 0.5% ± 10 ms
328
Directional overpower protection (PDOP, 32) Chapter 6
Current protection
11.1 Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on
a rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that it does not
cover bearing losses and ventilation losses. Then, the synchronous generator becomes a syn-
chronous motor and starts to take electric power from the rest of the power system. This operat-
ing state, where individual synchronous machines operate as motors, implies no risk for the
machine itself. If the generator under consideration is very large and if it consumes lots of elec-
tric power, it may be desirable to disconnect it to ease the task for the rest of the power system.
Often, the motoring condition may imply that the turbine is in a very dangerous state. The task
of the reverse power protection is to protect the turbine and not to protect the generator itself.
Figure 172 illustrates the reverse power protection with underpower relay and with overpower
relay. The underpower relay gives a higher margin and should provide better dependability. On
the other hand, the risk for unwanted operation immediately after synchronization may be high-
er. One should set the underpower relay to trip if the active power from the generator is less than
about 2%. One should set the overpower relay to trip if the power flow from the network to the
generator is higher than 1%.
Operate
Q Q
Operate
Line Line
Margin Margin
P P
en06000315.vsd
Figure 172: Reverse power protection with underpower relay and overpower relay
329
Directional overpower protection (PDOP, 32) Chapter 6
Current protection
Chosen current
phasors P
P = POWRE
Q = POWIM
en06000567_ansi.vsd
The function will use voltage and current phasors calculated in the pre-processing blocks. The
apparent complex power is calculated according to chosen formula as shown in table 182.
330
Directional overpower protection (PDOP, 32) Chapter 6
Current protection
Arone * *
S = V AB ⋅ I A − V BC ⋅ I C
PosSeq *
S = 3 ⋅ V PosSeq ⋅ I PosSeq
A,B * *
S = V AB ⋅ (I A − I B )
B,C * *
S = V BC ⋅ (I B − I C )
C,A * *
S = V CA ⋅ (I C − I A )
A *
S = 3 ⋅ V A ⋅ IA
B *
S = 3 ⋅ V B ⋅ IB
C *
S = 3 ⋅ V C ⋅ IC
The active and reactive power is available from the function and can be used for monitoring and
fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this
angle is 0° the active power component P is calculated. If this angle is 90° the reactive power
component Q is calculated.
The calculated power component is compared to the power pick up setting Power1(2). A pickup
signal PICKUP1(2) is activated if the calculated power component is larger than the pick up val-
ue. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the pickup signal
is still active. At activation of any of the two stages a common signal PICKUP will be activated.
At trip from any of the two stages also a common signal TRIP will be activated.
331
Directional overpower protection (PDOP, 32) Chapter 6
Current protection
To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis
of the stage1(2) is Hysteresis1(2) = abs (Power1(2) – drop-power1(2)). For generator reverse
power protection the power setting is very low, normally down to 0.02 pu of rated generator
power. The hysteresis should therefore be set to a smaller value. The drop-power value of stage1
can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) –
Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would
be too small. In such cases, the hysteresis1 greater than (0.5 * Power1(2)) is corrected to the min-
imal value.
If the measured power drops under the drop-power1(2) value the function will reset after a set
time DropDelay1(2). The reset means that the pickup signal will drop out ant that the timer of
the stage will reset.
S = k ⋅ SOld + (1 − k ) ⋅ SCalculated
(Equation 68)
Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle
SCalcu- is the new calculated value in the present execution cycle
lated
k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is immediately
given out without any filtering (i.e. without any additional delay). When k is set to value bigger
than 0, the filtering is enabled. A typical value for k = 0.14.
332
Directional overpower protection (PDOP, 32) Chapter 6
Current protection
Magnitude
% of In compensation
-10
IMagComp5 Measured
IMagComp30 current
IMagComp100
5 30 100 % of In
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
-10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of In
-10
en05000652_ansi.vsd
The first current and voltage phase in the group signals will be used as reference and the ampli-
tude and angle compensation will be used for related input signals.
Analog outputs from the function can be used for service values or in the disturbance report. The
active power is provided as a MW value: P, or in percent of base power: PPERCENT. The re-
active power is provided as a Mvar value: Q, or in percent of base power: QPERCENT.
333
Directional overpower protection (PDOP, 32) Chapter 6
Current protection
GOP1-
GOPPDOP_32
I3P TRIP
V3P TRIP1
BLOCK TRIP2
BLOCK1 PICKUP
BLOCK2 PICKUP1
PICKUP2
P
PPERCENT
Q
QPERCENT
en07000028_ansi.vsd
Table 184: Output signals for the GOPPDOP_32 (GOP1-) function block
Signal Description
TRIP Common trip signal
TRIP1 Trip of stage 1
TRIP2 Trip of stage 2
PICKUP Common pickup
PICKUP1 Pickup of stage 1
PICKUP2 Pickup of stage 2
P Active Power in MW
PPERCENT Active power in % of SBASE
Q Reactive power in Mvar
QPERCENT Reactive power in % of SBASE
334
Directional overpower protection (PDOP, 32) Chapter 6
Current protection
Table 186: Basic parameter group settings for the GOPPDOP_32 (GOP1-) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Operation Disable /
Enabled Enable
OpMode1 Disabled - OverPower - Operation mode 1
OverPower
Power1 0.0 - 500.0 0.1 120.0 %SB Power setting for stage 1
in % of Sbase
Angle1 -180.0 - 180.0 0.1 0.0 Deg Angle for stage 1
TripDelay1 0.010 - 6000.000 0.001 1.000 s Trip delay for stage 1
DropDelay1 0.010 - 6000.000 0.001 0.060 s Drop delay for stage 1
OpMode2 Disabled - OverPower - Operation mode 2
OverPower
Power2 0.0 - 500.0 0.1 120.0 %SB Power setting for stage 2
in % of Sbase
Angle2 -180.0 - 180.0 0.1 0.0 Deg Angle for stage 2
TripDelay2 0.010 - 6000.000 0.001 1.000 s Trip delay for stage 2
DropDelay2 0.010 - 6000.000 0.001 0.060 s Drop delay for stage 2
335
Directional overpower protection (PDOP, 32) Chapter 6
Current protection
Table 187: Advanced parameter group settings for the GOPPDOP_32 (GOP1-) function
Parameter Range Step Default Unit Description
k 0.00 - 0.99 0.01 0.00 - Low pass filter coefficient
for power measurement,
P and Q
Hysteresis1 0.2 - 5.0 0.1 0.5 pu Absolute hysteresis of
stage 1 in % of Sbase
Hysteresis2 0.2 - 5.0 0.1 0.5 pu Absolute hysteresis of
stage 2 in % of Sbase
IMagComp5 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate current at 5% of In
IMagComp30 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate current at 30% of In
IMagComp100 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate current at 100% of
In
VMagComp5 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate voltage at 5% of Vn
VMagComp30 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate voltage at 30% of
Vn
VMagComp100 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate voltage at 100% of
Vn
IAngComp5 -10.000 - 10.000 0.001 0.000 Deg Angle calibration for cur-
rent at 5% of In
IAngComp30 -10.000 - 10.000 0.001 0.000 Deg Angle calibration for cur-
rent at 30% of In
IAngComp100 -10.000 - 10.000 0.001 0.000 Deg Angle calibration for cur-
rent at 100% of In
At low setting:
(0.5-2.5)% of Sbase < ± 20% of set value
(2.5-10)% of Sbase < ± 10% of set value
Characteristic angle (-180.0–180.0) degrees 2 degrees
Timers (0.00-6000.00) s ± 0.5% ± 10 ms
336
Broken conductor check (PTOC, 46) Chapter 6
Current protection
12.1 Introduction
Conventional protection functions can not detect the broken conductor condition. The broken
conductor monitoring function (BRC), consisting of continuous current unsymmetry check on
the line where the terminal is connected will give alarm or trip at detecting broken conductors.
• The difference in currents between the phase with the lowest current and the
phase with the highest current is greater than set percentage Pickup_ub of the
highest phase current
• The lowest phase current is below 50% of the minimum setting value Pickup_PH
The third condition is included to avoid problems in systems involving parallel lines. If a con-
ductor breaks in one phase on one line the parallel line will experience an increase in current in
the same phase. This might result in the first two conditions being satisfied. If the unsymmetrical
detection lasts for a period longer than the set time tOper the TRIP output is activated.
The simplified logic diagram of the broken conductor check function is shown in figure 176
• The IED is in TEST status and the function has been blocked from the HMI test
menu (BlockBRC=Yes).
• The input signal BLOCK is high.
The BLOCK input can be connected to a binary input of the terminal in order to receive a block
command from external devices or can be software connected to other internal functions of the
terminal itself in order to receive a block command from internal functions.
The output trip signal TRIP is a three phase trip. It can be used to command a trip to the circuit
breaker or for alarm purpose only.
337
Broken conductor check (PTOC, 46) Chapter 6
Current protection
TEST
TEST-ACTIVE
AND
BlockBRC = Yes
BRC--START
Function Enable
BRC--BLOCK OR
0-t BRC--TRIP
Unsymmetrical AND
0
Current Detection
PU_ub
IA<50%Pickup_PN
IB<50%Pickup_PN OR
IC<50%Pickup_PN
en07000123.vsd
Figure 176: Simplified logic diagram for broken conductor check function.
BRC1-
BRCPTOC_46
I3P TRIP
BLOCK PICKUP
BLKTR
en07000034_ansi.vsd
338
Broken conductor check (PTOC, 46) Chapter 6
Current protection
Table 190: Output signals for the BRCPTOC_46 (BRC1-) function block
Signal Description
TRIP Operate signal of the protection logic
PICKUP Pickup signal of the protection logic
Table 192: Advanced parameter group settings for the BRCPTOC_46 (BRC1-) function
Parameter Range Step Default Unit Description
tReset 0.010 - 60.000 0.001 0.100 s Time delay in reset
339
Broken conductor check (PTOC, 46) Chapter 6
Current protection
340
About this chapter Chapter 7
Voltage protection
341
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
1.1 Introduction
Undervoltages can occur in the power system during faults or abnormal conditions. The function
can be used to open circuit breakers to prepare for system restoration at power outages or as
long-time delayed back-up to primary protection.
The function has two voltage steps, each with inverse or definite time delay.
The undervoltage protection function can be set to measure phase to ground fundamental value,
phase to phase fundamental value, phase to ground RMS value or phase to phase RMS value.
The choise of the measuring is done by the parameter ConnType in PST or LHMI under Generall
Settings/Voltage protection. The voltage related settings are made in percent of base voltage
which is set i kV phase-phase voltage This means operation for phase to ground voltage under:
(Equation 69)
342
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
To avoid oscillations of the output pickup signal, a hysteresis has been included.
TD
t=
⎛ V − Vpickup
⎜ Vpickup
⎝
(Equation 71)
TD ⋅ 480
t= 2.0
+ 0.05
⎛ Vpickup < -V ⎞
⎜ 32 ⋅ − 0.5 ⎟
⎝ Vpickup < ⎠
(Equation 72)
⎡ ⎤
⎢ ⎥
⎢ TD ⋅ A ⎥
t=
⎢ ⎛ Vpickup < −V ⎞ ⎥
P
⎢⎜ B ⋅ −C⎟ ⎥
⎣⎝ Vpickup ⎠ ⎦ (Equation 73)
343
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
When the denominator in the expression is equal to zero the time delay will be infinity. There
will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate
for this phenomenon. In the voltage interval Vpickup< down to Vpickup< *(1.0 – CrvSatn/100)
the used voltage will be: Vpickup<*(1.0 – CrvSatn/100). If the programmable curve is used this
parameter must be calculated so that:
CrvSatn
B⋅ −C > 0
100
(Equation 74)
The lowest voltage is always used for the inverse time delay integration. The details of the dif-
ferent inverse time characteristics are shown in section 3 "Inverse characteristics".
Trip signal issuing requires that the undervoltage condition continues for at least the user set
time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by
some special voltage level dependent time curves for the inverse time mode (TOV). If the pickup
condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled
again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2pickup for the inverse time) the corresponding pickup output is reset. Here it should be
noted that after leaving the hysteresis area, the pickup condition must be fulfilled again and it is
not sufficient for the signal to only return back to the hysteresis area. Note that for the undervolt-
age function the TOV reset time is constant and does not depend on the voltage fluctuations dur-
ing the drop-off period. However, there are three ways to reset the timer, either the timer is reset
instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly
decreased during the reset time. See figure 178 and figure 179.
344
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
tReset1
tReset1
Voltage Measured
PICKUP Voltage
Hysteresis
TRIP
PICKUP1
Time
PICKUP t1
TRIP
Time
Integrator Froozen Timer
t1
Time
Instantaneous
Linear Decrease
Reset en05000010_ansi.vsd
Figure 178: Voltage profile not causing a reset of the pickup signal for step 1, and definite time
delay
345
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
tReset1
Voltage
tReset1
PICKUP
PICKUP
Hysteresis Measured Voltage
TRIP
PICKUP1
Time
PICKUP t1
TRIP
Time Integrator
Frozen Timer
t1
Time
Instantaneous
Linear Decrease
Reset en05000011_ansi.vsd
Figure 179: Voltage profile causing a reset of the pickup signal for step 1, and definite time de-
lay
1.2.3 Blocking
The undervoltage function can be partially or totally blocked, by binary input signals or by pa-
rameter settings, where:
346
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
If the measured voltage level decreases below the setting of IntBlkStVal1, either the trip output
of step 1, or both the trip and the pickup outputs of step 1, are blocked. The characteristic of the
blocking is set by the IntBlkSel1 parameter. This internal blocking can also be set to "off" result-
ing in no voltage based blocking. Corresponding settings and functionality are valid also for step
2.
In case of disconnection of the high voltage component the measured voltage will get very low.
The event will pickup both the under voltage function and the blocking function, as seen in fig-
ure 180. The delay of the blocking function must be set less than the time delay of under voltage
function.
347
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
V Disconnection
Normal voltage
Pickup1
Pickup2
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466_ansi.vsd
1.2.4 Design
The voltage measuring elements continuously measure the three phase-to-neutral voltages or the
three phase to phase voltages. Recursive Fourier filters or RMS filters based on one fundamental
cycle filter the input voltage signals. The voltages are individually compared to the set value,
and the lowest voltage is used for the inverse time characteristic integration. A special logic is
included to achieve the "1 out of 3", "2 out of 3" and "3 out of 3" criteria to fulfill the pickup
condition. The design of the TimeUnderVoltage function is schematically described in
figure 181.
348
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
Step 1
Time integrator TR1L2
t1 TRIP
MinVoltSelector
tReset1
ResetTypeCrv1 TR1L3
TR1
OR
Comparator ST2L1
VL1 < V2< Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
VL2 < V2< 1 out of 3
2 outof 3 ST2L3
Phase 3 Pickup
Comparator 3 out of 3
&
VL3 < V2< Trip ST2
Output OR
Step 2
Time integrator TR2L2
t2 TRIP
MinVoltSelector
tReset2
ResetTypeCrv2 TR2L3
TR2
OR
PICKU
OR P
TRIP
OR
en05000012 ansi.vsd
349
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
TUV1-
UV2PTUV_27
V3P TRIP
BLOCK TRST1
BLKTR1 TRST1_A
BLK1 TRST1_B
BLKTR2 TRST1_C
BLK2 TRST2
TRST2_A
TRST2_B
TRST2_C
PICKUP
PU_ST1
PU_ST1_A
PU_ST1_B
PU_ST1_C
PU_ST2
PU_ST2_A
PU_ST2_B
PU_ST2_C
en06000276_ansi.vsd
Table 195: Output signals for the UV2PTUV_27 (TUV1-) function block
Signal Description
TRIP Trip
TRST1 Common trip signal from step1
TRST1_A Trip signal from step1 phase A
TRST1_B Trip signal from step1 phase B
TRST1_C Trip signal from step1 phase C
TRST2 Common trip signal from step2
TRST2_A Trip signal from step2 phase A
350
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
Signal Description
TRST2_B Trip signal from step2 phase B
TRST2_C Trip signal from step2 phase C
PICKUP General pickup signal
PU_ST1 Common pickup signal from step1
PU_ST1_A Pickup signal from step1 phase A
PU_ST1_B Pickup signal from step1 phase B
PU_ST1_C Pickup signal from step1 phase C
PU_ST2 Common pickup signal from step2
PU_ST2_A Pickup signal from step2 phase A
PU_ST2_B Pickup signal from step2 phase B
PU_ST2_C Pickup signal from step2 phase C
Table 197: Basic parameter group settings for the UV2PTUV_27 (TUV1-) function
Parameter Range Step Default Unit Description
Operation Disabled - Disabled - Disable/Enable Opera-
Enabled tion
VBase 0.05 - 2000.00 0.05 400.00 kV Base voltage
OperationStep1 Disabled - Enabled - Enable execution of step
Enabled 1
Characterist1 Definite time - Definite time - Selection of time delay
Inverse curve A curve type for step 1
Inverse curve B
Prog. inv. curve
OpMode1 1 out of 3 - 1 out of 3 - Number of phases
2 out of 3 required for op (1 of 3, 2
3 out of 3 of 3, 3 of 3) from step 1
351
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
352
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
Table 198: Advanced parameter group settings for the UV2PTUV_27 (TUV1-) function
Parameter Range Step Default Unit Description
tReset1 0.000 - 60.000 0.001 0.025 s Reset time delay used in
IEC Definite Time curve
step 1
ResetTypeCrv1 Instantaneous - Instantaneous - Selection of reset curve
Frozen timer type for step 1
Linearly decreased
tIReset1 0.000 - 60.000 0.001 0.025 s Time delay in
Inverse-Time reset (s),
step 1
ACrv1 0.005 - 200.000 0.001 1.000 - Parameter A for cus-
tomer programmable
curve for step 1
BCrv1 0.50 - 100.00 0.01 1.00 - Parameter B for cus-
tomer programmable
curve for step 1
CCrv1 0.0 - 1.0 0.1 0.0 - Parameter C for cus-
tomer programmable
curve for step 1
DCrv1 0.000 - 60.000 0.001 0.000 - Parameter D for cus-
tomer programmable
curve for step 1
PCrv1 0.000 - 3.000 0.001 1.000 - Parameter P for cus-
tomer programmable
curve for step 1
CrvSat1 0 - 100 1 0 % Tuning param for prog.
under voltage
Inverse-Time curve, step
1
tReset2 0.000 - 60.000 0.001 0.025 s Reset time delay used in
IEC Definite Time curve
step 2
ResetTypeCrv2 Instantaneous - Instantaneous - Selection of reset curve
Frozen timer type for step 2
Linearly decreased
tIReset2 0.000 - 60.000 0.001 0.025 s Time delay in
Inverse-Time reset (s),
step 2
ACrv2 0.005 - 200.000 0.001 1.000 - Parameter A for cus-
tomer programmable
curve for step 2
353
Two step undervoltage protection (PTUV, 27) Chapter 7
Voltage protection
354
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
2.1 Introduction
Overvoltages will occur in the power system during abnormal conditions such as sudden power
loss, tap changer regulating failures, open line ends on long lines.
The function can be used as open line end detector, normally then combined with directional re-
active over-power function or as system voltage supervision, normally then giving alarm only
or switching in reactors or switch out capacitor banks to control the voltage.
The function has two voltage steps, each of them with inverse or definite time delayed.
The overvoltage function has an extremely high reset ratio to allow setting close to system ser-
vice voltage.
The voltage related settings are made in percent of the base voltage, which is set in kV,
phase-phase.
The overvoltage protection function can be set to measure phase to ground fundamental value,
phase to phase fundamental value, phase to ground RMS value or phase to phase RMS value.
The choise of measuring is done by the parameter ConnType in PST or LHMI under Generall
Settings/Voltage protection. The setting of the analog inputs are given as primary phase to phase
voltage and secondary phase to phase voltage. The function will operate if the voltage gets high-
er than the set percentage of the set base voltage VBase. This means operation for phase to
ground voltage over:
355
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
V > ( % ) ⋅ VBase ( kV )
3
(Equation 75)
To avoid oscillations of the output pickup signal, a hysteresis has been included.
TD
t=
⎛ V −V > ⎞
⎜ ⎟
⎝ V> ⎠
(Equation 77)
356
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
k ⋅ 480
t=
U −U >
2.0
⎛ ⎞
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ U> ⎠
TD ⋅ 480
t= 2.0
⎛ V − Vpickup ⎞
⎜ 32 ⋅ Vpickup − 0.5 ⎟ − 0.035
⎝ ⎠
(Equation 78)
TD ⋅ 480
t= 3.0
⎛ V − Vpickup ⎞
⎜ 32 ⋅ Vpickup − 0.5 ⎟ − 0.035
⎝ ⎠
(Equation 79)
TD ⋅ A
t= +D
⎛ V − Vpickup ⎞
P
⎜B⋅ −C⎟
⎝ Vpickup ⎠
(Equation 80)
When the denominator in the expression is equal to zero the time delay will be infinity. There
will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate
for this phenomenon. In the voltage interval Vpickup down to Vpickup *(1.0 – CrvSatn/100) the
used voltage will be: Vpickup *(1.0 – CrvSatn/100). If the programmable curve is used this pa-
rameter must be calculated so that:
CrvSatn
B⋅ −C > 0
100
(Equation 81)
The highest phase (or phase to phase) voltage is always used for the inverse time delay integra-
tion, see figure 183. The details of the different inverse time characteristics are shown in section
3 "Inverse characteristics".
357
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
Voltage
Inverse Time Voltage
VA
VB
VC
Time
en05000016_ansi.vsd
Figure 183: Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the overvoltage condition continues for at least the user set time
delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by se-
lected voltage level dependent time curves for the inverse time mode (TOV). If the pickup con-
dition, with respect to the measured voltage ceases during the delay time, and is not fulfilled
again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2 for the inverse time) the corresponding pickup output is reset, after that the defined reset
time has elapsed. Here it should be noted that after leaving the hysteresis area, the pickup con-
dition must be fulfilled again and it is not sufficient for the signal to only return back to the hys-
teresis area. The hysteresis value for each step is settable (HystAbs2) to allow an high and
accurate reset of the function. It is also remarkable that for the overvoltage function the TOV
reset time is constant and does not depend on the voltage fluctuations during the drop-off period.
However, there are three ways to reset the timer, either the timer is reset instantaneously, or the
timer value is frozen during the reset time, or the timer value is linearly decreased during the
reset time..
2.2.3 Blocking
The overvoltage function can be partially or totally blocked, by binary input signals where:
358
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
2.2.4 Design
The voltage measuring elements continuously measure the three phase-to-ground voltages or the
three phase to phasel voltages. Recursive Fourier filters filter the input voltage signals. The
phase voltages are individually compared to the set value, and the highest voltage is used for the
inverse time characteristic integration. A special logic is included to achieve the "1 out of 3", "2
out of 3" and "3 out of 3" criteria to fulfill the pickup condition. The design of the TimeOver-
Voltage function is schematically described in figure 184.
359
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
Comparator
VA PU_ST1_A
VA >
PhaseA
Pickup1 Voltage Phase
Comparator Selector PU_ST1_B
VB OpMode1 PhaseB
VB >
Pickup1 1 out of3
2 outof3 PU_ST1_C
Comparator 3 out of3 PhaseC Pickup
VC &
VC >
Pickup1 Trip PU_ST1
OR
Output
PICKUP Logic TRST1-A
Step1
Time integrator TRST1_B
MaxVoltSelect t1 TRIP
or tReset1
ResetTypeCrv 1 TRST1_C
OR TRST1
Comparator
VA > PU_ST2_A
Pickup2 PhaseA
Voltage Phase
Comparator Selector PU_ST2_B
VB > OpMode2 PhaseB
Pickup2 1 out of3
2 outof3 PU_ST2_C
Comparator 3 out of3 PhaseC Pickup
VC > &
Trip PU_ST2
Pickup2 OR
Output
PICKUP Logic TRST2-A
Step2
Time integrator TRST2-B
MaxVoltSelect t2 TRIP
or tReset2
ResetTypeCrv 2 TRST2-C
TRST2
OR
PICKUP
OR
TRIP
OR
360
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
TOV1-
OV2PTOV_59
V3P TRIP
BLOCK TRST1
BLKTR1 TRST1_A
BLK1 TRST1_B
BLKTR2 TRST1_C
BLK2 TRST2
TRST2_A
TRST2_B
TRST2_C
PICKUP
PU_ST1
PU_ST1_A
PU_ST1_B
PU_ST1_C
PU_ST2
PU_ST2_A
PU_ST2_B
PU_ST2_C
en06000277_ansi.vsd
Table 201: Output signals for the OV2PTOV_59 (TOV1-) function block
Signal Description
TRIP Trip
TRST1 Common trip signal from step1
TRST1_A Trip signal from step1 phase A
TRST1_B Trip signal from step1 phase B
TRST1_C Trip signal from step1 phase C
TRST2 Common trip signal from step2
TRST2_A Trip signal from step2 phase A
361
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
Signal Description
TRST2_B Trip signal from step2 phase B
TRST2_C Trip signal from step2 phase C
PICKUP General pickup signal
PU_ST1 Common pickup signal from step1
PU_ST1_A Pickup signal from step1 phase A
PU_ST1_B Pickup signal from step1 phase B
PU_ST1_C Pickup signal from step1 phase C
PU_ST2 Common pickup signal from step2
PU_ST2_A Pickup signal from step2 phase A
PU_ST2_B Pickup signal from step2 phase B
PU_ST2_C Pickup signal from step2 phase C
Table 203: Basic parameter group settings for the OV2PTOV_59 (TOV1-) function
Parameter Range Step Default Unit Description
Operation Disabled - Disabled - Disable/Enable Opera-
Enabled tion
VBase 0.05 - 2000.00 0.05 400.00 kV Base voltage
OperationStep1 Disabled - Enabled - Enable execution of step
Enabled 1
Characterist1 Definite time - Definite time - Selection of time delay
Inverse curve A curve type for step 1
Inverse curve B
Inverse curve C
Prog. inv. curve
OpMode1 1 out of 3 - 1 out of 3 - Number of phases
2 out of 3 required for op (1 of 3, 2
3 out of 3 of 3, 3 of 3) from step 1
362
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
363
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
Table 204: Advanced parameter group settings for the OV2PTOV_59 (TOV1-) function
Parameter Range Step Default Unit Description
tReset1 0.000 - 60.000 0.001 0.025 s Reset time delay used in
IEC Definite Time curve
step 1
ResetTypeCrv1 Instantaneous - Instantaneous - Selection of reset curve
Frozen timer type for step 1
Linearly decreased
tIReset1 0.000 - 60.000 0.001 0.025 s Time delay in
Inverse-Time reset (s),
step 1
ACrv1 0.005 - 200.000 0.001 1.000 - Parameter A for cus-
tomer programmable
curve for step 1
BCrv1 0.50 - 100.00 0.01 1.00 - Parameter B for cus-
tomer programmable
curve for step 1
CCrv1 0.0 - 1.0 0.1 0.0 - Parameter C for cus-
tomer programmable
curve for step 1
DCrv1 0.000 - 60.000 0.001 0.000 - Parameter D for cus-
tomer programmable
curve for step 1
PCrv1 0.000 - 3.000 0.001 1.000 - Parameter P for cus-
tomer programmable
curve for step 1
CrvSat1 0 - 100 1 0 % Tuning param for pro-
grammable over voltage
TOV curve, step 1
tReset2 0.000 - 60.000 0.001 0.025 s Reset time delay used in
IEC Definite Time curve
step 2
ResetTypeCrv2 Instantaneous - Instantaneous - Selection of reset curve
Frozen timer type for step 2
Linearly decreased
tIReset2 0.000 - 60.000 0.001 0.025 s Time delay in
Inverse-Time reset (s),
step 2
ACrv2 0.005 - 200.000 0.001 1.000 - Parameter A for cus-
tomer programmable
curve for step 2
364
Two step overvoltage protection (PTOV, 59) Chapter 7
Voltage protection
365
Two step residual overvoltage Chapter 7
protection (PTOV, 59N) Voltage protection
3.1 Introduction
Residual voltages will occur in the power system during ground faults.
The function can be configured to calculate the residual voltage from the three phase voltage in-
put transformers or from a single phase voltage input transformer fed from an open delta or neu-
tral point voltage transformer.
The function has two voltage steps, each with inverse or definite time delayed.
The voltage related settings are made in percent of the base voltage, which is set in kV,
phase-phase.
To avoid oscillations of the output pickup signal, a hysteresis has been included.
366
Two step residual overvoltage Chapter 7
protection (PTOV, 59N) Voltage protection
TD
t=
⎛ V −V > ⎞
⎜ ⎟
⎝ V> ⎠
(Equation 82)
TD
t=
⎛ V − Vpickup ⎞
⎜ ⎟
⎝ Vpickup ⎠
(Equation 83)
TD ⋅ 480
t= 3.0
⎛ V − Vpickup ⎞
⎜ 32 ⋅ Vpickup − 0.5 ⎟ − 0.03
⎝ ⎠
(Equation 84)
TD ⋅ A
t= +D
⎛ V − Vpickup ⎞
P
⎜B⋅ −C⎟
⎝ Vpickup ⎠
(Equation 85)
When the denominator in the expression is equal to zero the time delay will be infinity. There
will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate
for this phenomenon. In the voltage interval Vpickup up to Vpickup *(1.0 + CrvSatn/100) the
used voltage will be: Vpickup *(1.0 + CrvSatn/100). If the programmable curve is used this pa-
rameter must be calculated so that:
CrvSatn
B⋅ −C > 0
100
(Equation 86)
367
Two step residual overvoltage Chapter 7
protection (PTOV, 59N) Voltage protection
The details of the different inverse time characteristics are shown in chapter 3 "Inverse charac-
teristics".
Trip signal issuing requires that the residual overvoltage condition continues for at least the user
set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and
by some special voltage level dependent time curves for the inverse time mode (TOV). If the
pickup condition, with respect to the measured voltage ceases during the delay time, and is not
fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and
tIReset1 and tIReset2 for the inverse time) the corresponding pickup output is reset, after that the
defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the
pickup condition must be fulfilled again and it is not sufficient for the signal to only return back
to the hysteresis area. It is also remarkable that for the overvoltage function the TOV reset time
is constant and does not depend on the voltage fluctuations during the drop-off period. However,
there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value
is frozen during the reset time, or the timer value is linearly decreased during the reset time. See
figure 186 and figure 187.
368
Two step residual overvoltage Chapter 7
protection (PTOV, 59N) Voltage protection
tReset1
tReset1
Voltage
PICKUP
TRIP
Pickup1
Hysteresis
Measured
Voltage
Time
PICKUP t1
TRIP
Time
Integrator Linear Decrease
Froozen Timer
t1
Instantaneous Time
Reset
en 05000019_ ansi. vsd
Figure 186: Voltage profile not causing a reset of the pickup signal for step 1, and definite time
delay
369
Two step residual overvoltage Chapter 7
protection (PTOV, 59N) Voltage protection
tReset1
Voltage tReset1
PICKUP TRIP
PICKUP
Hysteresis
Pickup1
Measured Voltage
Time
PICKUP t1
TRIP
Time Integrator
Frozen Timer
t1
Time
Instantaneous
Linear Decrease
Reset en 05000020_ansi.vsd
Figure 187: Voltage profile causing a reset of the pickup signal for step 1, and definite time de-
lay
3.2.3 Blocking
The residual overvoltage function can be partially or totally blocked, by binary input signals
where:
370
Two step residual overvoltage Chapter 7
protection (PTOV, 59N) Voltage protection
3.2.4 Design
The voltage measuring elements continuously measure the residual voltage. Recursive Fourier
filters filter the input voltage signal. The single input voltage is compared to the set value, and
is also used for the inverse time characteristic integration. The design of the TRV function is
schematically described in figure 188.
Comparator
VN Phase 1 PU_ST1
VN >
Pickup1 TRST1
PICKUP Pickup
&
Trip
Time integrator Output
t1 Logic
TRIP
tReset1
ResetTypeCrv1 Step 1
PU_ST2
Comparator
Phase 1
VN >
TRST2
Pickup2
Pickup
PICKUP &
Trip PICKUP
Output OR
Time integrator
Logic
t2 TRIP
tReset2
Step 2
ResetTypeCrv2 TRIP
OR
371
Two step residual overvoltage Chapter 7
protection (PTOV, 59N) Voltage protection
TRV1-
ROV2PTOV_59N
V3P TRIP
BLOCK TRST1
BLKTR1 TRST2
BLK1 PICKUP
BLKTR2 PU_ST1
BLK2 PU_ST2
en06000278_ansi.vsd
Table 207: Output signals for the ROV2PTOV_59N (TRV1-) function block
Signal Description
TRIP Trip
TRST1 Common trip signal from step1
TRST2 Common trip signal from step2
PICKUP General pickup signal
PU_ST1 Common pickup signal from step1
PU_ST2 Common pickup signal from step2
372
Two step residual overvoltage Chapter 7
protection (PTOV, 59N) Voltage protection
373
Two step residual overvoltage Chapter 7
protection (PTOV, 59N) Voltage protection
Table 209: Advanced parameter group settings for the ROV2PTOV_59N (TRV1-) function
Parameter Range Step Default Unit Description
tReset1 0.000 - 60.000 0.001 0.025 s Reset time delay used in
IEC Definite Time curve
step 1
ResetTypeCrv1 Instantaneous - Instantaneous - Selection of reset curve
Frozen timer type for step 1
Linearly decreased
tIReset1 0.000 - 60.000 0.001 0.025 s Time delay in
Inverse-Time reset (s),
step 1
ACrv1 0.005 - 200.000 0.001 1.000 - Parameter A for cus-
tomer programmable
curve for step 1
BCrv1 0.50 - 100.00 0.01 1.00 - Parameter B for cus-
tomer programmable
curve for step 1
CCrv1 0.0 - 1.0 0.1 0.0 - Parameter C for cus-
tomer programmable
curve for step 1
DCrv1 0.000 - 60.000 0.001 0.000 - Parameter D for cus-
tomer programmable
curve for step 1
PCrv1 0.000 - 3.000 0.001 1.000 - Parameter P for cus-
tomer programmable
curve for step 1
CrvSat1 0 - 100 1 0 % Tuning param for pro-
grammable over voltage
TOV curve, step 1
tReset2 0.000 - 60.000 0.001 0.025 s Time delay in Defi-
nite-Time reset (s), step 2
ResetTypeCrv2 Instantaneous - Instantaneous - Selection of reset curve
Frozen timer type for step 2
Linearly decreased
tIReset2 0.000 - 60.000 0.001 0.025 s Time delay in
Inverse-Time reset (s),
step 2
ACrv2 0.005 - 200.000 0.001 1.000 - Parameter A for cus-
tomer programmable
curve for step 2
374
Two step residual overvoltage Chapter 7
protection (PTOV, 59N) Voltage protection
375
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
4.1 Introduction
When the laminated core of a power transformer or generator is subjected to a magnetic flux
density beyond its design limits, stray flux will flow into non-laminated components not de-
signed to carry flux and cause eddy currents to flow. The eddy currents can cause excessive heat-
ing and severe damage to insulation and adjacent parts in a relatively short time. Function has
settable inverse operating curve and independent alarm stage.
Modern design transformers are more sensitive to overexcitation than earlier types. This is a re-
sult of the more efficient designs and designs which rely on the improvement in the uniformity
of the excitation level of modern systems. Thus, if emergency that includes overexcitation does
occur, transformers may be damaged unless corrective action is promptly taken. Transformer
manufacturers recommend an overexcitation protection as a part of the transformer protection
system.
Overexcitation results from excessive applied voltage, possibly in combination with below-nor-
mal frequency. Such condition may occur when a unit is on load, but are more likely to arise
when it is on open circuit, or at a loss of load occurrence. Transformers directly connected to
generators are in particular danger to experience overexcitation condition. It follows from the
fundamental transformer equation, see equation 87, that peak flux density Bmax is directly pro-
portional to induced voltage E, and inversely proportional to frequency f, and turns n.
E = 4.44 ⋅ f ⋅ n ⋅ B max ⋅ A
(Equation 87)
⎛ V ⎞=
M = relative ⎜
E/f
⎟
⎝ Hz ⎠ (Vn) /(fn)
(Equation 88)
376
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
Disproportional variations in quantities E and f may give rise to core overfluxing. If the core flux
density Bmax increases to a point above saturation level (typically 1.9 Tesla), the flux will no
longer be contained within the core only but will extend into other (non-laminated) parts of the
power transformer and give rise to Eddy current circulations. Overexcitation will result in:
Protection against overexcitation is based on calculation of the relative Volts per Hertz (V / Hz)
ratio. The action of the protection is usually to initiate a reduction of excitation and, if this should
fail, or is not possible, to trip the transformer after a delay which can be from seconds to minutes,
typically 5 - 10 seconds.
The IEC 60076 - 1 standard requires that transformers shall be capable of operating continuously
at 10% above rated voltage at no load, and rated frequency. At no load, the ratio of the actual
generator terminal voltage to the actual frequency should not exceed 1.1 times the ratio of trans-
former rated voltage to the rated frequency on a sustained basis, see equation 89.
E Vn
≤ 1.1 ⋅
f fn
(Equation 89)
E PUV / Hz
≤
f fn
(Equation 90)
where:
PUV/Hz is the maximum continuously allowed voltage at no load, and rated frequency.
PUV/Hz is an OEX setting parameter. The setting range is 100% to 150%. If the user does not
know exactly what to set, then the standard IEC 60076 - 1, section 4.4, the default value PUV/Hz
= 110% shall be used.
In OEX protection function the relative excitation M (relative V/Hz) is expressed according to
equation 91.
377
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
⎛ V ⎞=
M = relative ⎜
E/f
⎟
⎝ Hz ⎠ Vn / fn
(Equation 91)
It is clear from the above formula that, for an unloaded power transformer, M = 1 for any E and
f, where the ratio E / f is equal to Vn/fn. A power transformer is not overexcited as long as the
relative excitation is M ≤ PUV/Hz, PUV/Hz expressed in %. The relative overexcitation is thus
defined as shown in equation 92.
overexcitation = M − PUV / Hz
(Equation 92)
The overexcitation protection algorithm is fed with an input voltage V which is in general not
the induced voltage E from the fundamental transformer equation. For no load condition, these
two voltages are the same, but for a loaded power transformer the internally induced voltage E
may be lower or higher than the voltage V which is measured and fed to OEX, depending on the
direction of the power flow through the power transformer, the power transformer side where
OEX is applied, and the power transformer leakage reactance of the winding. It is important to
specify on the OEX function block in CAP 531 configuration tool worksheet on which side of
the power transformer OEX is placed
As an example, at a transformer with a 15% short circuit impedance Xsc, the full load, 0.8 power
factor, 105% voltage on the load side, the actual flux level in the transformer core, will not be
significantly different from that at the 110% voltage, no load, rated frequency, provided that the
short circuit impedance X can be equally divided between the primary and the secondary wind-
ing: XLeakage = XLeakage1 = XLeakage2 = Xsc / 2 = 0.075 pu..
OEX calculates the internal induced voltage E if XLeakage (meaning the leakage reactance of
the winding where OEX is connected) is known to the user. The assumption taken for 2-winding
power transformers that XLeakage = Xsc / 2 is unfortunately most often not true. For a 2-wind-
ing power transformer the leakage reactances of the two windings depend on how the windings
are located on the core with respect to each other. In the case of three-winding power transform-
ers the situation is still more complex. If a user has the knowledge on the leakage reactance, then
it should applied. If a user has no idea about it, Xleak can be set to Xc/2. The OEX protection
will then take the given measured terminal voltage V, as the induced voltage E.
378
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
Note!
It is extremely important that MeasuredV and MeasuredI is set to same value!
If, for example, voltage Vab is fed to OEX, then currents Ia, and Ib must be applied, etc. From
these two input currents, current Iab = Ia - Ib is calculated internally by the OEX protection al-
gorithm. The phase-to-phase voltage must be higher than 70% of the rated value, otherwise the
OEX protection algorithm is exited without calculating the excitation. ERROR output is set to
1, and the displayed value of relative excitation V / Hz shows 0.000.
If three phase-to-ground voltages are available from the side where OEX is connected, then
OEX protection function block shall be set to measure positive sequence voltage. In this case the
positive sequence voltage and the positive sequence current are used by OEX protection. A
check is made within OEX protection if the positive sequence voltage is higher than 70% rated
phase-to-ground voltage; below this value, OEX is exited immediately, and no excitation is cal-
culated. ERROR output is set to 1, and the displayed value of relative excitation V / Hz shows
0.000.
The frequency value is received from the pre-processing block. The function is in operation for
frequencies within the range of 33-60 Hz and of 42-75 Hz for 50 and 60 Hz respectively.
• OEX protection function can be connected to any power transformer side, inde-
pendent from the power flow.
• The side with a possible On-Load-Tap-Changer (OLTC) must not be used.
The so called IEEE law approximates a square law and has been chosen based on analysis of the
various transformers’ overexcitation capability characteristics. They can match well a trans-
former core capability.
379
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
0.18 ⋅ TD 0.18 ⋅ TD
t op = 2
= 2
(M − PUV / Hz) overexcitation
(Equation 93)
where:
M is excitation, mean value in the interval from t = 0 to t = top
PUV/Hz is maximum continuously allowed voltage at no load, and rated frequency, in pu and
TD is time multiplier setting for inverse time functions, see figure 191.
Parameter TD (“time delay multiplier setting”) selects one delay curve from the family of
curves.
An analog overexcitation relay would have to evaluate the following integral expression, which
means to look for the instant of time t = top according to equation 94.
t op
∫ ( M(t) − PUV / Hz )
2
dt ≥ 0.18 ⋅ TD
0
(Equation 94)
A digital, numerical relay will instead look for the lowest j (i.e. j = n) where it becomes true that:
∑ ( M( j) − PUV / Hz )
2
Δt ⋅ ≥ 0.18 ⋅ TD
j=k
(Equation 95)
where:
Δt is the time interval between two successive executions of overexcitation function
and
M(j) - PUV/Hz is the relative excitation at (time j) in excess of the normal (rated) excitation which
is given as Vn/fn.
As long as M > PUV/Hz (i.e. overexcitation condition), the above sum can only be larger with
time, and if the overexcitation persists, the protected transformer will be tripped at j = n.
Inverse delays as per figure 191, can be modified (limited) by two special definite delay settings,
namely t_MaxTripDelay and t_MinTripDelay, see figure 190.
380
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
delay in s
t_MaxTripDelay
overexcitation
t_MinTripDelay
99001067_ansi.vsd
A definite maximum time, t_MaxTripDelay, can be used to limit the operate time at low degrees
of overexcitation. Inverse delays longer than t_MaxTripDelay will not be allowed. In case the
inverse delay is longer than t_MaxTripDelay, OEX trips after t_MaxTripDelay seconds.
A definite minimum time, t_MinTripDelay, can be used to limit the operate time at high degrees
of overexcitation. In case the inverse delay is shorter than t_MinTripDelay, OEX function trips
after t_MinTripDelay seconds. Also, the inverse delay law is no more valid beyond excitation
Mmax. Beyond Mmax (beyond overexcitation Mmax - PUV), the delay will always be tMin, no
matter what overexcitation.
381
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
1000
100
TD = 60
TD = 20
TD = 10
10 TD = 9
TD = 8
TD = 7
TD = 6
TD = 5
TD = 4
TD = 3
TD = 2
TD = 1
1
1 2 3 4 5 10 20 30 40
OVEREXCITATION IN % (M-Emaxcont)*100)
en01000373_ansi.vsd
The critical value of excitation Mmax is determined indirectly via OEX protection function set-
ting Pickup2. Pickup2 can be thought of as a no-load-rated-frequency voltage, where the inverse
law should be replaced by a short definite delay, t_MinTripDelay. If, for example, Pickup2 =
140 %, then Mmax is according to equation 96.
Pickup 2 / f
M max = = 1.40
Vn / fn
(Equation 96)
382
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
The Tailor-Made law allows a user to design an arbitrary delay characteristic. In this case the
interval between M = PUV/Hz, and M = Mmax is automatically divided into five equal subinter-
vals, with six delays. (settings t1, t2, t3, t4, t5, and t6) as shown in the figure 192. These times
should be set so that t1 => t2 => t3 => t4 => t5 => t6.
delay in s
t_MaxTripDelay
under- t_MinTripDelay
excitation Overexcitation M-E maxcont
0 M max - E maxcont Excitation M
Emaxcont M max
99001068_ansi.vsd
Delays between two consecutive points, for example t3 and t4, are obtained by linear interpola-
tion.
Should it happen that t_MaxTripDelay be lower than, for example, delays t1, and t2, the actual
delay would be t_MaxTripDelay. Above Mmax, the delay can only be t_MinTripDelay.
4.2.3 Cooling
The overexcitation protection OEX is basically a thermal protection; therefore a cooling process
has been introduced. Exponential cooling process is applied. Parameter Tcool is an OEX setting,
with a default time constant tCoolingK of 20 minutes. This means that if the voltage and fre-
quency return to their previous normal values (no more overexcitation), the normal temperature
is assumed to be reached not before approximately 5 times tCoolingK minutes. If an overexci-
tation condition would return before that, the time to trip will be shorter than it would be other-
wise.
The displayed relative excitation M, designated on the display by V/Hz is calculated from the
expression:
383
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
⎛ V ⎞=
M = relative ⎜
E/f
⎟
⎝ Hz ⎠ Uf / fn
(Equation 97)
If less than V / Hz = PUV/Hz (in pu) is shown on the HMI display (or read via SM/RET521),
the power transformer is underexcited. If the value of V/Hz is shown which is equal to PUV/Hz
(in pu), it means that the excitation is exactly equal to the power transformer continuous capa-
bility. If a value higher than the value of PUV/Hz is shown, the protected power transformer is
overexcited. For example, if V/Hz = 1.100 is shown, while PUV/Hz = 110 %, then the power
transformer is exactly on its maximum continuous excitation limit.
The third item of the OEX protection service report is the thermal status of the protected power
transformer iron core, designated on the display by ThermalStatus. This gives the thermal status
in % of the trip value which corresponds to 100%. Thermal Status should reach 100% at the
same time, when tTRIP reaches 0 seconds. If the protected power transformer is then for some
reason not switched off, the ThermalStaus shall go over 100%.
If the delay as per IEEE law, or Tailor-made Law, is limited by t_MaxTripDelay, and/or
t_MinTripDelay, then the Thermal Status will generally not reach 100% at the same time, when
tTRIP reaches 0 seconds. For example, if, at low degrees of overexcitation, the very long delay
is limited by t_MaxTripDelay, then the OEX TRIP output signal will be set to 1 before the Ther-
mal status reaches 100%.
384
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
OVEX: FS = 1 = 2*SI + SU
BLOCK AlarmLevel
ALARM
SIDE 0-tMax
t>tAlarm &
0
tAlarm
Prepool I M>Pickup1
SI1 t>tMin TRIP
0-tMax &
0
Pickup1 t_MinTripDelay
SI2 Calculation
Ei TD
of internal M= M
induced (Ei / f) M IEEE law
voltage Ei (Vn / fn)
Prepool O SU12 OR
0-tMax
M
0
Tailor-made law
t_MaxTripDelay
M>Pickup2
Xleak
ERROR
Pickup2
en05000162_ansi.vsd
Figure 193: A logic diagram over Overexcitation protection function.
385
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
Simplification of the diagram is in the way the IEEE and Tailor-made delays are calculated. The
cooling process is not shown. It is not shown that voltage and frequency are separately checked
against their respective limit values.
OEX1-
OEXPVPH_24
I3P TRIP
V3P PICKUP
BLOCK ALARM
RESET
en05000329_ansi.vsd
Table 212: Output signals for the OEXPVPH_24 (OEX1-) function block
Signal Description
TRIP Trip from overexcitation function
PICKUP Overexcitation above set trip pickup (instantaneous)
ALARM Overexcitation above set alarm pickup (delayed)
386
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
Table 214: Basic parameter group settings for the OEXPVPH_24 (OEX1-) function
Parameter Range Step Default Unit Description
Operation Disabled - Disabled - Disable/Enable Opera-
Enabled tion
IBase 1 - 99999 1 3000 A Base current (rated
phase current) in A
VBase 0.05 - 2000.00 0.05 400.00 kV Base voltage (main volt-
age) in kV
Pickup1 100.0 - 180.0 0.1 110.0 %VB/f Operate level of V/Hz at
no load and rated freq in
% of (Vbase/frated)
Pickup2 100.0 - 200.0 0.1 140.0 %VB/f High level of V/Hz above
which tMin is used, in %
of (Vbase/fn)
XLeakage 0.000 - 200.000 0.001 0.000 ohm Winding leakage reac-
tance in primary ohms
t_TripPulse 0.000 - 60.000 0.001 0.100 s Length of the pulse for
trip signal (in sec)
t_MinTripDelay 0.000 - 60.000 0.001 7.000 s Minimum trip delay for
V/Hz inverse curve, in
sec
t_MaxTripDelay 0.00 - 9000.00 0.01 1800.00 s Maximum trip delay for
V/Hz inverse curve, in
sec
t_CoolingK 0.10 - 9000.00 0.01 1200.00 s Transformer magnetic
core cooling time con-
stant, in sec
CurveType IEEE - IEEE - Inverse time curve selec-
Tailor made tion, IEEE/Tailor made
TDForIEEECurve 1 - 60 1 1 - Time multiplier for IEEE
inverse type curve
AlarmPickup 50.0 - 120.0 0.1 100.0 % Alarm pickup level as %
of Step1 trip pickup level
tAlarm 0.00 - 9000.00 0.01 5.00 s Alarm time delay, in sec
387
Overexcitation protection (PVPH, 24) Chapter 7
Voltage protection
Table 215: Advanced parameter group settings for the OEXPVPH_24 (OEX1-) function
Parameter Range Step Default Unit Description
t1_UserCurve 0.00 - 9000.00 0.01 7200.00 s Time delay t1 (longest)
for tailor made curve, in
sec
t2_UserCurve 0.00 - 9000.00 0.01 3600.00 s Time delay t2 for tailor
made curve, in sec
t3_UserCurve 0.00 - 9000.00 0.01 1800.00 s Time delay t3 for tailor
made curve, in sec
t4_UserCurve 0.00 - 9000.00 0.01 900.00 s Time delay t4 for tailor
made curve, in sec
t5_UserCurve 0.00 - 9000.00 0.01 450.00 s Time delay t5 for tailor
made curve, in sec
t6_UserCurve 0.00 - 9000.00 0.01 225.00 s Time delay t6 (shortest)
for tailor made curve, in
sec
(0.18 ⋅ TD)
IEEE : t =
( M − 1) 2
where M = relative (V/Hz) =
(E/f)/(Vn/fn)
Minimum time delay for inverse (0.000–60.000) s ± 0.5% ± 10 ms
function
Maximum time delay for inverse (0.00–9000.00) s ± 0.5% ± 10 ms
function
Alarm time delay (0.000–60.000) s ± 0.5% ± 10 ms
388
Voltage differential protection (PTOV, 60) Chapter 7
Voltage protection
5.1 Introduction
A voltage differential monitoring function is available. It compares the voltages from two three
phase sets of voltage transformers and has one sensitive alarm step and one trip step. It can be
used to supervise the voltage from two fuse groups or two different voltage transformers fuses
as a fuse/MCB supervision function.
Loss of one U1or all U2 voltages will block the differential measurement. This blocking can be
switched off with setting BlkDiffAtULow=No.
The function can be blocked from an external condition with the binary BLOCK input. It can
e.g. be activated from a fuse failure supervision function block.
To allow easy commissioning the measured differential voltage is available as service value.
This allows simple setting of the ratio correction factor to achieve full balance in normal service.
389
Voltage differential protection (PTOV, 60) Chapter 7
Voltage protection
VDTrip_A
AND
VDTrip_B O
AND 0 0-tTrip TRIP
R 0-tReset 0 AND
VDTrip_C
AND
AND PICKUP
VDAlarm_A
AND
VDAlarm_B O
AND 0-tAlarm ALARM
R 0 AND
VDAlarm_C
AND
V1Low_A
V1Low_B OR 0-tAlarm
AND V1LOW
0
AND
V1Low_C
OR
BlkDiffAtULow
V2Low_A
V2Low_C
BLOCK
en06000382_ansi.vsd
Figure 196: Principle logic for voltage differential function
VDC1-
VDCPTOV_60
V3P1 TRIP
V3P2 PICKUP
BLOCK ALARM
V1LOW
V2LOW
VDIFF_A
VDIFF_B
VDIFF_C
en06000528_ansi.vsd
390
Voltage differential protection (PTOV, 60) Chapter 7
Voltage protection
Table 218: Output signals for the VDCPTOV_60 (VDC1-) function block
Signal Description
TRIP Voltage differential protection operated
PICKUP Pickup of voltage differential protection
ALARM Voltage differential protection alarm
V1LOW Loss of V1 voltage
V2LOW Loss of V2 voltage
VDIFF_A Differential Voltage phase A
VDIFF_B Differential Voltage phase B
VDIFF_C Differential Voltage phase C
391
Voltage differential protection (PTOV, 60) Chapter 7
Voltage protection
Table 220: Advanced parameter group settings for the VDCPTOV_60 (VDC1-) function
Parameter Range Step Default Unit Description
RF_A 0.000 - 3.000 0.001 1.000 - Ratio compensation fac-
tor phase A
VCap*RF_A=VBus_A
RF_B 0.000 - 3.000 0.001 1.000 - Ratio compensation fac-
tor phase B
VCap*RF_B=VBus_B
RF_C 0.000 - 3.000 0.001 1.000 - Ratio compensation fac-
tor phase C
VCap*RF_C=VBus_C
392
Loss of voltage check (PTUV, 27) Chapter 7
Voltage protection
6.1 Introduction
The loss of voltage detection, (PTUV, 27), is suitable for use in networks with an automatic Sys-
tem restoration function. The function issues a three-pole trip command to the circuit breaker, if
all three phase voltages fall below the set value for a time longer the set time and the circuit
breaker remains closed.
Additionally, the function is automatically blocked if only one or two phase voltages have been
detected low for more than tBlock.
The LOVPTUV function operates again only if the line has been restored to full voltage for at
least tRestore. Operation of the function is also inhibited by fuse failure and open circuit breaker
information signals, by their connection to dedicated inputs of the function block.
Due to undervoltage conditions being continuous the trip pulse is limited to a length set by set-
ting tPulse.
The operation of the function is supervised by the fuse-failure function (VTSU input) and the
information about the open position (CBOPEN) of the associated circuit breaker.
The BLOCK input can be connected to a binary input of the terminal in order to receive a block
command from external devices or can be software connected to other internal functions of the
terminal itself in order to receive a block command from internal functions. The function is also
blocked when the IED is in TEST status and the function has been blocked from the HMI test
menu. (BlockLOV=Yes).
393
Loss of voltage check (PTUV, 27) Chapter 7
Voltage protection
TEST-ACTIVE
AND
BlockLOV = Yes
LOV-START
LOV--BLOCK OR
PU_V_B AND
only 1 or 2 phases are low for
Latched at least 10 s (not three)
PU_V_C Enable
AND
OR 0-tBlock
0
OR Set Enable
0-tRestore
0 OR
en07000089_ansi.vsd
Figure 198: Simplified diagram of loss of voltage check protection function
394
Loss of voltage check (PTUV, 27) Chapter 7
Voltage protection
LOV1-
LOVPTUV_27
V3P TRIP
BLOCK PICKUP
CBOPEN
VTSU
en07000039_ansi.vsd
Table 223: Output signals for the LOVPTUV_27 (LOV1-) function block
Signal Description
TRIP Trip signal
PICKUP Pickup signal
395
Loss of voltage check (PTUV, 27) Chapter 7
Voltage protection
Table 225: Advanced parameter group settings for the LOVPTUV_27 (LOV1-) function
Parameter Range Step Default Unit Description
tPulse 0.050 - 60.000 0.001 0.150 s Duration of TRIP pulse
tBlock 0.000 - 60.000 0.001 5.000 s Time delay to block when
all 3ph voltages are not
low
tRestore 0.000 - 60.000 0.001 3.000 s Time delay for enable the
function after restoration
396
About this chapter Chapter 8
Frequency protection
Chapter 8 Frequency
protection
397
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
1.1 Introduction
Underfrequency occurs as a result of lack of generation in the network.
The function can be used for load shedding systems, remedial action schemes, gas turbine
start-up etc.
The function is provided with an undervoltage blocking. The operation may be based on single
phase, phase-to-phase or positive sequence voltage measurement.
To avoid oscillations of the output pickup signal, a hysteresis has been included.
398
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
For the voltage dependent time delay the measured voltage level and the settings VNom, VMin,
Exponent, t_MaxTripDelay and t_MinTripDelay set the time delay according to figure 200 and
equation 98. The setting TimerOperation is used to decide what type of time delay to apply. The
output STARTDUR, gives the time elapsed from the issue of the pickup output, in percent of the
total operation time available in PST.
Trip signal issuing requires that the underfrequency condition continues for at least the user set
time delay. If the pickup condition, with respect to the measured frequency ceases during the
delay time, and is not fulfilled again within a user defined reset time, tReset, the pickup output
is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving
the hysteresis area, the pickup condition must be fulfilled again and it is not sufficient for the
signal to only return back to the hysteresis area.
On the output of the underfrequency function a 100 ms pulse is issued, after a time delay corre-
sponding to the setting of TimeDlyRestore, when the measured frequency returns to the level
corresponding to the setting RestoreFreq.
⎡ V − VMin ⎤
Exponent
(Equation 98)
where:
t is the voltage dependent time delay (at constant voltage),
V is the measured voltage
Exponent is a setting,
VMin, VNom are voltage settings corresponding to
t_MaxTripDelay, are time settings.
t_MinTripDelay
399
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
VMin = 90%
VNom = 100%
t_MaxTripD = 1.0 s
elay
t_MinTripD = 0.0 s
elay
Exponent = 0, 1, 2, 3 and 4
1
0
1
TimeDlyOperate [s]
Exponenent
2
3
0.5 4
0
90 95 100
V [% of VBase]
en05000075_ansi.vsd
Figure 200: Voltage dependent inverse time characteristics for the underfrequency function.
The time delay to operate is plotted as a function of the measured voltage, for the
Exponent = 0, 1, 2, 3, 4 respectively.
1.2.4 Blocking
The underfrequency function can be partially or totally blocked, by binary input signals or by
parameter settings, where:
If the measured voltage level decreases below the setting of IntBlkPuVal, both the pickup and
the trip outputs, are blocked.
400
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
1.2.5 Design
The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting PUFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults. The time integrator can operate either due to a definite
delay time or to the special voltage dependent delay time. When the frequency has returned back
to the setting of RestoreFreq, the RESTORE output is issued after the time delay TimeDlyRe-
store. The design of the underfrequency function is schematically described in figure 201.
Block
BLOCK BLKDMAGN
OR
Comparator
V < IntBlockLevel
TimeDlyReset TRIP
100 ms
Comparator RESTORE
TimeDlyRestore
f > RestoreFreq
en05000726_ansi.vsd
Figure 201: Schematic design of the underfrequency function
401
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
TUF1-
SAPTUF_81
V3P TRIP
BLOCK PICKUP
BLKTRIP RESTORE
BLKREST BLKDMAGN
Frequency
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Table 227: Output signals for the SAPTUF_81 (TUF1-) function block
Signal Description
TRIP Operate/trip signal for frequency.
PICKUP Start/pick-up signal for frequency.
RESTORE Restore signal for load restoring purposes.
BLKDMAGN Blocking indication due to low magnitude.
Frequency Measured frequency
402
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
403
Underfrequency protection (PTUF, 81) Chapter 8
Frequency protection
⎡ V − VMin ⎤
Exponent VMin=(50-150)% of Vbase
t=⎢ ⋅ ( t _ MaxTripDelay − t _ MinTripDelay ) + t _ MinTripDelay
⎣VNom − VMin ⎥⎦ Exponent=0.0-5.0
V=Vmeasured t_MaxTripDelay=(0.000-60.000)
s
t_MinTripDelay=(0.000-60.000)s
404
Overfrequency protection (PTOF, 81) Chapter 8
Frequency protection
2.1 Introduction
Overfrequency will occur at sudden load drops or shunt faults in the power network. In some
cases close to generating part governor problems can also cause overfrequency.
The function can be used for generation shedding, remedial action schemes etc. It can also be
used as a sub-nominal frequency stage initiating load restoring.
The function is provided with an undervoltage blocking. The operation may be based on single
phase, phase-to-phase or positive sequence voltage measurement.
Trip signal issuing requires that the overfrequency condition continues for at least the user set
time delay. If the pickup condition, with respect to the measured frequency ceases during the
delay time, and is not fulfilled again within a user defined reset time, tReset, the pickup output
405
Overfrequency protection (PTOF, 81) Chapter 8
Frequency protection
is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving
the hysteresis area, the pickup condition must be fulfilled again and it is not sufficient for the
signal to only return back to the hysteresis area.
2.2.3 Blocking
The overfrequency function can be partially or totally blocked, by binary input signals or by pa-
rameter settings, where:
If the measured voltage level decreases below the setting of IntBlkPuVal, both the pickup and
the trip outputs, are blocked.
2.2.4 Design
The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting PUFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults in the power system. The time integrator operates due to
a definite delay time. The design of the overfrequency function is schematically described in
figure 203.
BLOCK
BLKTRIP BLOCK
OR BLKDMAGN
Comparator
V < IntBlockLevel
Pickup
&
Trip
Voltage Time integrator Output
Logic
Definite Time Delay PICKUP PICKUP
Frequency Comparator
f > PuFrequency TimeDlyOperate
TRIP
TimeDlyReset
TRIP
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406
Overfrequency protection (PTOF, 81) Chapter 8
Frequency protection
TOF1-
SAPTOF_81
V3P TRIP
BLOCK PICKUP
BLKTRIP BLKDMAGN
FREQ
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Table 231: Output signals for the SAPTOF_81 (TOF1-) function block
Signal Description
TRIP Operate/trip signal for frequency.
PICKUP Start/pick-up signal for frequency.
BLKDMAGN Blocking indication due to low magnitude.
Frequency Measured frequency
407
Overfrequency protection (PTOF, 81) Chapter 8
Frequency protection
408
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
3.1 Introduction
Rate of change of frequency function gives an early indication of a main disturbance in the sys-
tem.
The function can be used for generation shedding, load shedding, remedial action schemes etc.
The function is provided with an undervoltage blocking. The operation may be based on single
phase, phase-to-phase or positive sequence voltage measurement.
409
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
To avoid oscillations of the output pickup signal, a hysteresis has been included.
Trip signal issuing requires that the rate-of-change of frequency condition continues for at least
the user set time delay, tTrip. If the pickup condition, with respect to the measured frequency
ceases during the delay time, and is not fulfilled again within a user defined reset time, tReset,
the pickup output is reset, after that the defined reset time has elapsed. Here it should be noted
that after leaving the hysteresis area, the pickup condition must be fulfilled again and it is not
sufficient for the signal to only return back into the hysteresis area.
The RESTORE output of the rate-of-change of frequency function is set, after a time delay equal
to the setting of tRestore, when the measured frequency has returned to the level corresponding
to RestoreFreq, after an issue of the TRIP output signal. If tRestore is set to 0.000 s the restore
functionality is disabled, and no output will be given. The restore functionality is only active for
lowering frequency conditions and the restore sequence is disabled if a new negative frequency
gradient is detected during the restore period, defined by the settings RestoreFreq and tRestore.
3.2.3 Blocking
The rate-of-change of frequency function can be partially or totally blocked, by binary input sig-
nals or by parameter settings, where:
If the measured voltage level decreases below the setting of IntBlockLevel, both the pickup and
the trip outputs, are blocked.
3.2.4 Design
The rate-of-change of frequency measuring element continuously measures the frequency of the
selected voltage and compares it to the setting PUFreqGrad. The frequency signal is filtered to
avoid transients due to power system switchings and faults. The time integrator operates with a
definite delay time. When the frequency has returned back to the setting of RestoreFreq, the RE-
STORE output is issued after the time delay tRestore, if the TRIP signal has earlier been issued.
The sign of the setting PUFreqGrad is essential, and controls if the function is used for raising
or lowering frequency conditions. The design of the rate-of-change of frequency function is
schematically described in figure 205.
410
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
BLOCK
BLKTRIP
BLKRESET BLOCK
OR
Pickup
Rate-of-Change Time integrator &
Comparator
of Frequency Trip
If
Definite Time Delay Output
[PickupFreqGrad<0 PICKUP Logic PICKUP
AND
TimeDlyOperate
df/dt < PickupFreqGrad]
OR
TimeDlyReset
[PickupFreqGrad>0
AND
TRIP
df/dt > PickupFreqGrad]
Then
PICKUP
100 ms
en05000835_ansi.vsd
RCF1-
SAPFRC_81
V3P TRIP
BLOCK PICKUP
BLKTRIP RESTORE
BLKREST BLKDMAGN
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411
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
Table 235: Output signals for the SAPFRC_81 (RCF1-) function block
Signal Description
TRIP Operate/trip signal for frequencyGradient
PICKUP Start/pick-up signal for frequencyGradient
RESTORE Restore signal for load restoring purposes.
BLKDMAGN Blocking indication due to low magnitude.
412
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
413
Rate-of-change frequency Chapter 8
protection (PFRC, 81) Frequency protection
414
About this chapter Chapter 9
Multipurpose protection
Chapter 9 Multipurpose
protection
415
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
I< I>
U< U>
1.1 Introduction
The function can be utilized as a negative sequence current protection detecting unsymmetrical
conditions such as open phase or unsymmetrical faults.
The function can also be used to improve phase selection for high resistive ground faults, outside
the distance protection reach, for the transmission line. Three functions are used which measures
the neutral current and each of the three phase voltages. This will give an independence from
load currents and this phase selection will be used in conjunction with the detection of the
ground fault from the directional ground fault protection function.
To prevent damages on the generator or turbine, it is essential that high speed tripping is provid-
ed in case of inadvertent energization of the generator. This tripping should be almost instanta-
neous (< 100 ms).
There is a risk that the current into the generator at inadvertent energization will be limited so
that the “normal” overcurrent or underimpedance protection will not detect the dangerous situ-
ation. The delay of these protection functions might be too long. For big and important ma-
chines, fast protection against inadvertent energizing should, therefore, be included in the
protective scheme.
416
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
The user can select to measure one of the current quantities shown in table 238.
417
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
The user can select to measure one of the voltage quantities shown in table 239:
It is important to notice that the voltage selection from table 239 is always applicable regardless
the actual external VT connections. The three-phase VT inputs can be connected to IED as either
three phase-to-ground voltages VA, VB & VC or three phase-to-phase voltages VAB, VBC &
VCA). This information about actual VT connection is entered as a setting parameter for the
pre-processing block, which will then take automatic care about it.
418
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
The user can select one of the current quantities shown in table 240 for built-in current restraint
feature:
1. rated phase current of the protected object in primary amperes, when the mea-
sured Current Quantity is selected from 1 to 9, as shown in table 238.
2. rated phase current of the protected object in primary amperes multiplied by √3
(i.e. 1,732 x Iphase), when the measured Current Quantity is selected from 10 to
15, as shown in table 238.
1. rated phase-to-ground voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 1 to 9, as shown in table 239.
2. rated phase-to-phase voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 10 to 15, as shown in table 239.
Overcurrent step simply compares the magnitude of the measured current quantity
(see table 238) with the set pickup level. Non-directional overcurrent step will pickup if the
magnitude of the measured current quantity is bigger than this set level. Reset ratio is settable,
with default value of 0.96. However depending on other enabled built-in features this overcur-
rent pickup might not cause the overcurrent step pickup signal. Pickup signal will only come if
all of the enabled built-in features in the overcurrent step are fulfilled at the same time.
419
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
This feature will simple prevent overcurrent step pickup if the second-to-first harmonic ratio in
the measured current exceeds the set level.
Directional feature
The overcurrent protection step operation can be can be made dependent on the relevant phase
angle between measured current phasor (see table 238) and measured voltage phasor
(see table 239). In protection terminology it means that the PGPF function can be made direc-
tional by enabling this built-in feature. In that case overcurrent protection step will only operate
if the current flow is in accordance with the set direction (i.e. Forward, which means towards
the protected object, or Reverse, which means from the protected object). For this feature it is of
the outmost importance to understand that the measured voltage phasor (see table 239) and mea-
sured current phasor (see table 238) will be used for directional decision. Therefore it is the sole
responsibility of the end user to select the appropriate current and voltage signals in order to get
a proper directional decision. The PGPF function will NOT do this automatically. It will just
simply use the current and voltage phasors selected by the end user to check for the directional
criteria.
Table 241 gives an overview of the typical choices (but not the only possible ones) for these two
quantities for traditional directional relays.
Table 241: Typical current and voltage choices for directional feature
Set value for Set value for
the parameter Cur- the parameter Volt-
Comment
rentInput ageInput
PosSeq PosSeq Directional positive sequence overcurrent function is
obtained. Typical setting for RCADir is from -45° to -90°
depending on the power
420
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
Unbalance current or voltage measurement shall not be used when the directional feature is en-
abled.
Two types of directional measurement principles are available, I & V and IcosPhi&V. The first
principle, referred to as "I & V" in the parameter setting tool, checks that:
• the magnitude of the measured current is bigger than the set pick-up level
• the phasor of the measured current is within the operating region (defined by the
relay operate angle, ROADir parameter setting; see figure 207).
421
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
V=-3V0
RCADir
Operate region
mta line
en05000252_anis.vsd
where:
RCADir is -75°
ROADir is 50°
The second principle, referred to as "IcosPhi&V" in the parameter setting tool, checks that:
• that the product I·cos(Φ) is bigger than the set pick-up level, where Φ is angle
between the current phasor and the mta line
• that the phasor of the measured current is within the operating region (defined by
the I·cos(Φ) straight line and the relay operate angle, ROADir parameter setting;
see figure 207).
422
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
V=-3V0
RCADir
Operate region
mta line
en05000253_ansi.vsd
where:
RCADir is -75°
ROADir is 50°
Note that it is possible to decide by a parameter setting how the directional feature shall behave
when the magnitude of the measured voltage phasor falls below the pre-set value. User can select
one of the following three options:
• Non-directional (i.e. operation allowed for low magnitude of the reference volt-
age)
• Block (i.e. operation prevented for low magnitude of the reference voltage)
• Memory (i.e. memory voltage shall be used to determine direction of the current)
It shall also be noted that the memory duration is limited in the algorithm to 100 ms. After that
time the current direction will be locked to the one determined during memory time and it will
re-set only if the current fails below set pickup level or voltage goes above set voltage memory
limit.
423
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
PickupCurr_OC1
VDepFact_OC1 * PickupCurr_OC1
VLowLimit_OC1 VHighLimit_OC1
Selected Voltage
Magnitude
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Figure 209: Example for OC1 step current pickup level variation as function of measured volt-
age magnitude in Slope mode of operation
PickupCurr_OC1
VDepFact_OC1 *
PickupCurr_OC1
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Figure 210: Example for OC1 step current pickup level variation as function of measured volt-
age magnitude in Step mode of operation
424
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
This feature will simple change the set overcurrent pickup level in accordance with magnitude
variations of the measured voltage. It shall be noted that this feature will as well affect the pickup
current value for calculation of operate times for IDMT curves (i.e. overcurrent with IDMT
curve will operate faster during low voltage conditions).
IMeasured
ea ain
ar tr
at
e es
er ff *I r
Op oe
trC
es
I>R
IsetHigh
IsetLow
atan(RestrCoeff)
Restraint
en05000255.vsd
This feature will simple prevent overcurrent step to pickup if the magnitude of the measured cur-
rent quantity is smaller than the set percentage of the restrain current magnitude. However this
feature will not affect the pickup current value for calculation of operate times for IDMT curves.
This means that the IDMT curve operate time will not be influenced by the restrain current mag-
nitude.
When set, the pickup signal will start definite time delay or inverse (i.e. IDMT) time delay in
accordance with the end user setting. If the pickup signal has value one for longer time than the
set time delay, the overcurrent step will set its trip signal to one. Reset of the pickup and trip
signal can be instantaneous or time delay in accordance with the end user setting.
425
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
has value one for longer time than the set time delay the undercurrent step will set its trip signal
to one. Reset of the pickup and trip signal can be instantaneous or time delay in accordance with
the setting.
Overvoltage step simply compares the magnitude of the measured voltage quantity
(see table 239) with the set pickup level. The overvoltage step will pickup if the magnitude of
the measured voltage quantity is bigger than this set level. Reset ratio is settable, with default
value of 0.99.
The pickup signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance
with the end user setting. If the pickup signal has value one for longer time than the set time de-
lay, the overvoltage step will set its trip signal to one. Reset of the pickup and trip signal can be
instantaneous or time delay in accordance with the end user setting.
Undervoltage step simply compares the magnitude of the measured voltage quantity
(see table 239 with the set pickup level. The undervoltage step will pickup if the magnitude of
the measured voltage quantity is smaller than this set level. Reset ratio is settable, with default
value of 1.01.
The pickup signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance
with the end user setting. If the pickup signal has value one for longer time than the set time de-
lay, the undervoltage step will set its trip signal to one. Reset of the pickup and trip signal can
be instantaneous or time delay in accordance with the end user setting.
426
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
CVGAPC
3IP
3VP TROC1
TROV1
or
TRUV1
BLKOC1
en06000497_ansi.vsd
The setting of the general current and voltage function (typical values) is done as shown in
table 242.
Table 242: The setting of the general current and voltage function
Measured Pickup in % Time delay in
Quantity of generator seconds
rating
Undervolt- Maximum < 70% 10.0 s
agePickup generator
Phase to
Phase voltage
Overvoltage Maximum > 85% 1.0 s
Pickup generator
Phase to
Phase voltage
Overcurrent- Maximum > 50% 0.05 s
Pickup generator
Phase current
In normal operation the overvoltage trip signal is activated and the undervotage trip signal is de-
activated. This means that the overcurrent function is blocked.
427
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
When the generator is taken out of service the generator voltage gets low. The overvoltage trip
signal will be deactivated and the undervoltage trip signal will be activated after the set delay.
At this moment the block signal to the overcurrent function will be deactivated.
It the generator is energized at stand still conditions, i.e. when the voltage is zero, the overcurrent
function will operate after the short set delay if the generator current is larger than the set value.
When the generator is started the overvoltage trip signal will be activared the set time delay after
the moment when the voltage has reached the set value. At this moment the blocking of the over-
current function is activated.
The delay of the undervoltage function will prevent false operation at short circuits in the exter-
nal power grid.
REx670
ADM PGPF function
individual currents
52
A/D conversion
Phasors &
samples
en05000169_ansi.vsd
Figure 213: Treatment of measured currents within IED for PGPF function
Figure 213 shows how internal treatment of measured currents is done for multipurpose protec-
tion function
428
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
The following currents and voltages are inputs to the multipurpose protection function. They
must all be expressed in true power system (primary) Amperes and kilovolts.
1. Instantaneous values (samples) of currents & voltages from one three-phase cur-
rent and one three-phase voltage input.
2. Fundamental frequency phasors from one three-phase current and one
three-phase voltage input calculated by the pre-processing modules.
3. Sequence currents & voltages from one three-phase current and one three-phase
voltage input calculated by the pre-processing modules.
1. Selects one current from the three phase input system (see table 243) for internal-
ly measured current.
2. Selects one voltage from the three phase input system (see table 244) for inter-
nally measured voltage.
3. Selects one current from the three phase input system (see table 244) for internal-
ly measured restraint current.
429
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
CURRENT
UC1
TRUC1
2nd Harmonic
Selected current restraint
STUC2
UC2
nd
TRUC2
2 Harmonic
restraint
STOC1
OC1 TROC1
STOC2
OC2 TROC2
2nd Harmonic
restraint
Current restraint ≥1
UDIRLOW
Directionality DIROC2
Voltage control /
restraint
STOV1
OV1 TROV1
STOV2
OV2 TROV2
STUV1
Selected voltage
UV1 TRUV1
STUV2
UV2 TRUV2
VOLTAGE
en05000170.vsd
430
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
CURRENT
UC1
TRUC1
2nd Harmonic
Selected current restraint
PU_UC2
UC2
TRUC2
2nd Harmonic
restraint
PU_OC1
OC1 TROC1
nd
2 Harmonic BLK2ND
restraint OR
Selected restraint current
Current restraint
DIROC1
Directionality
Voltage control /
restraint
PU_OC2
OC2 TROC2
2nd Harmonic
restraint
Current restraint OR
VDIRLOW
Directionality DIROC2
Voltage control /
restraint
PU_OV1
OV1 TROV1
PU_OV2
OV2 TROV2
PU_UV1
Selected voltage
UV1 TRUV1
PU_UV2
UV2 TRUV2
VOLTAGE
en05000170_ansi.vsd
Figure 214: PGPF function main logic diagram for built in protection elements
431
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
1. The selected currents and voltage are given to built-in protection elements. Each
protection element and step makes independent decision about status of its PICK-
UP and TRIP output signals.
2. More detailed internal logic for every protection element is given in the following
four figures
3. Common PICKUP and TRIP signals from all built-in protection elements & steps
(internal OR logic) are available from multipurpose function as well.
Enable
second
harmonic Second
NOT
harmonic check DEF time BLKTROC1
selected 0-DEF TROC1
AND
0 OR
Selected current a
a>b
b
OC1=On PU_OC1
AND
PickupCurr_OC1 BLKOC1
X
Inverse
Selected voltage
Current
Restraint
Feature
Selected restrain current Imeasured > k Irestraint
en05000831_ansi.vsd
Figure 215: Simplified internal logic diagram for built-in first overcurrent step i.e. OC1 (step
OC2 has the same internal logic)
432
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
Operation_UC1=On
PU_UC1
en05000750_ansi.vsd
Figure 216: Simplified internal logic diagram for built-in first undercurrent step i.e. UC1 (step
UC2 has the same internal logic)
Inverse
Operation_OV1=On
Inverse time
BLKOV1 selected
en05000751_ansi.vsd
Figure 217: Simplified internal logic diagram for built-in first overvoltage step i.e.OV1 (step
OV2 has the same internal logic)
433
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
Inverse
Operation_UV1=On
Inverse time
BLKUV1 selected
en05000752_ansi.vsd
Figure 218: Simplified internal logic diagram for built-in first undervoltage step i.e.UV1 (step
UV2 has the same internal logic)
GF01-
CVGAPC
I3P TRIP
V3P TROC1
BLOCK TROC2
BLKOC1 TRUC1
BLKOC1TR TRUC2
ENMLTOC1 TROV1
BLKOC2 TROV2
BLKOC2TR TRUV1
ENMLTOC2 TRUV2
BLKUC1 PICKUP
BLKUC1TR PU_OC1
BLKUC2 PU_OC2
BLKUC2TR PU_UC1
BLKOV1 PU_UC2
BLKOV1TR PU_OV1
BLKOV2 PU_OV2
BLKOV2TR PU_UV1
BLKUV1 PU_UV2
BLKUV1TR BLK2ND
BLKUV2 DIROC1
BLKUV2TR DIROC2
VDIRLOW
CURRENT
ICOSFI
VOLTAGE
VIANGLE
en05000372_ansi.vsd
434
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
Table 244: Output signals for the CVGAPC (GF01-) function block
Signal Description
TRIP Common trip signal
TROC1 Trip signal from overcurrent function OC1
TROC2 Trip signal from overcurrent function OC2
TRUC1 Trip signal from undercurrent function UC1
TRUC2 Trip signal from undercurrent function UC2
TROV1 Trip signal from overvoltage function OV1
TROV2 Trip signal from overvoltage function OV2
TRUV1 Trip signal from undervoltage function UV1
TRUV2 Trip signal from undervoltage function UV2
PICKUP General pickup signal
PU_OC1 Pickup signal from overcurrent function OC1
PU_OC2 Pickup signal from overcurrent function OC2
435
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
Signal Description
PU_UC1 Pickup signal from undercurrent function UC1
PU_UC2 Pickup signal from undercurrent function UC2
PU_OV1 Pickup signal from overvoltage function OV1
PU_OV2 Pickup signal from overvoltage function OV2
PU_UV1 Pickup signal from undervoltage function UV1
PU_UV2 Pickup signal from undervoltage function UV2
BLK2ND Second harmonic block signal
DIROC1 Directional mode of OC1 (nondir, forward,reverse)
DIROC2 Directional mode of OC2 (nondir, forward,reverse)
VDIRLOW Low voltage for directional polarization
CURRENT Measured current value
ICOSFI Measured current multiplied with cos (Phi)
VOLTAGE Measured voltage value
VIANGLE Angle between voltage and current
436
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
437
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
438
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
439
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
440
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
441
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
442
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
Table 246: Advanced parameter group settings for the CVGAPC (GF01-) function
Parameter Range Step Default Unit Description
MultPU_OC1 1.0 - 10.0 0.1 2.0 - Multiplier for scaling the
current setting value for
OC1
ResCrvType_OC1 Instantaneous - Instantaneous - Selection of reset curve
IEC Reset type for OC1
ANSI reset
tResetDef_OC1 0.00 - 6000.00 0.01 0.00 s Reset time delay used in
IEC Definite Time curve
OC1
P_OC1 0.0001 - 10.0000 0.0001 0.0200 - Parameter P for cus-
tomer programmable
curve for OC1
A_OC1 0.0000 - 999.0000 0.0001 0.1400 - Parameter A for cus-
tomer programmable
curve for OC1
B_OC1 0.0000 - 99.0000 0.0001 0.0000 - Parameter B for cus-
tomer programmable
curve for OC1
C_OC1 0.0000 - 1.0000 0.0001 1.0000 - Parameter C for cus-
tomer programmable
curve for OC1
PR_OC1 0.005 - 3.000 0.001 0.500 - Parameter PR for cus-
tomer programmable
curve for OC1
TR_OC1 0.005 - 600.000 0.001 13.500 - Parameter TR for cus-
tomer programmable
curve for OC1
CR_OC1 0.1 - 10.0 0.1 1.0 - Parameter CR for cus-
tomer programmable
curve for OC1
MultPU_OC2 1.0 - 10.0 0.1 2.0 - Multiplier for scaling the
current setting value for
OC2
ResCrvType_OC2 Instantaneous - Instantaneous - Selection of reset curve
IEC Reset type for OC2
ANSI reset
tResetDef_OC2 0.00 - 6000.00 0.01 0.00 s Reset time delay used in
IEC Definite Time curve
OC2
P_OC2 0.0001 - 10.0000 0.0001 0.0200 - Parameter P for cus-
tomer programmable
curve for OC2
A_OC2 0.0000 - 999.0000 0.0001 0.1400 - Parameter A for cus-
tomer programmable
curve for OC2
443
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
444
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
445
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
446
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
447
General current and voltage Chapter 9
protection (GAPC) Multipurpose protection
448
About this chapter Chapter 10
Secondary system supervision
449
Current circuit supervision (RDIF) Chapter 10
Secondary system supervision
1.1 Introduction
Open or short circuited current transformer cores can cause unwanted operation of many protec-
tion functions such as differential, ground fault current and negative sequence current functions.
The current circuit supervision function compares the residual current from a three phase set of
current transformer cores with the neutral point current on a separate input taken from another
set of cores on the current transformer.
A detection of a difference indicates a fault in the circuit and is used as alarm or to block protec-
tion functions expected to give unwanted tripping.
The FAIL output will be set to a logical one when the following criteria are fulfilled:
• The numerical value of the difference |ΣIphase| – |Iref| is higher than 80% of the
numerical value of the sum |ΣIphase| + |Iref|.
• The numerical value of the current |ΣIphase| – |Iref| is equal to or higher than the
set operate value IMinOp.
• No phase current has exceeded >PUBlock during the last 10 ms.
• The current circuit supervision is enabled by setting Operation = Enable.
The FAIL output remains activated 100 ms after the AND-gate resets when being activated for
more than 20 ms. If the FAIL lasts for more than 150 ms a ALARM will be issued. In this case
the FAIL and ALARM will remain activated 1 s after the AND-gate resets. This prevents un-
wanted resetting of the blocking function when phase current supervision element(s) operate,
e.g. during a fault.
450
Current circuit supervision (RDIF) Chapter 10
Secondary system supervision
I>Pickup_Block
BLOCK
IA IA I>IMinOp
IB IB +∑
IC IC ∑ -
+∑ +∑
I ref I ref x
+ -
0,8
1,5 x Ir
AND OR FAIL
OR 10 ms
20 ms 100 ms
150 ms 1s ALARM
OPERATION
BLOCK
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Figure 220: Simplified logic diagram for the current circuit supervision
451
Current circuit supervision (RDIF) Chapter 10
Secondary system supervision
| ∑I phase | - | I ref |
Slope = 1
Operation
Slope = 0.8
area
I MinOp
| ∑I phase | + | I ref |
99000068.vsd
Note!
Due to the formulas for the axis compared, |ΣIphase | - |I ref | and |Σ I phase | + | I ref | respec-
tively, the slope can not be above 2.
CCS1-
CCSRDIF
I3P FAIL
IREF ALARM
BLOCK
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Current circuit supervision (RDIF) Chapter 10
Secondary system supervision
Table 249: Output signals for the CCSRDIF (CCS1-) function block
Signal Description
FAIL Detection of current circuit failure
ALARM Alarm for current circuit failure
Table 251: Advanced parameter group settings for the CCSRDIF (CCS1-) function
Parameter Range Step Default Unit Description
Pickup_Block 5 - 500 1 150 %IB Block of the function at
high phase current, in %
of IBase
453
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
2.1 Introduction
The aim of the fuse failure supervision function (FSD) is to block voltage measuring functions
at failures in the secondary circuits between the voltage transformer and the IED in order to
avoid unwanted operations that otherwise might occur.
The fuse failure supervision function basically has two different algorithms, negative sequence
and zero sequence based algorithm and an additional delta voltage and delta current algorithm.
The negative sequence detection algorithm is recommended for IEDs used in isolated or
high-impedance grounded networks. It is based on the negative-sequence measuring quantities,
a high value of voltage without the presence of the negative-sequence current 3·I2.
The zero sequence detection algorithm is recommended for IEDs used in directly or low imped-
ance grounded networks. It is based on the zero sequence measuring quantities, a high value of
voltage 3·V0 without the presence of the residual current 3·I0.
A criterion based on delta current and delta voltage measurements can be added to the fuse fail-
ure supervision function in order to detect a three phase fuse failure, which in practice is more
associated with voltage transformer switching during station operations.
For better adaptation to system requirements, an operation mode setting has been introduced
which makes it possible to select the operating conditions for negative sequence and zero se-
quence based function. The selection of different operation modes makes it possible to choose
different interaction possibilities between the negative sequence and zero sequence based algo-
rithm.
The measured signals are compared with their respective set values 3V0Pickup and 3I0Pickup.
The function enable the internal signal fuseFailDetected if the measured zero sequence voltage
is higher than the set value 3V0Pickup, the measured zero sequence current is below the set value
3I0Pickup and the operation mode selector OpModeSel) is set to 2 (zero sequence mode). This
454
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
will activate the output signal BLKV, intended to block voltage related protection functions in
the IED. The output signal BLKZ will be activated as well if not the internal dead line detection
is activaded at the same time.
If the fuseFailDetected signal is present for more than 5 seconds at the same time as all phase
voltages are below the set value VPPU and the setting parameter ISealIn is set to Enable, the
function will activate the output signals 3PH, BLKV and BLKZ. The same signals will aslo be
activated if all phase voltages are below the value VPPU, SealIn=On and any of the phase volt-
ages below the setting value for more than 5 seconds.
It is recommended to always set SealIn to Enable since this will secure that no unwanted oper-
ation of fuse failure will occur at closing command of breaker when the line is already energized
from the other end. The system voltages shall be normal before fuse failure is allowed to be ac-
tivated and initiate block of different protection functions.
The output signal BLKV can also be activated if no phase voltages is below the setting VPPU
for more than 60 seconds at the same time as the zero sequence voltage is above the set value
3V0Pickup for more than 5 seconds, all phase currents are below the setting IDLDPU (operate
level for dead line detection) and the circuit breaker is closed (input52a is activated). This con-
dition covers for fuse failure at open breaker position.
Fuse failure condition is unlatched when the normal voltage conditions are restored.
Fuse failure condition is stored in the non volatile memory in the IED. In the new start-up pro-
cedure the IED checks the stored value in its non volatile memory and establishes the corre-
sponding starting conditions.
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Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
20 ms
Store in non volatile
STORE3PH
(FUSE-STORE3PH)
From non 1:All voltages
volatile memory are low
OR
AND
AND
3PH
0: All voltages OR
are high
27PU_VA (Reset Latch)
OR 1:Fuse failure for
27PU_VB more than 5 s
PUDVDIA OR 27PU_VC - loop
IA>IPPU
1:Fuse Failure
PUDVDIB OR AND 5s
IB>IPPU Detection OR
AND STDVDI 0
PUDVDIC OR OR
IC>IPPU (Set Latch) BLKV
AND OR
AND 0
1:Function
150 ms
52a Enable
Dead-Line
Block
0 AND BLKZ
DLCND OR
200 ms
MCBOP AND
DISCPOS AND
BLKSP
DISABLE
OR
OpMode = Off
TEST
TEST-ACTIVE
OperationDVDI = On AND
BlockFUSE= Yes
en05000655_ansi.vsd
Figure 223: Simplified logic diagram for fuse failure supervision function, zero sequence
based
The input BLOCK signal is a general purpose blocking signal of the fuse failure supervision
function. It can be connected to a binary input of the IED in order to receive a block command
from external devices or can be software connected to other internal functions of the IED itself
in order to receive a block command from internal functions. Through OR gate it can be con-
nected to both binary inputs and internal function outputs.
The input BLKSP is intended to be connected to the trip output at any of the protection functions
included in the IED. When activated for more than 20 ms, the operation of the fuse failure is
blocked during a fixed time of 100 ms. The aim is to increase the security against unwanted op-
erations during the opening of the breaker, which might cause unbalance conditions for which
the fuse failure might operate.
456
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
The output signal BLKZ will also be blocked if the internal dead line detection is activated. The
block signal has a 200 ms drop-off time delay.
The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The
MCBOP signal sets the output signals BLKU and BLKZ in order to block all the voltage related
functions when the MCB is open independent of the setting of OpModeSel selector. The addi-
tional drop-off timer of 150 ms prolongs the presence of MCBOP signal to prevent the unwanted
operation of voltage dependent function due to non simultaneous closing of the main contacts
of the miniature circuit breaker.
The input signal 89b is supposed to be connected via a terminal binary input to the N.C. auxiliary
contact of the line disconnector. The 89b signal sets the output signal BLKU in order to block
the voltage related functions when the line disconnector is open. The impedance protection func-
tion is not affected by the position of the line disconnector since there will be no line currents
that can cause maloperation of the distance protection. If DISCPOS=0 it signifies that the line is
connected to the system and when the DISCPOS=1 it signifies that the line is disconnected from
the system and the block signal BLKU is generated.
The output BLKU can be used for blocking the voltage related measuring functions (undervolt-
age protection, synchro-check etc.) except for the impedance protection.
The function output BLKZ can be used for blocking the impedance protection function.
The BLKZ will only be activated if not the internal dead line detection is activated at the same
time.
The fuse failure condition is unlatched when the normal voltage conditions are restored.
When the output 3PH is activated, all three voltage are low.
The function enable the internal signal fuseFailDetected if the measured negative sequence volt-
age is higher than the set value 3V2PU, the measured negative sequence current is below the val-
ue 3I2PU and the operation mode selector (OpModeSel) is set to 1 (negative sequence mode).
The current and voltage is continuously measured in all three phases and the following quantities
are calculated:
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Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
The calculated delta quantities are compared with their respective set values DIPU and DUPU.
The delta current and delta voltage algorithm, detects a fuse failure if a sufficient negative
change in voltage amplitude without a sufficient change in current amplitude is detected in each
phase separately. This check is performed if the circuit breaker is closed. Information about the
circuit breaker position is brought to the function input 52a through a binary input of the IED.
There are two conditions for activating the internal STDU signal and set the latch:
The first criterion requires that the delta condition shall be fulfilled in any phase at the same time
as circuit breaker is closed. Opening circuit breaker at one end and energizing the line from other
end onto a fault could lead to wrong start of the fuse failure function at the end with the open
breaker. If this is considering to bee an important disadvantage, connect the 52a input to FALSE.
In this way only the second criterion can activate the delta function.
The second criterion means that detection of failure in one phase together with high current for
the same phase will set the latch. The measured phase current is used to reduce the risk of false
fuse failure detection. If the current on the protected line is low, a voltage drop in the system (not
caused by fuse failure) is not by certain followed by current change and a false fuse failure might
occur. To prevent that the phase current criterion is introduced.
If the signal setLatchΔUΔI is set (see figure 223) and if all measured voltages are low (lower
than the setting UPh>) the output 3PH will be activated indicating fuse failure in all three phas-
es. The output BLKU and BLKZ will be activated as well.
If the signal setLatchΔUΔI is activated but not all three phases are below the setting UPh> only
BLKU will be activated.
The BLKZ will be activated as well if not the internal dead line detection is activated.
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Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
• OpModeSel = 4; Both negative and zero sequence is activated and working in se-
ries (AND-condition for operation)
• OpModeOpModeSel = 5; Optimum of negative and zero sequence (the function
that has the highest magnitude of measured negative and zero sequence current
will be activated).
FSD1-
SDDRFUF
I3P BLKZ
V3P BLKV
BLOCK 3PH
52A DLD1PH
MCBOP DLD3PH
89B
BLKTRIP
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Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
Table 254: Output signals for the SDDRFUF (FSD1-) function block
Signal Description
BLKZ Start of current and voltage controlled function
BLKV General pickup
3PH Three-phase pickup
DLD1PH Dead line condition in at least one phase
DLD3PH Dead line condition in all three phases
460
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
461
Fuse failure supervision (RFUF) Chapter 10
Secondary system supervision
462
About this chapter Chapter 11
Control
Chapter 11 Control
463
Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
1.1 Introduction
The Synchronizing function allows closing of asynchronous networks at the correct moment in-
cluding the breaker closing time. The systems can thus be reconnected after an auto-reclose or
manual closing which improves the network stability.
The synchronism check, enerigizing check function checks that the voltages on both sides of the
circuit breaker are in synchronism, or with at least one side dead to ensure that closing can be
done safely.
The function includes a built-in voltage selection scheme for double bus and breaker-and-a-half
or ring busbar arrangements.
Manual closing as well as automatic reclosing can be checked by the function and can have dif-
ferent settings.
For systems which are running asynchronous a synchronizing function is provided. The main
purpose of the synchronizing function is to provide controlled closing of circuit breakers when
two asynchronous systems are going to be connected. It is used for slip frequencies that are larg-
er than those for synchronism check and lower than a set maximum level for the synchronizing
function.
The energizing check function measures the bus and line voltages and compares them to both
high and low threshold detectors. The output is only given when the actual measured quantities
match the set conditions.
The synchronizing measures the conditions across the circuit breaker, and it also determines the
angle change occurring during the closing delay of the circuit breaker, from the measured slip
frequency. The output is only given when all measured conditions are simultaneously within
their set limits. The issue of the output is timed to give closure at the optimal time including the
time for the circuit breaker and the closing circuit.
464
Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
For single circuit breaker and breaker-and-a-half circuit breaker arrangements, the SYN func-
tion blocks have the capability to make the necessary voltage selection. For single circuit breaker
arrangements, selection of the correct voltage is made using auxiliary contacts of the bus discon-
nectors. For breaker-and-a-half circuit breaker arrangements, correct voltage selection is made
using auxiliary contacts of the bus disconnectors as well as the circuit breakers
The internal logic for each function block as well as the Input and Outputs and the setting pa-
rameters with default setting and setting ranges is described in this document. For application
related information, please refer to the “Application manual”.
Synchronism check
The voltage difference, frequency difference and phase angle difference values are measured in
the IED centrally and are available for the Synchrocheck function for evaluation. If the bus volt-
age is connected as phase-phase and the line voltage as phase-neutral (or the opposite), this need
to be compensated. This is done with a setting, which scales up the line voltage to a level equal
to the bus voltage.
When the function is set to OperationSC = On, the measuring will start.
The function will compare the bus and line voltage values with the set values for VHighBusSC
and VHighLineSC.
If both sides are higher than the set values the measured values are compared with the set values
for acceptable frequency, phase angle and voltage difference FreqDiff, PhaseDiff and VDiff. If
a compensation factor is set due to the use of different voltages on the Bus and Line, the factor
is deducted from the line voltage before the comparison of the phase angle values.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus
frequency and the line frequency is measured and may not exceed the set value.
Two sets of settings for frequency difference and phase angle difference are available and used
for the Manual closing and Auto-Reclose functions respectively as required.
The inputs BLOCK and BLKSC are available for total block of the complete Synchrocheck
function and block of the Synchronism check function respectively. TSTSC will allow testing
of the function where the fulfilled conditions are connected to a separate test output
Two outputs MANSYOK resp. AUTOSYOK are activated when the actual measured conditions
match the set conditions for the respective output. The output signal can be delayed independent-
ly for MANSYOK conditions and for AUTOSYOK.
A number of outputs are available as information about fulfilled checking conditions. VOKSC
shows that the voltages are high, VDIFFSC, FRDIFFM/A, PHDIFFM/A shows when the volt-
age difference, frequency difference and phase angle difference conditions are met.
465
Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
Synchronizing
When the function is set to OperationSynch=On the measuring will be performed.
The function will compare the values for the bus and line voltage with the set values for UHigh-
BusSynch and UHighLineSynch which is a supervision that the voltages are both live. If both
sides are higher than the set values the measured values are compared with the set values for ac-
ceptable frequency, rate of change of frequency, phase angle and voltage difference FreqDiff-
Max, FreqDiffMin and UDiffSynch.
Measured frequencies between the settings for the maximum and minimum frequency will ini-
tiate the measuring and the evaluation of the angle change to allow operation to be sent in the
right moment including the set tBreaker time. There is a phase angle release internally to block
any incorrect closing pulses. At operation the SYNOK output will be activated with a pulse
tClosePulse and the function reset. The function will also reset if the syncronizing conditions
are not fulfilled within the set tMaxSynch time. This will then prevent that the functions is by
mistake maintained in operation a long time waiting for conditions to be fulfilled.
The inputs BLOCK and BLKSYNCH are available for total block of the complete function resp.
of the Synchronizing part.
466
Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
SYN1
OPERATION SYNCH
OFF
ON
TEST MODE
OFF
ON
STARTSYN SYNPROGR
AND
AND
S
BLKSYNCH
OR R
UDiffSynch
50 ms SYNOK
AND
UHighBusSynch AND t
UHighLineSynch OR
FreqDiffMax
AND
TSTSYNOK
FreqDiffMin OR
tClose
FreqRateChange Pulse
AND
fBus&fLine ± 5 Hz tMax
AND
Synch
PhaseDiff < 15 deg SYNFAIL
PhaseDiff=closing angle
en06000636.vsd
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Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
SYN1
OPERATION SYNCH
OFF
ON
TEST MODE
OFF
ON
STARTSYN SYNPROGR
AND
AND
S
BLKSYNCH
OR R
VDiffSynch
50 ms SYNOK
AND
VHighBusSynch AND t
VHighLineSynch OR
FreqDiffMax
AND
TSTSYNOK
FreqDiffMin OR
tClose
FreqRateChange Pulse
AND
fBus&fLine ± 5 Hz tMax
AND
Synch
PhaseDiff < 15 deg SYNFAIL
PhaseDiff=closing angle
en06000636_ansi.vsd
Figure 225: Simplified logic diagram for the synchronizing function
Energizing check
Voltage values are measured in the IED centrally and are available for evaluation by the Syn-
chronism check function. If the bus voltage is connected as phase-phase and the line voltage as
phase-neutral, (or the opposite) this needs to be compensated. This is done with a setting, which
scales the line voltage to a level equal to the bus voltage.
The function measures voltages on the busbar and the line to verify whether they are live or dead.
This is done by comparing with the set values VHighBusEnerg and VLowBusEnerg for bus en-
ergizing and VHighBusEnergand VLowBusEnerg for line energizing.
468
Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus
frequency and the line frequency is measured and shall not exceed a set value.
The Energizing direction can be selected individually for the Manual and the Automatic func-
tions respectively. When the conditions are met the outputs AUTOENOK and MANENOK re-
spectively will be activated if the fuse supervision conditions are fulfilled. The output signal can
be delayed independently for MANENOK conditions and for AUTOENOK. The Energizing di-
rection can also be selected by an integer input AENMODE resp MENMODE, which e.g. can
be connected to a Binary to Integer function block BI 16 (BAxx or BBxx). Integers supplied
shall be 1=off, 2=DLLB, 3=DBLL and 4= Both. Not connected input with connection of INTZ-
ERO output from Fixed Signals function block will mean that the setting is done from PST tool.
The active position can be read on outputs MODEAEN resp MODEMEN. The modes are
0=OFF, 1=DLLB, 2=DBLL and 3=Both.
The inputs BLOCK and BLKENERG are available for total block of the complete Synchronism
check function resp. block of the Energizing check function. TSTENOK will allow testing of the
function where the fulfilled conditions are connected to a separate test output.
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Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
OperationSC = Enabled
AND TSTAUTOSY
AND
TSTSC
BLKSC AND
BLOCK OR
AUTOSYOK
AND
tSCA
AND 0-60 ms
0
VDiffSC
AND 50 ms
0
VHighBusSC
VOKSC
AND
VHighLineSC
VDIFFSC
1
FRDIFFA
FreqDiffA 1
PHDIFFA
PhaseDiffA 1
VDIFFME
voltageDifferenceValue
FRDIFFME
frequencyDifferenceValue
PHDIFFME
phaseAngleDifferenceValue
en07000114_ansi.vsd
Figure 226: Simplified logic diagram for the Synchronism check function
Voltage selection
The voltage selection module including supervision of included voltage transformer fuses for
the different arrangements is a basic part of the Synchrocheck function and determines the pa-
rameters fed to the Synchronism check and Energizing check functions. This includes the selec-
tion of the appropriate Line and Bus voltages and fuse supervision.
The voltage selection type to be used is set with the parameter CBConfig. The different alterna-
tives are described below.
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Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
If NoVoltageSel is set the default voltages used will be VLine1 and VBus1. This is also the case
when external voltage selection is provided. Fuse failure supervision for the used inputs must
also be connected.
The voltage selection function selected voltages and fuse conditions are the Synchronism check
and Energizing check inputs.
For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts to supply
Disconnector Open and Closed positions but it is of course also possible to use an inverter for
one of the positions.
The SYN1(2)-VB1/2OK and SYN1(2)-VB1/2FF inputs are related to the busbar voltage and the
SYN1(2)-VL1/2OK and SYN1(2)-VL1/2FF inputs are related to the line voltage. Configure
them to the binary inputs or function outputs that indicate the status of the external fuse failure
of the busbar and line voltages. In the event of a fuse failure, the energizing check functions are
blocked. The synchronism check requires full voltage on both sides and will be blocked auto-
matically in the event of fuse failures.
The function also checks the fuse-failure signals for bus 1, bus 2 and line voltage transformers.
Inputs VB1OK-VB1FF supervise the fuse for Bus 1. VB2OK-VB2FF supervises the fuse for
Bus 2 and VLN1OK-VLN1FF supervises the fuse for the Line voltage transformer. The inputs
fail (FF) or healthy (OK) can alternatively be used dependent on the available signal. If a
fuse-failure is detected in the selected voltage source an output signal VSELFAIL is set. This
output signal is true if the selected bus or line voltages have a fuse failure. This output as well
as the function can be blocked with the input signal BLOCK. The function logic diagram is
shown in figure 227.
471
Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
BUS1_OP
B1SEL
BUS1_CL AND
BUS2_OP B2SEL
NOT
BUS2_CL AND
AND invalidSelection
bus1Voltage
busVoltage
bus2Voltage
VB1OK AND
VB1FF OR
OR
AND selectedFuseOK
VB2OK AND
VB2FF OR VSELFAIL
AND
VL1OK
VL1FF OR
BLOCK
en05000779_ansi.vsd
Figure 227: Logic diagram for the voltage selection function of a single circuit breaker with
double busbars
This voltage selection function uses the binary inputs from the disconnectors and circuit break-
ers auxiliary contacts to select the right voltage for the Synchrocheck (Synchronism and Ener-
gizing check) function. For the bus circuit breaker one side of the circuit breaker is connected to
the busbar and the other side is connected either to line 1, line 2 or the other busbar depending
on the arrangement.
The fuse supervision is connected to VLNOK-VLNFF etc. and with alternative Healthy or Fail-
ing fuse signals depending on what is available for each of fuse (MCB).
472
Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
The tie circuit breaker is connected either to bus 1 or line 1 on one side and the other side is con-
nected either to bus 2 or line 2. Four different output combinations are possible, bus to bus, bus
to line, line to bus and line to line.
The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2. If a fuse-fail-
ure is detected in the selected voltage an output signal VSELFAIL is set. This output signal is
true if the selected bus or line voltages have a fuse failure. This output as well as the function
can be blocked with the input signal BLOCK.The function block diagram for the voltage selec-
tion of a bus circuit breaker is shown in Figure 228: and for the tie circuit breaker in Figure 229:
473
Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
LINE1_OP
L1SEL
LINE1_CL AND
BUS1_OP
L2SEL
BUS1_CL AND AND
OR
B2SEL
LINE2_OP
LINE2_CL AND
AND invalidSelection
BUS2_OP AND
BUS2_CL AND
line1Voltage
lineVoltage
line2Voltage
bus2Voltage
VB1OK
VB1FF OR
OR
VB2OK AND
AND selectedFuseOK
VB2FF OR
VSELFAIL
VL1OK AND
AND
VL1FF OR
VL2OK
AND
VL2FF OR
BLOCK
en05000780_ansi.vsd
Figure 228: Simplified logic diagram for the voltage selection function for a bus circuit break-
er in a breaker-and-a-half arrangement.
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Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
LINE1_OP
AND
L1SEL
LINE1_CL
B1SEL
NOT
BUS1_OP AND
AND
BUS1_CL AND
line1Voltage
busVoltage
bus1Voltage
LINE2_OP
L2SEL
LINE2_CL AND
B2SEL
NOT
OR invalidSelection
BUS2_OP AND
AND
BUS2_CL AND
line2Voltage
lineVoltage
bus2Voltage
VB1OK AND
VB1FF OR
OR
VB2OK AND selectedFuseOK
AND
VB2FF OR
VSELFAIL
VL1OK AND
AND
VL1FF OR
VL2OK
AND
VL2FF OR
BLOCK
en05000781_ansi.vsd
Figure 229: Simplified logic diagram for the voltage selection function for the tie circuit break-
er in breaker-and-a-half arrangement.
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Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
SYN1-
SESRSYN_25
V3PB1 SYNOK
V3PB2 AUTOSYOK
V3PL1 AUTOENOK
V3PL2 MANSYOK
BLOCK MANENOK
BLKSYNCH TSTSYNOK
BLKSC TSTAUTSY
BLKENERG TSTMANSY
BUS1_OP TSTENOK
BUS1_CL VSELFAIL
BUS2_OP B1SEL
BUS2_CL B2SEL
LINE1_OP L1SEL
LINE1_CL L2SEL
LINE2_OP SYNPROGR
LINE2_CL SYNFAIL
VB1OK VOKSYN
VB1FF VDIFFSYN
VB2OK FRDIFSYN
VB2FF FRDIFFOK
VL1OK FRDERIVA
VL1FF VOKSC
VL2OK VDIFFSC
VL2FF FRDIFFA
STARTSYN PHDIFFA
TSTSYNCH FRDIFFM
TSTSC PHDIFFM
TSTENERG VDIFFME
AENMODE FRDIFFME
MENMODE PHDIFFME
MODEAEN
MODEMEN
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energizing check (RSYN, 25) Control
Signal Description
BUS2_CL Close status for CB and disconnector connected to bus2
LINE1_OP Open status for CB or disconnector connected to line1
LINE1_CL Close status for CB and disconnector connected to line1
LINE2_OP Open status for CB or disconnector connected to line2
LINE2_CL Close status for CB and disconnector connected to line2
VB1OK Bus1 voltage transformer OK
VB1FF Bus1 voltage transformer fuse failure
VB2OK Bus2 voltage transformer OK
VB2FF Bus2 voltage transformer fuse failure
VL1OK Line1 voltage transformer OK
VL1FF Line1 voltage transformer fuse failure
VL2OK Line2 voltage transformer OK
VL2FF Line2 voltage transformer fuse failure
STARTSYN Start synchronizing
TSTSYNCH Set synchronizing in test mode
TSTSC Set synchro check in test mode
TSTENERG Set energizing check in test mode
AENMODE Input for setting of automatic energizing mode
MENMODE Input for setting of manual energizing mode
Table 258: Output signals for the SESRSYN_25 (SYN1-) function block
Signal Description
SYNOK Synchronizing OK output
AUTOSYOK Auto synchronism-check OK
AUTOENOK Automatic energizing check OK
MANSYOK Manual synchronism-check OK
MANENOK Manual energizing check OK
TSTSYNOK Synchronizing OK test output
TSTAUTSY Auto synchronism-check OK test output
TSTMANSY Manual synchronism-check OK test output
TSTENOK Energizing check OK test output
VSELFAIL Selected voltage transformer fuse failed
B1SEL Bus1 selected
B2SEL Bus2 selected
L1SEL Line1 selected
L2SEL Line2 selected
SYNPROGR Synchronizing in progress
SYNFAIL Synchronizing failed
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Signal Description
VOKSYN Voltage amplitudes for synchronizing above set limits
VDIFFSYN Voltage difference out of limit for synchronizing
FRDIFSYN Frequency difference out of limit for synchronizing
FRDIFFOK Frequency difference in band for synchronizing
FRDERIVA Frequency derivative out of limit for synchronizing
VOKSC Voltage amplitudes above set limits
VDIFFSC Voltage difference out of limit
FRDIFFA Frequency difference out of limit for Auto operation
PHDIFFA Phase angle difference out of limit for Auto operation
FRDIFFM Frequency difference out of limit for Manual operation
PHDIFFM Phase angle difference out of limit for Manual Operation
VDIFFME Calculated difference in voltage
FRDIFFME Calculated difference in frequency
PHDIFFME Calculated difference of phase angle
MODEAEN Selected mode for automatic energizing
MODEMEN Selected mode for manual energizing
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479
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energizing check (RSYN, 25) Control
480
Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
481
Synchronizing, synchronism check and Chapter 11
energizing check (RSYN, 25) Control
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Autorecloser (RREC, 79) Chapter 11
Control
2.1 Introduction
The autoreclosing function provides high-speed and/or delayed auto-reclosing for single or
multi-breaker applications.
Up to five reclosing attempts can be programmed. The first attempt can be single-, two and/or
three pole for single phase or multi-phase faults respectively.
Multiple autoreclosing functions are provided for multi-breaker arrangements. A priority circuit
allows one circuit breaker to close first and the second will only close if the fault proved to be
transient.
Each autoreclosing function can be configured to co-operate with a synchronism check function.
When the function is set On and is operative the output SETON is activated (high). Other input
conditions such as 52a and CBREADY must also be fulfilled. At this point the automatic reclos-
er is prepared to start the reclosing cycle and the output signal READY on the AR function block
is activated (high).
As an alternative to setting the mode can be selected by connecting an integer, e.g. from function
block B16I (BAxx respBBxx) to input MODEINT
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When INTZERO from Fixed signal function block is connected to the input MODEINT the pa-
rameter setting selected will be valid.
For a new auto-reclosing cycle to be started, a number of conditions need to be met. They are
linked to dedicated inputs. The inputs are: a) CBREADY, CB ready for a reclosing cycle, e.g.
charged operating gear, b) 52a to ensure that the CB was closed when the line fault occurred and
initiation was applied, c) No blocking or inhibit signal shall be present. After the initiation has
been accepted, it is latched in and an internal signal “Started” is set. It can be interrupted by cer-
tain events, like an inhibit signal.
To initiate auto-reclosing by CB position Open instead of from protection trip signals, one has
to configure the CB Open position signal to inputs 52a and RI and set a parameter StartBy-
CBOpen = ON and CBAuxContType = NormClosed (normally closed, 52b). One also has to
configure and connect signals from manual trip commands to input INHIBIT.
The logic for switching the auto-recloser Enable/Disable and the starting of the reclosing is
shown in figure 231. The following should be considered.
• Setting Operation can be set to Off, External ctrl or ON. External ctrl offers the
possibility of switching by external switches to inputs ON and OFF, communi-
cation commands to the same inputs etc.
• Autoreclose AR is normally started by tripping. It is either a Zone 1 and Commu-
nication aided trip or a general trip. If the general trip is used the function must
be blocked from all back-up tripping connected to INHIBIT. In both alternatives
the breaker failure function must be connected to inhibit the function. RI makes
a first attempt with synchronism-check, RI_HS makes its first attempt without
synchronism-check. TRSOTF starts shots 2-5.
• Circuit breaker checks that the breaker was closed for a certain length of time be-
fore the starting occurred and that the CB has sufficient stored energy to perform
an auto-reclosing sequence and is connected to inputs 52a and CBREADY.
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Control
Operation:On
Operation:Off
Operation:External Ctrl
OR
ON AND SETON
AND S
OR
OFF AND R
RI
RI_HS OR
OR initiate
autoInitiate
Additional conditions
TRSOTF AND
PICKUP
CBREADY AND
0 AND S
0-t120 AND
52a CB Closed 0-tCBClosedMin R
0
AND
Blocking conditions READY
AND
OR
Inhibit conditions
count 0
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Figure 231: Auto-reclosing Disable/Enable and start
An auto-reclosing open time extension delay, tExtended t1, can be added to the normal shot 1
delay. It is intended to come into use if the communication channel for permissive line protection
is lost. In a case like this there can be a significant time difference in fault clearance at the two
line ends. A longer auto-reclosing open time can then be useful. This extension time is controlled
by setting parameter Extended t1 = On and the input PLCLOST.
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Control
Extended t1
PLCLOST Extend t1
initiate AND OR AND
AND
0-tTrip
pickup 0 AND
long duration
AND
(block AR)
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Figure 232: Control of extended auto-reclosing open time and long trip pulse detection
By choosing CBReadyType = CO (CB ready for a Close-Open sequence) the readiness of the
circuit breaker is also checked before issuing the CB closing command. If the CB has a readiness
contact of type CBReadyType = OCO (CB ready for an Open-Close-Open sequence) this con-
dition may not be complied with after the tripping and at the moment of reclosure. The
Open-Close-Open condition was however checked at the start of the reclosing cycle and it is
then likely that the CB is prepared for a Close-Open sequence.
The synchronism check or energizing check must be fulfilled within a set time interval, tSync.
If it is not, or if other conditions are not met, the reclosing is interrupted and blocked.
The reset timer defines a time from the issue of the reclosing command, after which the reclosing
function resets. Should a new trip occur during this time, it is treated as a continuation of the first
fault. The reset timer is started when the CB closing command is given.
A number of outputs for Autoreclosing state control keeps track of the actual state in the reclos-
ing sequence.
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Autorecloser (RREC, 79) Chapter 11
Control
SYNC
initiate
AND Blocking X
CBREADY AND OR
AR State
Control
0-tSync
AND
0 COUNTER
0 Shot 0
CL
Shot 1
1
Shot 2
2
Shot 3
3
Pulse AR (above) 0-tReset Shot 4
AND R 4
OR 0 Shot 5
5
TR2P LOGIC Reset Timer On
TR3P reclosing
1PT1
programs
PICKUP 2PT1
RI 3PHS
INPROGR
Shot 0 3PT1 OR
Shot 1 3PT2
Shot 2
Shot 3 3PT3
Shot 4
Shot 5 3PT4
PERMIT1P
3PT5
PREP3P
1
Y Blocking
0 Inhibit Y
INHIBIT OR
tInhibit
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Figure 233: Reclosing Reset and Inhibit timers
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Control
When a reclosing command is issued, the appropriate reclosing operation counter is increment-
ed. There is a counter for each type of reclosing and one for the total number of reclosing com-
mands issued.
tPulse
pulse
** AND O CLOSECMD
initiate ) R
50 ms
counter COUNTAR
RSTCOUNT
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Figure 234: Pulsing of closing command and driving the operation counters
Transient fault
After the reclosing command the reset timer tReset starts running for the set time. If no tripping
occurs within this time, the auto-reclosing will reset.
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Control
may be made or the reclosing sequence will be ended. After the reset time has elapsed, the au-
to-reclosing function resets but the CB remains open. The CB closed data at the 52a input will
be missing. Because of this, the reclosing function will not be ready for a new reclosing cycle.
Normally the signal UNSUCCL appears when a new trip and initiate is received after the last
reclosing shot has been made and the auto-reclosing function is blocked. The signal resets once
the reset time has elapsed. The “unsuccessful“ signal can also be made to depend on CB position
input. The parameter UnsucClByCBChk should then be set to CBCheck, and a timer tUnsucCl
should also be set. If the CB does not respond to the closing command and does not close, but
remains open, the output UNSUCCL is set high after time tUnsucCl.
initiate
block start AND
OR UNSUCCL
AND S
shot 0 R
UnsucClByCBchk = CBcheck
Pulse AR (Closing) OR
AND
AND 0-tUnsucCl
52a CBclosed 0
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Figure 235: Issue of signal UNSUCCL, unsuccessful reclosing
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Control
0-tAutoContWait
0
AND
CLOSECMD
AND S Q
AND
52a CBClosed
OR
initiate
RI OR
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Figure 236: Automatic proceeding of shot 2 to 5
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Control
PickupByCBOpen = On
NOT
RI AND
RI_HS AND
PICKUP
≥1
100 ms
AND
100 ms
AND
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Figure 237: Pulsing of the start inputs at "StartByCBOpen=On"
Fault
CB POS
Closed Open Closed
CB READY
INPROG
1PT1
ACTIVE
CLOSE CMD t1 1Ph tPulse
PREP3P
SUCCL
Time
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Control
Fault
CB POS Open
Closed Open C C
CB READY
TR3P
SYNC
READY
INPROGR
3PT1 t1 3Ph
3PT2 t2 3Ph
ACTIVE tReset
PREP3P
UNSUCCL
Time
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Control
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-RI
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
AR01-CLOSECMD t1s
AR01-P3P
AR01-UNSUC
tReset
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Figure 240: Permanent single-phase fault. Program 1/2/3ph, single-phase single-shot reclos-
ing
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Control
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-RI
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
t2
AR01-CLOSECMD t1s
AR01-P3P
AR01-UNSUC
tReset
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Figure 241: Permanent single-phase fault. Program 1ph + 3ph or 1/2ph + 3ph, two-shot re-
closing
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Autorecloser (RREC, 79) Chapter 11
Control
AR01-
SMBRREC_79
ON BLOCKED
OFF SETON
BLKON READY
BLKOFF ACTIVE
RESET SUCCL
INHIBIT UNSUCCL
RI INPROGR
RI_HS 1PT1
TRSOTF 2PT1
SKIPHS 3PT1
ZONESTEP 3PT2
TR2P 3PT3
TR3P 3PT4
THOLHOLD 3PT5
CBREADY PERMIT1P
52A PREP3P
PLCLOST CLOSECMD
SYNC WFMASTER
WAIT COUNT1P
RSTCOUNT COUNT2P
MODEINT COUNT3P1
COUNT3P2
COUNT3P3
COUNT3P4
COUNT3P5
COUNTAR
MODE
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Signal Description
CBREADY CB must be ready for CO/OCO operation to allow start / close
52a Status of the circuit breaker Closed/Open
PLCLOST Power line carrier or other form of permissive signal lost
SYNC Synchronism-check fulfilled (for 3Ph attempts)
WAIT Wait for master (in Multi-breaker arrangements)
RSTCOUNT Resets all counters
MODEINT Integer input used to set the reclosingMode, alternative to set-
ting
Table 262: Output signals for the SMBRREC_79 (AR01-) function block
Signal Description
BLOCKED The AR is in blocked state
SETON The AR operation is switched on, operative
READY Indicates that the AR function is ready for a new sequence
ACTIVE Reclosing sequence in progress
SUCCL Activated if CB closes during the time tUnsucCl
UNSUCCL Reclosing unsuccessful, signal resets after the reclaim time
INPROGR Reclosing shot in progress, activated during open reset
1PT1 Single-phase reclosing is in progress, shot 1
2PT1 Two-phase reclosing is in progress, shot 1
3PT1 Three-phase reclosing in progress, shot 1
3PT2 Three-phase reclosing in progress, shot 2
3PT3 Three-phase reclosing in progress, shot 3
3PT4 Three-phase reclosing in progress, shot 4
3PT5 Three-phase reclosing in progress, shot 5
PERMIT1P Permit single-pole trip, inverse signal to PREP3P
PREP3P Prepare three-pole trip, control of the next trip operation
CLOSECMD Closing command for CB
WFMASTER Signal to Slave issued by Master for sequential reclosing
COUNT1P Counting the number of single-phase reclosing shots
COUNT2P Counting the number of two-phase reclosing shots
COUNT3P1 Counting the number of three-phase reclosing shot 1
COUNT3P2 Counting the number of three-phase reclosing shot 2
COUNT3P3 Counting the number of three-phase reclosing shot 3
COUNT3P4 Counting the number of three-phase reclosing shot 4
COUNT3P5 Counting the number of three-phase reclosing shot 5
COUNTAR Counting total number of reclosing shots
MODE Integer output for reclosing mode
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Table 264: Advanced parameter group settings for the SMBRREC_79 (AR01-) function
Parameter Range Step Default Unit Description
NoOfShots 1 - 1 - Max number of reclosing
2 shots 1-5
3
4
5
StartByCBOpen Disabled - Off - To be set ON if AR is to
Enabled be started by CB open
position
CBAuxContType NormClosed - NormOpen - Select the CB aux con-
NormOpen tact type NC/NO for 52a
input
CBReadyType CO - CO - Select type of circuit
OCO breaker ready signal
CO/OCO
t1 2Ph 0.000 - 60.000 0.001 1.000 s Open time for shot 1,
two-phase
t2 3Ph 0.00 - 6000.00 0.01 30.00 s Open time for shot 2,
three-phase
t3 3Ph 0.00 - 6000.00 0.01 30.00 s Open time for shot 3,
three-phase
t4 3Ph 0.00 - 6000.00 0.01 30.00 s Open time for shot 4,
three-phase
t5 3Ph 0.00 - 6000.00 0.01 30.00 s Open time for shot 5,
three-phase
Extended t1 Disabled - Off - Extended open time at
Enabled loss of permissive chan-
nel Off/On
tExtended t1 0.000 - 60.000 0.001 0.500 s 3Ph Dead time is
extended with this value
at loss of perm ch
tInhibit 0.000 - 60.000 0.001 5.000 s Inhibit reclosing reset
time
CutPulse Disabled - Off - Shorten closing pulse at
Enabled a new trip Off/On
Follow CB Disabled - Off - Advance to next shot if
Enabled CB has been closed dur-
ing dead time
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Apparatus control (APC) Chapter 11
Control
3.1 Introduction
The apparatus control is a function for control and supervision of circuit breakers, disconnectors
and grounding switches within a bay. Permission to operate is given after evaluation of condi-
tions from other functions such as interlocking, synchronism check, operator place selection and
external or internal blockings.
Because a primary apparatus can be allocated to many functions within a Substation Automation
system, the object-oriented approach with a function module that handles the interaction and sta-
tus of each process object ensures consistency in the process information used by higher-level
control functions.
Primary apparatuses such as breakers and disconnectors are controlled and supervised by one
software module (SCSWI) each. Because the number and type of signals connected to a breaker
and a disconnector are almost the same, the same software is used to handle these two types of
apparatuses.
The software module is connected to the physical process in the switchyard via an interface
module by means of a number of digital inputs and outputs. One type of interface module is in-
tended for a circuit breaker (SXCBR) and another type is intended for a disconnector or ground-
ing switch (SXSWI). Four types of function blocks are available to cover most of the control and
supervision within the bay. These function blocks are interconnected to form a control function
reflecting the switchyard configuration. The total number used depends on the switchyard con-
figuration. These four types are:
The three latter functions are logical nodes according to IEC 61850. The function blocks Local-
Remote and LocRemControl, to handle the local/remote switch, and the function blocks
QCRSV and RESIN, for the reservation function, also belong to the apparatus control function.
The principles of operation, function block, input and output signals and setting parameters for
all these functions are described below.
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The function sends information about the Permitted Source To Operate (PSTO) and blocking
conditions to other functions within the bay e.g. switch control functions, voltage control func-
tions and measurement functions.
When the local panel switch is in Off position all commands from remote and local level will be
ignored. If the position for the local/remote switch is not valid the PSTO output will always be
set to faulty state (3), which means no possibility to operate.
To adapt the signals from the local HMI or from an external local/remote switch, the function
blocks LocalRemote and LocRemControl are needed and connected to QCBAY. For more in-
formation, see section 3.4 "Local/Remote switch (LocalRemote, LocRemControl)".
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Apparatus control (APC) Chapter 11
Control
Table 266: PSTO values for different Local panel switch positions
Local panel switch PSTO value AllPSTOValid Possible locations that shall be able
positions to operate
(configuration
parameter)
0 = Off 0 -- Not possible to operate
1 = Local 1 FALSE Local Panel
1 = Local 5 TRUE Local or Remote level without any priority
2 = Remote 2 FALSE Remote level
2 = Remote 5 TRUE Local or Remote level without any priority
3 = Faulty 3 -- Not possible to operate
Blockings
The blocking states for position indications and commands are intended to provide the possibil-
ity for the user to make common blockings for the functions configured within a complete bay.
The blocking facilities provided by the bay control function are the following:
• Blocking of position indications, BL_UPD. This input will block all inputs relat-
ed to apparatus positions for all configured functions within the bay.
• Blocking of commands, BL_CMD. This input will block all commands for all
configured functions within the bay.
• Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC
61850–8–1). If DO Behavior is set to "blocked" it means that the function is ac-
tive, but no outputs are generated, no reporting, control commands are rejected
and functional and configuration data is visible.
The switching of the Local/Remote switch requires at least system operator level. The password
will be requested at an attempt to operate if authority levels have been defined in the IED. Oth-
erwise the default authority level, SuperUser, can handle the control without LogOn. The users
and passwords are defined with the UMT.
CB01-
QCBAY
LR_OFF PSTO
LR_LOC UPD_BLKD
LR_REM CMD_BLKD
LR_VALID
BL_UPD
BL_CMD
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Table 268: Output signals for the QCBAY (CB01-) function block
Signal Description
PSTO The value for the operator place allocation
UPD_BLKD The update of position is blocked
CMD_BLKD The function is blocked for commands
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LR01- CB01-
LocalRemote QCBAY
CTRLOFF OFF LR_OFF PSTO
LOCCTRL LOCAL LR_LOC UPD_BLKD
REMCTRL REMOTE LR_REM CMD_BLKD
LHMICTRL VALID LR_VALID
BL_UPD
BL_CMD
LR02- CB02-
LocalRemote QCBAY
CTRLOFF OFF LR_OFF PSTO
LOCCTRL LOCAL LR_LOC UPD_BLKD
REMCTRL REMOTE LR_REM CMD_BLKD
LHMICTRL VALID LR_VALID
BL_UPD
BL_CMD
LRC1-
LocRemControl
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO10 HMICTR10
PSTO11 HMICTR11
PSTO12 HMICTR12
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Figure 244: Configuration for the local/remote handling for a local LCD HMI with two bays
and two screen pages
If the IED contains control functions for several bays, the local/remote position can be different
for the included bays. When the local LCD HMI is used the position of the local/remote switch
can be different depending on which single line diagram screen page that is presented on the lo-
cal HMI. The function block LocRemControl controls the presentation of the LEDs for the lo-
cal/remote position to applicable bay and screen page.
The switching of the Local/Remote switch requires at least system operator level. The password
will be requested at an attempt to operate if authority levels have been defined in the IED. Oth-
erwise the default authority level, SuperUser, can handle the control without LogOn. The users
and passwords are defined with the UMT.
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Control
LR01-
LocalRemote
CT RLOFF OFF
LOCCT RL LOCAL
REMCT RL REMOT E
LHMICT RL VALID
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LRC1-
LocRemControl
PST O1 HMICT R1
PST O2 HMICT R2
PST O3 HMICT R3
PST O4 HMICT R4
PST O5 HMICT R5
PST O6 HMICT R6
PST O7 HMICT R7
PST O8 HMICT R8
PST O9 HMICT R9
PST O10 HMICT R10
PST O11 HMICT R11
PST O12 HMICT R12
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Table 271: Output signals for the LocalRemote (LR01-) function block
Signal Description
OFF Control is disabled
LOCAL Local control is activated
REMOTE Remote control is activated
VALID Outputs are valid
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Table 272: Input signals for the LocRemControl (LRC1-) function block
Signal Description
PSTO1 PSTO input channel 1
PSTO2 PSTO input channel 2
PSTO3 PSTO input channel 3
PSTO4 PSTO input channel 4
PSTO5 PSTO input channel 5
PSTO6 PSTO input channel 6
PSTO7 PSTO input channel 7
PSTO8 PSTO input channel 8
PSTO9 PSTO input channel 9
PSTO10 PSTO input channel 10
PSTO11 PSTO input channel 11
PSTO12 PSTO input channel 12
Table 273: Output signals for the LocRemControl (LRC1-) function block
Signal Description
HMICTR1 Bitmask output 1 to local remote LHMI input
HMICTR2 Bitmask output 2 to local remote LHMI input
HMICTR3 Bitmask output 3 to local remote LHMI input
HMICTR4 Bitmask output 4 to local remote LHMI input
HMICTR5 Bitmask output 5 to local remote LHMI input
HMICTR6 Bitmask output 6 to local remote LHMI input
HMICTR7 Bitmask output 7 to local remote LHMI input
HMICTR8 Bitmask output 8 to local remote LHMI input
HMICTR9 Bitmask output 9 to local remote LHMI input
HMICTR10 Bitmask output 10 to local remote LHMI input
HMICTR11 Bitmask output 11 to local remote LHMI input
HMICTR12 Bitmask output 12 to local remote LHMI input
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Command handling
Two types of command models can be used. The two command models are "direct with en-
hanced security" and "SBO (Select-Before-Operate) with enhanced security". Which one of
these two command models that are used is defined by the parameter CtlModel. The meaning
with "direct with enhanced security" model is that no select is required. The meaning with "SBO
with enhanced security" model is that a select is required before execute.
In this function only commands with enhanced security is supported regarding changing of the
position. With enhanced security means that the command sequence is supervised in three steps,
the selection, command evaluation and the supervision of position. Each step ends up with a
pulsed signal to indicate that the respective step in the command sequence is finished. If an error
occurs in one of the steps in the command sequence, the sequence is terminated and the error is
mapped into the enumerated variable "cause" attribute belonging to the pulsed response signal
for the IEC61850 communication. The last cause L_CAUSE can be read from the function block
and used for example at commissioning. The meaning of the cause signals can be found in table
2.
Note!
There is not any relation between the command direction and the actual position. For example,
if the switch is in close position it is possible to execute a close command.
Before an executing command, an evaluation of the position is done. If the parameter PosDe-
pendent is true and the position is in intermediate state or in bad state no executing command is
send. If the parameter is false the execution command is send independent of the position value.
Evaluation of position
In the case when there are three one-phase switches connected to the switch control function, the
switch control will "merge" the position of the three switches to the resulting three-phase posi-
tion. In the case when the position differ between the one-phase switches, following principles
will be applied:
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Apparatus control (APC) Chapter 11
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The time stamp of the output three-phase position from switch control will have the time stamp
of the last changed phase when it goes to end position. When it goes to intermediate position or
bad state, it will get the time stamp of the first changed phase.
In addition, there is also the possibility that one of the one-phase switches will change position
at any time due to a trip. Such situation is here called pole discrepancy and is supervised by this
function. In case of a pole discrepancy situation, i.e. the position of the one-phase switches are
not equal for a time longer than the setting tPoleDiscord, an error signal POLEDISC will be set.
In the supervision phase, the switch controller function evaluates the "cause" values from the
switch modules XCBR/XSWI. At error the "cause" value with highest priority is shown.
Blocking principles
The blocking signals are normally coming from the bay control function (QCBAY) and via the
IEC61850 communication from the operator place.
Note!
The different block conditions will only affect the operation of this function, i.e. no blocking sig-
nals will be "forwarded" to other functions. The above blocking outputs are stored in a non-vol-
atile memory.
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When there is no positive confirmation from the synchronism-check function, the SCSWI will
send a start signal START_SY to the synchronizing function, which will send the closing com-
mand to the SXCBR when the synchronizing conditions are fulfilled, see figure 247. If no syn-
chronizing function is included, the timer for supervision of the "synchronizing in progress
signal" is set to 0, which means no start of the synchronizing function. The SCSWI will then set
the attribute "blocked-by-synchronism-check" in the "cause" signal. See also the time diagram
in figure 251.
SCSWI SXCBR
EXE_CL
OR CLOSE
SYNC_OK
START_SY
SY_INPRO
SECRSYN
CLOSE. CB
Synchro Synchronizing
Check function
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Figure 247: Example of interaction between SCSWI, SECRSYN (synchronism check and syn-
chronizing function) and SXCBR function
Time diagrams
The SCSWI function has timers for evaluating different time supervision conditions. These tim-
ers are explained here.
The timer tSelect is used for supervising the time between the select and the execute command
signal, i.e. the time the operator has to perform the command execution after the selection of the
object to operate.
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Apparatus control (APC) Chapter 11
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select
execute command
tSelect
timer t1 t1>tSelect, then long-
operation-time in 'cause'
is set
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The parameter tResResponse is used to set the maximum allowed time to make the reservation,
i.e. the time between reservation request and the feedback reservation granted from all bays in-
volved in the reservation function.
select
command termination
tResResponse t1>tResResponse, then
timer 1-of-n-control in 'cause'
t1 is set
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The timer tExecutionFB supervises the time between the execute command and the command
termination, see figure 250.
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Apparatus control (APC) Chapter 11
Control
execute command
phase A open
close
phase B open
close
phase C open
close
command termination
phase A
command termination
phase B
command termination
phase C
command termination *
close
The parameter tSynchrocheck is used to define the maximum allowed time between the execute
command and the input SYNC_OK to become true. If SYNC_OK=true at the time the execute
command signal is received, the timer "tSynchrocheck" will not start. The start signal for the
synchronizing is obtained if the synchronism-check conditions are not fulfilled.
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execute command
SYNC_OK
tSynchrocheck
t1
START_SY
SY_INPRO
tSynchronizing
t2>tSynchronizing, then
t2 blocked-by-synchronism
check in 'cause' is set
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Figure 251: tSynchroCheck and tSynchronizing
Error handling
Depending on what error that occurs during the command sequence the error signal will be set
with a value. Table 275 describes vendor specific cause values in addition to these specified in
IEC 61850-8-1 standard. The list of values of the “cause” are in order of priority. The values are
available over the IEC 61850. An output L_CAUSE on the function block indicates the latest
value of the error during the command.
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Apparatus control (APC) Chapter 11
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CS01-
SCSWI
BLOCK EXE_OP
PSTO EXE_CL
L_SEL SELECTED
L_OPEN RES_RQ
L_CLOSE START_SY
AU_OPEN POSITION
AU_CLOSE OPENPOS
BL_CMD CLOSEPOS
RES_GRT POLEDISC
RES_EXT CMD_BLK
SY_INPRO L_CAUSE
SYNC_OK XOUT
EN_OPEN
EN_CLOSE
XPOS1
XPOS2
XPOS3
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Table 277: Output signals for the SCSWI (CS01-) function block
Signal Description
EXE_OP Execute Open command
EXE_CL Execute Close command
SELECTED The select conditions are fulfilled
RES_RQ Request signal to the reservation function
START_SY Starts the synchronizing function
POSITION Position indication
OPENPOS Open position indication
CLOSEPOS Closed position indication
POLEDISC The positions for poles A, B and C are not equal after a set time
CMD_BLK Commands are blocked
L_CAUSE Latest value of the error indication during command
XOUT Execution information to XCBR/XSWI
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The function has an operation counter for closing and opening commands. The counter value
can be read remotely from the operator place. The value is reset from a binary input or remotely
from the operator place.
Local/Remote switch
One binary input signal LR_SWI is included in this function to indicate the local/remote switch
position from switchyard provided via the I/O board. If this signal is set to TRUE it means that
change of position is allowed only from switchyard level. If the signal is set to FALSE it means
that command from IED or higher level is permitted. When the signal is set to TRUE all com-
mands (for change of position) from internal IED clients are rejected, even trip commands from
protection functions are rejected. The functionality of the local/remote switch is described in
figure 253.
Local= Operation at
UE switch yard level
TR
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Blocking principles
The function includes several blocking principles. The basic principle for all blocking signals is
that they will affect commands from all other clients e.g. operators place, protection functions,
autoreclosure etc.
• Block/deblock for open command. It is used to block operation for open com-
mand. Note that this block signal also affects the input OPEN for immediate com-
mand.
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• Block/deblock for close command. It is used to block operation for close com-
mand. Note that this block signal also affects the input CLOSE for immediate
command.
• Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
• Blocking of function, BLOCK, signal from DO (Data Object) Behavior
(IEC61850). If DO Behavior is set to "blocked" it means that the function is ac-
tive, but no outputs are generated, no reporting, control commands are rejected
and functional and configuration data is visible.
Substitution
The substitution part in this function is used for manual set of the position for the switch. The
typical use of substitution is that an operator enters a manual value because that the real process
value is erroneous of some reason. The function will then use the manually entered value instead
of the value for positions determined by the process.
Note!
It is always possible to make a substitution, independently of the position indication and the sta-
tus information of the I/O board. When substitution is enabled, the position values are blocked
for updating and other signals related to the position are reset. The substituted values are stored
in a non-volatile memory.
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStart-
Move supervises that the primary device starts moving after the execute output pulse is sent. tIn-
termediate defines the maximum allowed time for intermediate position. Figure 254 explains
these two timers during the execute phase.
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OPENPOS
CLOSEPOS
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The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to
the primary equipment. Note that the output pulses for open and close command can have dif-
ferent pulse lengths. The pulses can also be set to be adaptive with the configuration parameter
AdaptivePulse. Figure 255 shows the principle of the execute output pulse. The adaptively pa-
rameter will have affect on both execute output pulses.
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
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If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or
tClosePulse.
• the new expected final position is reached and the configuration parameter Adap-
tivePulse is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, i.e. tStartMove has
elapsed.
Note!
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is
executed the execute output pulse resets only when timer "tOpenPulse" or "tClosePulse" has
elapsed.
There is one exception from the first item above. If the primary device is in open position and
an open command is executed or if the primary device is in close position and a close command
is executed. In these cases, with the additional condition that the configuration parameter Adap-
tivePulse is true, the execute output pulse is always activated and resets when tStartMove has
elapsed. If the configuration parameter AdaptivePulse is set to false the execution output re-
mains active until the pulse duration timer has elapsed.
An example of when a primary device is open and an open command is executed is shown in
figure 256 .
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
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Error handling
Depending on what error that occurs during the command sequence the error signal will be set
with a value. Table 279 describes vendor specific cause values in addition to these specified in
IEC 61850-8-1 standard. The list of values of the “cause” are in order of priority. The values are
available over the IEC 61850. An output L_CAUSE on the function block indicates the latest
value of the error during the command.
Table 279: Vendor specific cause values for Apparatus control in priority order
Apparatus control Description
function
–22 wrongCTLModel
–23 blockedForCommand
–24 blocked-for-open-command
–25 blocked-for-close-command
–30 longOperationTime
–31 switch-not-start-moving
–32 persistent-intermediate-state
–33 switch-returned-to-initial-position
–34 switch-in-bad-state
–35 not-expected-final-position
XC01-
SXCBR
BLOCK GRPConABS1
LR_SWI EXE_OP
OPEN GRPConABS2
CLOSE EXE_CL
BL_OPEN SUBSTED
BL_CLOSE OP_BLKD
BL_UPD CL_BLKD
POSOPEN UPD_BLKD
POSCLOSE POSITION
TR_OPEN OPENPOS
TR_CLOSE CLOSEPOS
RS_CNT TR_POS
XIN CNT_VAL
TERVALUE L_CAUSE
OSEVALUE
PENVALUE
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Table 281: Output signals for the SXCBR (XC01-) function block
Signal Description
XPOS Group signal for XCBR output
EXE_OP Executes the command for open direction
EXE_CL Executes the command for close direction
SUBSTED Indication that the position is substituted
OP_BLKD Indication that the function is blocked for open commands
CL_BLKD Indication that the function is blocked for close commands
UPD_BLKD The update of position indication is blocked
POSITION Apparatus position indication
OPENPOS Apparatus open position
CLOSEPOS Apparatus closed position
TR_POS Truck position indication
CNT_VAL The value of the operation counter
L_CAUSE Latest value of the error indication during command
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The function has an operation counter for closing and opening commands. The counter value
can be read remotely from the operator place. The value is reset from a binary input or remotely
from the operator place.
Local/Remote switch
One binary input signal LR_SWI is included in this function to indicate the local/remote switch
position from switchyard provided via the I/O board. If this signal is set to TRUE it means that
change of position is allowed only from switchyard level. If the signal is set to FALSE it means
that command from IED or higher level is permitted. When the signal is set to TRUE all com-
mands (for change of position) from internal IED clients are rejected, even trip commands from
protection functions are rejected. The functionality of the local/remote switch is described in
figure 258.
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Apparatus control (APC) Chapter 11
Control
Local= Operation at
UE switch yard level
TR
en05000096.vsd
Blocking principles
The function includes several blocking principles. The basic principle for all blocking signals is
that they will affect commands from all other clients e.g. operators place, protection functions,
autoreclosure etc.
• Block/deblock for open command. It is used to block operation for open com-
mand. Note that this block signal also affects the input OPEN for immediate com-
mand.
• Block/deblock for close command. It is used to block operation for close com-
mand. Note that this block signal also affects the input CLOSE for immediate
command.
• Update block/deblock of positions. It is used to block the updating of position
values. Other signals related to the position will be reset.
• Blocking of function, BLOCK, signal from DO (Data Object) Behavior
(IEC61850). If DO Behavior is set to "blocked" it means that the function is ac-
tive, but no outputs are generated, no reporting, control commands are rejected
and functional and configuration data is visible.
Substitution
The substitution part in this function is used for manual set of the position for the switch. The
typical use of substitution is that an operator enters a manual value because that the real process
value is erroneous of some reason. The function will then use the manually entered value instead
of the value for positions determined by the process.
Note!
It is always possible to make a substitution, independently of the position indication and the sta-
tus information of the I/O board. When substitution is enabled, the position values are blocked
for updating and other signals related to the position are reset. The substituted values are stored
in a non-volatile memory.
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Apparatus control (APC) Chapter 11
Control
Time diagrams
There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStart-
Move supervises that the primary device starts moving after the execute output pulse is sent. tIn-
termediate defines the maximum allowed time for intermediate position. Figure 259 explains
these two timers during the execute phase.
OPENPOS
CLOSEPOS
en05000097.vsd
The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to
the primary equipment. Note that the output pulses for open and close command can have dif-
ferent pulse lengths. The pulses can also be set to be adaptive with the configuration parameter
AdaptivePulse. Figure 260 shows the principle of the execute output pulse. The adaptively pa-
rameter will have affect on both execute output pulses.
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Apparatus control (APC) Chapter 11
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OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or
tClosePulse.
• the new expected final position is reached and the configuration parameter Adap-
tivePulse is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, i.e. tStartMove has
elapsed.
Note!
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is
executed the execute output pulse resets only when timer "tOpenPulse" or "tClosePulse" has
elapsed.
There is one exception from the first item above. If the primary device is in open position and
an open command is executed or if the primary device is in close position and a close command
is executed. In these cases, with the additional condition that the configuration parameter Adap-
tivePulse is true, the execute output pulse is always activated and resets when tStartMove has
elapsed. If the configuration parameter AdaptivePulse is set to false the execution output re-
mains active until the pulse duration timer has elapsed.
An example when a primary device is open and an open command is executed is shown in
figure 261.
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Apparatus control (APC) Chapter 11
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OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
Error handling
Depending on what error that occurs during the command sequence the error signal will be set
with a value. Table 283 describes vendor specific cause values in addition to these specified in
IEC 61850-8-1 standard. The list of values of the “cause” are in order of priority. The values are
available over the IEC 61850. An output L_CAUSE on the function block indicates the latest
value of the error during the command.
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Apparatus control (APC) Chapter 11
Control
XS01-
SXSWI
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOPEN POSITION
POSCLOSE OPENPOS
RS_CNT CLOSEPOS
XIN CNT_VAL
L_CAUSE
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Table 285: Output signals for the SXSWI (XS01-) function block
Signal Description
XPOS Group signal for XSWI output
EXE_OP Executes the command for open direction
EXE_CL Executes the command for close direction
SUBSTED Indication that the position is substituted
OP_BLKD Indication that the function is blocked for open commands
CL_BLKD Indication that the function is blocked for close commands
UPD_BLKD The update of position indication is blocked
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Apparatus control (APC) Chapter 11
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Signal Description
POSITION Apparatus position indication
OPENPOS Apparatus open position
CLOSEPOS Apparatus closed position
CNT_VAL The value of the operation counter
L_CAUSE Latest value of the error indication during command
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Apparatus control (APC) Chapter 11
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The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay only (TRUE)
or other bays (FALSE). To reserve the own bay only means that no reservation request
RES_BAYS is created.
If the RESERVED output is not set, the selection is made with the output RES_GRTx (where
x=1-8 is the number of the requesting apparatus), which is connected to switch controller SC-
SWI. If the bay already is reserved the command sequence will be reset and the SCSWI will set
the attribute "1-of-n-control" in the "cause" signal.
When it receives acknowledge from the bays via the input RES_DATA, it sets the output
RES_GRTx (where x=1-8 is the number of the requesting apparatus). If not acknowledgement
from all bays is received within a certain time defined in SCSWI (tResResponse), the SCSWI
will reset the reservation and set the attribute "1-of-n-control" in the "cause" signal.
The reservation function can also be overridden in the own bay with the OVERRIDE input sig-
nal, i.e. reserving the own bay without waiting for the external acknowledge.
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Apparatus control (APC) Chapter 11
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If there are more than eight apparatuses in the bay there has to be one additional QCRSV. The
both functions QCRSV have to communicate and this is done through the input EXCH_IN and
EXCH_OUT according to figure 10. If more then one QCRSV are used, the execution order is
very important. The execution order must be in the way that the first QCRSV has a lower number
than the next one.
CR01-
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
CR02-
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3 RES_BAYS
OR
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6 ACK_TO_B
RES_RQ6 RES_GRT7 OR
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B RESERVED
OR
OVERRIDE RESERVED
RES_DATA EXCH_OUT
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CR01-
QCRSV
EXCH_IN RES_GRT 1
RES_RQ1 RES_GRT 2
RES_RQ2 RES_GRT 3
RES_RQ3 RES_GRT 4
RES_RQ4 RES_GRT 5
RES_RQ5 RES_GRT 6
RES_RQ6 RES_GRT 7
RES_RQ7 RES_GRT 8
RES_RQ8 RES_BAYS
BLK_RES ACK_T O_B
OVERRIDE RESERVED
RES_DAT A EXCH_OUT
en05000340.vsd
Table 288: Output signals for the QCRSV (CR01-) function block
Signal Description
RES_GRT1 Reservation is made and the apparatus 1 is allowed to operate
RES_GRT2 Reservation is made and the apparatus 2 is allowed to operate
RES_GRT3 Reservation is made and the apparatus 3 is allowed to operate
RES_GRT4 Reservation is made and the apparatus 4 is allowed to operate
RES_GRT5 Reservation is made and the apparatus 5 is allowed to operate
RES_GRT6 Reservation is made and the apparatus 6 is allowed to operate
RES_GRT7 Reservation is made and the apparatus 7 is allowed to operate
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Apparatus control (APC) Chapter 11
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Signal Description
RES_GRT8 Reservation is made and the apparatus 8 is allowed to operate
RES_BAYS Request for reservation of other bays
ACK_TO_B Acknowledge to other bays that this bay is reserved
RESERVED Indicates that the bay is reserved
EXCH_OUT Used for exchange signals between different BayRes blocks
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Apparatus control (APC) Chapter 11
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EXCH_IN INT
BIN
ACK_F_B
AND
FutureUse
OR
ANY_ACK
BAY_ACK OR
VALID_TX
AND
BAY_VAL OR
RE_RQ_B
OR
BAY_RES AND
V _RE_RQ
OR
BIN
EXCH_OUT
INT
INT……..Integer
BIN……..Binary en05000089_ansi.vsd
Figure 265: Logic diagram for RESIN
Figure 266 describes the principle of the data exchange between all RESIN modules in the cur-
rent bay. There is one RESIN function block per "other bay" used in the reservation mechanism.
The output signal EXCH_OUT in the last RESIN functions block are connected to the module
QCRSV that handles the reservation function in the own bay. The value to the input EXCH_IN
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Apparatus control (APC) Chapter 11
Control
on the first RESIN module in the chain has the integer value 5. This is provided by the use of
instance number one of the function block RESIN (RE01-), where the input EXCH_IN is set to
#5, but is hidden for the user.
RE01-
RESIN
BAY_ACK ACK_F_B
Bay 1 BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
RE02-
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay 2 BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
REnn-
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
CR01-
Bay n BAY_VAL VALID_TX
BAY_RES RE_RQ_B QCRSV
V_RE_RQ
EXCH_OUT RES_DATA
en05000090.vsd
RE01-
RESIN
BAY_ACK ACK_F_B
BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
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Table 291: Output signals for the RESIN (RE01-) function block
Signal Description
ACK_F_B All other bays have acknowledged the reservation request from
this bay
ANY_ACK Any other bay has acknowledged the reservation request from
this bay
VALID_TX The reservation and acknowledge signals from other bays are
valid
RE_RQ_B Request from other bay to reserve this bay
V_RE_RQ Check if the request of reserving this bay is valid
EXCH_OUT Used for exchange signals between different ResIn blocks
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Interlocking Chapter 11
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4 Interlocking
4.1 Introduction
The interlocking function blocks the possibility to operate high-voltage switching devices, for
instance when a disconnector is under load, in order to prevent material damage and/or acciden-
tal human injury.
Each control IED has interlocking functions for different switchyard arrangements, each han-
dling the interlocking of one bay. The function is distributed to each control IED and not depen-
dent on any central function. For the station-wide interlocking, the IEDs communicate via the
station bus or by using hard wired binary inputs/outputs.
The interlocking conditions depend on the circuit configuration and status of the installation at
any given time.
The reservation function (see section 3 "Apparatus control (APC)") is used to ensure that HV
apparatuses that might affect the interlock are blocked during the time gap, which arises between
position updates. This can be done by means of the communication system, reserving all HV ap-
paratuses that might influence the interlocking condition of the intended operation. The reserva-
tion is maintained until the operation is performed.
After the selection and reservation of an apparatus, the function has complete data on the status
of all apparatuses in the switchyard that are affected by the selection. Other operators cannot in-
terfere with the reserved apparatus or the status of switching devices that may affect it.
The open or closed positions of the HV apparatuses are inputs to software modules distributed
in the control IEDs. Each module contains the interlocking logic for a bay. The interlocking log-
ic in a module is different, depending on the bay function and the switchyard arrangements, that
is, double-breaker or breaker-and-a-half bays have different modules. Specific interlocking con-
ditions and connections between standard interlocking modules are performed with an engineer-
ing tool. Bay-level interlocking signals can include the following kind of information:
The interlocking module is connected to the surrounding functions within a bay as shown in fig-
ure 268.
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Interlocking Chapter 11
Control
Apparatus control
Interlocking
modules
modules in
SCILO SCSWI SXSWI
other bays
Apparatus control
modules
Interlocking SCILO SCSWI SXCBR 152
module
Apparatus control
modules
SCILO SCSWI SXSWI
en04000526_ansi.vsd
Bays communicate via the station bus and can convey information regarding the following:
• Ungrounding busbars
• Busbars connected together
• Other bays connected to a busbar
• Received data from other bays is valid
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Interlocking Chapter 11
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Station bus
Disc 189 and 289 closed Disc 189 and 289 closed WA1 ungrounded
WA1 ungrounded
WA1 and WA2 interconn
WA1 not grounded WA1 not grounded
WA2 not grounded
WA1 and WA2 interconn
... WA2 not grounded
WA1 and WA2 interconn
WA1 and WA2 interconn
in other bay
..
WA1
WA2
189 289 189 289 189 289 189G 289G
152
152 152
989 989
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Figure 269: Data exchange between interlocking modules.
When invalid data such as intermediate position, loss of a control terminal, or input board error
are used as conditions for the interlocking condition in a bay, a release for execution of the func-
tion will not be given.
On the station HMI an override function exists, which can be used to bypass the interlocking
function in cases where not all the data required for the condition is valid.
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Interlocking Chapter 11
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To make the implementation of the interlocking function easier, a number of standardized and
tested software interlocking modules containing logic for the interlocking conditions are avail-
able:
The interlocking conditions can be altered, to meet the customers specific requirements, by add-
ing configurable logic by means of the graphical configuration tool PCM 600. The inputs
Qx_EXy on the interlocking modules are used to add these specific conditions.
The input signals EXDU_xx shall be set to true if there is no transmission error at the transfer
of information from other bays. Required signals with designations ending in TR are intended
for transfer to other bays.
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Interlocking Chapter 11
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POSOPEN SCILO
POSCLOSE XOR NOT
AND EN_OPEN
OR
AND
OPEN_EN
CLOSE_EN AND EN_CLOSE
OR
AND
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CI01-
SCILO
POSOPEN EN_OPEN
POSCLOSE EN_CLOSE
OPEN_EN
CLOSE_EN
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Table 294: Output signals for the SCILO (CI01-) function block
Signal Description
EN_OPEN Open operation at closed or intermediate or bad position is
enabled
EN_CLOSE Close operation at open or intermediate or bad position is
enabled
540
Interlocking Chapter 11
Control
WA1 (A)
WA2 (B)
WA7 (C)
152
289G
989
989G
en04000478_ansi.vsd
541
Interlocking Chapter 11
Control
IF01-
ABC_LINE
152_OP 152CLREL
152_CL 152CLITL
989_OP 989REL
989_CL 989ITL
189_OP 189REL
189_CL 189ITL
289_OP 289REL
289_CL 289ITL
789_OP 789REL
789_CL 789ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
989G_OP 989GREL
989G_CL 989GITL
1189G_OP 189OPTR
1189G_CL 189CLTR
2189G_OP 289OPTR
2189G_CL 289CLTR
7189G_OP 789OPTR
7189G_CL 789CLTR
BB7_D_OP 1289OPTR
BC_12_CL 1289CLTR
BC_17_OP VP189TR
BC_17_CL VP289TR
BC_27_OP VP789TR
BC_27_CL VP1289TR
VOLT_OFF
VOLT_ON
VP_BB7_D
VP_BC_12
VP_BC_17
VP_BC_27
EXDU_89G
EXDU_BPB
EXDU_BC
989_EX1
989_EX2
189_EX1
189_EX2
189_EX3
289_EX1
289_EX2
289_EX3
789_EX1
789_EX2
789_EX3
789_EX4
en05000357_ansi.vsd
542
Interlocking Chapter 11
Control
ABC_LINE
152_OP
152_CL XOR VP152
989_OP
989_CL XOR VP989
189_OP 152CLREL
189_CL XOR VP189 AND NOT
152CLITL
289_OP
289_CL XOR VP289
789_OP
789_CL XOR VP789
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
989G_OP
989G_CL XOR VP989G
1189G_OP
1189G_CL XOR VP1189G
2189G_OP
2189G_CL XOR VP2189G
7189G_OP
7189G_CL XOR VP7189G
VOLT_OFF
VOLT_ON XOR VPVOLT
VP152
VP189G AND OR 989REL
VP289G 989ITL
NOT
VP989G
152_OP
189G_OP
289G_OP
989G_OP
989_EX1
VP289G
VP989G AND
289G_CL
989G_CL
989_EX2
en04000527_ansi.vsd
543
Interlocking Chapter 11
Control
VP152 189REL
AND OR
VP289
VP189G 189ITL
NOT
VP289G
VP1189G
152_OP
289_OP
189G_OP
289G_OP
1189G_OP
EXDU_89G
189_EX1
VP289 AND
VP_BC_12
289_CL
BC_12_CL
EXDU_BC
189_EX2
VP189G
AND
VP1189G
189G_CL
1189G_CL
EXDU_89G
189EX3
en04000528_ansi.vsd
544
Interlocking Chapter 11
Control
VP152 289REL
AND OR
VP189
VP189G 289ITL
NOT
VP289G
VP2189G
152_OP
189_OP
189G_OP
289G_OP
2189G_OP
EXDU_89G
289_EX1
VP189 AND
VP_BC_12
QB1_CL
BC_12_CL
EXDU_BC
289_EX2
VP189G
AND
VP2189G
189G_CL
2189G_CL
EXDU_89G
289_EX3
en04000529_ansi.vsd
545
Interlocking Chapter 11
Control
546
Interlocking Chapter 11
Control
VP989G 789REL
AND OR
VP7189G
VP_BB7_D 789ITL
NOT
VP_BC_17
VP_BC_27
989G_OP
7189G_OP
EXDU_89G
BB7_D_OP
EXDU_BPB
BC_17_OP
BC_27_OP
EXDU_BC
789_EX1
VP152
VP189 AND
VP989G
VP989
VP7189G
VP_BB7_D
VP_BC_17
152_CL
189_CL
989G_OP
989_CL
7189G_OP
EXDU_89G
BB7_D_OP
EXDU_BPB
BC_17_CL
EXDU_BC
789_EX2
en04000530_ansi.vsd
547
Interlocking Chapter 11
Control
VP152
VP289
AND OR
VP989G
VP989
VP7189G
VP_BB7_D
VP_BC_27
152_CL
289_CL
989G_OP
989_CL
7189G_OP
EXDU_89G
BB7_D_OP
EXDU_BPB
BC_27_CL
EXDU_BC
789_EX3
VP989G
VP7189G AND
989G_CL
7189G_CL
EXDU_89G
789_EX4
VP189 189GREL
VP289 189GITL
AND NOT
VP989
289GREL
189_OP
289_OP 289GITL
NOT
989_OP
VP789
VP989 989GREL
AND
VPVOLT 989GITL
789_OP NOT
989_OP
VOLT_OFF
en04000531_ansi.vsd
548
Interlocking Chapter 11
Control
189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
289_OP 289OPTR
289_CL 289CLTR
VP289 VP289TR
789_OP 789OPTR
789_CL 789CLTR
VP789 VP789TR
189_OP 1289OPTR
289_OP OR 1289CLTR
VP189 NOT
VP1289TR
VP289 AND
en04000532_ansi.vsd
549
Interlocking Chapter 11
Control
Signal Description
7189G_OP Grounding switch 7189G on busbar WA7 is in open position
7189G_CL Grounding switch 7189G on busbar WA7 is in closed position
BB7_D_OP Disconnectors on busbar WA7 except in the own bay are open
BC_12_CL A bus coupler connection exists between busbar WA1 and WA2
BC_17_OP No bus coupler connection exists between busbar WA1 and
WA7
BC_17_CL A bus coupler connection exists between busbar WA1 and WA7
BC_27_OP No bus coupler connection exists between busbar WA2 and
WA7
BC_27_CL A bus coupler connection exists between busbar WA2 and WA7
VOLT_OFF There is no voltage on the line and not VT (fuse) failure
VOLT_ON There is voltage on the line or there is a VT (fuse) failure
VP_BB7_D Switch status of the disconnectors on busbar WA7 are valid
VP_BC_12 Status of the bus coupler apparatuses between WA1 and WA2
are valid
VP_BC_17 Status of the bus coupler app. between WA1 and WA7 are valid
VP_BC_27 Status of the bus coupler app. between WA2 and WA7 are valid
EXDU_89G No transm error from any bay containing grounding switches
EXDU_BPB No transm error from any bay with disconnectors on WA7
EXDU_BC No transmission error from any bus coupler bay
989_EX1 External condition for apparatus 989
989_EX2 External condition for apparatus 989
189_EX1 External condition for apparatus 189
189_EX2 External condition for apparatus 189
189_EX3 External condition for apparatus 189
289_EX1 External condition for apparatus 289
289_EX2 External condition for apparatus 289
289_EX3 External condition for apparatus 289
789_EX1 External condition for apparatus 789
789_EX2 External condition for apparatus 789
789_EX3 External condition for apparatus 789
789_EX4 External condition for apparatus 789
550
Interlocking Chapter 11
Control
Table 296: Output signals for the ABC_LINE (IF01-) function block
Signal Description
152CLREL Closing of 152 is allowed
152CLITL Closing of 152 is not allowed
989REL Switching of 989 is allowed
989ITL Switching of 989 is not allowed
189REL Switching of 189 is allowed
189ITL Switching of 189 is not allowed
289REL Switching of 289 is allowed
289ITL Switching of 289 is not allowed
789REL Switching of 789 is allowed
789ITL Switching of 789 is not allowed
189GREL Switching of 189G is allowed
189GITL Switching of 189G is not allowed
289GREL Switching of 289G is allowed
289GITL Switching of 289G is not allowed
989GREL Switching of 989G is allowed
989GITL Switching of 989G is not allowed
189OPTR 189 is in open position
189CLTR 189 is in closed position
289OPTR 289 is in open position
289CLTR 289 is in closed position
789OPTR 789 is in open position
789CLTR 789 is in closed position
1289OPTR 189 or 289 or both are in open position
1289CLTR 189 and 289 are not in open position
VP189TR Switch status of 189 is valid (open or closed)
VP289TR Switch status of 289 is valid (open or closed)
VP789TR Switch status of 789 is valid (open or closed)
VP1289TR Switch status of 189 and 289 are valid (open or closed)
551
Interlocking Chapter 11
Control
WA1 (A)
WA2 (B)
WA7 (C)
152
289G
en04000514_ansi.vsd
552
Interlocking Chapter 11
Control
IG01-
ABC_BC
152_OP 152OPREL
152_CL 152OPITL
189_OP 152CLREL
189_CL 152CLITL
289_OP 189REL
289_CL 189ITL
789_OP 289REL
789_CL 289ITL
2089_OP 789REL
2089_CL 789ITL
189G_OP 2089REL
189G_CL 2089ITL
289G_OP 189GREL
289G_CL 189GITL
1189G_OP 289GREL
1189G_CL 289GITL
2189G_OP 189OPTR
2189G_CL 189CLTR
7189G_OP 22089OTR
7189G_CL 22089CTR
BBTR_OP 789OPTR
BC_12_CL 789CLTR
VP_BBTR 1289OPTR
VP_BC_12 1289CLTR
EXDU_89G BC12OPTR
EXDU_12 BC12CLTR
EXDU_BC BC17OPTR
152O_EX1 BC17CLTR
152O_EX2 BC27OPTR
152O_EX3 BC27CLTR
189_EX1 VP189TR
189_EX2 V22089TR
189_EX3 VP789TR
289_EX1 VP1289TR
289_EX2 VPBC12TR
289_EX3 VPBC17TR
2089_EX1 VPBC27TR
2089_EX2
789_EX1
789_EX2
en05000350_ansi.vsd
553
Interlocking Chapter 11
Control
ABC_BC
152_OP
152_CL XOR VP152
189_OP
189_CL XOR VP189
2089_OP
2089_CL XOR VP2089
789_OP
789_CL XOR VP789
289_OP
289_CL XOR VP289
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
1189G_OP
1189G_CL XOR VP1189G
2189G_OP
2189G_CL XOR VP2189G
7189G_OP
7189G_CL XOR VP7189G
VP189
189_OP AND
152OPREL
OR
152O_EX1 152OPITL
NOT
VP2089
2089_OP AND
152O_EX2
VP_BBTR
BBTR_OP AND
EXDU_12
152O_EX3
VP189 152CLREL
VP289 AND 152CLITL
VP789 NOT
VP2089
en04000533_ansi.vsd
554
Interlocking Chapter 11
Control
VP152
VP289 AND OR 189REL
VP189G 189ITL
VP289G NOT
VP1189G
152_OP
289_OP
189G_OP
289G_OP
1189G_OP
EXDU_89G
189_EX1
VP289
VP_BC_12 AND
289_CL
BC_12_CL
EXDU_BC
189_EX2
VP189G
VP1189G AND
189G_CL
1189G_CL
EXDU_89G
189_EX3
en04000534_ansi.vsd
555
Interlocking Chapter 11
Control
VP152
VP189 AND OR 289REL
VP189G 289ITL
VP289G NOT
VP2189G
152_OP
189_OP
189G_OP
289G_OP
2189G_OP
EXDU_89G
289_EX1
VP189
VP_BC_12 AND
189_CL
BC_12_CL
EXDU_BC
289_EX2
VP189G
VP2189G AND
189G_CL
2189G_CL
EXDU_89G
289_EX3
en04000535_ansi.vsd
556
Interlocking Chapter 11
Control
VP152
VP2089 AND OR 789REL
VP189G 789ITL
VP289G NOT
VP7189G
152_OP
2089_OP
189G_OP
289G_OP
7189G_OP
EXDU_89G
789_EX1
VP289G
VP7189G AND
289G_CL
7189G_CL
EXDU_89G
789_EX2
VP152
VP789 AND OR
2089REL
VP189G 2089ITL
VP289G NOT
VP2189G
152_OP
789_OP
189G_OP
289G_OP
2189G_OP
EXDU_89G
2089_EX1
VP289G
VP2189G AND
289G_CL
2189G_CL
EXDU_89G
2089_EX2
en04000536_ansi.vsd
557
Interlocking Chapter 11
Control
VP189 189GREL
VP2089 AND 189GITL
VP789 NOT
289GREL
VP289
189_OP NOT
289GITL
2089_OP
789_OP
289_OP
189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
2089_OP 22089OTR
289_OP AND 22089CTR
VP2089 NOT
V22089TR
VP289 AND
789_OP 789OPTR
789_CL 789CLTR
VP789 VP789TR
189_OP 1289OPTR
289_OP OR 1289CLTR
VP189 NOT
VP1289TR
VP289 AND
152_OP BC12OPTR
189_OP OR BC12CLTR
2089_OP NOT
VP152
VPBC12TR
VP189 AND
VP2089
152_OP BC17OPTR
189_OP OR BC17CLTR
789_OP NOT
VP152
VPBC17TR
VP189 AND
VP789
152_OP BC27OPTR
289_OP OR BC27CLTR
789_OP NOT
VP152
VPBC27TR
VP289 AND
VP789
en04000537_ansi.vsd
558
Interlocking Chapter 11
Control
559
Interlocking Chapter 11
Control
Signal Description
289_EX3 External condition for apparatus 289
2089_EX1 External condition for apparatus 2089
2089_EX2 External condition for apparatus 2089
789_EX1 External condition for apparatus 789
789_EX2 External condition for apparatus 789
Table 298: Output signals for the ABC_BC (IG01-) function block
Signal Description
152OPREL Opening of 152 is allowed
152OPITL Opening of 152 is not allowed
152CLREL Closing of 152 is allowed
152CLITL Closing of 152 is not allowed
189REL Switching of 189 is allowed
189ITL Switching of 189 is not allowed
289REL Switching of 289 is allowed
289ITL Switching of 289 is not allowed
789REL Switching of 789 is allowed
789ITL Switching of 789 is not allowed
2089REL Switching of 2089 is allowed
2089ITL Switching of 2089 is not allowed
189GREL Switching of 189G is allowed
189GITL Switching of 189G is not allowed
289GREL Switching of 289G is allowed
289GITL Switching of 289G is not allowed
189OPTR 189 is in open position
189CLTR 189 is in closed position
22089OTR 289 and 2089 are in open position
22089CTR 289 or 2089 or both are not in open position
789OPTR 789 is in open position
789CLTR 789 is in closed position
1289OPTR 189 or 289 or both are in open position
1289CLTR 189 and 289 are not in open position
BC12OPTR No connection via the own bus coupler between WA1 and WA2
BC12CLTR Connection exists via the own bus coupler between WA1 and
WA2
BC17OPTR No connection via the own bus coupler between WA1 and WA7
BC17CLTR Connection exists via the own bus coupler between WA1 and
WA7
560
Interlocking Chapter 11
Control
Signal Description
BC27OPTR No connection via the own bus coupler between WA2 and WA7
BC27CLTR Connection exists via the own bus coupler between WA2 and
WA7
VP189TR Switch status of 189 is valid (open or closed)
V22089TR Switch status of 289 and 2089 are valid (open or closed)
VP789TR Switch status of 789 is valid (open or closed)
VP1289TR Switch status of 189 and 289 are valid (open or closed)
VPBC12TR Status of the bus coupler apparatuses between WA1 and WA2
are valid
VPBC17TR Status of the bus coupler app. between WA1 and WA7 are valid
VPBC27TR Status of the bus coupler app. between WA2 and WA7 are valid
561
Interlocking Chapter 11
Control
WA1 (A)
WA2 (B)
189 289
189G
152 AB_TRAFO
289G
389G
389 489
en04000515_ansi.vsd
562
Interlocking Chapter 11
Control
IE01-
AB_TRAFO
152_OP 152CLREL
152_CL 152CLITL
189_OP 189REL
189_CL 189ITL
289_OP 289REL
289_CL 289ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
389_OP 189OPTR
389_CL 189CLTR
489_OP 289OPTR
489_CL 289CLTR
389G_OP 1289OPTR
389G_CL 1289CLTR
1189G_OP VP189TR
1189G_CL VP289TR
2189G_OP VP1289TR
2189G_CL
BC_12_CL
VP_BC_12
EXDU_89G
EXDU_BC
152_EX1
152_EX2
152_EX3
189_EX1
189_EX2
189_EX3
289_EX1
289_EX2
289_EX3
en05000358_ansi.vsd
563
Interlocking Chapter 11
Control
AB_TRAFO
152_OP
152_CL XOR VP152
189_OP
189_CL XOR VP189
289_OP
289_CL XOR VP289
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
389_OP
389_CL XOR VP389
489_OP
489_CL XOR VP489
389G_OP
389G_CL XOR VP389G
1189G_OP
1189G_CL XOR VP1189G
2189G_OP
2189G_CL XOR VP2189G
VP189 152CLREL
VP289 AND 152CLITL
VP189G NOT
VP289G
VP389
VP489
VP389G
152_EX2
389G_OP
152_EX3 OR
189G_CL
289G_CL AND
389G_CL
152_EX1
en04000538_ansi.vsd
564
Interlocking Chapter 11
Control
VP152
VP289 AND OR 189REL
VP189G
NOT
189ITL
VP289G
VP389G
VP1189G
152_OP
289_OP
189G_OP
289G_OP
389G_OP
1189G_OP
EXDU_89G
189_EX1
VP289
VP389G AND
VP_BC_12
289_CL
389G_OP
BC_12_CL
EXDU_BC
189_EX2
VP189G
VP289G AND
VP389G
VP1189G
189G_CL
289G_CL
389G_CL
1189G_CL
EXDU_89G
189_EX3
en04000539_ansi.vsd
565
Interlocking Chapter 11
Control
VP152
VP189 252REL
AND OR
VP189G 252ITL
VP289G NOT
VP389G
VP2189G
152_OP
189_OP
189G_OP
289G_OP
389G_OP
2189G_OP
EXDU_89G
289_EX1
VP189
VP389G
AND
VP_BC_12
189_CL
389G_OP
BC_12_CL
EXDU_BC
289_EX2
VP189G
VP289G
AND
VP389G
VP2189G
189G_CL
289G_CL
389G_CL
2189G_CL
EXDU_89G
289_EX3
en04000540_ansi.vsd
566
Interlocking Chapter 11
Control
VP189 189GREL
VP289 AND 189GITL
NOT
VP389 289GREL
VP489
189_OP 289GITL
NOT
289_OP
389_OP
489_OP
189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
289_OP 289OPTR
289_CL 289CLTR
VP289 VP289TR
189_OP 1289OPTR
289_OP OR 1289CLTR
NOT
VP189 VP1289TR
VP289 AND
en04000541_ansi.vsd
567
Interlocking Chapter 11
Control
Signal Description
2189G_OP 2189G on busbar WA2 is in open position
2189G_CL 2189G on busbar WA2 is in closed position
BC_12_CL A bus coupler connection exists between busbar WA1 and WA2
VP_BC_12 Status of the bus coupler apparatuses between WA1 and WA2
are valid
EXDU_89G No transm error from any bay containing grounding switches
EXDU_BC No transmission error from any bus coupler bay
152_EX1 External condition for breaker 152
152_EX2 External condition for breaker 152
152_EX3 External condition for breaker 152
189_EX1 External condition for apparatus 189
189_EX2 External condition for apparatus 189
189_EX3 External condition for apparatus 189
289_EX1 External condition for apparatus 289
289_EX2 External condition for apparatus 289
289_EX3 External condition for apparatus 289
Table 300: Output signals for the AB_TRAFO (IE01-) function block
Signal Description
152CLREL Closing of 152 is allowed
152CLITL Closing of 152 is not allowed
189REL Switching of 189 is allowed
189ITL Switching of 189 is not allowed
289REL Switching of 289 is allowed
289ITL Switching of 289 is not allowed
189GREL Switching of 189G is allowed
189GITL Switching of 189G is not allowed
289GREL Switching of 289G is allowed
289GITL Switching of 289G is not allowed
189OPTR 189 is in open position
189CLTR 189 is in closed position
289OPTR 289 is in open position
289CLTR 289 is in closed position
1289OPTR 189 or 289 or both are in open position
1289CLTR 189 and 289 are not in open position
VP189TR Switch status of 189 is valid (open or closed)
VP289TR Switch status of 289 is valid (open or closed)
VP1289TR Switch status of 189 and 289 are valid (open or closed)
568
Interlocking Chapter 11
Control
152
389G 489G
A1A2_BS
en04000516_ansi.vsd
569
Interlocking Chapter 11
Control
IH01-
A1A2_BS
152_OP 152OPREL
152_CL 152OPITL
189_OP 152CLREL
189_CL 152CLITL
289_OP 189REL
289_CL 189ITL
389G_OP 289REL
389G_CL 289ITL
489G_OP 389GREL
489G_CL 389GITL
S189G_OP 489GREL
S189G_CL 489GITL
S289G_OP S1S2OPTR
S289G_CL S1S2CLTR
BBTR_OP 189OPTR
VP_BBTR 189CLTR
EXDU_12 289OPTR
EXDU_89G 289CLTR
152O_EX1 VPS1S2TR
152O_EX2 VP189TR
152O_EX3 VP289TR
189_EX1
189_EX2
289_EX1
289_EX2
en05000348_ansi.vsd
570
Interlocking Chapter 11
Control
571
Interlocking Chapter 11
Control
A1A2_BS
152_OP
152_CL XOR VP152
189_OP
189_CL XOR VP189
289_OP
289_CL XOR VP289
389G_OP
389G_CL XOR VP389G
489G_OP
489G_CL XOR VP489G
S1189G_OP
S1189G_CL XOR VPS1189G
S2289G_OP
S2289G_CL XOR VPS2289G
VP189
189_OP AND OR 152OPREL
152O_EX1 152OPITL
NOT
VP289
289_OP AND
152O_EX2
VP_BBTR
BBTR_OP AND
EXDU_12
152O_EX3
VP189 152CLREL
VP289 AND 152CLITL
NOT
VP152
VP389G AND OR 189REL
VP489G 189ITL
NOT
VPS1189G
152_OP
389G_OP
489G_OP
S1189G_OP
EXDU_89G
189_EX1
VP389G
VPS1189G AND
389G_CL
S1189G_CL
EXDU_89G
189_EX2
en04000542_ansi.vsd
572
Interlocking Chapter 11
Control
VP152
VP389G AND OR 289REL
VP489G 289ITL
NOT
VPS2289G
152_OP
389G_OP
489G_OP
S2289G_OP
EXDU_89G
289_EX1
VP489G
VPS2289G AND
489G_CL
S2289G_CL
EXDU_89G
289_EX2
VP189 389GREL
VP289 AND 389GITL
189_OP NOT
489GREL
289_OP
489GITL
NOT
189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
289_OP 289OPTR
289_CL 289CLTR
VP289 VP289TR
189_OP S1S2OPTR
289_OP OR S1S2CLTR
152_OP NOT
VP189 VPS1S2TR
VP289 AND
VP152
en04000543_ansi.vsd
573
Interlocking Chapter 11
Control
Table 302: Output signals for the A1A2_BS (IH01-) function block
Signal Description
152OPREL Opening of 152 is allowed
152OPITL Opening of 152 is not allowed
152CLREL Closing of 152 is allowed
152CLITL Closing of 152 is not allowed
189REL Switching of 189 is allowed
189ITL Switching of 189 is not allowed
289REL Switching of 289 is allowed
574
Interlocking Chapter 11
Control
Signal Description
289ITL Switching of 289 is not allowed
389GREL Switching of 389G is allowed
389GITL Switching of 389G is not allowed
489GREL Switching of 489G is allowed
489GITL Switching of 489G is not allowed
S1S2OPTR No bus section connection between bus section 1 and 2
S1S2CLTR Bus coupler connection between bus section 1 and 2 exists
189OPTR 189 is in open position
189CLTR 189 is in closed position
289OPTR 289 is in open position
289CLTR 289 is in closed position
VPS1S2TR Status of the apparatuses between bus section 1 and 2 are valid
VP189TR Switch status of 189 is valid (open or closed)
VP289TR Switch status of 289 is valid (open or closed)
52
189G 289G
A1A2_DC en04000492_ansi.vsd
575
Interlocking Chapter 11
Control
II01-
A1A2_DC
089_OP 089OPREL
089_CL 089OPITL
S189G_OP 089CLREL
S189G_CL 089CLITL
S289G_OP DCOPTR
S289G_CL DCCLTR
S1DC_OP VPDCTR
S2DC_OP
VPS1_DC
VPS2_DC
EXDU_89G
EXDU_BB
089C_EX1
089C_EX2
089O_EX1
089O_EX2
089O_EX3
en05000349_ansi.vsd
576
Interlocking Chapter 11
Control
A1A2_DC
89_OP
VPQB VPDCTR
89_CL XOR
DCOPTR
DCCLTR
S1189G_OP
VPS1189G
S1189G_CL XOR
S2289G_OP
VPS2289G
S2289G_CL XOR
VPS1189G
VPS2289G AND OR
VPS1_DC 89OPREL
S1189G_OP NOT
89OPITL
S2289G_OP
S1DC_OP
EXDU_89G
EXDU_BB
QBOP_EX1
VPS1189
VPS2289G AND
VPS2_DC
S1189G_OP
S2289G_OP
S2DC_OP
EXDU_89G
EXDU_BB
QBOP_EX2
VPS1189G
VPS2289G AND
S1189G_CL
S2289G_CL
EXDU_89G
QBOP_EX3
en04000544_ansi.vsd
577
Interlocking Chapter 11
Control
578
Interlocking Chapter 11
Control
Table 304: Output signals for the A1A2_DC (II01-) function block
Signal Description
089OPREL Opening of 089 is allowed
089OPITL Opening of 089 is not allowed
089CLREL Closing of 089 is allowed
089CLITL Closing of 089 is not allowed
DCOPTR The bus section disconnector is in open position
DCCLTR The bus section disconnector is in closed position
VPDCTR Switch status of 089 is valid (open or closed)
89G
en04000504.vsd
IJ01-
BB_ES
89G_OP 89GREL
89G_CL 89GITL
BB_DC_OP BBGSOPTR
VP_BB_DC BBGSCLTR
EXDU_BB
en05000347_ansi.vsd
579
Interlocking Chapter 11
Control
BB_ES
VP_BB_DC 89GREL
BB_DC_OP AND 89GITL
EXDU_BB NOT
89G_OP BBGSOPTR
89G_CL BBGSCLTR
en04000546_ansi.vsd
Table 306: Output signals for the BB_ES (IJ01-) function block
Signal Description
89GREL Switching of 89G is allowed
89GITL Switching of 89G is not allowed
BBGSOPTR 89G on this busbar part is in open position
BBGSCLTR 89G on this busbar part is in closed position
580
Interlocking Chapter 11
Control
WA1 (A)
WA2 (B)
189 289
189G 489G
289G 589G
6189 6289
389G
DB_LINE
989
989G
en04000518_ansi.vsd
Three types of interlocking modules per double circuit breaker bay are defined. DB_LINE is the
connection from the line to the circuit breaker parts that are connected to the busbars.
DB_BUS_A and DB_BUS_B are the connections from the line to the busbars.
IB01-
DB_BUS_A
152_OP 152CLREL
152_CL 152CLITL
189_OP 6189REL
189_CL 6189ITL
6189_OP 189REL
6189_CL 189ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
389G_OP 189OPTR
389G_CL 189CLTR
1189G_OP VP189TR
1189G_CL
EXDU_89G
6189_EX1
6189_EX2
189_EX1
189_EX2
en05000354_ansi.vsd
581
Interlocking Chapter 11
Control
IA01-
DB_LINE
152_OP 989REL
152_CL 989ITL
252_OP 389GREL
252_CL 389GITL
6189_OP 989GREL
6189_CL 989GITL
189G_OP
189G_CL
289G_OP
289G_CL
6289_OP
6289_CL
489G_OP
489G_CL
589G_OP
589G_CL
989_OP
989_CL
389G_OP
389G_CL
989G_OP
989G_CL
VOLT_OFF
VOLT_ON
989_EX1
989_EX2
989_EX3
989_EX4
989_EX5
en05000356_ansi.vsd
IC01-
DB_BUS_B
252_OP 252CLREL
252_CL 252CLITL
289_OP 6289REL
289_CL 6289ITL
6289_OP 289REL
6289_CL 289ITL
489G_OP 489GREL
489G_CL 489GITL
589G_OP 589GREL
589G_CL 589GITL
389G_OP 289OPTR
389G_CL 289CLTR
2189G_OP VP289TR
2189G_CL
EXDU_89G
6289_EX1
6289_EX2
289_EX1
289_EX2
en05000355_ansi.vsd
582
Interlocking Chapter 11
Control
583
Interlocking Chapter 11
Control
584
Interlocking Chapter 11
Control
DB_BUS_A
152_OP
152_CL XOR VP152
6189_OP
6189_CL XOR VP6189
189_OP
189_CL XOR VP189
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
389G_OP
389G_CL XOR VP389G
1189G_OP
1189G_CL XOR VP1189G
VP6189 152CLREL
VP189 AND 152CLITL
NOT
VP152
VP189G AND OR 6189REL
VP289G 6189ITL
NOT
VP389G
152_OP
189G_OP
289G_OP
389G_OP
6189_EX1
VP289G
VP389G AND
289G_CL
389G_CL
6189_EX2
VP152
VP189G AND OR 189REL
VP289G 189ITL
NOT
VP1189G
152_OP
189G_OP
289G_OP
1189G_OP
EXDU_89G
189_EX1
VP189G
VP1189G AND
189G_CL
1189G_CL
EXDU_89G
189_EX2
en04000547_ansi.vsd
585
Interlocking Chapter 11
Control
VP6189 189GREL
VP189 AND NOT 189GITL
6189_OP 289GREL
189_OP NOT
289GITL
189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
en04000548_ansi.vsd
586
Interlocking Chapter 11
Control
DB_LINE
152_OP
152_CL XOR VP152
252_OP
252_CL XOR VP252
6189_OP
6189_CL XOR VP6189
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
6289_OP
6289_CL XOR VP6289
489G_OP
489G_CL XOR VP489G
589G_OP
589G_CL XOR VP589G
989_OP
989_CL XOR VP989
389G_OP
389G_CL XOR VP389G
989G_OP
989G_CL XOR VP989G
VOLT_OFF
VOLT_ON XOR VPVOLT
VP152
VP252 AND OR 989REL
VP189G 989ITL
NOT
VP289G
VP389G
VP489G
VP589G
VP989G
152_OP
252_OP
189G_OP
289G_OP
389G_OP
489G_OP
589G_OP
989G_OP
989_EX1
AND
en04000549_ansi.vsd
587
Interlocking Chapter 11
Control
VP152
VP189G AND OR
VP289G
VP389G
VP989G
VP6289
152_OP
189G_OP
289G_OP
389G_OP
989G_OP
6289_OP
989_EX2
VP252
VP6189 AND
VP389G
VP489G
VP589G
VP989G
252_OP
6189_OP
389G_OP
489G_OP
589G_OP
989G_OP
989_EX3
VP389G
VP989G AND
VP6189
VP6289
389G_OP
989G_OP
6189_OP
6289_OP
989_EX4
VP389G
VP989G AND
389G_CL
989G_CL
989_EX5
en04000550_ansi.vsd
588
Interlocking Chapter 11
Control
VP6189
VP6289 AND 389GREL
VP989 389GITL
NOT
6189_OP
6289_OP
989_OP
VP989
VPVOLT AND 989GREL
989_OP 989GITL
NOT
VOLT_OFF
en04000551_ansi.vsd
589
Interlocking Chapter 11
Control
590
Interlocking Chapter 11
Control
DB_BUS_B
252_OP
252_CL XOR VP252
6289_OP
6289_CL XOR VP6289
289_OP
289_CL XOR VP289
489G_OP
489G_CL XOR VP489G
589G_OP
589G_CL XOR VP589G
389G_OP
389G_CL XOR VP389G
2189G_OP
2189G_CL XOR VP2189G
VP6289 252CLREL
VP289 AND 252CLITL
NOT
VP252
VP489G AND OR 6289REL
VP589G 6289ITL
NOT
VP389G
252_OP
489G_OP
589G_OP
389G_OP
6289_EX1
VP589G
VP389G AND
589G_CL
389G_CL
6289_EX2
VP252
VP489G AND OR 289REL
VP589G 289ITL
NOT
VP2189G
252_OP
489G_OP
589G_OP
2189G_OP
EXDU_89G
289_EX1
VP489G
VP2189G AND
489G_CL
2189G_CL
EXDU_89G
289_EX2
en04000552_ansi.vsd
591
Interlocking Chapter 11
Control
VP6289 489GREL
VP289 AND NOT 489GITL
6289_OP 589GREL
289_OP 589GITL
NOT
289_OP 289OPTR
289_CL 289CLTR
VP289 VP289TR
en04000553_ansi.vsd
592
Interlocking Chapter 11
Control
Table 308: Output signals for the DB_BUS_A (IB01-) function block
Signal Description
152CLREL Closing of 152 is allowed
152CLITL Closing of 152 is not allowed
6189REL Switching of 6189 is allowed
6189ITL Switching of 6189 is not allowed
189REL Switching of 189 is allowed
189ITL Switching of 189 is not allowed
189GREL Switching of 189G is allowed
189GITL Switching of 189G is not allowed
289GREL Switching of 289G is allowed
289GITL Switching of 289G is not allowed
189OPTR 189 is in open position
189CLTR 189 is in closed position
VP189TR Switch status of 189 is valid (open or closed)
Table 309: Input signals for the DB_LINE (IA01-) function block
Signal Description
152_OP 152 is in open position
152_CL 152 is in closed position
252_OP 252 is in open position
252_CL 252 is in closed position
6189_OP 6189 is in open position
6189_CL 6189 is in closed position
189G_OP 189G is in open position
189G_CL 189G is in closed position
289G_OP 289G is in open position
289G_CL 289G is in closed position
6289_OP 6289 is in open position
6289_CL 6289 is in closed position
489G_OP 489G is in open position
489G_CL 489G is in closed position
589G_OP 589G is in open position
589G_CL 589G is in closed position
989_OP 989 is in open position
989_CL 989 is in closed position
389G_OP 389G is in open position
389G_CL 389G is in closed position
989G_OP 989G is in open position
593
Interlocking Chapter 11
Control
Signal Description
989G_CL 989G is in closed position
VOLT_OFF There is no voltage on the line and not VT (fuse) failure
VOLT_ON There is voltage on the line or there is a VT (fuse) failure
989_EX1 External condition for apparatus 989
989_EX2 External condition for apparatus 989
989_EX3 External condition for apparatus 989
989_EX4 External condition for apparatus 989
989_EX5 External condition for apparatus 989
Table 310: Output signals for the DB_LINE (IA01-) function block
Signal Description
989REL Switching of 989 is allowed
989ITL Switching of 989 is not allowed
389GREL Switching of 389G is allowed
389GITL Switching of 389G is not allowed
989GREL Switching of 989G is allowed
989GITL Switching of 989G is not allowed
Table 311: Input signals for the DB_BUS_B (IC01-) function block
Signal Description
252_OP 252 is in open position
252_CL 252 is in closed position
289_OP 289 is in open position
289_CL 289 is in closed position
6289_OP 6289 is in open position
6289_CL 6289 is in closed position
489G_OP 489G is in open position
489G_CL 489G is in closed position
589G_OP 589G is in open position
589G_CL 589G is in closed position
389G_OP 389G is in open position
389G_CL 389G is in closed position
2189G_OP Grounding switch 2189G on busbar WA2 is in open position
2189G_CL Grounding switch 2189G on busbar WA2 is in closed position
594
Interlocking Chapter 11
Control
Signal Description
EXDU_89G No transm error from bay containing grounding switch 2189G
6289_EX1 External condition for apparatus 6289
6289_EX2 External condition for apparatus 6289
289_EX1 External condition for apparatus 289
289_EX2 External condition for apparatus 289
Table 312: Output signals for the DB_BUS_B (IC01-) function block
Signal Description
252CLREL Closing of 252 is allowed
252CLITL Closing of 252 is not allowed
6289REL Switching of 6289 is allowed
6289ITL Switching of 6289 is not allowed
289REL Switching of 289 is allowed
289ITL Switching of 289 is not allowed
489GREL Switching of 489G is allowed
489GITL Switching of 489G is not allowed
589GREL Switching of 589G is allowed
589GITL Switching of 589G is not allowed
289OPTR 289 is in open position
289CLTR 289 is in closed position
VP289TR Switch status of 289 is valid (open or closed)
595
Interlocking Chapter 11
Control
WA1 (A)
WA2 (B)
189 289
189G 189G
152 152
289G 289G
689 689
389G 389G
BH_LINE_A BH_LINE_B
6189 6289
152
989 989
189G 289G
989G 989G
BH_CONN
en04000513_ansi.vsd
Three types of interlocking modules per diameter are defined. BH_LINE_A and BH_LINE_B
are the connections from a line to a busbar. BH_CONN is the connection between the two lines
of the diameter in the breaker and a half switchyard layout.
596
Interlocking Chapter 11
Control
IL01-
BH_LINE_A
152_OP 152CLREL
152_CL 152CLITL
689_OP 689REL
689_CL 689ITL
189_OP 189REL
189_CL 189ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
389G_OP 389GREL
389G_CL 389GITL
989_OP 989REL
989_CL 989ITL
989G_OP 989GREL
989G_CL 989GITL
C152_OP 189OPTR
C152_CL 189CLTR
C6189_OP VP189TR
C6189_CL
C189G_OP
C189G_CL
C289G_OP
C289G_CL
1189G_OP
1189G_CL
VOLT_OFF
VOLT_ON
EXDU_89G
689_EX1
689_EX2
189_EX1
189_EX2
989_EX1
989_EX2
989_EX3
989_EX4
989_EX5
989_EX6
989_EX7
en05000352_ansi.vsd
597
Interlocking Chapter 11
Control
IM01-
BH_LINE_B
152_OP 152CLREL
152_CL 152CLITL
689_OP 689REL
689_CL 689ITL
289_OP 289REL
289_CL 289ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
389G_OP 389GREL
389G_CL 389GITL
989_OP 989REL
989_CL 989ITL
989G_OP 989GREL
989G_CL 989GITL
C152_OP 289OPTR
C152_CL 289CLTR
C6289_OP VP289TR
C6289_CL
C189G_OP
C189G_CL
C289G_OP
C289G_CL
2189G_OP
2189G_CL
VOLT_OFF
VOLT_ON
EXDU_89G
689_EX1
689_EX2
289_EX1
289_EX2
989_EX1
989_EX2
989_EX3
989_EX4
989_EX5
989_EX6
989_EX7
en05000353_ansi.vsd
598
Interlocking Chapter 11
Control
IK01-
BH_CONN
152_OP 152CLREL
152_CL 152CLITL
6189_OP 6189REL
6189_CL 6189ITL
6289_OP 6289REL
6289_CL 6289ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
1389G_OP
1389G_CL
2389G_OP
2389G_CL
6189_EX1
6189_EX2
6289_EX1
6289_EX2
en05000351_ansi.vsd
599
Interlocking Chapter 11
Control
BH_LINE_A
152_OP
152_CL XOR VP152
189_OP
189_CL XOR VP189
689_OP
689_CL XOR VP689
989G_OP
989G_CL XOR VP989G
989_OP
989_CL XOR VP989
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
389G_OP
389G_CL XOR VP389G
C152_OP
C152_CL XOR VPC152
C189G_OP
C189G_CL XOR VPC189G
C289G_OP
C289G_CL XOR VPC289G
C6189_OP
C6189_CL XOR VPC6189
1189G_OP
1189G_CL XOR VP1189G
VOLT_OFF
VOLT_ON XOR VPVOLT
VP189 152CLREL
VP689 152CLITL
AND NOT
VP989
VP152
VP189G 689REL
AND OR
VP289G 689ITL
NOT
VP389G
152_OP
189G_OP
289G_OP
389G_OP
689_EX1
VP289G
VP389G
AND
289G_CL
389G_CL
689_EX2
en04000554_ansi.vsd
600
Interlocking Chapter 11
Control
601
Interlocking Chapter 11
Control
VP152
VP189G AND OR 189REL
VP289G 189ITL
NOT
VP1189G
152_OP
189G_OP
289G_OP
1189G_OP
EXDU_89G
189_EX1
VP189G
VP1189G AND
189G_CL
1189G_CL
EXDU_89G
189_EX2
VP189 189GREL
VP689 AND 189GITL
NOT
189_OP 289GREL
689_OP 289GITL
VP689 NOT
VP989 AND 389GREL
VPC6189 389GITL
NOT
689_OP
989_OP
C6189_OP
VP152 989REL
VP689 AND OR 989ITL
NOT
VP989G
VP189G
VP289G
VP389G
VPC152
VPC6189
VPC189G
VPC289G
989_EX1
689_OP
989_EX2 OR
152_OP
189G_OP AND
289G_OP
989_EX3
en04000555_ansi.vsd
602
Interlocking Chapter 11
Control
C6189_OP
989_EX4
OR AND OR
C152_OP
C189G_OP AND
C289G_OP
989_EX5
989G_OP
389G_OP
989_EX6
VP989G
VP389G AND
989G_CL
389G_CL
989_EX7
VP989 989GREL
VPVOLT AND 989GITL
NOT
989_OP
VOLT_OFF
189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
en04000556_ansi.vsd
603
Interlocking Chapter 11
Control
BH_LINE_B
152_OP
152_CL XOR VP152
289_OP
289_CL XOR VP289
689_OP
689_CL XOR VP689
989G_OP
989G_CL XOR VP989G
989_OP
989_CL XOR VP989
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
389G_OP
389G_CL XOR VP389G
C152_OP
C152_CL XOR VPC152
C189G_OP
C189G_CL XOR VPC189G
C289G_OP
C289G_CL XOR VPC289G
C6289_OP
C6289_CL XOR VPC6289
2189G_OP
2189G_CL XOR VP2189G
VOLT_OFF
VOLT_ON XOR VPVOLT
VP289 152CLREL
VP689 AND 152CLITL
NOT
VP989
VP152
VP189G AND OR 689REL
VP289G 689ITL
VP389G NOT
152_OP
189G_OP
289G_OP
389G_OP
689_EX1
VP289G
VP389G AND
289G_CL
389G_CL
689_EX2
en04000557_ansi.vsd
604
Interlocking Chapter 11
Control
605
Interlocking Chapter 11
Control
VP152
VP189G 289REL
VP289G AND OR
NOT 289ITL
VP2189G
152_OP
189G_OP
289G_OP
2189G_OP
EXDU_89G
289_EX1
VP189G
VP2189G AND
189G_CL
2189G_CL
EXDU_89G
289_EX2
VP289 189GREL
VP689 189GITL
AND NOT
289_OP 289GREL
689_OP 289GITL
VP689 NOT
VP989 389GREL
VPC6289 AND
NOT 389GITL
689_OP
989_OP
C6289_OP
VP152 989REL
VP689
AND OR 989ITL
VP989G NOT
VP189G
VP289G
VP389G
VPC152
VPC6289
VPC189G
VPC289G
989_EX1
689_OP
989_EX2
OR
152_OP
189G_OP
AND
289G_OP
989_EX3
en04000558_ansi.vsd
606
Interlocking Chapter 11
Control
C6289_OP
989_EX4
OR AND OR
C152_OP
C189G_OP
AND
C289G_OP
989_EX5
989G_OP
389G_OP
989_EX6
VP989G
VP389G AND
989G_CL
389G_CL
989_EX7
VP989 989GREL
VPVOLT AND NOT 989GITL
989_OP
VOLT_OFF
289_OP 289OPTR
289_CL 289CLTR
VP289 VP289TR
en04000559_ansi.vsd
607
Interlocking Chapter 11
Control
608
Interlocking Chapter 11
Control
BH_CONN
152_OP
152_CL XOR VP152
6189_OP
6189_CL XOR VP6189
6289_OP
6289_CL XOR VP6289
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
1389G_OP
1389G_CL XOR VP1389G
2389G_OP
2389G_CL XOR VP2389G
VP6189 152CLREL
VP6289 AND 152CLITL
NOT
VP152
VP189G AND OR 6189REL
VP289G 61891ITL
NOT
VP1389G
152_OP
189G_OP
289G_OP
1389G_OP
6189_EX1
VP189G
VP1389G AND
189G_CL
1389G_CL
6189_EX2
VP152
VP189G AND OR 6289REL
VP289G 6289ITL
NOT
VP2389G
152_OP
189G_OP
289G_OP
2389G_OP
6289_EX1
VP289G
VP2389G AND
289G_CL
2389G_CL
6289_EX2
VP6189 189GREL
VP6289 AND NOT 189GITL
6189_OP 289GREL
6289_OP NOT
289GITL
en04000560_ansi.vsd
609
Interlocking Chapter 11
Control
610
Interlocking Chapter 11
Control
Signal Description
989_EX3 External condition for apparatus 989
989_EX4 External condition for apparatus 989
989_EX5 External condition for apparatus 989
989_EX6 External condition for apparatus 989
989_EX7 External condition for apparatus 989
Table 314: Output signals for the BH_LINE_A (IL01-) function block
Signal Description
152CLREL Closing of 152 is allowed
152CLITL Closing of 152 is not allowed
689REL Switching of 689 is allowed
689ITL Switching of 689 is not allowed
189REL Switching of 189 is allowed
189ITL Switching of 189 is not allowed
189GREL Switching of 189G is allowed
189GITL Switching of 189G is not allowed
289GREL Switching of 289G is allowed
289GITL Switching of 289G is not allowed
389GREL Switching of 389G is allowed
389GITL Switching of 389G is not allowed
989REL Switching of 989 is allowed
989ITL Switching of 989 is not allowed
989GREL Switching of 989G is allowed
989GITL Switching of 989G is not allowed
189OPTR 189 is in open position
189CLTR 189 is in closed position
VP189TR Switch status of 189 is valid (open or closed)
Table 315: Input signals for the BH_LINE_B (IM01-) function block
Signal Description
152_OP 152 is in open position
152_CL 152 is in closed position
689_OP 689 is in open position
689_CL 689 is in closed position
289_OP 289 is in open position
289_CL 289 is in closed position
189G_OP 189G is in open position
611
Interlocking Chapter 11
Control
Signal Description
189G_CL 189G is in closed position
289G_OP 289G is in open position
289G_CL 289G is in closed position
389G_OP 389G is in open position
389G_CL 389G is in closed position
989_OP 989 is in open position
989_CL 989 is in closed position
989G_OP 989G is in open position
989G_CL 989G is in closed position
C152_OP 152 in module BH_CONN is in open position
C152_CL 152 in module BH_CONN is in closed position
C6289_OP 6289 in module BH_CONN is in open position
C6289_CL 6289 in module BH_CONN is in closed position
C189G_OP 189G in module BH_CONN is in open position
C189G_CL 189G in module BH_CONN is in closed position
C289G_OP 289G in module BH_CONN is in open position
C289G_CL 289G in module BH_CONN is in closed position
2189G_OP Grounding switch 2189G on busbar WA2 is in open position
2189G_CL Grounding switch 2189G on busbar WA2 is in closed position
VOLT_OFF There is no voltage on line and not VT (fuse) failure
VOLT_ON There is voltage on the line or there is a VT (fuse) failure
EXDU_89G No transm error from bay containing grounding switch 2189G
689_EX1 External condition for disconnector 689
689_EX2 External condition for disconnector 689
289_EX1 External condition for apparatus 289
289_EX2 External condition for apparatus 289
989_EX1 External condition for apparatus 989
989_EX2 External condition for apparatus 989
989_EX3 External condition for apparatus 989
989_EX4 External condition for apparatus 989
989_EX5 External condition for apparatus 989
989_EX6 External condition for apparatus 989
989_EX7 External condition for apparatus 989
612
Interlocking Chapter 11
Control
Table 316: Output signals for the BH_LINE_B (IM01-) function block
Signal Description
152CLREL Closing of 152 is allowed
152CLITL Closing of 152 is not allowed
689REL Switching of 689 is allowed
689ITL Switching of 689 is not allowed
289REL Switching of 289 is allowed
289ITL Switching of 289 is not allowed
189GREL Switching of 189G is allowed
189GITL Switching of 189G is not allowed
289GREL Switching of 289G is allowed
289GITL Switching of 289G is not allowed
389GREL Switching of 389G is allowed
389GITL Switching of 389G is not allowed
989REL Switching of 989 is allowed
989ITL Switching of 989 is not allowed
989GREL Switching of 989G is allowed
989GITL Switching of 989G is not allowed
289OPTR 289 is in open position
289CLTR 289 is in closed position
VP289TR Switch status of 289 is valid (open or closed)
Table 317: Input signals for the BH_CONN (IK01-) function block
Signal Description
152_OP 152 is in open position
152_CL 152 is in closed position
6189_OP 6189 is in open position
6189_CL 6189 is in closed position
6289_OP 6289 is in open position
6289_CL 6289 is in closed position
189G_OP 189G is in open position
189G_CL 189G is in closed position
289G_OP 289G is in open position
289G_CL 289G is in closed position
1389G_OP 1389G on line 1 is in open position
1389G_CL 1389G on line 1 is in closed position
2389G_OP 2389G on line 2 is in open position
613
Interlocking Chapter 11
Control
Signal Description
2389G_CL 2389G on line 2 is in closed position
6189_EX1 External condition for apparatus 6189
6189_EX2 External condition for apparatus 6189
6289_EX1 External condition for apparatus 6289
6289_EX2 External condition for apparatus 6289
Table 318: Output signals for the BH_CONN (IK01-) function block
Signal Description
152CLREL Closing of 152 is allowed
152CLITL Closing of 152 is not allowed
6189REL Switching of 6189 is allowed
6189ITL Switching of 6189 is not allowed
6289REL Switching of 6289 is allowed
6289ITL Switching of 6289 is not allowed
189GREL Switching of 189G is allowed
189GITL Switching of 189G is not allowed
289GREL Switching of 289G is allowed
289GITL Switching of 289G is not allowed
614
Interlocking Chapter 11
Control
GR01-
IntlReceive
BLOCK RESREQ
INSTNAME RESGRANT
RESRENAM APP1_OP
RESGRNAM APP1_CL
APP1NAME APP1VAL
APP2NAME APP2_OP
APP3NAME APP2_CL
APP4NAME APP2VAL
APP5NAME APP3_OP
APP6NAME APP3_CL
APP7NAME APP3VAL
APP8NAME APP4_OP
APP9NAME APP4_CL
APP10NAM APP4VAL
APP11NAM APP5_OP
APP12NAM APP5_CL
APP13NAM APP5VAL
APP14NAM APP6_OP
APP15NAM APP6_CL
APP6VAL
APP7_OP
APP7_CL
APP7VAL
APP8_OP
APP8_CL
APP8VAL
APP9_OP
APP9_CL
APP9VAL
APP10_OP
APP10_CL
APP10VAL
APP11_OP
APP11_CL
APP11VAL
APP12_OP
APP12_CL
APP12VAL
APP13_OP
APP13_CL
APP13VAL
APP14_OP
APP14_CL
APP14VAL
APP15_OP
APP15_CL
APP15VAL
COM_VAL
en07000048.vsd
615
Interlocking Chapter 11
Control
Table 320: Output signals for the IntlReceive (GR01-) function block
Signal Description
RESREQ Reservation request
RESGRANT Reservation granted
APP1_OP Apparatus 1 position is open
APP1_CL Apparatus 1 position is closed
APP1VAL Apparatus 1 position is valid
APP2_OP Apparatus 2 position is open
APP2_CL Apparatus 2 position is closed
APP2VAL Apparatus 2 position is valid
APP3_OP Apparatus 3 position is open
APP3_CL Apparatus 3 position is closed
APP3VAL Apparatus 3 position is valid
APP4_OP Apparatus 4 position is open
APP4_CL Apparatus 4 position is closed
APP4VAL Apparatus 4 position is valid
APP5_OP Apparatus 5 position is open
APP5_CL Apparatus 5 position is closed
APP5VAL Apparatus 5 position is valid
APP6_OP Apparatus 6 position is open
APP6_CL Apparatus 6 position is closed
APP6VAL Apparatus 6 position is valid
APP7_OP Apparatus 7 position is open
APP7_CL Apparatus 7 position is closed
APP7VAL Apparatus 7 position is valid
APP8_OP Apparatus 8 position is open
APP8_CL Apparatus 8 position is closed
APP8VAL Apparatus 8 position is valid
APP9_OP Apparatus 9 position is open
APP9_CL Apparatus 9 position is closed
APP9VAL Apparatus 9 position is valid
APP10_OP Apparatus 10 position is open
APP10_CL Apparatus 10 position is closed
APP10VAL Apparatus 10 position is valid
616
Interlocking Chapter 11
Control
Signal Description
APP11_OP Apparatus 11 position is open
APP11_CL Apparatus 11 position is closed
APP11VAL Apparatus 11 position is valid
APP12_OP Apparatus 12 position is open
APP12_CL Apparatus 12 position is closed
APP12VAL Apparatus 12 position is valid
APP13_OP Apparatus 13 position is open
APP13_CL Apparatus 13 position is closed
APP13VAL Apparatus 13 position is valid
APP14_OP Apparatus 14 position is open
APP14_CL Apparatus 14 position is closed
APP14VAL Apparatus 14 position is valid
APP15_OP Apparatus 15 position is open
APP15_CL Apparatus 15 position is closed
APP15VAL Apparatus 15 position is valid
COM_VAL Receive communication status is valid
617
Logic rotating switch for function selection Chapter 11
and LHMI presentation (SLGGIO) Control
5.1 Introduction
The SLGGIO function block (or the selector switch function block) is used within the CAP tool
in order to get a selector switch functionality similar with the one provided by a hardware selec-
tor switch. Hardware selector switches are used extensively by utilities, in order to have different
functions operating on pre-set values. Hardware switches are however sources for maintenance
issues, lower system reliability and extended purchase portfolio. The virtual selector switches
eliminate all these problems.
Besides the inputs visible in “CAP configuration tool”, there are other executable inputs that
will allow an user to set the desired position directly (without activating the intermediate posi-
tions), either locally or remotely, using a “select before execute” dialog. One can block the func-
tion operation, by activating the BLOCK input. In this case, the present position will be kept and
further operation will be blocked. The operator place (local or remote) is specified through the
PSTO input. If any operation is allowed the signal INTONE from the Fixed signal function block
can be connected. The SLGGIO function block has also an integer value output, that generates
the actual position number. The positions and the block names are fully settable by the user.
These names will appear in the menu, so the user can see the position names instead of a number.
618
Logic rotating switch for function selection Chapter 11
and LHMI presentation (SLGGIO) Control
1 2 3
../Ctrl/Com/Sel Sw ../Com/Sel Sw/SL03 ../Com/Sel Sw/SL03
SL01 Damage ctrl Damage ctrl
4 4
SL02
..
..
SL15
OK Cancel
4
5
The dialog window that appears
../Com/Sel Sw/ shows the present position (P:)
DmgCtrl 7
and the new position (N:), both
Damage ctrl: in clear names, given by the
user (max. 13 characters).
E
Modify the position with arrows.
The pos will not be modified (outputs
will not be activated) until you press
the E-button for O.K. en06000420.vsd
Figure 293: Example 1 on handling the switch from the local HMI.
619
Logic rotating switch for function selection Chapter 11
and LHMI presentation (SLGGIO) Control
• if it is used just for the monitoring, the switches will be listed with their actual
position names, as defined by the user (max. 13 characters);
• if it is used for control, the switches will be listed with their actual positions, but
only the first three letters of the name will be used;
In both cases, the switch full name will be shown, but the user has to redefine it when building
the Graphical Display Editor, under the "Caption". If used for the control, the following se-
quence of commands will ensue:
620
Logic rotating switch for function selection Chapter 11
and LHMI presentation (SLGGIO) Control
../Control/SLD/Switch
AR control
WFM
Pilot setup
OFF
Damage control
DFW
en06000421_ansi.vsd
Figure 294: Example 2 on handling the switch from the local HMI.
621
Logic rotating switch for function selection Chapter 11
and LHMI presentation (SLGGIO) Control
622
Logic rotating switch for function selection Chapter 11
and LHMI presentation (SLGGIO) Control
SL01-
SLGGIO
BLOCK SWPOS01
PSTO SWPOS02
UP SWPOS03
DOWN SWPOS04
SWPOS05
SWPOS06
SWPOS07
SWPOS08
SWPOS09
SWPOS10
SWPOS11
SWPOS12
SWPOS13
SWPOS14
SWPOS15
SWPOS16
SWPOS17
SWPOS18
SWPOS19
SWPOS20
SWPOS21
SWPOS22
SWPOS23
SWPOS24
SWPOS25
SWPOS26
SWPOS27
SWPOS28
SWPOS29
SWPOS30
SWPOS31
SWPOS32
SWPOSN
INSTNAME
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
NAME17
NAME18
NAME19
NAME20
NAME21
NAME22
NAME23
NAME24
NAME25
NAME26
NAME27
NAME28
NAME29
NAME30
NAME31
NAME32
en05000658_ansi.vsd
623
Logic rotating switch for function selection Chapter 11
and LHMI presentation (SLGGIO) Control
Table 323: Output signals for the SLGGIO (SL01-) function block
Signal Description
SWPOS01 Selector switch position 1
SWPOS02 Selector switch position 2
SWPOS03 Selector switch position 3
SWPOS04 Selector switch position 4
SWPOS05 Selector switch position 5
SWPOS06 Selector switch position 6
SWPOS07 Selector switch position 7
SWPOS08 Selector switch position 8
SWPOS09 Selector switch position 9
SWPOS10 Selector switch position 10
SWPOS11 Selector switch position 11
SWPOS12 Selector switch position 12
SWPOS13 Selector switch position 13
SWPOS14 Selector switch position 14
SWPOS15 Selector switch position 15
SWPOS16 Selector switch position 16
SWPOS17 Selector switch position 17
SWPOS18 Selector switch position 18
SWPOS19 Selector switch position 19
SWPOS20 Selector switch position 20
SWPOS21 Selector switch position 21
SWPOS22 Selector switch position 22
SWPOS23 Selector switch position 23
SWPOS24 Selector switch position 24
SWPOS25 Selector switch position 25
SWPOS26 Selector switch position 26
624
Logic rotating switch for function selection Chapter 11
and LHMI presentation (SLGGIO) Control
Signal Description
SWPOS27 Selector switch position 27
SWPOS28 Selector switch position 28
SWPOS29 Selector switch position 29
SWPOS30 Selector switch position 30
SWPOS31 Selector switch position 31
SWPOS32 Selector switch position 32
SWPOSN Switch position (integer)
625
Selector mini switch (VSGGIO) Chapter 11
Control
6.1 Introduction
The VSGGIO function block (or the versatile switch function block) is a multipurpose function
used within the CAP tool for a variety of applications, as a general – purpose switch.
The switch can be controlled from the menu or from a symbol on the SLD of the LHMI.
• for indication, receiving position through the IPOS1 and IPOS2 inputs and dis-
tributing it in the configuration through the POS1 and POS2 outputs or to
IEC61850 through reporting or GOOSE
• for command, receiving commands via the HMI. HMI symbols Select button or
Indication button from menu (Control / Commands / Versatile Switch) or
IEC61850 and sending them in the configuration and especially to the outputs
(through a SMBO function block)
The PSTO input is connected to the Local remote switch to have a selection of operators place
, operation from local HMI (Local pos) or through IEC 61850 (Remote pos). An INTONE con-
nection from Fixed signal function block will allow operation from any operators place.
As it can be seen, both indications and commands are done in double-bit representation, where
a combination of signals on both inputs/outputs generate the desired result:
626
Selector mini switch (VSGGIO) Chapter 11
Control
VS01-
VSGGIO
BLOCK BLOCKED
PSTO POSITION
IPOS1 POS1
IPOS2 POS2
NAME_UND CMDPOS12
NAM_POS1 CMDPOS21
NAM_POS2
NAME_BAD
en06000508.vsd
Table 326: Output signals for the VSGGIO (VS01-) function block
Signal Description
BLOCKED The function is active but the functionality is blocked
POSITION Position indication, integer
POS1 Position 1 indication, logical signal
POS2 Position 2 indication, logical signal
CMDPOS12 Execute command from position 1 to position 2
CMDPOS21 Execute command from position 2 to position 1
627
Selector mini switch (VSGGIO) Chapter 11
Control
628
Single point generic control 8 signals Chapter 11
(SPC8GGIO) Control
7.1 Introduction
The SC function block is a collection of 8 single point commands, designed to bring in com-
mands from REMOTE (SCADA) or LOCAL (HMI) to those parts of the logic configuration that
do not need complicated function blocks that have the capability to receive commands (for ex-
ample SCSWI). In this way, simple commands can be sent directly to the IED outputs, without
confirmation. Confirmation (status) of the result of the commands is supposed to be achieved by
other means, such as binary inputs and SPGGIO function blocks.
SC01-
SPC8GGIO
BLOCK OUT1
PSTO OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
en07000143.vsd
629
Single point generic control 8 signals Chapter 11
(SPC8GGIO) Control
Table 329: Output signals for the SPC8GGIO (SC01-) function block
Signal Description
OUT1 Output 1
OUT2 Output2
OUT3 Output3
OUT4 Output4
OUT5 Output5
OUT6 Output6
OUT7 Output7
OUT8 Output8
630
About this chapter Chapter 12
Scheme communication
Chapter 12 Scheme
communication
Also Local acceleration logic (ZCLC) is discussed which is a function that can generate instan-
taneous tripping as a result of remote end faults without any telecommunication.
The chapter contains a short description of the design, simplified logical block diagrams, figure
of the function block, input and output signals and setting parameters.
631
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
1 Scheme communication
logic for distance protection (PSCH, 85)
1.1 Introduction
To achieve instantaneous fault clearance for all line faults, a scheme communication logic is pro-
vided. All types of communication schemes e.g. permissive underreach, permissive overreach,
blocking, intertrip etc. are available. The built-in communication module (LDCM) can be used
for scheme communication signalling when included.
Phase segregated communication is also available for correct operation at simultaneous faults
when three distance protection communication channels are available between the line ends
A permissive scheme is inherently faster and has better security against false tripping than a
blocking scheme. On the other hand, a permissive scheme depends on a received signal for a fast
trip, so its dependability is lower than that of a blocking scheme.
The received signal, which shall be connected to CR, is used to not release the zone to be accel-
erated to clear the fault instantaneously (after time tCoord). The overreaching zone to be accel-
erated is connected to the input PLTR_CRD, see figure 298.
In case of external faults, the blocking signal (CR) must be received before the settable timer
tCoord elapses, to prevent a false trip, see figure 298.
The function can be totally blocked by activating the input BLOCK, block of trip by activating
the input BLKTR, Block of carrier send by activating the input BLKCS.
632
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
PLTR-CRD
0-tCoord TRIP
CR AND 0
en05000512_ansi.vsd
The logic for trip carrier in permissive scheme is shown in figure 299.
PLTR-CRD
0-tCoord TRIP
CR AND 0
en05000513_ansi.vsd
The permissive underreach scheme has the same blocking possibilities as mentioned for block-
ing scheme above.
The logic for trip carrier is the same as for permissive underreach, i.e. figure 299.
The permissive overreach scheme has the same blocking possibilities as mentioned for blocking
scheme above.
The unblocking function uses a carrier guard signal CR_GUARD, which must always be
present, even when no CR signal is received. The absence of the CR_GUARD signal for a time
longer than the setting tSecurity time is used as a CR signal, see figure 300. This also enables a
permissive scheme to operate when the line fault blocks the signal transmission.
633
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
The carrier received signal created by the unblocking function is reset 150 ms after the security
timer has elapsed. When that occurs an output signal LCG is activated for signalling purpose.
The unblocking function is reset 200 ms after that the guard signal is present again.
CR
CRL
0-tSecurity OR
NOT
0
CR_GUARD
en05000746_ansi.vsd
The unblocking function can be set in three operation modes (setting Unblock):
The received signal CR is directly transferred to a TRIP for tripping without local criteria. The
signal is further processed in the tripping logic. In case of single-pole tripping in multi-phase
systems, a phase selection is performed.
634
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
Unblock =
Off
CR
Unblock =
OR CRL
NoRestart AND
CRL
Unblock =
Restart
CR_GUARD 0-tSecurity AND
NOT
0
LCG
200ms 150ms AND
OR AND
0 0
SchemeType =
Intertrip
CSUR
tSendMin AND
OR
BLOCK AND
CS_STOP OR
CRL
Schemetype =
Permissive UR AND CS
OR
Schemetype =
Permissive OR
CSOR OR AND
AND
tSendMin
OR
AND
SchemeType =
Blocking
BLKCS
AND
en05000515_ansi.vsd
Figure 301: Scheme communication logic for distance protection, simplified logic diagram
635
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
ZCOM-
ZCPSCH_85
BLOCK TRIP
BLKTR CS
BLKCS CRL
CS_STOP LCG
PLTR_CRD
CSOR
CSUR
CR
CR_GUARD
en06000286_ansi.vsd
Table 331: Output signals for the ZCPSCH_85 (ZCOM-) function block
Signal Description
TRIP Trip by pilot communication scheme logic
CS Pilot channel start signal
CRL Channel receive signal output from communication scheme
logic
LCG Loss of channel guard signal output from communication
scheme logic
636
Scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
Table 333: Advanced parameter group settings for the ZCPSCH_85 (ZCOM-) function
Parameter Range Step Default Unit Description
Unblock Disabled - Off - Operation mode of
NoRestart unblocking logic
Restart
tSecurity 0.000 - 60.000 0.001 0.035 s Security timer for loss of
carrier guard detection
637
Phase segregated scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
2.1 Introduction
Communication between line ends is used to achieve fault clearance for all faults on a power
line. All possible types of communication schemes e.g. permissive underreach, permissive over-
reach and blocking schemes are available. To manage problems with simultaneous faults on par-
allel power lines phase segregated communication is needed. This will then replace the standard
scheme communication module (ZCOM) on important lines where three communication chan-
nels (in each subsystem) are available for the distance protection communication.
The main purpose of the ZC1P scheme communication logic is to supplement the distance pro-
tection function such that:
• fast clearance of faults is also achieved at the line end for which the faults are on
the part of the line not covered by its underreaching zone.
• correct phase selection can be maintained to support single-pole tripping for
faults occurring anywhere on the entire length of a double circuit line.
To accomplish this, three separate communication channels, i.e. one per phase, each capable of
transmitting a signal in each direction are required.
The Phase segregated communication logic can be completed with the current reversal and WEI
logic for phase segregated communication, when found necessary in Blocking and Permissive
overreaching schemes.
A permissive scheme is inherently faster and has better security against false tripping than a
blocking scheme. On the other hand, a permissive scheme depends on a received signal for a fast
trip, so its dependability is lower than that of a blocking scheme.
The ZC1P function is a logical function built-up from logical elements. It is a supplementary
function to the distance protection, requiring for its operation inputs from the distance protection
and the communication equipment.
The type of communication-aided scheme to be used can be selected by way of the settings.
638
Phase segregated scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
The ability to select which distance protection zone is assigned to which input of the scheme
communication logic makes this logic able to support practically any scheme communication re-
quirements regardless of their basic operating principle. The outputs to initiate tripping and
sending of the teleprotection signal are given in accordance with the type of communication-aid-
ed scheme selected and the zone(s) and phase(s) of the distance protection which have operated.
When power line carrier communication channels are used for permissive schemes communica-
tion, unblocking logic which uses the loss of guard signal as a receive criteria is provided. This
logic compensates for the lack of dependability due to the transmission of the command signal
over the faulted line.
The function can be totally blocked by activating the input BLOCK, block of trip is achieved by
activating the input BLKTRLx, Block of carrier send is done by activating the input BLKCSLx.
CACCLx
0-tCoord 0 TRLx
CRLx AND
0 25 ms
en06000310_ansi.vsd
Figure 303: Basic logic for trip carrier in one phase of a blocking scheme
CACCLx
0-tCoord 0 TRLx
CRLx AND
0 25 ms
en07000088_ansi.vsd
Figure 304: Basic logic for trip carrier in one phase of a permissive underreach scheme
639
Phase segregated scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
The permissive overreach scheme has the same blocking possibilities as mentioned for blocking
scheme above. The blocking inputs are activated from the current reversal logic when this func-
tion is included.
The received signal per phase is directly transferred to the trip function block for tripping with-
out local criteria. The signal is not further processed in the phase segregated communication log-
ic. In case of single-pole tripping the phase selection and logic for tripping the three phases is
performed in the trip function block.
640
Phase segregated scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
SchemeType =
Intertrip
CSURLx
tSendMin AND
OR
BLOCK
AND
CSBLKLx OR
CRLx
Schemetype =
Permissive UR AND CSLx
OR
AND
OR
0-tCoord TRLx
CACCLx 25
Schemetype =
Permissive OR
CSORLx OR AND
AND
tSendMin
OR
AND
SchemeType =
Blocking
BLKCSx
AND
CSL1
CSL2 AND
CSL2
OR CSMPH
CSL3 AND
CSL3
CSL1 AND
CSL1
CSL2 GENERAL
OR
CSL3
en06000311_ansi.vsd
641
Phase segregated scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
ZC1P-
ZC1PPSCH_85
BLOCK TRIP
BLKTR TR_A
BLKTRL1 TR_B
BLKTRL2 TR_C
BLKTRL3 CSL1
CACCL1 CSL2
CACCL2 CSL3
CACCL3 CSMPH
CSURL1 CRLL1
CSURL2 CRLL2
CSURL3 CRLL3
CSORL1
CSORL2
CSORL3
CSBLKL1
CSBLKL2
CSBLKL3
BLKCSL1
BLKCSL2
BLKCSL3
CRL1
CRL2
CRL3
CRMPH
en06000427_ansi.vsd
642
Phase segregated scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
Signal Description
CSORL3 Overreaching distance protection zone signal in Phase L3
CSBLKL1 Reverse directed distance protection zone signal in Phase L1
CSBLKL2 Reverse directed distance protection zone signal in Phase L2
CSBLKL3 Reverse directed distance protection zone signal in Phase L3
BLKCSL1 Block of carrier send in POR and Blocking schemes in Phase L1
BLKCSL2 Block of carrier send in POR and Blocking schemes in Phase L2
BLKCSL3 Block of carrier send in POR and Blocking schemes in Phase L3
CRL1 Carrier signal received in Phase L1
CRL2 Carrier signal received in Phase L2
CRL3 Carrier signal received in Phase L3
CRMPH Carrier Signal received for multiphase fault
Table 336: Output signals for the ZC1PPSCH_85 (ZC1P-) function block
Signal Description
TRIP Common trip output in any of the phase
TR_A Trip output in Phase L1
TR_B Trip output in Phase L2
TR_C Trip output in Phase L3
CSL1 Carrier Send in phase L1
CSL2 Carrier Send in phase L2
CSL3 Carrier Send in phase L3
CSMPH carrier Send for mulitphase fault
CRLL1 Carrier signal received in Phase L1
CRLL2 Carrier signal received in Phase L2
CRLL3 Carrier signal received in Phase L3
643
Phase segregated scheme communication Chapter 12
logic for distance protection (PSCH, 85) Scheme communication
644
Current reversal and weak-end infeed logic Chapter 12
for distance protection (PSCH, 85) Scheme communication
3.1 Introduction
The current reversal function is used to prevent unwanted operations due to current reversal
when using permissive overreach protection schemes in application with parallel lines when the
overreach from the two ends overlaps on the parallel line.
The weak-end infeed logic is used in cases where the apparent power behind the protection can
be too low to activate the distance protection function. When activated, received carrier signal
together with local under voltage criteria and no reverse zone operation gives an instantaneous
trip. The received signal is also echoed back to accelerate the sending end.
The preventing of sending carrier send signal CSLx and activating of the TRIPLx in the scheme
communication block ZCOM is carried out by connecting the IRVL signal to input BLOCK in
the ZCOM function.
645
Current reversal and weak-end infeed logic Chapter 12
for distance protection (PSCH, 85) Scheme communication
The function has an internal 10 ms drop-off timer which secure that the current reversal logic
will be activated for short input signals even if the pick-up timer is set to zero.
The WEI function returns the received carrier signal, see figure 308, when:
BLOCK
WTSZ
WEIBLK1 OR
ECHO - cont.
CRL 0-tWEI 0 200ms
AND
0 50 ms 0 ECHO
AND
WEIBLKn 0
200ms
en06000324_ansi.vsd
When an echo function is used in both terminals (should generally be avoided), a spurious signal
can be looped round by the echo logics. To avoid a continuous lock-up of the system, the dura-
tion of the echoed signal is limited to 200 ms.
An undervoltage criteria is used as an additional tripping criteria, when the tripping of the local
breaker is selected, setting WEI = Echo&Trip, together with the WEI function and ECHO signal
has been issued by the echo logic, see figure 309.
646
Current reversal and weak-end infeed logic Chapter 12
for distance protection (PSCH, 85) Scheme communication
ZCAL-
ZCRWPSCH_85
V3P IRVL
BLOCK TRWEI
IFWD TRWEI_A
IREV TRWEI_B
WEIBLK1 TRWEI_C
WEIBLK2 ECHO
LOVBZ
CBOPEN
CRL
en06000287_ansi.vsd
647
Current reversal and weak-end infeed logic Chapter 12
for distance protection (PSCH, 85) Scheme communication
Table 340: Output signals for the ZCRWPSCH_85 (ZCAL-) function block
Signal Description
IRVL Operation of current reversal logic
TRWEI Trip of WEI logic
TRWEI_A Trip of WEI logic in phase A
TRWEI_B Trip of WEI logic in phase B
TRWEI_C Trip of WEI logic in phase C
ECHO A signal that indicates channel start (CS) by WEI logic
648
Current reversal and weak-end infeed logic Chapter 12
for distance protection (PSCH, 85) Scheme communication
649
Local acceleration logic (PLAL) Chapter 12
Scheme communication
4.1 Introduction
To achieve fast clearing of faults on the whole line, when no communication channel is avail-
able, local acceleration logic (ZCLC) can be used. This logic enables fast fault clearing during
certain conditions, but naturally, it can not fully replace a communication channel.
The logic can be controlled either by the auto re-closer (zone extension) or by the loss of load
current (loss-of-load acceleration).
650
Local acceleration logic (PLAL) Chapter 12
Scheme communication
After the auto-recloser initiates the close command and remains in the reclaim state, there will
be no ARREADY signal, and the protection will trip normally with step distance time functions.
In case of a fault on the adjacent line within the overreaching zone range, an unwanted auto-re-
closing cycle will occur. The step distance function at the reclosing attempt will prevent an un-
wanted retrip when the breaker is reclosed.
On the other hand, at a persistent line fault on line section not covered by instantaneous zone
(normally zone 1) only the first trip will be "instantaneous".
The function will be blocked if the input BLOCK is activated (common with loss of load accel-
eration).
Breaker closing signals can if decided be connected to block the function during normal closing.
651
Local acceleration logic (PLAL) Chapter 12
Scheme communication
ZCLC-
ZCLCPLAL
I3P TRZE
BLOCK TRLL
ARREADY
NDST
EXACC
BC
LLACC
en05000333.vsd
Table 344: Output signals for the ZCLCPLAL (ZCLC-) function block
Signal Description
TRZE Trip by zone extension
TRLL Trip by loss of load
652
Local acceleration logic (PLAL) Chapter 12
Scheme communication
653
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
5.1 Introduction
To achieve fast fault clearance of ground faults on the part of the line not covered by the instan-
taneous step of the residual overcurrent protection, the directional residual overcurrent protec-
tion can be supported with a logic that uses communication channels.
In the directional scheme, information of the fault current direction must be transmitted to the
other line end. With directional comparison, an operate time of the protection of 50 – 60 ms in-
cluding a channel transmission time of 20 ms, can be achieved. This short operate time enables
rapid autoreclosing function after the fault clearance.
The communication logic module for directional residual current protection enables blocking as
well as permissive under/overreach schemes. The logic can also be supported by additional logic
for weak-end-infeed and current reversal, included in the EFCA function.
In addition to this a signal from the autoreclosing function should be configured to the BLKCS
input for blocking of the function at a single phase reclosing cycle.
654
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
One advantage of the blocking scheme is that only one channel (carrier frequency) is needed if
the ratio of source impedances at both end is approximately equal for zero and positive sequence
source impedances, the channel can be shared with the impedance-measuring system, if that sys-
tem also works in the blocking mode. The power line carrier communication signal is transmit-
ted on a healthy line and no signal attenuation will occur due to the fault.
Blocking schemes are particular favorable for three-terminal applications if there is no zero-se-
quence outfeed from the tapping. The blocking scheme is immune to current reversals because
the received carrier signal is maintained long enough to avoid unwanted operation due to current
reversal. There is never any need for weak-end-infeed logic, because the strong end trips for an
internal fault when no blocking signal is received from the weak end. The fault clearing time is
however generally longer for a blocking scheme than for a permissive scheme.
If the fault is on the line, the forward direction measuring element operates. If no blocking signal
comes from the other line end via the CR binary input (carrier receive) the TRIP output is acti-
vated after the tCoord set time delay.
655
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
An impedance measuring relay which works in the same type of permissive mode, with one
channel in each direction, can share the channels with the communication scheme for residual
overcurrent protection. If the impedance measuring relay works in the permissive overreach
mode, common channels can be used in single-line applications. In case of double lines connect-
ed to a common bus at both ends, use common channels only if the ratio Z1S/Z0S (positive
through zero-sequence source impedance) is about equal at both ends. If the ratio is different,
the impedance measuring and the directionalground-fault current system of the healthy line may
detect a fault in different directions, which could result in unwanted tripping.
Common channels cannot be used when the weak-end-infeed function is used in the distance or
ground fault protection.
In case of an internal earth fault, the forward directed measuring element operates and sends a
permissive signal to the remote end via the CS output (carrier send). Local tripping is permitted
when the forward direction measuring element operates and a permissive signal is received via
the CR binary input (carrier receive).
The permissive scheme can of either underreach or overreach type. In the underreach alternative
an underreach directional residual overcurrent measurement element will be used as sending cri-
terion of the permissive send signal CSUR.
656
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
The unblocking function uses a carrier guard signal CR_GUARD, which must always be
present, even when no CR signal is received. The absence of the CR_GUARD signal for a time
longer than the setting tSecurity time is used as a CR signal, see figure 315. This also enables a
permissive scheme to operate when the line fault blocks the signal transmission.
The carrier received signal created by the unblocking function is reset 150 ms after the security
timer has elapsed. When that occurs an output signal LCG is activated for signalling purpose.
The unblocking function is reset 200 ms after that the guard signal is present again.
CR
tSecurity CRL
t >1
1
CRG
200 ms 150 ms
t OR t AND
AND
LCG
en05000746.vsd
The unblocking function can be set in three operation modes (setting Unblock):
657
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
EFC1-
ECPSCH_85
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG
en06000288.vsd
Table 347: Output signals for the ECPSCH_85 (EFC1-) function block
Signal Description
TRIP Trip by pilot communication scheme logic
CS Pilot channel start signal
CRL Channel receive signal output from communication scheme
logic
LCG Loss of channel guard signal output from communication
scheme logic
658
Scheme communication logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
Table 349: Advanced parameter group settings for the ECPSCH_85 (EFC1-) function
Parameter Range Step Default Unit Description
Unblock Disabled - Off - Operation mode of
NoRestart unblocking logic
Restart
tSecurity 0.000 - 60.000 0.001 0.035 s Security timer for loss of
carrier guard detection
659
Current reversal and weak-end infeed logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
6.1 Introduction
The EFCA additional communication logic is a supplement to the EFC scheme communication
logic for the residual overcurrent protection.
To achieve fast fault clearing for all ground faults on the line, the directional ground-fault pro-
tection function can be supported with logic, that uses communication channels. REx670 termi-
nals have for this reason available additions to scheme communication logic.
If parallel lines are connected to common busbars at both terminals, overreaching permissive
communication schemes can trip unselectively due to fault current reversal. This unwanted trip-
ping affects the healthy line when a fault is cleared on the other line. This lack of security can
result in a total loss of interconnection between the two buses. To avoid this type of disturbance,
a fault current-reversal logic (transient blocking logic) can be used.
Permissive communication schemes for residual overcurrent protection, can basically operate
only when the protection in the remote terminal can detect the fault. The detection requires a suf-
ficient minimum residual fault current, out from this terminal. The fault current can be too low
due to an opened breaker or high positive and/or zero sequence source impedance behind this
terminal. To overcome these conditions, weak end infeed (WEI) echo logic is used.
The circuits for the permissive overreach scheme contain logic for current reversal and weak end
infeed functions. These functions are not required for the blocking overreach scheme.
Use the independent or inverse time functions in the directional ground-fault protection module
to get back-up tripping in case the communication equipment malfunctions and prevents opera-
tion of the directional comparison logic.
Connect the necessary signal from the auto-recloser for blocking of the directional comparison
scheme, during a single-phase auto-reclosing cycle, to the BLOCK input of the directional com-
parison module.
660
Current reversal and weak-end infeed logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
When the fault current is reversed on the non faulty line, IREV is deactivated and IFWD is ac-
tivated. The reset of IRVL is delayed by the tDelay time, see figure 317. This ensures the reset
of the carrier receive CR signal.
The weak end infeed logic uses normally a reverse and a forward direction element, connected
to WEIBLK via an OR-gate. See figure 318. If neither the forward nor the reverse directional
measuring element is activated during the last 200 ms. The weak-end-infeed logic echoes back
the received permissive signal. See figure 318.
If the forward or the reverse directional measuring element is activated during the last 200 ms,
the fault current is sufficient for the IED to detect the fault with the ground-fault function that is
in operation.
With the Trip setting, the logic sends an echo according to above. Further, it activates the TR-
WEI signal to trip the breaker if the echo conditions are fulfilled and the neutral point voltage is
above the set operate value for 3V0Pickup
661
Current reversal and weak-end infeed logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
The voltage signal that is used to calculate the zero sequence voltage is set in the ground-fault
function that is in operation.
The weak end infeed echo sent to the strong line end has a maximum duration of 200 ms. When
this time period has elapsed, the conditions that enable the echo signal to be sent are set to zero
for a time period of 50 ms. This avoids ringing action if the weak end echo is selected for both
line ends.
EFCA-
ECRWPSCH_85
U3P IRVL
BLOCK TRWEI
IRVBLK ECHO
IRV CR
WEIBLK1
WEIBLK2
VTSZ
CBOPEN
CRL
en06000289.vsd
662
Current reversal and weak-end infeed logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
Table 352: Output signals for the ECRWPSCH_85 (EFCA-) function block
Signal Description
IRVL Operation of current reversal logic
TRWEI Trip of WEI logic
ECHO A signal that indicates channel start (CS) by WEI logic
CR POR Carrier signal received from remote end
663
Current reversal and weak-end infeed logic Chapter 12
for residual overcurrent protection (PSCH, 85) Scheme communication
664
Current reversal and weak-end infeed logic for Chapter 12
phase segregated communication (PSCH) Scheme communication
7.1 Introduction
The current reversal function is used to prevent unwanted operations due to current reversal
when using permissive overreach protection schemes in application with parallel lines when the
overreach from the two ends overlaps on the parallel line.
The weak-end infeed logic is used in cases where the apparent power behind the protection can
be too low to activate the distance protection function. When activated, received carrier signal
together with local under voltage criteria and no reverse zone operation gives an instantaneous
trip. The received signal is also echoed back to accelerate the sending end.
tPickUpRev 10 ms tPickUpRev
IRVLn t t t
tDelayRev
IRVOPLn
IRVBLKLn & t
en06000474.vsd
The preventing of sending carrier send signal CSLn and activating of the TRIPLn in the scheme
communication block ZCOM is carried out by connecting the IRVOPLn signal to input
BLOCKLn in the ZCOM function.
665
Current reversal and weak-end infeed logic for Chapter 12
phase segregated communication (PSCH) Scheme communication
The function has an internal 10 ms drop-off timer which secure that the current reversal logic
will be activated for short input signals even if the pick-up timer is set to zero.
The WEI function sends back (echoes) the received carrier signal under the condition that no
fault has been detected at the weak end by different fault detection elements (distance protection
in forward and reverse direction).
VTSZ
BLOCK OR
ECHOLn - cont.
CRLLn 0-tWEI 0 200ms
AND
0 50ms 0 ECHOLn
AND
WEIBLK1 0
200ms
WEIBLK2 0
200ms
en07000085_ansi.vsd
Figure 322: Weak end infeed logic
The WEI function returns the received carrier signal, see figure 322, when:
• The functional input CRLx is active. This input is usually connected to the CRLx
output on the scheme communication logic ZCOM.
• The WEI function is not blocked by the active signal connected to the
WEIBLKLx functional input or to the VTSZ functional input. The later is usually
configured to the STGEN functional output of the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLK2 functional
input. An OR combination of all fault detection functions (not undervoltage) as
present within the terminal is usually used for this purpose.
When an echo function is used in both terminals (should generally be avoided), a spurious signal
can be looped round by the echo logics. To avoid a continuous lock-up of the system, the dura-
tion of the echoed signal is limited to 200 ms. An undervoltage criteria is used as an additional
tripping criteria, when the tripping of the local breaker is selected, setting WEI = Echo &Trip,
together with the WEI function and ECHO signal has been issued by the echo logic, see figure
323.
666
Current reversal and weak-end infeed logic for Chapter 12
phase segregated communication (PSCH) Scheme communication
WEI = Echo&Trip
ECHOLn - cont.
CBOPEN
STUL1N
OR TRWEI
STUL2N AND 100ms OR
0
STUL3N TRWEIL1
AND 0
15ms
TRWEIL2
AND 0
15ms
TRWEIL3
AND 0
15ms
en00000551_ansi.vsd
Figure 323: Tripping part of the WEI logic, simplified diagram
ZC1W-
ZC1WPSCH_85
V3P TRPWEI
BLOCK TRPWEI_A
BLKZ TRPWEI_B
CBOPEN TRPWEI_C
CRL1 IRVOP
CRL2 IRVOP_A
CRL3 IRVOP_B
IRVL1 IRVOP_C
IRVL2 ECHO
IRVL3 ECHO_A
IRVBLKL1 ECHO_B
IRVBLKL2 ECHO_C
IRVBLKL3
WEIBLK
WEIBLKL1
WEIBLKL2
WEIBLKL3
WEIBLKOP
WEIBLKO1
WEIBLKO2
WEIBLKO3
en06000477_ansi.vsd
667
Current reversal and weak-end infeed logic for Chapter 12
phase segregated communication (PSCH) Scheme communication
Table 356: Output signals for the ZC1WPSCH_85 (ZC1W-) function block
Signal Description
TRPWEI Trip of WEI logic
TRPWEI_A Trip of WEI logic in Phase A
TRPWEI_B Trip of WEI logic in Phase B
TRPWEI_C Trip of WEI logic in Phase C
IRVOP Operation of current reversal logic
IRVOP_A Operation of current reversal logic in Phase A
IRVOP_B Operation of current reversal logic in Phase B
668
Current reversal and weak-end infeed logic for Chapter 12
phase segregated communication (PSCH) Scheme communication
Signal Description
IRVOP_C Operation of current reversal logic in Phase C
ECHO Carrier Send by WEI logic
ECHO_A Carrier Send by WEI logic in Phase A
ECHO_B Carrier Send by WEI logic in Phase B
ECHO_C Carrier Send by WEI logic in Phase C
669
Current reversal and weak-end infeed logic for Chapter 12
phase segregated communication (PSCH) Scheme communication
670
About this chapter Chapter 13
Logic
Chapter 13 Logic
671
Tripping logic (PTRC, 94) Chapter 13
Logic
1.1 Introduction
A function block for protection tripping is provided for each circuit breaker involved in the trip-
ping of the fault. It provides the pulse prolongation to ensure a trip pulse of sufficient length, as
well as all functionality necessary for correct co-operation with autoreclosing functions.
The trip function block includes functionality for evolving faults and breaker lock-out.
For three-pole tripping, TRPx function has a single input (TRINP_3P) through which all trip
output signals from the protection functions within the IED, or from external protection func-
tions via one or more of the IEDs binary inputs, are routed. It has a single trip output (TRIP) for
connection to one or more of the IEDs binary outputs, as well as to other functions within the
IED requiring this signal.
BLOCK
tTripMin TRIP
TRINP_3P OR
AND t
Operation Mode = On
Program = 3Ph
en05000789_ansi.vsd
The TRPx function for single- and two-pole tripping has additional phase segregated inputs for
this, as well as inputs for faulted phase selection. The latter inputs enable single- and two-pole
tripping for those functions which do not have their own phase selection capability, and there-
fore which have just a single trip output and not phase segregated trip outputs for routing through
672
Tripping logic (PTRC, 94) Chapter 13
Logic
the phase segregated trip inputs of the expanded TRPx function. Examples of such protection
functions are the residual overcurrent protections. The expanded TRPx function has two inputs
for these functions, one for impedance tripping (e.g. carrier-aided tripping commands from the
scheme communication logic), and one for ground fault tripping (e.g. tripping output from a re-
sidual overcurrent protection). Additional logic secures a three-pole final trip command for these
protection functions in the absence of the required phase selection signals.
The expanded TRPx function has three trip outputs TR_A, TR_B, TR_C (besides the trip output
TRIP), one per phase, for connection to one or more of the IEDs binary outputs, as well as to
other functions within the IED requiring these signals. There are also separate output signals in-
dicating single pole, two pole or three pole trip. These signals are important for cooperation with
the auto-reclosing function.
The expanded TRPx function is equipped with logic which secures correct operation for evolv-
ing faults as well as for reclosing on to persistent faults. A special input is also provided which
disables single- and two-pole tripping, forcing all tripping to be three-pole.
In multi-breaker arrangements, one TRPx function block is used for each breaker. This can be
the case if single pole tripping and auto-reclosing is used.
The breaker close lockout function can be activated from an external trip signal from another
protection function via input (SETLKOUT) or internally at a three pole trip, if desired.
It is possible to lockout seal in the tripping output signals or use blocking of closing only the
choice is by setting TripLockout.
TRINP-A
TRINP-B
OR
TRINP-C
1 PTRZ OR
1 PTRGF
OR
TRINP-3P INTL_ABCTRIP - cont.
AND
Program= 3 p
en 05000517
_ ansi. vsd
673
Tripping logic (PTRC, 94) Chapter 13
Logic
TRINP_3P
TRINP_A
PS_A ATRIP
OR
AND
TRINP_B
PS_B BTRIP
OR
AND
TRINP_C
PS_C CTRIP
OR
AND
OR
OR OR
-loop
-loop
OR
AND AND
AND
1PTRGF AND
1PTRZ OR 50 ms
0
en05000518_ansi.vsd
Figure 327: Phase segregated front logic
674
Tripping logic (PTRC, 94) Chapter 13
Logic
150 ms
ATRIP OR
t INTL_ATRIP
OR
0
2000 ms
OR
AND
150 ms
BTRIP OR
t INTL_BTRIP
OR
0
2000 ms
OR
AND
150 ms
CTRIP OR
t INTL_CTRIP
OR
0
2000 ms
OR
AND
OR
OR AND
P3PTR
OR
-loop
en05000519_ansi.vsd
Figure 328: Additional logic for the 1ph/3ph operating mode
675
Tripping logic (PTRC, 94) Chapter 13
Logic
150 ms
ATRIP - cont.
t OR INTL_ATRIP
OR
0
2000 ms
AND
150 ms
BTRIP
t OR INTL_BTRIP
OR
0 AND
2000 ms
AND
150 ms
CTRIP
t OR INTL_CTRIP
OR
0
2000 ms
AND
OR
AND
TRIP OR
OR
-loop
en05000520_ansi.vsd
676
Tripping logic (PTRC, 94) Chapter 13
Logic
BLOCK
INTL_ATRIP TR_A
AND
OR
INTL_BTRIP TR_B
AND
OR
INTL_CTRIP TR_C
AND
OR
ABC_TRIP
TRIP
OR
TR3P
AND AND
OR
-loop
AND TR1P
AND 10 ms
0
AND
5 ms TR2P
AND
0
OR
AND
-loop
en05000521_ansi.vsd
Figure 330: Final tripping circuits
677
Tripping logic (PTRC, 94) Chapter 13
Logic
TRP1-
SMPPTRC_94
BLOCK TRIP
BLKLKOUT TR_A
TRINP_3P TR_B
TRINP_A TR_C
TRINP_B TR1P
TRINP_C TR2P
PS_A TR3P
PS_B CLLKOUT
PS_C
1PTRZ
1PTRGF
P3PTR
SETLKOUT
RSTLKOUT
en05000707_ansi.vsd
678
Tripping logic (PTRC, 94) Chapter 13
Logic
Table 360: Output signals for the SMPPTRC_94 (TRP1-) function block
Signal Description
TRIP General trip output signal
TR_A Trip signal from phase A
TR_B Trip signal from phase B
TR_C Trip signal from phase C
TR1P Tripping single-pole
TR2P Tripping two-pole
TR3P Tripping three-pole
CLLKOUT Circuit breaker lockout output (set until reset)
Table 362: Advanced parameter group settings for the SMPPTRC_94 (TRP1-) function
Parameter Range Step Default Unit Description
TripLockout Disabled - Off - If TripLockout is set to
Enabled On, it will activate output
(CLLKOUT) and trip
latch. If set to Off it will
activate only CLLKOUT
AutoLock Disabled - Off - If AutoLock is set to On i
Enabled will activate lockout from
input (SETLKOUT) and
trip, If set to Off it will
activate only from SET-
LKOUT
679
Tripping logic (PTRC, 94) Chapter 13
Logic
680
Trip matrix logic (GGIO) Chapter 13
Logic
2.1 Introduction
Twelve trip matrix logic blocks are included in the IED. The function blocks are used in the con-
figuration of the IED to route trip signals and/or other logical output signals to the different out-
put relays.
The matrix and the physical outputs will be seen in the PCM 600 engineering tool and this allows
the user to adapt the signals to the physical tripping outputs according to the specific application
needs.
Internal built-in OR logic is made in accordance with the following three rules:
1. when any one of first 16 inputs signals (i.e. INPUT1 to INPUT16) has logical val-
ue 1 (i.e. TRUE) the first output signal (i.e. OUTPUT1) will get logical value 1
(i.e. TRUE). Additional time delays can be introduced for OUTPUT1 via setting
parameters "PulseTime1", "OnDelayTime1" & "OffDelayTime1".
2. when any one of second 16 inputs signals (i.e. INPUT17 to INPUT32) has logical
value 1 (i.e. TRUE) the second output signal (i.e. OUTPUT2) will get logical val-
ue 1 (i.e. TRUE). Additional time delays can be introduced for OUTPUT2 via
setting parameters "PulseTime2", "OnDelayTime2" & "OffDelayTime2"
3. when any one of all 32 input signals (i.e. INPUT1 to INPUT32) has logical value
1 (i.e. TRUE) the third output signal (i.e. OUTPUT3) will get logical value 1 (i.e.
TRUE). Additional time delays can be introduced for OUTPUT3 via setting pa-
rameters "PulseTime3", "OnDelayTime3" & "OffDelayTime3".
681
Trip matrix logic (GGIO) Chapter 13
Logic
Pulse Time 1
&
Pulse
Input 1 Output 1
AND
Input 2 On Delay Time 1 0
&
OR
Input 16 0 Off Delay Time 1
Pulse Time 2
&
Pulse
Input 17 Output 2
AND
Input 18 On Delay Time 2 0
&
OR
Input 32 0 Off Delay Time 2
Pulse Time 3
&
Pulse
Output 3
AND
On Delay Time 3 0
&
OR
0 Off Delay Time 3
en06000514_ansi.vsd
Figure 332: Tripping Matrix Internal Logic.
Output signals from this function block are typically connected to other logic blocks or directly
to output contacts from the IED. When used for direct tripping of the circuit breaker(s) the pulse
time delay on that output signal shall be set to approximately 0,150s in order to obtain satisfac-
tory minimum duration of the trip pulse to the circuit breaker trip coils.
682
Trip matrix logic (GGIO) Chapter 13
Logic
TR01-
TRMGGIO
INPUT1 OUTPUT1
INPUT2 OUTPUT2
INPUT3 OUTPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
INPUT17
INPUT18
INPUT19
INPUT20
INPUT21
INPUT22
INPUT23
INPUT24
INPUT25
INPUT26
INPUT27
INPUT28
INPUT29
INPUT30
INPUT31
INPUT32
en05000370_ansi.vsd
683
Trip matrix logic (GGIO) Chapter 13
Logic
Signal Description
INPUT12 Binary input 12
INPUT13 Binary input 13
INPUT14 Binary input 14
INPUT15 Binary input 15
INPUT16 Binary input 16
INPUT17 Binary input 17
INPUT18 Binary input 18
INPUT19 Binary input 19
INPUT20 Binary input 20
INPUT21 Binary input 21
INPUT22 Binary input 22
INPUT23 Binary input 23
INPUT24 Binary input 24
INPUT25 Binary input 25
INPUT26 Binary input 26
INPUT27 Binary input 27
INPUT28 Binary input 28
INPUT29 Binary input 29
INPUT30 Binary input 30
INPUT31 Binary input 31
INPUT32 Binary input 32
Table 365: Output signals for the TMAGGIO (TR01-) function block
Signal Description
OUTPUT1 OR function betweeen inputs 1 to 16
OUTPUT2 OR function between inputs 17 to 32
OUTPUT3 OR function between inputs 1 to 32
684
Trip matrix logic (GGIO) Chapter 13
Logic
685
Configurable logic blocks (LLD) Chapter 13
Logic
3.1 Introduction
A number of logic blocks and timers are available for user to adapt the configuration to the spe-
cific application needs.
I001-
INV
INPUT OUT
en04000404.vsd
Table 367: Input signals for the INV (I001-) function block
Signal Description
INPUT Input
Table 368: Output signals for the INV (I001-) function block
Signal Description
OUT Output
O001-
OR
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
INPUT5
INPUT6
en04000405.vsd
686
Configurable logic blocks (LLD) Chapter 13
Logic
A001-
AND
INPUT 1 OUT
INPUT 2 NOUT
INPUT 3
INPUT 4N
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Table 371: Input signals for the AND (A001-) function block
Signal Description
INPUT1 Input 1
INPUT2 Input 2
INPUT3 Input 3
INPUT4N Input 4 inverted
Table 372: Output signals for the AND (A001-) function block
Signal Description
OUT Output
NOUT Output inverted
687
Configurable logic blocks (LLD) Chapter 13
Logic
TM01-
Timer
INPUT ON
T OFF
en04000378_ansi.vsd
Table 373: Input signals for the Timer (TM01-) function block
Signal Description
INPUT Input to timer
Table 374: Output signals for the Timer (TM01-) function block
Signal Description
ON Output from timer , pickup delay
OFF Output from timer, dropout delay
TP01-
Pulse
INPUT OUT
T
en04000407_ansi.vsd
Table 376: Input signals for the Pulse (TP01-) function block
Signal Description
INPUT Input to pulse timer
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Configurable logic blocks (LLD) Chapter 13
Logic
Table 377: Output signals for the Pulse (TP01-) function block
Signal Description
OUT Output from pulse timer
XO01-
XOR
INPUT 1 OUT
INPUT 2 NOUT
en04000409.vsd
Table 379: Input signals for the XOR (XO01-) function block
Signal Description
INPUT1 Input 1 to XOR gate
INPUT2 Input 2 to XOR gate
Table 380: Output signals for the XOR (XO01-) function block
Signal Description
OUT Output from XOR gate
NOUT Inverted output from XOR gate
689
Configurable logic blocks (LLD) Chapter 13
Logic
Table 381: Truth table for the Set-Reset (SRM) function block
SET RESET OUT NOUT
1 0 1 0
0 1 0 1
1 1 0 1
0 0 0 1
SM01-
SRM
SET OUT
RESET NOUT
en04000408.vsd
Table 382: Input signals for the SRM (SM01-) function block
Signal Description
SET Set input
RESET Reset input
Table 383: Output signals for the SRM (SM01-) function block
Signal Description
OUT Output
NOUT Output inverted
Table 384: Parameter group settings for the SRM (SM01-) function
Parameter Range Step Default Unit Description
Memory Off - Off - Operating mode of the
On memory function
690
Configurable logic blocks (LLD) Chapter 13
Logic
GT 01-
GT
INPUT OUT
en04000410.vsd
TS01-
TimerSet
INPUT ON
OFF
en04000411_ansi.vsd
Table 388: Input signals for the TimerSet (TS01-) function block
Signal Description
INPUT Input to timer
691
Configurable logic blocks (LLD) Chapter 13
Logic
Table 389: Output signals for the TimerSet (TS01-) function block
Signal Description
ON Output from timer, pickup delay
OFF Output from timer, dropout delay
Table 390: Parameter group settings for the TimerSet (TS01-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off/On
On
t 0.000 - 90000.000 0.001 0.000 s Delay for settable timer n
692
Fixed signal function block (FIXD) Chapter 13
Logic
4.1 Introduction
The fixed signals function block generates a number of pre-set (fixed) signals that can be used
in the configuration of an IED, either for forcing the unused inputs in the other function blocks
to a certain level/value, or for creating a certain logic.
FIXD-
FixedSignals
OFF
ON
INTZERO
INTONE
REALZERO
STRNULL
ZEROSMPL
GRP_OFF
en05000445.vsd
693
Fixed signal function block (FIXD) Chapter 13
Logic
694
Boolean 16 to Integer conversion B16I Chapter 13
Logic
5.1 Introduction
The B16I function block (or the Boolean 16 to Integer conversion function block) is used within
the CAP tool to transform a set of 16 binary (logical) signals into an integer.
BB01-
B16I
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
en07000128.vsd
695
Boolean 16 to Integer conversion B16I Chapter 13
Logic
Table 394: Output signals for the B16I (BB01-) function block
Signal Description
OUT Output value
696
Boolean 16 to Integer conversion with logic Chapter 13
node representation (B16IGGIO) Logic
6.1 Introduction
The B16IGGIO function block (or the Boolean 16 to integer conversion with logic node repre-
sentation function block) is used within CAP tool to transform an integer to 16 binary (logic)
signals.
TheIB16IGGIO can receive it's value from remote like IEC61850 depending on the PSTO input.
The PSTO input determines the operator place. The integer number can be written to the block
while in “Remote”. If PSTO is in ”Off” or ”Local” then no change is applied to the outputs.
BA01-
B16IGGIO
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
en07000129.vsd
697
Boolean 16 to Integer conversion with logic Chapter 13
node representation (B16IGGIO) Logic
Table 396: Output signals for the B16IGGIO (BA01-) function block
Signal Description
OUT Output value
698
Integer to Boolean 16 conversion (IB16) Chapter 13
Logic
7.1 Introduction
The IB16 function block (or the integer to Boolean 16 conversion function block) is used within
the CAP tool to transform a set of 16 binary (logical) signals into an integer.
IY01-
IB16
BLOCK OUT1
IN OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
en06000501.vsd
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Integer to Boolean 16 conversion (IB16) Chapter 13
Logic
Table 398: Output signals for the IB16 (IY01-) function block
Signal Description
OUT1 Output 1
OUT2 Output 2
OUT3 Output 3
OUT4 Output 4
OUT5 Output 5
OUT6 Output 6
OUT7 Output 7
OUT8 Output 8
OUT9 Output 9
OUT10 Output 10
OUT11 Output 11
OUT12 Output 12
OUT13 Output 13
OUT14 Output 14
OUT15 Output 15
OUT16 Output 16
700
Integer to Boolean 16 conversion with logic Chapter 13
node representation (IB16GGIO) Logic
8.1 Introduction
The IB16GGIO function block (or the integer to Boolean conversion with logic node represen-
tation function block) is used within CAP tool to transform an integer to 16 binary (logic) sig-
nals.
The IB16GGIO can receive it's value from remote like IEC61850 depending on the PSTO input.
IX01-
IB16GGIO
BLOCK OUT1
PSTO OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
en06000502.vsd
701
Integer to Boolean 16 conversion with logic Chapter 13
node representation (IB16GGIO) Logic
Table 400: Output signals for the IB16GGIO (IX01-) function block
Signal Description
OUT1 Output 1
OUT2 Output 2
OUT3 Output 3
OUT4 Output 4
OUT5 Output 5
OUT6 Output 6
OUT7 Output 7
OUT8 Output 8
OUT9 Output 9
OUT10 Output 10
OUT11 Output 11
OUT12 Output 12
OUT13 Output 13
OUT14 Output 14
OUT15 Output 15
OUT16 Output 16
702
About this chapter Chapter 14
Monitoring
Chapter 14 Monitoring
703
Measurements (MSQI) Chapter 14
Monitoring
1 Measurements (MSQI)
704
Measurements (MSQI) Chapter 14
Monitoring
1.1 Introduction
Measurement functions is used for power system measurement, supervision and reporting to the
local HMI, monitoring tool within PCM 600 or to station level e.g.via IEC61850). The possibil-
ity to continuously monitor measured values of active power, reactive power, currents, voltages,
frequency, power factor etc. is vital for efficient production, transmission and distribution of
electrical energy. It provides to the system operator fast and easy overview of the present status
of the power system. Additionally it can be used during testing and commissioning of protection
and control IEDs in order to verify proper operation and connection of instrument transformers
(i.e. CTs & VTs). During normal service by periodic comparison of the measured value from the
IED with other independent meters the proper operation of the IED analog measurement chain
can be verified. Finally it can be used to verify proper direction orientation for distance or direc-
tional overcurrent protection function.
Note!
The available measured values of an IED are depending on the actual hardware (TRM) and the
logic configuration made in PCM 600.
All measured values can be supervised with four settable limits, i.e. low-low limit, low limit,
high limit and high-high limit. A zero clamping reduction is also supported, i.e the measured val-
ue below a settable limit is forced to zero which reduces the impact of noise in the inputs.
Dead-band supervision can be used to report measured signal value to station level when change
in measured value is above set threshold limit or time integral of all changes since the last time
value updating exceeds the threshold limit. Measure value can also be based on periodic report-
ing.
The measuring function, SVR (CVMMXU), provides the following power system quantities:
705
Measurements (MSQI) Chapter 14
Monitoring
It is possible to calibrate the measuring function above to get better then class 0.5 presentation.
This is accomplished by angle and magnitude compensation at 5, 30 and 100% of rated current
and at 100% of rated voltage.
Note!
The power system quantities provided, depends on the actual hardware, (TRM) and the logic
configuration made in PCM 600.
The measuring functions CSQ (CMSQI) and VSQ (VMSQI) provides sequential quantities:
The SVR function calculates three-phase power quantities by using fundamental frequency pha-
sors (i.e. DFT values) of the measured current respectively voltage signals. The measured power
quantities are available either as instantaneously calculated quantities or averaged values over a
period of time (i.e. low pass filtered) depending on the selected settings.
The information on measured quantities is available for the user at different locations:
706
Measurements (MSQI) Chapter 14
Monitoring
• Overfunction, when the measured current exceeds the High limit (XHiLim) or
High-high limit (XHiHiLim) pre-set values
• Underfunction, when the measured current decreases under the Low limit
(XLowLim) or Low-low limit (XLowLowLim) pre-set values.
X_RANGE = 3
High-high limit
X_RANGE= 1 Hysteresis
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4
en05000657.vsd
Figure 348: Presentation of operating limits
Each analog output has one corresponding supervision level output (X_RANGE). The output
signal is an integer in the interval 0-4 (0: Normal, 1: High limit exceeded, 3: High-high limit ex-
ceeded, 2: below Low limit and 4: below Low-low limit). The output may be connected to a
measurement expander block (XP (RANGE_XP)) to get measurement supervision as binary sig-
nals.
The logical value of the functional output signals changes according to figure 348.
The user can set the hysteresis (XLimHyst), which determines the difference between the oper-
ating and reset value at each operating point, in wide range for each measuring channel separate-
ly. The hysteresis is common for all operating values within one channel.
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Measurements (MSQI) Chapter 14
Monitoring
Cyclic reporting
The cyclic reporting of measured value is performed according to chosen setting (XRepTyp).
The measuring channel reports the value independent of magnitude or integral dead-band report-
ing.
Y
Value Reported Value Reported
Value Reported Value Reported
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t
Value 1
Value 2
Value 3
Value 4
Value 5
en05000500.vsd
(*)Set value for t: XDbRepInt
Figure 349: Periodic reporting
708
Measurements (MSQI) Chapter 14
Monitoring
Value Reported
Y
99000529.vsd
After the new value is reported, the ±ΔY limits for dead-band are automatically set around it.
The new value is reported only if the measured quantity changes more than defined by the ±ΔY
set limits.
The last value reported, Y1 in figure 351 serves as a basic value for further measurement. A dif-
ference is calculated between the last reported and the newly measured value and is multiplied
by the time increment (discrete integral). The absolute values of these integral values are added
until the pre-set value is exceeded. This occurs with the value Y2 that is reported and set as a
new base for the following measurements (as well as for the values Y3, Y4 and Y5).
The integral dead-band supervision is particularly suitable for monitoring signals with small
variations that can last for relatively long periods.
709
Measurements (MSQI) Chapter 14
Monitoring
Y A1 >=
A >= pre-set value
A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
(1st) Value
Value Reported Y5
A Reported Value
Reported Value
Y1 Reported
t
99000530.vsd
Figure 351: Reporting with integral dead-band supervision
Mode of operation
The measurement function must be connected to three-phase current and three-phase voltage in-
put in the configuration tool (group signals), but it is capable to measure and calculate above
mentioned quantities in nine different ways depending on the available VT inputs connected to
the IED. The end user can freely select by a parameter setting, which one of the nine available
measuring modes shall be used within the function. Available options are summarized in the fol-
lowing table:
710
Measurements (MSQI) Chapter 14
Monitoring
Set value Formula used for complex, Formula used for voltage Comment
for parame- three-phase power calculation and current magnitude cal-
ter “Mode” culation
1 A, B, C Used when three
phase-to-ground
S = VA ⋅ I A* + VB ⋅ I B* + VC ⋅ I C* (
V = VA + VB + VC )/ 3 voltages are
available
I =( I A
+ IB + IC )/3
2 Arone Used when three
( )
two
S = VAB ⋅ I A − VBC ⋅ I C
* *
V = VAB + VBC / 2 phase-to-phase
voltages are
I =( I A )
+ IC / 2 available
( )
VAB
S = VAB ⋅ I A − I B
* *
V = VAB phase-to-phase
voltage is avail-
(
I = IA + IB / 2 ) able
( )
VBC
S = VBC ⋅ I B − I C
* *
V = VBC phase-to-phase
voltage is avail-
(
I = I B + IC / 2 ) able
711
Measurements (MSQI) Chapter 14
Monitoring
Set value Formula used for complex, Formula used for voltage Comment
for parame- three-phase power calculation and current magnitude cal-
ter “Mode” culation
6 CA Used when only
( )
VCA
S = VCA ⋅ I C − I A
* *
V = VCA phase-to-phase
voltage is avail-
(
I = IC + I A / 2 ) able
It shall be noted that only in the first two operating modes (i.e. 1 & 3) the measurement function
calculates exact three-phase power. In other operating modes (i.e. from 3 to 9) it calculates the
three-phase power under assumption that the power system is fully symmetrical. Once the com-
plex apparent power is calculated then the P, Q, S, & PF are calculated in accordance with the
following formulas:
P = Re( S )
(Equation 99)
Q = Im( S )
(Equation 100)
S = S = P +Q
2 2
(Equation 101)
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Measurements (MSQI) Chapter 14
Monitoring
PF = cosϕ = P
S
(Equation 102)
Additionally to the power factor value the two binary output signals from the function are pro-
vided which indicates the angular relationship between current and voltage phasors. Binary out-
put signal ILAG is set to one when current phasor is lagging behind voltage phasor. Binary
output signal ILEAD is set to one when current phasor is leading the voltage phasor.
Each analog output has a corresponding supervision level output (X_RANGE). The output sig-
nal is an integer in the interval 0-4, see section 1.2.1 "Measurement supervision".
Magnitude
% of In compensation
-10
IMagComp5 Measured
IMagComp30 current
IMagComp100
5 30 100 % of In
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
-10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of In
-10
en05000652_ansi.vsd
713
Measurements (MSQI) Chapter 14
Monitoring
The first current and voltage phase in the group signals will be used as reference and the mag-
nitude and angle compensation will be used for related input signals.
X = k ⋅ X Old + (1 − k ) ⋅ X Calculated
(Equation 103)
where:
X is a new measured value (i.e. P, Q, S, V, I or PF) to be given out from the function
XOld is the measured value given from the measurement function in previous execution cycle
XCalculated is the new calculated value in the present execution cycle
k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is immediately
given out without any filtering (i.e. without any additional delay). When k is set to value bigger
than 0, the filtering is enabled. Appropriate value of k shall be determined separately for every
application. Some typical value for k =0.14.
Compensation facility
In order to compensate for small magnitude and angular errors in the complete measurement
chain (i.e. CT error, VT error, IED input transformer errors etc.) it is possible to perform on site
calibration of the power measurement. This is achieved by setting the complex constant which
is then internally used within the function to multiply the calculated complex apparent power S.
This constant is set as magnitude (i.e. setting parameter PowMagFact, default value 1.000) and
angle (i.e. setting parameter PowAngComp, default value 0.0 degrees). Default values for these
two parameters are done in such way that they do not influence internally calculated value (i.e.
complex constant has default value 1). In this way calibration, for specific operating range (e.g.
around rated power) can be done at site. However to perform this calibration it is necessary to
have external power meter of the high accuracy class available.
714
Measurements (MSQI) Chapter 14
Monitoring
Directionality
In CT grounding parameter is set as described in section 1 "Analog inputs", active and reactive
power will be measured always towards the protected object. This is shown in the following
figure 353.
Busbar
52
P Q
Protected
Object
en05000373_ansi.vsd
That practically means that active and reactive power will have positive values when they flow
from the busbar towards the protected object and they will have negative values when they flow
from the protected object towards the busbar.
In some application, like for example when power is measured on the secondary side of the pow-
er transformer it might be desirable, from the end client point of view, to have actually opposite
directional convention for active and reactive power measurements. This can be easily achieved
by setting parameter PowAngComp to value of 180.0 degrees. With such setting the active and
reactive power will have positive values when they flow from the protected object towards the
busbar.
Frequency
Frequency is actually not calculated within measurement block. It is simply obtained from the
pre-processing block and then just given out from the measurement block as an output.
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Measurements (MSQI) Chapter 14
Monitoring
Phase currents (magnitude and angle) are available on the outputs and each magnitude output
has a corresponding supervision level output (ILx_RANG). The supervision output signal is an
integer in the interval 0-4, see section 1.2.1 "Measurement supervision".
The voltages (phase or phase-phase voltage, magnitude and angle) are available on the outputs
and each magnitude output has a corresponding supervision level output (Vxy_RANG). The su-
pervision output signal is an integer in the interval 0-4, see section 1.2.1 "Measurement super-
vision".
Positive, negative and three times zero sequence quantities are available on the outputs (voltage
and current, magnitude and angle). Each magnitude output has a corresponding supervision lev-
el output (X_RANGE). The output signal is an integer in the interval 0-4, see section 1.2.1
"Measurement supervision".
716
Measurements (MSQI) Chapter 14
Monitoring
SVR1-
CVMMXU
I3P S
V3P S_RANGE
P_INST
P
P_RANGE
Q_INST
Q
Q_RANGE
PF
PF_RANGE
ILAG
ILEAD
V
V_RANGE
I
I_RANGE
F
F_RANGE
en05000772_ansi.vsd
CP01-
CMMXU
I3P I_A
IA_RANGE
IA_ANGL
I_B
IB_RANGE
IB_ANGL
I_C
IC_RANGE
IC_ANGL
VP01-
VMMXU
V3P V_AB
V_ABRANG
V_BC
V_BCRANG
V_CA
V_CARANG
en05000701_ansi.vsd
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Measurements (MSQI) Chapter 14
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CSQ1-
CMSQI
I3P 3I0
3I0RANG
I1
I1RANG
I2
I2RANG
en05000703.vsd
VSQ1-
VMSQI
U3P 3U0
3U0RANG
U1
U1RANG
U2
U2RANG
en05000704.vsd
VSQ1-
VMSQI
V3P 3V0
3V0RANG
V1
V1RANG
V2
V2RANG
en05000704_ansi.vsd
Table 402: Output signals for the CVMMXU (SVR1-) function block
Signal Description
S Apparent Power magnitude of deadband value
S_RANGE Apparent Power range
P_INST Active Power
P Active Power magnitude of deadband value
P_RANGE Active Power range
718
Measurements (MSQI) Chapter 14
Monitoring
Signal Description
Q_INST Reactive Power
Q Active Power magnitude of deadband value
Q_RANGE Reactive Power range
PF Power Factor magnitude of deadband value
PF_RANGE Power Factor range
ILAG Current is lagging voltage
ILEAD Current is leading voltage
V Calculate voltage magnitude of deadband value
V_RANGE Calcuate voltage range
I Calculated current magnitude of deadband value
I_RANGE Calculated current range
F System frequency magnitude of deadband value
F_RANGE System frequency range
Table 403: Input signals for the CMMXU (CP01-) function block
Signal Description
I3P Group connection abstract block 1
Table 404: Output signals for the CMMXU (CP01-) function block
Signal Description
I_A Phase A current magnitude of reported value
IA_RANGE Phase A current magnitude range
IA_ANGL Phase A current magnitude angle
I_B Phase B current magnitude of reported value
IB_RANGE Phase B current magnitude range
IB_ANGL Phase B current magnitude angle
I_C Phase C current magnitude of reported value
IC_RANGE Phase C current magnitude range
IC_ANGL Phase C current magnitude angle
Table 405: Input signals for the VMMXU (VP01-) function block
Signal Description
V3P Group connection abstract block 2
719
Measurements (MSQI) Chapter 14
Monitoring
Table 406: Output signals for the VMMXU (VP01-) function block
Signal Description
V_AB VAB Reported magnitude value
VAB_RANG VAB Magnitude range
V_BC VBC Reported magnitude value
VBC_RANG VBC Magnitude range
V_CA VCA Reported magnitude value
VCA_RANG VCA Magnitude range
Table 407: Input signals for the CMSQI (CSQ1-) function block
Signal Description
I3P Group connection abstract block 3
Table 408: Output signals for the CMSQI (CSQ1-) function block
Signal Description
3I0 3I0 magnitude of reported value
3I0RANG 3I0 Magnitude range
I1 I1magnitude of reported value
I1RANG I1 Magnitude range
I2 I2 Magnitude of reported value
I2RANG I2 Magnitude range
Table 409: Input signals for the VMSQI (VSQ1-) function block
Signal Description
V3P Group connection abstract block 4
Table 410: Output signals for the VMSQI (VSQ1-) function block
Signal Description
3V0 3V0 Reported magnitude value
3V0RANG 3V0 Magnitude range
V1 V1 Reported magnitude value
V1RANG V1 Magnitude range
V2 V2 Reported magnitude value
V2RANG V2 Magnitude range
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Measurements (MSQI) Chapter 14
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Table 411: Basic general settings for the CVMMXU (SVR1-) function
Parameter Range Step Default Unit Description
SLowLim 0.000 - 0.001 0.000 VA Low limit (physical value)
10000000000.000
SLowLowLim 0.000 - 0.001 0.000 VA Low Low limit (physical
10000000000.000 value)
SMin 0.000 - 0.001 0.000 VA Minimum value
10000000000.000
SMax 0.000 - 0.001 1000000000.000 VA Maximum value
10000000000.000
SRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
PMin -10000000000.000 0.001 -1000000000.000 W Minimum value
-
10000000000.000
PMax -10000000000.000 0.001 1000000000.000 W Maximum value
-
10000000000.000
PRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
QMin -10000000000.000 0.001 -1000000000.000 VAr Minimum value
-
10000000000.000
Operation Disabled - Off - Disable/Enable Opera-
Enabled tion
IBase 1 - 99999 1 3000 A Base setting for current
level in A
QMax -10000000000.000 0.001 1000000000.000 VAr Maximum value
-
10000000000.000
QRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
VBase 0.05 - 2000.00 0.05 400.00 kV Base setting for voltage
level in kV
721
Measurements (MSQI) Chapter 14
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Measurements (MSQI) Chapter 14
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Table 412: Advanced general settings for the CVMMXU (SVR1-) function
Parameter Range Step Default Unit Description
SDbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
Db: In % of range, Int Db:
In %s
SZeroDb 0 - 100000 1 0 m% Zero point clamping in
0.001% of range
SHiHiLim 0.000 - 0.001 900000000.000 VA High High limit (physical
10000000000.000 value)
SHiLim 0.000 - 0.001 800000000.000 VA High limit (physical value)
10000000000.000
SLimHyst 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
range (common for all
limits)
PDbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
Db: In % of range, Int Db:
In %s
PZeroDb 0 - 100000 1 0 m% Zero point clamping in
0.001% of range
PHiHiLim -10000000000.000 0.001 900000000.000 W High High limit (physical
- value)
10000000000.000
PHiLim -10000000000.000 0.001 800000000.000 W High limit (physical value)
-
10000000000.000
PLowLim -10000000000.000 0.001 -800000000.000 W Low limit (physical value)
-
10000000000.000
723
Measurements (MSQI) Chapter 14
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724
Measurements (MSQI) Chapter 14
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725
Measurements (MSQI) Chapter 14
Monitoring
Table 413: Basic general settings for the CMMXU (CP01-) function
Parameter Range Step Default Unit Description
IA_DbRepInt 1 - 300 1 10 Type Cycl: Report interval (s),
Db: In % of range, Int Db:
In %s
Operation Disabled - Off - Disbled/Enabled opera-
Enabled tion
IBase 1 - 99999 1 3000 A Base setting for current
level in A
IA_Max 0.000 - 0.001 1000.000 A Maximum value
10000000000.000
IA_RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
726
Measurements (MSQI) Chapter 14
Monitoring
Table 414: Advanced general settings for the CMMXU (CP01-) function
Parameter Range Step Default Unit Description
IA_ZeroDb 0 - 100000 1 0 m% Zero point clamping in
0.001% of range
IA_HiHiLim 0.000 - 0.001 900.000 A High High limit (physical
10000000000.000 value)
IA_HiLim 0.000 - 0.001 800.000 A High limit (physical value)
10000000000.000
IMagComp5 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate current at 5% of In
IMagComp30 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate current at 30% of In
IA_LowLim 0.000 - 0.001 0.000 A Low limit (physical value)
10000000000.000
IA_LowLowLim 0.000 - 0.001 0.000 A Low Low limit (physical
10000000000.000 value)
IMagComp100 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate current at 100% of
In
727
Measurements (MSQI) Chapter 14
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728
Measurements (MSQI) Chapter 14
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Table 415: Basic general settings for the VMMXU (VP01-) function
Parameter Range Step Default Unit Description
VAB_DbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
s Db: In % of range, Int Db:
In %s
Operation Disabled - On - Disbled/Enabled opera-
Enabled tion
VAB_ZeroDb 0 - 100000 1 0 1/1000 Zero point clamping in
% 0.001% of range
VBase 0.05 - 2000.00 0.05 400.00 kV Base setting for voltage
level in kV
VAB_HiHiLim -10000000000.000 0.001 460000.000 V High High limit (physical
- value)
10000000000.000
VAB_HiLim -10000000000.000 0.001 450000.000 V High limit (physical value)
-
10000000000.000
VMagComp5 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate voltage at 5% of Vn
VMagComp30 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate voltage at 30% of
Vn
VAB_LowLim -10000000000.000 0.001 380000.000 V Low limit (physical value)
-
10000000000.000
VAB_LowLowLim -10000000000.000 0.001 350000.000 V Low Low limit (physical
- value)
10000000000.000
VMagComp100 -10.000 - 10.000 0.001 0.000 % Magnitude factor to cali-
brate voltage at 100% of
Vn
VAB_Min -10000000000.000 0.001 0.000 V Minimum value
-
10000000000.000
VAB_Max -10000000000.000 0.001 450000.000 V Maximum value
-
10000000000.000
VAB_RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
VAB_LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
range and is common for
all limits
VAB_AnDbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
s Db: In % of range, Int Db:
In %s
VAB_AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
729
Measurements (MSQI) Chapter 14
Monitoring
730
Measurements (MSQI) Chapter 14
Monitoring
Table 416: Basic general settings for the CMSQI (CSQ1-) function
Parameter Range Step Default Unit Description
3I0DbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
s Db: In % of range, Int Db:
In %s
3I0ZeroDb 0 - 100000 1 0 1/1000 Zero point clamping in
% 0.001% of range
3I0HiHiLim -10000000000.000 0.001 900.000 A High High limit (physical
- value)
10000000000.000
3I0HiLim -10000000000.000 0.001 800.000 A High limit (physical value)
-
10000000000.000
3I0LowLim -10000000000.000 0.001 -800.000 A Low limit (physical value)
-
10000000000.000
3I0LowLowLim -10000000000.000 0.001 -900.000 A Low Low limit (physical
- value)
10000000000.000
3I0Min -10000000000.000 0.001 0.000 A Minimum value
-
10000000000.000
731
Measurements (MSQI) Chapter 14
Monitoring
732
Measurements (MSQI) Chapter 14
Monitoring
733
Measurements (MSQI) Chapter 14
Monitoring
Table 417: Basic general settings for the VMSQI (VSQ1-) function
Parameter Range Step Default Unit Description
3V0DbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
s Db: In % of range, Int Db:
In %s
3V0ZeroDb 0 - 100000 1 0 1/1000 Zero point clamping in
% 0.001% of range
3V0HiHiLim -10000000000.000 0.001 460000.000 V High High limit (physical
- value)
10000000000.000
3V0HiLim -10000000000.000 0.001 450000.000 V High limit (physical value)
-
10000000000.000
3V0LowLim -10000000000.000 0.001 380000.000 V Low limit (physical value)
-
10000000000.000
3V0LowLowLim -10000000000.000 0.001 350000.000 V Low Low limit (physical
- value)
10000000000.000
3V0Min -10000000000.000 0.001 0.000 V Minimum value
-
10000000000.000
3V0Max -10000000000.000 0.001 450000.000 V Maximum value
-
10000000000.000
3V0RepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
3V0LimHys 0.000 - 100.000 0.001 5.000 % Hysteresis value in % of
range and is common for
all limits
3V0AngDbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
s Db: In % of range, Int Db:
In %s
Operation Disabled - Off - Disbled/Enabled opera-
Enabled tion
3V0AngRepTyp Cyclic - Cyclic - Reporting type
Dead band
Int deadband
V1DbRepInt 1 - 300 1 10 s,%,% Cycl: Report interval (s),
s Db: In % of range, Int Db:
In %s
V1ZeroDb 0 - 100000 1 0 1/1000 Zero point clamping in
% 0.001% of range
V1HiHiLim -10000000000.000 0.001 460000.000 V High High limit (physical
- value)
10000000000.000
734
Measurements (MSQI) Chapter 14
Monitoring
735
Measurements (MSQI) Chapter 14
Monitoring
736
Event counter (GGIO) Chapter 14
Monitoring
CNT1-
CNTGGIO
BLOCK
COUNTER1
COUNTER2
COUNTER3
COUNTER4
COUNTER5
COUNTER6
RESET
en05000345.vsd
737
Event function (EV) Chapter 14
Monitoring
3.1 Introduction
When using a Substation Automation system with LON or SPA communication, time-tagged
events can be sent at change or cyclically from the IED to the station level. These events are cre-
ated from any available signal in the IED that is connected to the Event function block. The event
function block is used for remote communication.
Analog and double indication values are also transferred through the event block.
Each event function block has 16 inputs INPUT1 - INPUT16. Each input can be given a name
from the CAP configuration tool. The inputs are normally used to create single events, but are
also intended for double indication events.
The function also has an input BLOCK to block the generation of events.
The events that are sent from the IED can originate from both internal logical signals and binary
input channels. The internal signals are time-tagged in the main processing module, while the
binary input channels are time-tagged directly on the input module. The time-tagging of the
events that are originated from internal logical signals have a resolution corresponding to the ex-
ecution cyclicity of the event function block. The time-tagging of the events that are originated
from binary input signals have a resolution of 1 ms.
The outputs from the event function block are formed by the reading of status, events and alarms
by the station level on every single input. The user-defined name for each input is intended to
be used by the station level.
All events according to the event mask are stored in a buffer, which contains up to 1000 events.
If new events appear before the oldest event in the buffer is read, the oldest event is overwritten
and an overflow alarm appears.
The events are produced according to the set-event masks. The event masks are treated common-
ly for both the LON and SPA communication. The event mask can be set individually for each
input channel. These settings are available:
• NoEvents
738
Event function (EV) Chapter 14
Monitoring
• OnSet
• OnReset
• OnChange
• AutoDetect
It is possible to define which part of the event function block that shall generate events. This can
be performed individually for the LON and SPA communication respectively. For each commu-
nication type these settings are available:
• Off
• Channel 1-8
• Channel 9-16
• Channel 1-16
For LON communication the events normally are sent to station level at change. It is possibly
also to set a time for cyclic sending of the events individually for each input channel.
To protect the SA system from signals with a high change rate that can easily saturate the event
system or the communication subsystems behind it, a quota limiter is implemented. If an input
creates events at a rate that completely consume the granted quota then further events from the
channel will be blocked. This block will be removed when the input calms down and the accu-
mulated quota reach 66% of the maximum burst quota. The maximum burst quota per input
channel equals 3 times the configurable setting MaxEvPerSec.
739
Event function (EV) Chapter 14
Monitoring
EV01-
Event
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
en05000697.vsd
740
Event function (EV) Chapter 14
Monitoring
Signal Description
INPUT12 Input 12
INPUT13 Input 13
INPUT14 Input 14
INPUT15 Input 15
INPUT16 Input 16
741
Event function (EV) Chapter 14
Monitoring
742
Event function (EV) Chapter 14
Monitoring
743
Fault locator (RFLO) Chapter 14
Monitoring
4.1 Introduction
The accurate fault locator is an essential component to minimize the outages after a persistent
fault and/or to pin-point a weak spot on the line.
The built-in fault locator is an impedance measuring function giving the distance to the fault as
a relative (in%) or an absolute value. The main advantage is the high accuracy achieved by com-
pensating for load current and for the mutual zero sequence effect on double circuit lines.
The compensation includes setting of the remote and local sources and calculation of the distri-
bution of fault currents from each side. This distribution of fault current, together with recorded
load (pre-fault) currents, is used to exactly calculate the fault position. The fault can be recalcu-
lated with new source data at the actual fault to further increase the accuracy.
Specially on heavily loaded long lines (where the fault locator is most important) where the
source voltage angles can be up to 35-40 degrees apart the accuracy can be still maintained with
the advanced compensation included in fault locator.
When calculating distance to fault, pre-fault and fault phasors of currents and voltages are se-
lected from the Trip Value Recorder data, thus the analog signals used by the fault locator must
be among those connected to the disturbance report function. The analog configuration (channel
selection) is performed using the parameter setting tool within PCM 600.
The calculation algorithm considers the effect of load currents, double-end infeed and additional
fault resistance.
744
Fault locator (RFLO) Chapter 14
Monitoring
R0L+jX0L
R1L+jX1L
R1A+jX1A R1B+jX1B
Z0m=Z0m+jX0m
R0L+jX0L
R1L+jX1L
DRP
FL
en05000045_ansi.vsd
Figure 360: Simplified network configuration with network data, required for settings of the
fault location-measuring function.
If source impedance in the near and far end of the protected line have changed in a significant
manner relative to the set values at fault location calculation time (due to exceptional switching
state in the immediate network, power generation out of order etc.), new values can be entered
via the local HMI and a recalculation of the distance to the fault can be ordered using the algo-
rithm described below. It’s also possible to change fault loop. In this way, a more accurate lo-
cation of the fault can be achieved.
The function indicates the distance to the fault as a percentage of the line length, in kilometers
or miles as selected on the local HMI. The fault location is stored as a part of the disturbance
report information (ER, DR, IND, TVR and FL) and managed via the LHMI or PCM 600.
The calculation algorithm used in the fault locator in compensates for the effect of double-end
infeed, additional fault resistance and load current.
745
Fault locator (RFLO) Chapter 14
Monitoring
A B
ZA IA pZL IB (1-p).ZL ZB
IF
VA RF
xx01000171_ansi.vsd
VA = IA ⋅ p ⋅ ZL + IF ⋅ RF
(Equation 104)
Where:
IA is the line current after the fault, that is, pre-fault current plus current change due to
the fault,
IF is the fault current and
IF A
IF = --------
DA
(Equation 105)
Where:
IFA is the change in current at the point of measurement, terminal A and
DA is a fault current-distribution factor, that is, the ratio between the fault current at line
end A and the total fault current.
746
Fault locator (RFLO) Chapter 14
Monitoring
( 1 – p ) ⋅ Z L + ZB
DA = -----------------------------------------
Z A + Z L + ZB
(Equation 106)
Thus, the general fault location equation for a single line is:
IFA
VA = IA ⋅ p ⋅ ZL + ⋅ RF
DA
(Equation 107)
Table 421: Expressions for VA, IA and IFA for different types of faults
Fault type: VA IA IFA
AG VAA IAA + KN x INA
3
2 ⋅ Δ (IAA − I0 A )
BG VBA IBA + KN x INA
3
2 ⋅ Δ (IBA − I0 A )
CG VCA ICA + KN x INA
3
2 ⋅ Δ (ICA − I0 A )
ABC, AB, ABG VAA-VBA IAA - IBA ΔIABA
BC, BCG VBA-VCA IBA - ICA ΔICBA
CA, CAG VCA-VAA ICA - IAA ΔICAA
The KN complex quantity for zero-sequence compensation for the single line is equal to:
Z0L – Z 1L
K N = ------------------------
3 ⋅ Z1L
(Equation 108)
ΔI is the change in current, that is the current after the fault minus the current before the fault.
In the following, the positive sequence impedance for ZA, ZB and ZL is inserted into the equa-
tions, because this is the value used in the algorithm.
747
Fault locator (RFLO) Chapter 14
Monitoring
IFA
VA = IA ⋅ p ⋅ Z1L + ⋅ RF + I0P ⋅ Z0M
DA
(Equation 109)
Where:
I0P is a zero sequence current of the parallel line,
Z0M is a mutual zero sequence impedance and
DA is the distribution factor of the parallel line, which is:
( 1 – p ) ⋅ ( ZA + ZA L + ZB ) + Z B
DA = ----------------------------------------------------------------------------
- (Equation 110)
2 ⋅ ZA + Z L + 2 ⋅ Z B
Z0L – Z 1L Z 0M I 0P
K N = ------------------------ + ----------------- ⋅ -------
3 ⋅ Z1L 3 ⋅ Z1L I 0A
(Equation 111)
From these equations it can be seen, that, if Z0m = 0, then the general fault location equation for
a single line is obtained. Only the distribution factor differs in these two cases.
Because the DA distribution factor according to equation 107 or 110 is a function of p, the gen-
eral equation 109 can be written in the form:
2
p – p ⋅ K1 + K2 – K3 ⋅ RF = 0
(Equation 112)
Where:
VA ZB
K1 = + +1
IA ⋅ ZL ZL + Z ADD
(Equation 113)
VA ⎛ ZB ⎞
K2 = ⋅⎜ + 1⎟
IA ⋅ ZL ⎝ ZL + Z ADD ⎠
(Equation 114)
748
Fault locator (RFLO) Chapter 14
Monitoring
IF A ⎛ ZA + ZB
- ⋅ --------------------------- + 1⎞
K 3 = ---------------
I A ⋅ Z L ⎝ Z 1 + ZA DD ⎠
(Equation 115)
and:
For a single line, Z0M = 0 and ZADD = 0. Thus, equation 112 applies to both single and parallel
lines.
2
p – p ⋅ Re ( K 1 ) + Re ( K 2 ) – R F ⋅ Re ( K 3 ) = 0
(Equation 116)
– p ⋅ Im ⋅ ( K1 ) + Im ⋅ ( K 2 ) – R F ⋅ Im ⋅ ( K3 ) = 0
(Equation 117)
If the imaginary part of K3 is not zero, RF can be solved according to equation 117, and then
inserted to equation 116. According to equation 116, the relative distance to the fault is solved
as the root of a quadratic equation.
Equation 116 gives two different values for the relative distance to the fault as a solution. A sim-
plified load compensated algorithm, that gives an unequivocal figure for the relative distance to
the fault, is used to establish the value that should be selected.
If the load compensated algorithms according to the above do not give a reliable solution, a less
accurate, non-compensated impedance model is used to calculate the relative distance to the
fault.
VA = p ⋅ Z1L ⋅ IA + RF ⋅ IA
(Equation 118)
Where:
IA is according to table 421.
749
Fault locator (RFLO) Chapter 14
Monitoring
The accuracy of the distance-to-fault calculation, using the non-compensated impedance model,
is influenced by the pre-fault load current. So, this method is only used if the load compensated
models do not function.
FLO1-
LMBRFLO
PHSEL_A FLTDISTX
PHSEL_B CALCMADE
PHSEL_C BCD_80
CALCDIST BCD_40
BCD_20
BCD_10
BCD_8
BCD_4
BCD_2
BCD_1
en05000679_ansi.vsd
Table 423: Output signals for the LMBRFLO (FLO1-) function block
Signal Description
FLTDISTX Reactive distance to fault
CALCMADE Fault calculation made
BCD_80 Distance in binary coded data, bit represents 80%
BCD_40 Distance in binary coded data, bit represents 40%
BCD_20 Distance in binary coded data, bit represents 20%
750
Fault locator (RFLO) Chapter 14
Monitoring
Signal Description
BCD_10 Distance in binary coded data, bit represents 10%
BCD_8 Distance in binary coded data, bit represents 8%
BCD_4 Distance in binary coded data, bit represents 4%
BCD_2 Distance in binary coded data, bit represents 2%
BCD_1 Distance in binary coded data, bit represents 1%
751
Fault locator (RFLO) Chapter 14
Monitoring
Table 425: Basic parameter group settings for the LMBRFLO (FLO1-) function
Parameter Range Step Default Unit Description
R1A 0.001 - 1500.000 0.001 2.000 ohm/p Source resistance A
(near end)
X1A 0.001 - 1500.000 0.001 12.000 ohm/p Source reactance A (near
end)
R1B 0.001 - 1500.000 0.001 2.000 ohm/p Source resistance B (far
end)
X1B 0.001 - 1500.000 0.001 12.000 ohm/p Source reactance B (far
end)
R1L 0.001 - 1500.000 0.001 2.000 ohm/p Positive sequence line
resistance
X1L 0.001 - 1500.000 0.001 12.500 ohm/p Positive sequence line
reactance
R0L 0.001 - 1500.000 0.001 8.750 ohm/p Zero sequence line resis-
tance
X0L 0.001 - 1500.000 0.001 50.000 ohm/p Zero sequence line reac-
tance
R0M 0.000 - 1500.000 0.001 0.000 ohm/p Zero sequence mutual
resistance
X0M 0.000 - 1500.000 0.001 0.000 ohm/p Zero sequence mutual
reactance
LineLength 0.0 - 10000.0 0.1 40.0 - Length of line
752
Measured value expander block Chapter 14
Monitoring
5.1 Introduction
The functions MMXU (SVR, CP and VP), MSQI (CSQ and VSQ) and MVGGIO (MV) are pro-
vided with measurement supervision functionality. All measured values can be supervised with
four settable limits, i.e. low-low limit, low limit, high limit and high-high limit. The measure val-
ue expander block (XP) has been introduced to be able to translate the integer output signal from
the measuring functions to 5 binary signals i.e. below low-low limit, below low limit, normal,
above high-high limit or above high limit. The output signals can be used as conditions in the
configurable logic.
753
Measured value expander block Chapter 14
Monitoring
XP01-
RANGE_XP
RANGE HIGHHIGH
HIGH
NORMAL
LOW
LOWLOW
en05000346.vsd
Table 429: Output signals for the RANGE_XP (XP01-) function block
Signal Description
HIGHHIGH Measured value is above high-high limit
HIGH Measured value is between high and high-high limit
NORMAL Measured value is between high and low limit
LOW Measured value is between low and low-low limit
LOWLOW Measured value is below low-low limit
754
Disturbance report (RDRE) Chapter 14
Monitoring
Function block name: DRP--, DRA1- – DRA4-, IEC 60617 graphical symbol:
DRB1- – DRB6-
ANSI number:
IEC 61850 logical node name:
ABRDRE
6.1 Introduction
Complete and reliable information about disturbances in the primary and/or in the secondary
system together with continuous event-logging is accomplished by the disturbance report func-
tionality.
The disturbance report, always included in the IED, acquires sampled data of all selected analog
input and binary signals connected to the function block i.e. maximum 40 analog and 96 binary
signals.
Every disturbance report recording is saved in the IED in the standard Comtrade format. The
same applies to all events, which are continuously saved in a ring-buffer. The Local Human Ma-
chine Interface (LHMI) is used to get information about the recordings, but the disturbance re-
port files may be uploaded to the PCM 600 (Protection and Control IED Manager) and further
analysis using the disturbance handling tool.
755
Disturbance report (RDRE) Chapter 14
Monitoring
Figure 364 shows the relations among Disturbance Report, included functions and function
blocks. EL, ER and IND uses information from the binary input function blocks (DRB1- 6).
TVR uses analog information from the analog input function blocks (DRA1-3) which is used by
FL after estimation by TVR. The DR function acquires information from both DRAx and DRBx.
DRP- - FL01
A4RADR RDRE FL
Analog signals
Trip Value Rec Fault Locator
DRB1-- 6- Disturbance
Recorder
Event Recorder
Indications
en05000124.vsd
The whole disturbance report can contain information for a number of recordings, each with the
data coming from all the parts mentioned above. The event list function is working continuously,
independent of disturbance triggering, recording time etc. All information in the disturbance re-
port is stored in non-volatile flash memories. This implies that no information is lost in case of
loss of auxiliary power. Each report will get an identification number in the interval from 0-999.
756
Disturbance report (RDRE) Chapter 14
Monitoring
Disturbance report
en05000125_ansi.vsd
Figure 365: Disturbance report structure
Up to 100 disturbance reports can be stored. If a new disturbance is to be recorded when the
memory is full, the oldest disturbance report is over-written by the new one. The total recording
capacity for the disturbance recorder is depending of sampling frequency, number of analog and
binary channels and recording time. The figure 366 shows number of recordings vs total record-
ing time tested for a typical configuration, i.e. in a 60 Hz system it’s possible to record 80 where
the average recording time is 3.4 seconds. The memory limit does not affect the rest of the dis-
turbance report (IND, ER, EL and TVR).
757
Disturbance report (RDRE) Chapter 14
Monitoring
Number of recordings
100
3.4s
80 3.4s 20 analog
96 binary
40 analog
96 binary
60 6.3s
6.3s
6.3s 50 Hz
40
60 Hz
Total recording time
en05000488_ansi.vsd
Disturbance information
Date and time of the disturbance, the indications, events, fault location and the trip values are
available on the local human-machine interface (LHMI). To acquire a complete disturbance re-
port the use of a PC and PCM600 is required. The PC may be connected to the IED-front, rear
or remotely via the station bus (Ethernet ports).
Indications (IND)
Indications is a list of signals that were activated during the total recording time of the distur-
bance (not time-tagged). (See section 8 "Indications (RDRE)" for more detailed information.)
758
Disturbance report (RDRE) Chapter 14
Monitoring
Time tagging
The IED has a built-in real-time calendar and clock. This function is used for all time tagging
within the disturbance report
Recording times
The disturbance report (DRP) records information about a disturbance during a settable time
frame. The recording times are valid for the whole disturbance report. The disturbance recorder
(DR), the event recorder (ER) and indication function register disturbance data and events dur-
ing tRecording, the total recording time.
759
Disturbance report (RDRE) Chapter 14
Monitoring
Trig point
TimeLimit
PreFaultRecT PostFaultRecT
1 2 3
en05000487.vsd
Analog signals
Up to 40 analog signals can be selected for recording by the Disturbance recorder and triggering
of the Disturbance report function. Out of these 40, 30 are reserved for external analog signals,
i.e. signals from the analog input modules (TRM) and line differential communication module
(LDCM) via preprocessing function blocks (SMAI) and summation block (Sum3Ph). The last
10 channels may be connected to internally calculated analog signals available as function block
output signals (mA input signals, phase differential currents, bias currents etc.).
760
Disturbance report (RDRE) Chapter 14
Monitoring
PRxx- DRA1-
SMAI A1RADR DRA2-
GRPNAME AI3P A2RADR DRA3-
External analog AI1NAME AI1 INPUT1 A3RADR
signals
AI2NAME AI2 INPUT2
TRM, LDCM AI3NAME AI3 INPUT3
SUxx
AI4NAME AI4 INPUT4
AIN INPUT5
INPUT6
...
A4RADR
INPUT31
Internal analog signals
T2Dx, T3Dx, INPUT32
REFx, HZDx, INPUT33
L3D, L6D,
LT3D, LT6D INPUT34
INPUT35
SVRx, CPxx, VP0x,
CSQx, VSQx, MVxx INPUT36
...
INPUT40
en05000653.vsd
The external input signals will be acquired, filtered and skewed and (after configuration) avail-
able as an input signal on the DRAx- function block via the PRxx function block. The informa-
tion is saved at the Disturbance report base sampling rate (1000 or 1200 Hz). Internally
calculated signals are updated according to the cycle time of the specific function. If a function
is running at lower speed than the base sampling rate, the Disturbance recorder will use the latest
updated sample until a new updated sample is available.
If the IED is preconfigured the only tool needed for analog configuration of the Disturbance re-
port is the Signal Matrix Tool (SMT, external signal configuration). In case of modification of
a preconfigured IED or general internal configuration the Application Configuration tool within
PCM600 is used.
The preprocessor function block (PRxx) calculates the residual quantities in cases where only
the three phases are connected (AI4-input not used). PRxx makes the information available as a
group signal output, phase outputs and calculated residual output (AIN-output). In situations
where AI4-input is used as a input signal the corresponding information is available on the
non-calculated output (AI4) on the PRxx-block. Connect the signals to the DRAx accordingly.
For each of the analog signals, Operation = On means that it is recorded by the disturbance re-
corder. The trigger is independent of the setting of Operation, and triggers even if operation is
set to Off. Both undervoltage and overvoltage can be used as trigger conditions. The same ap-
plies for the current signals.
761
Disturbance report (RDRE) Chapter 14
Monitoring
The analog signals are presented only in the disturbance recording, but they affect the entire dis-
turbance report when being used as triggers.
Binary signals
Up to 96 binary signals can be selected to be handled by the disturbance report.The signals can
be selected from internal logical and binary input signals. A binary signal is selected to be re-
corded when:
Each of the 96 signals can be selected as a trigger of the disturbance report (Opera-
tion—>TrigDR=ON/OFF). A binary signal can be selected to activate the red LED on the local
HMI (setLED=On/Off).
The selected signals are presented in the event recorder, event list and the disturbance recording.
But they affect the whole disturbance report when they are used as triggers. The indications are
also selected from these 96 signals with the LHMI IndicationMask=Show/Hide.
Trigger signals
The trigger conditions affect the entire disturbance report, except the event list, which runs con-
tinuously. As soon as at least one trigger condition is fulfilled, a complete disturbance report is
recorded. On the other hand, if no trigger condition is fulfilled, there is no disturbance report, no
indications, and so on. This implies the importance of choosing the right signals as trigger con-
ditions.
• Manual trigger
• Binary-signal trigger
• Analog-signal trigger (over/under function)
Manual trigger
A disturbance report can be manually triggered from the local HMI, from PCM600 or via station
bus (IEC61850). When the trigger is activated, the manual trigger signal is generated. This fea-
ture is especially useful for testing. Refer to “Operators manual” for procedure.
Binary-signal trigger
Any binary signal state (logic one or a logic zero) can be selected to generate a trigger (Triglevel
= Trig on 0/Trig on 1). When a binary signal is selected to generate a trigger from a logic zero,
the selected signal will not be listed in the indications list of the disturbance report.
Analog-signal trigger
All analog signals are available for trigger purposes, no matter if they are recorded in the distur-
bance recorder or not. The settings are OverTrigOp, UnderTrigOp, OverTrigLe and UnderTri-
gLe.
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Disturbance report (RDRE) Chapter 14
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The check of the trigger condition is based on peak-to-peak values. When this is found, the ab-
solute average value of these two peak values is calculated. If the average value is above the
threshold level for an overvoltage or overcurrent trigger, this trigger is indicated with a greater
than (>) sign with the user-defined name.
If the average value is below the set threshold level for an undervoltage or undercurrent trigger,
this trigger is indicated with a less than (<) sign with its name. The procedure is separately per-
formed for each channel.
This method of checking the analog trigger conditions gives a function which is insensitive to
DC offset in the signal. The operate time for this initiation is typically in the range of one cycle,
16 2/3 ms for a 60 Hz network.
All under/over trig signal information is available on the LHMI and PCM600, see table 431
"Output signals for the RDRE (DRP--) function block".
Post Retrigger
The disturbance report function does not respond to any new trig condition, during a recording.
Under certain circumstances the fault condition may reoccur during the post-fault recording, for
instance by automatic reclosing to a still faulty power line.
In order to capture the new disturbance it is possible to allow retriggering (PostRetrig = On)dur-
ing the post-fault time. In this case a new, complete recording will start and, during a period, run
in parallel with the initial recording.
When the retrig parameter is disabled (PostRetrig = Off), a new recording will not start until the
post-fault (PostFaultrecT or TimeLimit) period is terminated. If a new trig occurs during the
post-fault period and lasts longer than the proceeding recording a new complete recording will
be fetched.
The disturbance report function can handle maximum 3 simultaneous disturbance recordings.
DRP--
RDRE
DRPOFF
RECSTART
RECMADE
CLEARED
MEMUSED
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Disturbance report (RDRE) Chapter 14
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DRA1-
A1RADR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
en05000430.vsd
Figure 370: DRA1 function block, analog inputs, example for DRA1–DRA3
DRA4-
A4RADR
INPUT31
INPUT32
INPUT33
INPUT34
INPUT35
INPUT36
INPUT37
INPUT38
INPUT39
INPUT40
NAME31
NAME32
NAME33
NAME34
NAME35
NAME36
NAME37
NAME38
NAME39
NAME40
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DRB1-
B1RBDR
INPUT 1
INPUT 2
INPUT 3
INPUT 4
INPUT 5
INPUT 6
INPUT 7
INPUT 8
INPUT 9
INPUT 10
INPUT 11
INPUT 12
INPUT 13
INPUT 14
INPUT 15
INPUT 16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
en05000432.vsd
Figure 372: DRB1 function block, binary inputs, example for DRB1–DRB6
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Disturbance report (RDRE) Chapter 14
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Table 432: Input signals for the A1RADR (DRA1-) function block
Signal Description
INPUT1 Group signal for input 1
INPUT2 Group signal for input 2
INPUT3 Group signal for input 3
INPUT4 Group signal for input 4
INPUT5 Group signal for input 5
INPUT6 Group signal for input 6
INPUT7 Group signal for input 7
INPUT8 Group signal for input 8
INPUT9 Group signal for input 9
INPUT10 Group signal for input 10
Table 433: Input signals for the A4RADR (DRA4-) function block
Signal Description
INPUT31 Analog channel 31
INPUT32 Analog channel 32
INPUT33 Analog channel 33
INPUT34 Analog channel 34
INPUT35 Analog channel 35
INPUT36 Analog channel 36
INPUT37 Analog channel 37
INPUT38 Analog channel 38
INPUT39 Analog channel 39
INPUT40 Analogue channel 40
Table 434: Input signals for the B1RBDR (DRB1-) function block
Signal Description
INPUT1 Binary channel 1
INPUT2 Binary channel 2
INPUT3 Binary channel 3
INPUT4 Binary channel 4
INPUT5 Binary channel 5
INPUT6 Binary channel 6
INPUT7 Binary channel 7
INPUT8 Binary channel 8
INPUT9 Binary channel 9
INPUT10 Binary channel 10
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Disturbance report (RDRE) Chapter 14
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Signal Description
INPUT11 Binary channel 11
INPUT12 Binary channel 12
INPUT13 Binary channel 13
INPUT14 Binary channel 14
INPUT15 Binary channel 15
INPUT16 Binary channel 16
Table 436: Basic general settings for the A1RADR (DRA1-) function
Parameter Range Step Default Unit Description
Operation01 Disabled - Disabled - Operation On/Off
Enabled
NomValue01 0.0 - 999999.9 0.1 0.0 - Nominal value for analog
channel 1
UnderTrigOp01 Disabled - Disabled - Use under level trig for
Enabled analog cha 1 (on) or not
(off)
UnderTrigLe01 0 - 200 1 50 % Under trigger level for
analog cha 1 in % of sig-
nal
OverTrigOp01 Disabled - Disabled - Use over level trig for
Enabled analog cha 1 (on) or not
(off)
OverTrigLe01 0 - 5000 1 200 % Over trigger level for ana-
log cha 1 in % of signal
Operation02 Disabled - Disabled - Operation On/Off
Enabled
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Disturbance report (RDRE) Chapter 14
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Table 437: Basic general settings for the A4RADR (DRA4-) function
Parameter Range Step Default Unit Description
Operation31 Disabled - Disabled - Operation On/off
Enabled
NomValue31 0.0 - 999999.9 0.1 0.0 - Nominal value for analog
channel 31
UnderTrigOp31 Disabled - Disabled - Use under level trig for
Enabled analog cha 31 (on) or not
(off)
UnderTrigLe31 0 - 200 1 50 % Under trigger level for
analog cha 31 in % of
signal
OverTrigOp31 Disabled - Disabled - Use over level trig for
Enabled analog cha 31 (on) or not
(off)
OverTrigLe31 0 - 5000 1 200 % Over trigger level for ana-
log cha 31 in % of signal
Operation32 Disabled - Disabled - Operation On/off
Enabled
NomValue32 0.0 - 999999.9 0.1 0.0 - Nominal value for analog
channel 32
UnderTrigOp32 Disabled - Disabled - Use under level trig for
Enabled analog cha 32 (on) or not
(off)
UnderTrigLe32 0 - 200 1 50 % Under trigger level for
analog cha 32 in % of
signal
OverTrigOp32 Disabled - Disabled - Use over level trig for
Enabled analog cha 32 (on) or not
(off)
OverTrigLe32 0 - 5000 1 200 % Over trigger level for ana-
log cha 32 in % of signal
Operation33 Disabled - Disabled - Operation On/off
Enabled
NomValue33 0.0 - 999999.9 0.1 0.0 - Nominal value for analog
channel 33
UnderTrigOp33 Disabled - Disabled - Use under level trig for
Enabled analog cha 33 (on) or not
(off)
UnderTrigLe33 0 - 200 1 50 % Under trigger level for
analog cha 33 in % of
signal
OverTrigOp33 Disabled - Disabled - Use over level trig for
Enabled analog cha 33 (on) or not
(off)
OverTrigLe33 0 - 5000 1 200 % Overtrigger level for ana-
log cha 33 in % of signal
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Disturbance report (RDRE) Chapter 14
Monitoring
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Disturbance report (RDRE) Chapter 14
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Disturbance report (RDRE) Chapter 14
Monitoring
Table 438: Basic general settings for the B1RBDR (DRB1-) function
Parameter Range Step Default Unit Description
Operation01 Disabled - Disabled - Trigger operation On/Off
Enabled
TrigLevel01 Trig on 0 - Trig on 1 - Trig on positiv (1) or neg-
Trig on 1 ative (0) slope for binary
inp 1
IndicationMa01 Hide - Hide - Indication mask for
Show binary channel 1
SetLED01 Disabled - Disabled - Set red-LED on HMI for
Enabled binary channel 1
Operation02 Disabled - Disabled - Trigger operation On/Off
Enabled
TrigLevel02 Trig on 0 - Trig on 1 - Trig on positiv (1) or neg-
Trig on 1 ative (0) slope for binary
inp 2
IndicationMa02 Hide - Hide - Indication mask for
Show binary channel 2
SetLED02 Disabled - Disabled - Set red-LED on HMI for
Enabled binary channel 2
Operation03 Disabled - Disabled - Trigger operation On/Off
Enabled
TrigLevel03 Trig on 0 - Trig on 1 - Trig on positiv (1) or neg-
Trig on 1 ative (0) slope for binary
inp 3
IndicationMa03 Hide - Hide - Indication mask for
Show binary channel 3
SetLED03 Disabled - Disabled - Set red-LED on HMI for
Enabled binary channel 3
Operation04 Disabled - Disabled - Trigger operation On/Off
Enabled
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Disturbance report (RDRE) Chapter 14
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Disturbance report (RDRE) Chapter 14
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Disturbance report (RDRE) Chapter 14
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778
Disturbance report (RDRE) Chapter 14
Monitoring
779
Disturbance report (RDRE) Chapter 14
Monitoring
780
Sequence of events (RDRE) Chapter 14
Monitoring
7.1 Introduction
Continuous event-logging is useful for monitoring of the system from an overview perspective
and is a complement to specific disturbance recorder functions.
The event list logs all binary input signals connected to the Disturbance report function. The list
may contain of up to 1000 time-tagged events stored in a ring-buffer.
The event list information is available in the IED and is reported to higher control systems via
the station bus together with other logged events in the IED. In absence of any software tool the
information seeker may use the local HMI to view the event list.
The list can be configured to show oldest or newest events first with a setting on the LHMI.
The event list function runs continuously, in contrast to the event recorder function, which is
only active during a disturbance.
The name of the binary input signal that appears in the event recording is the user-defined name
assigned when the IED is configured. The same name is used in the disturbance recorder func-
tion (DR), indications (IND) and the event recorder function (ER).
The event list is stored and managed separate from the disturbance report information (ER, DR,
IND, TVR and FL).
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Sequence of events (RDRE) Chapter 14
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Indications (RDRE) Chapter 14
Monitoring
8 Indications (RDRE)
8.1 Introduction
To get fast, condensed and reliable information about disturbances in the primary and/or in the
secondary system it is important to know e.g. binary signals that have changed status during a
disturbance. This information is used in the short perspective to get information via the LHMI
in a straightforward way.
There are three LEDs on the LHMI (green, yellow and red), which will display status informa-
tion about the IED and the Disturbance Report function (trigged).
The Indication list function shows all selected binary input signals connected to the Disturbance
Report function that have changed status during a disturbance.
The indication information is available for each of the recorded disturbances in the IED and the
user may use the Local Human Machine Interface (LHMI) to get the information.
Green LED:
Yellow LED:
Red LED:
Indication list:
The possible indicated signals are the same as the ones chosen for the disturbance report function
and disturbance recorder
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Indications (RDRE) Chapter 14
Monitoring
The indication function tracks 0 to 1 changes of binary signals during the recording period of the
collection window. This means that constant logic zero, constant logic one or state changes from
logic one to logic zero will not be visible in the list of indications. Signals are not time tagged.
In order to be recorded in the list of indications the:
Indications are selected with the indication mask (IndicationMask) when configuring the binary
inputs.
The name of the binary input signal that appears in the Indication function is the user-defined
name assigned at configuration of the IED. The same name is used in disturbance recorder func-
tion (DR), indications (IND) and event recorder function (ER).
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Event recorder (RDRE) Chapter 14
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9.1 Introduction
Quick, complete and reliable information about disturbances in the primary and/or in the sec-
ondary system is vital e.g. time tagged events logged during disturbances. This information is
used for different purposes in the short term (e.g. corrective actions) and in the long term (e.g.
Functional Analysis).
The event recorder logs all selected binary input signals connected to the Disturbance Report
function. Each recording can contain up to 150 time-tagged events.
The event recorder information is available for the disturbances locally in the IED.
The information may be uploaded to the PCM 600 (Protection and Control IED Manager) and
further analyzed using the Disturbance Handling tool.
The event recording information is an integrated part of the disturbance record (Comtrade file).
In case of overlapping recordings, due to PostRetrig = On and a new trig signal appears during
post-fault time, events will be saved in both recording files.
The name of the binary input signal that appears in the event recording is the user-defined name
assigned when configuring the IED. The same name is used in the disturbance recorder function
(DR), indications (IND) and event recorder function (ER).
The event record is stored as a part of the disturbance report information (ER, DR, IND, TVR
and FL) and managed via the LHMI or PCM 600.
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Event recorder (RDRE) Chapter 14
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Trip value recorder (RDRE) Chapter 14
Monitoring
10.1 Introduction
Information about the pre-fault and fault values for currents and voltages are vital for the distur-
bance evaluation.
The Trip value recorder calculates the values of all selected analog input signals connected to
the Disturbance report function. The result is magnitude and phase angle before and during the
fault for each analog input signal.
The trip value recorder information is available for the disturbances locally in the IED.
The information may be uploaded to the PCM 600 (Protection and Control IED Manager) and
further analyzed using the Disturbance Handling tool.
The trip value recorder information is an integrated part of the disturbance record (Comtrade
file).
When the disturbance report function is triggered the sample for the fault interception is
searched for, by checking the non-periodic changes in the analog input signals. The channel
search order is consecutive, starting with the analog input with the lowest number.
When a fault interception point is found, the Fourier estimation of the pre-fault values of the
complex values of the analog signals starts 1.5 cycle before the fault sample. The estimation uses
samples during one period. The post-fault values are calculated using the Recursive Least
Squares (RLS) method. The calculation starts a few samples after the fault sample and uses sam-
ples during 1/2 - 2 cycles depending on the shape of the signals.
If no starting point is found in the recording, the disturbance report trig sample is used as the
start sample for the Fourier estimation. The estimation uses samples during one cycle before the
trig sample. In this case the calculated values are used both as pre-fault and fault values.
The name of the analog input signal that appears in the Trip value recorder function is the us-
er-defined name assigned when the IED is configured. The same name is used in the Disturbance
recorder function (DR).
The trip value record is stored as a part of the disturbance report information (ER, DR, IND,
TVR and FLOC) and managed in via the LHMI or PCM 600.
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Trip value recorder (RDRE) Chapter 14
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Disturbance recorder (RDRE) Chapter 14
Monitoring
11.1 Introduction
The Disturbance Recorder function supplies fast, complete and reliable information about dis-
turbances in the power system. It facilitates understanding system behavior and related primary
and secondary equipment during and after a disturbance. Recorded information is used for dif-
ferent purposes in the short perspective (e.g. corrective actions) and long perspective (e.g. Func-
tional Analysis).
The Disturbance Recorder acquires sampled data from all selected analog input and binary sig-
nals connected to the Disturbance Report function (maximum 40 analog and 96 binary signals).
The binary signals are the same signals as available under the event recorder function.
The function is characterized by great flexibility and is not dependent on the operation of pro-
tection functions. It can record disturbances not detected by protection functions.
The disturbance recorder information for the last 100 disturbances are saved in the IED and the
Local Human Machine Interface (LHMI) is used to view the list of recordings.
The disturbance recording information can be uploaded to the PCM 600 (Protection and Control
IED Manager) and further analyzed using the Disturbance Handling tool.
DR collects analog values and binary signals continuously, in a cyclic buffer. The pre-fault buff-
er operates according to the FIFO principle; old data will continuously be overwritten as new
data arrives when the buffer is full. The size of this buffer is determined by the set pre-fault re-
cording time.
Upon detection of a fault condition (triggering), the disturbance is time tagged and the data stor-
age continues in a post-fault buffer. The storage process continues as long as the fault condition
prevails - plus a certain additional time. This is called the post-fault time and it can be set in the
disturbance report.
The above mentioned two parts form a disturbance recording. The whole memory, intended for
disturbance recordings, acts as a cyclic buffer and when it is full, the oldest recording is over-
written. The last 100 recordings are stored in the IED.
The time tagging refers to the activation of the trigger that starts the disturbance recording. A
recording can be trigged by, manual start, binary input and/or from analog inputs (over-/under-
level trig).
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Disturbance recorder (RDRE) Chapter 14
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A user-defined name for each of the signals can be set. These names are common for all func-
tions within the disturbance report functionality.
• Saving the data for analog channels with corresponding data for binary signals
• Add relevant data to be used by the Disturbance Handling tool (part of PCM 600)
• Compression of the data, which is performed without losing any data accuracy
• Storing the compressed data in a non-volatile memory (flash memory)
The recording files comply with the Comtrade standard IEC 60255-24 and are divided into three
files; a header file (HDR), a configuration file (CFG) and a data file (DAT).
The header file (optional in the standard) contains basic information about the disturbance i.e.
information from the Disturbance Report functions (ER, TVR and FL). The Disturbance Han-
dling tool use this information and present the recording in a user-friendly way.
General:
Analog:
Binary:
• Signal names
• Status of binary input signals
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Disturbance recorder (RDRE) Chapter 14
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The configuration file is a mandatory file containing information needed to interpret the data
file. For example sampling rate, number of channels, system frequency, channel info etc.
The data file, which also is mandatory, containing values for each input channel for each sample
in the record (scaled value). The data file also contains a sequence number and time stamp for
each set of samples.
The last 8 recordings, out of maximum 100, are available for transfer to the master. When the
last one is transferred and acknowledged new recordings in the IED will appear, in the master
points of view (even if they already where stored in the IED).
To be able to report 40 analog channels from the IED using IEC 60870-5-103 the first
8 channels are placed in the public range and the next 32 are placed in the private range. To com-
ply the standard the first 8 must be configured according to table 444.
The binary signals connected to DRB1-DRB6 are reported by polling. The function blocks in-
clude function type and information number.
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Disturbance recorder (RDRE) Chapter 14
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792
About this chapter Chapter 15
Metering
Chapter 15 Metering
793
Pulse counter logic (GGIO) Chapter 15
Metering
1.1 Introduction
The pulse counter logic function counts externally generated binary pulses, for instance pulses
coming from an external energy meter, for calculation of energy consumption values. The pulses
are captured by the binary input module and then read by the pulse counter function. A scaled
service value is available over the station bus. The special Binary input module with enhanced
pulse counting capabilities must be ordered to achieve this functionality.
The integration time period can be set in the range from 30 seconds to 60 minutes and is syn-
chronized with absolute system time. Interrogation of additional pulse counter values can be
done with a command (intermediate reading) for a single counter. All active counters can also
be read by the LON General Interrogation command (GI) or IEC 61850.
The pulse counter in REx670 supports unidirectional incremental counters. That means only
positive values are possible. The counter uses a 32 bit format, that is, the reported value is a
32-bit, signed integer with a range 0...+2147483647. The counter is reset at initialization of the
IED.
The reported value to station HMI over the station bus contains Identity, Value, Time, and Pulse
Counter Quality. The Pulse Counter Quality consists of:
The transmission of the counter value by SPA can be done as a service value, that is, the value
frozen in the last integration cycle is read by the station HMI from the database. The pulse
counter function updates the value in the database when an integration cycle is finished and ac-
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Pulse counter logic (GGIO) Chapter 15
Metering
tivates the NEW_VAL signal in the function block. This signal can be connected to an Event
function block, be time tagged, and transmitted to the station HMI. This time corresponds to the
time when the value was frozen by the function.
Note!
The pulse counter function requires a binary input card, BIMp, that is specially adapted to the
pulse counter function.
Figure 373 shows the pulse counter function block with connections of the inputs and outputs.
The BLOCK and READ_VAL inputs can be connected to Single Command blocks, which are
intended to be controlled either from the station HMI or/and the local HMI. As long as the
BLOCK signal is set, the pulse counter is blocked. The signal connected to READ_VAL per-
forms one additional reading per positive flank. The signal must be a pulse with a length >1 sec-
ond.
The BI_PULSE input is connected to the used input of the function block for the Binary Input
Module (BIM).
Each pulse counter function block has four binary output signals that can be connected to an
Event function block for event recording: INVALID, RESTART, BLOCKED and NEW_VAL.
The SCAL_VAL signal can be connected to the IEC Event function block.
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The INVALID signal is a steady signal and is set if the Binary Input Module, where the pulse
counter input is located, fails or has wrong configuration.
The RESTART signal is a steady signal and is set when the reported value does not comprise a
complete integration cycle. That is, in the first message after IED start-up, in the first message
after deblocking, and after the counter has wrapped around during last integration cycle.
The BLOCKED signal is a steady signal and is set when the counter is blocked. There are two
reasons why the counter is blocked:
The NEW_VAL signal is a pulse signal. The signal is set if the counter value was updated since
last report.
PC01-
PCGGIO
BLOCK INVALID
READ_VAL RESTART
BI_PULSE BLOCKED
RS_CNT NEW_VAL
NAME SCAL_VAL
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Pulse counter logic (GGIO) Chapter 15
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Table 447: Output signals for the PCGGIO (PC01-) function block
Signal Description
INVALID The pulse counter value is invalid
RESTART The reported value does not comprise a complete integration
cycle
BLOCKED The pulse counter function is blocked
NEW_VAL A new pulse counter value is generated
SCAL_VAL Scaled value with time and status information
797
Energy metering and demand handling Chapter 15
(MMTR) Metering
2.1 Introduction
Outputs from measurement function (MMXU) can be used to calculate energy. Active as well
as reactive values are calculated in import respectively export direction. Values can be read or
generated as pulses. Maximum demand power values are also calculated by the function.
The maximum demand values for active and reactive power are calculated for the set time tEn-
ergy and the maximum value is stored in a register available over communication and from out-
puts MAXPAFD, MAXPARD, MAXRAFD, MAXRARD for the active and reactive power
forward and reverse direction until reset with input RSTDMD or from the LHMI reset menu.
SVR1 ETP1
CVMMXU ETPMMTR
PINST P
QINST Q
STACC
TRUE
RSTACC
FALSE
RSTDMD
FALSE
en07000121.vsd
Figure 375: Connection of the energy metering function to the outputs of the measuring func-
tion
798
Energy metering and demand handling Chapter 15
(MMTR) Metering
ETP1-
ETPMMTR
P ACCST
Q EAFPULSE
STACC EARPULSE
RSTACC ERFPULSE
RSTDMD ERRPULSE
EAFALM
EARALM
ERFALM
ERRALM
EAFACC
EARACC
ERFACC
ERRACC
MAXPAFD
MAXPARD
MAXPRFD
MAXPRRD
en07000120.vsd
Table 451: Output signals for the ETPMMTR (ETP1-) function block
Signal Description
ACCST Start of accumulating energy values.
EAFPULSE Accumulated forward active energy pulse
EARPULSE Accumulated reverse active energy pulse
ERFPULSE Accumulated forward reactive energy pulse
ERRPULSE Accumulated reverse reactive energy pulse
EAFALM Alarm for active forward energy exceed limit in set interval
EARALM Alarm for active reverse energy exceed limit in set interval
ERFALM Alarm for reactive forward energy exceed limit in set interval
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Energy metering and demand handling Chapter 15
(MMTR) Metering
Signal Description
ERRALM Alarm for reactive reverse energy exceed limit in set interval
EAFACC Accumulated forward active energy value in KWh
EARACC Accumulated reverse active energy value in kWh
ERFACC Accumulated forward reactive energy value in kVArh
ERRACC Accumulated reverse reactive energy value in kVArh
MAXPAFD Maximum forward active power demand value for set interval
MAXPARD Maximum reverse active power demand value for set interval
MAXPRFD Maximum forward reactive power demand value for set interval
MAXPRRD Maximum reactive power demand value in reverse direction
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Energy metering and demand handling Chapter 15
(MMTR) Metering
Table 453: Advanced general settings for the ETPMMTR (ETP1-) function
Parameter Range Step Default Unit Description
EALim 0.001 - 0.001 1000000.000 MWh Active energy limit
10000000000.000
ERLim 0.001 - 0.001 1000.000 MVArh Reactive energy limit
10000000000.000
DirEnergyAct Forward - Forward - Direction of active energy
Reverse flow Forward/Reverse
DirEnergyReac Forward - Forward - Direction of reactive
Reverse energy flow For-
ward/Reverse
EnZeroClamp Disabled - Enabled - Enable of zero point
Enabled clamping detection func-
tion
LevZeroClampP 0.001 - 10000.000 0.001 10.000 MW Zero point clamping level
at active Power
LevZeroClampQ 0.001 - 10000.000 0.001 10.000 MVAr Zero point clamping level
at reactive Power
EAFPrestVal 0.000 - 10000.000 0.001 0.000 MWh Preset Initial value for for-
ward active energy
EARPrestVal 0.000 - 10000.000 0.001 0.000 MWh Preset Initial value for
reverse active energy
ERFPresetVal 0.000 - 10000.000 0.001 0.000 MVArh Preset Initial value for for-
ward reactive energy
ERVPresetVal 0.000 - 10000.000 0.001 0.000 MVArh Preset Initial value for
reverse reactive energy
801
Energy metering and demand handling Chapter 15
(MMTR) Metering
802
About this chapter Chapter 16
Station communication
Chapter 16 Station
communication
803
Overview Chapter 16
Station communication
1 Overview
Each IED is provided with a communication interface, enabling it to connect to one or many sub-
station level systems or equipment, either on the Substation Automation (SA) bus or Substation
Monitoring (SM) bus.
804
IEC 61850-8-1 communication protocol Chapter 16
Station communication
2.1 Introduction
Single or double optical Ethernet ports for the new substation communication standard
IEC61850-8-1 for the station bus are provided. IEC61850-8-1 allows intelligent devices (IEDs)
from different vendors to exchange information and simplifies SA engineering. Peer- to peer
communication according to GOOSE is part of the standard. Disturbance files uploading is pro-
vided.
SP01-
SPGGIO
BLOCK
IN
NAME
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IEC 61850-8-1 communication protocol Chapter 16
Station communication
MP01-
SP16GGIO
BLOCK NAMEOR
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
NAME1
NAME2
NAME3
NAME4
NAME5
NAME6
NAME7
NAME8
NAME9
NAME10
NAME11
NAME12
NAME13
NAME14
NAME15
NAME16
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IEC 61850-8-1 communication protocol Chapter 16
Station communication
DP01-
DPGGIO
OPEN
CLOSE
VALID
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IEC 61850-8-1 communication protocol Chapter 16
Station communication
MV01-
MVGGIO
IN VALUE
RANGE
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Table 457: Output signals for the MVGGIO (MV01-) function block
Signal Description
VALUE Magnitude of deadband value
RANGE Range
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IEC 61850-8-1 communication protocol Chapter 16
Station communication
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3.1 Introduction
An optical network can be used within the Substation Automation system. This enables commu-
nication with the IED through the LON bus from the operator’s workplace, from the control cen-
ter and also from other terminals.
The LON protocol is specified in LonTalkProtocol Specification Version 3 from Echelon Cor-
poration and is designed for communication in control networks. These networks are character-
ized by high speed for data transfer, short messages (few bytes), peer-to-peer communication,
multiple communication media, low maintenance, multivendor equipment, and low support
costs. LonTalk supports the needs of applications that cover a range of requirements. The pro-
tocol follows the reference model for open system interconnection (OSI) designed by the Inter-
national Standardization Organization (ISO).
In this document the most common addresses for commands and events are available. Other ad-
dresses can be found in a separate document, refer to section 1.5 "Related documents".
It is assumed that the reader is familiar with the LON communication protocol in general.
The LON bus links the different parts of the protection and control system. The measured values,
status information, and event information are spontaneously sent to the higher-level devices.
The higher-level devices can read and write memorized values, setting values, and other param-
eter data when required. The LON bus also enables the bay level devices to communicate with
each other to deliver, for example, interlocking information among the terminals without the
need of a bus master.
The LonTalk protocol supports two types of application layer objects: network variables and ex-
plicit messages. Network variables are used to deliver short messages, such as measuring values,
status information, and interlocking/blocking signals. Explicit messages are used to transfer
longer pieces of information, such as events and explicit read and write messages to access de-
vice data.
The benefits achieved from using the LON bus in protection and control systems include direct
communication among all terminals in the system and support for multi-master implementa-
tions. The LON bus also has an open concept, so that the terminals can communicate with ex-
ternal devices using the same standard of network variables.
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LON protocol
Configuration of LON
Lon Network Tool (LNT 505) is a multi-purpose tool for LonWorks network configuration. All
the functions required for setting up and configuring a LonWorks network is easily accessible
on a single tool program. For details see the “Operators manual”.
Activate LONCommunication
Activate LON communication in the PST Parameter Setting Tool under Settings -> General set-
tings – > Communication – > SLM configuration – > Rear optical LON, where ADE should be
set to ON.
Vertical communication
Vertical communication describes communication between the monitoring devices and protec-
tion and control IEDs. This communication includes sending of changed process data to moni-
toring devices as events and transfer of commands, parameter data and disturbance recorder
files. This communication is implemented using explicit messages.
Binary events
Binary events are generated in event function blocks EV01 to EV20 in the 670IEDs. The event
function blocks have predefined LON addresses. table 461 shows the LON addresses to the first
input on the event function blocks. The addresses to the other inputs on the event function block
are consecutive after the first input. For example, input 15 on event block EV17 has the address
1280 + 14 (15-1) = 1294.
For double indications only the first eight inputs 1–8 must be used. Inputs 9–16 can be used for
other type of events at the same event block.
As basic, 3 event function blocks EV01-EV03 running with a fast loop time (3 ms) is available
in the 670IEDS. The remaining event function blocks EV04-EV09 runs with a loop time on 8
ms and EV10-EV20 runs with a loop time on 100 ms. The event blocks are used to send binary
signals, integers, real time values like analogue data from measuring functions and mA input
modules as well as pulse counter signals.
16 pulse counter value function blocks PC01 to PC16 and 24 mA input service values function
blocks SMMI1_In1 to 6 – SMMI4_In1 to 6 are available in the 670IEDs.
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The first LON address in every event function block is found in table 461
Event masks
The event mask for each input can be set individually from the Parameter Setting Tool (PST)
Under: Settings – > General Settings –> Monitoring –> Event function as.
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, event system itself make the reporting decision, (reporting criteria
for integers has no semantic, prefer to be set by the user)
The following type of signals from application functions can be connected to the event function
block.
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Single indication
Directly connected binary IO signal via binary input function block (SMBI) is always reported
on change, no changed detection is done in the event function block. Other Boolean signals, for
example a start or a trip signal from a protection function is event masked in the event function
block.
Double indications
Double indications can only be reported via switch-control (SCSWI) functions, the event re-
porting is based on information from switch-control, no change detection is done in the event
function block.
Directly connected binary IO signal via binary input function block (SMBI) is not possible to
handle as double indication. Double indications can only be reported for the first 8 inputs on an
event function block.
Analog value
All analog values are reported cyclic, the reporting interval is taken from the connected function
if there is a limit supervised signal, otherwise it is taken from the event function block.
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Command handling
Commands are transferred using transparent SPA-bus messages. The transparent SPA-bus mes-
sage is an explicit LON message, which contains an ASCII character message following the cod-
ing rules of the SPA-bus protocol. The message is sent using explicit messages with message
code 41H and using acknowledged transport service.
Both the SPA-bus command messages (R or W) and the reply messages (D, A or N) are sent
using the same message code. It is mandatory that one device sends out only one SPA-bus mes-
sage at a time to one node and waits for the reply before sending the next message.
For commands from the operator workplace to the IED for apparatus control, i.e. the function
blocks type SCSWI 1 to 32, SXCBR 1 to 18and SXSWI 1 to 28; the SPA addresses are accord-
ing to table 462
Horizontal communication
Network variables are used for communication between REx 5xx and 670IEDs. The supported
network variable type is SNVT_state (NV type 83). SNVT_state is used to communicate the
state of a set of 1 to 16 Boolean values.
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The multiple command send function block (MTxx) is used to pack the information to one value.
This value is transmitted to the receiving node and presented for the application by a multiple
command function block (CMxx). At horizontal communication the input BOUND on the event
function block (MTxx) must be set to 1. There are 10 MT and 60 CM function blocks available.
The MT and CM function blocks are connected using Lon Network Tool (LNT 505). This tool
also defines the service and addressing on LON.
This is an overview description how to configure the network variables for 670IEDs.
LON
en05000718.vsd
Figure 382: Examples connections between MT and CM function blocks in three terminals.
The network variable connections are done from the NV Connection window. From LNT win-
dow select Connections -> NVConnections -> New
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en05000719.vsd
There are two ways of downloading NV connections. Either you use the drag-and-drop method
where you select all nodes in the device window, drag them to the Download area in the bottom
of the program window and drop them there. Or the traditional menu selection, Configuration
-> Download...
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LON communication protocol Chapter 16
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en05000720.vsd
Communication ports
The serial communication module (SLM) is used for SPA or IEC 60870-5-103 and LON com-
munication. This module is a mezzanine module, and can be placed on the Main Processing
Module (NUM). The serial communication module can have connectors for two plastic fiber ca-
bles (snap-in) or two glass fiber cables (ST, bayonet) or a combination of plastic and glass fiber.
Three different types are available depending on type of fiber. The incoming optical fiber is con-
nected to the RX receiver input, and the outgoing optical fiber to the TX transmitter output.
When the fiber optic cables are laid out, pay special attention to the instructions concerning the
handling, connection, etc. of the optical fibers. The module is identified with a number on the
label on the module.
Table 462: SPA addresses for commands from the operator workplace to the IED for ap-
paratus control
Name Function SPA Description
block address
BL_CMD SCSWI01 1 I 5115 SPA parameters for block command
BL_CMD SCSWI02 1 I 5139 SPA parameters for block command
BL_CMD SCSWI02 1 I 5161 SPA parameters for block command
BL_CMD SCSWI04 1 I 5186 SPA parameters for block command
BL_CMD SCSWI05 1 I 5210 SPA parameters for block command
BL_CMD SCSWI06 1 I 5234 SPA parameters for block command
BL_CMD SCSWI07 1 I 5258 SPA parameters for block command
BL_CMD SCSWI08 1 I 5283 SPA parameters for block command
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4.1 Introduction
In this section the most common addresses for commands and events are available. Other ad-
dresses can be found in a separate document, refer to section 1.5 "Related documents".
It is assumed that the reader is familiar with the SPA communication protocol in general.
The master requests slave information using request messages and sends information to the slave
in write messages. Furthermore, the master can send all slaves in common a broadcast message
containing time or other data. The inactive state of bus transmit and receive lines is a logical "1".
SPA protocol
The tables below specify the SPA addresses for reading data from and writing data to an
IED 670 with the SPA communication protocol implemented.
The SPA addresses for the mA input service values (MI03-MI16) are found in table466
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The SPA addresses for the pulse counter values PC01 – PC16 are found in table 467
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I/O modules
To read binary inputs, the SPA-addresses for the outputs of the I/O-module function block are
used, i.e. the addresses for BI1 – BI16. The SPA addresses are found in a separate document,
refer to section 1.5 "Related documents".
The single command function consists of three function blocks; CD01 – CD03 for 16 binary out-
put signals each.
The signals can be individually controlled from the operator station, remote-control gateway, or
from the local HMI on the IED. The SPA addresses for the single command function (CD) are
shown in Table 3. For the single command function block, CD01 to CD03, the address is for the
first output. The other outputs follow consecutively after the first one. For example, output 7 on
the CD02 function block has the 5O533 address.
The SPA addresses for the single command functions CD01 – CD03 are found in table 468
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Function block SPA address CMD Input SPA address CMD output
CD03-Cmd7 4-S-4711 5-O-549
CD03-Cmd8 4-S-4712 5-O-550
CD03-Cmd9 4-S-4713 5-O-551
CD03-Cmd10 4-S-4714 5-O-552
CD03-Cmd11 4-S-4715 5-O-553
CD03-Cmd12 4-S-4716 5-O-554
CD03-Cmd13 4-S-4717 5-O-555
CD03-Cmd14 4-S-4718 5-O-556
CD03-Cmd15 4-S-4719 5-O-557
CD03-Cmd16 4-S-4720 5-O-558
Table 468 SPA addresses for the signals on the single command functions
Figure 385 shows an application example of how the user can, in a simplified way, connect the
command function via the configuration logic circuit in a protection terminal for control of a cir-
cuit breaker.
A pulse via the binary outputs of the terminal normally performs this type of command control.
The SPA addresses to control the outputs OUT1 – OUT16 in CD01 are shown in table 468
Figure 385: Application example showing a simplified logic diagram for control of a circuit
breaker.
The MODE input defines if the output signals from CD01 shall be off, steady or pulsed signals.
This is set in Parameter Setting Tool (PST) under: Setting – > General Settings – > Control – >
Commands – > Single Command.
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Event function
This event function is intended to send time-tagged events to the station level (e.g. operator
workplace) over the station bus. The events are there presented in an event list. The events can
be created from both internal logical signals and binary input channels. All must The internal
signals are time tagged in the main processing module, while the binary input channels are time
tagged directly on each I/O module. The events are produced according to the set event masks.
The event masks are treated commonly for both the LON and SPA channels. All events accord-
ing to the event mask are stored in a buffer, which contains up to 1000 events. If new events
appear before the oldest event in the buffer is read, the oldest event is overwritten and an over-
flow alarm appears.
Two special signals for event registration purposes are available in the terminal, Terminal Re-
started (0E50) and Event buffer overflow (0E51).
The input parameters can be set individually from the Parameter Setting Tool (PST) under: Set-
ting –> General Setting – > Monitoring – > Event Function as.
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, event system itself make the reporting decision, (reporting criteria
for integers has no semantic, prefer to be set by the user)
The Status and event codes for the Event functions are found in table 469
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1) These values are only applicable if the Event mask is masked ≠ OFF.
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Note that corresponding Event mask must be set to an applicable value via the Parameter Setting
Tool (PST), under: Settings – > General Settings – > Monitoring – > Event Function as.
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, event system itself make the reporting decision, (reporting criteria
for integers has no semantic, prefer to be set by the user)
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The incoming optical fiber is connected to the RX receiver input, and the outgoing optical fiber
to the TX transmitter output. When the fiber optic cables are laid out, pay special attention to the
instructions concerning the handling, connection, etc. of the optical fibers. The module is iden-
tified with a number on the label on the module.
The procedure to set the transfer rate and slave number can be found in the Installation and com-
missioning manual for respective IED.
4.3 Design
When communicating locally with a Personal Computer (PC) in the station, using the rear SPA
port, the only hardware needed for a station monitoring system is:
• Optical fibres
• Opto/electrical converter for the PC
• PC
When communicating remotely with a PC using the rear SPA port, the same hardware is needed
plus telephone modems.
The software needed in the PC, either local or remote, is PCM 600.
When communicating between the LHMI and a PC, the only hardware required is a front-con-
nection cable.
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5.1 Introduction
The IEC 60870-5-103 communication protocol is mainly used when a protection terminal com-
municates with a third party control or monitoring system. This system must have software that
can interpret the IEC 60870-5-103 communication messages.
• Event handling
• Report of analog service values (measurements)
• Fault location
• Command handling
- Autorecloser ON/OFF
- Teleprotection ON/OFF
- Protection ON/OFF
- LED reset
- Characteristics 1 - 4 (Setting groups)
• File transfer (disturbance files)
• Time synchronization
For detailed information about IEC 60870-5-103, refer to the IEC60870 standard part 5: Trans-
mission protocols, and to the section 103: Companion standard for the informative interface of
protection equipment.
IEC 60870-5-103
The tables in the following sections specify the information types supported by the IED 670
products with the communication protocol IEC 60870-5-103 implemented.
To support the information, corresponding functions must be included in the protection and con-
trol IED.
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Number of instances: 1
Number of instances: 1
Number of instances: 4
FUNCTION TYPE parameter for each block in private range. Default values are defined in
private range 1 - 4. One for each instance.
INFORMATION NUMBER is required for each output signal. Default values are 1 - 8.
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Status
Number of instances: 1
Number of instances: 20
FUNCTION TYPE parameter for each block in private range. Default values are defined in pri-
vate range 5 - 24. One for each instance.
INFORMATION NUMBER is required for each input signal. Default values are defined in
range 1 - 8
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Number of instances: 1
Number of instances: 1
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Number of instances: 1
The instance type is suitable for linediff, transformerdiff, overcurrent and earthfault protection
functions.
Number of instances: 1
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Number of instances: 1
Measurands
Function blocks in monitor direction for input measurands. Typically connected to monitoring
function, for example to power measurement CVMMXU.
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The IED will report all valid measuring types depending on connected signals.
Upper limit for measured currents, active/reactive-power is 2.4 times rated value.
Upper limit for measured voltages and frequency is 1.2 times rated value.
FUNCTION TYPE parameter for each block in private range. Default values are defined in pri-
vate range 25 – 27. One for each instance.
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Disturbance recordings
The following elements are used in the ASDUs (Application Service Data Units) defined in the
standard.
Analog signals, 40-channels: the channel number for each channel has to be specified. Channels
used in the public range are 1 to 8 and with:
Channel number used for the remaining 32 analog signals are numbers in the private range
64 to 95.
Binary signals, 96-channels: for each channel the user can specify a FUNCTION TYPE and an
INFORMATION NUMBER.
Disturbance Upload
All analog and binary signals that are recorded with disturbance recorder will be reported to the
master. The last eight disturbances that are recorded are available for transfer to the master. A
successfully transferred disturbance (acknowledged by the master) will not be reported to the
master again.
When a new disturbance is recorded by the IED a list of available recorded disturbances will be
sent to the master, an updated list of available disturbances will be sent whenever something has
happened to disturbances in this list. I.e. when a disturbance is deleted (by other client e.g. SPA)
or when a new disturbance has been recorded or when the master has uploaded a disturbance.
Information sent in the disturbance upload is specified by the standard; however, some of the
information are adapted to information available in disturbance recorder in Rex67x.
This section describes all data that is not exactly as specified in the standard.
ASDU23
In ‘list of recorded disturbances’ (ASDU23) an information element named SOF (status of fault)
exists. This information element consists of 4 bits and indicates whether:
• Bit TP: the protection equipment has tripped during the fault
• Bit TM: the disturbance data are currently being transmitted
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• Bit TEST: the disturbance data have been recorded during normal operation or
test mode.
• Bit OTEV: the disturbance data recording has been initiated by another event
than start/pick-up
The only information that is easily available is test-mode status. The other information is always
set (hard coded) to:
Another information element in ASDU23 is the FAN (fault number). According to the standard
this is a number that is incremented when a protection function takes action. In Rex67x FAN is
equal to disturbance number, which is incremented for each disturbance.
ASDU26
When a disturbance has been selected by the master; (by sending ASDU24), the protection
equipment answers by sending ASDU26, which contains an information element named NOF
(number of grid faults). This number should indicate fault number in the power system, i.e. a
fault in the power system with several trip and auto-reclosing has the same NOF (while the FAN
should be incremented). NOF is in Rex67x, just as FAN, equal to disturbance number.
To get INF and FUN for the recorded binary signals there are parameters on the disturbance re-
corder for each input. The user must set these parameters to whatever he connects to the corre-
sponding input.
Supported
Electrical Interface
EIA RS-485 No
number of loads No
Optical interface
glass fibre Yes
plastic fibre Yes
Transmission speed
96000 bit/s Yes
19200 bit/s Yes
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Supported
Link Layer
DFC-bit used Yes
Connectors
connector F-SMA No
connector BFOC/2.5 Yes
Supported
Selection of standard ASDUs in monitoring direction
ASDU Yes
1 Time-tagged message Yes
2 Time-tagged message with rel. time Yes
3 Measurands I Yes
4 Time-tagged message with rel. time Yes
5 Identification Yes
6 Time synchronization Yes
8 End of general interrogation Yes
9 Measurands II Yes
10 Generic data No
11 Generic identification No
23 List of recorded disturbances Yes
26 Ready for transm. of disturbance data Yes
27 Ready for transm. of a channel Yes
28 Ready for transm of tags Yes
29 Transmission of tags Yes
30 Transmission fo disturbance data Yes
31 End of transmission Yes
Selection of standard ASDUs in control direction
ASDU Yes
6 Time synchronization Yes
7 General interrogation Yes
10 Generic data No
20 General command Yes
21 Generic command No
24 Order for disturbance data transmission Yes
25 Acknowledgement for distance data transmission Yes
Selection of basic application functions
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Supported
Test mode No
Blocking of monitoring direction Yes
Disturbance data Yes
Private data Yes
Generic services No
The incoming optical fiber is connected to the RX receiver input, and the outgoing optical fiber
to the TX transmitter output. When the fiber optic cables are laid out, pay special attention to the
instructions concerning the handling, connection, etc. of the optical fibers. The module is iden-
tified with a number on the label on the module.
ICMA-
I103IEDCMD
BLOCK 19-LEDRS
23-GRP1
24-GRP2
25-GRP3
26-GRP4
en05000689.vsd
ICMD-
I103CMD
BLOCK 16-AR
17-DIFF
18-PROT
en05000684.vsd
ICM1-
I103UserCMD
BLOCK OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
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IEV1-
I103IED
BLOCK
19_LEDRS
23_GRP1
24_GRP2
25_GRP3
26_GRP4
21_TESTM
en05000688.vsd
IS01-
I103UsrDef
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
en05000694.vsd
ISU1-
I103Superv
BLOCK
32_MEASI
33_MEASU
37_IBKUP
38_VTFF
46_GRWA
47_GRAL
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ISEF-
I103EF
BLOCK
51_EFFW
52_EFREV
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IZ01-
I103FltDis
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
78_ZONE1
79_ZONE2
80_ZONE3
81_ZONE4
82_ZONE5
76_TRANS
77_RECEV
73_SCL
FLTLOC
ARINPROG
en05000686.vsd
IFL1-
I103FltStd
BLOCK
64_STL1
65_STL2
66_STL3
67_STIN
84_STGEN
69_TRL1
70_TRL2
71_TRL3
68_TRGEN
74_FW
75_REV
85_BFP
86_MTRL1
87_MTRL2
88_MTRL3
89_MTRN
90_IOC
91_IOC
92_IEF
93_IEF
ARINPROG
en05000687.vsd
IAR1-
I103AR
BLOCK
16_ARACT
128_CBON
130_UNSU
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IMM1-
I103Meas
BLOCK
I_A
I_B
I_C
IN
UL1
UL2
UL3
UL1L2
UN
P
Q
F
FUNTYPE
en05000690_ansi.vsd
IMU1-
I103MeasUsr
BLOCK
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
en05000691.vsd
Table 475: Input signals for the I103IEDCMD (ICMA-) function block
Signal Description
BLOCK Block of commands
Table 476: Input signals for the I103CMD (ICMD-) function block
Signal Description
BLOCK Block of commands
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Table 477: Input signals for the I103IED (IEV1-) function block
Signal Description
BLOCK Block of status reporting
19_LEDRS Information number 19, reset LEDs
23_GRP1 Information number 23, setting group 1 is active
24_GRP2 Information number 24, setting group 2 is active
25_GRP3 Information number 25, setting group 3 is active
26_GRP4 Information number 26, setting group 4 is active
21_TESTM Information number 21, test mode is active
Table 478: Input signals for the I103UserCMD (ICM1-) function block
Signal Description
BLOCK Block of commands
Table 479: Input signals for the I103UsrDef (IS01-) function block
Signal Description
BLOCK Block of status reporting
INPUT1 Binary signal Input 1
INPUT2 Binary signal input 2
INPUT3 Binary signal input 3
INPUT4 Binary signal input 4
INPUT5 Binary signal input 5
INPUT6 Binary signal input 6
INPUT7 Binary signal input 7
INPUT8 Binary signal input 8
Table 480: Input signals for the I103Superv (ISU1-) function block
Signal Description
BLOCK Block of status reporting
32_MEASI Information number 32, measurand supervision of I
33_MEASU Information number 33, measurand supervision of U
37_IBKUP Information number 37, I high-high back-up protection
38_VTFF Information number 38, fuse failure VT
46_GRWA Information number 46, group warning
47_GRAL Information number 47, group alarm
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Table 481: Input signals for the I103EF (ISEF-) function block
Signal Description
BLOCK Block of status reporting
51_EFFW Information number 51, earth-fault forward
52_EFREV Information number 52, earth-fault reverse
Table 482: Input signals for the I103FltDis (IZ01-) function block
Signal Description
BLOCK Block of status reporting
64_STL1 Information number 64, start phase L1
65_STL2 Information number 65, start phase L2
66_STL3 Information number 66, start phase L3
67_STIN Information number 67, start residual current IN
84_STGEN Information number 84, start general
69_TRL1 Information number 69, trip phase L1
70_TRL2 Information number 70, trip phase L2
71_TRL3 Information number 71, trip phase L3
68_TRGEN Information number 68, trip general
74_FW Information number 74, forward/line
75_REV Information number 75, reverse/bus
78_ZONE1 Information number 78, zone 1
79_ZONE2 Information number 79, zone 2
80_ZONE3 Information number 79, zone 3
81_ZONE4 Information number 79, zone 4
82_ZONE5 Information number 79, zone 5
76_TRANS Information number 76, signal transmitted
77_RECEV Information number 77, signal recevied
73_SCL Information number 73, fault location in ohm
FLTLOC Faultlocator faultlocation valid (LMBRFLO-CALCMADE)
ARINPROG Autorecloser in progress (SMBRREC- INPROGR)
Table 483: Input signals for the I103FltStd (IFL1-) function block
Signal Description
BLOCK Block of status reporting
64_STL1 Information number 64, start phase L1
65_STL2 Information number 65, start phase L2
66_STL3 Information number 66, start phase L3
67_STIN Information number 67, start residual curent IN
854
IEC 60870-5-103 communication protocol Chapter 16
Station communication
Signal Description
84_STGEN Information number 84, start general
69_TRL1 Information number 69, trip phase L1
70_TRL2 Information number 70, trip phase L2
71_TRL3 Information number 71, trip phase L3
68_TRGEN Information number 68, trip general
74_FW Information number 74, forward/line
75_REV Information number 75, reverse/bus
85_BFP Information number 85, breaker failure
86_MTRL1 Information number 86, trip measuring system phase L1
87_MTRL2 Information number 87, trip measuring system phase L2
88_MTRL3 Information number 88, trip measuring system phase L3
89_MTRN Information number 89, trip measuring system neutral N
90_IOC Information number 90, over current trip, stage low
91_IOC Information number 91, over current trip, stage high
92_IEF Information number 92, earth-fault trip, stage low
93_IEF Information number 93, earth-fault trip, stage high
ARINPROG Autorecloser in progress (SMBRREC- INPROGR)
Table 484: Input signals for the I103MeasUsr (IMU1-) function block
Signal Description
BLOCK Block of service value reporting
INPUT1 Service value for measurement on input 1
INPUT2 Service value for measurement on input 2
INPUT3 Service value for measurement on input 3
INPUT4 Service value for measurement on input 4
INPUT5 Service value for measurement on input 5
INPUT6 Service value for measurement on input 6
INPUT7 Service value for measurement on input 7
INPUT8 Service value for measurement on input 8
INPUT9 Service value for measurement on input 9
855
IEC 60870-5-103 communication protocol Chapter 16
Station communication
Table 485: Input signals for the I103Meas (IMM1-) function block
Signal Description
BLOCK Block of service value reporting
I_A Service value for current phase A
I_B Service value for current phase B
I_C Service value for current phase C
IN Service value for residual current IN
V_A Service value for voltage phase A
V_B Service value for voltage phase B
V_C Service value for voltage phase C
V_AB Service value for voltage phase-phase A-B
V_N Service value for residual voltage VN
P Service value for active power
Q Service value for reactive power
F Service value for system frequency
Table 486: Output signals for the I103IEDCMD (ICMA-) function block
Signal Description
19-LEDRS Information number 19, reset LEDs
23-GRP1 Information number 23, activate setting group 1
24-GRP2 Information number 24, activate setting group 2
25-GRP3 Information number 25, activate setting group 3
26-GRP4 Information number 26, activate setting group 4
Table 487: Output signals for the I103CMD (ICMD-) function block
Signal Description
16-AR Information number 16, block of autorecloser
17-DIFF Information number 17, block of differential protection
18-PROT Information number 18, block of protection
Table 488: Output signals for the I103UserCMD (ICM1-) function block
Signal Description
OUTPUT1 Command output 1
OUTPUT2 Command output 2
OUTPUT3 Command output 3
856
IEC 60870-5-103 communication protocol Chapter 16
Station communication
Signal Description
OUTPUT4 Command output 4
OUTPUT5 Command output 5
OUTPUT6 Command output 6
OUTPUT7 Command output 7
OUTPUT8 Command output 8
857
IEC 60870-5-103 communication protocol Chapter 16
Station communication
858
IEC 60870-5-103 communication protocol Chapter 16
Station communication
859
IEC 60870-5-103 communication protocol Chapter 16
Station communication
Table 500: Basic general settings for the I103Meas (IMM1-) function
Parameter Range Step Default Unit Description
RatedI_A 1 - 99999 1 3000 A Rated current phase A
RatedI_B 1 - 99999 1 3000 A Rated current phase B
RatedI_C 1 - 99999 1 3000 A Rated current phase C
RatedI_N 1 - 99999 1 3000 A Rated residual current IN
RatedV_A 0.05 - 2000.00 0.05 230.00 kV Rated voltage for phase
A
RatedV_B 0.05 - 2000.00 0.05 230.00 kV Rated voltage for phase
B
RatedV_C 0.05 - 2000.00 0.05 230.00 kV Rated voltage for phase
C
RatedV_AB 0.05 - 2000.00 0.05 400.00 kV Rated voltage for
phase-phase A-B
RatedV_N 0.05 - 2000.00 0.05 230.00 kV Rated residual voltage
VN
RatedP 0.00 - 2000.00 0.05 1200.00 MW Rated value for active
power
RatedQ 0.00 - 2000.00 0.05 1200.00 MVA Rated value for reactive
power
RatedF 50.0 - 60.0 10.0 50.0 Hz Rated system frequency
FUNTYPE 1 - 255 1 1 FunT Function type (1-255)
860
Automation bits (AUBI) Chapter 16
Station communication
6.1 Introduction
The AUBI function block (or the automation bits function block) is used within the CAP tool in
order to get into the configuration the commands coming through the DNP3.0 protocol. In this
respect, this function block plays the same role as the BinGOOSEReceive (for IEC61850) or
MultiCmdReceive (for LON).
861
Automation bits (AUBI) Chapter 16
Station communication
ABI1-
AutoBits
BLOCK CMDBIT1
PSTO CMDBIT2
NAME1 CMDBIT3
NAME2 CMDBIT4
NAME3 CMDBIT5
NAME4 CMDBIT6
NAME5 CMDBIT7
NAME6 CMDBIT8
NAME7 CMDBIT9
NAME8 CMDBIT10
NAME9 CMDBIT11
NAME10 CMDBIT12
NAME11 CMDBIT13
NAME12 CMDBIT14
NAME13 CMDBIT15
NAME14 CMDBIT16
NAME15 CMDBIT17
NAME16 CMDBIT18
NAME17 CMDBIT19
NAME18 CMDBIT20
NAME19 CMDBIT21
NAME20 CMDBIT22
NAME21 CMDBIT23
NAME22 CMDBIT24
NAME23 CMDBIT25
NAME24 CMDBIT26
NAME25 CMDBIT27
NAME26 CMDBIT28
NAME27 CMDBIT29
NAME28 CMDBIT30
NAME29 CMDBIT31
NAME30 CMDBIT32
NAME31
NAME32
en06000504.vsd
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Automation bits (AUBI) Chapter 16
Station communication
Table 503: Output signals for the AutoBits (ABI1-) function block
Signal Description
CMDBIT1 Command out bit 1
CMDBIT2 Command out bit 2
CMDBIT3 Command out bit 3
CMDBIT4 Command out bit 4
CMDBIT5 Command out bit 5
CMDBIT6 Command out bit 6
CMDBIT7 Command out bit 7
CMDBIT8 Command out bit 8
CMDBIT9 Command out bit 9
CMDBIT10 Command out bit 10
CMDBIT11 Command out bit 11
CMDBIT12 Command out bit 12
CMDBIT13 Command out bit 13
CMDBIT14 Command out bit 14
CMDBIT15 Command out bit 15
CMDBIT16 Command out bit 16
CMDBIT17 Command out bit 17
CMDBIT18 Command out bit 18
CMDBIT19 Command out bit 19
CMDBIT20 Command out bit 20
CMDBIT21 Command out bit 21
CMDBIT22 Command out bit 22
CMDBIT23 Command out bit 23
CMDBIT24 Command out bit 24
CMDBIT25 Command out bit 25
CMDBIT26 Command out bit 26
CMDBIT27 Command out bit 27
CMDBIT28 Command out bit 28
CMDBIT29 Command out bit 29
CMDBIT30 Command out bit 30
CMDBIT31 Command out bit 31
CMDBIT32 Command out bit 32
863
Automation bits (AUBI) Chapter 16
Station communication
Table 505: Basic general settings for the DNP3 (DNP--) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Disable/Enable Opera-
ON tion
Table 506: Basic general settings for the DNP3Ch1RS485 (DNC1-) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Operation mode
Serial-Mode
BaudRate 300 Bd - 9600 Bd - Baud-rate for serial port
600 Bd
1200 Bd
2400 Bd
4800 Bd
9600 Bd
19200 Bd
WireMode Four-wire - Two-wire - RS485 wire mode
Two-wire
Table 507: Advanced general settings for the DNP3Ch1RS485 (DNC1-) function
Parameter Range Step Default Unit Description
DLinkConfirm Never - Never - Data-link confirm
Sometimes
Always
tDLinkTimeout 0.000 - 60.000 0.001 2.000 s Data-link confirm timeout
in s
DLinkRetries 0 - 255 1 3 - Data-link maximum
retries
tRxToTxMinDel 0.000 - 60.000 0.001 0.000 s Rx to Tx minimum delay
in s
DataBits 5-8 1 8 - Data bits
StopBits 1-2 1 1 - Stop bits
Parity No - Even - Parity
Even
Odd
864
Automation bits (AUBI) Chapter 16
Station communication
Table 508: Basic general settings for the DNP3Ch2TCPIP (DNC2-) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Operation mode
TCP/IP
UDP-Only
TCPIPLisPort 1 - 65535 1 20000 - TCP/IP listen port
UDPPortAccData 1 - 65535 1 20000 - UDP port to accept UDP
datagrams from master
UDPPortInitNUL 1 - 65535 1 20000 - UDP portfor initial NULL
response
UDPPortCliMast 0 - 65535 1 0 - UDP port to remote cli-
ent/master
Table 509: Basic general settings for the DNP3Ch3TCPIP (DNC3-) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Operation mode
TCP/IP
UDP-Only
TCPIPLisPort 1 - 65535 1 20000 - TCP/IP listen port
UDPPortAccData 1 - 65535 1 20000 - UDP port to accept UDP
datagrams from master
UDPPortInitNUL 1 - 65535 1 20000 - UDP port for initial NULL
response
UDPPortCliMast 0 - 65535 1 0 - UDP port to remote cli-
ent/master
865
Automation bits (AUBI) Chapter 16
Station communication
Table 510: Basic general settings for the DNP3Ch4TCPIP (DNC4-) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Operation mode
TCP/IP
UDP-Only
TCPIPLisPort 1 - 65535 1 20000 - TCP/IP listen port
UDPPortAccData 1 - 65535 1 20000 - UDP port to accept UDP
datagrams from master
UDPPortInitNUL 1 - 65535 1 20000 - UDP port for initial NULL
response
UDPPortCliMast 0 - 65535 1 0 - UDP port to remote cli-
ent/master
Table 511: Basic general settings for the DNP3Ch5TCPIP (DNC5-) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Operation mode
TCP/IP
UDP-Only
TCPIPLisPort 1 - 65535 1 20000 - TCP/IP listen port
UDPPortAccData 1 - 65535 1 20000 - UDP port to accept UDP
datagrams from master
UDPPortInitNUL 1 - 65535 1 20000 - UDP port for initial NULL
response
UDPPortCliMast 0 - 65535 1 0 - UDP port to remote cli-
ent/master
Table 512: Basic general settings for the DNP3Mast1RS485 (DNM1-) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Disable/Enable Opera-
ON tion
SlaveAddress 0 - 65519 1 1 - Slave address
MasterAddres 0 - 65519 1 1 - Master address
Obj1DefVar 1:BISingleBit - 1:BISingleBit - Object 1, default variation
2:BIWithStatus
Obj2DefVar 1:BIChWithout- - 3:BIChWithRel- - Object 2, default variation
Time Time
2:BIChWithTime
3:BIChWithRel-
Time
Obj4DefVar 1:DIChWithout- - 3:DIChWithRel- - Object 4, default variation
Time Time
2:DIChWithTime
3:DIChWithRel-
Time
866
Automation bits (AUBI) Chapter 16
Station communication
Table 513: Advanced general settings for the DNP3Mast1RS485 (DNM1-) function
Parameter Range Step Default Unit Description
ValMasterAddr No - Yes - Validate source (master)
Yes address
AddrQueryEnbl No - Yes - Address query enable
Yes
tApplConfTout 0.00 - 60.00 0.01 10.00 s Application layer confim
timeout
ApplMultFrgRes No - Yes - Enable application for
Yes multiple fragment
response
ConfMultFrag No - Yes - Confirm each multiple
Yes fragment
UREnable No - Yes - Unsolicited response
Yes enabled
URSendOnline No - No - Unsolicited response
Yes sends when on-line
867
Automation bits (AUBI) Chapter 16
Station communication
868
Automation bits (AUBI) Chapter 16
Station communication
Table 514: Basic general settings for the DNP3Mast3TCPIP (DNM3-) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Disable/Enable Opera-
ON tion
SlaveAddress 0 - 65519 1 1 - Slave address
MasterAddres 0 - 65519 1 1 - Master address
ValMasterAddr No - Yes - Validate source (master)
Yes address
MasterIP-Addr 0 - 18 1 0.0.0.0 - Master IP-address
MasterIPNetMsk 0 - 18 1 255.255.255.255 - Master IP net mask
Obj1DefVar 1:BISingleBit - 1:BISingleBit - Object 1, default variation
2:BIWithStatus
Obj2DefVar 1:BIChWithout- - 3:BIChWithRel- - Object 2, default variation
Time Time
2:BIChWithTime
3:BIChWithRel-
Time
Obj4DefVar 1:DIChWithout- - 3:DIChWithRel- - Object 4, default variation
Time Time
2:DIChWithTime
3:DIChWithRel-
Time
869
Automation bits (AUBI) Chapter 16
Station communication
Table 515: Advanced general settings for the DNP3Mast3TCPIP (DNM3-) function
Parameter Range Step Default Unit Description
AddrQueryEnbl No - Yes - Address query enable
Yes
tApplConfTout 0.00 - 60.00 0.01 10.00 s Application layer confim
timeout
ApplMultFrgRes No - Yes - Enable application for
Yes multiple fragment
response
ConfMultFrag No - Yes - Confirm each multiple
Yes fragment
UREnable No - Yes - Unsolicited response
Yes enabled
URSendOnline No - No - Unsolicited response
Yes sends when on-line
870
Automation bits (AUBI) Chapter 16
Station communication
871
Automation bits (AUBI) Chapter 16
Station communication
Table 516: Basic general settings for the DNP3Mast4TCPIP (DNM4-) function
Parameter Range Step Default Unit Description
Operation Disabled - Off - Disable/Enable Opera-
ON tion
SlaveAddress 0 - 65519 1 1 - Slave address
MasterAddres 0 - 65519 1 1 - Master address
ValMasterAddr No - Yes - Validate source (master)
Yes address
MasterIP-Addr 0 - 18 1 0.0.0.0 - Master IP-address
MasterIPNetMsk 0 - 18 1 255.255.255.255 - Master IP net mask
Obj1DefVar 1:BISingleBit - 1:BISingleBit - Object 1, default variation
2:BIWithStatus
Obj2DefVar 1:BIChWithout- - 3:BIChWithRel- - Object 2, default variation
Time Time
2:BIChWithTime
3:BIChWithRel-
Time
Obj4DefVar 1:DIChWithout- - 3:DIChWithRel- - Object 4, default variation
Time Time
2:DIChWithTime
3:DIChWithRel-
Time
872
Automation bits (AUBI) Chapter 16
Station communication
Table 517: Advanced general settings for the DNP3Mast4TCPIP (DNM4-) function
Parameter Range Step Default Unit Description
AddrQueryEnbl No - Yes - Address query enable
Yes
tApplConfTout 0.00 - 60.00 0.01 10.00 s Application layer confim
timeout
ApplMultFrgRes No - Yes - Enable application for
Yes multiple fragment
response
ConfMultFrag No - Yes - Confirm each multiple
Yes fragment
UREnable No - Yes - Unsolicited response
Yes enabled
URSendOnline No - No - Unsolicited response
Yes sends when on-line
873
Automation bits (AUBI) Chapter 16
Station communication
874
Automation bits (AUBI) Chapter 16
Station communication
875
Single command, 16 signals (CD) Chapter 16
Station communication
7.1 Introduction
The IEDs can receive commands either from a substation automation system or from the local
human-machine interface, LHMI. The command function block has outputs that can be used, for
example, to control high voltage apparatuses or for other user defined functionality.
The output signals can be of the types Off, Steady, or Pulse. This configuration setting is done
via the LHMI or PCM 600 and is common for the whole function block. The length of the output
pulses are 100 ms. In steady mode the function block has a memory to remember the output val-
ues at power interruption of the IED. Also a BLOCK input is available used to block the updat-
ing of the outputs.
The output signals, here OUT1 to OUT16, are then available for configuration to built-in func-
tions or via the configuration logic circuits to the binary outputs of the IED.
CD01-
SingleCmd
BLOCK OUT1
NAME1 OUT2
NAME2 OUT3
NAME3 OUT4
NAME4 OUT5
NAME5 OUT6
NAME6 OUT7
NAME7 OUT8
NAME8 OUT9
NAME9 OUT10
NAME10 OUT11
NAME11 OUT12
NAME12 OUT13
NAME13 OUT14
NAME14 OUT15
NAME15 OUT16
NAME16
en05000698.vsd
876
Single command, 16 signals (CD) Chapter 16
Station communication
Table 519: Output signals for the SingleCmd (CD01-) function block
Signal Description
OUT1 Single command output 1
OUT2 Single command output 2
OUT3 Single command output 3
OUT4 Single command output 4
OUT5 Single command output 5
OUT6 Single command output 6
OUT7 Single command output 7
OUT8 Single command output 8
OUT9 Single command output 9
OUT10 Single command output 10
OUT11 Single command output 11
OUT12 Single command output 12
OUT13 Single command output 13
OUT14 Single command output 14
OUT15 Single command output 15
OUT16 Single command output 16
877
Multiple command (CM) and Multiple transmit Chapter 16
(MT) Station communication
8.1 Introduction
The IED may be provided with a function to send and receive signals to and from other IEDs via
the interbay bus. The send and receive function blocks has 16 outputs/inputs that can be used,
together with the configuration logic circuits, for control purposes within the IED or via binary
outputs. When it is used to communicate with other IEDs, these IEDs have a corresponding Mul-
tiple transmit function block with 16 outputs to send the information received by the command
block.
Sixteen signals can be connected and they will then be sent to the multiple command block in
the other IED. The connections are set with the LON Network Tool (LNT).
Twelve multiple command function block CM12 with fast execution time and 48 multiple com-
mand function blocks CM13-CM60 with slower execution time are available in the IED 670s.
The multiple command function block has 16 outputs combined in one block, which can be con-
trolled from other IEDs.
The output signals, here OUT1 to OUT16, are then available for configuration to built-in func-
tions or via the configuration logic circuits to the binary outputs of the terminal.
The command function also has a supervision function, which sets the output VALID to 0 if the
block did not receive data within set maximum time.
8.3 Design
8.3.1 General
The output signals can be of the types Off, Steady, or Pulse. The setting is done on the MODE
settings, common for the whole block, from the PCM 600 setting tool.
• 0 = Off sets all outputs to 0, independent of the values sent from the station level,
that is, the operator station or remote-control gateway.
• 1 = Steady sets the outputs to a steady signal 0 or 1, depending on the values sent
from the station level.
• 2 = Pulse gives a pulse with one execution cycle duration, if a value sent from the
station level is changed from 0 to 1. That means that the configured logic con-
nected to the command function blocks may not have a cycle time longer than the
execution cycle time for the command function block.
878
Multiple command (CM) and Multiple transmit Chapter 16
(MT) Station communication
CM01-
MultiCmd
BLOCK ERROR
NEWDATA
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
OUTPUT9
OUTPUT10
OUTPUT11
OUTPUT12
OUTPUT13
OUTPUT14
OUTPUT15
OUTPUT16
VALID
en06000007.vsd
MT01-
MultiTransm
BLOCK ERROR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
en06000008.vsd
879
Multiple command (CM) and Multiple transmit Chapter 16
(MT) Station communication
Table 522: Input signals for the MultiTransm (MT01-) function block
Signal Description
BLOCK Block of function
INPUT1 Input 1
INPUT2 Input 2
INPUT3 Input 3
INPUT4 Input 4
INPUT5 Input 5
INPUT6 Input 6
INPUT7 Input 7
INPUT8 Input 8
INPUT9 Input 9
INPUT10 Input 10
INPUT11 Input 11
INPUT12 Input 12
INPUT13 Input 13
INPUT14 Input 14
INPUT15 Input 15
INPUT16 Input 16
Table 523: Output signals for the MultiCmd (CM01-) function block
Signal Description
ERROR MultiReceive error
NEWDATA New data is received
OUTPUT1 Output 1
OUTPUT2 Output 2
OUTPUT3 Output 3
OUTPUT4 Output 4
OUTPUT5 Output 5
OUTPUT6 Output 6
OUTPUT7 Output 7
OUTPUT8 Output 8
OUTPUT9 Output 9
OUTPUT10 Output 10
OUTPUT11 Output 11
OUTPUT12 Output 12
880
Multiple command (CM) and Multiple transmit Chapter 16
(MT) Station communication
Signal Description
OUTPUT13 Output 13
OUTPUT14 Output 14
OUTPUT15 Output 15
OUTPUT16 Output 16
VALID Output data is valid
Table 524: Output signals for the MultiTransm (MT01-) function block
Signal Description
ERROR MultiSend error
881
Multiple command (CM) and Multiple transmit Chapter 16
(MT) Station communication
882
About this chapter Chapter 17
Remote communication
Chapter 17 Remote
communication
883
Binary signal transfer to remote end Chapter 17
Remote communication
1.1 Introduction
The remote end data communication is used either for the transmission of current values togeth-
er with maximum 8 binary signals in the line differential protection in RED670, or for transmis-
sion of only binary signals, up to 192 signals, in the other 600 series IEDs. The binary signals
are freely configurable and can thus be used for any purpose e.g. communication scheme related
signals, transfer trip and/or other binary signals between IEDs.
Communication between two IEDs requires that each IED is equipped with an LDCMs (Line
Data Communication Module). The LDCMs are then interfaces to a 64 kbit/s communication
channel for duplex communication between the IEDs.
Each IED can be equipped with up to four LDCMs, thus enabling communication with four re-
mote IEDs.
Start Stop
Information CRC
flag flag
884
Binary signal transfer to remote end Chapter 17
Remote communication
The start and stop flags are the 0111 1110 sequence (7E hexadecimal), defined in the HDLC
standard. The CRC is designed according to the standard CRC16 definition. The optional ad-
dress field in the HDLC frame is not used instead a separate addressing is included in the data
field.
The address field is used for checking that the received message originates from the correct
equipment. There is always a risk that multiplexers occasionally mix the messages up. Each ter-
minal in the system is given a number. The terminal is then programmed to accept messages
from a specific terminal number. If the CRC function detects a faulty message, the message is
thrown away and not used in the evaluation.
When the communication is used for line differential purpose, the transmitted data consists of
three currents, clock information, trip-, block- and alarm-signals and eight binary signals which
can be used for any purpose. The three currents are represented as sampled values.
When the communication is used exclusively for binary signals, the full data capacity of the
communication channel is used for the binary signal purpose which gives the capacity of
192 signals.
Note!
The function blocks are not represented in CAP 531 configuration tool. The signals appear only
in the SMT tool when a LDCM is included in the configuration with the function selector tool.
In the SMT tool they can be mapped to the desired virtual input (SMBI) of the IED670 and used
internally in the configuration.
885
Binary signal transfer to remote end Chapter 17
Remote communication
CRM1-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
en07000043.vsd
CRM2-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
en07000044.vsd
CRB1-
LDCMRecBinStat
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGT HERR
CRCERROR
REMCOMF
LOWLEVEL
en05000451.vsd
886
Binary signal transfer to remote end Chapter 17
Remote communication
Table 528: Output signals for the LDCMRecBinStat (CRM2-) function block
Signal Description
COMFAIL Detected error in the differential communication
YBIT Detected error in remote end with incoming message
NOCARR No carrier is detected in the incoming message
NOMESS No start and stop flags identified for the incoming message
ADDRERR Incoming message from a wrong terminal
LNGTHERR Wrong length of the incoming message
CRCERROR Identified error by CRC check in incoming message
TRDELERR Transmission time is longer than permitted
SYNCERR Indicates when echo synchronication is used
REMCOMF Remote terminal indicates problem with received message
REMGPSER Remote terminal indicates problem with GPS synchronization
SUBSTITU Link error, values are substituted
LOWLEVEL Low signal level on the receive link
887
Binary signal transfer to remote end Chapter 17
Remote communication
Table 529: Output signals for the LDCMRecBinStat (CRB1-) function block
Signal Description
COMFAIL Detected error in the differential communication
YBIT Detected error in remote end with incoming message
NOCARR No carrier is detected in the incoming message
NOMESS No start and stop flags identified for the incoming message
ADDRERR Incoming message from a wrong terminal
LNGTHERR Wrong length of the incoming message
CRCERROR Identified error by CRC check in incoming message
REMCOMF Remote terminal indicates problem with received message
LOWLEVEL Low signal level on the receive link
888
Binary signal transfer to remote end Chapter 17
Remote communication
Table 531: Basic general settings for the LDCMRecBinStat (CRM2-) function
Parameter Range Step Default Unit Description
ChannelMode Disabled - ON - Channel mode of LDCM,
ON 0=OFF, 1=ON, 2=OutOf-
OutOfService Service
889
Binary signal transfer to remote end Chapter 17
Remote communication
890
Binary signal transfer to remote end Chapter 17
Remote communication
Table 532: Basic general settings for the LDCMRecBinStat (CRB1-) function
Parameter Range Step Default Unit Description
ChannelMode Disabled - Enabled - Channel mode of LDCM,
Enabled 0=OFF, 1=ON, 2=OutOf-
OutOfService Service
891
Binary signal transfer to remote end Chapter 17
Remote communication
892
About this chapter Chapter 18
Hardware
Chapter 18 Hardware
893
Overview Chapter 18
Hardware
1 Overview
Close
Open
xx04000458_ansi.eps
Close
Open
xx05000762_ansi.eps
894
Overview Chapter 18
Hardware
Close
Open
xx04000460_ansi.eps
895
Overview Chapter 18
Hardware
Table 534: Designations for 3/4 x 19” casing with 1 TRM slot
896
Overview Chapter 18
Hardware
Table 535: Designations for 3/4 x 19” casing with 2 TRM slot
897
Overview Chapter 18
Hardware
Table 536: Designations for 1/1 x 19” casing with 1 TRM slot
Table 537: Designations for 1/1 x 19” casing with 2 TRM slots
898
Overview Chapter 18
Hardware
899
Hardware modules Chapter 18
Hardware
2 Hardware modules
2.1 Overview
Table 538: Basic modules, always included
Module Description
Combined backplane module (CBM) A backplane PCB that carries all internal signals
between modules in an IED. Only the TRM is not con-
nected directly to this board.
Universal backplane module (UBM) A backplane PCB that forms part of the IED backplane
with connectors for TRM, ADM etc.
Power supply module (PSM) Including a regulated DC/DC converter that supplies
auxiliary voltage to all static circuits.
• An internal fail alarm output is available.
Numerical module (NUM) Module for overall application control. All information is
processed or passed through this module, such as
configuration, settings and communication.
Local Human machine interface (LHMI) The module consists of LED:s, an LCD, a push button
keyboard and an ethernet connector used to connect a
PC to the IED.
Transformer input module (TRM) Transformer module that galvanically separates the
internal circuits from the VT and CT circuits. It has 12
analog inputs.
Analog digital conversion module (ADM) Slot mounted PCB with A/D conversion.
900
Hardware modules Chapter 18
Hardware
2.2.2 Functionality
The Compact PCI makes 3.3V or 5V signaling in the backplane possible. The CBM backplane
and connected modules are 5V PCI-compatible.
Some pins on the Compact PCI connector are connected to the CAN bus, to be able to commu-
nicate with CAN based modules.
If a modules self test discovers an error it informs other modules using the Internal Fail signal
IRF.
2.2.3 Design
There are two basic versions of the CBM:
Each PCI connector consists of 2 compact PCI receptacles. The euro connectors are connected
to the CAN bus and used for I/O modules and power supply.
901
Hardware modules Chapter 18
Hardware
1 2
en05000516.vsd
Pos Description
1 CAN slots
2 CPCI slots
1 2
en05000755.vsd
Pos Description
1 CAN slots
2 CPCI slots
902
Hardware modules Chapter 18
Hardware
en05000756.vsd
Pos Description
1 CBM
2.3.2 Functionality
The Universal Backplane Module connects the CT and VT analog signals from the transformer
input module to the analog digital converter module. The Numerical processing module (NUM)
is also connected to the UBM. The ethernet contact on the front panel as well as the internal eth-
ernet contacts are connected to the UBM which provides the signal path to the NUM board.
2.3.3 Design
It connects the Transformer input module (TRM) to the Analog digital conversion module
(ADM) and the Numerical module (NUM).
• for IEDs with two TRM and two ADM. It has four 48 pin euro connectors and
one 96 pin euro connector, see figure 400
• for IEDs with one TRM and one ADM. It has two 48 pin euro connectors and one
96 pin euro connector, see figure 401.
903
Hardware modules Chapter 18
Hardware
The 96 pin euro connector is used to connect the NUM board to the backplane. The 48 pin con-
nectors are used to connect the TRM and ADM.
TRM ADM
NUM
AD Data
X1 X2
X3 X4
RS485
X10 X10
Front Ethernet
LHMI connection
port
Ethernet X5
en05000489.vsd
en05000757.vsd
904
Hardware modules Chapter 18
Hardware
en05000758.vsd
en05000759.vsd
Pos Description
1 UBM
905
Hardware modules Chapter 18
Hardware
2.4.2 Design
There are two types of the power supply module. They are designed for different DC input volt-
age ranges see table 540. The power supply module contains a built-in, self-regulated DC/DC
converter that provides full isolation between the terminal and the external battery system.
Block diagram
Input connector
Power
Filter supply
Backplane connector
Supervision
99000516.vsd
906
Hardware modules Chapter 18
Hardware
For communication with high speed modules, e.g. analog input modules and high speed serial
interfaces, the NUM is equipped with a Compact PCI bus. The NUM is the compact PCI system
card i.e. it controls bus mastering, clock distribution and receives interrupts.
2.5.2 Functionality
The NUM, Numeric processing module is a high performance, standard off-the-shelf com-
pact-PCI CPU module. It is 6U high and occupies one slot. Contact with the backplane is via
two compact PCI connectors and an euro connector.
The NUM has one PMC slot (32-bit IEEE P1386.1 compliant) and two PC-MIP slots onto which
mezzanine cards such as SLM or LDCM can be mounted.
To reduce bus loading of the compact PCI bus in the backplane the NUM has one internal PCI
bus for internal resources and the PMC/PC-MIP slots and external PCI accesses through the
backplane are buffered in a PCI/PCI bridge.
The application code and configuration data are stored in flash memory using a flash file system.
The NUM is equipped with a real time clock. It uses a capacitor for power backup of the real
time clock.
No forced cooling is used on this standard module because of the low power dissipation.
907
Hardware modules Chapter 18
Hardware
Compact
Flash Logic
PMC
connector
PC-MIP
connector
UBM
Memory Ethernet
North
bridge
Backplane
connector
PCI-PCI-
bridge
CPU
en04000473.vsd
908
Hardware modules Chapter 18
Hardware
2.7.2 Design
The transformer module has 12 input transformers. There are several versions of the module,
each with a different combination of voltage and current input transformers.
Basic versions:
The TRM is connected to the ADM and NUM via the UBM.
Configuration of the input and output signals, please refer to section 11.
909
Hardware modules Chapter 18
Hardware
2.8.2 Design
The Analog digital conversion module input signals are voltage and current from the transformer
module. Shunts are used to adapt the current signals to the electronic voltage level. To gain dy-
namic range for the current inputs, two shunts with separate A\D channels are used for each in-
put current. In this way a 20 bit dynamic range is obtained with a 16 bit A\D converter.
Input signals are sampled with a sampling freqency of 5 kHz at 50 Hz system frequency and 6
kHz at 60 Hz system frequency.
The A\D converted signals goes through a filter with a cut off frequency of 500 Hz and are re-
ported to the numerical module (NUM) with 1 kHz at 50 Hz system frequency and 1,2 kHz at
60 Hz system frequency.
910
Hardware modules Chapter 18
Hardware
Channel 1
AD1 Channel 2
Channel 3
Channel 4
AD2
Channel 5
1.2v Channel 6
AD3 Channel 7
Channel 8
Channel 9
AD4 Channel 10
Channel 11
Channel 12
PMC
level shift
PC-MIP
2.5v
PCI to PCI
PC-MIP
en05000474.vsd
911
Hardware modules Chapter 18
Hardware
2.9.2 Design
The Binary input module contains 16 optical isolated binary inputs. The voltage level of the bi-
nary input is selected at order.
A signal discriminator detects and blocks oscillating signals. When blocked, a hysteresis func-
tion may be set to release the input at a chosen frequency, making it possible to use the input for
pulse counting. The blocking frequency may also be set.
Figure 406 shows the operating characteristics of the binary inputs of the four voltage levels.
The standard version of binary inputs gives an improved capability to withstand disturbances
and should generally be used when pulse counting is not required.
912
Hardware modules Chapter 18
Hardware
[V]
300
176
144
88
72
38
32
19
18
xx99000517_ansi.vsd
Guaranteed operation
Operation uncertain
No operation
This binary input module communicates with the Numerical module (NUM) via the CAN-bus
on the backplane.
The design of all binary inputs enables the burn off of the oxide of the relay contact connected
to the input, despite the low, steady-state power consumption, which is shown in figure 407 and
408.
913
Hardware modules Chapter 18
Hardware
[mA]
30
1
35 70 [ms]
en07000104.vsd
Figure 407: Approximate binary input inrush current for the standard version of BIM.
[mA]
30
1
3.5 7.0 [ms]
en07000105.vsd
Figure 408: Approximate binary input inrush current for the BIM version with enhanced pulse
counting capabilities.
914
Hardware modules Chapter 18
Hardware
Process connector
Opto isolated input
Backplane connector
Opto isolated input
Process connector
99000503.vsd
915
Hardware modules Chapter 18
Hardware
Table 544: BIM - Binary input module with enhanced pulse counting capabilities
Quantity Rated value Nominal range
Binary inputs 16 -
DC voltage, RL 24/40 V RL ± 20%
48/60 V RL ± 20%
125 V RL ± 20%
220/250 V RL ± 20%
Power consumption
24/40 V max. 0.05 W/input -
48/60 V max. 0.1 W/input
125 V max. 0.2 W/input
220/250 V max. 0.4 W/input
Counter input frequency 10 pulses/s max -
Balanced counter input frequency 40 pulses/s max -
Oscillating signal discriminator Blocking settable 1–40 Hz
Release settable 1–30 Hz
916
Hardware modules Chapter 18
Hardware
2.10.2 Design
The binary output module (BOM) has 24 software supervised output relays. Each pair of relays
have a common power source input to the contacts, see figure 410. This should be considered
when connecting the wiring to the connection terminal on the back of the IED.
The high closing and carrying current capability allows connection directly to breaker trip and
closing coils. If breaking capability is required to manage fail of the breaker auxiliary contacts
normally breaking the trip coil current, a parallel reinforcement is required.
Output module
ANSI_xx00000299.vsd
917
Hardware modules Chapter 18
Hardware
Relay
Relay
Relay
Relay
Relay
Process connector Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Backplane connector
Process connector
Relay Micro-
controller
Relay
Relay
CAN
Relay
Relay Memory
Relay
Relay
99000505.vsd
918
Hardware modules Chapter 18
Hardware
2.11.2 Design
The Static output module (SOM) have 6 normally open (NO) static outputs and 6 electrome-
chanical relay outputs with change over contacts.
• An MCU
• A CAN-driver
• 6 static relays outputs
• 6 electromechanical relay outputs
• A DC/DC converter
• Connectors interfacing
- CAN-bus to backplane CBM
- IO-connectors to binary outputs (2 pcs.)
919
Hardware modules Chapter 18
Hardware
Drive &
Read back
Drive &
Read back
Process connector
Drive &
Read back
Drive &
Read back
Drive &
Read back
MCU
CAN-
driver
Drive &
Read back
Drive &
Read back
Process connector
Backplane connector
DC/DC
Drive &
Read back
Internal_fail_n
Drive & AC_fail_n
Read back RCAN_ID
Sync
Drive &
Read back
Reset
Drive &
Read back
en07000115.vsd
920
Hardware modules Chapter 18
Hardware
921
Hardware modules Chapter 18
Hardware
2.12.2 Design
The binary input/output module is available in two basic versions, one with unprotected contacts
and one with MOV (Metal Oxide Varistor) protected contacts.
Inputs are designed to allow oxide burn-off from connected contacts, and increase the distur-
bance immunity during normal protection operate times. This is achieved with a high peak in-
rush current while having a low steady-state current, see figure 407. Inputs are debounced by
software.
Well defined input high and input low voltages ensures normal operation at battery supply
ground faults, see figure 406.
I/O events are time stamped locally on each module for minimum time deviance and stored by
the event recorder if present.
The binary I/O module, IOM, has eight optically isolated inputs and ten output relays. One of
the outputs has a change-over contact. The nine remaining output contacts are connected in two
groups. One group has five contacts with a common and the other group has four contacts with
a common, to be used as single-output channels, see figure 414.
The binary I/O module also has two high speed output channels where a reed relay is connected
in parallel to the standard output relay.
For configuration of the input and output signals, please refer to section 8 "Signal matrix for bi-
nary inputs (SMBI)" and section 9 "Signal matrix for binary outputs (SMBO)".
Note!
The making capacity of the reed relays are limited.
922
Hardware modules Chapter 18
Hardware
Figure 414: Binary in/out module (IOM), input contacts named XA corresponds to rear posi-
tion X31, X41, etc. and output contacts named XB to rear position X32, X42, etc.
923
Hardware modules Chapter 18
Hardware
Note!
The test voltage across open contact is lower for this version of the binary input/output module.
xx04000069.vsd
924
Hardware modules Chapter 18
Hardware
Table 549: IOM with MOV - contact data (reference standard: IEC 60255-23)
Function or quantity Trip and Signal relays Fast signal relays (parallel reed
relay)
Binary outputs IOM: 10 IOM: 2
Max system voltage 250 V AC, DC 250 V AC, DC
Test voltage across open contact, 250 V rms 250 V DC
1 min
925
Hardware modules Chapter 18
Hardware
The line data communication module is used for binary signal transfer. The module has one op-
tical port with ST connectors see figure 416.
Alternatively there can be used a module with built-in X.21 converter see figure 418
The line data communication module is used for binary signal transfer. Each module has one
optical port, one for each remote end to which the IED communicates.
Alternative cards for Long range (1550 nm single mode), Medium range (1310 nm single mode)
and Short range (900 nm multi mode) are available.
Note!
Class 1 laser product. Take adequate measures to protect the eyes. Never look into the laser
beam.
2.13.2 Design
The LDCM is a PCMIP type II single width format module. The LDCM can be mounted on:
• the ADM
• the NUM
926
Hardware modules Chapter 18
Hardware
ID
ST
16.000
IO-connector
MHz
32,768
MHz
ST
en07000087.vsd
Figure 416: The SR-LDCM layout. PCMIP type II single width format with two PCI connectors
and one I/O ST type connector
X1
C
ADN 2.5V
ID
2841
PCI9054
FPGA TQ176
DS DS
256 FBGA
3904 3904
MAX
3645
3
2
en06000393.vsd
Figure 417: The MR-LDCM and LR-LDCM layout. PCMIP type II single width format with
two PCI connectors and one I/O FC type connector
927
Hardware modules Chapter 18
Hardware
X1
Y2
Y2
Y2
Y2
Y2
Y2
3
Y2
Y2
Y2
en06000518.eps
Figure 418: The LDCM with built-in X.21 converter layout. PCMIP type II single width format
with two PCI connectors and one D.15 connector
928
Hardware modules Chapter 18
Hardware
2.14.2 Design
The SLM is a PMC card and it is factory mounted as a mezzanine card on the NUM module.
Three variants of the SLM is available with different combinations of optical fiber connectors,
see figure 419. The plastic fiber connectors are of snap-in type and the glass fiber connectors are
of ST type.
929
Hardware modules Chapter 18
Hardware
930
Hardware modules Chapter 18
Hardware
1 Receiver, LON
2 Transmitter, LON
3 Receiver, SPA/IEC 60870-5-103
4 Transmitter, SPA/IEC 60870-5-103
931
Hardware modules Chapter 18
Hardware
2.15.2 Design
The RS485 is a PMC card and it is factory mounted as a mezzanine card on the NUM module.
The internal structure of the RS485 can be seen in figure 421:
FPGA
32 MHz
Wishbone interconnect switch
Tx
PCI-con
Isolation
Internal UART RS485 6-pole-connector
bus tranceiver
PCI-bus Rx
Local bus Isolation
PCI-
to
Controller
wishbone
PCI-con
Isolation
Status
Register Termination
connector
Info
2-pole
Register
Control
ID-chip
Register Isolated Soft
DC/DC ground
932
Hardware modules Chapter 18
Hardware
Angle
bracket
Screw
1
terminal
X3 2
1
2 RS485
3 PWB
Screw
4
terminal
5
X1
6
Backplane
• Soft grounded: The IO is connected to the GND with an RC net parallel with a
MOV
933
Hardware modules Chapter 18
Hardware
2.16.2 Functionality
The Optical Ethernet module (OEM) is used when communication systems according to
IEC61850–8–1 have been implemented.
2.16.3 Design
The Optical Ethernet module (OEM) is a PMC card and mounted as a mezzanine card on the
ADM. The OEM is a 100base Fx module and available as a single channel or double channel
unit.
100Base-FX
Transmitter
ID chip ST fiber optic
Ethernet Controller
connectors
100Base-FX
EEPROM
IO - bus Connector Receiver
en04000472.vsd
934
Hardware modules Chapter 18
Hardware
ID chip
Receiver
IO bus
LED
Ethernet cont.
25MHz oscillator
Transmitter
Receiver
PCI bus
LED
Ethernet cont. PCI to PCI
bridge
25MHz oscillator
Transmitter
en05000472.vsd
2.17.2 Design
The Milliampere Input Module has six independent analog channels with separated protection,
filtering, reference, A/D-conversion and optical isolation for each input making them galvani-
cally isolated from each other and from the rest of the module.
The analog inputs measure DC current in the range of +/- 20 mA. The A/D converter has a digital
filter with selectable filter frequency. All inputs are calibrated separately The filter parameters
and the calibration factors are stored in a non-volatile memory on the module.
935
Hardware modules Chapter 18
Hardware
The calibration circuitry monitors the module temperature and starts an automatical calibration
procedure if the temperature drift is outside the allowed range. The module communicates, like
the other I/O-modules on the serial CAN-bus.
Backplane connector
A/D Converter Opto-
Protection isolation
& filter
Volt-ref DC/DC
CAN
Memory Micro-
controller
99000504.vsd
936
Hardware modules Chapter 18
Hardware
2.18.2 Design
The GPS time synchronization module is 6U high and occupies one slot. The slot closest to the
NUM shall always be used.
The CCM is a carrier board for the GCM mezzanine PMC card and GPS unit, see figure 427.
There is a cable between the external antenna input on the back of the GCM and the GPS-receiv-
er. This is a galvanic connection vulnerable to electro-magnetic interference. The connector is
shielded and directly attached to a grounded plate to reduce the risk. The second cable is a flat
cable that connects the GPS and the GCM. It is used for communication between the GCM and
the GPS-receiver. All communication between the GCM and the NUM is via the CAN-bus.
The CMPPS signal is sent from the GCM to the rest of the time system to provide 1μs accuracy
at sampling level.
937
Hardware modules Chapter 18
Hardware
PMC
GPS GPS clock
GPS antenna
receiver module
CMPPS
Backplane CAN
CAN
connector
controller CAN
en05000675.vsd
938
Hardware modules Chapter 18
Hardware
en07000086.vsd
1 GPS receiver
2 GPS Clock module (GCM)
3 CAN carrier module (CCM)
4 Antenna connector
Figure 427: A CCM with the GCM and GPS mounted with cables
939
Hardware modules Chapter 18
Hardware
2.19.2 Design
The antenna with a console for mounting on a horizontal or vertical flat surface or on an antenna
mast. See figure 428
940
Hardware modules Chapter 18
Hardware
1 6
4 7
xx04000155.vsd
where:
1 GPS antenna
2 TNC connector
3 Console, (2'6.7"x4'11')
4 Mounting holes about 1/5"
5 Tab for securing of antenna cable
6 Vertical mounting position
7 Horizontal mounting position
Always position the antenna and its console so that a continuous clear line-of-sight visibility to
all directions is obtained, preferably more than 75%. A minimum of 50% clear line-of-sight vis-
ibility is required for un-interrupted operation.
941
Hardware modules Chapter 18
Hardware
99001046.vsd
Antenna cable
Use a 50 ohm coaxial cable with a male TNC connector in the antenna end and a male SMA
connector in the receiver end to connect the antenna to GSM. Choose cable type and length so
that the total attenuation is max. 26 dB at 1.6 GHz.
Note!
Make sure that the antenna cable is not charged when connected to the antenna or to the receiver.
Short-circuit the end of the antenna cable with some metal device, when first connected to the
antenna. When the antenna is connected to the cable, connect the cable to the receiver. REx670
must be switched off when the antenna cable is connected.
942
Hardware modules Chapter 18
Hardware
2.20.2 Design
The IRIG-B module have two inputs. One input is for the IRIG-B that can handle both a
pulse-width modulated signal (also called unmodulated) and an amplitude modulated signal (al-
so called sine wave modulated). The other is an optical input type ST for PPS to synchronize the
time between several protections.
32 MHz FPGA
connector
PCI-con
OPTO_INPUT
ST-
PCI-bus
Registers
PCI-Controller
PCI-con
4 mm barrier
IRIG- IRIG_INPUT
connector
Amplitude
ID-chip Decoder
BNC-
modulator
Capture1 Isolated
ZXING
receiver
Zero-cross
Capture2 detector
MPPS
IO-con
PPS
TSU Isolated
DC/DC
CMPPS 5 to +- 12V
en06000303.vsd
Figure 430: IRIG-B block diagram
943
Hardware modules Chapter 18
Hardware
A1
DC//DC
ST
C
Y2
C
C
A1
C
O
T
3
2
O
en06000304.vsd
Figure 431: IRIG-B PC-MIP board with top left ST connector for PPS 820 nm multimode fibre
optic signal input and lower left BNC connector for IRIG-B signal input
944
Dimensions Chapter 18
Hardware
3 Dimensions
K
E
D F
C G J
B
H
xx04000448.vsd
xx04000464.vsd
Figure 432: Case without rear cover Figure 433: Case without rear cover with 19” rack
mounting kit
Case size A B C D E F G H J K
(inches)
6U, 1/2 x 19” 10.47 8.81 7.92 9.96 8.10 7.50 8.02 - 7.39 -
6U, 3/4 x 19” 10.47 13.23 7.92 9.96 12.52 7.50 12.44 - 7.39 -
6U, 1/1 x 19” 10.47 17.65 7.92 9.96 16.94 7.50 16.86 18.31 7.39 19.00
The H and K dimensions are defined by the 19” rack mounting kit
945
Dimensions Chapter 18
Hardware
D F
J
G
B H xx05000502.vsd
C
xx05000501.vsd
xx05000503.vsd
Case size A B C D E F G H J K
(mm)
6U, 1/2 x 19” 265.9 223.7 242.1 255.8 205.7 190.5 203.7 - 228.6 -
6U, 3/4 x 19” 265.9 336.0 242.1 255.8 318.0 190.5 316.0 - 228.6 -
6U, 1/1 x 19” 265.9 448.3 242.1 255.8 430.3 190.5 428.3 465.1 228.6 482.6
The H and K dimensions are defined by the 19” rack mounting kit.
946
Dimensions Chapter 18
Hardware
Case size A B C D E F G H J K
(inches)
6U, 1/2 x 19” 10.47 8.81 9.53 10.07 8.10 7.50 8.02 - 9.00 -
6U, 3/4 x 19” 10.47 13.23 9.53 10.07 12.52 7.50 12.4 - 9.00 -
6U, 1/1 x 19” 10.47 17.65 9.53 10.07 16.86 7.50 16.86 18.31 9.00 19.00
The H and K dimensions are defined by the 19” rack mounting kit.
A C
E
D
xx04000465.vsd
947
Dimensions Chapter 18
Hardware
xx06000182.vsd
Figure 438: A 1/2 x 19” size IED 670 side-by-side with RHGS6.
948
Dimensions Chapter 18
Hardware
D
B
E
F
C
xx05000505.vsd
Case size A B C D E F G
(inches)
±0.04 ±0.04 ±0.04 ±0.04 ±0.04 ±0.04 ±0.04
Tolerance
6U, 1/2 x 19” 8.42 10.21 9.46 7.50 1.35 0.52 0.25 diam
6U, 3/4 x 19” 12.85 10.21 13.89 7.50 1.35 0.52 0.25 diam
6U, 1/1 x 19” 17.27 10.21 18.31 7.50 1.35 0.52 0.25 diam
949
Dimensions Chapter 18
Hardware
B
E
C
D
en04000471.vsd
950
Dimensions Chapter 18
Hardware
[1.48]
[6.97]
[4.02]
Dimension
mm [inches] xx06000232.eps
[7.50]
en06000234.eps
[inches]
Figure 442: Dimension drawing of a three phase high impedance resistor unit
951
Mounting alternatives Chapter 18
Hardware
4 Mounting alternatives
The flush mounting kit are utilized for IEDs of sizes: 1/2 x 19”, 3/4 x 19” and 1/1 x 19” and are
also suitable for mounting of RHGS6, 6U 1/4 x 19” cases.
Note!
Flush mounting cannot be used for side-by-side mounted IEDs when IP54 class must be ful-
filled. Only IP20 class can be obtained when mounting two cases side-by-side in one (1) cut-out.
Note!
To obtain IP54 class protection, an additional factory mounted sealing must be ordered when
ordering the IED.
952
Mounting alternatives Chapter 18
Hardware
1
7
2
6
5
3
xx06000246.vsd
953
Mounting alternatives Chapter 18
Hardware
Note!
Please note that the separately ordered rack mounting kit for side-by-side mounted IEDs, or
IEDs together with RHGS cases, is to be selected so that the total size equals 19”.
Note!
When mounting the mounting angles, be sure to use screws that follows the recommended di-
mensions. Using screws with other dimensions than the original may damage the PCBs inside
the IED.
954
Mounting alternatives Chapter 18
Hardware
1a
1b
xx04000452.vsd
Note!
When mounting the side plates, be sure to use screws that follows the recommended dimensions.
Using screws with other dimensions than the original may damage the PCBs inside the IED.
955
Mounting alternatives Chapter 18
Hardware
3
4
2
6
xx04000453.vsd
To reach the rear side of the IED, a free space of 3.2 inches is required on the unhinged side.
956
Mounting alternatives Chapter 18
Hardware
3
1
3.2" 2
(80 mm)
ANSI_en06000135.vsd
Figure 446: How to reach the connectors on the rear side of the IED.
Note!
When mounting the plates and the angles on the IED, be sure to use screws that follows the rec-
ommended dimensions. Using screws with other dimensions than the original may damage the
PCBs inside the IED.
957
Mounting alternatives Chapter 18
Hardware
2
1
xx04000456.vsd
958
Mounting alternatives Chapter 18
Hardware
1 2
1 2 1 2
1 1 1 1
2 2 2 2
3 3 3 3
4 4 4 4
5 5 5 5
6 6 6 6
7 7 7 7
8 8 8 8
xx06000180.vsd
Figure 448: IED 670 (1/2 x 19”) mounted with a RHGS6 case containing a test switch module
equipped with only a test switch and a RX2 terminal base.
Note!
With side-by-side flush mounting installation, only IP class 20 is obtained. To reach IP class 54,
it is recommended to mount the IEDs separately. For cut out dimensions of separately mounted
IEDs, see section 4.1 "Flush mounting" on page 952.
Note!
When mounting the plates and the angles on the IED, be sure to use screws that follows the rec-
ommended dimensions. Using screws with other dimensions than the original may damage the
PCBs inside the IED.
Note!
Please contact factory for special add on plates for mounting FT switches on the side (for 1/2
19" case) or bottom of the relay.
959
Mounting alternatives Chapter 18
Hardware
1 2
xx06000181.vsd
Figure 449: Side-by-side flush mounting details (RHGS6 side-by-side with 1/2 x 19” IED).
960
Technical data Chapter 18
Hardware
5 Technical data
5.1 Enclosure
Table 560: Case
Material Steel sheet
Front plate Steel sheet profile with cut-out for HMI
Surface treatment Aluzink preplated steel
Finish Light grey (RAL 7035)
Table 561: Water and dust protection level according to IEC 60529
Front IP40 (IP54 with sealing strip)
Rear, sides, top and bot- IP20
tom
961
Technical data Chapter 18
Hardware
Note!
Because of limitations of space, when ring lug terminal is ordered for Binary I/O connections,
one blank slot is necessary between two adjacent IO cards. Please refer to the ordering particu-
lars for details.
962
Technical data Chapter 18
Hardware
Power frequency magnetic field test 1000 A/m, 3 s IEC 61000-4-8, Class V
Radiated electromagnetic field distur- 20 V/m, 80-1000 MHz IEC 60255-22-3
bance
Radiated electromagnetic field distur- 20 V/m, 80-2500 MHz EN 61000-4-3
bance
Radiated electromagnetic field distur- 35 V/m IEEE/ANSI C37.90.2
bance 26-1000 MHz
Conducted electromagnetic field dis- 10 V, 0.15-80 MHz IEC 60255-22-6
turbance
Radiated emission 30-1000 MHz IEC 60255-25
Conducted emission 0.15-30 MHz IEC 60255-25
963
Technical data Chapter 18
Hardware
964
About this chapter Chapter 19
Labels
Chapter 19 Labels
965
Different labels Chapter 19
Labels
1 Different labels
2
3
6
6 5
7
xx06000574.eps
966
Different labels Chapter 19
Labels
967
Different labels Chapter 19
Labels
4
en06000573.eps
1 Warning label
2 Caution label
3 Class 1 laser product label
4 Warning label
968
Chapter 20
Connection diagrams
Chapter 20 Connection
diagrams
This chapter includes diagrams of the IED with all slot, terminal block and optical connector
designations. It is a necessary guide when making electrical and optical connections to the IED.
969
Chapter 20
Connection diagrams
970
Chapter 20
Connection diagrams
971
Chapter 20
Connection diagrams
972
Chapter 20
Connection diagrams
973
Chapter 20
Connection diagrams
974
Chapter 20
Connection diagrams
975
Chapter 20
Connection diagrams
976
Chapter 20
Connection diagrams
977
Chapter 20
Connection diagrams
978
Chapter 20
Connection diagrams
979
Chapter 20
Connection diagrams
980
Chapter 20
Connection diagrams
981
Chapter 20
Connection diagrams
982
Chapter 20
Connection diagrams
983
Chapter 20
Connection diagrams
984
About this chapter Chapter 21
Time inverse characteristics
985
Application Chapter 21
Time inverse characteristics
1 Application
In order to assure time selectivity between different overcurrent protections in different points
in the network different time delays for the different relays are normally used. The simplest way
to do this is to use definite time delay. In more sophisticated applications current dependent time
characteristics are used. Both alternatives are shown in a simple application with three overcur-
rent protections connected in series.
xx05000129_ansi.vsd
Stage 3
Time
Stage 2 Stage 2
Fault point
position
en05000130.vsd
986
Application Chapter 21
Time inverse characteristics
Time
Fault point
position
en05000131.vsd
The inverse time characteristic makes it possible to minimize the fault clearance time and still
assure the selectivity between protections.
To assure selectivity between protections there must be a time margin between the operation
time of the protections. This required time margin is dependent of following factors, in a simple
case with two protections in series:
987
Application Chapter 21
Time inverse characteristics
A1 B1
Feeder
51 51
Time axis
en05000132_ansi.vsd
where:
t=0 is The fault occurs
t=t1 is Protection B1 trips
t=t2 is Breaker at B1 opens
t=t3 is Protection A1 resets
In the case protection B1 shall operate without any intentional delay (instantaneous). When the
fault occurs the protections pickup to detect the fault current. After the time t1 the protection B1
send a trip signal to the circuit breaker. The protection A1 starts its delay timer at the same time,
with some deviation in time due to differences between the two protections. There is a possibility
that A1 will start before the trip is sent to the B1 circuit breaker.
At the time t2 the circuit breaker B1 has opened its primary contacts and thus the fault current is
interrupted. The breaker time (t2 - t1) can differ between different faults. The maximum opening
time can be given from manuals and test protocols. Still at t2 the timer of protection A1 is active.
In most applications it is required that the delay times shall reset as fast as possible when the
current fed to the protection drops below the set current level, the reset time shall be minimized.
In some applications it is however beneficial to have some type of delayed reset time of the over-
current function. This can be the case in the following applications:
• If there is a risk of intermittent faults. If the current relay, close to the faults, picks
up and resets there is a risk of unselective trip from other protections in the sys-
tem.
• Delayed resetting could give accelerated fault clearance in case of automatic re-
closing to a permanent fault.
988
Application Chapter 21
Time inverse characteristics
• Overcurrent protection functions are sometimes used as release criterion for other
protection functions. It can often be valuable to have a reset delay to assure the
release function.
989
Principle of operation Chapter 21
Time inverse characteristics
2 Principle of operation
If current in any phase exceeds the set pickup current value (here internal signal pickupValue),
a timer, according to the selected operate mode, is started. The component always uses the max-
imum of the three phase current values as the current level used in timing calculations.
In case of definite time the timer will run constantly until the trip time is reached or until the
current drops below the reset value (pickup value minus the hysteresis) and the reset time has
elapsed.
For definite time delay curve index no 5 (ANSI/IEEE Definite time) or 15 (IEC Definite time)
are chosen.
The general expression for inverse time curves is according to equation 119.
⎛ ⎞
⎜ ⎟
t [s ] = ⎜ + B ⎟ ⋅ td
A
⎜ ⎟
⎜⎜ ⎛⎜ ⎞
P
i
⎟ −C ⎟⎟
⎝ ⎝ Pickupn ⎠ ⎠
(Equation 119)
where:
p, A, B, C are constants defined for each curve type,
Pickupn is the set pickup current for step n,
td is set time multiplier for step n and
i is the measured current.
For inverse time characteristics a time will be initiated when the current reaches the set pickup
level. From the general expression of the characteristic the following can be seen:
990
Principle of operation Chapter 21
Time inverse characteristics
⎛⎛ P
⎞
( t op − B ⋅ td ) ⋅ ⎜⎜
i ⎞
⎟
⎜ ⎝ Pickupn ⎠
− C ⎟ = A ⋅ td
⎟
⎝ ⎠
(Equation 120)
where:
top is the operation time of the protection
The time elapsed to the moment of trip is reached when the integral fulfils according to
equation 121, in addition to the constant time delay:
⎛⎛
t
⎞
P
⎞
∫
i
⎜⎜ ⎟ − C ⎟ ⋅ dt ≥ A ⋅ td
⎜ ⎝ Pickupn ⎠ ⎟
0⎝ ⎠
(Equation 121)
For the numerical protection the sum below must fulfil the equation for trip.
n ⎛ ⎛ i ( j ) ⎞P ⎞
Δt ⋅ ∑ ⎜⎜
⎜ Pickupn ⎠
j =1 ⎝ ⎝
⎟ − C ⎟ ≥ A ⋅ td
⎟
⎠
(Equation 122)
where:
j=1 is the first protection execution cycle when a fault has been detected, i.e. when
i
>1
Pickupn
Δt is the time interval between two consecutive executions of the protection algorithm,
n is the number of the execution of the algorithm when the trip time equation is fulfilled, i.e.
when a trip is given and
i (j) is the fault current at time j
For inverse time operation, the inverse-time characteristic is selectable. Both the IEC and AN-
SI/IEEE standardized inverse-time characteristics are supported. The list of characteristics in
table 573 matches the list in the IEC 61850-7-4 spec.
991
Principle of operation Chapter 21
Time inverse characteristics
For the ANSI/IEEE characteristics the inverse time curves are defined according to table 574:
For the IEC characteristics the inverse time curves are defined according to table 575:
992
Principle of operation Chapter 21
Time inverse characteristics
For the IEC curves there is also a setting of the minimum time delay of operation, see figure 454.
Operate
time
tnMin
Current
en05000133.vsd
Figure 454: Minimum time delay operation for the IEC curves
In order to fully comply with IEC curves definition setting parameter tMin shall be set to the
value which is equal to the operating time of the selected IEC inverse curve for measured current
of twenty times the set current pickup value. Note that the operating time value is dependent on
the selected setting value for time multiplier k.
In addition to the ANSI and IEC standardized characteristics, there are also two additional
curves available; the 18 = RI time inverse and the 19 = RD time inverse.
The 18 = RI time inverse curve emulates the characteristic of the electromechanical ASEA relay
RI. The curve is described by equation 123:
993
Principle of operation Chapter 21
Time inverse characteristics
⎛ ⎞
⎜ ⎟
t [s ] = ⎜
td
⎟
⎜⎜ 0.339 − 0.235 ⋅ Pickupn ⎟⎟
⎝ i ⎠
(Equation 123)
where:
Pickupn is the set pickup current for step n,
td is set time multiplier for step n and
i is the measured current.
The 19 = RD time inverse curve gives a logarithmic delay, as used in the Combiflex protection
RXIDG. The curve enables a high degree of selectivity required for sensitive residual ground
fault current protection, with ability to detect high resistive ground faults. The curve is described
by equation 124:
⎛ ⎞
[ ]
i
t s = 5.8 − 1.35 ⋅ ln ⎜ ⎟
⎝ td ⋅ Pickupn ⎠
(Equation 124)
where:
Pickupn is the set pickup current for step n,
td is set time multiplier for step n and
i is the measured current
If the curve type is chosen as 17 the user can make a tailor made inverse time curve according
to the general equation 125.
⎛ ⎞
⎜ ⎟
t [s ] = ⎜ + B ⎟ ⋅ td
A
⎜ ⎟
⎜⎜ ⎛⎜ ⎞
P
i
⎟ −C ⎟⎟
⎝ ⎝ Pickupn ⎠ ⎠
(Equation 125)
Also the reset time of the delayed function can be controlled. We have the possibility to choose
between three different reset type delays. Available alternatives are listed in table 576.
994
Principle of operation Chapter 21
Time inverse characteristics
If instantaneous reset is chosen the timer will be reset directly when the current drops below the
set pickup current level minus the hysteresis.
If IEC reset is chosen the timer is reset the timer will be reset after a set constant time when the
current drops below the set pickup current level minus the hysteresis.
If ANSI reset time is chosen the reset time will be dependent of the current after fault clearance
(when the current drops below the pickup current level minus the hysteresis). The timer will re-
set according to equation 126.
⎛ ⎞
⎜ tr
⎟
t[ s ] = ⎜ ⎟
⎜ ⎛ i ⎞2 ⎟
⎜⎜ ⎟ −1 ⎟
⎝ ⎝ in > ⎠ ⎠
(Equation 126)
where:
The set value tr is the reset time in case of zero current after fault clearance.
The possibility of choice of reset characteristics is to some extent dependent of the choice of time
delay characteristic.
For the independent time delay characteristics (type 5 and 15) the possible delay time settings
are instantaneous (1) and IEC (2 = set constant time reset).
For ANSI inverse time delay characteristics (type 1 - 4 and 6 - 8) all three types of reset time
characteristics are available; instantaneous (1), IEC (2 = set constant time reset) and ANSI (3 =
current dependent reset time).
For IEC inverse time delay characteristics (type 9 - 14) the possible delay time settings are in-
stantaneous (1) and IEC (2 = set constant time reset).
For the customer tailor made inverse time delay characteristics (type 17) all three types of reset
time characteristics are available; instantaneous (1), IEC (2 = set constant time reset) and ANSI
(3 = current dependent reset time). If the current dependent type is used settings pr, tr and cr must
be given, see equation 127:
995
Principle of operation Chapter 21
Time inverse characteristics
⎛ ⎞
⎜ tr
⎟
t[ s ] = ⎜ ⎟
⎜ ⎛ i ⎞ pr ⎟
⎜⎜ ⎟ − cr ⎟
⎝ ⎝ in > ⎠ ⎠
(Equation 127)
For RI and RD inverse time delay characteristics (type 18 and 19) the possible delay time set-
tings are instantaneous (1) and IEC (2 = set constant time reset).
996
Inverse characteristics Chapter 21
Time inverse characteristics
3 Inverse characteristics
Table 577: Inverse time characteristics ANSI
Function Range or value Accuracy
Operate characteristic: td = 0.05-999 in steps of -
0.01 unless otherwise
stated
⎛ A ⎞
t = ⎜ P + B ⎟ ⋅ td
⎜ ( I − 1) ⎟
⎝ ⎠
Reset characteristic:
tr
t = ⋅ td
(I 2
−1 )
I = Imeasured/Iset
ANSI Extremely Inverse no 1 A=28.2, B=0.1217, P=2.0, ANSI/IEEE C37.112, class 5 +
tr=29.1 30 ms
ANSI Very inverse no 2 A=19.61, B=0.491, P=2.0,
tr=21.6
ANSI Normal Inverse no 3 A=0.0086, B=0.0185,
P=0.02, tr=0.46
ANSI Moderately Inverse no 4 A=0.0515, B=0.1140,
P=0.02, tr=4.85
ANSI Long Time Extremely Inverse no 6 A=64.07, B=0.250, P=2.0,
tr=30
ANSI Long Time Very Inverse no 7 A=28.55, B=0.712, P=2.0,
tr=13.46
ANSI Long Time Inverse no 8 td=(0.01-1.20) in steps of
0.01
A=0.086, B=0.185,
P=0.02, tr=4.6
997
Inverse characteristics Chapter 21
Time inverse characteristics
⎛ A ⎞
t = ⎜ P ⎟ ⋅ td
⎜ ( I − 1) ⎟
⎝ ⎠
I = Imeasured/Iset
Time delay to reset, IEC inverse time (0.000-60.000) s ± 0.5% of set time ± 10 ms
IEC Normal Inverse no 9 A=0.14, P=0.02 IEC 60255-3, class 5 + 40 ms
IEC Very inverse no 10 A=13.5, P=1.0
IEC Inverse no 11 A=0.14, P=0.02
IEC Extremely inverse no 12 A=80.0, P=2.0
IEC Short-time inverse no 13 A=0.05, P=0.04
IEC Long-time inverse no 14 A=120, P=1.0
Customer defined characteristic no 17 td=0.5-999 in steps of 0.1 IEC 60255, class 5 + 40 ms
Operate characteristic: A=(0.005-200.000) in
steps of 0.001
B=(0.00-20.00) in steps of
⎛ A ⎞ 0.01
=⎜ + B ⎟ ⋅ td
⎜ (I P − C )
t
⎟ C=(0.1-10.0) in steps of
⎝ ⎠
0.1
Reset characteristic:
P=(0.005-3.000) in steps of
0.001
TR TR=(0.005-100.000) in
t = ⋅k
(I PR
− CR ) steps of 0.001
CR=(0.1-10.0) in steps of
0.1
TR
t = ⋅ td
( I
PR
− CR ) PR=(0.005-3.000) in steps
of 0.001
I = Imeasured/Iset
RI inverse characteristic no 18 td=(0.05-999) in steps of IEC 60255-3, class 5 + 40 ms
0.01
1
t = ⋅ td
0.236
0.339 −
I
I = Imeasured/Iset
Logarithmic inverse characteristic no 19 td=(0.05-1.10) in steps of IEC 60255-3, class 5 + 40 ms
0.01
⎛
t = 5.8 − ⎜ 1.35 ⋅ In
I ⎞
⎟
⎝ td ⎠
I = Imeasured/Iset
998
Inverse characteristics Chapter 21
Time inverse characteristics
Table 579: Inverse time characteristics for Two step undervoltage protection (PUVM, 27)
Function Range or value Accuracy
Type A curve: td = (0.05-1.10) in steps of Class 5 +40 ms
0.01
td
t =
⎛ VPickup − V ⎞
⎜ ⎟
⎝ VPickup ⎠
V = Vmeasured
Type B curve: td = (0.05-1.10) in steps of
0.01
td ⋅ 480
t = + 0.055
⎛ ⎞
2.0
VPickup − V
⎜ 32 ⋅ − 0.5 ⎟
⎝ VPickup ⎠
V = Vmeasured
Programmable curve: td = (0.05-1.10) in steps of
0.01
A = (0.005-200.000) in
⎡ ⎤ steps of 0.001
⎢ ⎥
td ⋅ A
t = ⎢ ⎥+D B = (0.50-100.00) in steps
⎢ ⎛ VPickup − V ⎞ ⎥
P of 0.01
⎢⎜B ⋅ −C⎟ ⎥ C = (0.0-1.0) in steps of 0.1
⎣⎝ VPickup ⎠ ⎦
D = (0.000-60.000) in
V = Vmeasured steps of 0.001
P = (0.000-3.000) in steps
of 0.001
999
Inverse characteristics Chapter 21
Time inverse characteristics
Table 580: Inverse time characteristics for Two step overvoltage protection (POVM, 59)
Function Range or value Accuracy
Type A curve: td = (0.05-1.10) in steps of Class 5 +40 ms
0.01
td
t =
⎛ V − VPickup ⎞
⎜ ⎟
⎝ VPickup ⎠
V = Vmeasured
Type B curve: td = (0.05-1.10) in steps of
0.01
td ⋅ 480
t =
⎛ ⎞
2.0
V − VPickup
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ VPickup ⎠
Type C curve: td = (0.05-1.10) in steps of
0.01
td ⋅ 480
t =
⎛ ⎞
3.0
V − VPickup
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ VPickup ⎠
Programmable curve: td = (0.05-1.10) in steps of
0.01
A = (0.005-200.000) in
td ⋅ A steps of 0.001
t = +D
⎛ V − VPickup ⎞
P
B = (0.50-100.00) in steps
⎜B ⋅ −C⎟
⎝ VPickup ⎠ of 0.01
C = (0.0-1.0) in steps of 0.1
D = (0.000-60.000) in
steps of 0.001
P = (0.000-3.000) in steps
of 0.001
1000
Inverse characteristics Chapter 21
Time inverse characteristics
td
t =
⎛ V − VPickup ⎞
⎜ ⎟
⎝ VPickup ⎠
V = Vmeasured
Type B curve: td = (0.05-1.10) in steps of
0.01
td ⋅ 480
t =
⎛ ⎞
2.0
V − VPickup
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ VPickup ⎠
Type C curve: td = (0.05-1.10) in steps of
0.01
td ⋅ 480
t =
⎛ ⎞
3.0
V − VPickup
⎜ 32 ⋅ − 0.5 ⎟ − 0.035
⎝ VPickup ⎠
Programmable curve: td = (0.05-1.10) in steps of
0.01
A = (0.005-200.000) in
td ⋅ A steps of 0.001
t = +D
⎛ V − VPickup ⎞
P
B = (0.50-100.00) in steps
⎜B ⋅ −C⎟
⎝ VPickup ⎠ of 0.01
C = (0.0-1.0) in steps of 0.1
D = (0.000-60.000) in
steps of 0.001
P = (0.000-3.000) in steps
of 0.001
1001
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
TD=
15
10
7
1
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I Pickup
(Multiple of Pickup)
xx05000764_ansi.vsd
1002
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
TD=
15
10
1 7
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I Pickup
(Multiple of Pickup)
xx05000765_ansi.vsd
1003
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
TD=
15
10
1 7
5
3
2
1
0.1
0.5
0.01
1 10 100 I/I Pickup
(Multiple of Pickup)
xx05000766_ansi.vsd
1004
Inverse characteristics Chapter 21
Time inverse characteristics
100
TD=
15
10
10
7
5
1
1
0.5
0.1
0.01
1 10 100 I/I Pickup
(Multiple of Pickup)
xx05000767_ansi.vsd
1005
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
TD=
1.1
0.9
0.7
1 0.5
0.3
0.2
0.1
0.1 0.05
0.01
1 10 100 I/I Pickup
(Multiple of Pickup)
xx05000768_ansi.vsd
1006
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
1
TD=
1.1
0.9
0.7
0.5
0.3
0.1 0.2
0.1
0.05
0.01
1 10 100 I/I Pickup
(Multiple of Pickup)
xx05000769_ansi.vsd
1007
Inverse characteristics Chapter 21
Time inverse characteristics
100
10
TD=
0.1 1.1
0.9
0.7
0.5
0.3
0.2
0.01 0.1
1 10 100 I/I Pickup
(Multiple of Pickup)
0.05 xx05000770_ansi.vsd
1008
About this chapter Chapter 22
Glossary
Chapter 22 Glossary
1009
Glossary Chapter 22
Glossary
1 Glossary
AC Alternating current
A/D converter Analog to digital converter
AR Autoreclosing
BS British standard
BSR Binary signal transfer function, receiver blocks
C37.94 IEEE/ANSI protocol used when sending binary signals between IEDs
CAN Controller Area Network. ISO standard (ISO 11898) for serial communi-
cation
1010
Glossary Chapter 22
Glossary
Co-directional Way of transmitting G.703 over a balanced line. Involves two twisted
pairs making it possible to transmit information in both directions
COMTRADE Standard Common Format for Transient Data Exchange format for Dis-
turbance recorder according to IEEE/ANSI C37.111, 1999 /
IEC60255-24
Contra-directional Way of transmitting G.703 over a balanced line. Involves four twisted
pairs of with two are used for transmitting data in both directions, and
two pairs for transmitting clock signals
CR Carrier receive
CRC Cyclic redundancy check
CS Carrier send
CT Current transformer
CVT or CCVT Capacitive voltage transformer
DR Disturbance recorder
1011
Glossary Chapter 22
Glossary
G.703 Electrical and functional description for digital lines used by local tele-
phone companies. Can be transported over balanced and unbalanced
lines
HDLC protocol High level data link control, protocol based on the HDLC standard
HFBR connector type Plastic fiber connector
IEC 60044-6 IEC Standard, Instrument transformers – Part 6: Requirements for pro-
tective current transformers for transient performance
IEEE P1386.1 PCI Mezzanine card (PMC) standard for local bus modules. References
the CMC (IEEE P1386, also known as Common mezzanine card) stan-
dard for the mechanics and the PCI specifications from the PCI SIG
(Special Interest Group) for the electrical EMF Electro Motive Force.
IED Intelligent electronic device
1012
Glossary Chapter 22
Glossary
Instance When several occurrences of the same function are available in the IED
they are referred to as instances of that function. One instance of a func-
tion is identical to another of the same kind but will have a different num-
ber in the IED user interfaces. The word instance is sometimes defined
as an item of information that is representative of a type. In the same
way an instance of a function in the IED is representative of a type of
function.
IP 1. Internet protocol. The network layer for the TCP/IP protocol suite
widely used on Ethernet networks. IP is a connectionless, best-effort
packet switching protocol. It provides packet routing, fragmentation and
re-assembly through the data link layer.
2. Ingression protection according to IEC standard
IP 20 Ingression protection, according to IEC standard, level
IP20- Protected against solidforeign objects of12.5mm diameter
andgreater.
1013
Glossary Chapter 22
Glossary
Overreach A term used to describe how the relay behaves during a fault condition.
For example a distance relay is over-reaching when the impedance pre-
sented to it is smaller than the apparent impedance to the fault applied
to the balance point, i.e. the set reach. The relay “sees” the fault but per-
haps it should not have seen it.
PCI Peripheral component interconnect, a local data bus
Process bus Bus or LAN used at the process level, that is, in near proximity to the
measured and/or controlled components
PSM Power supply module
1014
Glossary Chapter 22
Glossary
TC Trip coil
TCS Trip circuit supervision
TCP Transmission control protocol. The most common transport layer proto-
col used on Ethernet and the Internet.
TCP/IP Transmission control protocol over Internet Protocol. The de facto stan-
dard Ethernet protocols incorporated into 4.2BSD Unix. TCP/IP was
developed by DARPA for internet working and encompasses both net-
work layer and transport layer protocols. While TCP and IP specify two
protocols at specific protocol layers, TCP/IP is often used to refer to the
entire US Department of Defense protocol suite based upon these,
including Telnet, FTP, UDP and RDP.
Underreach A term used to describe how the relay behaves during a fault condition.
For example a distance relay is under-reaching when the impedance
presented to it is greater than the apparent impedance to the fault
applied to the balance point, i.e. the set reach. The relay does not “see”
the fault but perhaps it should have seen it. See also Overreach.
U/I-PISA Process interface components that deliver measured voltage and cur-
rent values
UV Undervoltage
1015
Glossary Chapter 22
Glossary
Three times the zero sequence voltage. Often referred to as the residual
voltage or the neutral point voltage
1016
1MRK 506 275-UUS
ABB Inc
3450 Harvester Road
Burlington, ON L7N 3W5, Canada
Phone: (905) 639-8840
Fax: (905) 333-7565
ABB Inc
7036 Snowdrift Road
Allentown, PA 18106, USA
Phone: (610) 395-7333
Toll Free: (800) 634-6005
Fax: (610) 395-1055