Digital Logic Design

Chapter 1
Digital Systems and Binary Numbers

Dr Khaled Matrouk

Outline of Chapter 1

1.1 Digital Systems

1.2 Binary Numbers

1.3 Number-base Conversions

1.4 Octal and Hexadecimal Numbers

1.5 Complements

1.6 Signed Binary Numbers

1.7 Binary Codes

1.8 Binary Storage and Registers

1.9 Binary Logic
 Digital Systems and Binary Numbers

Digital age and information age

Digital computers
 General purposes
 Many scientific, industrial and commercial applications

Digital systems
 Telephone switching exchanges
 Digital camera
 Electronic calculators, PDA's
 Digital TV

Analog and Digital Signal

Analog system
 The physical quantities or signals may vary continuously over a specified
range.

Digital system
 The physical quantities or signals can assume only discrete values.
 Greater accuracy
X(t) X(t)

t t
Analog signal Digital signal
 Binary Digital Signal

An information variable represented by physical quantity.

For digital systems, the variable takes on discrete values.
 Two level, or binary values
 Binary values are represented abstractly by:
 Digits 0 and 1
 Words (symbols) False (F) and True (T) V(t)
 Words (symbols) Low (L) and High (H)
 And words On and Off
Logic 1

Binary values are represented by values
or ranges of values of physical quantities. undefine

Logic 0
t
Binary digital signal

Decimal Number System

Base (also called radix) = 10
 10 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }

Digit Position
 Integer & fraction 2 1 0 -1 -2

Digit Weight 5 1 2 7 4
Position
 Weight = (Base)

Magnitude 100 10 1 0.1 0.01
 Sum of “Digit x Weight”

Formal Notation
500 10 2 0.7 0.04
2 1 0 -1 -2
d2*B +d1*B +d0*B +d-1*B +d-2*B

(512.74)10
 Octal Number System

Base = 8
 8 digits { 0, 1, 2, 3, 4, 5, 6, 7 }

Weights
Position
 Weight = (Base) 64 8 1 1/8 1/64

Magnitude 5 1 2 7 4
 Sum of “Digit x Weight”
2 1 0 -1 -2

Formal Notation 2 1 0
5 *8 +1 *8 +2 *8 +7 *8 +4 *8
-1 -2

=(330.9375)10

(512.74)8

Binary Number System

Base = 2
 2 digits { 0, 1 }, called binary digits or “bits”

Weights
 Weight = (Base)
Position 4 2 1 1/2 1/4

Magnitude 1 0 1 0 1
 Sum of “Bit x Weight” 2 1 0 -1 -2
2 1 0 -1 -2

Formal Notation 1 *2 +0 *2 +1 *2 +0 *2 +1 *2

Groups of bits 4 bits = Nibble =(5.25)10
8 bits = Byte
(101.01)2
1011

11000101
 Hexadecimal Number System

Base = 16
 16 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }

Weights
Position 1/16 1/256
 Weight = (Base) 256 16 1

Magnitude 1 E 5 7 A
 Sum of “Digit x Weight”
2 1 0 -1 -2

Formal Notation 2 1 0 -1 -2
1 *16 +14 *16 +5 *16 +7 *16 +10 *16
=(485.4765625)10

(1E5.7A)16

The Power of 2

n 2n n 2n
0 20=1 8 28=256
1 21=2 9 29=512
2 22=4 10 210=1024 Kilo

3 23=8 11 211=2048
4 24=16 12 212=4096
5 25=32 20 220=1M Mega

6 26=64 30 230=1G Giga

7 27=128 40 240=1T Tera

 Addition

Decimal Addition

1 1 Carry
5 5
+ 5 5

1 1 0
= Ten ≥ Base
 Subtract a Base

Binary Addition

Column Addition

1 1 1 1 1 1
1 1 1 1 0 1 = 61
+ 1 0 1 1 1 = 23

1 0 1 0 1 0 0 = 84

≥ (2)10
 Binary Subtraction

Borrow a “Base” when needed

1 2 = (10)2
0 2 2 0 0 2
1 0 0 1 1 0 1 = 77
− 1 0 1 1 1 = 23

0 1 1 0 1 1 0 = 54

Binary Multiplication

Bit by bit

1 0 1 1 1
x 1 0 1 0
0 0 0 0 0
1 0 1 1 1
0 0 0 0 0
1 0 1 1 1

1 1 1 0 0 1 1 0
 Number Base Conversions
Evaluate
Magnitude
Octal
(Base 8)

Evaluate
Magnitude
Decimal Binary
(Base 10) (Base 2)

Hexadecimal
(Base 16)
Evaluate
Magnitude

Decimal (Integer) to Binary Conversion

Divide the number by the ‘Base’ (=2)

Take the remainder (either 0 or 1) as a coefficient

Take the quotient and repeat the division

Example: (13)10
Quotient Remainder Coefficient
13/ 2 = 6 1 a0 = 1
6 /2= 3 0 a1 = 0
3 /2= 1 1 a2 = 1
1 /2= 0 1 a3 = 1
Answer: (13)10 = (a3 a2 a1 a0)2 = (1101)2

MSB LSB
 Decimal (Fraction) to Binary Conversion

Multiply the number by the ‘Base’ (=2)

Take the integer (either 0 or 1) as a coefficient

Take the resultant fraction and repeat the division

Example: (0.625)10
Integer Fraction Coefficient
0.625 * 2 = 1 . 25 a-1 = 1
0.25 * 2 = 0 . 5 a-2 = 0
0.5 *2= 1 . 0 a-3 = 1
Answer: (0.625)10 = (0.a-1 a-2 a-3)2 = (0.101)2

MSB LSB

Decimal to Octal Conversion

Example: (175)10
Quotient Remainder Coefficient
175 / 8 = 21 7 a0 = 7
21 / 8 = 2 5 a1 = 5
2 /8= 0 2 a2 = 2
Answer: (175)10 = (a2 a1 a0)8 = (257)8

Example: (0.3125)10
Integer Fraction Coefficient
0.3125 * 8 = 2 . 5 a-1 = 2
0.5 *8= 4 . 0 a-2 = 4
Answer: (0.3125)10 = (0.a-1 a-2 a-3)8 = (0.24)8
 Binary − Octal Conversion
Octal Binary

8 = 23

Each group of 3 bits represents an octal 0 000
digit 1 001

2 010
Assume Zeros
Example: 3 011

( 1 0 1 1 0 . 0 1 )2 4 100

5 101

6 110
( 2 6 . 2 )8 7 111

Works both ways (Binary to Octal & Octal to Binary)

Binary − Hexadecimal Conversion

Hex Binary

16 = 24 0 0000
1 0001

Each group of 4 bits represents a 2 0010
hexadecimal digit 3 0011
4 0100
5 0101
Assume Zeros 6 0110
Example: 7 0111
8 1000
( 1 0 1 1 0 . 0 1 )2 9 1001
A 1010
B 1011
C 1100
D 1101
(1 6 . 4 )16 E 1110
F 1111

Works both ways (Binary to Hex & Hex to Binary)

 Octal − Hexadecimal Conversion

Convert to Binary as an intermediate step

Example:
( 2 6 . 2 )8

Assume Zeros Assume Zeros

( 0 1 0 1 1 0 . 0 1 0 )2

(1 6 . 4 )16

Works both ways (Octal to Hex & Hex to Octal)

Decimal, Binary, Octal and Hexadecimal

Decimal Binary Octal Hex
00 0000 00 0
01 0001 01 1
02 0010 02 2
03 0011 03 3
04 0100 04 4
05 0101 05 5
06 0110 06 6
07 0111 07 7
08 1000 10 8
09 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F
 1.5 Complements

There are two types of complements for each base-r system: the radix complement and
diminished radix complement.

Diminished Radix Complement - (r-1)’s Complement
 Given a number N in base r having n digits, the (r–1)’s complement of N is
defined as:
(rn –1) – N

Example for 6-digit decimal numbers:
 9’s complement is (rn – 1)–N = (106–1)–N = 999999–N
 9’s complement of 546700 is 999999–546700 = 453299

Example for 7-digit binary numbers:
 1’s complement is (rn – 1) – N = (27–1)–N = 1111111–N
 1’s complement of 1011000 is 1111111–1011000 = 0100111

Observation:
 Subtraction from (rn – 1) will never require a borrow
 Diminished radix complement can be computed digit-by-digit
 For binary: 1 – 0 = 1 and 1 – 1 = 0

Complements

1’s Complement (Diminished Radix Complement)
 All ‘0’s become ‘1’s
 All ‘1’s become ‘0’s

Example (10110000)2
 (01001111)2
If you add a number and its 1’s complement …

10110000
+ 01001111
11111111
 Complements

Radix Complement

The r's complement of an n-digit number N in base r is defined as

rn – N for N ≠ 0 and as 0 for N = 0. Comparing with the (r  1) 's
complement, we note that the r's complement is obtained by adding 1
to the (r  1) 's complement, since rn – N = [(rn  1) – N] + 1.

Example: Base-10

The 10's complement of 012398 is 987602

The 10's complement of 246700 is 753300

Example: Base-2

The 2's complement of 1101100 is 0010100

The 2's complement of 0110111 is 1001001

Complements

2’s Complement (Radix Complement)
 Take 1’s complement then add 1
OR  Toggle all bits to the left of the first ‘1’ from the right
Example:
Number:
1’s Comp.:
10110000 10110000
01001111
+ 1
01010000 01010000
 Complements

Subtraction with Complements

 The subtraction of two n-digit unsigned numbers M – N in base r can be
done as follows:

Complements

Example 1.5
 Using 10's complement, subtract 72532 – 3250.

Example 1.6
 Using 10's complement, subtract 3250 – 72532.

There is no end carry.

Therefore, the answer is – (10's complement of 30718) =  69282.

 Complements

Example 1.7
 Given the two binary numbers X = 1010100 and Y = 1000011, perform the
subtraction (a) X – Y ; and (b) Y  X, by using 2's complement.

There is no end carry.

Therefore, the answer is
Y – X =  (2's complement
of 1101111) =  0010001.

Complements

Subtraction of unsigned numbers can also be done by means of the (r  1)'s

complement. Remember that the (r  1) 's complement is one less then the r's
complement.

Example 1.8
 Repeat Example 1.7, but this time using 1's complement.

There is no end carry,

Therefore, the answer is Y –
X =  (1's complement of
1101110) =  0010001.
 1.6 Signed Binary Numbers

To represent negative integers, we need a notation for negative

values.

It is customary to represent the sign with a bit placed in the
leftmost position of the number since binary digits.

The convention is to make the sign bit 0 for positive and 1 for
negative.

Example:

Table 1.3 lists all possible four-bit signed binary numbers in the
three representations.

Signed Binary Numbers

 Signed Binary Numbers

Arithmetic addition
 The addition of two numbers in the signed-magnitude system follows the rules of
ordinary arithmetic. If the signs are the same, we add the two magnitudes and
give the sum the common sign. If the signs are different, we subtract the smaller
magnitude from the larger and give the difference the sign if the larger magnitude.
 The addition of two signed binary numbers with negative numbers represented in
signed-2's-complement form is obtained from the addition of the two numbers,
including their sign bits.
 A carry out of the sign-bit position is discarded.

Example:

Signed Binary Numbers

Arithmetic Subtraction
 In 2’s-complement form:
1. Take the 2’s complement of the subtrahend (including the sign bit)
and add it to the minuend (including sign bit).
2. A carry out of sign-bit position is discarded.

( A)  (B)  ( A)  (B)
( A)  (B)  ( A)  ( B)

Example:

( 6)  ( 13) (11111010  11110011)

(11111010 + 00001101)
00000111 (+ 7)
 1.7 Binary Codes

BCD Code
 A number with k decimal digits will
require 4k bits in BCD.
 Decimal 396 is represented in BCD
with 12bits as 0011 1001 0110, with
each group of 4 bits representing one
decimal digit.
 A decimal number in BCD is the
same as its equivalent binary number
only when the number is between 0
and 9.
 The binary combinations 1010
through 1111 are not used and have
no meaning in BCD.

Binary Code

Example:
 Consider decimal 185 and its corresponding value in BCD and binary:

BCD addition
 Binary Code

Example:
 Consider the addition of 184 + 576 = 760 in BCD:

Decimal Arithmetic: (+375) + (-240) = +135

Hint 6: using 10’s of BCD

Binary Codes

Other Decimal Codes

 Binary Codes

Gray Code
 The advantage is that only bit in the
code group changes in going from
one number to the next.
» Error detection.
» Representation of analog data.
» Low power design.

000 001

010 011
100 101

110 111

Binary Codes

American Standard Code for Information Interchange (ASCII) Character Code
 Binary Codes

Error-Detecting Code
 To detect errors in data communication and processing, an eighth bit is
sometimes added to the ASCII character to indicate its parity.
 A parity bit is an extra bit included with a message to make the total
number of 1's either even or odd.

Example:
 Consider the following two characters and their even and odd parity:

Binary Codes

Error-Detecting Code
 Redundancy (e.g. extra information), in the form of extra bits, can be
incorporated into binary code words to detect and correct errors.
 A simple form of redundancy is parity, an extra bit appended onto the code
word to make the number of 1’s odd or even. Parity can detect all single-
bit errors and some multiple-bit errors.
 A code word has even parity if the number of 1’s in the code word is even.
 A code word has odd parity if the number of 1’s in the code word is odd.
 Example:

Message A: 100010011 (even parity)

Message B: 10001001 0 (odd parity)
 1.8 Binary Storage and Registers

Registers
 A binary cell is a device that possesses two stable states and is capable of storing
one of the two states.
 A register is a group of binary cells. A register with n cells can store any discrete
quantity of information that contains n bits.

n cells 2n possible states

A binary cell
 Two stable state
 Store one bit of information
 Examples: flip-flop circuits, ferrite cores, capacitor

A register
 A group of binary cells
 AX in x86 CPU

Register Transfer
 A transfer of the information stored in one register to another.
 One of the major operations in digital system.
 An example in next slides.

A Digital Computer Example

Memory

Control
CPU unit Datapath

Inputs: Keyboard, Outputs: CRT,

mouse, modem, LCD, modem,
Input/Output speakers
microphone
Synchronous or
Asynchronous?
 Transfer of information

Figure 1.1 Transfer of information among register

Transfer of information

The other major component

of a digital system
 Circuit elements to
manipulate individual bits of
information
 Load-store machine
LD R1;
LD R2;
ADD R3, R2, R1;
SD R3;

Figure 1.2 Example of binary information processing

 1.9 Binary Logic

Definition of Binary Logic
 Binary logic consists of binary variables and a set of logical operations.

 The variables are designated by letters of the alphabet, such as A, B, C, x, y, z, etc,

with each variable having two and only two distinct possible values: 1 and 0,
 Three basic logical operations: AND, OR, and NOT.

Binary Logic

Truth Tables, Boolean Expressions, and Logic Gates

AND OR NOT
x y z x y z x z
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1

z=x•y=xy z=x+y z = x = x’
 Switching Circuits

AND OR

Binary Logic

Logic gates
 Graphic Symbols and Input-Output Signals for Logic gates:

Fig. 1.4 Symbols for digital logic circuits

Fig. 1.5 Input-Output signals for gates

 Binary Logic

Logic gates
 Graphic Symbols and Input-Output Signals for Logic gates:

Fig. 1.6 Gates with multiple inputs

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Digital Logic Design

Boolean Algebra and Logic
Gate

Chapter 2
Dr Khaled Matrouk

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Algebras
 What is an algebra?
 Mathematical system consisting of
 Set of elements
 Set of operators
 Axioms or postulates
 Why is it important?
 Defines rules of “calculations”
 Example: arithmetic on natural numbers
 Set of elements: N = {1,2,3,4,…}
 Operator: +, –, *
 Axioms: associativity, distributivity, closure, identity elements,
etc.
 Note: operators with two inputs are called binary
 Does not mean they are restricted to binary numbers!
 Operator(s) with one input are called unary

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BASIC DEFINITIONS
 A set is collection of having the same property.
 S: set, x and y: element or event
 For example: S = {1, 2, 3, 4}
 If x = 2, then xS.
 If y = 5, then y S.
 A binary operator defines on a set S of elements is a
rule that assigns, to each pair of elements from S, a
unique element from S.
 For example, given a set S, consider a*b = c and * is a binary
operator.
 If (a, b) through * get c and a, b, cS, then * is a binary
operator of S.
 On the other hand, if * is not a binary operator of S and a, bS,
then c  S.

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BASIC DEFINITIONS
 The most common postulates used to formulate various
algebraic structures are as follows:
1. Closure: a set S is closed with respect to a binary operator if, for
every pair of elements of S, the binary operator specifies a rule for
obtaining a unique element of S.
 For example, natural numbers N={1,2,3,...} is closed w.r.t. the binary
operator + by the rule of arithmetic addition, since, for any a, bN, there
is a unique cN such that
 a+b = c
 But operator – is not closed for N, because 2-3 = -1 and 2, 3 N, but (-1)N.
2. Associative law: a binary operator * on a set S is said to be
associative whenever
 (x * y) * z = x * (y * z) for all x, y, zS
 (x+y)+z = x+(y+z)
3. Commutative law: a binary operator * on a set S is said to be
commutative whenever
 x * y = y * x for all x, yS
 x+y = y+x
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BASIC DEFINITIONS
4. Identity element: a set S is said to have an identity element with
respect to a binary operation * on S if there exists an element eS
with the property that
 e * x = x * e = x for every xS
 0+x = x+0 =x for every xI . I = {…, -3, -2, -1, 0, 1, 2, 3, …}.
 1*x = x*1 =x for every xI. I = {…, -3, -2, -1, 0, 1, 2, 3, …}.
5. Inverse: a set having the identity element e with respect to the
binary operator to have an inverse whenever, for every xS, there
exists an element yS such that
 x*y=e
 The operator + over I, with e = 0, the inverse of an element a is (-a), since
a+(-a) = 0.
6. Distributive law: if * and ．are two binary operators on a set S, * is
said to be distributive over . whenever
 x * (y．z) = (x * y)．(x * z)

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Boolean Algebra
 Terminology:
 Literal: A variable or its complement
 Product term: literals connected by •
 Sum term: literals connected by +

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Postulates of Two-Valued Boolean

Algebra
 B = {0, 1} and two binary operations, + and．
 The rules of operations: AND、OR and NOT.

AND OR NOT
x y x． y x y x+y x x'
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1
1. Closure (+ and‧)
2. The identity elements
(1) +: 0
(2)．: 1

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Postulates of Two-Valued Boolean

Algebra
3. The commutative laws
4. The distributive laws

x y z y+z x．(y+z) x．y x． z (x．y)+(x．z)

0 0 0 0 0 0 0 0
0 0 1 1 0 0 0 0
0 1 0 1 0 0 0 0
0 1 1 1 0 0 0 0
1 0 0 0 0 0 0 0
1 0 1 1 1 0 1 1
1 1 0 1 1 1 0 1
1 1 1 1 1 1 1 1

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Postulates of Two-Valued Boolean

Algebra
5. Complement
 x+x'=1 → 0+0'=0+1=1; 1+1'=1+0=1
 x．x'=0 → 0．0'=0．1=0; 1．1'=1．0=0
6. Has two distinct elements 1 and 0, with 0 ≠ 1

 Note
 A set of two elements
 + : OR operation; ．: AND operation
 A complement operator: NOT operation
 Binary logic is a two-valued Boolean algebra

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Duality
 The principle of duality is an important concept.
This says that if an expression is valid in Boolean
algebra, the dual of that expression is also valid.
 To form the dual of an expression, replace all +
operators with . operators, all . operators with +
operators, all ones with zeros, and all zeros with
ones.
 Form the dual of the expression
a + (bc) = (a + b)(a + c)
 Following the replacement rules…
a(b + c) = ab + ac
 Take care not to alter the location of the
parentheses if they are present.
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Basic Theorems

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Boolean Theorems
 Huntington’s postulates define some rules
Post. 1:
closure
Post. 2:
(a) x+0=x, (b) x·1=x
Post. 3:
(a) x+y=y+x, (b) x·y=y·x
Post. 4:
(a) x(y+z) = xy+xz,
(b) x+yz = (x+y)(x+z)
 Need more rules to modify Post. 5: (a) x+x’=1, (b) x·x’=0
algebraic expressions
 Theorems that are derived from postulates
 What is a theorem?
 A formula or statement that is derived from
postulates (or other proven theorems)
 Basic theorems of Boolean algebra
 Theorem 1 (a): x + x = x (b): x · x = x
 Looks straightforward but needs to be proven !
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Proof of x+x=x
 We can only use Huntington postulates:
Huntington postulates:
Post. 2: (a) x+0=x, (b) x·1=x
Post. 3: (a) x+y=y+x, (b) x·y=y·x
Post. 4: (a) x(y+z) = xy+xz,
(b) x+yz = (x+y)(x+z)
Post. 5: (a) x+x’=1, (b) x·x’=0
 Show that x+x=x.
x+x = (x+x)·1 by 2(b)
= (x+x)(x+x’) by 5(a)
= x+xx’ by 4(b)
= x+0 by 5(b)
=x by 2(a)

 We can now use Theorem 1(a) in future proofs

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Proof of x·x=x
 Similar to previous Huntington postulates:
proof
Post. 2: (a) x+0=x, (b) x·1=x
Post. 3: (a) x+y=y+x, (b) x·y=y·x
Post. 4: (a) x(y+z) = xy+xz,
(b) x+yz = (x+y)(x+z)
Post. 5: (a) x+x’=1, (b) x·x’=0
Th. 1: (a) x+x=x

 Show that x·x = x.

x·x = xx+0 by 2(a)
= xx+xx’ by 5(b)
= x(x+x’) by 4(a)
= x·1 by 5(a)
=x by 2(b)

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Proof of x+1=1
 Theorem 2(a): x + 1 = 1 Huntington postulates:

x + 1 = 1．(x + 1) by 2(b) Post. 2: (a) x+0=x, (b) x·1=x

=(x + x')(x + 1) 5(a) Post. 3: (a) x+y=y+x, (b) x·y=y·x
Post. 4: (a) x(y+z) = xy+xz,
= x + x' 1 4(b) (b) x+yz = (x+y)(x+z)
= x + x' 2(b) Post. 5: (a) x+x’=1, (b) x·x’=0
=1 5(a) Th. 1: (a) x+x=x

 Theorem 2(b): x．0 = 0 by duality

 Theorem 3: (x')' = x
 Postulate 5 defines the complement of x, x + x' = 1 and x x' = 0
 The complement of x' is x is also (x')'

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Absorption Property (Covering)

Huntington postulates:
 Theorem 6(a): x + xy = x
 x + xy = x．1 + xy by 2(b) Post. 2: (a) x+0=x, (b) x·1=x
= x (1 + y) 4(a) Post. 3: (a) x+y=y+x, (b) x·y=y·x
= x (y + 1) 3(a) Post. 4: (a) x(y+z) = xy+xz,
= x．1 Th 2(a) (b) x+yz = (x+y)(x+z)
=x 2(b) Post. 5: (a) x+x’=1, (b) x·x’=0
Th. 1: (a) x+x=x
 Theorem 6(b): x (x + y) = x by duality
 By means of truth table (another way to proof )

x y xy x+xy
0 0 0 0
0 1 0 0
1 0 0 1
1 1 1 1

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DeMorgan’s Theorem
 Theorem 5(a): (x + y)’ = x’y’
 Theorem 5(b): (xy)’ = x’ + y’
 By means of truth table

x y x’ y’ x+y (x+y)’ x’y’ xy x’+y' (xy)’

0 0 1 1 0 1 1 0 1 1
0 1 1 0 1 0 0 0 1 1
1 0 0 1 1 0 0 0 1 1
1 1 0 0 1 0 0 1 0 0

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Consensus Theorem
1. xy + x’z + yz = xy + x’z
2. (x+y)•(x’+z)•(y+z) = (x+y)•(x’+z) -- (dual)
 Proof:
xy + x’z + yz = xy + x’z + (x+x’)yz
= xy + x’z + xyz + x’yz
= (xy + xyz) + (x’z + x’zy)
= xy + x’z
(2 true by duality).

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Operator Precedence
 The operator precedence for evaluating Boolean
Expression is
 Parentheses
 NOT
 AND
 OR
 Examples
 x y' + z
 (x y + z)'

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Boolean Functions
 A Boolean function
 Binary variables
 Binary operators OR and AND
 Unary operator NOT
 Parentheses
 Examples
 F1= x y z'
 F2 = x + y'z
 F3 = x' y' z + x' y z + x y'
 F4 = x y' + x' z

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Boolean Functions

The truth table of 2n entries

x y z F1 F2 F3 F4
0 0 0 0 0 0 0
0 0 1 0 1 1 1
0 1 0 0 0 0 0
0 1 1 0 0 1 1
1 0 0 0 1 1 1
1 0 1 0 1 1 1
1 1 0 1 1 0 0
1 1 1 0 1 0 0
 Two Boolean expressions may specify the same
function
 F3 = F4
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Boolean Functions
 Implementation with logic gates
 F4 is more economical

F2 = x + y'z

F3 = x' y' z + x' y z + x y'

F4 = x y' + x' z

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Algebraic Manipulation
 To minimize Boolean expressions
 Literal: a primed or unprimed variable (an input to a gate)
 Term: an implementation with a gate
 The minimization of the number of literals and the number of
terms → a circuit with less equipment
 It is a hard problem (no specific rules to follow)
 Example 2.1
1. x(x'+y) = xx' + xy = 0+xy = xy
2. x+x'y = (x+x')(x+y) = 1 (x+y) = x+y
3. (x+y)(x+y') = x+xy+xy'+yy' = x(1+y+y') = x
4. xy + x'z + yz = xy + x'z + yz(x+x') = xy + x'z + yzx + yzx' =
xy(1+z) + x'z(1+y) = xy +x'z
5. (x+y)(x'+z)(y+z) = (x+y)(x'+z), by duality from function 4.
(consensus theorem with duality)

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Complement of a Function
 An interchange of 0's for 1's and 1's for 0's in the value
of F
 By DeMorgan's theorem
 (A+B+C)' = (A+X)' let B+C = X
= A'X' by theorem 5(a) (DeMorgan's)
= A'(B+C)' substitute B+C = X
= A'(B'C') by theorem 5(a) (DeMorgan's)
= A'B'C' by theorem 4(b) (associative)
 Generalizations: a function is obtained by interchanging
AND and OR operators and complementing each literal.
 (A+B+C+D+ ... +F)' = A'B'C'D'... F'
 (ABCD ... F)' = A'+ B'+C'+D' ... +F'

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Examples
 Example 2.2
 F1' = (x'yz' + x'y'z)' = (x'yz')' (x'y'z)' = (x+y'+z) (x+y+z')
 F2' = [x(y'z'+yz)]' = x' + (y'z'+yz)' = x' + (y'z')' (yz)‘
= x' + (y+z) (y'+z')
= x' + yz‘+y'z
 Example 2.3: a simpler procedure
 Take the dual of the function and complement each literal
1. F1 = x'yz' + x'y'z.
The dual of F1 is (x'+y+z') (x'+y'+z).
Complement each literal: (x+y'+z)(x+y+z') = F1'
2. F2 = x(y' z' + yz).
The dual of F2 is x+(y'+z') (y+z).
Complement each literal: x'+(y+z)(y' +z') = F2'

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2.6 Canonical and Standard Forms

Minterms and Maxterms
 A minterm (standard product): an AND term consists of
all literals in their normal form or in their complement
form.
 For example, two binary variables x and y,
 xy, xy', x'y, x'y'
 It is also called a standard product.
 n variables con be combined to form 2n minterms.
 A maxterm (standard sums): an OR term
 It is also called a standard sum.
 2n maxterms.

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Minterms and Maxterms

Each maxterm is the complement of its corresponding
minterm, and vice versa.

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Minterms and Maxterms

 A Boolean function can be expressed by
 A truth table
 Sum of minterms
 f1 = x'y'z + xy'z' + xyz = m1 + m4 +m7 (Minterms)
 f2 = x'yz+ xy'z + xyz'+xyz = m3 + m5 +m6 + m7 (Minterms)

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Minterms and Maxterms

 The complement of a Boolean function
 The minterms that produce a 0
 f1' = m0 + m2 +m3 + m5 + m6 = x'y'z'+x'yz'+x'yz+xy'z+xyz'
 f1 = (f1')'
= (x+y+z)(x+y'+z) (x+y'+z') (x'+y+z')(x'+y'+z) = M0 M2 M3 M5
M6
 f2 = (x+y+z)(x+y+z')(x+y'+z)(x'+y+z)=M0M1M2M4
 Any Boolean function can be expressed as
 A sum of minterms (“sum” meaning the ORing of terms).
 A product of maxterms (“product” meaning the ANDing of
terms).
 Both boolean functions are said to be in Canonical form.

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Sum of Minterms
 Sum of minterms: there are 2n minterms and 22n
combinations of function with n Boolean variables.
 Example 2.4: express F = A+BC' as a sum of minterms.
 F = A+B'C = A (B+B') + B'C = AB +AB' + B'C = AB(C+C') +
AB'(C+C') + (A+A')B'C = ABC+ABC'+AB'C+AB'C'+A'B'C
 F = A'B'C +AB'C' +AB'C+ABC'+ ABC = m1 + m4 +m5 + m6 + m7
 F(A, B, C) = S(1, 4, 5, 6, 7)
 or, built the truth table first

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Product of Maxterms
 Product of maxterms: using distributive law to expand.
 x + yz = (x + y)(x + z) = (x+y+zz')(x+z+yy') =
(x+y+z)(x+y+z')(x+y'+z)
 Example 2.5: express F = xy + x'z as a product of
maxterms.
 F = xy + x'z = (xy + x')(xy +z) = (x+x')(y+x')(x+z)(y+z) =
(x'+y)(x+z)(y+z)
 x'+y = x' + y + zz' = (x'+y+z)(x'+y+z')
 F = (x+y+z)(x+y'+z)(x'+y+z)(x'+y+z') = M0M2M4M5
 F(x, y, z) = P(0, 2, 4, 5)

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Conversion between Canonical Forms

 The complement of a function expressed as the sum of
minterms equals the sum of minterms missing from the
original function.
 F(A, B, C) = S(1, 4, 5, 6, 7)
 Thus, F'(A, B, C) = S(0, 2, 3)
 By DeMorgan's theorem
F(A, B, C) = P(0, 2, 3)
F'(A, B, C) =P (1, 4, 5, 6, 7)
 mj' = Mj
 Sum of minterms = product of maxterms
 Interchange the symbols S and P and list those numbers
missing from the original form
 S of 1's
 P of 0's

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 Example
 F = xy + xz
 F(x, y, z) = S(1, 3, 6, 7)
 F(x, y, z) = P (0, 2, 4, 6)

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Standard Forms
 Canonical forms are very seldom the ones with the
least number of literals.
 Standard forms: the terms that form the function may
obtain one, two, or any number of literals.
 Sum of products: F1 = y' + xy+ x'yz'
 Product of sums: F2 = x(y'+z)(x'+y+z')
 F3 = A'B'CD+ABC'D'

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Implementation
 Two-level implementation

F1 = y' + xy+ x'yz' F2 = x(y'+z)(x'+y+z')

 Multi-level implementation

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2.7 Other Logic Operations

 2n rows in the truth table of n binary variables.
n
 22 functions for n binary variables.
 16 functions of two binary variables.

 All the new symbols except for the exclusive-OR

symbol are not in common use by digital designers.
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Boolean Expressions

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2.8 Digital Logic Gates

 Boolean expression: AND, OR and NOT operations
 Constructing gates of other logic operations
 The feasibility and economy;
 The possibility of extending gate's inputs;
 The basic properties of the binary operations (commutative and
associative);
 The ability of the gate to implement Boolean functions.

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Standard Gates
 Consider the 16 functions in Table 2.8 (slide 33)
 Two are equal to a constant (F0 and F15).
 Four are repeated twice (F4, F5, F10 and F11).
 Inhibition (F2) and implication (F13) are not commutative or
associative.
 The other eight: complement (F12), transfer (F3), AND (F1), OR
(F7), NAND (F14), NOR (F8), XOR (F6), and equivalence (XNOR)
(F9) are used as standard gates.
 Complement: inverter.
 Transfer: buffer (increasing drive strength).
 Equivalence: XNOR.

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Summary of Logic Gates

July 13, 2021 Figure 2.5 Digital logic gates

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Summary of Logic Gates

Figure 2.5 Digital logic gates

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Multiple Inputs
 Extension to multiple inputs
 A gate can be extended to multiple inputs.
 If its binary operation is commutative and associative.
 AND and OR are commutative and associative.
 OR
 x+y = y+x
 (x+y)+z = x+(y+z) = x+y+z
 AND
 xy = yx
 (x y)z = x(y z) = x y z

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Multiple Inputs
 NAND and NOR are commutative but not associative → they
are not extendable.

Figure 2.6 Demonstrating the nonassociativity of the NOR operator;

(x ↓ y) ↓ z ≠ x ↓(y ↓ z)
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Multiple Inputs
 Multiple NOR = a complement of OR gate, Multiple NAND = a
complement of AND.
 The cascaded NAND operations = sum of products.
 The cascaded NOR operations = product of sums.

Figure 2.7 Multiple-input and cascated NOR and NAND gates

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Multiple Inputs
 The XOR and XNOR gates are commutative and associative.
 Multiple-input XOR gates are uncommon?
 XOR is an odd function: it is equal to 1 if the inputs variables
have an odd number of 1's.

July 13, 2021 Figure 2.8 3-input XOR gate

45

Positive and Negative Logic

 Positive and Negative Logic
 Two signal values <=> two logic
values
 Positive logic: H=1; L=0
 Negative logic: H=0; L=1
 Consider a TTL gate
 A positive logic AND gate
 A negative logic OR gate
 The positive logic is used in this
book

Figure 2.9 Signal assignment and logic polarity

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Positive and Negative Logic

July 13, 2021 Figure 2.10 Demonstration of positive and negative logic 47

24
 Digital Logic Design
Gate-Level Minimization

Dr Khaled Matrouk

July 27, 2021 1

 3-1 Introduction
 Gate-level minimization refers to the design task of
finding an optimal gate-level implementation of Boolean
functions describing a digital circuit.

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2
 3-2 The Map Method
 The complexity of the digital logic gates
 The complexity of the algebraic expression
 Logic minimization
 Algebraic approaches: lack specific rules
 The Karnaugh map
 A simple straight forward procedure
 A pictorial form of a truth table
 Applicable if the # of variables < 7
 A diagram made up of squares
 Each square represents one minterm

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Review of Boolean Function
 Boolean function
 Sum of minterms
 Sum of products (or product of sum) in the simplest form
 A minimum number of terms
 A minimum number of literals
 The simplified expression may not be unique

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Two-Variable Map
 A two-variable map
 Four minterms
 x' = row 0; x = row 1
 y' = column 0; y =
column 1
 A truth table in square
diagram
 Fig. 3.2(a): xy = m3 Figure 3.1 Two-variable Map
 Fig. 3.2(b): x+y =
x'y+xy' +xy =
m1+m2+m3

July 27, 2021

Figure 3.2 Representation of functions in the map
5
A Three-variable Map
 A three-variable map
 Eight minterms
 The Gray code sequence
 Any two adjacent squares in the map differ by only on variable
 Primed in one square and unprimed in the other
 e.g., m5 and m7 can be simplified
 m5+ m7 = xy'z + xyz = xz (y'+y) = xz

July 27, 2021

Figure 3.3 Three-variable Map
6
A Three-variable Map
 m0 and m2 (m4 and m6) are adjacent
 m0+ m2 = x'y'z' + x'yz' = x'z' (y'+y) = x'z'
 m4+ m6 = xy'z' + xyz' = xz' (y'+y) = xz'

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 Example 3.1
 Example 3.1: simplify the Boolean function F(x, y, z) =
S(2, 3, 4, 5)
 F(x, y, z) = S(2, 3, 4, 5) = x'y + xy'

Figure 3.4 Map for Example 3.1, F(x, y, z) = Σ(2, 3, 4, 5) = x'y + xy'

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 Example 3.2
 Example 3.2: simplify F(x, y, z) = S(3, 4, 6, 7)
 F(x, y, z) = S(3, 4, 6, 7) = yz+ xz'

Figure 3.5 Map for Example 3-2; F(x, y, z) = Σ(3, 4, 6, 7) = yz + xz'

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Four adjacent Squares
 Consider four adjacent squares
 2, 4, and 8 squares
 m0+m2+m4+m6 = x'y'z'+x'yz'+xy'z'+xyz' = x'z'(y'+y) +xz'(y'+y) =
x'z' + xz‘ = z'
 m1+m3+m5+m7 = x'y'z+x'yz+xy'z+xyz =x'z(y'+y) + xz(y'+y) =x'z +
xz = z

July 27, 2021

Figure 3.3 Three-variable Map
10
 Example 3.3

Example 3.3: simplify F(x, y, z) = S(0, 2, 4, 5, 6)
 F(x, y, z) = S(0, 2, 4, 5, 6) = z'+ xy'

Figure 3.6 Map for Example 3-3, F(x, y, z) = Σ(0, 2, 4, 5, 6) = z' +xy'
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Example 3.4
 Example 3.4: let F = A'C + A'B + AB'C + BC
a) Express it in sum of minterms.
b) Find the minimal sum of products expression.
Ans:
F(A, B, C) = S(1, 2, 3, 5, 7) = C + A'B

Figure 3.7 Map for Example 3.4, A'C + A'B + AB'C + BC = C + A'B
July 27, 2021
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3.3 Four-Variable Map
 The map
 16 minterms
 Combinations of 2, 4, 8, and 16 adjacent squares

July 27, 2021 Figure 3.8 Four-variable Map 13

 Example 3.5
 Example 3.5: simplify F(w, x, y, z) = S(0, 1, 2, 4, 5, 6, 8,
9, 12, 13, 14)

F = y'+w'z'+xz'

Figure 3.9 Map for Example 3-5; F(w, x, y, z) = Σ(0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14) = y' + w' z' +xz'
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 Example 3.6
 Example 3-6: simplify F = ABC + BCD + ABCD +
ABC

Figure 3.9 Map for Example 3-6; ABC + BCD + ABCD

+ ABC= BD + BC +ACD

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Prime Implicants
 Prime Implicants
 All the minterms are covered.
 Minimize the number of terms.
 A prime implicant: a product term obtained by combining the
maximum possible number of adjacent squares (combining all
possible maximum numbers of squares).
 Essential P.I.: a minterm is covered by only one prime implicant.
 The essential P.I. must be included.

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 Prime Implicants
 Consider F(A, B, C, D) = Σ(0, 2, 3, 5, 7, 8, 9, 10, 11, 13, 15)
 The simplified expression may not be unique
 F = BD+B'D'+CD+AD = BD+B'D'+CD+AB'
= BD+B'D'+B'C+AD = BD+B'D'+B'C+AB'

July 27, 2021 Figure 3.11 Simplification Using Prime Implicants 17

3.4 Five-Variable Map
 Map for more than four variables becomes complicated
 Five-variable map: two four-variable map (one on the top of the
other).

July 27, 2021 Figure 3.12 Five-variable Map 18

 Table 3.1 shows the relationship between the number of
adjacent squares and the number of literals in the term.

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 Example 3.7
 Example 3.7: simplify F = S(0, 2, 4, 6, 9, 13, 21, 23, 25,
29, 31)

F = A'B'E'+BD'E+ACE
July 27, 2021
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 3-5 Product of Sums Simplification
 Approach #1
 Simplified F' in the form of sum of products
 Apply DeMorgan's theorem F = (F')'
 F': sum of products → F: product of sums
 Approach #2: duality
 Combinations of maxterms (it was minterms)
 M0M1 = (A+B+C+D)(A+B+C+D') = (A+B+C)+(DD') = A+B+C
CD
AB 00 01 11 10
00 M0 M1 M3 M2
01 M4 M5 M7 M6
11 M12 M13 M15 M14
10 M8 M9 M11 M10
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 Example 3.8

Example 3.8: simplify F = S(0, 1, 2, 5, 8, 9, 10) into (a)
sum-of-products form, and (b) product-of-sums form:

a) F(A, B, C, D)= S(0, 1, 2, 5, 8,

9, 10) = B'D'+B'C'+A'C'D
b) F' = AB+CD+BD'
» Apply DeMorgan's theorem;
F=(A'+B')(C'+D')(B'+D)
» Or think in terms of maxterms

Figure 3.14 Map for Example 3.8, F(A, B, C, D)= S(0, 1,

2, 5, 8, 9, 10) = B'D'+B'C'+A'C'D
July 27, 2021
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Example 3.8 (cont.)
 Gate implementation of the function of Example 3.8

Sum-of products form Product-of sums form

Figure 3.15 Gate Implementation of the Function of Example 3.8

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 Sum-of-Minterm Procedure
 Consider the function defined in Table 3.2.
 In sum-of-minterm:

F ( x, y , z ) =  (1,3, 4,6)
 In sum-of-maxterm:

F ( x, y , z ) =  (0, 2,5,7)
 Taking the complement of F

F ( x, y , z ) = ( x  z)( x  z )

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 Sum-of-Minterm Procedure
 Consider the function defined in Table 3.2.
 Combine the 1’s:

F ( x, y , z ) = xz  xz
 Combine the 0’s :

F'( x, y , z ) = xz  xz

Figure 3.16 Map for the function of Table 3.2

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 3-6 Don't-Care Conditions
 The value of a function is not specified for certain
combinations of variables
 BCD; 1010-1111: don't care
 The don't-care conditions can be utilized in logic
minimization
 Can be implemented as 0 or 1
 Example 3.9: simplify F(w, x, y, z) = S(1, 3, 7, 11, 15)
which has the don't-care conditions d(w, x, y, z) = S(0, 2,
5).

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Example 3.9 (cont.)
 F = yz + w'x'; F = yz + w'z
 F = S(0, 1, 2, 3, 7, 11, 15) ; F = S(1, 3, 5, 7, 11, 15)
 Either expression is acceptable

Figure 3.17 Example with don't-care Conditions

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3-7 NAND and NOR Implementation
 NAND gate is a universal gate
 Can implement any digital system

Figure 3.18 Logic Operations with NAND Gates

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NAND Gate
 Two graphic symbols for a NAND gate

Figure 3.19 Two Graphic Symbols for NAND Gate

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 Two-level Implementation
 Two-level logic
 NAND-NAND = sum of products
 Example: F = AB+CD
 F = ((AB)' (CD)' )' =AB+CD

July 27, 2021 Figure 3.20 Three ways to implement F = AB + CD 30

 Example 3.10
 Example 3-10: implement F(x, y, z) =

F ( x, y , z ) =  (1, 2,3, 4,5,7) F ( x, y , z ) = xy   xy  z

July 27, 2021 Figure 3.21 Solution to Example 3-10 31

Procedure with Two Levels NAND
 The procedure
 Simplified in the form of sum of products;
 A NAND gate for each product term; the inputs to each NAND
gate are the literals of the term (the first level);
 A single NAND gate for the second sum term (the second level);
 A term with a single literal requires an inverter in the first level.

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Multilevel NAND Circuits
 Boolean function implementation
 AND-OR logic → NAND-NAND logic
 AND → AND + inverter
 OR: inverter + OR = NAND
 For every bubble that is not compensated by another small circle
along the same line, insert an inverter.

July 27, 2021 Figure 3.22 Implementing F = A(CD + B) + BC 33

NAND Implementation

July 27, 2021 Figure 3.23 Implementing F = (AB +AB)(C+ D) 34

NOR Implementation
 NOR function is the dual of NAND function.
 The NOR gate is also universal.

July 27, 2021 Figure 3.24 Logic Operation with NOR Gates
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 Two Graphic Symbols for a NOR Gate

Figure 3.25 Two Graphic Symbols for NOR Gate

Example: F = (A + B)(C + D)E

July 27, 2021 Figure 3.26 Implementing F = (A + B)(C + D)E 36

 Example

Example: F = (AB +AB)(C + D)

Figure 3.27 Implementing F = (AB +AB)(C + D) with NOR gates

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 3-8 Other Two-level Implementations (
 Wired logic
 A wire connection between the outputs of two gates
 Open-collector TTL NAND gates: wired-AND logic
 The NOR output of ECL gates: wired-OR logic

F = ( AB )  (CD ) = ( AB  CD ) = ( A  B)(C   D) AND-OR-INVERT function

F = ( A  B )  (C  D ) = [( A  B )(C  D )] OR-AND-INVERT function

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Figure 3.28 Wired Logic
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Non-degenerate Forms
 16 possible combinations of two-level forms
 Eight of them: degenerate forms = a single operation
 AND-AND, AND-NAND, OR-OR, OR-NOR, NAND-OR, NAND-
NOR, NOR-AND, NOR-NAND.
 The eight non-degenerate forms
 AND-OR, OR-AND, NAND-NAND, NOR-NOR, NOR-OR, NAND-
AND, OR-NAND, AND-NOR.
 AND-OR and NAND-NAND = sum of products.
 OR-AND and NOR-NOR = product of sums.
 NOR-OR, NAND-AND, OR-NAND, AND-NOR = ?

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AND-OR-Invert Implementation
 AND-OR-INVERT (AOI) Implementation
 NAND-AND = AND-NOR = AOI
 F = (AB+CD+E)'
 F' = AB+CD+E (sum of products)

Figure 3.29 AND-OR-INVERT circuits, F = (AB +CD +E)

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OR-AND-Invert Implementation
 OR-AND-INVERT (OAI) Implementation
 OR-NAND = NOR-OR = OAI
 F = ((A+B)(C+D)E)'
 F' = (A+B)(C+D)E (product of sums)

Figure 3.30 OR-AND-INVERT circuits, F = ((A+B)(C+D)E)'

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 Tabular Summary and Examples
 Example 3-11: F = x'y'z'+xyz'
 F' = x'y+xy'+z
 F = (x'y+xy'+z)'
 F = x'y'z' + xyz'
 F' = (x+y+z)(x'+y'+z)
 F = ((x+y+z)(x'+y'+z))'
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(F': sum of products)
(F: AOI implementation)
(F: sum of products)
(F': product of sums)
(F: OAI)
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Tabular Summary and Examples

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July 27, 2021 Figure 3.31 Other Two-level Implementations 44
3-9 Exclusive-OR Function
 Exclusive-OR (XOR)
 xy = xy'+x'y
 Exclusive-NOR (XNOR)
 (xy)' = xy + x'y'
 Some identities
 x0 = x
 x1 = x'
 xx = 0
 xx' = 1
 xy' = (xy)'
 x'y = (xy)'
 Commutative and associative
 AB = BA
 (AB) C = A (BC) = ABC

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Exclusive-OR Implementations
 Implementations
 (x'+y')x + (x'+y')y = xy'+x'y = xy

July 27, 2021 Figure 3.32 Exclusive-OR Implementations 46

Odd Function
 ABC = (AB'+A'B)C' +(AB+A'B')C = AB'C'+A'BC'+ABC+A'B'C
= S(1, 2, 4, 7)
 XOR is a odd function → an odd number of 1's, then F = 1.
 XNOR is a even function → an even number of 1's, then F = 1.

Figure 3.33 Map for a Three-variable Exclusive-OR Function

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XOR and XNOR
 Logic diagram of odd and even functions

Figure 3.34 Logic Diagram of Odd and Even Functions

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Four-variable Exclusive-OR
function
 Four-variable Exclusive-OR function
 ABCD = (AB'+A'B)(CD'+C'D) =
(AB'+A'B)(CD+C'D')+(AB+A'B')(CD'+C'D)

Figure 3.35 Map for a Four-variable Exclusive-OR Function

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Parity Generation and Checking
 Parity Generation and Checking
 A parity bit: P = xyz
 Parity check: C = xyzP
 C=1: one bit error or an odd number of data bit error
 C=0: correct or an even # of data bit error

Figure 3.36 Logic Diagram of a Parity Generator and Checker

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Parity Generation and Checking

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Parity Generation and Checking

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