(Bharat Kumar) (18ESKEE029)

B. Tech VIth Sem. Session: 2020-

6EE4-23 Power System Protection 2021
Lab

POWER SYSTEM PROTECTION LAB

Department of Electrical Engineering

B.TECH, VI SEM
ELECTRICAL ENGINEERING

Submitted To: Submitted by:

(Dr. Akash Saxena) (Bharat Kumar)
Professor, EE Dept. B.TECH VI SEM
SKIT, JAIPUR Roll No:-18ESKEE029

SKIT/EE Department/ Page | 1

PSPLAB
 LIST OF EXPERIMENTS

1. To determine fault type, fault impedance and fault location during single
line to ground fault.
2. To determine fault type, fault impedance and fault location during single
line-to line fault.
3. To determine fault type, fault impedance and fault location during double
line to ground fault.
4. To study the operation of micro-controller based over current relay in
DMT type and IDMT type.
5. To analyse the operation of micro-controller based directional over current
relay in DMT type and IDMT type.
6. To study the micro-controller based under voltage relay.
7. To study the micro-controller based over voltage relay.
8. To study the operation of micro-controller based un-biased single-phase
differential relay.
9. To study the operation of micro-controller based biased single-phase
differential relay.
10.To study the operation of micro-controller un-based biased three phase
differential relay.
11.To study the operation of micro-controller based biased three phase
differential relay.
 CONTENTS

S. No. CONTENTS Page No.

1. List of Experiments 2
2. Contents 3
3. Experiment No. 1 4-7
4. Assignment 1 8-10
5. Experiment No. 2 11-14
6. Assignment 2 15-17
7. Experiment No. 3 18-19
8. Assignment 3 20-22
9. Experiment No. 4 23-25
10. Experiment No. 5 26-27
11. Assignment 4 & 5 28-
 Experiment No- 1

Object:
To determine fault type, fault impedance and fault location during single line to
ground fault.

Theory:

Fault: Normally, a power system operates under balanced conditions. When the system
becomes unbalanced due to the failures of insulation at any point or due to the contact of live
wires, a short–circuit or fault, is said to occur in the line. Faults may occur in the power system
due to the number of reasons like natural disturbances (lightning, high-speed winds,
earthquakes), insulation breakdown, falling of a tree, bird shorting, etc.
Faults that occurs in transmission lines are broadly classified as:
(1) Symmetrical faults
(2) Unsymmetrical faults

Symmetrical faults :
In such types of faults, all the phases are short-circuited to each other and often to earth. Such
fault is balanced in the sense that the systems remain symmetrical, or we can say the lines
displaced by an equal angle (i.e. 120° in three phase line). It is the most severe type of fault
involving largest current, but it occurs rarely. For this reason balanced short- circuit calculation
is performed to determine these large currents.

Unsymmetrical faults :
Unsymmetrical faults involve only one or two phases. In unsymmetrical faults the three phase
lines become unbalanced. Such types of faults occur between line-to-ground or between lines.
An unsymmetrical series fault is between phases or between phase-to-ground, whereas
unsymmetrical shunt fault is an unbalanced in the line impedances. Shunt fault in the three
phase system can be classified as;
(1) Single line-to-ground fault (LG).
(2) Line-to-line fault (LL).
(3) Double Line-to-ground fault (LLG).

Single line to ground fault:

Let us consider a three phase system with earthed neutral as shown below:
 Fig 1.1 Three phase system with earthed neutral
Let us assume that a ground fault takes place in A phase (In many industries and numerical
relays, normally the phases are said as A, B and C instead of R, Y and B, though they represent
the same thing i.e. A phase means R phase, B means Y phase and C means B phase). Ea, Eb
and Ecare the Generator terminal voltage per phase. Bold letters here represent vector form.
Because of ground fault in A phase, the voltage at the point of fault will become zero and
current through the other phases i.e. B and C phases will become zero. Therefore we can write
as
Va = 0
Ib = 0
Ic = 0
Therefore, from the Calculation of Symmetrical Components, we can write as-

Ia0 = (Ia + Ib + Ic)/3 = Ia/3

Ia1 = (Ia + λIb + λ2Ic)/3 = Ia/3

and,

Ia2 = (Ia + λ2Ib + λIc)/3 = Ia/3

From the above expressions of positive, negative and zero sequence components of current in
faulted phase A, we observe that all the sequence currents are equal in magnitude and phase.
Thus for faulted phase, in case of Single Line to Ground Fault, we can write
Ia0= Ia1 = Ia2 = Ia/3.

Calculation of Fault Current:

First thing which must be understood at this point, that fault current is completing its path
through the grounded neutral. If there were no any grounded neutral, no fault current would
have been flow.
We will apply Kirchhof’s voltage law here to find the fault current. As fault current is only
flowing in the faulted phase A, therefore we are only interested in finding Ia.
Ea = Va + Ia0Z0 + Ia1Z1+ Ia2Z2
= 0 + Ia0Z0+ Ia1Z1 + Ia2Z2
⇒ Ea = Ia0Z0 + Ia1Z1 + Ia2Z2
But
Ia0 = Ia1= Ia2 = Ia/3 so,
Ea = Ia/3 Z0 + Ia/3 Z1 + Ia/3 Z2
⇒ Ia = 3Ea / (Z0 + Z1+ Z2)

From the above expression of fault current, it is quite clear that positive, negative and zero
sequence impedance are connected in series for Single Line to Ground Fault and the equivalent
circuit may be represented as shown below.

Fig 1.2 Connection of sequence networks for L-G fault

The above expression for fault current has been derived assuming that the neutral of the system
is solidly grounded. For a system where neutral is grounded through some finite resistance, say
Z, then the fault current would be given as
Ia= 3Ea / (Z0 + Z1 + Z2+ Z)

It shall also be noted that, for ungrounded system or isolated neutral system as there is no path
for neutral current to flow, therefore the impedance seen by zero sequence current will be
infinite (as only zero sequence current flows through the neutral) and hence the value of zero
sequence component of fault current will be zero.
Calculation of Voltage of Healthy and Faulty Phases:

Since the generated voltage of Generator is positive sequence voltage, therefore

Ea0 = 0
Ea1 = Ea
Ea2 = 0

Now, the positive sequence voltage at the point of fault

Va1 = Ea – Ia1Z1
= Ea – EaZ1/ (Z0 + Z1+ Z2)
⇒ Va1 = (Z2 + Z0)Ea/ (Z0 + Z1 + Z2)

Similarly,
Va2= 0 – Ia2Z2
= –Ea Z2/ (Z0 + Z1 + Z2)
and
Va0 = 0 – Ia0Z1
= Ea Z0/ (Z0+ Z1 + Z2)

Thus we have calculated the sequence components of voltages of faulty phase. For calculating
the voltages of healthy phase we will apply the concept of symmetrical components as shown
below.
Vb= Vb0 + λ2Vb1 + λVb1
Vc= Vc0 + λVc1 + λ2Vc1

In this way, we can calculate the level of earth fault current in Single Line to Ground fault and
voltages of different phases.

Result: Thus we have studied about Line to ground fault, its impact on power system, fault
current and line voltage of different phases after fault.

Assignment 1
Q.1):
A Single line diagram of a single power system is shown in figure. The neutral of each
generator is grounded through a current limiting reactor of 0.2513 per unit on 100MVA base.
A system data expressed in per unit on a common 100 MVA base is tabulated below. The
generator is running on a no load at their rated voltage and frequency with their emf in phase.
Determine the fault current for the following faults.
a) A balanced 3Φ fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0(bolted
fault).
b) A single line to ground fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0.
c) A line to line fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0.
d) A double line to ground fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0.

Fig. 1.1- A Single line diagram of a single power system

Base Voltage Z1(p.u.) Z2(p.u.) Z0(p.u.)

MVA Rating
G1 100 20kv 0.15 0.15 0.05
G2 100 20kv 0.15 0.15 0.05
T1 100 20/220kv 0.1 0.1 0.1
T2 100 20220kv 0.1 0.1 0.2
L12 100 220kv 0.125 0.125 0.3
L13 100 220kv 0.15 0.15 0.35
L23 100 220kv 0.25 0.25 0.7135
%*********************************************%
% NAME :- KAPIL GUPTA %
% ROLL NO. :- 18ESKEE057 %
% SECTION :- A(L3) %
% L_G Fault %
%*********************************************%

clc
clear
E=1.0;
Xg1=j*0.25; %Impedance of generator 1
Xg1_1=j*0.15; %Positive Sequence of generator 1
Xg1_2=Xg1_1; %Negative Sequence of generator 1
Xg1_0=j*0.05; %Zero Sequence of generator 1
Xg2_1=j*0.15; %Positive Sequence of generator 2
Xg2_2=Xg1_1; %Negative Sequence of generator 2
Xg2_0=j*0.05; %Zero Sequence of generator 2
Xt1=j*0.1; %Impedance of transformer 1
Xt1_1=j*0.1; %Positive Sequence of transformer 1
Xt1_2=Xt1_1; %Negative Sequence of transformer 1
Xt1_0=j*0.1; %Zero Sequence of transformer 1
Xt2_1=j*0.1; %Positive Sequence of transformer 2
Xt2_2=Xt1_1; %Negative Sequence of transformer 2
Xt2_0=j*0.1; %Zero Sequence of transformer 2
XI12_1=j*0.125;
XI12_2=XI12_1;
XI12_0=j*0.3;
XI13_1=j*0.15;
XI13_2=XI13_1;
XI13_0=j*0.35;
XI23_1=j*0.25;
XI23_2=XI23_1;
XI23_0=j*0.7125;
Zf=j*0.1;

%positive sequence impedance

Z1s_1=XI12_1*XI13_1/(XI12_1+XI13_1+XI23_1);
Z2s_1=XI12_1*XI23_1/(XI12_1+XI13_1+XI23_1);
Z3s_1=XI13_1*XI23_1/(XI12_1+XI13_1+XI23_1);
Z3_1=((Xg1_1+Xt1_1+Z1s_1)*(Xg2_1+Xt2_1+Z2s_1)/(Xg1_1+Xt1_1+Z1s_1+Xg2_1+Xt2
_1+Z2s_1))+Z3s_1;

%negative sequence impedance

Z3_2=Z3_1;

%zero sequence impedance

Z1s_0=XI12_0*XI13_0/(XI12_0+XI13_0+XI23_0);
Z2s_0=XI12_0*XI23_0/(XI12_0+XI13_0+XI23_0);
(Bharat Kumar) (18ESKEE029)
B. Tech VIth Sem. Session: 2020-
6EE4-23 Power System Protection 2021
Lab
Z3s_0=XI13_0*XI23_0/(XI12_0+XI13_0+XI23_0);
Z3_0=((Xg1+Xg1_0+Xt1_0+Z1s_0)*(Xt2_0+Z2s_0)/(Xg1+Xg1_0+Xt1_0+Z1s_0+Xt2_0+Z
2s_0))+Z3s_0;

%fault current
Ia_0=E/(Z3_1+Z3_2+Z3_0+3*Zf)

%LG fault
Ia_1=Ia_0;
Ia_2=Ia_0;
a=cosd(120)+j*sind(120);
A=[1 1 1;1 a^2 a;1 a a^2];
I012=[Ia_0;Ia_1;Ia_2];
Iabc=A*I012;
rho=abs(A);
theta=angle(A);
Iabcp=rho*exp(j*theta)

Result:-
Ia_0 =

0.0000 - 0.9174i

Iabcp =

3.0000 + 0.0000i -0.0000 + 0.0000i -0.0000 + 0.0000i

3.0000 + 0.0000i -0.0000 + 0.0000i -0.0000 - 0.0000i
3.0000 + 0.0000i -0.0000 + 0.0000i -0.0000 - 0.0000i

SKIT/EE Department/ Page | 10

PSPLAB
(Bharat Kumar) (18ESKEE029)
B. Tech VIth Sem. Session: 2020-
6EE4-23 Power System Protection 2021
Lab
Experiment No- 2

Object: To determine fault type, fault impedance and fault location during line
to line fault.

Theory:

Line to Line fault:

When two conductors of a 3 phase system are the short-circuited line to line fault or
unsymmetrical fault occurs. This fault is severe compared to symmetrical faults in the power
system.

Fig 2.1 Three phase system with earthed neutral

Fault Current Calculation in Line to Line Fault

Consider a 3-phase system with an earthed neutral. Assume a line-to-line fault between the
blue (B) and yellow (Y) lines as shown in the figure. The conditions created by this fault lead
to :

SKIT/EE Department/ Page | 11

PSPLAB
Again taking R-phase as the reference, we have ,

Take the above result as equation (i)

Take the above result as equation (ii)

From the above steps, it is clear that the line-to-line fault the zero sequence component of
current I0 is equal to zero in line to a line fault.

Fig 2.2 Connection of sequence networks for L-L fault

Fault Current in Line-to-Line Fault: Sequence impedance should be connected as shown in

the above figure. It is clear from the figure that :
Phase Voltages. Since the generated e.m.f. the system is of positive phase sequence only, the
sequence components of e.m.f. in R-phase are :
Note:

Result:

Thus we have studied about Line to line fault, its impact on power system, fault current and line
voltage of different phases after fault.
 Assignment 2

Q.1)
A Single line diagram of a single power system is shown in figure. The neutral of each
generator is grounded through a current limiting reactor of 0.2513 per unit on 100MVA base.
A system data expressed in per unit on a common 100 MVA base is tabulated below. The
generator is running on a no load at their rated voltage and frequency with their emf in phase.
Determine the fault current for the following faults.
a) A balanced 3Φ fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0(bolted
fault).
b) A single line to ground fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0.
c) A line to line fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0.
d) A double line to ground fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0.

Base Voltage Z1(p.u.) Z2(p.u.) Z0(p.u.)

MVA Rating
G1 100 20kv 0.15 0.15 0.05
G2 100 20kv 0.15 0.15 0.05
T1 100 20/220kv 0.1 0.1 0.1
T2 100 20220kv 0.1 0.1 0.2
L12 100 220kv 0.125 0.125 0.3
L13 100 220kv 0.15 0.15 0.35
L23 100 220kv 0.25 0.25 0.7135
%****************************************%
% NAME :- KAPIL GUPTA %
% ROLL NO. :- 18ESKEE057 %
% SECTION :- A(L3) %
% L_L Fault %
%****************************************%

clc
clear
E=1.0;
Xg1=j*0.25; %Impedance of generator 1
Xg1_1=j*0.15; %Positive Sequence of generator 1
Xg1_2=Xg1_1; %Negative Sequence of generator 1
Xg1_0=j*0.05; %Zero Sequence of generator 1
Xg2_1=j*0.15; %Positive Sequence of generator 2
Xg2_2=Xg1_1; %Negative Sequence of generator 2
Xg2_0=j*0.05; %Zero Sequence of generator 2
Xt1=j*0.1; %Impedance of transformer 1
Xt1_1=j*0.1; %Positive Sequence of transformer 1
Xt1_2=Xt1_1; %Negative Sequence of transformer 1
Xt1_0=j*0.1; %Zero Sequence of transformer 1
Xt2_1=j*0.1; %Positive Sequence of transformer 2
Xt2_2=Xt1_1; %Negative Sequence of transformer 2
Xt2_0=j*0.1; %Zero Sequence of transformer 2
XI12_1=j*0.125;
XI12_2=XI12_1;
XI12_0=j*0.3;
XI13_1=j*0.15;
XI13_2=XI13_1;
XI13_0=j*0.35;
XI23_1=j*0.25;
XI23_2=XI23_1;
XI23_0=j*0.7125;
Zf=j*0.1;

%positive sequence impedance

Z1s_1=XI12_1*XI13_1/(XI12_1+XI13_1+XI23_1);
Z2s_1=XI12_1*XI23_1/(XI12_1+XI13_1+XI23_1);
Z3s_1=XI13_1*XI23_1/(XI12_1+XI13_1+XI23_1);
Z3_1=((Xg1_1+Xt1_1+Z1s_1)*(Xg2_1+Xt2_1+Z2s_1)/(Xg1_1+Xt1_1+Z1s_1+Xg2_1+Xt2
_1+Z2s_1))+Z3s_1;

%negative sequence impedance

Z3_2=Z3_1;

%zero sequence impedance

Z1s_0=XI12_0*XI13_0/(XI12_0+XI13_0+XI23_0);
Z2s_0=XI12_0*XI23_0/(XI12_0+XI13_0+XI23_0);
Z3s_0=XI13_0*XI23_0/(XI12_0+XI13_0+XI23_0);
Z3_0=((Xg1+Xg1_0+Xt1_0+Z1s_0)*(Xt2_0+Z2s_0)/(Xg1+Xg1_0+Xt1_0+Z1s_0+Xt2_0+Z
2s_0))+Z3s_0;

%fault current
Ia_0=E/(Z3_1+Z3_2+Z3_0+3*Zf)

%LL fault
Ia_0=0;
Ia_1=E/(Z3_1+Z3_2+Zf);
Ia_2=-Ia_1;
a=cosd(120)+j*sind(120);
A=[1 1 1;1 a^2 a;l a a^2];
I012=[Ia_0;Ia_1;Ia_2];
Iabc=A*I012;
rho=abs(Iabc);
theta=angle(Iabc);
Iabcp=rho.*exp(j*theta)

Result:
Z3_1 =
0 + 0.2200i
Z3_2 =
0 + 0.2200i
Z3_0 =
0 + 0.3500i
Ia_0 =
0 - 0.9174i

Iabcp =
0
-3.2075 + 0.0000i
3.2075 - 0.0000i
 Experiment No- 3
Object: To determine fault type, fault impedance and fault location during
double line to ground fault.

Theory:

Double Line to ground fault:

Figure shows a Double Line to Ground Fault at F in a power system. The fault may in general
have an impedance Zf as shown

Fig 3.1 Double line to ground fault through Impedance Zf

The current and voltage (to ground) conditions at the fault are expressed as

The symmetrical components of voltages are given by

from which it follows that

we can draw the connection of sequence networks as shown .

Fig 3.2 Connection of sequence networks for L-L-G fault

In terms of the Thevenin equivalents, we can write

So, we can found other phase voltages and line voltages as well.

Result:

Thus we have studied about Double Line to ground fault, its impact on power system, fault
current and line voltage of different phases after fault.
(Bharat Kumar) (18ESKEE029)
B. Tech VIth Sem. Session: 2020-
6EE4-23 Power System Protection 2021
Lab
Assignment 3

Q.1)
A Single line diagram of a single power system is shown in figure. The neutral of each
generator is grounded through a current limiting reactor of 0.2513 per unit on 100MVA base.
A system data expressed in per unit on a common 100 MVA base is tabulated below. The
generator is running on a no load at their rated voltage and frequency with their emf in phase.
Determine the fault current for the following faults.
a) A balanced 3Φ fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0(bolted
fault).
b) A single line to ground fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0.
c) A line to line fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0.
d) A double line to ground fault at bus-3 through a fault impedance Zf=0.1 per unit and Zf=0.

Base Voltage Z1(p.u.) Z2(p.u.) Z0(p.u.)

MVA Rating
G1 100 20kv 0.15 0.15 0.05
G2 100 20kv 0.15 0.15 0.05
T1 100 20/220kv 0.1 0.1 0.1
T2 100 20220kv 0.1 0.1 0.2
L12 100 220kv 0.125 0.125 0.3
L13 100 220kv 0.15 0.15 0.35
L23 100 220kv 0.25 0.25 0.7135

SKIT/EE Department/ Page | 20

PSPLAB
%***************************************%
% NAME :- KAPIL GUPTA %
% ROLL NO. :- 18ESKEE057 %
% SECTION :- A(L3) %
% LL_G Fault %
%***************************************%

clc
clear
E=1.0;
Xg1=1i*0.25; %Impedance of generator 1
Xg1_1=j*0.15; %Positive Sequence of generator 1
Xg1_2=Xg1_1; %Negative Sequence of generator 1
Xg1_0=j*0.05; %Zero Sequence of generator 1
Xg2_1=j*0.15; %Positive Sequence of generator 2
Xg2_2=Xg1_1; %Negative Sequence of generator 2
Xg2_0=j*0.05; %Zero Sequence of generator 2
Xt1=j*0.1; %Impedance of transformer 1
Xt1_1=j*0.1; %Positive Sequence of transformer 1
Xt1_2=Xt1_1; %Negative Sequence of transformer 1
Xt1_0=j*0.1; %Zero Sequence of transformer 1
Xt2_1=j*0.1; %Positive Sequence of transformer 2
Xt2_2=Xt1_1; %Negative Sequence of transformer 2
Xt2_0=j*0.1; %Zero Sequence of transformer 2
XI12_1=j*0.125;
XI12_2=XI12_1;
XI12_0=j*0.3;
XI13_1=j*0.15;
XI13_2=XI13_1;
XI13_0=j*0.35;
XI23_1=j*0.25;
XI23_2=XI23_1;
XI23_0=j*0.7125;
Zf=j*0.1;

%positive sequence impedance

Z1s_1=XI12_1*XI13_1/(XI12_1+XI13_1+XI23_1);
Z2s_1=XI12_1*XI23_1/(XI12_1+XI13_1+XI23_1);
Z3s_1=XI13_1*XI23_1/(XI12_1+XI13_1+XI23_1);
Z3_1=((Xg1_1+Xt1_1+Z1s_1)*(Xg2_1+Xt2_1+Z2s_1)/(Xg1_1+Xt1_1+Z1s_1+Xg2_1+Xt2
_1+Z2s_1))+Z3s_1

%negative sequcnce impcdance

Z3_2=Z3_1

%zero saqucnce ionmpedance

Z1s_0=XI12_0*XI13_0/(XI12_0+XI13_0+XI23_0);
Z2s_0=XI12_0*XI23_0/(XI12_0+XI13_0+XI23_0);
Z3s_0=XI13_0*XI23_0/(XI12_0+XI13_0+XI23_0);
Z3_0=((Xg1+Xg1_0+Xt1_0+Z1s_0)*(Xt2_0+Z2s_0)/(Xg1+Xg1_0+Xt1_0+Z1s_0+Xt2_0+Z
2s_0))+Z3s_0

%fault current
Ia_0=E/(Z3_1+Z3_2+Z3_0+3*Zf)

%LLL fault

If=E/(Z3_1+Zf);
rho=abs(If);
theta=angle(If);
Ifp=rho*exp(j*theta)

%LLG fault
Ia_1=E/(Z3_1+(Z3_2+(Z3_0+3*Zf))/(Z3_2+Z3_0+3*Zf));
Ia_2=-(E-Z3_1*Ia_1)/Z3_2;
Ia_0=-(E-Z3_1*Ia_1)/(Z3_0+3*Zf);
a=cosd(120)+j*sind(120);
A=[1 1 1;1 a^2 a;l a a^2];
I012=[Ia_0;Ia_1;Ia_2];
Iabc=A*I012;
rho=abs(Iabc);
theta=angle(Iabc);
Iabcp=rho.*exp(j*theta)

Result:
Z3_1 =
0.0000 + 0.2200i
Z3_2 =
0.0000 + 0.2200i
Z3_0 =
0.0000 + 0.3500i
Ia_0 =
0.0000 - 0.9174i
Ifp =
0.0 - 3.1250i
Iabcp =
2.2305 + 5.5932i
-4.5675 - 0.5954i
3.3055 - 0.5954i
 Experiment No- 4

Object: To study the operation of micro-controller based over current relay in

DMT type and IDMT type.

Theory:

With the developments in large scale integrated technology, sophisticated and fast
microprocessors are coming up. Their applications to the problems of protective relaying
schemes are of current interest to power system engineers. With the growing complexity of
modern power networks, fast, accurate and reliable protective schemes are becoming
necessary. Microprocessor based protective schemes can easily fulfil these requirements at
competitive price. These schemes offer attractive compactness and flexibility. They reduce the
number and types of relaying units.
Electromechanical relays were used in the beginning for protection in power systems. These
had several drawbacks such as high burden on instrument transformers, high operating time,
contact problems, frequent maintenance etc. Solid state relays which avoid most of these
disadvantages are gradually replacing electromagnetic relays. Static relays have also been
increasingly used in recent years because of their inherent advantages of compactness, lower
burden, less maintenance, sensitivity and high speed. Though successfully used, these suffer
from a number of disadvantages such as inflexibility, duplication of specification efforts,
inadaptibi1ity to changing system conditions, complexity and cost. Software schemes avoid
most of these disadvantages. Programmable equipment can respond fast and can be used to
implement complex threshold characteristics at low 120 cost. They can also be self-checking
in nature thereby requiring less maintenance and providing greater reliability.
So digital relaying implementation was first proposed in 1969 and a large number of
researchers turned their attention towards the use of digital computers in power system
protection and particularly for transmission line protection. With the advent of the
microprocessors, the implementation of transmission line protection scheme promises to be
cost-effective. The microprocessor based protection scheme is especially preferred for
transmission line since several types of threshold characteristics can be implemented with the
same hardware or with a minimum change in hardware. The equipment is also self-checking
in nature.

Microprocessor based overcurrent relays: Overcurrent relays are used for the protection of
distribution circuits owned and operated by utilities and customers. Many subtransmission lines
are also protected by relays of this type. Distribution circuits are sometimes interconnected to
form loops. In these situations, the over current relays alone can not protect the circuits
effectively. Ability to detect the direction of "power flow" along with the ability to detect
current exceeding a threshold is generally used 121 for protection of loop circuits.
Principle, technique and procedure involved in the relays:
This scheme is designed for the operation of four types of relays. The different four types of
relays are
1. Inverse Definite Minimum Time (IDMT) overcurrent relay.
2. Definite Minimum Time (DMT) overcurrent relay.
3. Phase Comparator (Directional Relay).
4. Reverse Power Relay.

Inverse definite minimum time (IDMT) overcurrent relay:

The time-current characteristic of an overcurrent relay is given by t = KM/(In -1) where K is
the design constant, M is the time multiplier setting and I is the multiple of tap current. The
operating time for different values of current are calculated and tabulated. These values are
stored in the memory as predetermined informations. The microprocessor obtains the required
signals to obtain a particular relaying characteristic by sending proper commands to the
multiplexer. The microprocessor receives signals only in voltage form.
The microprocessor obtains the required signals to obtain a particular relaying characteristic
by sending proper commands to the multiplexer. The microprocessor receives signals only in
voltage form. So a current to voltage converter has been developed to give an output voltage
proportional to the load current. This voltage is converted into a d.c. voltage using precision
rectifier.

Fig 4.1 Full wave Precision Rectifier

The output of the rectifier is fed to the multiplexer. The microprocessor sends a command to
switch on the channel S to obtain the rectified o current. This rectified current is fed to the A/D
converter which uses the successive approximation method to convert analog signal to digital.
The microprocessor sends a signal to the A/D converter for start of conversion and examines
whether the start of conversion is over or not. The microprocessor, after receiving the end of
conversion from the A/D converter, reads the current signal in digital form and examines
whether it is more than pick up value. If current exceeds the pick-up value, the microprocessor
sends the tripping signal. In this type of an over current relay, the microprocessor can sense the
fault currents of a number of lines using multiplexers and send the tripping signal to the circuit
breaker of the faulty line.

Definite minimum time (DMT) over current relay:

In the case of definite minimum time over current relay, the operating time is constant
irrespective of the magnitude of the current above the pickup value. The microprocessor first
compares the measured current with the pick-up value of the current which remains in the
memory as the stored information. If the measured current is more than the pick-up value, the
microprocessor sends tripping signal after a predetermined delay. The program of a DMT
overcurrent relay is simpler than that of a IDMT over current relay.

Conclusion:
The performance of the relays during fault conditions are quite satisfactory. These re lavs are
fast, accurate and reliable. With the help of same programme, any type of time-current
characteristics such as inverse, very inverse, extremely inverse etc. can be obtained using
proper data. These types of relays can be used in multicircuit lines and the microprocessor can
sense fault current using multiplexer in a particular faulty line and send tripping signal to that
line. These relays offer compactness and flexibility.

Result:

Thus we have successfully studied the working principle of microprocessor based DMT and
IDMT type overcurrent relay.
Q.2) Design protection scheme for parallel feeder protection and ring main feeder protection .
Q.3) Draw the CT connection of percentage biased differential relay for a power transformer
having connections of

a) star star

b) star delta