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*X86959*

Reg. No. :

Question Paper Code : X86959

M.E./M.Tech. Degree Examinations, April/May 2021


Second Semester
VLSI Design
VL5004 – Nano scale devices
(Regulations 2017)

Time : Three Hours Maximum : 100 Marks

Answer all questions

Part – A (10×2=20 Marks)

1. State carrier mobility which is defined by Drude’s equation.

2. Why planarized gate is highly desirable in multigate technology ?

3. How inter-subband scattering occurred in Multigate ?

4. Define electron tunnel current.

5. Compare traditional mosfet with nanowire mosfet.

6. List the types of cntfets.

7. What is the role of radiation-induced trapped charge in the buried oxide ?

8. List any two applications of single event effects.

9. What is need of Multi-VT device integration ?

10. Draw mutigate sram traditional Schematic.


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Part – B (5×13=65 Marks)

11. a) i) Discuss in detail about short channel effects. (6)


ii) Explain in detail about Quantum effects. (7)
(OR)
b) Write a short note on the following multigate transistors.
i) Single gate (3)
ii) Double gate (3)
iii) Triple gate (3)
iv) Surround gate. (4)

12. a) Explain and anlayze in detail about one dimensional and two dimensional
electrostatics of a multigate MOS system with necessary diagrams. (13)
(OR)
b) i) Analyze the effect of gate voltage on electron concentration distribution
in the silicon body of the symmetrical DG MOS structure with neat
sketches. (6)
ii) Examine dependence of the energy levels on the gate oxide thickness in a
rectangular double-gate quantum well system with necessary diagrams. (7)

13. a) Explain and analyze the I-V characteristics for non degenerate carrier statics
and generative carrier statics of Silicon nanowire MOSFETs with suitable
equations. (13)
(OR)
b) i) Describe in detail about band structure of nanontubes with neat
sketches. (6)
ii) Write a short notes on single electron transistors with suitable
diagrams. (7)

14. a) i) Describe and analyze in detail about overview of total ionizing dose
effect. (6)
ii) Examine ionizing effects on advanced single-gate FDSOI devices and
advanced multi-gate devices. (7)
(OR)
b) Write a short notes of the following :
i) Single event effects (7)
ii) Scaling effects. (6)
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15. a) i) Describe in detail about impact of device performance on digital circuit


design with neat sketches. (6)
ii) Explain in detail about charge distribution based successive approximation
(SAR) ADC with relevant sketches. (7)
(OR)
b) Examine device figures of merit and technology related design issues with
suitable diagrams. (13)

Part – C (1×15=15 Marks)

16. a) Examine and explain in detail about any three real time applications of Carbon
Nanotube FETs with necessary diagrams. (15)
(OR)
b) Examine and describe in detail of about any three real time applications of
multigate devices with relevant sketches. (15)

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