Professional Documents
Culture Documents
E E
D
COMET DIS D
SI2 BUILD
2013.02.27
C C
B B
A A
DRAWER
DESIGN
EE
EDI CHEN
EDI CHEN
DATE
2013/1/8
2013/1/8
POWER
IRAY CHEN
IRAY CHEN
DATE
2013/1/8
2013/1/8
INVENTEC
CHECK EDI CHEN 2013/1/8 IRAY CHEN 2013/1/8 TITLE MODEL,PROJECT,FUNCTION
RESPONSIBLE EDI CHEN 2013/1/8 IRAY CHEN 2013/1/8 COMET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
EDP
EDP PANEL
F DDR3 / DDR3L DDR3 / DDR3L F
SODIMMX2
HD HP/MIC
DP AUDIO CODEC
DP DP RE-DRIVER HP/MIC DOCK
USB20
SMART CARD CONTROLLER SMART CARD
DP / CRT
CRT CONTROLLER WEB CAMERA
HASWELL FINGERPRINT
ULT
E KEYBOARD BLUETOOTH E
MINICARD(WLAN) SATA
2.5" HDD
RJ45 MSATA MODULE
NIC
RJ45 DOCK
SMBUS
ACCELEROMETER
C C
THERMAL SENSOR
NFC
PCIE
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
TABLE OF CONTENTS D
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 3 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
EN1V2A P1V2A
RT8068
P5V0DS
KBC_PWR_ON
P5V0A
ADP_EN
ADP_PRES 5/3.3V FDC7692
P3V3DS
LIMIT_SIGNAL OCP OCP_OC# KBC_PW_ON (TPS51225)
D ADAPTER SLP_S3#_3R
VRP5V0A_LDO
SLP_S3#_5R P5V0S D
ICS VRP3V3A_LDO
(90W) CHARGER_DAT
EN0 AO6424L
CHARGER
BQ24736 CHARGER_CLK
SPWON
P3V3S
AO6424L
KBC_PWR_ON
2ND BATTERY MAIN BATTERY FDMC7692 P3V3A
SLP_LAN#
FDC638APZ P3V3M
C C
EN_DGPU VRPVCORE_DGPU
PVBAT TPS51728
EN_VDDCI VRPVDDCI
B TPS51367 B
EN_1V35S_DGPU VRP1V35S_DGPU
TPS51367
EN_1V8S VRP1V8S
TPS51312
P1V05S
FDMS0310AS
SPWON (IAMT)
PAD P1V05S
(NON-IAMT)
PVCCIO_OUT_R P1V05S_VCCP PVCCIO_OUT
A CPU PAD PAD A
P1V05A P1V05M
EN1V05A TPS51362 PWRCTL_P1V05
AO6424L
PVCORE
EN_CPU
IMVP VI VGATE INVENTEC
TPS51622 TITLE
MODEL,PROJECT,FUNCTION
BLOCK DIAGRAM POWER
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 4 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVADPTR
OUT VADPBL 7
Q6010
ALPHA_AON7403L_DFN_8P
D S
8 8 1 1
7 7 2 2
220K_5%_2
6 3
0.1UF_16V_2
6 3
1
5 5 4 4
R6017
C6019
G
220K_5%_2
1
2 R6016
2
2
D 3
D
D
Q6009 G 1
SSM3K7002BFU
S
3
PVPACK
100K_5%_2
P3V3DS
21
D Q6012
R6005
G 1 ALPHA_AON7403L_DFN_8P
G
4 4 5 5
S
3 3 6 6
2
Q6013
2 2 7 7
SSM3K7002BFU
2
1 1
S D
8 8 PVBAT
IN ADP_EN 51
Q6011 R6000
1 S D 8 1 2
2 7 3 4
3 6
4 G 5 0.01_1%_6
NMOS_4D3S
POWERPAD_2_0610
C6028
2
RQ3E080BNFU7TB 1 2
DB2J31300L
1
4.3K_5%_2
1
C 0.1UF_16V_2 C
R6028
D6017
PAD6015
1
4.3K_5%_2
1
2
CSC0402_DY
R6018
2
1
2
1UF_25V_3
2
C6029
C6030
2
2
1
951 VADP_DEBUG IN IN PVBAT_CHG
10UF_25V_5
10UF_25V_5
5
6
7
8
1
1
10_5%_5
R6027
C6000
C6001
Q6000
D
AON7410
NMOS_4D3S
51 ADP_DET OUT
1
5
4
3
2
2
G
ACPRES
ACDRV
CMSRC
ACP
ACN
S
C6027
U6000 1UF_25V_3 PVPACK
21 2 1
4
3
2
1
TML
B TI_BQ24736RGRR_QFN_20P B
6
P5V0S PVADPTR P3V3DS ACDET
VCC 20 VRPVPACK_HG L6000 R6001
7 IOUT
PHASE 19 VRPVPACK_PH 1 2 1 2
18.2K_1%_2
8 SDA
18 3 4
LITEON_B0530W_DIODE
R6015 C6015
22K_5%_2
HIDRV ETQP3W4R7WFN
1
9
2
SCL
127K_1%
1
BTST 17 1 2 1 2
R6024
R6021
10 ILIM
1
R6029
REGN 16 0.02_1%_6
CSC0805_DY
10UF_25V_5
10UF_25V_5
LODRV
1
5
6
7
8
RSC_0603_DY
0_5%_2 0.047UF_16V_2
DLIM
GND
SRN
SRP
R7600
C6010
C6011
C6012
D6018
D6016
Q6001
D6049
D
R6022
AON7752
2
1UF_10V_2
1
2 1 1 2
2
2 1
2 1 C6023
C6025 1 2
11
12
13
14
15
3
1M_5%_2
2
DA2J10100L Q6019
1
1
10K_1%_2
ACDET>0.6V:SMBUS OK 0.1UF_16V_2
20K_1%_2
1
C6022
DB2J31300L
D
100PF_50V_2
G
R6030
1
ACDET>2.4V&<3.1V:ACOK
2
R6023
0.1UF_25V_2
0.1UF_25V_2
51 IN G
C7600
1
2
0.01UF_50V_2
1
C6024
C6021
4
3
2
1
S
CHG_RST
100PF_50V_2
C6032
SSM3K7002BFU CSC0402_DY
C6049
2
VRPVPACK_LG
2
2
2
R6025
1 2
A 9
A
OUT ICS R6020
SHORT_0402_15 1 2
51
17 BI
SDA_BAT_CHG
51
17 BI
SCL_BAT_CHG SHORT_0402_15
7 CHR_ILIM IN
R6049
7 1 2
V_3.9K IN
0.01UF_50V_2
1
10K_5%_2
INVENTEC
C6031
TITLE
2
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 5 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D6050
PVBATA
PVPACK 1 1 2 2
SS3040HE
Q6050 Q6051
S D D S
1 8 8 1
PVPACK P3V3DS 1 8 8 1
IN 3V3REF 7 8 24
18
10K_5%_2 220K_5%_2
2 2 7 7 7 7 2 2
1
3 3 6 6 6 6 3 3
100K_5%_2
200K_1%_2
R6079
P5V0DS
1
4 4 5 5 5 5 4 4
15K_5%_2
470K_5%_2
G G
R6928
R6927
R6932
D
1
R6064
ALPHA_AON7403L_DFN_8P
D
ALPHA_AON7403L_DFN_8P
1 2
2
R6926
1 2
R6080
8
V+
1M_5%_2
3 2
5 U6903
++IN 7 651
-
OUT OUT LATCHED_ALARM OUT MFET_A 6
470K_5%_2
6 -IN R6099
0.1UF_16V_2
1
2 1 1 2
133K_1%_2
2
2
2
V-
ON_LMV393DMR2G_SOP_8P IN MFET_B 6
C6905
R6081
4
64.9K_1%_2
1
R6929
D6058 100_5%_2
R6997
BAV99W_7_F
R6097
2
1
1
32 1 2
P3V3DS
10K_5%_2
Q6999 Q6053
1
3
S1
D
G 1 2 G1 Q6054
6
D
S
D1
D2 3 G 1
SSM3K7002BFU 5 G2
S
4
2
C S2
SSM3K7002BFU
C
L2N7002DW1T1G
2
FET_A
51
IN
D6060
PVBATB
PVPACK 1 1 2 2
SS3040HE
Q6060 Q6061
S D D S
1 1 8 8 8 8 1 1
10K_5%_2 220K_5%_2
2 2 7 7 7 7 2 2
1
3 3 6 6 6 6 3 3
R6070
4 4 5 5 5 5 4 4
470K_5%_2
G G
1
ALPHA_AON7403L_DFN_8P
B B
R6066
ALPHA_AON7403L_DFN_8P
1 2
R6069
3 2
470K_5%_2
2
OUT MFET_B 6
R6082
R6098
2 1 1 2
2
IN MFET_A 6
D6059 100_5%_2
BAV99W_7_F
1
R6096
1 2
10K_5%_2
Q6063
S1 1
2 G1
3
6 P3V3DS
D1
D2 3 Q6064
D
6
51 5 G2
LATCHED_ALARM OUT G 1
4
S2
S
L2N7002DW1T1G
A SSM3K7002BFU
A
2
FET_B
IN
51
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 6 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R6933
5 VADPBL 1 2
IN P5V0S
274K_1%_2 R6920 C6904
1 2 1 2
200K_1%_2
P5V0DS P3V3DS
1
R6931
665K_1%_2 1UF_10V_2 P5V0S
47K_5%_2
2
R6922 U6902
R6935
1 2 1 IN+ VCC 5
200K_1%_2
0.1UF_16V_2
200K_1%_2
1
8
V+
D
R6924
C6903
3 U6903
++IN 2
1
VEE
OUT 1
OUT ADP_PRES 51 D
2 -
-IN
86.6K_1%_2
CSC0402_DY
2
22K_5%_2
V-
1
ON_LMV393DMR2G_SOP_8P
R6930
2
R6934
C6906
17 2 1 3 4
OCP_MAIN# IN IN- OUTPUT
2K_5%_2
1M_1%_2
R6925
R6923
118K_1%_2 BCD_AZV321KTR_E1_SOT23_5P
R6919
1
2 1
2
17
OCP_TRAVEL# IN
R6921
118K_1%_2
2
IN 3V3REF 6 8 24
18
7
LIMIT_SIGNAL_100R OUT
D6902
Q6902
R6918
57
17 1 2 2 3 1 2
LIMIT_SIGNAL IN S D
100_5%_2 P3V3DS
R6937 BAV70W
1
G
2 1
3
1
7 VBIAS IN 0_5%_2 Q6903
B
C 5 V_3.9K
LES_LBSS84LT1G_SOT23_3P 2 3 C
OUT E C
619_1%_2
3900PF_16V_2
PMBT3906
100K_5%_2
R6917
RSC_0402_DY
1
1
R6916
C6902
R6915
12
OUT OCP_A_IN 51
BZT52-B4V7S_DY
2
1 2
P3V3DS
3.24K_1%_2
2
D6901
R6914
R6936
2 1 3 C E 2
47K_5%_2
Q6901
LMBT3904WT1G
1
2
5 CHR_ILIM OUT
B B
7 IN LIMIT_SIGNAL_100R P3V3DS
LIMIT_SIGNAL_100R
8.06K_1%_2
1
BASE
2 R6910
1
2 3
PVADPTR EMITTER COLLECTOR
8.66K_1%_2
220K_5%_2
1
2 R6902 1
Q6900
LES_LMBT3906WT1G_SOT323_3P
2 R6909
A A
VBIAS OUT 7
VBIAS
ADP_A_ID OUT 7 51
130K_1%_2
ADP_A_ID
2 R6903 1
45.3K_1%_2
2 R6904 1
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 7 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVBAT
PVBAT
1
1
1
PAD6160
1
PAD6110 POWERPAD_2_0610
2
POWERPAD_2_0610
2
2
D 67
67 VRPVBAT_5V IN
VRPVBAT_3V IN D
TPS51285 IS NOT READY FOR DB0 USE TPS51225 FOR FIRST BUILD
VRP5V0A_PH OUT 8
VRP5V0A_VIN 9 IN
1UF_25V_3
10UF_25V_5
10UF_25V_5
1
1
R6161 VR_VDD5
CSC0805_DY
10UF_25V_5
C6122
1
C6160
C6161
1 2 10 23
21
19
11
OUT
C6110
C6111
2
VRP5V0A
2
OUT 8
2
15.4K_1%_2
4 4
RSC_0603_DY
FET BG BG FET
RSC_0603_DY
6.8K_1%_2
PGND
PGND
1
1
1
VO1 14
R6100
R6150
R7615
4 VFB2 VFB1 2
R7610
5 CS2 CS1 1
3
3
150UF_6.3V
1
150UF_6.3V
60.4K_1%_2
1
2
C6100
C6150
6 20
2
EN2 EN1
+
OUT 5V_PG
+
R6160
18
16 7 PGOOD VCLK 19
CSC0402_DY
TMD
54.9K_1%_2
CSC0402_DY
1
1
3 13
2
VREG3 VREG5
1
10K_1%_2
10K_1%_2
2
2
1
R6101
R6110
C7610
C7615
R6151
VRP3V3A_LDO VRP5V0A_LDO
21
16 8 OUT OUT 8
2
2
1
2
2
B B
0_5%_2
R6117
VO=((6.8K/10K)+1)*2
3V3REF
1
1UF_6.3V_2
1
6 OUT
C6120
7 VO=((15.4K/10K)+1)*2
1UF_6.3V_2
1
24
18
C6121
2
VRP5V0A_VCLK P5V0DS
VRP5V0A_VCLK
2
8 POWERPAD1X1M_DY
IN OUT 8
8 IN VRP5V0A_LDO1 1 2 2
PAD6105
0.1UF_25V_2
0.1UF_25V_2
EN_3V EN_5V
1
16 IN 16 IN
C6157
C6156
P3V3DS
PAD6103
1 2 VRP3V3A_LDO
2
1 2 IN 8 16
POWERPAD1X1M_DY
A A
3
18 16 2 1 2 1 8
P15V0A OUT IN
D6151 D6150 VRP5V0A
0.1UF_25V_2
0.1UF_25V_2
BAV99W_7_F BAV99W_7_F
1
1
C6159
C6158
INVENTEC
2
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 8 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D PVADPTR
D
49.9K_1%_2
1
0.22UF_6.3V_2
R6913
R6996
5 ICS 1 2
IN OUT CURRENT_ADC 51
RSC_0402_DY
1
2
46.4K_1%_2
R6990
R6995
C6900
1 2
OUT VOLTAGE_ADC 51
576K_1%_3
1
0.22UF_6.3V_2
100PF_50V_2
49.9K_1%_2
1
1
C6999
R6994
C6998
2
2
C C
PVBAT
SHORT_0603_25
2
R6999
1
B B
R6983
1 2 5 51
8 VRP5V0A_VIN OUT OUT VADP_DEBUG
PANJIT_MMSZ5252A
1
SHORT_0603_25
D6997
2
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 9 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DDR3L_SEL OUT 10
P3V3DS
2
0_5%_2_DY
R6208
2
332K_1%_2
R6212
3 1
2700PF_50V_2
SSM3K7002BFU
0_5%_2_DY
2.2UF_6.3V_2
PVBAT
1
2
Q6202
1
DDR3L_DET
C6216
C6217
R6217 PAD6210
R6213
D 29 IN 1 2 1 G 1 1 2
2
D
S
POWERPAD_2_0610
10UF_25V_5
0.1UF_25V_2
0_5%_2 R6204
1
SHORT_0402_15
2
1
C6211
C6210
2
23
21
19 1 2
VR_VDD5 IN
1 R6203 2
67
VRPVDDQ IN 0_5%_2
200K_5%_2_DY
2
2
DDR3L_SEL IN
19
18
17
16
15
R6211
23
22
21
20
R6201 R6200
1 2 1 2 U6200
V5
GSNS
VSNS
TRIP
SLEW
GND
VIN
VIN
VIN
154K_1%_2 49.9K_1%_2
1
24 REFIN2 PGND 10
C6218 25 REFIN PGND 11
2 1 26 VREF PGND 12
27 RA PGND 13
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
28 14
2
EN_VRPVDDQ10
16 IN 0.22UF_6.3V_2 EN PGND
PGOOD
MODE
C6200
C6202
C6203
29
C6201
BST
LP#
TML
SW
SW
SW
SW
NC
TI_TPS51362RVER_QFN_28P
2
2 3
4
5
6
7
8
9
1
1
0_5%_2_DY
VRPVDDQ_PH L6200
C 1
1 2
2
OUT 67
VRPVDDQ C
RSC_0603_DY
R6206
3 4
1
3 4
0.1UF_16V_2
VRPVDDQ_PG OUT PAN_ETQP3W1R0WFN_4P
R7620
1 R6215 2
C6215
P1V5
1
VRPPM_SLP_S0_N 28
11 IN PAD6200
2
67 1 2
VRPVDDQ IN
1
1 2
2.2_5%_3
2
MODE= OPEN FSW= 800K
CSC0402_DY
POWERPAD_2_0610
C7620
MODE= GND FSW= 400K
TRIP =5V OCL=12A
2
REFIN =GND VOUT=1.05V
VREF=2V
VOUT=(107K)X2V/(107K+51K)=1.354V
P3V3A
POWERPAD1X1M
1
PAD6241
B B
1
2
P1V5
2
U6240
10 VIN VDDQSNS 1
P0V75S
9 2
EN_VRPVDDQ IN S5 VLDOIN
PAD6240
8 GND VTT 3 VRPVTT OUT 10 10VRPVTT IN 1 1 2
2
16 7 4 POWERPAD1X1M
EN_VRPVTT IN S3 PGND
6 5
VRPVTT_REF OUT VTTREF VTTSNS
1UF_6.3V_2
1UF_6.3V_2
1
11
10UF_6.3V_3
10UF_6.3V_3
TML
1
C6243
C6242
C6241
C6240
GMT_G2997BF61U_MSOP_10P
2
2
A A
P0V75M_VREF
PAD6242
1 2
VRPVTT_REF IN 1 2
INVENTEC
POWERPAD1X1M_DY
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 10 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
2700PF_50V_2
PVBAT
2.2UF_6.3V_2
1
1
C6316
C6317
PAD6310
1 1 2
2
R6304
SHORT_0402_15 POWERPAD_2_0610
10UF_25V_5
0.1UF_25V_2
1
1
1 2
2
23
21
19
VR_VDD5 IN
C6311
C6310
1 R6303 2
0_5%_2
67
VRP1V05A IN
2
19
18
17
16
15
23
22
21
20
U6300
V5
GSNS
VSNS
TRIP
SLEW
GND
VIN
VIN
VIN
C 24 REFIN2 PGND 10 C
R6300 2 25
1 11
C6318 REFIN PGND
2 1 26
0_5%_2 VREF PGND 12
27 13
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
RA PGND
2
0.22UF_6.3V_2 28 14
16 EN_1V05A IN EN PGND
PGOOD
MODE
C6300
C6302
C6301
29
BST
LP#
TML
SW
SW
SW
SW
NC
TI_TPS51362RVER_QFN_28P
1
P1V05A
2
2 3
4
2 0_5%_2_DY 5
6
7
8
9
1
VRP1V05A_PH L6300
1 2 PAD6300
OUT 67
VRP1V05A 1 2
1 2 67
VRP1V05A IN
RSC_0603_DY
3 4 1 2
IOUT=5A
R6306
1
3 4
0.1UF_16V_2
PAN_ETQP3W1R0WFN_4P POWERPAD_2_0610
R7630
C6315
1
1V05A_PG OUT
2
1
2
MODE=GND FSW=400K
CSC0402_DY
C7630
28
VRPPM_SLP_S0_N IN
R6315
2.2_5%_3
MODE= FLOAT FSW= 800K
B TRIP =5V OCL=12A B
2
1
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 11 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P3V3DS
PAD6360
1 1 2
2
10UF_6.3V_3
POWERPAD_2_0610
1
C C
C6360
U6350
11 TML
VRP1V5S_PH IOUT=0.67A
10 PVIN LX 1 L6350
9 2 1 2
PVIN LX OUT
CSC0402_DY
VRP1V5S
1
8 3
15K_1%_2
SVIN LX ELL5PR1R2N
C6352
R6350
7 4 24
NC PGOOD OUT 1V5S_PG
6 5
22UF_6.3V_5
FB EN P1V5S
1
C6350
RICHTEK_RT8068AZQW_WDFN_10P
PAD6350
2
16
11
EN_1V5S IN
1 2
VRP1V5S IN 1 2
R6351
10K_1%_2
2
POWERPAD_2_0610
2
VREF=0.6V
15K=1.5V
10K=1.2V
20.5K=1.83V
B B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 12 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P5V0DS
PAD6460
1 1 2
2
10UF_6.3V_3
1
POWERPAD_2_0610
U6450 IOUT=1.68A
C6460
11 TML
C VRP1V2A_PH C
10 PVIN LX 1 L6450
9 2 1 2
PVIN LX OUT VRP1V2A
CSC0402_DY
1
11K_1%_2
8 3 ELL5PR1R2N
2
SVIN LX
C6452
22UF_6.3V_5
1
7 4 46
NC PGOOD OUT 1V2A_PG
R6450
C6450
6 FB EN 5
RICHTEK_RT8068AZQW_WDFN_10P
11
16 EN_1V2A IN P1V2A
10K_1%_2
2
R6451
PAD6450
1 2
VRP1V2A IN 1 2
2
POWERPAD_2_0610
VREF=0.6V
15K=1.5V
B 10K=1.2V B
11K=1.25V
20.5K=1.83V
MODE= FLOAT=SKIP MODE
MODE=VIN=FCCM MODE
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 13 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P5V0A
1 R6665 2
10_5%_2
PVCCIO_OUT
VREF_CPU
14 OUT
D
1
0.33UF_10V_3
D
1UF_6.3V_2
C6644
C6643
R6640 VR_SVID_DATA
1 2 14 36
OUT
1
2
2
C6618 130_1%_2
VR_SVID_CLK
C6639 R6633 R6641 2
1 14 36
2 1 1 2 CSC0402 OUT
54.9_1%_2
2
OUT CPU_PROCHOT# 27
10K_1%_2 P3V3A
0.0015UF_50V_2
1 R6645 2
R6656 R6651 IN VR_SVID_CLK 14 36
10_5%_2
1 2 1 2
10K_1%_2 2.05K_1%_2
P3V3A C6640 IN VR_SVID_ALERT# 36
1 2
100PF_50V_2 14 36
IN VR_SVID_DATA
1
0_5%_2
R6663
25
26
27
28
29
30
31
32
33
36 IN U6600
C VCCSENSE C
VR_HOT#
ALERT#
VREF
DROOP
COMP
V5A
VCLK
GND
PWPD
37 VSSSENSE IN
2
1UF_6.3V_2
1
C6642
24 1 16
VFB VDIO IN EN_PVCORE
23 GFB VDD 2
22 3 16
IN
N/C PGOOD
R6612 OUT PVCORE_PG
CPU_CSP2 21 PU3 N/C 4 1 2
1 R6664 2 20 5 RSC_0402_DY
2
CPU_CSN2 IN CSP2 PWM2
19 6
2
RSC_0402_DY CSN2 PWM1 OUT CPU_PWM2
0_5%_2
18 7
15 CPU_CSN1 IN CSN1 SKIP#
OUT CPU_PWM1 15
R6643
17 CSP1 VR_ON 8
15 CPU_CSP1 IN
B-RAMP
THERM
OUT CPU_SKIP# 15
SLEWA
F-IMAX
O-USR
1
OCP-I
IMON
VBAT
PVBAT
IN VR_ON 14
0_5%_2
R6662
1
14 VR_ON OUT
1 R6657 2 TI_TPS51622RSM_QFN_32P
RSC_0402_DY
16
15
14
13
12
10
9
11
1 R6644 2
10K_5%_2
2
B B
0.1UF_16V_2_DY
10K_1%_2
150K_1%_2
150K_1%_2
1
1 R6658 2
RSC_0402_DY
39K_1%_2
150K_1%_2
2
1 R6660 2
C6646
R6659
100K_1%_2
R6654 2
2
R6653
R6650
R6647
2
1
1
432K_1%_2
2
2
100K_5%_NTC
9.31K_1%_2
1.02M_1%_2
2
2
RSC_0402_DY
R6649
R6661
R6655
1 R6652
R6646
VREF_CPU VREF_CPU
1
1
1
14 IN IN 14
4700PF_50V_2
1
C6645
CPU_IMON
A A
OUT
2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 14 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
PVBAT
11
PAD6600
POWERPAD_2_0610
2
15UF_25V_DY
PVBAT_VCORE
2
1
OUT 15
C6699
10UF_25V_5
10UF_25V_5
1
1
C6601
C6600
2
PVCORE
C C
2
L6600
14 CPU_SKIP# IN 1 2
VRPVCORE_PH OUT
3 4
2
R6605
2.32K_1%
PCME063T-R24MS1R195
R6601
1 2
U6610
0_5%_2_DY 1 8
P5V0S
SKIP# PWM IN CPU_PWM1 14
2 7 1 R6615 2 R6600
VDD BOOT
1 2
1
0_5%_3
1
3 PGND BOOT_R 6 2 1 18.7K_1%_2
0.1UF_16V_2 C6615 R6603 R6602
4 5
VSW VIN IN PVBAT_VCORE 1 2 1 2
PGND
2
C6623
3.01K_1%_2 10K_1%_NTC
2.2UF_6.3V_2
TI_CSD97374CQ4M_SON_8P
C6605
9
2 1
B 14
B
OUT CPU_CSP1
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 15 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R7034
PAD2990 Q7151 Q7150 Q7152 R7150 R7151 R7154 DGPU_PWR_EN IN
1 2
OUT 22
0.1UF_16V_2
INSTALL UN-INSTALL UN-INSTALL UN-INSTALL UN-INSTALL UN-INSTALL UN-INSTALL 13.7K_1%_2
C7034
IAMT UN-INSTALL INSTALL INSTALL INSTALL INSTALL INSTALL INSTALL
P1V05S
1
P1V05A P1V05M
PAD2990
1 1 2
2
22UF_6.3V_5_DY
10UF_6.3V_3
1
1
P3V3DS P3V3S P5V0DS P5V0S P1V05A POWERPAD_2_0610_DY
22UF_6.3V_5_DY
MAX 4.5A MAX 2.0A
C7153
C2994
C2995
Q7153
Q7151 8 1
Q7050 Q7100 1 4 D S
1 4 1 4 D S 7 2 1 R7044 2
D S D S
2 DGPU_PWR_EN IN OUT EN_PVPCIE 23
6 3
2
2 2 5.1K_1%_2
5
0.1UF_16V_2
2
2
D 5 5 5 G 4
6 G 3
C7039
6 G 3 6 G 3 NMOS_4D1S D
NMOS_4D1S NMOS_4D1S
FDMS0310AS
ALPHA_AO6424L_TSOP_6P
ALPHA_AO6424L_TSOP_6P ALPHA_AO6424L_TSOP_6P P3V3DS P3V3M
SPWON
1
CSC0402_DY
Q2971
1
R7151 4 1
S D
18 16 8 IN P15V0A 1 2
2
10UF_6.3V_3
18 8 R7101
1
1 2 SPWON SPWON 5
10UF_6.3V_3
IN
220_5%_2
P15V0A
2 R7050 1
2 R7152 1
47_5%_2
10UF_6.3V_3
470K_5%_2
220_5%_2
1
2 R7150 1
C7050
3 6
100_5%_2
P3V3DS G
C7152
C2990
PMOS_4D1S
470K_5%_2 P0V75S
R7100
C7100
2
P5V0DS TPC6111
C2970
10UF_6.3V_3
1
1
1 2
3 1 R7153 2
200K_5%_2
22_5%_2
2
2
2 R7154
C2971
Q7150
2
S1 1 CSC0402_DY
47K_5%_2
1
1
2
330K_5%_2
G1
1
47_5%_2
R2970
6
R2971
D1
3
2
D2
Q7051 Q7101
1 5
3
S1 G2
R2972
2 PM_SLP_A 4
3
G1 SSM3K7002BFU Q7154 Q7155
S2
6
2
D
D
L2N7002DW1T1G
2
D1
3 1 1
3
D2 G G
D
5 G2 1 G Q7152
C C
S
4 SSM3K7002BFU
D
SSM3K7002BFU Q7056
S
S2
24 IN PM_SLP_A# G S1 1
L2N7002DW1T1G 51 1 2
2
G1
26
S
6
2
28
SSM3K7002BFU D1
D2 3
5
2
51 28 SLP_LAN# IN G2
4
S2
L2N7002DW1T1G
SLP_S3_5R OUT
P5V0DS
PVPCIE P1V8S P1V8S_DGPU
200K_5%_2
1
10UF_6.3V_3_DY
PAD2991 R7016
R7005
1 2
VR_EN_HASWELL IN
1
1 2
1 2 MAX 1.5A 0_5%_2
47_5%_2
R7302
C7302
P1V05S_VCCP
10UF_6.3V_3_DY
POWERPAD_2_0610 R7000
2
1 2 14
PWR_GOOD_3 IN OUT EN_PVCORE
1
47_5%_2
OUT PVCCIO_OUT
R7300
C7301
23
Q7002 2 1 0_5%_2
Q7302 36 VGATE OUT 2 1
D
B B
D
1 G
SLP_S3#_3R IN 1 G
1SS355VMTE_17
32
2
S
0_5%_2 1 2
2
2 R7020 1
SLP_S3#_3R IN OUT EN_1V5S 12
2
SSM3K7002BFU
1 R7112 2
2
0_5%_2
3 1
1 R7113 2 R7022 R7019
8 OUT
EN_5V SLP_SUS#_3R IN 1 2 2 1
OUT EN_1V05A 11
0_5%_2
DIODE-BAT54-TAP-PHP
0_5%_2_DY 0_5%_2
1 R7031 2 19 R7021
DGPU_PWR_EN IN OUT EN_DGPU
2 1 13
C7031 KBC_PWR_ON IN OUT EN_1V2A
0_5%_2 2 1 64 27 0_5%_2
2 R7014 1
CSC0402_DY
CSC0402_DY
CSC0402_DY
28 26 SLP_S4#_3R IN
1
CSC0402_DY RSC_0402_DY
C7037
C7035
C7036
1 R7013 2
27 EN_P1V5 IN OUT EN_VRPVDDQ 10
0_5%_2
A A
2
R7110 1 R7015 2
25 1 2 1 R7111 2 24 64 31 51 16
26 59 28 43 57 SLP_S3#_3R IN OUT EN_VRPVTT 10
68 EN_5V_3V OUT IN VRP3V3A_LDO RSC_0402_DY
10K_5%_2 100K_5%_2 1 R7018 2
38 DDR_VTT_PG_CTRL IN
0_5%_2
1
0.1UF_16V_2
R7032
C7110
1 2
OUT EN_1V35S_DGPU
8.66K_1%_2
INVENTEC
1
0.1UF_16V_2
TITLE
MODEL,PROJECT,FUNCTION
2
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 16 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
JACK6000
PHP_PESD5V0S1BB_SOD523_2P_DY
4
5
6
PVADPTR
PHP_PESD5V0S1BB_SOD523_2P
PHP_PESD5V0S1BB_SOD523_2P
L6035
D7504
D7505
4
5
6
NFE31PT222Z1E9L 1 1
1
1
1
2 6026B0256601
0.1UF_25V_2
2
100PF_50V_2
100PF_50V_2
1 2
2
3
1
3
1
C7500
C7501
C7502
7
8
9
1
D7506
4
3
SINGA_2DC3092_000111F_9P
1000PF_50V_2
1000PF_50V_2
7
8
9
100PF_50V_2
100PF_50V_2
D PVBATA
D6035
1
1
2
2
PANJTT_PJSOT24C_SOT23_3P
D
2
C6038
C6037
C6036
C6035
2
3
2
2
100_5%_2 CN6050
1 1
2
3
R6051 2
100_5%_2_DY
100PF_50V_2
1
1
FOX_BP02083_B24B1_9H_8P
P3V3DS
P3V3DS
R6055
C7503
6012B0335005
BAV99W_7_F_DY
2
2
100K_5%_2
2
1
3 OUT OCP_MAIN# 7
D7503
BATTERY OCP PWM#
C C
R6058
2
1
OUT MAIN_BAT_DET# 51
PHP_PESD5V0S1BB_SOD523_2P
PHP_PESD5V0S1BB_SOD523_2P
PHP_PESD5V0S1BB_SOD523_2P
B B
0.1UF_25V_2
100PF_50V_2
100PF_50V_2
100PF_50V_2
2
1
2
2
2
C7504
C7507
C7505
C7506
PVBATB TRAVEL BATTERY
1
6012B0449801
1
D7511
D7512
D7513
1
1
51
17
5 SDA_BAT_CHG BI CN6051
R6078
5 SCL_BAT_CHG BI 100_5%_2 1 1
2 2
1 2 3
P3V3DS 3
1 2 4 4
5 5
R6077 1 R6073 2 6 G1
6 G1
100_5%_2
1
7 G2
10K_5%_2
7 G2
1K_5%_2
R6083
100_5%_2_DY
8 8
1
P3V3DS
2
P3V3DS
R6076
FOX_BR0208C_Z58ABH1_9H_8P
BAV99W_7_F_DY
D7507
D7508
D7509
2
A 3 3 3 A
2
100K_5%_2
BAV99W_7_F
BAV99W_7_F
BAV99W_7_F
1
3
OUT OCP_TRAVEL# 7
D7510
1
R6074
2
1
OUT TRAVEL_BAT_DET# 51
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 17 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3DS
100K_5%_2
24 D
R7017 2
P3V3DS
8
6 3V3REF IN
7
10K_5%_2
R7001
U7000
1
1 NC VCC 5
16 8 2
5V_PG IN IN-A
2
3 4
0.1UF_16V_2
GND OUT-Y OUT DPWROK 28
1
TSB_TC7SZ07FU_SSOP_5P
C7001
2
C C
Q7353
P5V0DS Q7351 8 1
D S
8 D S 1
P15V0A IN 8 16 7 2
7 2
6 3
6 3
470K_5%_2
5 G 4
1
5 4
2
G NMOS_4D3S
R7354
NMOS_4D3S
RQ3E100BNFU7TB
R7350 RQ3E100BNFU7TB
100K_5%_2
2
B B
R7355 R7353
2 1 2 1
Q7350 100_5%_2
1
3
S1
KBC_PWR_ON 2 100_5%_2
51 16 IN G1 Q7352
Q7355
1
6
D
1
D1
D2 3 1 G 1 G
5 G2
C7352
S
4 C7355
R7356
S2
SSM3K7002BFU SSM3K7002BFU 10UF_6.3V_3
L2N7002DW1T1G 10UF_6.3V_3
SLP_SUS#_3R 1 2
2
2
28 16 IN
2
0_5%_2_DY
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 18 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
PVCORE_DGPU
PAD6750
73 1 2
VRPVCORE_DGPU IN 1 2
POWERPAD_2_0610 MAX=50A
OCP=42A
PVBAT
C C
POWERPAD_2_0610
15UF_25V_DY
1
1
C6799
PAD6760
+
16 EN_DGPU IN
1
2
2
1
1K_5%_2
R6755
2
R6755=100K , FSW=300KHZ
R6755=200K , FSW=400KHZ
OUT 51219VREF R6755=1K , FSW=500KHZ Q6750
2
TI_CSD87588N_LGA_5P
R6752
1 2 VIN 2 VRPVBAT_DGPU
Control
0_5%_2 R6765 C6765 FET
10UF_25V_5
10UF_25V_5
10UF_25V_5
0.1UF_25V_2
P3V3S 29 DGPU_PG OUT
1
1
0_5%_2_DY
C6760
C6761
C6762
C6763
1 2 1 2
R6750
SHORT_0402_5 VSW 5
17
16
15
14
13
U6751
1 R6767 2 ANPEC_APL6502A8I_TRG_8P
R6762 2
SHORT_0603_25
DGPU_VID2 IN 5 VID0 VDA 3 U6750
Sync
0.033UF_16V_2
SHORT_0402_5 2 4 BG FET
B VID1 B
PGND
1
2
1 R6768 2 1 4
PWPD
PGOOD
EN
BST
MODE
DGPU_VID3 IN VID2 VDD
C6770
SHORT_0402_5 8 VID3
R6769 2 7 VID4 GND 6 1 VREF SW 12 VRPVCORE_DGPU_PH
1
1
DGPU_VID4 IN
3
1UF_6.3V_3
SHORT_0402_5 VRPVCORE_DGPU_HG
1
2 REFIN DH 11
2
R6770 2
C6773
1 C6775
DGPU_VID5 IN TI_TPS51219RTER_QFN_16P
SHORT_0402_5 3 GSNS DL 10 VRPVCORE_DGPU_LG 1 2
L6750
23 PCMC104T_R36MN
4 9 CSC0402_DY
VSNS V5 IN VR_VDD5 811 21
10 1 2
OUT 73
VRPVCORE_DGPU
2
COMP
PGND 3 4
RSC_0603_DY
1
TRIP
GND
100PF_50V_2
0.1UF_16V_2
0_5%_2_DY
1
R6763 2
Q6751
SHORT_0603_25
C6769
C6768
R7675
TI_CSD87588N_LGA_5P
R6751
2.2UF_6.3V_3
C6767
1
VIN 2
5
1
C6766
2 1
470UF_2V
Control
2
FET
42.2K_1%_2
1
2
0.01UF_50V_2
2 C6750
1
+
1
TG
R6756
VSW 5
CSC0402_DY
2
1
Sync
3
4 BG FET
C7675
PGND
2
A A
2
3
R6771 R6764
1 2 1 2 73
IN VRPVCORE_DGPU
R6759
RSC_0402_DY 0_5%_2
VSNS 10_1%_2
1 2
IN GPU_VCC_SENSE
GSNS
INVENTEC
1 2
IN GPU_VSS_SENSE
1
R6760
SHORT_0402_15
C6774 TITLE
1000PF_50V_2
MODEL,PROJECT,FUNCTION
Block Diagram
2
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 19 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
C C
EMPTY
B B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 20 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
2.2UF_6.3V_3
2700PF_50V_2
PVBAT
1
C6255
C6256
PAD6260
1 1 2
2
R6254
SHORT_0402_15 POWERPAD_2_0610
10UF_25V_5
0.1UF_25V_2
1
1
1 2
2
23
11
19
VR_VDD5 IN
15UF_25V
C6261
C6260
C6262
1 R6253 2
+
0_5%_2
VRP1V35S_DGPU IN
C C
2
19
18
17
16
15
23
22
21
20
R6251 R6250 U6250
1 21 2
V5
GSNS
VSNS
TRIP
SLEW
GND
VIN
VIN
VIN
21K_1%_2 10K_1%_2 24 REFIN2 PGND 10
C6257 25 REFIN PGND 11
2 1 26 VREF PGND 12
27 13
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
RA PGND
2
0.22UF_6.3V_2 28 14
EN_1V35S_DGPU IN EN PGND
PGOOD
P1V35S_DGPU
MODE
C6250
C6252
C6253
C6251
29
BST
LP#
TML
SW
SW
SW
SW
NC
PAD6250
1 2
TI_TPS51362RVER_QFN_28P VRP1V35S_DGPU IN 1 2
VRP1V35S_DGPU_PH IOUT=8A
1
2
2 3
4
2 0_5%_2_DY 5
6
7
8
9
1
L6250 POWERPAD_2_0610
1 2
1 2 OUT VRP1V35S_DGPU
RSC_0603_DY
3 4
1V35S_DGPU_PG OUT
R6256
1
3 4
0.1UF_16V_2
PAN_ETQP3W1R0WFN_4P
R7625
C6265
1
B B
2
1
2
P3V3DS
MODE=GND FSW=400K
CSC0402_DY
C7625
R6265
2.2_5%_3
R6258 MODE= FLOAT FSW= 800K
2 1
TRIP =5V OCL=12A
2
1
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 21 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P5V0DS
PAD6971
1 1 2
2
10UF_6.3V_3
1
C POWERPAD_2_0610 C
U6970 IOUT=1.68A
C6972
11 TML
10 PVIN LX 1 VRP1V8S_PH L6970
20.5K_1%_2
9 2 1 2
PVIN LX OUT
CSC0402_DY
VRP1V8S
2
8 3 ELL5PR1R2N
2
SVIN LX
C6971
R6970
22UF_6.3V_5
1
7 4 24
NC PGOOD OUT
1V8S_PG
C6970
6 FB EN 5
RICHTEK_RT8068AZQW_WDFN_10P
2
16
11
EN_1V8S IN P1V8S
10K_1%_2
2
R6971
PAD6970
1 2
VRP1V8S IN 1 2
2
POWERPAD_2_0610
B VREF=0.6V B
15K=1.5V
10K=1.2V
20.5K=1.83V
MODE= FLOAT=SKIP MODE
MODE=VIN=FCCM MODE
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 22 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P5V0DS
PAD6951
2 2 1
1
22UF_6.3V_5
POWERPAD_2_0610
1
C6955
1000PF_50V_2
4.7UF_6.3V_3
1
1
C6958
C6957
2
2
2
PVPCIE
PAD6950
18
12
22
23
24
26
R6952 U6950
821
19
11
10 1 2 23 1 2
IN PANASONIC_NN30421A_VB_24P VRPVPCIE IN 1 2
C VR_VDD5 C
SHORT_0402_15 POWERPAD_2_0610
SS
AVIN
PVIN
PVIN
PVIN
PVIN
19 24
PGOOD OUT PVPCIE_PG
16 14
IN EN
C6956
EN_PVPCIE C6959 BST 21
1 2
2 1 15 0.1UF_16V_2
VREG
LX 1
4.7UF_6.3V_3 LX 2 L6950
17 3 1 2 23
VOUT LX OUT VRPVPCIE
LX 4
VRPVPCIE_PH
LX 5 ELL5PR1R2N
0.012UF_16V_2
16 VFB LX 6
1
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
619_1%_2
1
C6960
R6950
LX 27
C6950
C6951
C6952
C6953
C6954
13 FSEL
PGND 7
PGND 8
AGND
AGND
AGND
10 9
2
MODE PGND
2
SHORT_0402_15
2 R6953 1
20
25
11
B B
1
1K_1%_2
R6951
2
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 23 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S
D R7414 1 R7407 2
57 51 43 31 28 26 16 SLP_S3#_3R IN 1 2 D
3.3K_5%_2
64 59
1
1M_5%_2
3.3K_5%_2
P5V0A
2 R7404
D7400
8
V+
R7415 1 1
3 3 1 R7409 2 5 U7400
51 28 24 1 2 2 ++IN
M_PWROK IN 2
10K_5%_2 7
-
OUT OUT PWR_GOOD_316 26 28 51
3.3K_5%_2 6 -IN
PANASONIC_DB3X313J0L_SOT_3P
31.6K_1%_2
3300PF_50V_2
V-
2
P3V3S ON_LMV393DMR2G_SOP_8P
4
R7412
13.7K_1%_2
R7418
C7403
1
P1V05S
10K_5%_2
10K_5%_2
10K_5%_2
1
R7433
R7434
R7435
2
R7426
1 2
1 R7406 2
2
16.2K_1%_2
1 R7429 2 1M_5%_2
1V35S_DGPU_PG IN P5V0A
0_5%_2
C
R7431 2
NEED CHECK C7400
C
22 1
1V8S_PG IN 1 2
0_5%_2
R7427 0.1UF_16V_2
8
1 R7432 2 GPWR_GOOD 1 2 V+
23 PVPCIE_PG IN 1 R7408 2 3 U7400
0_5%_2
10K_5%_2 ++IN OUT 1
3.3K_5%_2_DY 2 -
-IN
3300PF_50V_2
P3V3S V-
ON_LMV393DMR2G_SOP_8P
53.6K_1%_2
1
4
R7425
R7401
1 2
C7401
51.1K_1%_2
2
R7428
12 1 2
1V5S_PG IN
3.3K_1%_2
B B
R2950
24 18 8 7 6 1 2
3V3REF IN
1 R2951 2
1000PF_50V_2
35.7K_1%_2
46.4K_1%_2
C2950 P3V3A
FOR IAMT
2
3.3K_5%_2
1
1 R2953 2
1M_5%_2
2 R2954
P5V0A
P3V3M
5
R2959 U2950
1 R2955
+
1 2 2 1 +
10K_5%_2 4
OUT OUT M_PWROK24 28 51
41.2K_1%_2 3 -
P1V05M
0_5%_2_DY
3300PF_50V_2
- AZV331KTR_E1
1
R2958
2
1
1 2
1K_1%_2
R2960
A A
C2952
2 R2952
13K_1%_2
3
2
1
3
D2951 1 R2956 2
PANASONIC_DB3X313J0L_SOT_3P
1M_5%_2
1
2
C2951
51 28 26 16 1R2957 2 1 2
PM_SLP_A# IN
2
1
3.3K_5%_2 0.068UF_10V_2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
POWER(SEQUENCE)
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D REFERENCE NUMBER:4400~4349 D
P3V3S
10K_5%_2
2
R4301
P5V0S
1
CN4300
1 1
2 2 G G1
51 3 G2
TACH_FAN_IN OUT 1 2
3 G
4 4
R4300
22_5%_2_DY ACES_50271_0040N_001_4P
P5V0S
6012B0194003
5
0.1UF_16V_2
1
U4300
C4300
1
+
51 PWM_3S_FAN# IN
C 4 1 2 C
68 2
THERM# IN R4302
-
22_5%_2
2
TC7SET00F
3
B B
AMBIENT TEMP SENSE
WILL BE NOT USED IN 2013?
P5V0DS
R4411 11K_1%_2
R4412 U4411
1 2 5 VCC SET 1 1 2
GND 2
4 3 EN_5V_3V
0.1UF_16V_2
GMT_G708T1U_SOT23_5P
2
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
FAN & THERMAL
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3A
P1V05S_VCCP CN4920
1 GND0 GND1 2
3 4
27 H_PREQ# OUT OBSFN_A0 OBSFN_C0 IN CFG<17> 34
10K_5%_2
5 6
27 H_PRDY# IN OBSFN_A1 OBSFN_C1 IN CFG<16> 34
R4923
D 7 GND2 GND3 8
U4926 34 CFG<0> IN 9 OBSDATD_A0 OBSDATA_C0 10
IN CFG<8> 34 D
1 5 11 12
51
NC VCC 34 CFG<1> IN 13
OBSDATD_A1 OBSDATA_C1
14
IN CFG<9> 34
26 GND4 GND5
2
2 15 16
16
24
PWR_GOOD_3 IN IN-A 34 CFG<2> IN 17
OBSDATD_A2 OBSDATA_C2
18
IN CFG<10> 34
28
3 4
34 26 CFG<3> IN 19
OBSDATD_A4 OBSDATA_C3
20
IN CFG<11> 34
GND OUT-Y GND6 GND7
21 22 P1V05S_VCCP
TSB_TC7SZ07FU_SSOP_5P 27 H_BPM0_XDP# IN
23
OBSFN_B0 OBSFN_D0
24
IN CFG<19> 34
27 H_BPM1_XDP# IN
25
OBSFN_B1 OBSFN_D1
26
IN CFG<18> 34 P3V3S
GND8 GND9
27 28
34 CFG<4> IN OBSDATA_B0 OBSDATA_D0 IN CFG<12> 34
1
29 30
34 CFG<5> IN 31
OBSDATA_B1 OBSDATA_D1
32
IN CFG<13> 34
GND10 GND11
33 34 R4922
34 CFG<6> IN 35
OBSDATA_B2 OBSDATA_D2
36
IN CFG<14> 34
R4926 34 CFG<7> IN OBSDATA_B3 OBSDATA_D3 IN CFG<15> 34
37 38 1K_5%_2
VCCST_PWRGD 1K_5%_2 GND12 GND13
1 2 VCCST_PWRGD_XDP 39 40
2
36 OUT PWRGOOD_HOOK0 ITPCLK_HOOK4 IN CLK_PCIE_XDP_DP_R 26
41 42
28 PWR_BTN_OUT# IN 43
HOOK1 ITPCLK#_HOOK5
44
IN CLK_PCIE_XDP_DN_R 26
P1V05S_VCCP VCC_OBS_AB VCC_OBS_CD
45 46 XDP_RST_R_N R4921 1 2 1K_5%_2
36 PWR_DEBUGOUT 47
HOOK2 RESET#_HOOK6
48
IN BUF_PLT_RST# 28 33 51
61
53 55 56
51 28 PM_PWROK IN HOOK3 DBR#_HOOK7 OUT 26 28
49 GND14 GND15 50 XDP_DBRESET#
1
0.1UF_16V_2_DY
51 52
28 PCH_3S_SMDATA BI SDA TDO IN PCH_TDO 26 33
C4937
53 54
C 28 PCH_3S_SMCLK BI
55
SCL TRSTn
56
IN XDP_TRST# 26
C
33 PCH_TCK IN TCK1 TDI IN PCH_TDI 26 33
57 58
27 H_TCK IN 59
TCK0 TMS
60 MSR_ENABLE_N 1 2 1K_5%_2
IN PCH_TMS 26 33
GND16 GND17 R4939 IN CFG<3> 26 34
2
SAMTEC_BSH_030_01_L_D_A_TR_60P
R4822
33 1 2
PCH_JTAG IN
0_5%_2
C4937 PLACE IT NEAR XDP
P1V05S_VCCP 1
R4823
2
CPU XDP CONNECTOR OUT CLK_PCIE_XDP_DP_R 1 R4937
0_5%_2_DY
2 CLK_PCIE_XDP_DP
IN 34
B Q4921
1 B
PWR_GOOD_3 2
S1
IN H_TDI 27
16 IN G1
24
51
26
28 6
D1 IN PCH_TDI 26 33
3
D2
IN PCH_TMS 26 33
5 G2
4
S2 IN H_TMS 27
L2N7002DW1T1G
Q4920
S1 1
2 G1
IN H_TDO 27
6
D1 IN PCH_TDO 26 33
D2 3 26
IN XDP_TRST#
5 G2
4 P3V3A
S2 IN H_TRST# 27 33
L2N7002DW1T1G
ACES_50501_0144N_001_14P
51_5%_2_DY
1
1 1
R4526
64 59 57 51 43 31 28 24 16 IN SLP_S3#_3R 2 2
R4526 PLACE IT NEAR XDP 3 3
28 IN SLP_S5#_3R 4 4
64 28 27 16 IN SLP_S4#_3R 5 5
2
51 28 24 16 IN PM_SLP_A# 6 6
A 7 7 A
8 8
IN RTCRST# 9 9
10 10
62 57 51 IN ON_OFF# 11 11 G G1
12 12 G G2
28 26 IN XDP_DBRESET# 13 13
14 14
CN4941
INVENTEC
6012B0218415 TITLE
FOR ME TEST MODEL,PROJECT,FUNCTION
XDP & ME CONN.
NEED TO BE PLACE BETWEEN KEYBOARD OR BOTTOM DOOR DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 26 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TP4560
TP4561
TP30
P1V05S_VCCP TP4570
1
U4555 HASWELL_MCP_E TP30 TP4558
1
D TP30 TP4559
D
1
2
1 PROC_DETECT_N D61 PROC_DETECT* TP30
62_5%_2
TP4501 TP24
R4517
1
TP4502 TP24
1 CATERR_N K61 CATERR* MISC TP30
H_PECI N62 PECI PRDY* J62
51 OUT H_PRDY# 26
1
BI
PREQ* K62
OUT H_PREQ# 26
JTAG PROC_TCK E60
OUT H_TCK 26 27
1
R4515 PROC_TMS E61
OUT H_TMS 26 27
2 1 1 2 CPU_PROCHOT#_RK63 PROCHOT* PROC_TRST* E59
OUT H_TRST# 26 33 P1V05S_VCCP
C4514 47PF_50V_2 56_5%_2 THERMAL PROC_TDI F63
OUT H_TDI 26 27
PROC_TDO F62
OUT H_TDO 26 27
R4527
1 2 H_PWRGD C61 PROCPWRGD
PWR
10K_5%_2_DY BPM#0 J60 H_BPM0_XDP# 26
OUT
51_5%_2_DY
51_5%_2_DY
BPM#1 H60 H_BPM1_XDP# 26
OUT
2
BPM#2 H61 H_BPM2_XDP# 1
51_5%_2
RCOMP NEED CLOSED TO CPU AT 500MIL
R4508
R4507
R4920
H_BPM3_XDP# 1 TP4552
BPM#3 H62
TP4553 PLACE NEAR CPU
R4518 1 2 200_1%_2 AU60 SM_RCOMP0 BPM#4 K59 H_BPM4_XDP# 1
TP4554
R4541 1 2 120_1%_2 AV60 SM_RCOMP1 DDR3 BPM#5 H63 H_BPM5_XDP# 1
TP4555
R4540 1 2 100_1%_2 AU61 SM_RCOMP2 BPM#6 K60 H_BPM6_XDP# 1
TP4556
1
27 AV15 SM_DRAMRST* BPM#7 J61 H_BPM7_XDP# 1
DDR3_DRAMRST#_CPU OUT TP4557
DDR_PG_CTRL OUT
AV61 SM_PG_CNTL1 27 26 H_TDI IN
38
C 27 26 H_TMS IN C
27 26 H_TDO IN
ITL_HSW_ULT_2C_BGA_1168P 27 26 H_TCK IN
51_5%_2
R4509
PLACE NEAR CPU
1
14 CPU_PROCHOT# BI
3
Q4501
D
1
G
IN KBC_PROCHOT51
2
100K_5%_2
S
R4516
SSM3K7002BFU
2
B B
P1V5
470_1%_2
1
R4553
P3V3DS
2
OUT DDR3_DRAMRST#38 39
3
1 R4583 2 C4570 Q4502
20K_5%_2_DY 470PF_50V_2
D
1 G
1 R4580 1 R4581
S
P3V3A 2 2 2 1
OUT DDR_RST_EN 31
20K_5%_2 20K_5%_2 SSM3K7002BFU
2
28 PCH_DDR_RST IN 1 2
3
IN DDR3_DRAMRST#_CPU 27
Q4580
R4550
D
1 4.99K_1%_2
51 KBC_DS3_EN IN G
SSM3K7002BFU
S
A OUT EN_P1V5 16 A
1 R4585 2
2
1 R4586 2 1R4587 2 51 57
20K_5%_2 OUT SLP_S4#_KBC
20K_5%_2 0_5%_2
D4581 1R4588 FOR DEEP S3
3
2
C
0_5%_2_DY
1 2 16 26 28 64
A1 A2 IN SLP_S4#_3R
BAT54C
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP1-MISC
REFERENCE:4500~4949 SIZE
A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U4555 HASWELL_MCP_E
ITL_HSW_ULT_2C_BGA_1168P
51 OUT R4790 1 2 R_SPI_CS0#_FLH
SPI_CS0#_FLH
0_5%_2
Q4550 P3V3A
3 2 Q4753
D S S1 1 PCH_SML1CLK 2R4827 1 P3V3A
2 G1 2.2K_5%_2
PVBAT SSM3K7002BFU_DY 6 PCH_KBC_SMCLK 51
68
IN
G
D1
D2 3 PCH_KBC_SMDATA 51
68
IN
5 G2
1
4 PCH_SML1DATA 1 2 P3V3A
S2
L2N7002DW1T1G R4856 2.2K_5%_2
1 R4835 2
IN I2C_CLK 57
0_5%_2_DY
P3V3S 2.2K_5%_2
2 R4913 1
C Q4752 P3V3S C
S1 1 PCH_3S_SMCLK 26 38 39 50 58
IN
2 G1
6 PCH_3A_SMCLK 2 R4830 1 2.2K_5%_2
D1
D2 3 PCH_3A_SMDATA 2 1 P3V3A
5 G2 R4792 2.2K_5%_2
4 PCH_3S_SMDATA 26 38 39 50 58
S2 IN
L2N7002DW1T1G 2 1
PCH_PWROK 1 2 P3V3S
R4925 0_5%_2 IN PWR_GOOD_316 24 26 51 R4828
2.2K_5%_2
1 R4836 2
IN I2C_DATA 57
0_5%_2_DY
R4936
1 2
IN DPWROK 18
0_5%_2_DY
U4555 HASWELL_MCP_E
P3V3_RTC
R4742
SYSTEM POWER MANAGEMENT 330K_5%_2
R4815 1 2 0_5%_2 AK2 SUSACK* DSWVRMEN AW7 2 1
26 XDP_DBRESET# IN AC3 SYS_RESET* DPWROK AV5 1 2 P3V3A
IN RSMRST# 16 28 51
51 26 PM_PWROK IN R4802 1 2 0_5%_2 AG2 SYS_PWROK WAKE* AJ5
IN PCH_WAKE# 29
AY7 PCH_PWROK R4928
R4940 1 2 10K_5%_2
B R4722 1 2 0_5%_2_DY AB5 APWROK 0_5%_2 B
51 24 M_PWROK IN R4723 1 2 APWROK AG7 PLTRST* CLKRUN*/GPIO32 V5
BI PCI_3S_CLKRUN# 28 51
0_5%_2 SUS_STAT*/GPIO61 AG4
OUT BT_OFF 55
54
51
70 PLT_RST# OUT SUSCLK/GPIO62 AE6
OUT SUSCLK32_PCH
SLP_S5*/GPIO63 AP5
OUT SLP_S5#_3R 26
51 28 16 RSMRST# IN
AW6 RSMRST*
51 SUS_PWR_ACK OUT
AV4 SUSWARN*/SUSPWRDNACK/GPIO30
26 PWR_BTN_OUT# IN
AL7 PWRBTN* SLP_S4* AJ6
OUT SLP_S4#_3R 16 26 27 64
68
51 51 AJ8 ACPRESENT/GPIO31 SLP_S3* AT4 16 24 26 31 43 51 57 59
ADP_PRES_OUT IN OUT SLP_S3#_3R 64
51 AN4 BATLOW*/GPIO72 SLP_A* AL5 SLP_A 1 R47182 0_5%_2
GPIO72 IN R4799 2 VRPPM_SLP_S0_N_R AF3 OUT PM_SLP_A# 16
11 10 VRPPM_SLP_S0_N OUT
1 SLP_S0* SLP_SUS* AP4 R4719 1 2 0_5%_2_DY OUT SLP_SUS#_3R 16 18
55 PCH_SLP_WLAN_N OUT 0_5%_2 AM5 SLP_WLAN*/GPIO29 SLP_LAN* AJ7
OUT SLP_LAN# 16 51
P3V3S
ITL_HSW_ULT_2C_BGA_1168P P3V3S
1
5
U4700 R4727
5
51 28 1 2
PCI_3S_CLKRUN# OUT
2 4 26 33 51 53 55 56 61
2 4 OUT BUF_PLT_RST#
8.2K_5%_2
2 R4713 1
100K_5%_2
A A
3
TSB_TC7SH17F_SSOP_5P
3
P3V3A
10K_5%_2_DY SUS_PWR_ACK
R4746 1 2
IAMT NON-IAMT
P3V3DSW R4718 INSTALL UNINSTALL
R4743 1 2 10K_5%_2
10K_5%_2
ADP_PRES_OUT R4723 INSTALL UNINSTALL
INVENTEC
R4744 1 2 GPIO72 TITLE
R4722 UNINSTALL INSTALL
MODEL,PROJECT,FUNCTION
MCP2-SPI,SMBUS,SYSTEM SRQUENCE
REFERENCE:4500~4949 SIZE
A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01
R4779
19 1 2
P3V3S DGPU_PG IN OUT DGPU_PWROK29 U4555 HASWELL_MCP_E
REFERENCE NUMBER:4500~4699
0_5%_2
P1V05S_VCCP
R4729 1 2 200K_5%_2 KBL_DET#
R4751 1 2 10K_5%_2_DY DGPU_HOLD_RST# P1 BMBUSY*/GPIO76 THRMTRIP* D60 THRMTRIP# 1 R4732 2 1K_5%_2
BRD_ID1 IN
R4706 1 2 10K_5%_2_DY FPR_LOCK# GPIO8 OUT
AU2 GPIO8 RCIN*/GPIO82 V4
IN GPS_XMIT_OFF# 56
54 LAN_DIS# OUT
AM7 LAN_PHY_PWR_CTRL/GPIO12 SERIRQ T4
OUT PCI_3S_SERIRQ 51 53
R4709 1 2 10K_5%_2 DGPU_PRSNT# 1 R4919 2 AD6 GPIO15 PCH_OPI_COMP AW15 1 2
TLS_ENCRYTION IN P3V3S
R4907 1 2 10K_5%_2 DGPU_PWROK 10K_5%_2_DY 52 KBL_DET# IN
Y1 GPIO16 CPU/ RSVD AF20 R4748 49.9_1%_2
DGPU_PWROK IN
T3 GPIO17 MISC RSVD AB21
R4753 1 2 10K_5%_2 MPHY_PRW_EN AD5 GPIO24
GPIO24 IN
AN5 GPIO27 GPIO83 R4764 1 2 10K_5%_2
R4769 1 2 10K_5%_2 LPC_RESET# 29 INTLWAKE# IN
49 NFC_RST# IN
AD7 GPIO28 GPIO84 R4754 1 2 10K_5%_2
D R4880 1 2 10K_5%_2_DY A_3S_ICHSPKR 49 NFC_INT IN
AN3 GPIO26 LPIO
GSPI0_CS*/GPIO83 R6 GPIO85 R4806 1 2 10K_5%_2_DY D
R4726 1 2 10K_5%_2 DEVSLP1 IN GPIO83
WLAN_TRANSMIT_OFF# OUT
AG6 GPIO56 GSPI0_CLK/GPIO84 L6
IN GPIO84 GPIO86 R4809 1 2 10K_5%_2_DY
R4767 1 2 10K_5%_2 DEVSLP0 55 AP1 GPIO57 GSPI0_MISO/GPIO85 N6
CR_PWREN# OUT IN GPIO85
AL4 GPIO58 GSPI0_MOSI/GPIO86 L8 GPIO87 R4810 1 2 10K_5%_2
R4728 1 2 10K_5%_2 DOCK_ID1 47 GPIO58 IN IN GPIO86
WWANSSD_M12DET IN
AT5 GPIO59 GSPI1_CS*/GPIO87 R7
IN GPIO87 GPIO88 R4813 1 2 10K_5%_2
DGPU_HPD_INTR# IN
AK4 GPIO44 GPIO GSPI1_CLK/GPIO88 L5
IN GPIO88
P3V3A AB6 GPIO47 GSPI1_MISO/GPIO89 N7 GPIO89 R4814 1 2 10K_5%_2_DY
GPIO47 IN IN GPIO89
49 FPR_LOCK# IN
U4 GPIO48 GSPI_MOSI/GPIO90 K2
IN GPIO90 GPIO90 R4755 1 2 10K_5%_2
R4714 1 2 10K_5%_2 GPIO8 Y3 GPIO49 UART0_RXD/GPIO91 J1
DGPU_PRSNT# IN IN PLT_ID1
P3 GPIO50 UART0_TXD/GPIO92 K3 TOUCH_RST# R4763 1 2 10K_5%_2
R4733 1 2 1K_5%_2 TLS_ENCRYTION DGPU_HOLD_RST# IN IN PLT_ID2
35 MPHY_PRW_EN IN
Y2 HSIOPC/GPIO71 UART0_RTS*/GPIO93 J2
IN PLT_ID3 64 GPIO5 R4735 1 2 10K_5%_2
R4720 1 2 10K_5%_2 CR_PWREN# AT3 GPIO13 UART0_CTS*/GPIO94 G1
GPIO13 OUT IN TOUCH_RST# 44
AH4 GPIO14 UART1_RXD/GPIO0 K4 GPIO3 R4906 1 2 10K_5%_2
R4725 1 2 10K_5%_2 NFC_RST# GPIO14 IN IN SG_IN
10 DDR3L_DET IN
AM4 GPIO25 UART1_TXD/GPIO1 G2
IN DOCK_ID1 41 54
57 GPS_XMIT_OFF# R4708 1 2 10K_5%_2
R4736 1 2 10K_5%_2 PCH_GPIO9 AG5 GPIO45 UART1_RST*/GPIO2 J3
GPIO45 IN OUT SC_PWRSV# 58
AG3 GPIO46 UART1_CTS*/GPIO3 J4 PCI_3S_SERIRQ R4912 1 2 10K_5%_2
R4741 1 2 10K_5%_2 GPIO14 GPIO46 IN IN GPIO3
I2C0_SDA/GPIO4 F2
IN GPIO4 OCP_OC# R4780 1 2 10K_5%_2
R4908 1 2 10K_5%_2 GPIO24 AM3 GPIO9 I2C0_SCL/GPIO5 F3
PCH_GPIO9 OUT IN GPIO5
AM2 GPIO10 I2C1_SDA/GPIO6 G4 SC_PWRSV# R4757 1 2 10K_5%_2
R4911 1 2 10K_5%_2 DGPU_HPD_INTR# GPIO10 OUT IN RUNSCI_EC# 51
45 DEVSLP0 OUT P2 DEVSLP0/GPIO33 I2C1_SCL/GPIO7 F1
BI THERM_SCI# 68 RUNSCI_EC# R4785 1 2 10K_5%_2
R4914 1 2 10K_5%_2 GPIO45 51 C4 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 E3
LPC_RESET# IN IN GPIO64
L2 DEVSLP1/GPIO38 SDIO_CMD/GPIO65 F4 GPIO64 R4738 1 2 10K_5%_2
R4915 1 2 10K_5%_2 GPIO46 45 DEVSLP1 IN IN GPIO65
C 29 OCP_OC# IN N5 DEVSLP2/GPIO39 SDIO_D0/GPIO66 D3
1 TP4531 TP24 GPIO65 R4745 1 2 10K_5%_2 C
R4916 1 2 10K_5%_2 GPIO47 59 V2 SPKR/GPIO81 SDIO_D1/GPIO67 E4
A_3S_ICHSPKR OUT IN GPIO67
SDIO_D2/GPIO68 C3 GPIO67 R4749 1 2 10K_5%_2
R4917 1 2 10K_5%_2 GPIO58 IN GPIO68
SDIO_D3/GPIO69 E2
IN GPIO69 GPIO68 R4750 1 2 10K_5%_2
R4918 1 2 10K_5%_2 WWANSSD_M12DET
GPIO69 R4752 1 2 10K_5%_2
R4960 1 2 10K_5%_2 GPIO10
ITL_HSW_ULT_2C_BGA_1168P GPIO4 R4859 1 2 10K_5%_2
R4961 1 2 10K_5%_2 GPIO13
P3V3DSW
R4731 1 2 10K_5%_2_DY
29
R4934 1 2 PLT_ID1 PLT_ID2 PLT_ID3
INTLWAKE# OUT
0_5%_2_DY R4760 R4761 R4762 H
A R4730 SWITCHABLE GRAPHICS ENABLE R4803 R4804 R4805 L A
R4731 SWITCHABLE GRAPHICS DISABLE 0 1 0 14"
51
R4932 1 2 0 1 1 15"
KBC_WAKE# OUT
0_5%_2
29 OCP_OC# OUT BOARD ID GPIO
3
R4930 1 2 PCH_WAKE#_EC Q4700
28 PCH_WAKE# OUT IN
0_5%_2_DY
D
INVENTEC
1
G
IN OCP_PWM_OUT 51
S
SSM3K7002BFU
TITLE
2
MODEL,PROJECT,FUNCTION
MCP3-GPIO
REFERENCE:4500~4949 SIZE
A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U4555 HASWELL_MCP_E
P3V3S
eDP SIDEBAND
P3V3S 44 INV_PWM OUT
B8 eDP_BKLCTL DDPB_CTRLCLK B9
BI DPB_PORT_DDCCLK
44 L_BKLT_EN OUT
A9 eDP_BKLEN DDPB_CTRLDATA C9
BI DPB_PORT_DDCDATA
R4781 1 2 8.2K_5%_2 ACCEL_INT# 30 50
44 LVDS_VDD_EN OUT
C6 eDP_VDDEN DDPC_CTRLCLK D9
BI 41
DPC_DDCCLK
OUT DDPC_CTRLDATA D11
BI 41
DPC_DDCDATA
R4924 1 2 10K_5%_2 MUX_SELECT# 41
R4788 1 2 2.2K_5%_2
DPC_DDCCLK OUT
R4929 1 2 10K_5%_2 DGPU_PWR_EN# R4789 2.2K_5%_2
BRD_ID2 U6 PIRQA*/GPIO77 41 OUT 1 2
DPC_DDCDATA
R4770 1 2 10K_5%_2 CAMERA_ON BRD_ID3 P4 PIRQB*/GPIO78 DDPB_AUXN C5
BI DPB_PORT_AUX_DN
D BRD_ID4 N4 PIRQC*/GPIO79 DDPC_AUXN B6
BI DPC_AUX_DN
HDD_HALTLED_R OUT N2 PIRQD*/GPIO80 DDPB_AUXP B5
BI DPB_PORT_AUX_DP 43 30
R4758 1 2 100K_5%_2 D
1 TP24 AD4 PME* DDPC_AUXP A6
BI DPD_HPD OUT
P3V3S TP4509 DPC_AUX_DP
1 R4866 2 U7
GPIO55 R4759 1 2 100K_5%_2
R4571 1 10K_5%_2_DY ACCEL_INT# IN DPC_HPD OUT
2 BRD_ID1 SHORT_0402_5 L1 GPIO52
MUX_SELECT# IN
R4572 1 2 10K_5%_2 56DGPU_PWR_EN# OUT
L3 GPIO54 DDPB_HPD C8
IN DPD_HPD 30 43
WWAN_TRANSMIT_OFF# OUT
R5 GPIO51 DDPC_HPD A8
IN DPC_HPD
R4573 1 2 8.2K_5%_2 BRD_ID2 L4 GPIO53 EDP_HPD D6
44 CAMERA_ON OUT IN EDP_HPD#
R4574 1 2 8.2K_5%_2_DY
PCI DISPLAY
R4575 1 2 8.2K_5%_2 BRD_ID3
R4576 1 2 8.2K_5%_2_DY
R4577 1 2 8.2K_5%_2_DY BRD_ID4 ITL_HSW_ULT_2C_BGA_1168P
R4578 1 2 8.2K_5%_2
1 R4867
58 OUT HDD_HALTLED 2 HDD_HALTLED_R IN
1K_5%_2 P3V3S
P3V3S
100K_5%_2
2.2K_5%_2
2.2K_5%_2
1
1
2 R4900
2 R4899
2 R4851
C C
DPB_PORT_DDCDATA BI BI DPB_PORT_DATA_AUX_DN
6
3
4
S1
D2
S2
D1
Q4701
G1
G2
BRD_ID1 BRD_ID2 BRD_ID3 BRD_ID4 L2N7002DW1T1G
R4571 R4573 R4575 R4577 H
5
30 IN
R4572 R4574 R4576 R4578 L DDC_EN
BI BI 43
0 0 0 0 DB0 DPB_PORT_DDCCLK DPB_PORT_CLK_AUX_DP
100K_5%_2
1
6
3
1
0 0 0 1 DB1 P3V3S
S1
D2
S2
D1
Q4702
100K_5%_2_DY
2 R4895
G1
G2
COMMON PLATFORMS SYSTEM BOARD ID GPIO L2N7002DW1T1G
5
2 R4853
30 43 DDC_EN IN
C4756
B 1 2 DPB_PORT_AUX#_C B
DPB_PORT_AUX_DN BI
6
3
4
0.1UF_16V_2
S1
D2
S2
D1
Q4703
G1
G2
L2N7002DW1T1G
5
30 43 DP_EN IN
C4757
BI 1 2 DPB_PORT_AUX_C
U4555 HASWELL_MCP_E DPB_PORT_AUX_DP
6
3
4
100K_5%_2_DY
0.1UF_16V_2
S1
D2
S2
D1
1
Q4704
G1
G2
L2N7002DW1T1G
2 R4854
C54 DDI1_TXN0 EDP_TXN0 C45
EDP_TX0_DN
5
DPB0_PORT_DN OUT OUT 44
DPB0_PORT_DP OUT C55 DDI1_TXP0 EDP_TXP0 B46
OUT EDP_TX0_DP 44
DPB1_PORT_DN OUT B58 DDI1_TXN1 EDP_TXN1 A47
OUT EDP_TX1_DN 44 30 DP_EN IN
DPB1_PORT_DP OUT C58 DDI1_TXP1 EDP_TXP1 B47
OUT EDP_TX1_DP 44
DPB2_PORT_DN OUT B55 DDI1_TXN2
DPB2_PORT_DP OUT A55 DDI1_TXP2 EDP_TXN2 C47
DPB3_PORT_DN OUT A57 DDI1_TXN3 EDP_TXP2 C46
A DPB3_PORT_DP OUT B57 DDI1_TXP3 EDP_TXN3 A49 A
EDP_TXP3 B49
DPC0_DN OUT C51 DDI2_TXN0
DPC0_DP OUT C50 DDI2_TXP0 EDP_AUXN A45
OUT EDP_AUX_DN 44
C53 DDI2_TXN1 EDP_AUXP B45 VCCIOA_OUT
DPC1_DN OUT OUT EDP_AUX_DP 44
DPC1_DP OUT B54 DDI2_TXP1 24.9_1%_2
C49 DDI2_TXN2 EDP_RCOMP D20 R4544 2 1
B50 DDI2_TXP2 EDP_DISP_UTIL A43 DP_UTIL 1
TP4500
A53 DDI2_TXN3 TP24
B53 DDI2_TXP3
DDI EDP
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP4-GPIO,DP
ITL_HSW_ULT_2C_BGA_1168P
REFERENCE:4500~4949 SIZE CODE
DOC.NUMBER
1310xxxxx-0-0
REV
X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 30 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
HASWELL_MCP_E
U4555
U4555
HASWELL_MCP_E
39 M_B_DQ<63..0> BI
38 M_A_DQ<63..0> BI
0 AH63 SA_DQ0 SA_CLK#0 AU37
0 AY31 SB_DQ0 SB_CK#0 AM38
OUT M_CLK_DDR2_DN 39
OUT M_CLK_DDR0_DN 38 1 AW31 SB_DQ1 SB_CK0 AN38
1 AH62 SA_DQ1 SA_CLK0 AV37 OUT M_CLK_DDR2_DP 39
OUT M_CLK_DDR0_DP 38 2 AY29 SB_DQ2 SB_CK#1 AK38
2 AK63 SA_DQ2 SA_CLK#1 AW36 OUT M_CLK_DDR3_DN 39
OUT M_CLK_DDR1_DN 38 3 AW29 SB_DQ3 SB_CK1 AL38
3 AK62 SA_DQ3 SA_CLK1 AY36 OUT M_CLK_DDR3_DP 39
OUT M_CLK_DDR1_DP 38 4 AV31 SB_DQ4
4 AH61 SA_DQ4 5 AU31 SB_DQ5 SB_CKE0 AY49 39
5 AH60 SA_DQ5 SA_CKE0 AU43
OUT M_CKE0 38 OUT M_CKE2
6 AK61 SA_DQ6 SA_CKE1 AW43
6 AV29 SB_DQ6 SB_CKE1 AU50
OUT M_CKE3 39
OUT M_CKE1 38
7 AK60 SA_DQ7 SA_CKE2 AY42
7 AU29 SB_DQ7 SB_CKE2 AW49
8 AM63 SA_DQ8 SA_CKE3 AY43
8 AY27 SB_DQ8 SB_CKE3 AV50
9 AM62 SA_DQ9
9 AW27 SB_DQ9
10 AP63 SA_DQ10 SA_CS#0 AP33 38
10 AY25 SB_DQ10 SB_CS#0 AM32
OUT M_CS#2 39
OUT M_CS#0 11 AW25 SB_DQ11 SB_CS#1 AK32
OUT M_CS#3 39
11 AP62 SA_DQ11 SA_CS#1 AR32
OUT M_CS#1 38 12 AV27 SB_DQ12
D
12 AM61 SA_DQ12 13 AU27 SB_DQ13 SB_ODT0 AL32 TP24 1
13 AM60 SA_DQ13 SA_ODT0 AP32 TP24 1 TP90664
14 AP61 SA_DQ14
TP90665 14 AV25 SB_DQ14 D
15 AP60 SA_DQ15 SA_RAS* AY34 38
15 AU25 SB_DQ15 SB_RAS* AM35
OUT M_B_RAS#39
OUT M_A_RAS# 16 AM29 SB_DQ16 SB_WE* AK35
OUT M_B_WE# 39
16 AP58 SA_DQ16 SA_WE* AW34
OUT M_A_WE#38 17 AK29 SB_DQ17 SB_CAS* AM33
17 AR58 SA_DQ17 SA_CAS* AU34
OUT M_A_CAS# 38 OUT M_B_CAS#39
18 AM57 SA_DQ18
18 AL28 SB_DQ18
19 AK57 SA_DQ19 SA_BA0 AU35
19 AK28 SB_DQ19 SB_BA0 AL35
OUT M_B_BS0 39
OUT M_A_BS0 38 20 AR29 SB_DQ20 SB_BA1 AM36
OUT M_B_BS1 39
20 AL58 SA_DQ20 SA_BA1 AV35
OUT M_A_BS1 38 21 AN29 SB_DQ21 SB_BA2 AU49
21 AK58 SA_DQ21 SA_BA2 AY41
OUT M_A_BS2 38 OUT M_B_BS2 39
22 AR57 SA_DQ22
22 AR28 SB_DQ22 39
OUT M_A_A<15..0> 38 23 AP28 SB_DQ23 SB_MA0 AP40 0 OUT M_B_A<15..0>
23 AN57 SA_DQ23 SA_MA0 AU36 0
24 AN26 SB_DQ24 SB_MA1 AR40 1
24 AP55 SA_DQ24 SA_MA1 AY37 1
25 AR26 SB_DQ25 SB_MA2 AP42 2
25 AR55 SA_DQ25 SA_MA2 AR38 2
26 AR25 SB_DQ26 SB_MA3 AR42 3
26 AM54 SA_DQ26 SA_MA3 AP36 3
27 AP25 SB_DQ27 SB_MA4 AR45 4
27 AK54 SA_DQ27 SA_MA4 AU39 4
28 AK26 SB_DQ28 SB_MA5 AP45 5
28 AL55 SA_DQ28 SA_MA5 AR36 5
29 AM26 SB_DQ29 SB_MA6 AW46 6
29 AK55 SA_DQ29 SA_MA6 AV40 6
30 AK25 SB_DQ30 SB_MA7 AY46 7
30 AR54 SA_DQ30 SA_MA7 AW39 7
31 AL25 SB_DQ31 SB_MA8 AY47 8
31 AN54 SA_DQ31 SA_MA8 AY39 8
32 AY23 SB_DQ32 SB_MA9 AU46 9
32 AY58 SA_DQ32 SA_MA9 AU40 9
33 AW23 SB_DQ33 SB_MA10 AK36 10
33 AW58 SA_DQ33 SA_MA10 AP35 10
34 AY21 SB_DQ34 SB_MA11 AV47 11
34 AY56 SA_DQ34 SA_MA11 AW41 11
35 AW21 SB_DQ35 SB_MA12 AU47 12
35 AW56 SA_DQ35 SA_MA12 AU41 12
36 AV23 SB_DQ36 SB_MA13 AK33 13
C 36 AV58 SA_DQ36 SA_MA13 AR35 13
37 AU23 SB_DQ37 SB_MA14 AR46 14 C
37 AU58 SA_DQ37 SA_MA14 AV42 14
38 AV21 SB_DQ38 SB_MA15 AP46 15
38 AV56 SA_DQ38 SA_MA15 AU42 15
39 AU21 SB_DQ39
39 AU56 SA_DQ39 40 AY19 SB_DQ40 SB_DQSN0 AW30 39
40 AY54 SA_DQ40 SA_DQSN0 AJ61
BI 38 BI M_B_DQS0_DN
M_A_DQS0_DN 41 AW19 SB_DQ41 SB_DQSN1 AV26
BI 39
41 AW54 SA_DQ41 SA_DQSN1 AN62
BI 38 M_B_DQS1_DN
M_A_DQS1_DN 42 AY17 SB_DQ42 SB_DQSN2 AN28
BI 39
42 AY52 SA_DQ42 SA_DQSN2 AM58
BI 38 M_B_DQS2_DN
M_A_DQS2_DN 43 AW17 SB_DQ43 SB_DQSN3 AN25
BI 39
43 AW52 SA_DQ43 SA_DQSN3 AM55
BI 38 M_B_DQS3_DN
M_A_DQS3_DN 44 AV19 SB_DQ44 SB_DQSN4 AW22
BI 39
44 AV54 SA_DQ44 SA_DQSN4 AV57
BI 38 M_B_DQS4_DN
M_A_DQS4_DN 45 AU19 SB_DQ45 SB_DQSN5 AV18
BI 39
45 AU54 SA_DQ45 SA_DQSN5 AV53
BI 38 M_B_DQS5_DN
M_A_DQS5_DN 46 AV17 SB_DQ46 SB_DQSN6 AN21
BI 39
46 AV52 SA_DQ46 SA_DQSN6 AL43
BI 38 M_B_DQS6_DN
M_A_DQS6_DN 47 AU17 SB_DQ47 SB_DQSN7 AN18
BI 39
47 AU52 SA_DQ47 SA_DQSN7 AL48
BI 38 M_B_DQS7_DN
M_A_DQS7_DN 48 AR21 SB_DQ48
48 AK40 SA_DQ48 49 AR22 SB_DQ49 SB_DQSP0 AV30 39
49 AK42 SA_DQ49 SA_DQSP0 AJ62
BI 38 BI M_B_DQS0_DP
M_A_DQS0_DP 50 AL21 SB_DQ50 SB_DQSP1 AW26
BI 39
50 AM43 SA_DQ50 SA_DQSP1 AN61
BI 38 M_B_DQS1_DP
M_A_DQS1_DP 51 AM22 SB_DQ51 SB_DQSP2 AM28
BI 39
51 AM45 SA_DQ51 SA_DQSP2 AN58
BI 38 M_B_DQS2_DP
M_A_DQS2_DP 52 AN22 SB_DQ52 SB_DQSP3 AM25
BI 39
52 AK45 SA_DQ52 SA_DQSP3 AN55
BI 38 M_B_DQS3_DP
M_A_DQS3_DP 53 AP21 SB_DQ53 SB_DQSP4 AV22
BI 39
53 AK43 SA_DQ53 SA_DQSP4 AW57
BI 38 M_B_DQS4_DP
M_A_DQS4_DP 54 AK21 SB_DQ54 SB_DQSP5 AW18
BI 39
54 AM40 SA_DQ54 SA_DQSP5 AW53
BI 38 M_B_DQS5_DP
M_A_DQS5_DP 55 AK22 SB_DQ55 SB_DQSP6 AM21
BI 39
55 AM42 SA_DQ55 SA_DQSP6 AL42
BI 38 M_B_DQS6_DP
M_A_DQS6_DP 56 AN20 SB_DQ56 SB_DQSP7 AM18
BI 39
56 AM46 SA_DQ56 SA_DQSP7 AL49
BI 38 M_B_DQS7_DP
M_A_DQS7_DP 57 AR20 SB_DQ57
57 AK46 SA_DQ57 58 AK18 SB_DQ58
B
58 AM49 SA_DQ58 SM_VREF_CA AP49
P0V75M_VREF_H 59 AL18 SB_DQ59 B
59 AK49 SA_DQ59 SM_VREF_DQ0 AR51 DDR_WR_VREF01
60 AK20 SB_DQ60
60 AM48 SA_DQ60 SM_VREF_DQ1 AP51 DDR_WR_VREF02
61 AM20 SB_DQ61
61 AK48 SA_DQ61 62 AR18 SB_DQ62
62 AM51 SA_DQ62 63 AP18 SB_DQ63
63 AK51 SA_DQ63
DDR CHANNEL B
DDR CHANNEL A
ITL_HSW_ULT_2C_BGA_1168P
ITL_HSW_ULT_2C_BGA_1168P P0V75S_DIMM0_VREF_CA
P0V75S_DIMM0_VREF_DQ
R4105 R4538
R4503 R4506
0.022UF_16V_2
1 2 1 2
0.022UF_16V_2
1 2 1 2
P0V75M_VREF_H
1
0_5%_2_DY
1
DDR_WR_VREF01
C4121
2_1%_2 0_5%_2_DY
1K_5%_2_DY
C4124
D D S S 2_1%_2
1
D D S S
R4539
Q4503
DIODES_DMG2302U_7_3P
A
0.1UF_16V_2_DY
A
2.2UF_6.3V_3_DY
G
R4136
100K_5%_2
1
1
Q4500
2
2
1 2
R4505
C4502
C4501
G
31 27 IN DDR_RST_EN
2
G
DIODES_DMG2302U_7_3P 24.9_1%_2
24.9_1%_2
P0V75S_DIMM1_VREF_DQ
R4110
2
R4112 R4560 SLP_S3#_3R 1 R4511
1
642 59 57 51 43 28 26 24 16 2
IN
0.022UF_16V_2
1 2 1
470PF_50V_2
3.3K_5%_2
1
1
0_5%_2_DY
1
INVENTEC
DDR_WR_VREF02
C4122
C4500
2_1%_2 D D S S
1K_5%_2_DY
1
Q4504
R4561
R4111
G
1 2 TITLE
2
2
MODEL,PROJECT,FUNCTION
G
31 27 IN DDR_RST_EN MCP5-DDR
24.9_1%_2
REFERENCE:4500~4949 DIODES_DMG2302U_7_3P
2
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 31 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
U4555 HASWELL_MCP_E
70 PEG_RX0_C_DN IN
F10 PERn5_L0 USB2n0 AN8
BI USB_P0_DN
70 PEG_RX0_C_DP IN
E10 PERp5_L0 USB2p0 AM8
BI USB_P0_DP
USB3 DOCK 57
57
3K_1%_2
E15 RSVD OC3*/GPIO43 AV3
OUT GPIO43 32 R4857 2 1 10K_5%_2
E13 RSVD ISO_PREP# OUT
1 R4812 2 A27 PCIE_RCOMP 32 R4737 1 2 10K_5%_2
P1V05A_USB3PLL IN 1 2 GPIO42 OUT
B27 PCIE_IREF 1 2 10K_5%_2
32 GPIO43 OUT R4778
R4811 0_5%_2
A A
REFERENCE:4700~4949
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP6-PCIE,USB
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 32 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3DS
C4767
1 2 RTC_X1
10M_5%_2
2
1
4
3
P3V3_RTC 18PF_50V_2
A2
C4766
2 R4862
1 2 X4750
32.768KHZ
1UF_6.3V_2 C4788
1 2 RTC_X2
2
1 R4834
1
C 3 2
D4750
D
1
20K_5%_2
20K_5%_2
18PF_50V_2
1UF_6.3V_2
2 R4845 1
BAT54C
D
1
1M_5%_2
C4764
U4555
HASWELL_MCP_E
2 R4833
P3V3AL_RTC_BAT
A1
2
R4832 1
2 AW5 RTCX1
1
CN4750
AU6 INTRUDER* SATA_Rn0/PERn6_L3 J5 SATA_RX0_C_DN IN 45
C4768
1 R4876 2
ACES_50224_0020N_001_2P SATA_Rn1/PERn6_L2 J8 SATA_RX1_C_DN IN 45
330K_5%_2_DY SATA_Rp1/PERp6_L2 H8 SATA_RX1_C_DP IN 45
6012B0069907 SATA_Tn1/PETn6_L2 A17 SATA_TX1_C_DN OUT 45 MSATA
SATA_Tp1/PETp6_L2 B17 SATA_TX1_C_DP OUT 45
P1V05A
59
67 AZ_R3S_BITCLK OUT R4910 1 2 AW8
33_5%_2 HDA_BCLK/I2S0_SCLK SATA_Rn2/PERn6_L1 J6
59 AZ_R3S_SYNC OUT R4903 1 2 AV11
33_5%_2 HDA_SYNC/I2S0_SFRM SATA_Rp2/PERp6_L1 H6
59 AZ_R3S_RST# OUT R4901 1 2 AU8
33_5%_2 HDA_RST*/I2S_MCLK SATA_Tn2/PETn6_L1 B14
59 AZ_R3S_SDIN0 IN R4905 1 2 AY10
33_5%_2 HDA_SDI0/I2S0_RXD SATA_Tp2/PETp6_L1 C15
1
61
AU12 HDA_SDI1/I2S1_RXD
51_5%_2
51_5%_2
51_5%_2
61
HDA_SDO/I2S0_TXD SATA_Rn3/PERn6_L0
2 R4807
2 R4886
2 R4891
67
59 R4869 1 2 33_5%_2 AU11 F5
C AZ_R3S_SDOUT OUT IN PCIE_RX6_L0_C_DN C
HDA_SDO_RAW10 HDA_DOCK_EN*/I2S1_TXD SATA_Rp3/PERp6_L0 E5
IN PCIE_RX6_L0_C_DP
AV10 HDA_DOCK_RST*/I2S1_SFRM SATA_Tn3/PETn6_L0 C17 C4818 1 2 0.1UF_16V_2
PCIE_TX6_L0_DN
OUT PCIE_TX6_L0_C_DN
AY8 I2S1_SCLK SATA_Tp3/PETp6_L0 D17 C4819 1 2 0.1UF_16V_2
PCIE_TX6_L0_DP
OUT PCIE_TX6_L0_C_DP
1 2 P3V3S 61
R4817 1 61
AUDIO R4818 10K_5%_2_DY 2 P3V3S
26 SATA0GP/GPIO34 V1 AMD_BIOS_SEL# 2 1 10K_5%_2
27
H_TRST# IN
R4807,R4886,R4891 SATA1GP/GPIO35 U1 R4826 10K_5%_2 IN MSATA_DET# 45
CAN BE OPENED FOR POWER CONSUMPTION SATA2GP/GPIO36 V6 NMI_SMI_DBG# IN 51
R4808 SD_MMC_CD_WAKE#
2 1 SATA3GP/GPIO37 AC1 33
61 IN
AU62 PCH_TRST*
51_5%_2_DY P1V05A_SATA3PLL
26 PCH_TCK IN AE62 PCH_TCK SATA_IREF A12
IN
26 PCH_TDI IN AD61 PCH_TDI RSVD L11
26 PCH_TDO OUT AE61 PCH_TDO RSVD K10 R4852
26 PCH_TMS IN AD62 PCH_TMS JTAG SATA_RCOMP C12 L2 MAX. = 100 MILS1 2 L1 MAX. = 500 MILS
AL11 RSVD SATALED* U3 3K_1%_2
R4816
AC4 RSVD 2 1
P3V3_RTC 26 AE63 JTAGX SATA P3V3S
PCH_JTAG IN 10K_5%_2
AV2 RSVD OUT LED_3S_SATA# 58
1
TP30
1
1M_5%_2
1
TP30
R4831
TP4569
OUT INTRUDER# 33
B 56 P3V3S B
1
TP30 ITL_HSW_ULT_2C_BGA_1168P
3
TP4566
R4765
Q4831 NMI_SMI_DBG# 1 2
2
TP30
D
1 G
TP4567 10K_5%_2
WWAN_DET#IN AMD_BIOS_SEL# O 1GB
P3V3S
S
61
33 OUT
LAYOUT NOTE:PLACE R4808 NEAR PCH
43.2K_1%_2
LAYOUT NOTE:JTAG_TMS TERMINATIONS NEED TO BE PLACED NEAR PCH
1
10K_5%_2_DY
22 S
58 51 IN BAT_GRNLED# 1R4863 2 1 G
10K_5%_2
Q4755
D
LES_LBSS84LT1G_SOT23_3P
A A
23
S
61 56 55 53 51 28 26 IN BUF_PLT_RST# 1 G
Q4754
D
LES_LBSS84LT1G_SOT23_3P
INVENTEC
3
HDA_SDO_R TITLE
MODEL,PROJECT,FUNCTION
MCP7-RTC,AUDIO,SATA
DOC.NUMBER REV
REFERENCE:4500~4949 SIZE
A3
CODE
CS
1310xxxxx-0-0 X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U4555 C4828
HASWELL_MCP_E XTAL24_IN 1 2
1 R4898 2
3
2
1M_5%_2
12PF_50V_2
X4751
24MHZ_12PF
C43 CLKOUT_PCIE_N0 XTAL24_IN A25 C4826
C42 CLKOUT_PCIE_P0 XTAL24_OUT B25 XTAL24_OUT 1 2
4
1
P3V3S 61 CR_RST# IN
U2 PCIECLKRQ0*/GPIO18 12PF_50V_2
RSVD K21 P1V05S
B41 CLKOUT_PCIE_N1 RSVD M21 R4892
R4707 1 2 CR_RST# A41 CLKOUT_PCIE_P1 DIFFCLK_BIASREF C26 XCLK_BIASREF 1 2 RCOMP NEED CLOSED TO CPU AT 500MIL
D 10K_5%_2 Y5 PCIECLKRQ1*/GPIO19 3K_1%_2
GPIO19 IN D
R4711 1 TESTLOW C35 CPU_TEST1 R4775 1 2 10K_5%_2
2 GPIO19
54 OUT C41 CLKOUT_PCIE_N2 TESTLOW C34 CPU_TEST2 R4791 1 2 10K_5%_2
10K_5%_2 CLK_PCIE3_DN
54 B42 CLKOUT_PCIE_P2 TESTLOW AK8 CPU_TEST3 R4800 1 2 10K_5%_2
NIC CLK_PCIE3_DP OUT
AD1 PCIECLKRQ2*/GPIO20 TESTLOW AL8 CPU_TEST4 1 2 10K_5%_2
R4798 1 2 CLKREQ_PCIE3_N 54 CLKREQ_PCIE3_N IN R4801
10K_5%_2 CLK_KBC_SIO
55 CLK_PCIE4_DN OUT B38 CLKOUT_PCIE_N3 CLKOUT_LPC_0 AN15 22_5%_2 2 1 R4774
OUT CLK_R3S_KBPCI 67
51
R4705 1 2 CLKREQ_PCIE4_N WLAN CLK_R3S_TPM_R R4777 1 2 22_5%_2
55 CLK_PCIE4_DP OUT C37 CLKOUT_PCIE_P3 CLKOUT_LPC_1 AP15
OUT 67
CLK_R3S_TPM
10K_5%_2 55 CLKREQ_PCIE4_N IN N1 PCIECLKRQ3*/GPIO21
R4712 1 2 CLKREQ_PCIE5_N CLKOUT_ITPXDP* B35
OUT CLK_PCIE_XDP_DN 26
X4560
R4773
1 2 CLK_R3S_DEBUG_R 3 4
ITL_HSW_ULT_2C_BGA_1168P CLK_R3S_DEBUG OUT OUT VDD
R4950
2 11 2
0.1UF_16V_2
0_5%_2 GND OE
CSC0402_DY
1
1
C C
C4581
C7597
10K_5%_2
TXC_7X24000014_4P
2
2
U4555
HASWELL_MCP_E
RESERVED
26 CFG<4> IN AA60 CFG4 RSVD_TP C63
CFG5 RSVD_TP
1
Y62 C62
26 CFG<5> IN
1K_5%_2
CFG6 EDP_SPARE
R4523
Y61 B43
26 CFG<6> IN
B STRAPPING: 26 CFG<7> IN Y60 CFG7 B
DP ENABLE/DISABLE 26 CFG<8> IN V62 CFG8 RSVD_TP A51
26 CFG<9> IN V61 CFG9 RSVD_TP B51
0 : ENABLED V60 CFG10
2
1K_1%_2_DY
26 CFG<10> IN
1
RSVD Y22
26 CFG<16> IN AA62 CFG16 PROC_OPI_COMP AY15 1 2
26 CFG<18> IN U63 CFG18
26 CFG<17> IN AA61 CFG17 RSVD AV62
26 CFG<19> IN U62 CFG19 RSVD D58
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP8-CLOCK,RESERVED
DOC.NUMBER REV
REFERENCE:4500~4949 SIZE
A3
CODE
CS
1310xxxxx-0-0 X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R4902 1 2 RSC_0603_DY
P1V05S
P1V05A
R4941
D D S S P1V05A_MODPHY 1 2
RSC_0603_DY
Q4505
G
DIODES_DMG2302U_7_3P
G
MPHY_PRW_EN IN
P1V05A
D
P1V05S D
L4854
1 2
1UF_6.3V_2_DY
2.2UH_20%
22UF_6.3V_3
22UF_6.3V_3 C4765
1
1
1 2
C4760
HASWELL_MCP_E
C4785
C4786
U4555
0.1UF_16V_2
1UF_6.3V_2 C4761
2 1 K9 VCCHSIO
L10 VCCHSIO RTC C4746
2
P3V3A
2
M9 VCCHSIO 1UF_6.3V_2
mPHY P3V3_RTC
N8 VCCIO VCCSUS3_3 AH11 2 1
P9 VCCIO VCCRTC AG10
L4865 P1V05A_USB3PLL B18 VCCUSB3PLL DCPRTC AE7 2 1
0.1UF_16V_2
1UF_6.3V_2
P1V05A_SATA3PLL VCCSATA3PLL
1
1 2 B11
C4712
22UF_6.3V_3
22UF_6.3V_3
SPI
C4709
C4710
VCCAPLL OPI VCCSPI
C4792
C4790
2
P1V05A VCCASW AG14
VCCASW AG13 P1V05M
2
C
1 2 J13 DCPSUS3 C
P3V3S VCC1P05 J11
VCC1P05 H11
10UF_6.3V_3
C4730 0_5%_2_DY
AXALIA/HDA CORE
1
P1V05S
1UF_6.3V_2
1UF_6.3V_2
1 2 AH14 VCCHDA VCC1P05 H15
R4858
VCC1P05 AE8
C4751
C4718
C4721
1 2
VRM/USB2/AZALIA VCC1P05 AF22
10UF_6.3V_3_DY
1UF_6.3V_2 R4875
DCPSUS2 DCPSUSBYP P1V05M
1
1 2AH13 AG19
0_5%_3
1UF_6.3V_2
DCPSUSBYP AG20
2
P3V3DS P3V3A 0_5%_2_DY
VCCASW
C4787
C4789
22UF_6.3V_5_DY
AE9
2 R4927 VCCASW AF9
P1V05A
1
1
P3V3DSW
1UF_6.3V_2
AC9 VCCSUS3_3 GPIO/LCC VCCASW AG8 R4877
C4729
0_5%_2 AA9 VCCSUS3_3 DCPSUS1 AD10 1 2
2
C4716
1 AH10 AD8 0_5%_2_DY
0_5%_2_DY V8 Vcc3_3 P1V5S
2 1 C4728
W9 Vcc3_3 THERMAL SENSOR
2
1UF_6.3V_2 VCCTS1_5 J15 0.1UF_16V_2 1 2 C4763
1
1UF_6.3V_2
P3V3S Vcc3_3 K14
P3V3S
Vcc3_3
C4714
K16
C4935 0.1UF_16V_2 1 2 C4717
P1V05S 2 1
L4850
22UF_6.3V_5
ICC P3V3S
1 2 P1V05S_AXCK_DCB J18 VCC1P05 SDIO/PLSS
2
R4701
2.2UH_20% K19 VCC1P05 VCCSDIO U8 1 2
1
1
10UF_6.3V_3
C4723
1UF_6.3V_2
C4719
TP4703
AE20 VCCSUS3_3 VCCAPLL AC20 1
P1V05S
AE21 VCCSUS3_3 USB2 VCCIO AG16
TP24
LPT LP POWER VCCIO AG17 1 2
1
1UF_6.3V_2
22UF_6.3V_5
C4701
2
P1V05S
C4700
L4851
1 2
1
1
10UF_6.3V_3
2.2UH_20% ITL_HSW_ULT_2C_BGA_1168P
1UF_6.3V_2
2
C4755
C4724
2
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
MCP9-POWER
REFERENCE:4500~4949 SIZE
A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
VDDQ VCC
1
AH26 C48
0_5%_2_DY
VDDQ VCC
C4542
C4536
C4532
C4537
C4540
AJ31 C52
C4547
C4548
P1V05S AJ33 VDDQ VCC C56
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
1 R4569
AJ37 VDDQ VCC E23
1
2
0_5%_2
AN33 VDDQ VCC E25
C4527 VDDQ VCC
C4515
C4528
C4516
C4525
C4526
C4990
AP43 E27
2
P1V05S_VCCP AR48 VDDQ VCC E29
AY35 VDDQ VCC E31
AY40 VDDQ HSW ULT POWER VCC E33
4.7UF_6.3V_3
2
1
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
2
P1V05S_VCCP R4521 2
1
1
P1V05S_VCCP VCC E47
C4539
C4530
C4521
C4529
C4544
C4538
100_1%_2
14 VCCSENSE OUT E63 VCC_SENSE VCC E49
AB23 RSVD VCC E51
PVCCIO_OUT_R VCCIO_OUT VCC
2 R4524 1
R4821 1
A59 E53
130_1%_2
75_1%_2
2
R4524 CLOSE TO CPU AD23 RSVD VCC E57
C
AA23 RSVD VCC F24
C
R4525 AE59 RSVD VCC F28
43_5%_2 VCC F32
2
14
VR_SVID_ALERT# OUT 2 1 L62 VIDALERT* VCC F36
P1V05S_VCCP N63 VIDSCLK VCC F40
14 VR_SVID_CLK OUT
14 VR_SVID_DATA OUT L63 VIDSOUT VCC F44
VCCST_PWRGD B59 VCCST_PWRGD VCC F48
2
26 IN
150_5%_2
36 C59 F56
IN
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
VCC
1
G23
VSS VCC
C4522
C4533
C4531
C4535
C4534
D63 G25
C4549
PWR_DEBUG H59 PWR_DEBUG VCC G27
1
2
TP4563
TP4564
1 N59 RSVD_TP VCC G35
TP4565
1 N61 RSVD_TP VCC G37
T59 RSVD VCC G39
AD60 RSVD VCC G41
AD59 RSVD VCC G43
AA59 RSVD VCC G45
AE60 RSVD VCC G47
AC59 RSVD VCC G49
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
B RSVD VCC B
1
AG58 G51
RSVD VCC
C4545
C4559
C4560
P1V05S_VCCP U59 G53
C4561
V59 RSVD VCC G55
VCC G57
AC22 VCCST VCC H23
10UF_6.3V_3_DY
2
PVCORE AE23 VCCST VCC K23
1
VCC K57
C4590
ITL_HSW_ULT_2C_BGA_1168P
P1V05S
OUT VR_EN_HASWELL 36
16
10K_5%_2_DY
1
10K_5%_2
R4513
R4593
A A
2
R4594
16 1 2 36
VGATE IN OUT VR_READY_HASWELL
0_5%_2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
REFERENCE:4500~4949 CODE
MCP10-POWER
DOC.NUMBER REV
SIZE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 36 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
100_1%_2
AH28 VSS VSS AN31 AU51 VSS VSS C14
R4522
ITL_HSW_ULT_2C_BGA_1168P
AH30 VSS VSS AN32 AU53 VSS VSS C18
AH32 VSS VSS AN35 AU55 VSS VSS C20
AH34 VSS VSS AN36 AU57 VSS VSS C25
AH36 VSS VSS AN39 AU59 VSS VSS C27
2
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH40 VSS VSS AN42 AV16 VSS VSS C39
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14
AH51 VSS VSS AN48 AV33 VSS VSS D18
AH53 VSS VSS AN49 AV34 VSS VSS D2
AH55 VSS VSS AN51 AV36 VSS VSS D21
B
AH57 VSS VSS AN52 AV39 VSS VSS D23
B
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ14 VSS VSS AN63 AV43 VSS VSS D26
AJ23 VSS VSS AN7 AV46 VSS VSS D27
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
AJ29 VSS VSS AP20 AV55 VSS VSS D31
ITL_HSW_ULT_2C_BGA_1168P
RSVD N23
RSVD R23
SPARE
AT2 RSVD RSVD T23
AU44 RSVD RSVD U10
AV44 RSVD
D15 RSVD RSVD AL1
RSVD AM11
F22 RSVD RSVD AP7
H22 RSVD RSVD AU10
J21 RSVD RSVD AU15
RSVD AW14
RSVD AY14
A A
ITL_HSW_ULT_2C_BGA_1168P
INVENTEC
REFERENCE:4500~4949 TITLE
MODEL,PROJECT,FUNCTION
MCP11-GND,DAISY CHAIN,RESERVE
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 37 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CN4100
31 M_A_A<15..0> BI 0 98 A0 DQ0 5
BI M_A_DQ<8> 31
1 97 7
96
A1 DQ1
15
BI M_A_DQ<9> 31
2 BI
A2 DQ2 M_A_DQ<10> 31
3 95 17
92
A3 DQ3
4
BI M_A_DQ<11> 31
4 BI
A4 DQ4 M_A_DQ<12> 31
F 5 91 6 F
90
A5 DQ5
16
BI M_A_DQ<13> 31
6 BI
A6 DQ6 M_A_DQ<14> 31
7 86 18
89
A7 DQ7
21
BI M_A_DQ<15> 31
8
85
A8 DQ8
23
BI M_A_DQ<24> 31
9
107
A9 DQ9
33
BI M_A_DQ<25> 31
10
84
A10_AP DQ10
35
BI M_A_DQ<26> 31
11
83
A11 DQ11
22
BI M_A_DQ<27> 31
12
119
A12 DQ12
24
BI M_A_DQ<28> 31
13
80
A13 DQ13
34
BI M_A_DQ<29> 31
14
78
A14 DQ14
36
BI M_A_DQ<30> 31
15 A15 DQ15
39
BI M_A_DQ<31> 31
109
DQ16
41
BI M_A_DQ<40> 31
M_A_BS0 IN
31
108
BA0 DQ17
51
BI M_A_DQ<41> 31
M_A_BS1 IN
31
79
BA1 DQ18
53
BI M_A_DQ<42> 31
M_A_BS2 IN
31
114
BA2 DQ19
40
BI M_A_DQ<43> 31
M_CS#0 IN
31
121
S0# DQ20
42
BI M_A_DQ<44> 31
P1V5 31 M_CS#1 IN S1# DQ21 BI M_A_DQ<45> 31
101 50
31 M_CLK_DDR0_DP IN 103
CK0 DQ22
52
BI M_A_DQ<46> 31
31 M_CLK_DDR0_DN IN CK0# DQ23 BI M_A_DQ<47> 31
P3V3A 102 57
31 M_CLK_DDR1_DP IN 104
CK1 DQ24
59
BI M_A_DQ<50> 31
31 M_CLK_DDR1_DN IN CK1# DQ25 BI M_A_DQ<51> 31
0.1UF_16V_2
1
R4117 73 67
31 M_CKE0 IN CKE0 DQ26 BI M_A_DQ<55> 31
C4550
1 2
OUT M_ODT0 38 74 69
31 M_CKE1 IN 115
CKE1 DQ27
56
BI M_A_DQ<49> 31
64.9_1%_2 31 M_A_CAS# IN CAS# DQ28 BI M_A_DQ<52> 31
110 58
R4118
31 M_A_RAS# IN 113
RAS# DQ29
68
BI M_A_DQ<53> 31
P1V5 1 2 31 M_A_WE# IN WE# DQ30 BI M_A_DQ<54> 31
2
OUT M_ODT1
220K_5%_2
38 197 70
1
38 SA0_DIM0 OUT 201
SA0 DQ31
129
BI M_A_DQ<48> 31
R4114
3 2 64.9_1%_2 38 SA1_DIM0 OUT SA1 DQ32 BI M_A_DQ<0> 31
D S 202 131
R4119
58 50 39 28 26 PCH_3S_SMCLK IN 200
SCL DQ33
141
BI M_A_DQ<1> 31
E 1 2 26 PCH_3S_SMDATA IN SDA DQ34 BI M_A_DQ<2> 31 E
OUT M_ODT2 39
DQ35 143
BI M_A_DQ<3> 31
G
1 U4100 5 116 130
2
n.c. VCC Q4100 64.9_1%_2 38 M_ODT0 IN ODT0 DQ36 BI M_A_DQ<4> 31
2 BSS138LT1 120 132
27 DDR_PG_CTRL IN A
R4120
38 M_ODT1 IN ODT1 DQ37 BI M_A_DQ<5> 31
1
3 4 140
GND Y 1 2 DQ38 BI M_A_DQ<6> 31
2M_5%_2_DY
OUT M_ODT3 39 11 142
1
28
DM0 DQ39
147
BI M_A_DQ<7> 31
R4115
NXP_74AUP1G07GW_TSOT353_5P 64.9_1%_2 DM1 DQ40 BI M_A_DQ<20> 31
46 149
63
DM2 DQ41
157
BI M_A_DQ<18> 31
136
DM3 DQ42
159
BI M_A_DQ<17> 31
153
DM4 DQ43
146
BI M_A_DQ<16> 31
2
170
DM5 DQ44
148
BI M_A_DQ<21> 31
OUT DDR_VTT_PG_CTRL 16 187
DM6 DQ45
158
BI M_A_DQ<19> 31
DM7 DQ46
160
BI M_A_DQ<22> 31
12
DQ47
163
BI M_A_DQ<23> 31
31 M_A_DQS1_DP BI 29
DQS0 DQ48
165
BI M_A_DQ<32> 31
31 M_A_DQS3_DP BI 47
DQS1 DQ49
175
BI M_A_DQ<33> 31
31 M_A_DQS5_DP BI 64
DQS2 DQ50
177
BI M_A_DQ<35> 31
31 M_A_DQS6_DP BI 137
DQS3 DQ51
164
BI M_A_DQ<39> 31
31 M_A_DQS0_DP BI 154
DQS4 DQ52
166
BI M_A_DQ<36> 31
31 M_A_DQS2_DP BI 171
DQS5 DQ53
174
BI M_A_DQ<37> 31
31 M_A_DQS4_DP BI 188
DQS6 DQ54
176
BI M_A_DQ<38> 31
31 M_A_DQS7_DP BI 10
DQS7 DQ55
181
BI M_A_DQ<34> 31
31 M_A_DQS1_DN BI 27
DQS#0 DQ56
183
BI M_A_DQ<63> 31
31 M_A_DQS3_DN BI 45
DQS#1 DQ57
191
BI M_A_DQ<62> 31
31 M_A_DQS5_DN BI 62
DQS#2 DQ58
193
BI M_A_DQ<60> 31
31 M_A_DQS6_DN BI 135
DQS#3 DQ59
180
BI M_A_DQ<61> 31
31 M_A_DQS0_DN BI 152
DQS#4 DQ60
182
BI M_A_DQ<58> 31
D 31 M_A_DQS2_DN BI DQS#5 DQ61 BI M_A_DQ<59> 31 D
169 192
31 M_A_DQS4_DN BI 186
DQS#6 DQ62
194
BI M_A_DQ<57> 31
31 M_A_DQS7_DN BI DQS#7 DQ63 BI M_A_DQ<56> 31
FOX_AS0A626_U4R6_7H_HP_204P
6026B0216701
P1V5 TP4100 TP4101 TP4102
TP30 TP30 TP30
CN4100
1
75 VDD1 VSS16 44
76 VDD2 VSS17 48
81 49
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
VDD3 VSS18
2.2UF_6.3V_2
1
1
68PF_50V_2
33PF_50V_2
330UF_2.5V
P0V75M_VREF 82 VDD4 VSS19 54
C7593
C7594
C4106
C4146
C4113
C4117
C4118
C4115
C4109
P1V5 87 VDD5 VSS20 55
+
P0V75S_DIMM0_VREF_CA P0V75M_VREF 88 VDD6 VSS21 60
P1V5 93 61
P0V75S_DIMM0_VREF_DQ VDD7 VSS22
94 VDD8 VSS23 65
1.8K_1%_2
2
2
2
2
R4104 99 VDD9 VSS24 66
1 2 RF 100 71
1.8K_1%_2
2
VDD10 VSS25
R4106
R4107 105 72
0_5%_2_DY 1 2 VDD11 VSS26
106 127
R4108
10UF_6.3V_3
VDD12 VSS27
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
0_5%_2_DY 111 VDD13 VSS28 128
C4108
C4114
C4116
C4112
C4107
1
VDD15 VSS30
C 118 VDD16 VSS31 138 C
1.8K_1%_2
2
2
P3V3S 124 144
1.8K_1%_2
2
VDD18 VSS33
R4122
VSS34 145
199 150
R4109
VDDSPD VSS35
VSS36 151
1
NC2 VSS38
2.2UF_6.3V_2
0.1UF_16V_2
1
VSS40 162
C4104
198 167
39 PM_EXTTS#1_R OUT 30
EVENT# VSS41
168
27 DDR3_DRAMRST#OUT RESET# VSS42
172
VSS43
2
VSS44 173
1 VREF_DQ VSS45 178
126 VREF_CA VSS46 179
VSS47 184
VSS48 185
2 VSS1 VSS49 189
P0V75S_DIMM0_VREF_DQ 3 VSS2 VSS50 190
8 VSS3 VSS51 195
9 VSS4 VSS52 196
13 VSS5
14 P0V75S
2.2UF_6.3V_2
VSS6
0.1UF_16V_2
1
1
19 VSS7
C4120
20 VSS8
C4119
25 VSS9
B 26 VSS10 VTT1 203 B
31 VSS11 VTT2 204
2
32 VSS12
37 VSS13 G1 G1
38 VSS14 G2 G2
43 VSS15
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
FOX_AS0A626_U4R6_7H_HP_204P
C4100
C4103
C4102
C4101
P3V3S
P0V75S_DIMM0_VREF_CA
10K_5%_2_DY
1
2
R4103
NOTE:
2.2UF_6.3V_2
0.1UF_16V_2
1
1
IF SA0_DIM0=0 , SA1_DIM0=0 C4111
2
C4110
SO-DIMMA SPD ADDRESS IS 0XA0
SO-DIMMA TS ADDRESS IS 0X30 IN SA0_DIM0 38
2
2
IN SA1_DIM0 38
IF SA0_DIM0=1 , SA1_DIM0=0
SO-DIMMA SPD ADDRESS IS 0XA2
1
1
10K_5%_2
10K_5%_2
R4100
A A
INVENTEC
2
REFERENCE NUMBER:4100~4299
TITLE
MODEL,PROJECT,FUNCTION
DDR3_SO-DIMM0
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
F F
CN4125
31 M_B_A<15..0> BI 0 98 A0 DQ0 5
BI M_B_DQ<8> 31
1 97 7
96
A1 DQ1
15
BI M_B_DQ<14> 31
2
95
A2 DQ2
17
BI M_B_DQ<10> 31
3
92
A3 DQ3
4
BI M_B_DQ<11> 31
4
91
A4 DQ4
6
BI M_B_DQ<12> 31
5
90
A5 DQ5
16
BI M_B_DQ<9> 31
6
86
A6 DQ6
18
BI M_B_DQ<13> 31
7
89
A7 DQ7
21
BI M_B_DQ<15> 31
8
85
A8 DQ8
23
BI M_B_DQ<29> 31
9
107
A9 DQ9
33
BI M_B_DQ<28> 31
10
84
A10_AP DQ10
35
BI M_B_DQ<26> 31
11
83
A11 DQ11
22
BI M_B_DQ<27> 31
12
119
A12 DQ12
24
BI M_B_DQ<25> 31
13
80
A13 DQ13
34
BI M_B_DQ<24> 31
14
78
A14 DQ14
36
BI M_B_DQ<30> 31
15 A15 DQ15
39
BI M_B_DQ<31> 31
109
DQ16
41
BI M_B_DQ<40> 31
31 IN M_B_BS0 108
BA0 DQ17
51
BI M_B_DQ<41> 31
P0V75M_VREF 31 IN M_B_BS1 BA1 DQ18 BI M_B_DQ<47> 31
P1V5 79 53
P0V75S_DIMM1_VREF_DQ
31 IN M_B_BS2 114
BA2 DQ19
40
BI M_B_DQ<43> 31
31 IN M_CS#2 121
S0# DQ20
42
BI M_B_DQ<44> 31
31 IN M_CS#3 101
S1# DQ21
50
BI M_B_DQ<45> 31
31 M_CLK_DDR2_DP IN CK0 DQ22 BI M_B_DQ<46> 31
1.8K_1%_2
2
R4134 103 52
31 M_CLK_DDR2_DN IN CK0# DQ23 BI M_B_DQ<42> 31
1 2 102 57
31 M_CLK_DDR3_DP IN CK1 DQ24 BI M_B_DQ<56> 31
R4132
0_5%_2_DY 104 59
31 M_CLK_DDR3_DN IN CK1# DQ25 BI M_B_DQ<57> 31
73 67
E 31 M_CKE2 IN 74
CKE0 DQ26
69
BI M_B_DQ<58> 31 E
31 M_CKE3 IN CKE1 DQ27 BI M_B_DQ<59> 31
1
115 56
31 M_B_CAS# IN 110
CAS# DQ28
58
BI M_B_DQ<60> 31
31 M_B_RAS# IN 113
RAS# DQ29
68
BI M_B_DQ<61> 31
31 M_B_WE# IN WE# DQ30 BI M_B_DQ<62> 31
1.8K_1%_2
2
197 70
39 SA0_DIM1 OUT 201
SA0 DQ31
129
BI M_B_DQ<63> 31
39 SA1_DIM1 OUT SA1 DQ32 BI M_B_DQ<0> 31
R4131
202 131
38
58
28
50
26 PCH_3S_SMCLK IN 200
SCL DQ33
141
BI M_B_DQ<1> 31
PCH_3S_SMDATA
26 IN SDA DQ34
143
BI M_B_DQ<7> 31
DQ35 BI M_B_DQ<3> 31
1
116 130
38 M_ODT2 IN 120
ODT0 DQ36
132
BI M_B_DQ<4> 31
38 M_ODT3 IN ODT1 DQ37
140
BI M_B_DQ<5> 31
11
DQ38
142
BI M_B_DQ<2> 31
28
DM0 DQ39
147
BI M_B_DQ<6> 31
46
DM1 DQ40
149
BI M_B_DQ<20> 31
63
DM2 DQ41
157
BI M_B_DQ<21> 31
136
DM3 DQ42
159
BI M_B_DQ<22> 31
153
DM4 DQ43
146
BI M_B_DQ<23> 31
170
DM5 DQ44
148
BI M_B_DQ<16> 31
187
DM6 DQ45
158
BI M_B_DQ<17> 31
DM7 DQ46
160
BI M_B_DQ<19> 31
12
DQ47
163
BI M_B_DQ<18> 31
31 M_B_DQS1_DP BI 29
DQS0 DQ48
165
BI M_B_DQ<32> 31
31 M_B_DQS3_DP BI 47
DQS1 DQ49
175
BI M_B_DQ<33> 31
31 M_B_DQS5_DP BI 64
DQS2 DQ50
177
BI M_B_DQ<34> 31
31 M_B_DQS7_DP BI 137
DQS3 DQ51
164
BI M_B_DQ<35> 31
31 M_B_DQS0_DP BI 154
DQS4 DQ52
166
BI M_B_DQ<36> 31
D 31 M_B_DQS2_DP BI 171
DQS5 DQ53
174
BI M_B_DQ<37> 31 D
31 M_B_DQS4_DP BI 188
DQS6 DQ54
176
BI M_B_DQ<38> 31
31 M_B_DQS6_DP BI 10
DQS7 DQ55
181
BI M_B_DQ<39> 31
31 M_B_DQS1_DN BI 27
DQS#0 DQ56
183
BI M_B_DQ<55> 31
31 M_B_DQS3_DN BI 45
DQS#1 DQ57
191
BI M_B_DQ<51> 31
31 M_B_DQS5_DN BI 62
DQS#2 DQ58
193
BI M_B_DQ<50> 31
31 M_B_DQS7_DN BI 135
DQS#3 DQ59
180
BI M_B_DQ<53> 31
31 M_B_DQS0_DN BI 152
DQS#4 DQ60
182
BI M_B_DQ<52> 31
31 M_B_DQS2_DN BI 169
DQS#5 DQ61
192
BI M_B_DQ<49> 31
31 M_B_DQS4_DN BI 186
DQS#6 DQ62
194
BI M_B_DQ<54> 31
31 M_B_DQS6_DN BI DQS#7 DQ63 BI M_B_DQ<48> 31
FOX_AS0A626_U4R6_7H_HP_204P
P1V5 6026B0216701
75 CN4125 44
VDD1 VSS16
76 48
330UF_2.5V_DY
VDD2 VSS17
81 49
1
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
1
68PF_50V_2
33PF_50V_2
VDD3 VSS18
2.2UF_6.3V_2
1
1
82 54
C7595
C7596
C4131
VDD4 VSS19
C4147
C4143
C4140
C4141
C4134
C4133
87 55
+
VDD5 VSS20
88 VDD6 VSS21 60
93 VDD7 VSS22 61
94 65
2
2
VDD8 VSS23
2
2
99 VDD9 VSS24 66
RF 100 VDD10 VSS25 71
C 105 VDD11 VSS26 72 C
P3V3S 106 VDD12 VSS27 127
10UF_6.3V_3
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
111 128
1
1
VDD13 VSS28
C4132
112 VDD14 VSS29 133
C4136
C4135
C4142
C4139
117 VDD15 VSS30 134
2.2UF_6.3V_2
0.1UF_16V_2
118 138
1
VDD16 VSS31
123 139
C4130
VDD17 VSS32
124 144
C4129
2
2
VDD18 VSS33
VSS34 145
199 VDDSPD VSS35 150
151
2
VSS36
P3V3S 77 NC1 VSS37 155
R4200 122 NC2 VSS38 156
1 2 125 NCTEST VSS39 161
10K_5%_2 VSS40 162
198 167
38 PM_EXTTS#1_R OUT 30
EVENT# VSS41
168
38 27 DDR3_DRAMRST#OUT RESET# VSS42
172
VSS43
VSS44 173
P3V3S 1 VREF_DQ VSS45 178
126 VREF_CA VSS46 179
VSS47 184
VSS48 185
2 VSS1 VSS49 189
1
10K_5%_2
2.2UF_6.3V_2
0.1UF_16V_2
19
1
VSS7
20 P0V75S
C4145
VSS8
IN SA1_DIM1 39 25
C4144
VSS9
26 VSS10 VTT1 203
IN SA0_DIM1 39 31 VSS11 VTT2 204
32
2
VSS12
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
37 VSS13 G1 G1
38 G2
1
10K_5%_2
VSS14 G2
43
R4125
C4128
C4127
C4126
C4125
VSS15
P0V75S_DIMM0_VREF_CA FOX_AS0A626_U4R6_7H_HP_204P
2
2
2.2UF_6.3V_2
0.1UF_16V_2
1
1
C4137
C4138
NOTE:
2
A A
INVENTEC
TITLE
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
C C
B
RESERVED B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
DPB DEMUX1 TO DP
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 40 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S
1
C5410
0.01UF_50V_2 P3V3S
1
2
C5411
0.1UF_16V_2
2
C C
61
60
59
58
57
56
55
54
53
52
51
P3V3S
U5401
PI0/SDA_CTL
CFG0
VDD33
PC10
PC20
VDD33
EPAD
GND
CFG1
PC11
PC21
1
OUT1_AUXn_SDA
OUT2_AUXn_SDA
OUT1_AUXp_SCL
OUT2_AUXp_SCL
19 GND OUT2_D3p 32 1M_5%_2
2.2UF_6.3V_2
1
20 31
IN_DDC_SDA
IN_DDC_SCL
REXT OUT2_D3n
ONLY NEED DP
1
C5414
IN_AUXp
IN_AUXn
VDD33
VDD33
R5415
P3V3S
2
PARADE_PS8338BQFN60GTR_QFN_60P
2
4.99K_1%_2
4.7K_5%_2
1
P3V3S
R5418
22
23
24
25
26
27
28
29
30
21
P3V3S
1
3 2
41
0.01UF_50V_2
C5413
Q5401 SW PIN
0.1UF_16V_2
2
D
1
1
100K_5%_2
54 29 IN G
57 H:PORT 2
2
2 R5437
S
SSM3K7002BFU
A A
100K_5%_2
2
R5416
BI DPC_DDCCLK
30 DPC_DOCK_DATA_AUX_DN
DPC_DDCDATA BI 57
30 BI
DPC_DOCK_CLK_AUX_DP BI
30 BI DPC_AUX_DP C5498 1 DPC_AUX_C_DP 57
2 DPC_PORT_DATA_AUX_DN
2
0.1UF_16V_2 BI 42
30 BI DPC_AUX_DN DPC_AUX_C_DN
1 2 DPC_PORT_CLK_AUX_DP BI 42
1
1
100K_5%_2
100K_5%_2
C5499 0.1UF_16V_2
R5417
INVENTEC
2 R5435
2
TITLE
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
12PF_50V_2
12PF_50V_2
PIN 2 R3062 R3061
1
150_5%_2
150_5%_2
C3069
R7577
R7574
C7571
C7548
C3070
P1V5_VDD
PIN 5 R3065 R3063 P3V3S P3V3S_DVDD33
C3077
2
PIN 8 C3061 L3065
C3062 1 2 C3071
FOR EMI
0.01UF_50V_2
OSC_OUT 1 2
0.1UF_16V_2
0.01UF_50V_2
1UF_6.3V_2
1
1
BLM15BB470SS1
1
1UF_6.3V_2
PIN 11 C3073
C3090
C3091
2
3
P3V3S_DVDD33 20PF_50V_2
C3085
D CRT_G L7503 2 120NH,5%
C3065
C3066
1 64
PIN 14 R3064 R3080 OUT CRT_G_L
C3074 X3065 D
12PF_50V_2
12PF_50V_2
1
1
P1V5_VDD 27MHZ
150_5%_2
150_5%_2
2
2
R7578
R7575
C7572
C7549
2
2
PIN 15 R3078
4
1
C3072
PIN 16 R3067 L3068 OSC_IN 1 2
1 2
4.7UF_6.3V_3
2
R3074
PIN 17 R3079 1 2 20PF_50V_2
1
SWF2520CF_4R7K_M
10K_5%_2_DY
C3092
PIN 27 L3066 R3075 P1V5_VDD
1 2
C3087 0_5%_2
R3076 R3081 2
PIN 35 C3068 R3081 1 2 1
2
P3V3S_DVDD33 P3V3S_AVDD33 10K_5%_2 C3067 0_5%_2 CRT_B 1 L7504 2 120NH,5% 64
PIN 36 R3077 1 R3077 2 2 1 OUT CRT_B_L
0.1UF_16V_2
12PF_50V_2
12PF_50V_2
1
1
0_5%_2_DY
PIN 37 R3074 R3076
150_5%_2
150_5%_2
R7579
R7576
C7573
C7550
1 L3067 2 C3068
2 1
0.01UF_50V_2
PIN 38 10K_DY R3075 BLM15BB470SS1
1
1
1UF_6.3V_2
C3090 C3089 2.2UF_6.3V_3_DY
C3091
C3088
2
1 R3092 2
PIN 39 L3068 0_5%_2
40
39
38
37
36
35
34
33
32
31
C C3092 U3065 C
2
PVDD33
VDDD15
RED2
SWOUT
OSC_OUT
TESTMODE
PGND
VDDA15_DAC
OSC_IN
RED1
PIN 40 R3092 R7577,R7578,R7579 CLOSE TO U3065
1
41 IN ML0_N VSYNC1 OUT 64
0.1UF_16V_2_DY
8 23
C3087
VDDA15_DP DDC_SDA2 R3091
41 IN DPC1_PORT_DP 9 ML1_P DDC_SDA1 22 CRT_DDCDATA OUT 64
41 IN DPC1_PORT_DN 10 ML1_N VDDD33_IO 21 CRT_DDCCLK OUT 64
P1V5_VDD
DDC_SDA2
CFG2_SDA
DDC_SCL1
CFG1_SCL
2
HSYNC2
VSYNC2
RST_N
CFG5
CFG3
GND
HPD
NXP_PTN3355BS_HVQFN_40P
12
1UF_6.3V_2_DY 13
14
15
16
17
1 18
1 19
20
R3061
111
41
B 1 2 B
10K_5%_2 1
TP3069
C3073
C3069
0.01UF_50V_2
0.1UF_16V_2
1 2
1
P3V3S_DVDD33
TP3067
TP3068
TP30
TP30
TP30
C3061
C3062
0.01UF_50V_2_DY
1 R3062 2 P3V3S_DVDD33
2
0_5%_2_DY
C3070
1
1 2 2 2 1 1 1 R3067 2
0.1UF_16V_2
2
C3093
R3065 12K_5%_DY 1M_5%_2
2.2UF_6.3V_3_DY 1 2
R3078
1
10K_5%_2_DY
TP30
2
P3V3S_DVDD33
1 R3063 2 TP3065
1 TP3066
0_5%_2
2 1 TP30
41 IN DPC_PORT_HPD 1
C3077 0.1UF_16V_2
2 R3071 1 C3094
100K_5%_2 1UF_6.3V_2
P3V3S_DVDD33
2
A A
1 R3064 2
0_5%_2_DY
R3080
42 41 DPC_PORT_CLK_AUX_DP 1 2 P3V3S_DVDD33
IN
0_5%_2
R3079 R3093
42 41 IN DPC_PORT_DATA_AUX_DN 1 2 1 2
1
0_5%_2
0.1UF_16V_2_DY
C3074
RSC_0402_DY
CHECK IF DEMUX NOT NEED R3079,R3080
INVENTEC
2
TITLE
MODEL,PROJECT,FUNCTION
DP TO VGA CONVERTER
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 42 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P5V0A
10K_5%_2
1
R3305
P5V0A 30 CN3300
D DPB0_PORT_DP 1 2 C3300 0.1UF_16V_2 DPB0_PORT_C_DP 1
IN 2
1
30
2 D
DPB0_PORT_DN 1 2 C3301 0.1UF_16V_2 DPB0_PORT_C_DN 3
30 IN 0.1UF_16V_2
3
DPB1_PORT_DP DPB1_PORT_C_DP 4
1
1 2
10K_5%_2
IN C3307 4
2
5
R3303
5
30 DPB1_PORT_DN 1 2 0.1UF_16V_2 DPB1_PORT_C_DN 6
30 IN IN C3306 6
DP_EN 30 DPB2_PORT_DP 1 2 C3302 0.1UF_16V_2 DPB2_PORT_C_DP 7
IN 8
7
8
Q3300 30
2 1 S1 DPB2_PORT_DN 1 2 C3303 0.1UF_16V_2 DPB2_PORT_C_DN 9
30 IN 0.1UF_16V_2
9
G1 2 DPB3_PORT_DP IN C3305 1 2 DPB3_PORT_C_DP10 10
30 6 11
DDC_EN IN D1 30 0.1UF_16V_2
11
3 D2 DPB3_PORT_DN IN C3304 1 2 DPB3_PORT_C_DN12 12
G2 5 13 13
4 14 14
S2 15
L2N7002DW1T1G 30 DPB_PORT_CLK_AUX_DP IN 15
16 16
30 17 G1
DPB_PORT_DATA_AUX_DN IN 18
17 G1
G2
43 DPB_PORT_HPD OUT 18 G2
19 19 G3 G3
P3V3S_DP 20 20 G4 G4
TAIWIN_DP004_206CRL_TW_20P
P3V3S TMP121112006
1
1M_5%_2
5.1M_5%_2
C C
R3304
R3302
U3300
1 GND VOUT 8
2 VIN VOUT 7 DGND_CHASSIS3
3 VIN VOUT 6
2
4 5
IN EN_EN# FLG#
64 59 57 51 31 28 26 24 16 SLP_S3#_3R
ROHM_BD82022FVJ_E2_MSOP_8P
1UF_6.3V_2
1
C3311
10UF_6.3V_3
1UF_6.3V_2
1
1
C3310
C3308
DISPLAY PORT
2
B B
IN DPB_PORT_HPD 43
100K_5%_2_DY
P5V0S
2 R3306 1
3
Q3301
D
1 G
S
BSS138LT1
2
A IN DPD_HPD 30 A
INVENTEC
TITLE
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S P3V3S_LCDVDD
1 R3001 2
100_5%_2
1
C3003
4.7UF_6.3V_3
U3000
2
5 IN OUT 1
1
2
1UF_6.3V_2
GND
C3006
4 3
DIS EN IN LVDS_VDD_EN30
CHECK IF TOUCH PANEL NEED OTHER POWER RAIL
100K_5%_2
D
NUVO_NCT3521U_SOT23_5P D
R3003 1
CN3000
G1
2
G
L7501 1 1
46 IN 4 3 USB_D_P1_DN_L 2 2
USB_D_P1_DN
TOUCH PANEL 46 USB_D_P1_DP IN 1 2 USB_D_P1_DP_L 3 3
4 4
2
WCM_2012_900T 5 5
6 6
7 7
30 1 2 C3014 0.1UF_16V_2 EDP_TX1_C_DN 8
EDP_TX1_DN IN C3013 0.1UF_16V_2
8
30 IN 1 2 EDP_TX1_C_DP 9 9
EDP_TX1_DP
10 10
30 1 2 C3012 0.1UF_16V_2 EDP_TX0_C_DN 11
EDP_TX0_DN IN C3011 0.1UF_16V_2
11
30 IN 1 2 EDP_TX0_C_DP 12 12
EDP_TX0_DP
13 13
30 1 2 C3010 0.1UF_16V_2 EDP_AUX_C_DP 14
EDP_AUX_DP IN C3009 0.1UF_16V_2
14
30 1 2 EDP_AUX_C_DN 15
EDP_AUX_DN IN 15
16 16
17
P3V3S_LCDVDD 17
18 18
19
2
19
D3000 20 20
21
NC
21
C 3 1 BKLT_EN 22 C
62 51 LID_SW#_3 IN 23
22
P3V3S 30 INV_PWM IN 23
24 24
BAT54_30V_0.2A 25
59 DMIC_CLK OUT 25
1 R3009 2 26
30 L_BKLT_EN IN 59 DMIC_DAT OUT
27
26
2K_5%_2 27
100K_5%_2
1
28 28
1
1 R3023 2 29
P5V0S TOUCH_RST# IN 29
C2255
2 R3008
30
0.1UF_16V_2
30 CAMERA_ON IN 0_5%_2_DY 30
31 31
32
4.7UF_6.3V_3
L7500 32
0.1UF_16V_2
1UF_6.3V_2
3 USB_P6_DP_L
1
33
2
32 USB_P6_DP BI 4 33
32 USB_P6_DN BI 1 2 USB_P6_DN_L 34 34
C2251
C2250
C2256
35 35
WCM_2012_900T 36 36
37 37
38
2
PVBAT 38
39 39
40 40
G G2
30 EDP_HPD# OUT
ACES_50203_0400T_001_40P
B 6012B0431203 B
100K_5%_2
1
R3021
2
25~34 WEBCAM
35~36 LOGO LIGHT
A A
INVENTEC
TITLE
REFERENCE NUMBER:3000~3049 MODEL,PROJECT,FUNCTION
LCM & WEBCAM
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 44 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P1V5S
1 R1702
1 R1701
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
0.01UF_50V_2
0_5%_2_DY R1703
CN1700
1
1 GND
0.01UF_50V_2 C1705 SATA_TXP0_O
C1711
C1712
C1713
C1714
1 2 2
7 4.7K_5%_2_DY
10 4.7K_5%_2_DY
45 SATA_C_TXP0_O IN A+
1
45
0.01UF_50V_2 1 2 C1704 SATA_TXN0_O 3
SATA_C_TXN0_O IN A-
4 GND
0.01UF_50V_2
45 SATA_C_RXN0_O OUT
1 2 C1702 SATA_RXN0_O 5 B-
0.01UF_50V_2 1 2 C1703 SATA_RXP0_O 6
2
45 SATA_C_RXP0_O OUT B+
C1710 7 GND
2
2
2
1 2 8 V3.3
1.3A 9 V3.3
1UF_6.3V_2 10
1 R1704 2 29 DEVSLP0 OUT V3.3
11 GND
8
9
0_5%_2_DY 12 GND
13
P5V0S GND
VDD_15
B_PRE-I2C_ADDR0
I2C_EN#
EN
A_PRE-I2C_ADDR1
U1700 14 V5
D 15 V5
PARADE_PS8520ATQFN20GTR_TQFN_20P 16 V5 D
1
17 GND
C1701
18
4.7UF_6.3V_3
RESERVED
19
C1706 1 2 0.01UF_50V_2 SATA_RX0_DP 5 11 SATA_C_RXP0_O 45
GND
SATA_RX0_C_DP OUT B_OUTP B_INP OUT 20
C1707 1 2 0.01UF_50V_2 SATA_RX0_DN 4 12 SATA_C_RXN0_O 45
V12
SATA_RX0_C_DN OUT B_OUTN B_INN OUT 21 V12 G G1
3 13
GND GND 22 G2
2
C1708 1 2 0.01UF_50V_2 SATA_TX0_DN 2 14 SATA_C_TXN0_O 45
V12 G
SATA_TX0_C_DN IN A_INN A_OUTN IN
C1709 1 2 0.01UF_50V_2 SATA_TX0_DP 1 15 SATA_C_TXP0_O 45 ALLTOP_C166CS_12201_L_22P
SATA_TX0_C_DP IN A_INP A_OUTP IN
B_PRE1-SDA_CTL
A_PRE1-SCL_CTL
6012B0323101
VDD_15
EPAD
REXT
TEST
P1V5S
SATA HDD CONNECTOR
20
19
18
17
16
21
1 R1705 2
4.7K_5%_2_DY
0_5%_2_DY
1
R1706 2
R1951
1
4.7K_5%_2_DY
C 1 R1707 2 C
2
R1709
1 2 1 R1708 2
4.7K_5%_2_DY CN1951 P3V3S
4.3K_1%_2 1 GND1
3 SLOT C_KEY M 2
R1954 GND2 3.3VAUX1
1 2 5 PERn3 3.3VAUX2 4
7 PERp3 NC1 6
4.7UF_6.3V_3
0_5%_2_DY 9 GND3 NC2 8
1
11 PETp3 DAS/DSS# 10
C1956
13 PETn3 3.3VAUX3 12
15 GND4 3.3VAUX4 14
17 PERn2 3.3VAUX5 16
19 PERp2 3.3VAUX6 18
2
21 GND5 NC3 20
23 PETp2 NC4 22
25 PETn2 NC5 24
27 GND6 NC6 26
29 PERn1 NC7 28
31 PERp1 NC8 30
33 GND7 NC9 32
B 35 PETn1 NC10 34 B
37 PETp1 NC11 36
39 38 29
GND8 DEVSLP IN DEVSLP1
33 C1950 1 2 0.01UF_50V_2 SATA_RX1_DP 41 40
SATA_RX1_C_DP OUT PERn0/SATA-B+ NC12
33 C1951 1 2 0.01UF_50V_2 SATA_RX1_DN 43 42
SATA_RX1_C_DN OUT 45
PERp0/SATA-B- NC13
44
GND9 NC14
33 IN C1952 1 2 0.01UF_50V_2 SATA_TX1_DN 47 PETn0/SATA-A- NC15 46
SATA_TX1_C_DN
33 IN C1953 1 2 0.01UF_50V_2 SATA_TX1_DP 49 PETp0/SATA-A+ NC16 48
SATA_TX1_C_DP 51 50
GND10 PERST#/NC
53 REFCLKN CLKREQ#/NC 52
55 REFCLKP PEWake#/NC 54
57 GND11 NC17 56
NC18 58
KEY KEY
KEY KEY
KEY KEY
KEY KEY
A A
68 1 TP1951
R1953 NC19 SUSCLK
33 1 2 69 70
MSATA_DET# OUT 71
PEDET 3.3VAUX7
72
TP30
GND12 3.3VAUX8
0_5%_2_DY 73 GND13 3.3VAUX9 74
75 GND14
67
GND15
GND16
0_5%_2_DY
1
R1952
LOTES_APCI0020_P001A01_75P
INVENTEC
2
G2
G1
M TYPE TITLE
REV
NGFF SSD CHANGE by DATE
SIZE
A3
CODE
CS
1310xxxxx-0-0
SHEET
X01
XXX 21-OCT-2002 45 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3A
10K_5%_2
1 R2560 2
C2578 U2550
1 2 48 2 44
GPIO2(VBUS) USB2DN_DM1 OUT USB_D_P1_DN TOUCH PANEL(USB2)
1 44
0.01UF_50V_2
USB2DN_DP1 OUT USB_D_P1_DP
Upstream
32 54 7
USB_P2_DN IN USB2UP_DM USB3DN_RXDM1
32 53 6
USB_P2_DP IN USB2UP_DP USB3DN_RXDP1
0.1UF_16V_2
C2567 0.1UF_16V_2 USB3DN_TXDM1 4
32 IN 1 2 C2568 USB30_RX2_C_DN 56 USB3UP_TXDM USB3DN_TXDP1 3
USB30_RX2_DN
32 IN 1 2 USB30_RX2_C_DP 55 USB3UP_TXDP
USB30_RX2_DP
C2569
D 32 USB30_TX2_DN OUT 1 2 C2570 USB30_TX2_C_DN 59 USB3UP_RXDM
32 1 2 USB30_TX2_C_DP 58 D
USB30_TX2_DP OUT USB3UP_RXDP
0.1UF_16V_2 10 55
USB2DN_DM2 OUT USB_D_P2_DN
0.1UF_16V_2 P3V3A USB2DN_DP2 9
OUT USB_D_P2_DP 55 BT(USB2)
R2557 R2559
1 2 1 2
USB3DN_RXDM2 15
0_5%_2_DY 10K_5%_2 37 14
GPIO12/SM_DAT USB3DN_RXDP2
38 GPIO13/SM_CLK
R2558 R2556 USB3DN_TXDM2 12
Downstream
1 2 1 2 USB3DN_TXDP2 11
10K_5%_2 0_5%_2_DY
Reset
P3V3A
100K_5%_2
50 RESET#
2
R2550
18 47
Bias/Test
USB2DN_DM3 OUT USB_D_P3_DN
17 47
USB2DN_DP3 OUT USB_D_P3_DP
64 RBIAS
0.1UF_16V_2_DY
R2571 49
1 1
TEST
13 1 2 60 23 47
1V2A_PG IN ATEST USB3DN_RXDM3 OUT USB30_D_RX3_DN USB UP3
1
2
12K_1%_2
10K_5%_2
10K_5%_2
22 47
USB3DN_RXDP3 OUT USB30_D_RX3_DP
C2565
R2553
R2554
R2555
0_5%_2
20 47
USB3DN_TXDM3 OUT USB30_D_TX3_DN
C USB3DN_TXDP3 19
OUT USB30_D_TX3_DP 47 C
2
1
Clock
C2566
2 1 62 XTALI/CLK_IN
25MHZ_10PF
HUB_XTAL_IN USB2DN_DM4 25
OUT USB_D_P4_DN 47
3
2
10PF_50V_2 24 47
USB2DN_DP4 OUT USB_D_P4_DP
X2500
HUB_XTAL_OUT 61 30
OUT USB30_D_RX4_DN 47
XTALO USB3DN_RXDM4
29 47
USB UP4
P3V3A USB3DN_RXDP4 OUT USB30_D_RX4_DP
4
1
P3V3A C2550
10K_5%_2_DY
2 1 27 47
USB3DN_TXDM4 OUT USB30_D_TX4_DN
26 47
USB3DN_TXDP4 OUT USB30_D_TX4_DP
10K_5%_2_DY
1
1
1
R2590 10PF_50V_2
1
R2570
0.1UF_16V_2_DY
R2581
R2580
0_5%_2_DY
C2590
1 2 R2591
1 2 40 SPI_CLK/GPIO4
1 R2575 2 41
10K_5%_2
SPI_DO/GPIO5
10K_5%_2_DY 42
0_5%_2_DY
2
2
2
SPI_DI P3V3A
2
1
10K_5%_2_DY
10K_5%_2_DY
1
35
OUT PRTPWR2
10K_5%_2
10K_5%_2
PRT_CTL2/GPIO9
B B
R2561
R2562
R2563
R2564
33
R2573 2
PRT_CTL3/GPIO10 OUT PRTPWR3 47
1 32
Power
PRT_CTL4/GPIO11 OUT PRTPWR4 47
0_5%_2_DY
5 VDD12
U2551 8 OCS / JTAG / UART
2
1 8 1 R2572 2 VDD12
A0 VCC
13 46
2 A1 WP 7 0_5%_2_DY
VDD12 TCK/GPIO1 IN OCS_N1
21 47
3 A2 SCL 6 VDD12 TMS/GPIO3 IN OCS_N2
28 44 47
4 GND SDA 5 VDD12 TDI/GPIO6 IN OCS_N3
31 43 47
P1V2A VDD12 TDO/GPIO7 IN OCS_N4
51 VDD12 R2574
ATMEL_AT24C08BN_SOIC_8P_DY 57 45 1 2
VDD12 TRST/GPIO0
0.1UF_16V_2_DY
0.1UF_16V_2_DY
P3V3A
1
16 VDD33 10K_5%_2
1
100_5%_2
100_5%_2
34 VDD33
R2585
R2586
C2582
C2583
L2550 52
P3VA_D_L (89.5MA) VDD33
TP2550
TP2552
TP2553
TP2554
1 2 63
TP30 TP2551
4.7UF_6.3V_3
VDD33
1
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
SWF2520CF_4R7K_M
1
1
4.7UF_6.3V_3
65 GND(FLAG)
C2551
C2553
C2554
C2555
C2556
2
C2552
SMSC_USB5534B_4100JZX_TR_QFN_64P
TP30
TP30
TP30
TP30
2
A A
P1V2A
P3V3A
(885.6MA)
REF
1
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
100UF_6.3V_DY
1
2550~2599
C2571
+
C2557
C2558
C2559
C2560
C2561
C2562
C2563
C2564
INVENTEC
2
2
TITLE
MODEL,PROJECT,FUNCTION
USB3.0 HUB
C2569 RESEVE FOR THAT IF USB3.0 SSC FAIL DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 46 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
FOR EMI
C7574
1 2
P5V0A_USB1
0.1UF_16V_2
1.8A
P5V0A_USB1 C7575
D 1 2
D
0.1UF_16V_2
0.1UF_16V_2
1
P5V0A
C2400
P5V0A
22UF_6.3V_5
1
C2403
DGND_CHASSIS2
U2400
2
5
1 GND VOUT 8
U2401 2 VIN VOUT 7
1 3 6
+
2
4 4 5 46
2
EN_EN# FLG# OUT OCS_N3 1 CN2400
46 PRTPWR3 IN L2400 1
ROHM_BD82022FVJ_E2_MSOP_8P USB_D_P3_L_DN 2
22UF_6.3V_5_DY
46 4 3
BI 2
-
USB_D_P3_DN
1 2 USB_D_P3_L_DP 3
0.1UF_16V_2
TC7SZ08FU 46
1UF_6.3V_2
USB_D_P3_DP BI 3
1
1
4
3
4
C2405
C2404
C7577
46
WCM_2012_900T 5
USB30_D_RX3_DN OUT 6
5
G1
46 USB30_D_RX3_DP OUT 6 G
0.1UF_16V_2 7 7 G G2
46 C2401 1 2 USB30_D_TX3_C_DN 8 G3
USB30_D_TX3_DN IN 8 G
2
46 C2402 1 2 USB30_D_TX3_C_DP 9 G4
USB30_D_TX3_DP IN 9 G
0.1UF_16V_2 SINGA_2UB4006_180101F_9P
C TMP121023001 C
FOR EMI
USB WALK UP1
DGND_CHASSIS2
P5V0A_USB3
1.8A
P5V0A_USB3
P5V0A
0.1UF_16V_2
1
P5V0A C7576
C2420
1 2
U2420 0.1UF_16V_2
5
1 GND VOUT 8
22UF_6.3V_5
2
B U2421 B
1
2 VIN VOUT 7
1
C2423
3 6
+
L2420 1
-
TC7SZ08FU 4 3 USB_D_P4_L_DN 2
2
BI
1UF_6.3V_2
2
USB_D_P4_DN
1
1 2 USB_D_P4_L_DP 3
3
BI
USB_D_P4_DP 3
FOR EMI
C2425
C2424
4 4
WCM_2012_900T 5
USB30_D_RX4_DN OUT 6
5
G1
USB30_D_RX4_DP OUT 7
6 G
G2
0.1UF_16V_2 7 G
2
IN C2421 1 2 USB30_D_TX4_C_DN 8 8 G G3
USB30_D_TX4_DN
IN C2422 1 2 USB30_D_TX4_C_DP 9 9 G G4
USB30_D_TX4_DP
0.1UF_16V_2 SINGA_2UB4006_180101F_9P
TMP121023001
DGND_CHASSIS3
A A
REFERENCE NUMBER:2400~2499
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
USB & USB CHARGER
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 47 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P5V0A_USB2
22UF_6.3V_5
1
R2511 2
C2413
1
TPS2540/A 20K_5%_2 P5V0DS_DB
PI5USB2543 NI NI 0
2
U2410
1 8
P5V0DS_DB GND VOUT
2 VIN VOUT 7
P5V0DS_DB DGND_USB DGND_USB 3 6
VIN VOUT
4 5 DGND_USB
SLP_S4#_3R_DB IN EN_EN# FLG#
0.1UF_16V_2
D
1
64 48 ROHM_BD82022FVJ_E2_MSOP_8P
22UF_6.3V_5_DY
D
C2513
DGND_USB
2
10K_5%_2
P5V0A_USB_CHARGE
1UF_6.3V_2
1
1
17
16
15
14
13
R2515
C2415
C2414
C2512
U2511 2.5A 1 + 2
ILIM_LO
FAULT#
PWPD
GND
2
ILIM_HI
100UF_6.3V
1
2
1 IN OUT 12 DGND_USB
DGND_USB 2 11
USB_P3_DN_DB BI 3
DM_OUT DM_IN
10
BI USB_P3_CH_DN_DB P5V0A_USB2
USB_P3_DP_DB BI 4
DP_OUT DP_IN
9
BI USB_P3_CH_DP_DB
ILIM_SET STATUS#
DGND_USB 1.8A
0_5%_2_DY
2
R2514
CTL1
CTL2
CTL3
EN
P5V0DS_DB TEXAS_TPS2546RTER_QFN_16P
DGND_USB
0.1UF_16V_2
1
IN CPPWR_EN_DB
5
6
7
8
1
C2410
1
0.1UF_16V_2
IN SLP_S4#_3R_DB 64 P5V0A_USB_CHARGE
C2514
IN SLP_S3#_3R_DB 64
2
2
DGND_USB
1
0.1UF_16V_2
C2503
C C
DGND_USB 1 CN2410
L2410 DGND_USB 1
USB_P1_L_DN_DB 2
2
64 USB_P1_DN_DB BI 1 2 2
BI 4 3 USB_P1_L_DP_DB 3 3
64 USB_P1_DP_DB 4 4
WCM_2012_900T 5
64 USB30_RX1_DN_DB OUT 6
5
G1
DGND_USB CN2500
S3051 S3052 L2500 1 1 64 USB30_RX1_DP_DB OUT 7
6 G
G2
0.1UF_16V_2 7 G
BI 3 4 USB_P3_L_DN_DB 2 2
USB_P3_CH_DN_DB IN C2411 1 2 USB30_TX1_C_DN_DB 8 8 G G3
BI 2 1 USB_P3_L_DP_DB 3 3 64 USB30_TX1_DN_DB
SCREW300_600_1P SCREW260_0_1P USB_P3_CH_DP_DB IN C2412 1 2 USB30_TX1_C_DP_DB 9 9 G G4
4 4 64 USB30_TX1_DP_DB
1
IN C2500 1 2 USB30_TX3_C_DN_DB 8 8 G G3
USB30_TX3_DN_DB
IN C2501 1 2 USB30_TX3_C_DP_DB 9 9 G G4 DGND_USB
USB30_TX3_DP_DB DGND_USB
DGND_USB S3050 DGND_USB S3053 0.1UF_16V_2
SINGA_2UB4006_180101F_9P
SCREW260_0_1P
TMP121023001
SCREW260_600_1P
USB CHARGER
1
B B
DGND_USB
DGND_USB
DGND_USB DGND_USB
1 CN3050
64 CRT_R_DB IN 1
64 2
CRT_G_DB IN 3
2
64 CRT_B_DB IN 3
4 4
5
P5V0S_CRTVDD 5
P5V0S_CRTVDD 6 6
7 7
8 8
R3059 4.7K_5%_2 9 9
2 1
10 10
2 R3060 1 4.7K_5%_2 11 11
12 G1
CRT_DDCDATA_DB BI 13
12 G
G2
CRT_HSYNC_DB BI 14
13 G
A CRT_VSYNC_DB BI 15
14
A
P5V0S_CRTVDD CRT_DDCCLK_DB BI 15
P5V0DS_DB SUYIN_M195001HR015M205ZR_15P
U3051 6012B0503901
1
2
GND
VIN
VOUT
VOUT
8
7 REFERENCE NUMBER:3050~3099
1
CRT
C3058
1UF_6.3V_2
1
FIX_MASK FIX_MASK
64 48 ROHM_BD82022FVJ_E2_MSOP_8P
INVENTEC
C3357
0.1UF_16V_2
1
1
2
DGND_USB TITLE
2
FIX2402 FIX2403
MODEL,PROJECT,FUNCTION
USB CONN.
DGND_USB FIX_MASK FIX_MASK DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
1
A3 CS
DGND_USB
CHANGE by XXX DATE 21-OCT-2002 SHEET 48 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3A P3V3DS
2
R2210 R2211
0_5%_2 0_5%_2_DY
1
VCC_FPR
4.7UF_6.3V_3
0.1UF_16V_2
1
1
C2201
C2200
D
D
2
2
10K_5%_2
R2201
1
CN2200 G2
G2
28 FPR_OFF 1
IN 2
1
29 FPR_LOCK# IN 2
3 3
32 4
USB_P4_DP BI 5
4
32 USB_P4_DN BI 5
6
1
10K_5%_2
6
D2201
R2200
2
G1 G1
3
1
ACES_50505_0064N_001_6P
2
PHP_PESD5V2S2UT_SOT23_3P_DY
C 6012B0317701 C
0_5%_2_NP
0_5%_2_NP
0_5%_2_NP
1
1
R4353
R4354
R4355
REFERENCE:2200~2249
2
B P3V3S B
10K_5%_2_NP
1
CN4350
R4350
1 1
2 2
3 3
IN NFC_RST# 4 4
29 NFC_3S_SMDATA 5
2
28 BI 5
IN NFC_3S_SMCLK 6 6
28 NFC_INT 7
29 IN 7
IN NFC_HI_SEL 8 8
49 OUT NFC_SWP 9 9 G G1
10 10 G G2
IN NFC_RX
10K_5%_2_NP
51 11 11
1
OUT NFC_TX 12 12
R4351
51
ACES_50501_01241_001_12P_DY
6012B0104502
0.5PITCH BOTTON CONTACT
2
NFC CONN
A R4352 A
56 OUT UIM_VPP 1 2 NFC_SWP IN 49
NFC_HI_SEL R4350 R4351
0_5%_2_NP
HIGH (UART) INSTALL
LOW (I2C) INSTALL
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
REFERENCE:4350~4399 SIZE CODE
FINGER PRINTER
DOC.NUMBER
& NFC
REV
1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 49 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
A_SD# IN
P3V3DS
1
R1006
0_5%_2
10UF_6.3V_3
0.1UF_16V_2
1
1
32
C1001
C1000
Q1000
D
G 1
2
S
C C
14
15
16
SSM3K7002BFU
U1000
2
VDD
RES
RES
13 RES VDD_IO 1
P3V3DS 12 GND NC1 2
30 IN ACCEL_INT# 11 INT1 NC1 3
10 4 PCH_3S_SMCLK_R 50
RES SCL_SPC BI
47K_5%_2
9 5
SDA_SDI_SDO
INT2 GND
1
R1007
SDO_SA0
P3V3DS
CS
P3V3DS ST_HP3DC2TR_LGA_16P
3
8
7
6
47K_5%_2
Q1001
1
PCH_3S_SMDATA_R 50
BI
D
R1008
G 1
1 R1001 2
S
0_5%_2_DY
3
SSM3K7002BFU
1
2
2
Q1002
R1000
D
1 0_5%_2_DY
2
G
B B
S
SSM3K7002BFU ACCELEMETOR
2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
4
1
53 51 28 IN PCI_3S_SERIRQ 5
4
P3V3DS
53 51 29 IN BUF_PLT_RST# 6
5
61 56 55 53 33 28 26 IN NMI_SMI_DBG# 7
6
F 51 33 OUT 7 F
2 C303
2 C131
2 C314
2 C315
2 C308
2 C310
LPC_3S_AD(0) 8
53 51 28 IN 8
0.1UF_16V_2
1
1
1UF_6.3V_2
LPC_3S_AD(1) 9
53 51 28 BI LPC_3S_AD(2) 10
9
53 51 28 BI 10
0.1UF_16V_2
C311
2
LPC_3S_AD(3) 11
C312
53 51 28 BI VADP_DEBUG 12
11
9 5 OUT 12
C313
8051_TX_LED_PWRSTBY# 13
51 BI 13
2
8051_RX_CAPS_LED# 14
51 BI NUM_LOCK_LED# 15
14
51 IN 15
106
119
1
VCC1_POR#_3 16
14
68
37
58
84
40
SCAN_3S_OUT<0>
51 IN 16
51 IN R339 1 2 15_5%_2 SPI_CLK_FLH_R6_R 17 17
SCAN_3S_OUT<1> R338 1 2 15_5%_2 SPI_CS0#_FLH_R6_R 18
U300 51 IN SCAN_3S_OUT<3>
18
51 IN R337 1 2 15_5%_2 SPI_SI_FLH_R6_R 19 19
SCAN_3S_OUT<2> R336 1 2 15_5%_2 SPI_SO_FLH_R6_R 20
62 51 IN 20
AVCC
VBAT
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
51 JTAG_RST# R335 1 2 0_5%_2 SPI_HOLD#_DB_R6_R 21 G1
2 1 100K_5%_2
TP24
1 GPIO027 64 LID_SW#_3
IN 44
51 IN 1 2 22
21 25
G2
R371 TP332 107 CPPWR_EN P3V3DS R343 0_5%_2 22 26
GPIO030
OUT 51 64 23 23
51 OUT JTAG_RST# SCAN_3S_OUT(0)
49
21
JTAG_nRST GPIO031 30 WLAN_OFF
65 TRAVEL_BAT_DET#
OUT 55 24 24
OUT SCAN_3S_OUT(1) 20
KSO00/GPIO000/JTAG_TCK GPIO033
63 ADP_EN
IN 17
51 OUT KSO01/GPIO100/JTAG_TMS GPIO035
OUT 5 51 ACES_50238_02471_001_24P
SCAN_3S_OUT(2) 19 1 LATCHED_ALARM
51 OUT SCAN_3S_OUT(3) 18
KSO02/GPIO101/JTAG_TDI GPIO036
IN 6
51 OUT SCAN_3S_OUT(4) 17
KSO03/GPIO102/JTAG_TDO
124 GPIO72
OUT SCAN_3S_OUT(5)
KSO04/GPIO103/TFDP_DATA/XNOR GPIO066
IN 28
TP301
TP301
TP301
TP301
TP301
16
3
OUT
OUT SCAN_3S_OUT(6)
SCAN_3S_OUT(7)
13
12
KSO05/GPIO104/TFDP_CLK
KSO06/GPIO001 GPIO110 73 PWRBTN#
IN Q302 DEBUG PORT
6012B0073604
OUT KSO07/GPIO002
D
SCAN_3S_OUT(8) 10 74 ADP_PRES PLT_RST#
1 G
OUT KSO08/GPIO003 GPIO130
IN 7 70 54 28 IN
TP344
TP340
TP342
TP343
TP341
SCAN_3S_OUT(9) 9 93 PM_SLP_A#
OUT KSO09/GPIO106 GPIO145
IN 16 24 26 28
S
SCAN_3S_OUT(10) 8 33 WWAN_OFF
OUT SCAN_3S_OUT(11) 7
KSO10/GPIO004 GPIO147
34 SLP_LAN#
OUT 56
OUT KSO11/GPIO107 GPIO151
IN 16 28 SSM3K7002BFU
E 6 116 FET_B E
2
5
KSO12/GPIO005 GPIO163
OUT 6 51
NMI_SMI_DBG#
SLP_S3#_3R 81
KSO13/GPIO006
OUT 33 51
64 59 57 43 31 28 26 24 16 IN NUM_LOCK_LED# 83
GPIO007/KSO14
52 51 OUT PWR_BTN_OUT# 4
GPIO010/KSO15
28 26 OUT SCAN_3S_OUT(17) 108
GPIO011/KSO16
62 OUT GPIO012/KSO17 R319
41 2 1 ISCT_LED#
SCAN_3S_IN(0) 29
GPIO206
IN 52
62
52 IN SCAN_3S_IN(1) 28
KSI0/GPIO125/TRACEDATA3
0_5%_2
52 IN SCAN_3S_IN(2) 27
KSI1/GPIO126/TRACEDATA2
52 IN SCAN_3S_IN(3) 26
KSI2/GPIO144/TRACEDATA1
52 IN SCAN_3S_IN(4) 25
KSI3/GPIO032/TRACEDATA0
112 SCL_BAT_CHG
52 IN SCAN_3S_IN(5) 24
KSI4/GPIO142/TRACECLK I2C0_CLK0/GPIO015
111 SDA_BAT_CHG
BI 5 17 51
52 IN SCAN_3S_IN(6) 23
KSI5/GPIO040 I2C0_DAT0/GPIO016
110 GPIO134
BI 5 17 51
52 IN SCAN_3S_IN(7) 22
KSI6/GPIO042 I2C0_CLK1/GPIO134
109
IN
52 IN KSI7/GPIO043 I2C0_DAT1/GPIO017
EMCLK 66 89 PCH_KBC_SMCLK
51 BI EMDAT 67
PS2_CLK0/GPIO046 GPIO022/I2C1_CLK0
88 PCH_KBC_SMDATA
BI 68
28
51 BI SP_CLK 61
PS2_DAT0/GPIO047 GPIO023/I2C1_DAT0
91 A_SD#
BI 68
28
58 51 BI SP_DATA 62
PS2_CLK1/GPIO050 GPIO020/I2C2_CLK0
90 KBC_PROCHOT
OUT 59
58 51 BI PS2_DAT1/GPIO065 GPIO021/I2C2_DAT0
OUT 27 R323
IM_5S_CLK 35 126 1 2 KBC_WAKE#
58 51 BI IM_5S_DATA 32
PS2_CLK2/GPIO051 GPIO024/I2C3_CLK0
125 PCH_WAKE#_EC
OUT 29
58 51 BI 1 TP24 103
PS2_DAT2/GPIO052 GPIO025/I2C3_DAT0
OUT 5 51
0_5%_2
GPIO053/PS2_CLK3
TP301 1 TP24 105 98 SUS_PWR_ACK
TP302
GPIO152/PS2_DAT3 GPIO157/BC_CLK
99 ADP_PRES_OUT
IN 28
LPC_3S_AD(0) 46
GPIO160/BC_DAT
100 KBC_PWR_ON_R
OUT 28
68
1 2 R352 KBC_PWR_ON
53 51 28 BI LAD0/GPIO112 GPIO161/BC_nINT 0_5%_2 OUT 16 18
LPC_3S_AD(1) 48
D 53 51 28 BI LPC_3S_AD(2) 50
LAD1/GPIO114
120 BAT_GRNLED# D
53 51 28 BI LPC_3S_AD(3) 51
LAD2/GPIO113 GPIO133/PWM0
118 PWM#_LED
OUT 33 58
53 51 28 BI LAD3/GPIO111 GPIO136/PWM1
OUT 52 R7510
LPC_3S_FRAME# 52 121 1 2 PWM_3S_FAN#
53 51 28 IN nLFRAME/GPIO120 GPIO034/PWM2/TACH2PWM_OUT
OUT 25
CSC0402_DY
LPC_RESET#
1
53 78
29 IN CLK_R3S_KBPCI
nLRESET/GPIO116 GPIO141/PWM3/LED3
0_5%_2
C7530
54
34
67 IN PCI_3S_CLKRUN# 55
PCI_CLK/GPIO117
92 MAIN_BAT_DET#
PCI_3S_SERIRQ
28 IN nCLKRUN/GPIO014 GPIO105/TACH1
TACH_FAN_IN
IN 17
53 51 29 IN R333 2 1 33_5%_2 57 SER_IRQ/GPIO115 GPIO140/TACH2/TACH2PWM_IN 101
OUT 25 RF SOLUTION
FET_A 123
51 6 OUT M_PWROK 122
GPIO044/nSMI
113 BAT_AMBERLED# OUT
2
28 24 IN GPIO135/KBRST LED0/GPIO154
114 8051_RX_CAPS_LED#
51 58
RUNSCI_EC# 76
LED1/GPIO155
115 8051_TX_LED_PWRSTBY#
OUT 51
29 OUT nEC_SCI/GPIO026 LED2/GPIO156
OUT 51
VSS_VBAT
XTAL2
2 1 KBC_XTAL2 R357 2 1 0_5%_2_DY 71 XTAL1
AGND_KBC
300_5%_2 2 1 R315 OCP_A_IN
IN 7
AVSS
SUSCLK32_KBC R380 2 1 0_5%_2_DY P3V3DS
CAP
IN
VSS
VSS
VSS
VSS
VSS
VSS
VSS
51 1 2 C307
12PF_50V_2_DY SUSCLK32_PCH 2 1 0_5%_2 2200PF_50V_2
28 IN R382 AGND_KBC
3
4
70
45
15
11
X301
58 51 BI
IM_5S_DATA 4.7K_5%_2 1 2 R386
2
1
4.7UF_6.3V_3
2
10K_5%_2_DY
1
32.768KHZ_DY EMCLK 10K_5%_2 1 2 R312
TP365 TP366 1 2 51 OUT
C302
TP370
PAD310
TP367
1
PLT_DET 2
2
51 OUT
1R368 2
3.3K_5%_2
2
2
3.3K_5%_2
TP24 TP369
1
52 51 OUT
R369
TP24 TP24
100K_5%_2 1 R326
1
KBC_PWR_ON_R 2
1
OUT
1
SDA_BAT_CHG 2
51 17 5 OUT
1
VSS SI
IN 28 51
P3V3DS LID_SW#_3 100K_5%_2 1 2 R314
62 51 44 IN
R370 1
P3V3DS
0.1UF_16V_2
6019B0988601
2
8051_RX_CAPS_LED# 3 4 CAPS_LED#
2
51 IN 2A 2Y
OUT 52 NFC_TX 200K_5%_2_DY 1 2 R334
1 2 R341
51 49 OUT
10K_5%_2 VCC1_POR#_3 10K_5%_2_DY 1 2 R342
ONLY FOR DEBUG NXP_74LVC2G07GW_SC88A_6P
51 OUT
P3V3DS PCH_WAKE#_EC 10K_5%_2_DY 1 2 R308
P3V3DS REMOVE WITH SPI SCOKET 51 5 OUT
P3V3DS CPPWR_EN 10K_5%_2 1 2 R356
51 OUT
0.1UF_16V_2_DY
2
51 6 OUT
0.1UF_16V_2
FET_B
3.3K_5%_2
100K_5%_2 1 R304
100K_5%_2
1
C320
2
2
3.3K_5%_2
P3V3DS 51 6 OUT
C316
2
51 28 26 OUT
R344
R346
100K_5%_2
1
2
2R103 1
1K_5%_2
U366
2
1
PVT_CS# 1 8
2
R101
51 IN CS# VCC
WP#(IO2) CLK
IN 51 R100
4 5 PVT_MOSI ON_OFF# 1 2 PWRBTN# 3 1 PWR_BTN_OUT#
12
A GND DI(IO0)
IN 51 62 57 26 IN A
1UF_6.3V_2
INVENTEC
1
47_5%_2
0_5%_2_DY
C100
DIODE-BAT54-TAP-PHP_DY
R345
SOCKET : 6026B0150101
2M (16M) 8P: TITLE
2
MODEL,PROJECT,FUNCTION
2
KBC
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S
REFERENCE NUMER : 300~399
0.1UF_16V_2_DY
P3V3DS
1
0.1UF_16V_2
C335
RS340
C305
10 1
9 2
8 3
2
7 4
6 5
10K_5%
R392 P3V3DS
D 270_5%_2 1 CN300
1
1 2 2 2
D
51 3
CAPS_LED# IN 4
3
4 0
REC_MUTE_LED 5 SCAN_3S_IN(0)
51 NUM_LOCK_LED# IN 5
6 1
6
R391 SCAN_3S_IN(1)
2 1 GPIO134 7 7 2
3
0_5%_2_DY
0_5%_2_DY
SCAN_3S_OUT(9) 8
1
8 SCAN_3S_IN(2)
Q321 3
52 OUT KSCAN_3S_IN(9) 9 9
KSCAN_3S_IN(9)
R399
SCAN_3S_IN(3)
D
52 OUT KSCAN_3S_IN(11) 10 10 4
IN 1 G KSCAN_3S_IN(11)
ISCT_LED# 52 OUT KSCAN_3S_IN(13) 11 11 SCAN_3S_IN(4)
KSCAN_3S_IN(13) 5
S
52 51 OUT SCAN_3S_IN(7) 12 12
SCAN_3S_IN(7) SCAN_3S_IN(5)
SSM3K7002BFU KSCAN_3S_IN(6) 13 6
2
52 KSCAN_3S_IN(6) OUT 13
52 OUT KSCAN_3S_IN(5) 14 14 SCAN_3S_IN(6)
KSCAN_3S_IN(5) 7
2
SCAN_3S_OUT(1) 15 15
SCAN_3S_IN(7)
SCAN_3S_OUT(10)16 16 OUT 51 52
SCAN_3S_IN<7..0>
SCAN_3S_OUT(6) 17 17
SCAN_3S_IN<7..0>
SCAN_3S_OUT(7) 18 18
SCAN_3S_OUT(4) 19
3
19
Q320 SCAN_3S_OUT(8) 20 20
SSM3K7002BFU SCAN_3S_OUT(3) 21 21
D
59 IN 1 G 52 OUT KSCAN_3S_IN(3) 22 22
REC_MUTE_LED_CNTR KSCAN_3S_IN(3)
KSCAN_3S_IN(1) 23
2
C 52 OUT KSCAN_3S_IN(2) 24 24 C
KSCAN_3S_IN(2)
R383 52 OUT KSCAN_3S_IN(4) 25 25
KSCAN_3S_IN(4)
KSCAN_3S_IN(0) 26
2
52 KSCAN_3S_IN(12) OUT 28
52 OUT KSCAN_3S_IN(8) 29 29
KSCAN_3S_IN(8)
52 OUT KSCAN_3S_IN(14) 30 30 G G1 P5V0S
KSCAN_3S_IN(14)
SCAN_3S_OUT(5) 31 31 G G2
SCAN_3S_OUT(2) 32 32
SCAN_3S_OUT(0) 33 R351
33
1 2
SCAN_3S_OUT(11)34 34
S
ACES_51510_0344N_001_34P 4.7K_5%_2
TMP121011001
S
G G
DIODES_DMP2305U_SOT23_3P
D
Q300
Q301
D
D
CN301
51 IN 1 G P5V0S_KBL 1 1
PWM#_LED 2 2
S
D303 3 3
KSCAN_3S_IN(4) 1 6 SCAN_3S_IN(4) SSM3K7002BFU 4 4
B 5 B
2
5
KSCAN_3S_IN(12) 2 29 OUT KBL_DET# 6 6 G G1
7 7 G G2
5 KSCAN_3S_IN(5) 8 8
D304
KSCAN_3S_IN(2) 1 6 SCAN_3S_IN(2)
KSCAN_3S_IN(10) 2
5 KSCAN_3S_IN(3)
3 SCAN_3S_IN(6)
SCAN_3S_IN(3) 3 4 KSCAN_3S_IN(11)
D301
BAW56S
BAW56
A A
2
KSCAN_3S_IN(6)
D302
KSCAN_3S_IN(0) 1 6 SCAN_3S_IN(0)
KSCAN_3S_IN(8) 2
5 KSCAN_3S_IN(1)
SCAN_3S_IN(1) 3 4 KSCAN_3S_IN(9)
BAW56S
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
KEYBOARD
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 52 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
2
2
2
R3516
R3511 R3510
0_5%_2_DY
D INSTALL FOR SLB9656 0_5%_2_DY
0_5%_2 D
1
1
1
1
P3V3_TPM
0.1UF_16V_2
C3503
2
P3V3S
U3500
51 28 26 5
LPC_3S_AD(0) IN LAD0 VDD
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
23
1
51 28 LPC_3S_AD(1) IN LAD1 P3V3S
20 10
C3504
C3506
51 28 LPC_3S_AD(2) IN LAD2 VDD
C3502
51 28 17 19 1 2
LPC_3S_AD(3) IN LAD3 VDD
24
VDD 0_5%_2
1
67
34 21
CLK_R3S_TPM IN LCLK
4 R3517 R3518
2
GND R3501
22 11
1
51 28 LPC_3S_FRAME# IN LFRAME# GND 0_5%_2_DY
GND 18
16 25 1 2 NO INSTALL FOR ST33
C3501 51 33 28 26 BUF_PLT_RST# IN LRESET# GND
2
61 56 55 0_5%_2
10PF_50V_2_DY 28 7
C NC PP C
1
2
NC
51 29 27 3
PCI_3S_SERIRQ IN SERIRQ NC
1
15 NC NC 12
R3507 R3502
2 1 9 LRESET# NC 13
NC 14 0_5%_2_DY
0_5%_2 8 6
NC GPIO
2
NC 2
INFINEON_SLB9656TT1_2_FW4_32_TSSOP_28P
TPM1.2
B B
SLB9656TT1.2 ST33
C3503 INSTALL OPEN
A A
INVENTEC
TITLE
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
4.7K_5%_2_DY
4.7K_5%_2_DY
34 48 13 54
CLKREQ_PCIE3_N OUT CLK_REQ_N MDI_PLUS0 BI TD1_DP
2
36 14 54
28 51
70 PLT_RST# IN PE_RST_N MDI_MINUS0 BI TD1_DN
R497
R444
34 44 17 54
CLK_PCIE3_DP IN PE_CLKP MDI_PLUS1 BI TD2_DP
45 18
PCIE
34 CLK_PCIE3_DN IN PE_CLKN MDI_MINUS1 BI TD2_DN 54
C408 0.1UF_16V_2
MDI
1
32 1 2 PCIE_RX3_DP 38 20 54 R498
PCIE_RX3_C_DP OUT PETp MDI_PLUS2 BI TD3_DP
32 OUT 1 2 PCIE_RX3_DN 39 PETn MDI_MINUS2 21
BI 54 IN 1 2 LANWAKE_N
PCIE_RX3_C_DN TD3_DN PCIE_WAKE#
C407 0.1UF_16V_2
32 41 23 54 0_5%_2
PCIE_TX3_C_DP IN PERp MDI_PLUS3 BI TD4_DP
32 42 24 54
PCIE_TX3_C_DN IN PERn MDI_MINUS3 BI TD4_DN
R499
SMBUS
28 PCH_3M_SMCLK 28 6 2 1
BI SMB_CLK SVR_EN_N
D 28 PCH_3M_SMDATA BI 31 SMB_DATA 0_5%_2
RSVD1_VCC3P3 1 P3V3M_R_RSVD D
P3V3M
2 R405 1 10K_5%_2_DY LANWAKE_N2 LANWAKE_N
VDD3P3_5 5
P3V3M
1UF_6.3V_2
1
54 29 3 4
LAN_DIS# IN LAN_DISABLE_N VDD3P3_4
VDD3P3_15 15 4.7K_5%_2 1 R407 2 P3V3M_R_RSVD
19
C402
R402 470_5%_2 VDD3P3_19
LED
1 2 26 29
54 LED_3S_LANLINK#_R OUT LED0 VDD3P3_29
27 LED1
25
2
54 LED_3S_LANLINK# OUT LED2
VDD0P9_8 8 P1V05_LAN_M_PHY
R403 11
VDD0P9_11
1 2
OUT 1 32 JTAG_TDI VDD0P9_16 16
LED_3S_LANACT#
JTAG
22UF_6.3V_5
0.1UF_16V_2
0.1UF_16V_2
57 54 TP7
1
470_5%_2 1 34 JTAG_TDO
TP10 1 33 22
JTAG_TMS VDD0P9_22
TP8 1 35 JTAG_TCK
C409
C401
C403
TP2 37
VDD0P9_37
C404
1 2 NIC_XTAL_OUT 9 40
2
XTAL_OUT VDD0P9_40
10 43
RSC_0402_DY
25MHZ_10PF
XTAL_IN VDD0P9_43
10PF_50V_2
1
4
2 R400
30 TEST_EN Q487
C C
G
12 RBIAS CTRL_0P9 7 P1V05_NIC 1 L400 2 L2N7002WT1G
2
3
C400 SWF2520CF_4R7K_M
1
54 29 IN
3.01K_1%_2
1
1
1K_5%_2 LAN_DIS#
1 2 GND_EPAD 49
NIC_XTAL_IN
2 R404
10PF_50V_2 R401
INTEL_CLARKVILLE_I218_LM_48P
2
P3V3M
REFERENCE NUMER : 400~469
1
R485
B 100K_5%_2 B
2
REFERENCE NUMER : 470~499
LES_LBSS84LT1G_SOT23_3P
S
2
Q485
U470 1 G
1 TCT1 MCT1 24
3
2 23
D
54 TD1_DP BI TD1+ MX1+ BI TD_DP 54 57 Q486
54 3 22
TD1_DN BI TD1- MX1- BI TD_DN 54 57 41
D
57 1
3
29 DOCK_ID1 IN G
4 TCT2 MCT2 21 D485
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
1UF_6.3V_2
S
1
1 1 2 2
54 5 20 L2N7002WT1G
TD2_DP BI TD2+ MX2+ BI RD_DP 54 57
6 19
2
54 TD2_DN BI TD2- MX2- BI RD_DN 54 57
C475
C476
C477
C478
C479
PHP_PESD5V0S1BB_SOD523_2P
7 TCT3 MCT3 18
IN LED_3S_LANLINK#_R 54
2
54 8 17
TD3_DP BI TD3+ MX3+ BI C_DP 54 57
54 9 16 JACK485
TD3_DN BI TD3- MX3- BI C_DN 54 57
10 15 A2 A1
TCT4 MCT4
1
G2 G1 BI LED_3S_LANLINK#_R
57 54 TD_DP BI TX+
54 11 14 2 G1
TD4_DP BI TD4+ MX4+ BI D_DP 54 57 57 54 TD_DN BI TX- G
54 12 13 3 G2
TD4_DN BI TD4- MX4- BI D_DN 54 57 57 54 RD_DP BI RX+ G
57 54 4
A BOTH_GST5009_SOP_24P C_DP BI 5
P4
A
LAYOUT NOTE:
75_1%_2 0.01UF_100V_3
75_1%_2 0.01UF_100V_3
75_1%_2 0.01UF_100V_3
75_1%_2 0.01UF_100V_3
57 54 C_DN BI P5 G3
G
6016B0000201 57 54 RD_DN BI 6 RX- G4
1
C472
C471
C470
FOX_JM3611_SP51AB11_7H_12P
2
60260197001
INVENTEC
2
IN LED_3S_LANACT# 54
57
D486
1 R473
1 R472
1 R471
1 R470
1 1 2 2 TITLE
MODEL,PROJECT,FUNCTION
LAN (NIC,TRANSFORMER,RJ45)
C474
1 2 PHP_PESD5V0S1BB_SOD523_2P
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
100PF_3000V
CHANGE by XXX DATE 21-OCT-2002 SHEET 54 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P3V3A_Q_WLAN
P3V3DS
S S D D 576MA
10K_5%_2
1
0.1UF_16V_2_DY
1
4.7UF_6.3V_3
0.01UF_50V_2
1
0.1UF_16V_2
DIODES_DMP2305U_SOT23_3P
G
C1308
1
10K_5%_2
Q1300 R1304
R1302
C1307
C1305
C1301
Q1301
G
SSM3K7002BFU
G
2
3 2 CLKREQ_PCIE4_R_N
2
34 OUT D S
P3V3A
2
2
1 2
R1311 R1301 CLKREQ_PCIE4_N
WLAN_OFF 1 2 1 2 R1310 0_5%_2_DY CN1300
51 IN
1 R1303 2 1 2
2
0_5%_2 56 54 29 PCIE_WAKE# OUT WAKE# 3.3V
R1312 220K_5%_2 0_5%_2 3 RESERVED GND 4
C C
28 IN PCH_SLP_WLAN_N 1 2 TP1301 1 5
7
RESERVED 1.5V 6
8 R1300
0_5%_2_DY CLKREQ# RESERVED
9 10 10K_5%_2
GND RESERVED
11 12
1
34 CLK_PCIE4_DN IN REFCLK- RESERVED
13 14
2
34 CLK_PCIE4_DP IN REFCLK+ RESERVED
15 RESERVED RESERVED 16 D1300
17 18 29
NC
RESERVED GND
1 19 20 1 3
TP1302 21
RESERVED RESERVED
22
IN WLAN_TRANSMIT_OFF#
23
GND PERST#
24
IN BUF_PLT_RST# 26
32 PCIE_RX4_C_DN OUT PERN0 +3.3VAUX
10UF_6.3V_3
25 26
0.1UF_16V_2
32 PCIE_RX4_C_DP OUT PERP0 GND BAT54_30V_0.2A
1
27 GND 1.5V 28
C1304
C1303
29 GND SMB_CLK 30
32 31 32
PCIE_TX4_C_DN IN 33
PETN0 SMB_DATA
34
32 PCIE_TX4_C_DP IN PETP0 GND
35 36
GND USB_D- BI USB_D_P2_DN
2
37 38
39
RESERVED USB_D+
40
BI USB_D_P2_DP
RESERVED GND
41 RESERVED LED_WWAN# 42
43 44
45
RESERVED LED_WLAN#
46
OUT WL_LED_ALL# 58
62
P3V3A 28 CL_CLK1 IN RESERVED LED_WPAN#
28 47 48
CL_DATA1 IN 49
RESERVED 1.5V
50
B R1306 28 CL_RST#1 IN RESERVED GND B
1 2 BT_OFF# 51 RESERVED 3.3V 52
G1 G1 G2 G2
3
10K_5%_2_DY FOX_AS0B226_S40QW_7H_52P
Q1302
D
28 1 G
IN
BT_OFF
6026B0221501
S
SSM3K7002BFU
2
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVSIM
1
56 UIM_CD OUT
D1451
DIODES_BAV99
3
R1452
1 2
56 UIM_PWR BI
2
100K_5%_2_DY P3V3DS
PVSIM
CN1451
1 R1451 2 5 1 2.75A Q1400
56 UIM_PWR BI GND VCC BI UIM_PWR 56 1 D S 4
0.1UF_16V_2_DY
47K_5%_2_DY 2
1
6 2
10K_5%_2
49 UIM_VPP BI VPP RST BI UIM_RST 56 5
C1402
6 3
4.7UF_6.3V_3
0.01UF_50V_2
G
R1404
7 3
0.1UF_16V_2
D 56 BI I_O CLK BI UIM_CLK 56
1
PMOS_4D1S
UIM_DATA
D
C1413
C1414
C1415
8 4 TPC6111
RESERVED RESERVED
18PF_50V_2_DY
18PF_50V_2_DY
2
4.7UF_6.3V_3
0.1UF_16V_2
1
1
CD CD
C1405
C1451
C1452
C1453
R1403
2
2 1
IN WWAN_OFF
51
G2 G G G1 220K_5%_2
2
P3V3S
TAI_PMPAT0_08GLBS7N14H1__8P PVSIM
CAP CLOSE TO SIM CARD
6026B0180901
1
10K_5%_2
10K_5%_2
SIM CARD
R1407
R1402
CN1400
R1405
2
2 1 WWAN_DET# 1 2
2
33 INTRUDER# IN
3
GND_PRESENCE_IND 3P3VAUX_2
4
0_5%_2_DY GND3 3P3VAUX_4 D1410
5 6 30
WCM_2012_900T
NC
GND5 FULL_CARD_POWER_OFF#
USB_P5_DP_L 7 8 1 3
USB_P5_DP BI 2 1
USB_P5_DN_L 9
USB_D+ W_DISABLE#
10
IN WWAN_TRANSMIT_OFF#
USB_P5_DN BI 3 4 USB_D- LED1#/DAS/DSS# OUT LED_WWAN_LINK# 58
C L1400 PVSIM 11 GND11
BAT54_30V_0.2A
C
1
10K_5%_2
CS PS
R1408
KEY B
2
0_5%_2
R1409
29 2 1 21 20
WWANSSD_M12DET IN WWAN/SSD IND GND-WWAN/OC-SSD AUDIO_0
55 54 29 2 1 23 22
PCIE_WAKE# IN RESERVED_23 AUDIO_1
WWAN_NGFF_DPR 25 RESERVED_25 AUDIO_2 24
R1406 0_5%_2 27 26
29
GND_27 AUDIO_3
28
IN GPS_XMIT_OFF# 29
PERN1/USB3.0-RX- UIM-RFU
31 30
33
PERP1/USB3.0-RX+ UIM-RESET
32
BI UIM_RST 56
35
GND_33 UIM-CLK
34
BI UIM_CLK 56
37
PETN1/USB3.0-TX- UIM-DATA
36
BI UIM_DATA 56
39
PETP1/USB3.0-TX+ UIM-PWR
38
BI UIM_PWR 56
GND_39 DEVSLP
41 PETN0/SATA-B+ GNSS0 40
43 PETN0/SATA-B- GNSS1 42
45 GND_45 GNSS2 44
47 PETN0/SATA-A- GNSS3 46
B 49 PETN0/SATA-A+ GNSS4 48 B
51 GND_51 PERST# 50
53 REFCLKN CLKREQ# 52
55 REFCLKP PEWAKE# 54
57 GND_57 NC_56 56
59 ANTCTL0 NC_58 58
61 ANTCTL1 COEX3 60
63 ANTCTL2 COEX2 62
65 ANTCTL3 COEX1 64
67 66
55 53 51 33 28 26
61
BUF_PLT_RST# IN 69
RESET# SIM DETECT
68
IN UIM_CD 56
PEDET_OC-PCIE/GND-SATA SSCLK
71 GND_71 3P3VAUX_70 70
73 GND_73 3P3VAUX_72 72
75 USB3.0IND/GND-OTHER 3P3VAUX_74 74
GND_G1
GND_G2
LOTES_APCI0018_P005A_75P
A A
G2
G1
6026B0243101
KEY B TYPE
NGFF WWAN
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
WWAN NGFF
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
CN3601
DETECT1#1 47
IN 32
DETECT1# PREP#
ISO_PREP#
54 2 48
RD_DP IN RJ45_B+ RJ45_D+
IN D_DP 54
54 3 49
RD_DN IN RJ45_B- RJ45_D-
IN D_DN 54
4 GND GND 50
5 51 C_DP 54
54 TD_DP IN RJ45_A+ RJ45_C+
IN
54 6 52 54
TD_DN IN RJ45_A- RJ45_C-
IN C_DN
7 GND GND 53
8 Reserved Reserved 54
9 Reserved Reserved 55
10 GND GND 56
32 54 11 57
LANLINK_STATUS IN RJ45_LINKLED# Reserved PCIe TX1+
54 12 58
LED_3S_LANACT# IN RJ45_ACTLED# Reserved PCIe TX1-
1 13 Reserved GND 59
TP3601 TP24 14 60
59 LINE_IN_SENSE IN LINE_IN_SENSE Reserved PCIe RX1+
C 59 15 61 C
LINE_OUT_SENSE IN LINE_OUT_SENSE Reserved PCIe RX1-
16 AUDIOAGND GND 62
59 17 63 41
A_LINEINL_DOCK IN LINE_IN_L Reserved DPB_ML1+
IN DPC0_DOCK_DP
59 18 64 41
A_LINEINR_DOCK IN LINE_IN_R Reserved DPB_ML0-
IN DPC0_DOCK_DN
19 AUDIOAGND GND 65
59 20 66 41
PR_AOUT_L_DOCK IN LINE_OUT_L Reserved DPB_ML1+
IN DPC1_DOCK_DP
59 21 67 41
PR_AOUT_R_DOCK IN LINE_OUT_R Reserved DPB_ML1-
IN DPC1_DOCK_DN
22 AUDIOAGND GND 68
51 23 69
LED_PWRSTBY# IN PWRLED Reserved DPB_ML2+
41 24 70
DPC_DOCK_HPD IN Reserved DPB_HPD Reserved DPB_ML2-
25 GND GND 71
26 Reserved DPB_CTRLDATA
Reserved DPB_ML3+ 72
27 Reserved DPB_CTRLCLK
Reserved DPB_ML3- 73
28 GND GND 74
41 29 75
DPC_DOCK_DATA_AUX_DN IN Reserved DPB_AUX- DP_ML0+
IN DPA0_DOCK_DP 70
41 30 76
DPC_DOCK_CLK_AUX_DP IN Reserved DPB_AUX+ DP_ML0-
IN DPA0_DOCK_DN 70
31 GND GND 77
28 32 78
I2C_CLK IN Reserved PCIe CLK1+ DP_ML1+
IN DPA1_DOCK_DP 70
28 33 79
I2C_DATA IN Reserved PCIe CLK1- DP_ML1-
IN DPA1_DOCK_DN 70
68 34 80
DPA_DOCK_HPD IN DPA_HPD GND
68 35 81
DPA_DOCK_DAT IN DPA_CTRLDATA DP_ML2+
IN DPA2_DOCK_DP 70
68 36 82
DPA_DOCK_CLK IN DPA_CTRLCLK DP_ML2-
IN DPA2_DOCK_DN 70
B 29 DOCK_ID1 IN 37 DOCK_ID1 GND 83 B
68 38 84
DPA_DOCK_AUX_DN IN DPA_AUX- DP_ML3+
IN DPA3_DOCK_DP 70
68 39 85
DPA_DOCK_AUX_DP IN DPA_AUX+ DP_ML3-
IN DPA3_DOCK_DN 70
16 40 86
SLP_S3#_3R IN SLP_S3# GND
27 41 87 32
SLP_S4#_KBC IN RESERVED_SLP_S4# USB3_RX+
OUT USB30_RX0_DP
42 88 32
VA_ON# USB3_RX-
OUT USB30_RX0_DN
26 43 89
ON_OFF# IN NBSWON# GND
32 44 90
PVADPTR USB_P0_DP BI RESERVED (I2C_CLK/USB1+) USB3_TX+
IN USB30_TX0_DP 32
32 45 91
USB_P0_DN BI RESERVED (I2C_Data/USB1-) USB3_TX-
IN USB30_TX0_DN 32
7 IN 46 92 DETECT1#
LIMIT_SIGNAL DOCK_ADP_SIGNAL DETECT2#
P1 VA(120W) GND G1
G3 G2
1
GND GND
0.1UF_25V_2
0.1UF_25V_2
1
G4 GND GND G5
C3600
C3601
FOX_QL1046L_D262AR_7H_92P
6012B0449701
2
AGND_AUDIO
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
DOCKING CONN.
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 57 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D P3V3S
P5V0S D
2
2
R113 P3V3S
R118
CN200
47K_5%_2 26 26 G G2
47K_5%_2 25 G1
P3V3DS 25 G
1
24
1
24
IN 55 58 62 23
WL_LED_ALL# 22
23
3
22
62 57 51 21
Q112 LED_PWRSTBY# OUT 20
21
51 33 OUT
D
20
BAT_GRNLED# 19
30 1 G 51
WWAN_TRANSMIT_OFF# IN BAT_AMBERLED# OUT 18
19
33 LED_3S_SATA# OUT 18
S
30 17
SSM3K7002BFU HDD_HALTLED IN 16
17
62 58 55 WL_LED_ALL# OUT 16
15
2
15
14 14
29 13
SC_PWRSV# OUT 12
13
32 USB_P7_DN BI 12
IN 56 11
LED_WWAN_LINK# 32 USB_P7_DP BI 10
11
51 IM_5S_DATA BI 10
C 51 9 C
IM_5S_CLK BI 8
9
8
7
P3V3S_ISCT IN 6
7
6
WLAN_WWAN_BLUETOOTH_ LED 50
50
39
39
38
38
28
28
26
26
PCH_3S_SMDATA BI
PCH_3S_SMCLK BI
5
4
5
4
3 3
58 2
ST_LEFT BI 1
2
58 ST_RIGHT BI 1
ACES_50501_0264N_001_26P
TMP121029001
P3V3S P5V0S
1
1
0_5%_2_DY
0_5%_2
R203
R204
CN202
8 8
7 7 G G2
6 6 G G1
58 5
SP_DATA_Q BI 5
58 4
SP_CLK_Q BI 4
58 3
ST_LEFT BI 3
2 2
58 1
ST_RIGHT BI 1
HIROSE_FH34SRJ_8S_0_5SH_50_8P
6012B0474701
STICK POINT
P5V0S P3V3S
4.7K_5%_2_DY
4.7K_5%_2_DY
4.7K_5%_2_DY
4.7K_5%_2_DY
5V 3.3V
1
R202
R205
R206
Q200
S1 1 SP_DATA BI 51
2 G1 1 R207 2
6 0_5%_2 SP_DATA_Q BI 58
D1
INVENTEC
D2 3 SP_CLK_Q BI 58
5 G2 1 R208 2
4 0_5%_2 SP_CLK BI 51
S2
L2N7002DW1T1G_DY TITLE
MODEL,PROJECT,FUNCTION
STICK POINT OPTION STICK POINT & B2B CNTR
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
59 SENSE_B IN
X5R
20K_1%_2
1
C511
59 1 + 2 PR_AOUT_C_L_DOCK 1 R522 2 PR_AOUT_L_DOCK 57
PR_AOUT_L_AB IN OUT
R528
150UF_6.3V 30_1%_3
C512
P3V3S 59 1 + 2 PR_AOUT_C_R_DOCK 1 R523 2
PR_AOUT_R_AB IN OUT PR_AOUT_R_DOCK 57
2
Q528 30_1%_3
150UF_6.3V
10K_5%_2
L2N7002DW1T1G
X5R
20K_1%_2
20K_1%_2
1
1
57 S1 1
2 G1
X5R C526
LINE_IN_SENSE IN
R517
100K_5%_2 A_LINEINR 1 2 R504
R502
6 1 2
2 R503
59 OUT IN A_LINEINR_DOCK 57
2
D1
D2 3 D500 6.2K_1%_2
5 2.2UF_6.3V_3
R529
G2
C514
2
4 1 2
2
51 A_SD# IN 1 2
SPKR_EN_AB A_LINEINL 1 2 1 R505 2
S2 59 OUT IN A_LINEINL_DOCK 57
D 6.2K_1%_2
D
2K_5%_2_DY
2K_5%_2_DY
2.2UF_6.3V_3
0.1UF_16V_2
1SS355VMTE_17
1
R506 2
R507 2
AGND_AUDIO X5R
C527
AGND_AUDIO R531
39.2K_1%_2 AGND_AUDIO
2
57
2
59 60
1
IN OUT
100K_5%_2
LINE_OUT_SENSE SENSE_A
1
R530
P5V0S_AUDIO_AVDD P5V0S
P3V3S P3V3S AGND_AUDIO INT-SPEAKER CONN.
2
750MA
AGND_AUDIO
85MA
0.1UF_16V_2
0.1UF_16V_2
10UF_6.3V_3
1UF_6.3V_2
1UF_6.3V_2
1
1
ACES_50271_0040N_001_4P
1
10UF_6.3V_3
0.1UF_16V_2
0.1UF_16V_2
1
C506
C507
C509
C510
C502 CN640
1UF_6.3V_2
C508
C505 SPK_OUT_R_DP R7580 1 2 SHORT_0603_25 1 1
C503 SPK_OUT_R_DN 1 2 SHORT_0603_25 2 G1
R7581 2 G
C504 SPK_OUT_L_DN 1 2 SHORT_0603_25 3 G2
R7582 3 G
2
SPK_OUT_L_DP 1 2 SHORT_0603_25 4
2
U501 R7583 4
C C
2
2
1 DVDD_CORE AVDD1 27
AVDD2 38 6012B0194003
CSC0402_DY
CSC0402_DY
CSC0402_DY
CSC0402_DY
3 DVDD_IO PVDD1 45
1
AGND_AUDIO
2200PF_50V_2
2200PF_50V_2
2200PF_50V_2
2200PF_50V_2
PVDD2 39
C7580
C7581
C7582
C7583
C640
C641
C642
C643
9 13
DVDD SENSE_A OUT SENSE_A 59
14
SENSE_B OUT SENSE_B 59
2
28
HP0_PORTA_L OUT PR_AOUT_L_AB 59
2
P3V3S 29
HP0_PORTA_R OUT PR_AOUT_R_AB 59
VREFOUT_A 23
67
33 6
AZ_R3S_BITCLK IN HDA_BITCLK
R534 2
R535 2
R536 2
R537 2
3.3_5%_2
3.3_5%_2
3.3_5%_2
3.3_5%_2
31 60
HP1_PORTB_L OUT HP_OUT_L1
5 32
4.7K_5%_2
67
33 AZ_R3S_SDOUT IN HDA_SDO HP1_PORTB_R OUT HP_OUT_R1 60
1
X7R
33 10 19 C530 1 2 1UF_6.3V_2 60
AZ_R3S_SYNC IN HDA_SYNC PORTC_L IN A_MIC
1 2 R513
20 60
R514 82
PORTC_R IN EXT_MIC_JACK
1
33 1 24 60
AZ_R3S_SDIN0 OUT HDA_SDI VREFOUT_C/GPIO4 OUT MIC_BIAS
33_5%_2
33 11 15
IN HDA_RST# PORTE_L
0_5%_2_DY
AZ_R3S_RST#
21 R515 1
PORTE_R 16
0.01UF_50V_2
B B
C522
17
PORTF_L
18
IN A_LINEINL 59
PORTF_R IN A_LINEINR 59
10PF_50V_2_DY
SPKR_EN_AB 47 EAPD
40
2
44 IN 100_5%_24 DMIC0/GPIO2
DMIC_DAT
1
44
10K_5%_2
SPK_PORTD_+R OUT SPK_OUT_R_DP
48 43
SPDIFOUT0/GPIO3 SPK_PORTD_-R OUT SPK_OUT_R_DN
R508
46
2
DMIC1/GPIO0/SPDIFOUT1
MONO_OUT 25
C518 R509 C520
36 12 1 2 PCBEEP_IC_C 2 1 1 2
2
CAP+ PCBEEP
PCBEEP_IC_CR PCBEEP_CRC
52
0.1UF_16V_2
REC_MUTE_LED_CNTR OUT 0.1UF_16V_2
3
100K_5%_2
0.01UF_50V_2
62 PLAY_MUTE_LED_CNTR OUT
1
21
10K_5%_2
VREFFILT Q500
C521 22
D
CAP2
C519
2 R510
1 35 2 34 1
CAP- V- G
IN A_3S_ICHSPKR 29
37 P5V0S_AUDIO_AVDD
10UF_6.3V_3
P5V0S
1UF_6.3V_2
VREG(+2.5V)
4.7UF_6.3V_3
4.7UF_6.3V_3
4.7UF_6.3V_3
S
1
1
7 SSM3K7002BFU
2
X5R DVSS
C7551 EMI SOLUTION
1
C515
C516
C529
2
2.49K_1%_2
2.49K_1%_2
C517
1 2
1
42 PVSS AVSS1 26
30
P5V0S_AUDIO_AVDD AVSS2
2
C500 0.1UF_16V_2
2 R512
A 49 33 A
2 R511
PAD AVSS3
2
2
1UF_6.3V_2_DY U500 AGND_AUDIO C7552
1 5
10UF_6.3V_3
IN OUT 1 2
AGND_AUDIO
2
IDT_92HD91B2X5NLGXWCX_QFN_48P
1
C501
2 GND 59 0.1UF_16V_2
43
64
31 R520 SENSE_A IN
1 2 59 SENSE_B IN
1000PF_50V_2
1000PF_50V_2
3 4
24
28
16
26
SLP_S3#_3R IN EN N/C
1
57 51
SHORT_0805_40_NP AGND_AUDIO
2
TI_HPA01091DBVR_SOT23_5P
AGND_AUDIO
C524
C525
R521
INVENTEC
1 2
SHORT_0805_40_NP
2
AGND_AUDIO
TITLE
MODEL,PROJECT,FUNCTION
AUDIO CODEC
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P5V0S_AUDIO_AVDD
IN VREF_EQ 60 C615
C612 1 2
1
59 2 1
A_MIC OUT
C616 0.1UF_16V_2
15PF_50V_2
D 100PF_50V_2 R612 U610 X7R
2 1 1 1OUT VDD+ 8
L627
AGND_AUDIO
D
C620 BLM18PG600SN1D 100K_5%_2
2
1 2 1 2 2 R617 1 2 7
60 59 EXT_MIC_JACK IN 1IN- 2OUT IN VREF_EQ 60
1
10K_5%_2 3 6
0.47UF_10V_3 1IN+ 2IN-
C617 R618 1
X5R 4 GND 2IN+ 5 2
68PF_50V_2 100K_5%_2
TI_TLV2462CDGKR_MSOP_8P
1
0.1UF_16V_2
100K_5%_2
2.2UF_6.3V_2
C614
R619
AGND_AUDIO
C613
2
2
X7R X5R
B JACK600 B
7 1 L602 2
7 OUT EXT_MIC_JACK 59 60
5 R602
5 BLM18PG600SN1D 1 2
4 L600 1 2 1 R600 2 16_1%_2 59 IN MIC_BIAS 59
4
3
IN HP_OUT_L1
3 FBM_11_160808_121T 2.2K_5%_2
1 R601 2 16_1%_2
1
L601 1 2 1 59
1
2
IN HP_OUT_R1
2 FBM_11_160808_121T OUT JACK_DET C600
6 6 1UF_6.3V_2
0.033UF_16V_2
0.033UF_16V_2
1
1
220PF_50V_2
2
SINGA_2SJ3005_023111F_7P
C601
C602
C603
6026B0256901
P5V0S_AUDIO_AVDD
2
OUT SENSE_A 59
AGND_AUDIO
1
1
R603
R604
100K_5%_2
20K_1%_2
2
2
AGND_AUDIO
3
AGND_AUDIO Q600
D
A 1 G A
S
SSM3K7002BFU
REFERENCE NUMBER:600~610
2
AGND_AUDIO
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
EXT. MIC AMP. & AUDIO JACK
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 60 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
2
D800
NC
1 3 SD_MMC_CD_WAKE# IN 61
33
BAT54_30V_0.2A
61 P3V3_CR IN SD_MMC_WP P3V3A
IN 61
CR_GPIO 1 2
D P3V3_CR IN 61
5
U801 TP24 R802 D
1
56 TP800 10K_5%_2
BUF_PLT_RST# 1
+
33 28 26 IN
55 53 51 4
4.7UF_6.3V_3
0.1UF_16V_2
32
31
30
29
28
27
26
25
CR_RST# 2
1
34 IN U800
C803
C807
TC7SZ08FU
WAKE#
MS_INS#
SD_CD#
SP7
NC
NC
GPIO
3V3aux
2
P3V3S_VCC_READER
1 PERST# NC 24
IN CLKREQ_PCIE6_L0_N 2 CLKREQ# NC 23
34 PCIE_TX6_L0_C_DP 3 22
33 IN HSIP NC
33 IN PCIE_TX6_L0_C_DN 4 HSIN SP6 21 SD_MMC_DATA2 IN 61
0.1UF_16V_2
10UF_6.3V_3
CLK_PCIE6_L0_DP SD_MMC_DATA3
1
34 5 20 61
IN REFCLKP SP5 IN
34 IN CLK_PCIE6_L0_DN 6 REFCLKN SP4 19 SD_MMC_CMD IN 61
C808
C810
33 PCIE_RX6_L0_C_DP PCIE_RX6_L0_DP 7 18 P3V3D_P1V8D
OUT C813 1 2 0.1UF_16V_2 HSOP DV33_18
33 PCIE_RX6_L0_C_DN PCIE_RX6_L0_DN 8 17 SD_MMC_CLK 61
OUT 2 0.1UF_16V_2 IN
1UF_6.3V_2
C811 HSON SP3
1
1
CARD_3V3
C802
2
3V3_IN
DV12S
RREF
AV12
C 33 C
SP1
SP2
GND
NC
2
REALTEK_RTS5237_GR_QFN_32P
4 CN820
SD_VDD
9
10
12
13
14
15
16
11
1 R801 2 SD_MMC_CLK 5
61 IN SD_CLK
6.2K_1%_2 61 IN SD_MMC_CMD 2 SD_CMD
P1V2_CR SD_MMC_DATA0 IN 61
61 IN SD_MMC_DATA0 7 SD_DATA0
SD_MMC_DATA1 IN 61
61 IN SD_MMC_DATA1 8 SD_DATA1
61 IN SD_DATA3_CD
0.1UF_16V_2
C806
61 IN SD_MMC_WP 10 SD_WP
61 IN P3V3_CR
33
61 IN SD_MMC_CD_WAKE# 11 SD_CD_SW
4.7UF_6.3V_3
12 SD_COM
1
0.1UF_16V_2
2
3 G1
C801
SD_VSS1 GND1
C800
6 G2
0.1UF_16V_2
10UF_6.3V_3
SD_VSS2 GND2
1
P3V3S_VCC_READER FULLINHOPE_A0131_0001_12P
C804
C805
2
B B
6026B0256701
2
P5V0S
P3V3A
47K_5%_2
DGND_CHASSIS3
1
D D S S P3V3_CR OUT 61
R803
Q801
G
DIODES_DMG2302U_7_3P
2
P1V2_CR P1V2_PHY_CR
G
R800
1 2
0_5%_2
3
Q800
D
29 IN CR_PWREN# 1 G
S
A A
SSM3K7002BFU
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S
P3V3DS
47K_5%_2
1
S
R131
DIODES_DMP2305U_SOT23_3P
R132 Q127
S
1 2 G
MUTE BOTTON G
32
CSC0402_DY
D
SW154 Q126 330K_5%_2
D
62 51 OUT SCAN_3S_OUT(17) 3 3 4 4
C101
1
D
G
ISCT_LED# IN
S
KSCAN_3S_IN(0)
2
52 IN 1 1 2 2
SSM3K7002BFU
GND
D
2
D
MISAKI_NTC011_BA1J_A160T_4P
G1
6026B0239401
P3V3S_ISCT
3
52 IN 1 1 2 2 S2 D110
L2N7002DW1T1G Q110
GND
6011B0137801
D
R124 R130
MISAKI_NTC011_BA1J_A160T_4P 1 G
10K_5%_2 2 1
G1
S
6026B0239401 10K_5%_2
2
C C
2
WIRELESS/BLUETOOTH LED
S9101
SCREW560_800_NP_1P
1
DGND_PBN
P3V3AL_PB
0.1UF_16V_2
1
P3V3AL_PB CN290 G2
C9113
B P3V3DS G2 B
CN9100
G1
G1 1 1
U9100 2
1 6 58 57 51 LED_PWRSTBY# IN 2
VDD 62 6 3
2
5 57 51 26 ON_OFF# IN 3
62 LED_PWRSTBY#_PB IN 5 4
3 4 51 44 LID_SW#_3 IN 4
DGND_PBN GND 62 ON_OFF#_PB IN 4 5
3 5
LID_SW#_3_PB IN 3 6 6
62 OUT LID_SW#_3_PB 2 Output 2
1
2
BCD_AH9249NTR_G1_TSOT23_3P
1
G1 G1
G2 G2 ACES_50505_0064N_001_6P
ACES_50505_0064N_001_6P
SW9100
62 OUT ON_OFF#_PB 3 3 4 4
DGND_PBN
1 1 2 2 DGND_PBN DGND_PBN
6012B0317701
GND
P3V3AL_PB
D9100
6026B0239401
A R9100 A
62 OUT LED_PWRSTBY#_PB 1 2 1 2
360_5%_2
19_217_W1D_AP1Q2QY_3T
FIX9102 FIX9103
DGND_PBN 6011B0028601
1
FIX_MASK FIX_MASK
FIX_MASK FIX_MASK
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 62 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
XTAL_12M_OUT 12MHZ_DY
X9000
XTAL_12M_IN 1 3
18PF_50V_2_DY
NC
18PF_50V_2_DY
4 2
AU9542 AU9560
1
P5V0S_SM P3V3AL_SM
C9018
C9019
D9031
24MA
NC
X9000 R9031 2
C9108 INSTALL UNINSTALL LED_SM_PWRSTBY# IN
1 1 2 2 1
C9109 270_5%_2
6011B0115101
2
PVSM_VCC_SM EVL_12_21_T3D_CP1Q2B12Y_2C_2P
C9006
P3V3S_SM_AB
0.1UF_16V_2 DGND_SM DGND_SM
POWER LED
P3V3AL_SM
1
2
R9012 D9032
1
U9000 1 2 WHITE
63 SCARDC8 1 28 2 Pure White
IN 2
SCARD0C8 XO
27 0_5%_2_DY BAT_SM_GRNLED# OUT -
R9032 2
R9000 63 SCARDC6 R9002 1 1
IN SCARD0C6 XI +
D 4.7K_5%_2 63 3 26 1 R9011 2 63 3 Yellow
SCARDFCB IN 4
SCARD0FCB PWRSV_SEL
25
IN 100K_5%_2 BAT_SM_AMBERLED# OUT -
270_5%_2
SMIO_5VPWR LEDCRD
0_5%_2 SC_PWRSV#_SM
YELLOW D
DGND_SM 5 24
2
63 SCARDRST IN SCARD0RST LEDPWR EVL_12_22_Y2ST3D_C30_2C_3P
2
R9001 2 63 SCARDCLK 6 23
63 SCARDDATA 1 IN SCARD0CLK RESET
P3V3S_SM_AB
IN
470_5%_2
USB_P7_SM_DN IN
7
8
SCARD0DATA
DM
EEPDATA
EEPCLK
22
21
P3V3S_SM_AB
BATTERY LED 6011B0137701
1
9 20 D9033
USB_P7_SM_DP IN 10
DP P1-6
19 ICCINSERTN WHITE P3V3S_ISCT_SM
11
AV33 ICCINSERTN
18
OUT 63 C9011 2 Pure White
- R9033
PVSM_VCC_SM SCPWR0 VDDH
1UF_6.3V_2 1 1 2
12 17 +
5VGND VDDP P1V8S_SM
1
1
3 -
Yellow
270_5%_2
13 5VINPUT VDD 16
YELLOW
2
14 15
3
C9005 V33OUT V18OUT
1
C9010 EVL_12_22_Y2ST3D_C30_2C_3P
ALCOR_AU9560_GBS_GR_SSOP_28P Q9031
C9004
0.1UF_16V_2
WIRELESS LED
D
DGND_SM 0.1UF_16V_2 1 G
6011B0137701
WL_LED_SM_ALL# IN
2
2
1UF_6.3V_2 P5V0S_SM P3V3S_SM_AB
DGND_SM
S
1
1
2
SSM3K7002BFU
C9009 C9007
2
DGND_SM 1UF_6.3V_2
1
1
DGND_SM
2
C9003 C9002
DGND_SM C9001 C9000
0.1UF_16V_2
P3V3S_SM
1UF_6.3V_2 0.1UF_16V_2 1UF_6.3V_2
C 0.1UF_16V_2 C
DGND_SM
2
2
DGND_SM
1K_5%_2
1
1
10K_5%_2
R9036
R9035
DGND_SM DGND_SM
2
2
HDD_STP#
PVSM_VCC_SM
CN9001 P3V3S_ISCT_SM
Q9032
1 S1 1
VCC
HDD_SM_HALTLED IN IN LED_3S_SM_SATA#
63 SCARDRST 2 2 G1
OUT
100K_5%_2_DY
RST
1
3 P5V0S_SM 6 WHITE 2 Pure White D9030
63 SCARDCLKOUT CLK CN9000 - R9034
0.1UF_16V_2
26 G2 D1
1
63 SCARDFCB 4 D2 3 1 1 2
OUT C4
P3V3S_SM 25
26 G
G1
+
R9037
C9015
63 SCARDC6 6 5 G2 3 Yellow
OUT VPP
24
25 G
HDD_STP# IN -
270_5%_2
7 4
SCARDDATA OUT IO P3V3AL_SM 24
YELLOW
SCARDC8 OUT
8 C8 23 23
L2N7002DW1T1G
S2
6011B0137701
2
22 22 EVL_12_22_Y2ST3D_C30_2C_3P
9 21
2
BAT_SM_GRNLED# OUT 20
B 10
5
SW-CD-GND
GND
BAT_SM_AMBERLED#
LED_3S_SM_SATA# IN
OUT 19
18
19
18
SATA LED & HDD-HALTED LED B
DGND_SM 17 DGND_SM
HDD_SM_HALTLED IN 16
17
HAMB_083AA24F08B_10P WL_LED_SM_ALL# IN 16
15 15
6026B0198201 14 14 DGND_SM
S9002
DGND_SM SMART CARD READER CONN SC_PWRSV#_SM IN 13 13 1
12
USB_P7_SM_DN IN 11
12
SCREW620_850_NP_1P
USB_P7_SM_DP IN 10
11
P3V3S_ISCT_SM IM_5S_DATA_SM BI 10
P3V3S_ISCT_SM 9
IM_5S_CLK_SM BI 8
9
P3V3S_SM R9039 2
8
CN9021 1 7 7
63 BI ST_RIGHT_SM 1 1 6
0_5%_2
0_5%_2_DY
6
ST_LEFT_SM 2
2
R9040 2
63 BI 2 5
IM_5S_CLK_SM 3 PCH_3S_SMDATA_SM BI 5
0_5%_2
63 BI 3 4
R9038
63 BI IM_5S_DATA_SM 4 4 PCH_3S_SMCLK_SM BI 3
4
5 3
5 2
63 BI PCH_3S_SMCLK_SM 6 6 G G1 ST_LEFT_SM BI 1
2
63 PCH_3S_SMDATA_SM 7 G2 ST_RIGHT_SM BI 1
1
BI 8
7 G
ACES_50501_0264N_001_26P
8
HIROSE_FH34SRJ_8S_0_5SH_50_8P
1
1000PF_50V_2
A A
DGND_SM
2
1
DGND_SM FIX_MASK FIX_MASK
DGND_SM DGND_SM
DGND_SM TOUCHPAD FIX9004
1 FIX9005
1
FIX_MASK FIX_MASK
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
F F
CN3056
CRT_VSYNC_DB 40
48 BI CRT_HSYNC_DB 39
40
48 BI 38
39
G2
38 G2
CRT_G_DB 37 G1
48 IN CRT_R_DB 36
37 G1
48 IN CRT_B_DB 35
36
48 IN 34
35
34
CRT_DDCDATA_DB 33
48 BI CRT_DDCCLK_DB 32
33
48 BI 31
32
31 DGND_USB
USB_P3_DN_DB 30
48 BI USB_P3_DP_DB 29
30
48 BI 28
29
28
USB30_RX3_DN_DB 27
48 OUT USB30_RX3_DP_DB 26
27
48 OUT 25
26
25
USB30_TX3_DN_DB 24
48 IN USB30_TX3_DP_DB 23
24
E 48 IN 22
23
E
22
USB_P1_DN_DB 21
48 BI USB_P1_DP_DB 20
21
48 BI 19
20
19
USB30_RX1_DN_DB 18
48 OUT USB30_RX1_DP_DB 17
18
48 OUT 16
17
16
USB30_TX1_DN_DB 15
48 IN USB30_TX1_DP_DB 14
15
48 IN 13
14
13
CPPWR_EN_DB 12
48 IN SLP_S4#_3R_DB 11
12
P5V0DS_DB 48 IN 11
SLP_S3#_3R_DB 10
48 IN 9
10
9
8 8
7 7
6 6
5 5
4 4
3 3
2 2
1 1
ACES_51517_04001_001_40P
6012B0218428
D
USB DB DGND_USB
D
CN3055
CRT_VSYNC 1
42 BI CRT_HSYNC 2
1
42 BI 3
2
3
CRT_G_L 4
42 IN CRT_R_L 5
4
42 IN CRT_B_L 6
5
42 IN 7
6
7
CRT_DDCDATA 8
42 BI CRT_DDCCLK 9
8
42 BI 10
9
10
C USB_P3_DN 11 C
32 BI USB_P3_DP 12
11
32 BI 13
12
13
USB30_RX3_DN 14
32 OUT USB30_RX3_DP 15
14
32 OUT 16
15
16
USB30_TX3_DN 17
32 IN USB30_TX3_DP 18
17
32 IN 19
18
19
USB_P1_DN 20
32 BI USB_P1_DP 21
20
32 BI 22
21
22
USB30_RX1_DN 23
32 IN USB30_RX1_DP 24
23
32 IN 25
24
25
USB30_TX1_DN 26
32 OUT USB30_TX1_DP 27
26
P5V0DS
32 OUT 28
27
28
CPPWR_EN 29
51 OUT SLP_S4#_3R 30
29
16 OUT SLP_S3#_3R 31
30
16 OUT PLT_ID3 32
31
29 IN 33
32
33
34 34
35 35
36 36
37 37 G1 G1
B 38 38 G2 G2 B
39 39
40 40
ACES_51517_04001_001_40P
6012B0218428
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
RESERVE
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S_CAM
D CN600
1 1
OUT DMIC_CLK_DB D
2
2 OUT DMIC_DATA_DB
3 3
4 4 1 2
5 5 L603 BLM15AG121SN1D_500MA
6 6
1UF_6.3V_2
1
7 7
8 8
C604
G1 G 9 9
G2 G 10 10
ACES_50376_01001_001_10P
2
6012B0452401
DGND_SYS1 DGND_SYS1
DGND_SYS1
C C
P3V3S_CAM
P3V3S_CAM
1000PF_50V_2
1000PF_50V_2
4.7UF_6.3V_3
4.7UF_6.3V_3
1
1
1
1
C650
C651
C652
C653
2
2
2
2
KNOWLES_SPK0415HM4H_B_8P
KNOWLES_SPK0415HM4H_B_8P
MIC600 MIC601
1 VDD CLOCK 3 1 VDD CLOCK 3
B DATA 4 DATA 4 B
5 DGND_SYS1 5 DGND_SYS1
GND_1 GND_1
6 2 6 2
GND_2 SELECT
IN DMIC_DATA_DB GND_2 SELECT
IN DMIC_DATA_DB
7 GND_3 7 GND_3
8 8
GND_4
IN DMIC_CLK_DB GND_4
IN DMIC_CLK_DB
2
LEFT
10K_5%_2
RIGHT P3V3S_CAM
R640
10K_5%_2
DGND_SYS1 R641
DGND_SYS1
1
DGND_SYS1
A A
FIX600
FIX_MASK
1
FIX601
REFERENCE NUMBER:600~649
FIX_MASK INVENTEC
MIC DOUGHTER BOARD
1
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 65 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
S3
D S14
SCREW320_700_800_1P
D
SCREW320_700_800_1P
1
1
SCREW330_600_0_1P
STDPAD_1.15_6-TOP
S8 S7
1
ST17 1MM
SCREW300_550_1P
STDPAD_3.15_5.5_TOP
1
1
S10 S9
1.6MM
1
ST22
SCREW320_600_1P SCREW320_600_1P S6 S25
1MM
1
SCREW330_600_0_1P SCREW330_600_0_1P STDPAD_3.15_5.5_TOP
STDPAD_1.15_6-TOP
S12
1
1
1
SCREW320_800_600_1P SCREW320_800_600_1P S4
SCREW300_700_1P S15 S18 S21
ST19
1
SCREW300_700_1P
SCREW280_700_NP_1P
1
S11
1
C C
1.6MM
1
S2
SCREW300_700_1P
ST24
1
1MM SCREW320_800_NP_1P
1
STDPAD_1.15_6-TOP
STDPAD_3.15_5.5_TOP
ST21
1
1.6MM
1
6052B0103501
6052B0103501
6052B0103501
S16
B SCREW300_700_1P B
1
FIX1 FIX2
FIX_MASK FIX_MASK
1
FIX3 FIX4
A FIX_MASK FIX_MASK A
1
FIX5 FIX6
FIX_MASK FIX_MASK
INVENTEC
1
FIX7 FIX8
TITLE
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 66 of 78
8 7 6 5 4 3 2 1
A
B
C
D
8
8
C7542
2 1
68PF_50V_2
PVPACK
C7543
2 1
SPI_CLK_FLH
33PF_50V_2
AZ_R3S_BITCLK
C7544
IN
2 1
IN
33PF_50V_2
C7510
C7545
C7512 2 1
2 1 2 1
CSC0402_DY
68PF_50V_2
CSC0402_DY
7
C7546
7
2 1
33PF_50V_2
C7547
2 1
CLK_R3S_KBPCI
68PF_50V_2
AZ_R3S_SDOUT IN
IN
C7559
C7513 C7511
2 1 2 1 2 1
P1V5
0.1UF_16V_2
VRPVBAT_3V
CSC0402_DY CSC0402_DY
C7560
IN
2 1 C7514
6
6
0.1UF_16V_2 2 1
10
C7536 33PF_50V_2
C7561
PVBAT
2 1
EMI SOLUTION
2 1 C7515
VRPVDDQ IN
68PF_50V_2 2 1
0.1UF_16V_2
C7562 C7537 68PF_50V_2
2 1 2 1 C7528
2 1 C7516
0.1UF_16V_2 33PF_50V_2 2 1
0.1UF_16V_2
33PF_50V_2
C7529
2 1 C7517
2 1
82PF_50V_2
68PF_50V_2
C7518
VRPVBAT_5V
5
2 1
5
IN
33PF_50V_2
C7519
C7534 2 1
2 1
R_SPI_CLK_FLH
68PF_50V_2
33PF_50V_2
IN
C7535
2 1
PVSIM
C7533
68PF_50V_2
2 1
IN
C7564
2 1 CSC0402_DY
68PF_50V_2 C7540
C7565 2 1
4
4
2 1 CSC0402_DY
82PF_50V_2 C7541
C7566 2 1
2 1
CLK_KBC_SIO
CSC0402_DY
CSC0402_DY
11
IN
C7567
P5V0DS
2 1
C7531
68PF_50V_2
2 1
C7568
CSC0402_DY
VRP1V05A
2 1
IN
CSC0402_DY
C7569
2 1
CHANGE by
C7538
3
3
68PF_50V_2 2 1
C7589
CLK_R3S_TPM
CSC0402_DY
2 1
XXX
C7539
IN
33PF_50V_2
2 1
C7590
2 1 C7532 CSC0402_DY
33PF_50V_2 2 1
C7591 CSC0402_DY
2 1
C7585 C7553
33PF_50V_2
2 1 2 1
C7570
33PF_50V_2 68PF_50V_2
DATE
2 1
P3V3S
C7586 C7554
0.1UF_16V_2 2 1 2 1
2
2
P5V0S
C7592
82PF_50V_2 68PF_50V_2
RF SOLUTION
2 1
C7587 C7556
82PF_50V_2
2 1 2 1
21-OCT-2002
33PF_50V_2 0.1UF_16V_2
C7555
C7588 C7557
A3
2 1
SIZE
2 1 2 1
0.1UF_16V_2
TITLE
CS
33PF_50V_2 68PF_50V_2
P1V05S
CODE
67 SHEET
of
1
DOC.NUMBER
1
1310xxxxx-0-0
78
EMI & RF SOLUTION
INVENTEC
MODEL,PROJECT,FUNCTION
X01
REV
A
B
C
D
8 7 6 5 4 3 2 1
P3V3S
0.1UF_16V_2
1
C5306
PART 2 0F 9 MMBT3904
10K_5%_2
2 R5307 1
1
2.2K_5%_2
MUTI GFX Q5300
R5305
3 2
2
AD29 AU24 C E
GENLK_CLK NC#AU24
F AC29 GENLK_VSYNC NC#AV23 AV23 F
2
AJ21 SWAPLOCKA NC#AR24 AR24 1 2
DPA
AK21 SWAPLOCKB
NC#AU26 AU26 1000PF_50V_2 U5300
AV25 1 8
NC#AV25
GPU_THRM_DPLUS 2
VDD SMCLK
7
BI THERM_CLK_GPU
AR8 AT27 GPU_THRM_DMINUS 3
DP SMDATA
6
BI THERM_DATA_GPU
AU8
NC#AR8 NC#AT27
AR26 1 2 4
DN ALERT#
5
OUT THERM_SCI#
AP8
NC#AU8 NC#AR26 25 16 EN_5V_3V OUT THERM#/ADDR GND
DBG_CNTL0 R5303
AW8 NC#AW8 NC#AR30 AR30 0_5%_2_DY SMSC_EMC1412_1_ACZL_TR_MSOP_8P
AR3 AT29 1 2
AR1
NC#AR3 NC#AT29 25 THERM# OUT
NC#AR1 R5304
AU1 DBG_DATA0 NC#AV31 AV31 0_5%_2
AU3 AU30 1 2
AW3
DBG_DATA1
DPB NC#AU30
THRMTRIP# OUT
DBG_DATA2 R5301
AP6 DBG_DATA3 NC#AR32 AR32 0_5%_2_DY
AW5 DBG_DATA4 NC#AT31 AT31
AU5 DBG_DATA5
AR6 DBG_DATA6 NC#AT33 AT33
AW6 DBG_DATA7 NC#AU32 AU32
AU6 DBG_DATA8 P3V3S
AT7 DBG_DATA9 NC#AU14 AU14
AV7 DBG_DATA10 NC#AV13 AV13
1
AN7
10K_5%_2
DBG_DATA11
P3V3S_DGPU
R5320
AV9 DBG_DATA12 NC#AT15 AT15
AT9 DBG_DATA13 NC#AR14 AR14
AR10 DBG_DATA14
E AW10 DBG_DATA15
DPC
NC#AU16 AU16 E
AU10 AV15 OUT CLKREQ_PCIE5_N
2
DBG_DATA16 NC#AV15
AP10
AV11
DBG_DATA17
AT17
OUT DGPU_PWR_EN
3
DBG_DATA18 NC#AT17
AT11 AR16
3
DBG_DATA19 NC#AR16 Q5322
1
AR12
2.2K_5%_2
2.2K_5%_2
DBG_DATA20 Q5321
D
R5045
R5047
AW12 AU20 1 G
DBG_DATA21 NC#AU20
IN
D
DGPU_PWR_EN
AU12 AT19 1 G
DBG_DATA22 NC#AT19
DGPU_PWR_EN# IN
S
AP12 DBG_DATA23
S
NC#AT21 AT21 SSM3K7002FU_DY
AR20
2
SSM3K7002BFU
2
NC#AR20
2
DPD
THERM_CLK_GPU OUT R5046 1 2 0_5%_2_DY AJ23 SMBCLK
SMBus NC#AU22 AU22
THERM_DATA_GPU OUT R5048 1 2 0_5%_2_DY AH23 SMBDATA NC#AV21 AV21
NC#AT23 AT23
P3V3S_DGPU P3V3S_DGPU NC#AR22 AR22
AK26 SCL
I2C
AJ26 SDA P3V3S_DGPU
P3V3S_DGPU
10K_5%_2_DY
2
10K_5%_2
S1
GENERAL PURPOSE I/O AVSSN AD37 IN 50 68
R5014
R5069 100K_5%_2 2 G1
GPU_GPIO0
R5013
AH20 GPIO_0
6 PCH_KBC_SMCLK
1 2 GPU_GPIO1 AH18 GPIO_1 G AE36 D1
3 PCH_KBC_SMDATA
IN 28 51
1
10K_5%_2
10K_5%_2
GPU_GPIO2 AN16 AD35
D2
IN 28 51 P3V3S
2
GPIO_2 AVSSN P3V3S_DGPU
R5079
R5033
5 G2
D5000 4 THERM_DATA_GPU DIODES_DMP2305U_SOT23_3P
1
1
AF37 IN 50 68
NC
B S2
D DGPU_VID5 OUT DGPU_VID1 OUT 3 1 AH17 AE38 L2N7002DW1T1G Q5311 D
ADP_PRES_OUT IN GPIO_5_AC_BATT AVSSN
S D
10K_5%_2_DY
10K_5%_2
2
AK17 GPIO_7_BLON HSYNC AC36
R5011
100_5%_2
GPU_GPIO8
R5015
R5313
1
G
1UF_6.3V_2
10K_5%_2
GPU_GPIO9 AH15 GPIO_9_ROMSI
C5309
R5310
DGPU_VID5 AJ16 R5026 P1V8S_DGPU
GPIO_10_ROMSCK
G
GPU_GPIO11 AK16 GPIO_11 RSET AB34 1 2
1
1
3 2
GPU_GPIO13 AM16 GPIO_13 AVDD AD34
2
AM14 GPIO_14_HPD2 AVSSQ AE34
DGPU_VID3
0.1UF_16V_2
1
1
1
AM13
1UF_6.3V_2
P3V3S_DGPU GPIO_15_PWRCNTL_0 Q5312
10UF_6.3V
DGPU_VID2
C5045
C5046
C5047
AK14 GPIO_16 VDD1DI AC33 R5308
D
1 R5068 2 AG30 AC34 1 2 1 G
GPIO_17_THERMAL_INT VSS1DI
DGPU_PWR_EN# IN
AN14 GPIO_18_HPD3
10K_5%_2_DY
S
AM17 1K_5%_2
68 GPU_CTF OUT DGPU_VID1 AL13
GPIO_19_CTF
V13
2
SSM3K7002BFU
2
GPIO_20_PWRCNTL_1 NC#V13
AJ14 U13 THRMTRIP# OUT
2
P3V3S_DGPU P3V3S_DGPU P3V3S_DGPU GPIO_21 NC#U13
GPU_GPIO22 AK13 GPIO_22_ROMCSB NC#AF33 AF33
AN13 AF32
68 CLKREQ_PCIE5_N OUT CLKREQB NC#AF32
3
NC#AA29 AA29
AG21 Q5000
10K_5%_2_DY
NC#AG21
D
DGPU_VID4 AG32 AC32
2
2
2
10K_5%_2
10K_5%_2
GPIO_29 NC#AC32
G 1
IN GPU_CTF 68
R5027
AG33 GPIO_30
R5016
R5022
NC_SVI2#AC31 AC31
10K_5%_2_DY
AJ19 GENERICA NC_SVI2#AD30 AD30
1
AK19 GENERICB NC_SVI2#AD32 AD32 L2N7002WT1G_DY
2
AJ20
1
1
GENERICC
R5057
C AK20 C
DGPU_VID2 OUT DGPU_VID3 OUT DGPU_VID4 OUT AJ24
GENERICD
10K_5%_2_DY
10K_5%_2_DY
GENERICE_HPD4
AH26
2
2
2
10K_5%_2
GENERICF_HPD5
2
R5030
R5031
AH24 GENERICG_HPD6
R5019
P1V8S_DGPU
AM34 P1V8S_DGPU
PS_0
IN PS_0 68
AC30
2
499_1%_2
1
CEC_1
8.45K_1%_2
1
P1V8S_DGPU
R5020
R5003
AK24 AD31
68
70 57 DPA_DOCK_HPD OUT HPD1
MLPS PS_1
IN PS_1 68
8.45K_1%_2
1
R5001
1
AH13 AG31
2
DBG_VREFG PS_2
IN PS_2 68
P3V3S_DGPU 68 OUT
0.1UF_16V_2
PS_1
1
249_1%_2
P3V3S
2
C5083
BACO
CSC0402_DY
5.11K_1%_2_DY
1
CLOSE TO GPU 68 PS_0 OUT
2K_1%_2
R5023
1 AL21 AD33
PX_EN PS_3
IN PS_3 68
R5004
C5020
TP5060 TP24
2
CSC0402_DY
1
100K_5%_2_DY
1
2K_1%_2
C5019
R5098
R5002
1
2
R5053
DEBUG DDC/AUX
2
2
AM26
DDC1CLK
BI DPA_DOCK_CLK 57
1
AN26
2
GPU_TESTEN DDC1DATA
BI DPA_DOCK_DAT 57
2
AD28 TESTEN
C5060 1
2
AM27 DPA_DOCK_AUX_DP_C 2 0.1UF_16V_2
P3V3S_DGPU
AUX1P
AL27 DPA_DOCK_AUX_DN_C 1 2
BI DPA_DOCK_AUX_DP 57
AUX1N
BI DPA_DOCK_AUX_DN 57
1
B B
1K_5%_2
100K_5%_2_DY
C5061 0.1UF_16V_2
R5059
10K_5%_2_DY GPU_TRSTB AM23
R5065
1
2 1 JTAG_TRSTB DDC2CLK AM19
GPU_TRSTB R5064 1
10K_5%_2_DY GPU_TDI AN23
R5054
1 2 JTAG_TDI DDC2DATA AL19 P1V8S_DGPU
TP30 TP5030 R5063
2 1 10K_5%_2_DY GPU_TCK AK23 JTAG_TCK
1 GPU_TDI R5061 1 P1V8S_DGPU
TP30 TP5031 2 10K_5%_2_DY GPU_TMS AL24 JTAG_TMS AUX2P AN20
RSC_0402_DY
2
1
1 2 1 10K_5%_2_DY JTAG_TDO AUX2N AM20
TP30 TP5032
RSC_0402_DY
2
GPU_TMS
R5009
1
1
TP30 TP5033 NC#AL30 AL30
R5007
10K_5%_2_DY
51K_5%_2_DY
51K_5%_2_DY
1 GPU_TDO NC#AM30 AM30
TP30
1
2
TP5034
R5012
R5051
R5052
0_5%_2 THERMAL
AL29
2
NC#AL29
GPU_THRM_DPLUS 1 R5040 2 GPU_THRM_DPLUS_R AF29 AM29
DPLUS NC#AM29
2
GPU_THRM_DMINUS 1 2 GPU_THRM_DMINUS_R AG29 DMINUS
68 PS_3 OUT
0.01UF_50V_2
1
R5042 AN21 68 OUT
4.75K_1%_2
NC#AN21
PS_2
1
2
2
1
C5022
0_5%_2 NC#AM21 AM21
0.68UF_10V_2
4.75K_1%_2
GPU_FDO
R5010
1
AK32 GPIO_28_FDO
C5021
NC#AK30 AK30
R5008
2
10K_5%_2
2
13 MA
2
L5011 DDCVGACLK AJ30
1 2 P1V8S_GPU_TSVDD AJ32 AJ31
2
TSVDD DDCVGADATA
AJ33
1 R5028 2 100K_5%_2 TSVSS
1
68
70 57 DPA_DOCK_HPD IN
0.1UF_16V_2
1
1
1
1UF_6.3V_2
BLM15AG121SN1D_500MA
10UF_6.3V
C5084
C5057
C5056
AMD_MARS_M2_FCBGA_962P
A A
2
MODEL,PROJECT,FUNCTION
AMD-THAMES-1
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
F F
E E
D D
C C
B B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
F F
U5001
PART 1 0F 9
TX3P_DPB2P AJ38
U38 PCIE_RX4P PCIE_TX4P T33 TX3M_DPB2N AK37
T37 PCIE_RX4N PCIE_TX4N T32
TX4P_DPB1P AH35
TX4M_DPB1N AJ36
T35 PCIE_RX5P PCIE_TX5P T30
R36 PCIE_RX5N PCIE_TX5N T29 TX5P_DPB0P AG38
LVTMDP
TX5M_DPB0N AH37
D TX2P_DPA0P AP35
IN DPA0_DOCK_DP D
L38 L33 AR35 57
NC#L38 NC#L33 TX2M_DPA0N
IN DPA0_DOCK_DN
PCI EXPRESS INTERFACE
K37 L32 57
NC#K37 NC#L32
NC#AN36 AN36
NC#AP37 AP37
K35 NC#K35 NC#L30 L30
J36 NC#J36 NC#L29 L29
CLOCK
C CLK_PCIE5_DP IN AB35 PCIE_REFCLKP C
AA36
CLK_PCIE5_DN IN PCIE_REFCLKN
PVPCIE
CALIBRATION
R5017 1.69K_1%_2 PVPCIE
PCIE_CALR_TX Y30 PVDDCI_PCIE_CALRP 1 2
R5060 R5018 1K_1%_2
1 2 AH16 TEST_PG PCIE_CALR_RX Y29 PVDDCI_PCIE_CALRN 1 2
1K_5%_2
AA30
PEG_PLT_RST# IN PERSTB
AMD_MARS_M2_FCBGA_962P
P3V3S
B OUT DGPU_HPD_INTR# B
C5150
3
1 2
Q5432
R5420
D
0.1UF_16V_2 1 2 1 G
DPA_DOCK_HPD IN
5
S
U5005 SHORT_0402_5
1 SSM3K7002BFU
+
DGPU_HOLD_RST# BI 4
2
R5110 2
BI PEG_PLT_RST#
1 2
-
TC7SZ08FU
100K_5%_2
3
54
51 28 PLT_RST# BI
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
U5001
PART 9 0F 9
P1V8S_DGPU
L5023
130 MA XTALIN AV33 GPU_XTALIN
1 2 P1V8S_DGPU_MPLL_PVDD
R5021
0.1UF_16V_2
1UF_6.3V_2
GPU_XTALOUT
1
1
1
2 1
10UF_6.3V
BLM15AG221SN1D_300MA
C5036
C5034
C5035
1M_5%_2
X5000
C XTALOUT AU34
1 3 C
4 2
2
2
27MHZ_12PF
H7 MPLL_PVDD
H8
12PF_50V_2
12PF_50V_2
MPLL_PVDD
1
C5069
C5067
XO_IN AW34
AM10 SPLL_PVDD
P1V8S_DGPU
2
75 MA
PLLS/XTAL
L5014
1 2 P1V8S_DGPU_SPLL_PVDD AN9 SPLL_VDDC XO_IN2 AW35
0.1UF_16V_2
1UF_6.3V_2
1
1
1
10UF_6.3V
BLM15AG121SN1D_500MA
C5156
C5157
C5155
AN10 SPLL_PVSS
2
2
2
CLKTESTA AK10
B AF30 NC_XTAL_PVDD CLKTESTB AL10 B
AF31 NC_XTAL_PVSS
PVPCIE
L5005
100 MA
1 2 PVPCIE_DGPU_SPLL_VDDC
0.1UF_16V_2
AMD_MARS_M2_FCBGA_962P
1UF_6.3V_2
1
1
10UF_6.3V
BLM15AG121SN1D_500MA
C5162
C5160
C5161
2
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 71 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
U5001 D
PART 8 0F 9
PVPCIE
DP_VDDR DP_VDDC
L5001
DP_VDDC AP31 280 MA 1 2
DP_VDDC AP32
0.1UF_16V_2
1UF_6.3V_2
1
1
1
AN33
10UF_6.3V
DP_VDDC BLM15PD600SN1D
C5148
DP_VDDC AP33
C5085
C5081
AN24 NC#AN24 DP_VDDC AL33
AP24 NC#AP24 DP_VDDC AM33
AP25 NC#AP25 DP_VDDC AK33
AP26 AK34
2
NC#AP26 DP_VDDC
AU28 NC#AU28 DP_VDDC AN31
AV29 NC#AV29
0.1UF_16V_2
1UF_6.3V_2
NC#AV19
1
1
1
DP GND
10UF_6.3V
237 MA HDMI
C5027
C5023
C5024
AN27
188 MA DP AH34 DP_VDDR
DP_VSSR
DP_VSSR AP27
AJ34 DP_VDDR DP_VSSR AP28
AF34 AW24
0.1UF_16V_2
1UF_6.3V_2
DP_VDDR DP_VSSR
1
2
1
AG34 AW26
10UF_6.3V
DP_VDDR DP_VSSR
C5144
C5147
C5143
AW32
2
DP_VSSR
DP_VSSR AN17
DP_VSSR AP16
DP_VSSR AP17
DP_VSSR AW14
DP_VSSR AW16
DP_VSSR AN19
DP_VSSR AP18
DP_VSSR AP19
DP_VSSR AW20
CALIBRATION
DP_VSSR AW22
DP_VSSR AN34
B AP39 B
R5025 DP_VSSR
1 2 AW28 NC#AW28 DP_VSSR AR39
DP_VSSR AU37
150_1%_2_DY DP_VSSR AF39
R5024 DP_VSSR AH39
1 2 AW18 NC#AW18 DP_VSSR AK39
DP_VSSR AL34
150_1%_2_DY DP_VSSR AV27
R5029 DP_VSSR AR28
1 2 AM39 DP_CALR DP_VSSR AV17
DP_VSSR AR18
150_1%_2 AN38
DP_VSSR
DP_VSSR AM35
DP_VSSR AN32
AMD_MARS_M2_FCBGA_962P
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 72 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVCORE_DGPU
PAD5001
1 2
P1V35S_DGPU VRPVCORE_DGPU IN 1 2
220UF_2V_10%_DY
POWERPAD_2_0610
F F
1
C5151
U5001
+
P1V8S_DGPU
PART 6 0F 9
0.1UF_16V_2
0.1UF_16V_2
2.2UF_6.3V_2
0.1UF_16V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
1
1
C5126
C5125
C5114
C5113
C5111
C5116
2
AB39 PCIE_VSS GND A3
E39 A37
0.01UF_50V_2
PCIE_VSS GND
0.1UF_16V_2
1
1
1UF_6.3V_2
U5001 F34 PCIE_VSS GND AA16
C5121
C5077
C5028
F39 AA18
2
PCIE_VSS GND
PART 5 0F 9
G33 PCIE_VSS GND AA2
G34 PCIE_VSS GND AA21
MEM I/O
1.5A
AC7 AA31
H31 PCIE_VSS GND AA23
2
VDDR1 NC#AA31
H34 PCIE_VSS GND AA26
AD11 VDDR1 NC#AA32 AA32
H39 PCIE_VSS GND AA28
AF7 VDDR1 NC#AA33 AA33
J31 PCIE_VSS GND AA6
AG10 VDDR1 NC#AA34 AA34
J34 PCIE_VSS GND AB12
AJ7 VDDR1 NC#W30 W30
K31 PCIE_VSS GND AB15
AK8 VDDR1 NC#Y31 Y31
K34 PCIE_VSS GND AB17
AL9 VDDR1 NC_BIF_VDDC V28
K39 PCIE_VSS GND AB20
G11 W29
PCIE
VDDR1 NC_BIF_VDDC
100 MA PVPCIE L31 PCIE_VSS GND AB22
G14 VDDR1 PCIE_PVDD AB37
L34 PCIE_VSS GND AB24
G17 VDDR1
G20 VDDR1 PCIE_VDDC
2.5A
G30
M34 PCIE_VSS GND AB27
M39 PCIE_VSS GND AC11
G23 VDDR1 PCIE_VDDC G31
N31 PCIE_VSS GND AC13
1
1
1
G26 H29
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
VDDR1 PCIE_VDDC
10UF_6.3V
10UF_6.3V
N34 PCIE_VSS GND AC16
C5108
C5109
C5095
C5103
C5123
C5094
G29 VDDR1 PCIE_VDDC H30
P31 PCIE_VSS GND AC18
H10 VDDR1 PCIE_VDDC J29
2.2UF_6.3V_2
2.2UF_6.3V_2
1
1
1
P34 AC2
10UF_6.3V
10UF_6.3V
10UF_6.3V
PCIE_VSS GND
C5025 J7 VDDR1 PCIE_VDDC J30
C5026
C5000
C5117
C5115
P39 PCIE_VSS GND AC21
E J9 VDDR1 PCIE_VDDC L28
R34 PCIE_VSS GND AC23 E
K11 M28
2
VDDR1 PCIE_VDDC
T31 PCIE_VSS GND AC26
K13 VDDR1 PCIE_VDDC N28
T34 PCIE_VSS GND AC28
K8 VDDR1 PCIE_VDDC R28
T39 AC6
2
2
PCIE_VSS GND
L12 VDDR1 PCIE_VDDC T28
U31 PCIE_VSS GND AD15
L16 VDDR1 PCIE_VDDC U28
U34 PCIE_VSS GND AD17
L21 VDDR1
V34 PCIE_VSS GND AD20
L23 VDDR1
L26 VDDR1 BIF_VDDC
1.4A
N27
V39 PCIE_VSS GND AD22
BACO PVCORE_DGPU W31 PCIE_VSS GND AD24
L7 VDDR1 BIF_VDDC T27
W34 PCIE_VSS GND AD27
M11 VDDR1
Y34 PCIE_VSS GND AD9
N11 VDDR1
Y39 PCIE_VSS GND AE2
P7 VDDR1 VDDC AA15
CORE GND AE6
R11 VDDR1 VDDC AA17
GND AF10
U11 VDDR1 VDDC AA20
1
1
1
AF16
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
P1V8S_DGPU GND
10UF_6.3V
10UF_6.3V
10UF_6.3V
10UF_6.3V
U7 VDDR1 VDDC AA22
C5087
C5089
C5082
C5142
C5139
C5140
C5141
GND AF18
Y11 VDDR1 VDDC AA24
GND GND AF21
Y7 VDDR1 VDDC AA27
GND AG17
VDDC AB16
L5012 F15 GND GND AG2
VDDC AB18
1 2 P1V8S_DGPU_VDD_CT F17 AG20
2
GND GND
VDDC AB21
F19 GND
VDDC AB23
BLM15AG121SN1D_500MA F21 GND GND AG6
0.1UF_16V_2
1
1
1
LEVEL AB26
1UF_6.3V_2
10UF_6.3V
VDDC
F23 GND GND AG9
13 MA
C5132
C5055
C5065
TRANSLATION VDDC AB28
F25 GND GND AH21
AF26 VDD_CT VDDC AC17
F27 GND GND AJ10
AF27 VDD_CT VDDC AC20
F29 GND GND AJ11
AG26 VDD_CT VDDC AC22
F31 GND GND AJ2
D NEED TO CHECK POWER TIMING AG27 AC24 D
2
2
VDD_CT VDDC
F33 GND GND AJ28
VDDC AC27
1
F7 AJ6
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
GND GND
VDDC AD18
C5107
C5104
C5091
C5101
C5102
C5096
C5106
F9 GND GND AK11
I/O VDDC AD21
25 MA
AF23 VDDR3 VDDC AD23
G2 GND GND AK31
G6 GND GND AK7
AF24 VDDR3 VDDC AD26
H9 GND GND AL11
AG23 VDDR3 VDDC AF17
J2 AL14
2
GND GND
AG24 VDDR3 VDDC AF20
J27 GND GND AL17
VDDC AF22
J6 GND GND AL2
DVP VDDC AG16
300AD12
MA VDDR4 VDDC AG18
J8 GND GND AL20
K14 GND
AF11 VDDR4
K7 GND GND AL23
AF12 VDDR4 VDDC AH22
P3V3S_DGPU L11 GND GND AL26
AF13 VDDR4 VDDC AH27
L17 GND GND AL32
VDDC AH28
L2 GND GND AL6
1
M26
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
VDDC
L22 GND GND AL8
C5110
C5099
C5100
C5093
C5097
C5105
C5090
L5016 AF15 VDDR4 VDDC N24
L24 GND GND AM11
NEED TO CHECK POWER TIMING 1 2 AG11 VDDR4 VDDC R18
L6 GND GND AM31
AG13 VDDR4 VDDC R21
M17 GND GND AM9
1
AG15 R23
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
C5175
C5176
R26
2
VDDC
M24 GND GND AN2
VDDC T17
N16 GND GND AN30
VDDC T20
N18 GND GND AN6
VDDC T22
N2 GND GND AN8
T24
2
VDDC
N21 GND GND AP11
VDDC U16
N23 GND GND AP7
VDDC U18
N26 GND GND AP9
C VDDC U21
N6 GND GND AR5 C
VDDC U23
R15 GND GND B11
P1V8S_DGPU VDDC U26
1
R17 B13
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
GND GND
VDDC V17
C5127
C5128
C5129
C5130
C5131
C5136
C5133
C5134
C5135
R2 GND GND B15
VDDC V20
R20 GND GND B17
VDDC V22
R22 GND GND B19
VDDC V24
L5013 R24 GND GND B21
VDDC V27
1 2 P1V8S_DGPU_VDDR4 R27 B23
2
GND GND
VDDC Y16
R6 GND GND B25
VDDC Y18
0.1UF_16V_2
1
T11 B27
1UF_6.3V_2
C5098
GND GND
VDDCI AA13
T26 GND GND C1
VDDCI AB13
U15 GND GND C39
VDDCI AC12
U17 GND GND E35
1
1
1
AC15
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
VDDCI
10UF_6.3V
U2 GND GND E5
C5164
C5165
C5158
C5159
VDDCI AD13
U20 GND GND F11
VDDCI AD16
U22 GND GND F13
M15
ISOLATED
VDDCI
U24 GND
M16
CORE I/O
VDDCI
U27 GND
M18
2
2
VDDCI
VOLTAGE U6 GND
VDDCI M23
SENESE V11 GND NC#AG22 AG22
VDDCI N13
V16 GND
AF28 N15
GPU_VCC_SENSE OUT FB_VDDC VDDCI
V18 GND
B VDDCI N17
V21 GND
B
VDDCI N20
V23 GND
NC FOR MARS
1 AG28 FB_VDDCI VDDCI N22
TP5001 V26 GND
VDDCI R12
W2 GND
VDDCI R13
W6 GND
AH29 R16
GPU_VSS_SENSE OUT FB_GND VDDCI
T12
Y15 GND
VDDCI
Y17 GND
VDDCI T15
Y20 GND
VDDCI V15
Y22 GND VSS_MECH A39
VDDCI Y13
Y24 GND VSS_MECH AW1
Y27 GND VSS_MECH AW39
AMD_MARS_M2_FCBGA_962P
I181
AMD_MARS_M2_FCBGA_962P
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
AMD-THAMES-1
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U5001
PART 3 0F 9
GDDR5/DDR3
VM_DQA0_<31..0> BI
VM_MAA0_<0> VM_MAA0_<7..0>
MEMORY INTERFACE A
0 C37 G24 0
1 C35
DQA0_0 MAA0_0/MAA_0
J23 VM_MAA0_<1>
1
BI VM_MAA0_<7..0>
DQA0_1 MAA0_1/MAA_1
2 A35 DQA0_2 MAA0_2/MAA_2 H24 VM_MAA0_<2>
2
3 E34 DQA0_3 MAA0_3/MAA_3 J24 VM_MAA0_<3>
3
4 G32 DQA0_4 MAA0_4/MAA_4 H26 VM_MAA0_<4>
4
D 5 D33 DQA0_5 MAA0_5/MAA_5 J26 VM_MAA0_<5>
5
6 F32 DQA0_6 MAA0_6/MAA_6 H21 VM_MAA0_<6>
6 D
7 E32 DQA0_7 MAA0_7/MAA_7 G21 VM_MAA0_<7>
7
8 D31 DQA0_8 MAA1_0/MAA_8 H19 VM_MAA1_<0>
0 VM_MAA1_<7..0> BI VM_MAA1_<7..0>
9 F30 DQA0_9 MAA1_1/MAA_9 H20 VM_MAA1_<1>
1
10 C30 DQA0_10 MAA1_2/MAA_10 L13 VM_MAA1_<2>
2
11 A30 DQA0_11 MAA1_3/MAA_11 G16 VM_MAA1_<3>
3
12 F28 DQA0_12 MAA1_4/MAA_12 J16 VM_MAA1_<4>
4
13 C28 DQA0_13 MAA1_5/MAA_BA2 H16 VM_MAA1_<5>
5
14 A28 DQA0_14 MAA1_6/MAA_BA0 J17 VM_MAA1_<6>
6
15 E28 DQA0_15 MAA1_7/MAA_BA1 H17 VM_MAA1_<7>
7
16 D27 DQA0_16
17 F26 A32
18 C26
DQA0_17 WCKA0_0/DQMA_0
C32
BI VM_WCKA0_0_DP
19 A26
DQA0_18 WCKA0B_0/DQMA_1
D23
BI VM_WCKA0_0_DN
20 F24
DQA0_19 WCKA0_1/DQMA_2
E22
BI VM_WCKA0_1_DP
21 C24
DQA0_20 WCKA0B_1/DQMA_3
C14
BI VM_WCKA0_1_DN
22 A24
DQA0_21 WCKA1_0/DQMA_4
A14
BI VM_WCKA1_0_DP
23 E24
DQA0_22 WCKA1B_0/DQMA_5
E10
BI VM_WCKA1_0_DN
24 C22
DQA0_23 WCKA1_1/DQMA_6
D9
BI VM_WCKA1_1_DP
25 A22
DQA0_24 WCKA1B_1/DQMA_7 BI VM_WCKA1_1_DN
DQA0_25
26 F22 C34
27 D21
DQA0_26 EDCA0_0/QSA_0
D29
BI VM_EDCA0_0
28 A20
DQA0_27 EDCA0_1/QSA_1
D25
BI VM_EDCA0_1
C 29 F20
DQA0_28 EDCA0_2/QSA_2
E20
BI VM_EDCA0_2 C
30 D19
DQA0_29 EDCA0_3/QSA_3
E16
BI VM_EDCA0_3
31 E18
DQA0_30 EDCA1_0/QSA_4
E12
BI VM_EDCA1_0
0 C18
DQA0_31 EDCA1_1/QSA_5
J10
BI VM_EDCA1_1
VM_DQA1_<31..0> BI
1 A18
DQA1_0 EDCA1_2/QSA_6
D7
BI VM_EDCA1_2
2 F18
DQA1_1 EDCA1_3/QSA_7 BI VM_EDCA1_3
DQA1_2
3 D17 A34
4 A16
DQA1_3 DDBIA0_0/QSA_0B
E30
BI VM_DDBIA0_0
5 F16
DQA1_4 DDBIA0_1/QSA_1B
E26
BI VM_DDBIA0_1
6 D15
DQA1_5 DDBIA0_2/QSA_2B
C20
BI VM_DDBIA0_2
7 E14
DQA1_6 DDBIA0_3/QSA_3B
C16
BI VM_DDBIA0_3
8 F14
DQA1_7 DDBIA1_0/QSA_4B
C12
BI VM_DDBIA1_0
9 D13
DQA1_8 DDBIA1_1/QSA_5B
J11
BI VM_DDBIA1_1
10 F12
DQA1_9 DDBIA1_2/QSA_6B
F8
BI VM_DDBIA1_2
11 A12
DQA1_10 DDBIA1_3/QSA_7B BI VM_DDBIA1_3
DQA1_11
12 D11 J21
13 F10
DQA1_12 ADBIA0/ODTA0
G19
BI VM_ADBIA0 76
14 A10
DQA1_13 ADBIA1/ODTA1 BI VM_ADBIA1 76
DQA1_14
15 C10 H27
16 G13
DQA1_15 CLKA0
G27
OUT VM_CLKA0_DP
17 H13
DQA1_16 CLKA0B OUT VM_CLKA0_DN
DQA1_17
18 J13 J14
DQA1_18 CLKA1 OUT VM_CLKA1_DP
B 19 H11 DQA1_19 CLKA1B H14
OUT VM_CLKA1_DN B
20 G10 DQA1_20
21 G8 K23
22 K9
DQA1_21 RASA0B
K19
OUT VM_RASA0#
23 K10
DQA1_22 RASA1B OUT VM_RASA1#
P1V35S_DGPU P1V35S_DGPU DQA1_23
24 G9 K20
25 A8
DQA1_24 CASA0B
K17
OUT VM_CASA0#
26 C8
DQA1_25 CASA1B OUT VM_CASA1#
DQA1_26
27 E8 K24
OUT VM_CSA0#_0
40.2_1%_2
40.2_1%_2
DQA1_27 CSA0B_0
1
R5102
29 C6 DQA1_29
30 E6 M13
31 A5
DQA1_30 CSA1B_0
K16
OUT VM_CSA1#_0
DQA1_31 CSA1B_1
2
L18 K21
L20
MVREFDA CKEA0
J20
OUT VM_CKEA076
MVREFSA CKEA1 OUT VM_CKEA1 76
1UF_6.3V_2
1
1
100_1%_2
100_1%_2
1UF_6.3V_2
1
R5101
C5038
R5100
C5037
L27 K26
N12
NC#L27 WEA0B
L15
OUT VM_WEA0#
76
AG12
NC#N12 WEA1B OUT VM_WEA1#
76
NC#AG12
2
H23
2
1
R5104
2 M27
MAA0_8/MAA_13
J19
BI VM_MAA0_<8>
MEM_CALRP0 MAA1_8/MAA_14
M21
BI VM_MAA1_<8>
MAA0_9/MAA_15
A 120_1%_2 M12 NC#M12 MAA1_9/RSVD M20 A
AH12 NC#AH12
AMD_MARS_M2_FCBGA_962P
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
AMD-THAMES-4
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 74 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U5001
PART 4 0F 9
VM_DQB0_<31..0> BI
0 C5
GDDR5/DDR3
P8 VM_MAB0_<0>0 VM_MAB0_<7..0>
1 C3
DQB0_0 MAB0_0/MAB_0
T9 VM_MAB0_<1>1
BI VM_MAB0_<7..0>
DQB0_1 MAB0_1/MAB_1
2 E3 DQB0_2 MAB0_2/MAB_2 P9 VM_MAB0_<2>2
3 E1 DQB0_3 MAB0_3/MAB_3 N7 VM_MAB0_<3>3
4 F1 DQB0_4 MAB0_4/MAB_4 N8 VM_MAB0_<4>4
5 F3 DQB0_5 MAB0_5/MAB_5 N9 VM_MAB0_<5>5
6 F5 DQB0_6 MAB0_6/MAB_6 U9 VM_MAB0_<6>6
D 7 G4 DQB0_7 MAB0_7/MAB_7 U8 VM_MAB0_<7>7
8 H5 Y9 VM_MAB1_<0>0 VM_MAB1_<7..0> D
DQB0_8 MAB1_0/MAB_8 BI VM_MAB1_<7..0>
MEMORY INTERFACE B
9 H6 DQB0_9 MAB1_1/MAB_9 W9 VM_MAB1_<1>1
10 J4 DQB0_10 MAB1_2/MAB_10 AC8 VM_MAB1_<2>
2
11 K6 DQB0_11 MAB1_3/MAB_11 AC9 VM_MAB1_<3>
3
12 K5 DQB0_12 MAB1_4/MAB_12 AA7 VM_MAB1_<4>
4
13 L4 DQB0_13 MAB1_5/BA2 AA8 VM_MAB1_<5>
5
14 M6 DQB0_14 MAB1_6/BA0 Y8 VM_MAB1_<6>6
15 M1 DQB0_15 MAB1_7/BA1 AA9 VM_MAB1_<7>
7
16 M3 DQB0_16
17 M5 H3
18 N4
DQB0_17 WCKB0_0/DQMB_0
H1
BI VM_WCKB0_0_DP
19 P6
DQB0_18 WCKB0B_0/DQMB_1
T3
BI VM_WCKB0_0_DN
20 P5
DQB0_19 WCKB0_1/DQMB_2
T5
BI VM_WCKB0_1_DP
21 R4
DQB0_20 WCKB0B_1/DQMB_3
AE4
BI VM_WCKB0_1_DN
22 T6
DQB0_21 WCKB1_0/DQMB_4
AF5
BI VM_WCKB1_0_DP
23 T1
DQB0_22 WCKB1B_0/DQMB_5
AK6
BI VM_WCKB1_0_DN
24 U4
DQB0_23 WCKB1_1/DQMB_6
AK5
BI VM_WCKB1_1_DP
25 V6
DQB0_24 WCKB1B_1/DQMB_7 BI VM_WCKB1_1_DN
DQB0_25
26 V1 F6
27 V3
DQB0_26 EDCB0_0/QSB_0
K3
BI VM_EDCB0_0
28 Y6
DQB0_27 EDCB0_1/QSB_1
P3
BI VM_EDCB0_1
29 Y1
DQB0_28 EDCB0_2/QSB_2
V5
BI VM_EDCB0_2
DQB0_29 EDCB0_3/QSB_3 BI VM_EDCB0_3
C 30 Y3 DQB0_30 EDCB1_0/QSB_4 AB5
BI VM_EDCB1_0 C
31 Y5 AH1
0 AA4
DQB0_31 EDCB1_1/QSB_5
AJ9
BI VM_EDCB1_1
VM_DQB1_<31..0> BI
1 AB6
DQB1_0 EDCB1_2/QSB_6
AM5
BI VM_EDCB1_2
2 AB1
DQB1_1 EDCB1_3/QSB_7 BI VM_EDCB1_3
DQB1_2
3 AB3 G7
4 AD6
DQB1_3 DDBIB0_0/QSB_0B
K1
BI VM_DDBIB0_0
5 AD1
DQB1_4 DDBIB0_1/QSB_1B
P1
BI VM_DDBIB0_1
6 AD3
DQB1_5 DDBIB0_2/QSB_2B
W4
BI VM_DDBIB0_2
7 AD5
DQB1_6 DDBIB0_3/QSB_3B
AC4
BI VM_DDBIB0_3
8 AF1
DQB1_7 DDBIB1_0/QSB_4B
AH3
BI VM_DDBIB1_0
9 AF3
DQB1_8 DDBIB1_1/QSB_5B
AJ8
BI VM_DDBIB1_1
10 AF6
DQB1_9 DDBIB1_2/QSB_6B
AM3
BI VM_DDBIB1_2
11 AG4
DQB1_10 DDBIB1_3/QSB_7B BI VM_DDBIB1_3
DQB1_11
12 AH5 T7
13 AH6
DQB1_12 ADBIB0/ODTB0
W7
BI VM_ADBIB0 77
14 AJ4
DQB1_13 ADBIB1/ODTB1 BI VM_ADBIB1 77
DQB1_14
15 AK3 L9
16 AF8
DQB1_15 CLKB0
L8
OUT VM_CLKB0_DP
17 AF9
DQB1_16 CLKB0B OUT VM_CLKB0_DN
DQB1_17
18 AG8 AD8
19 AG7
DQB1_18 CLKB1
AD7
OUT VM_CLKB1_DP
20 AK9
DQB1_19 CLKB1B OUT VM_CLKB1_DN
DQB1_20
B 21 AL7 T10 B
22 AM8
DQB1_21 RASB0B
Y10
OUT VM_RASB0#
23 AM7
DQB1_22 RASB1B OUT VM_RASB1#
DQB1_23
24 AK1 W10
P1V35S_DGPU P1V35S_DGPU
25 AL4
DQB1_24 CASB0B
AA10
OUT VM_CASB0#
26 AM6
DQB1_25 CASB1B OUT VM_CASB1#
DQB1_26
27 AM1 P10
28 AN4
DQB1_27 CSB0B_0
L10
OUT VM_CSB0#_0
40.2_1%_2
40.2_1%_2
DQB1_28 CSB0B_1
1
29 AP3 DQB1_29
1
R5108
R5005
30 AP1 AD10
31 AP5
DQB1_30 CSB1B_0
AC10
OUT VM_CSB1#_0
DQB1_31 CSB1B_1
2
U10
CKEB0 OUT VM_CKEB077
2
Y12 AA11
AA12
MVREFDB CKEB1 OUT VM_CKEB1 77
MVREFSB
1UF_6.3V_2
1UF_6.3V_2
1
N10
100_1%_2
100_1%_2
C5039
R5006
C5040
AB11
WEB1B OUT VM_WEB1#
77
T8
2
MAB0_8/MAB_13
W8
BI VM_MAB0_<8>
2
MAB1_8/MAB_14
U12
BI VM_MAB1_<8>
MAB0_9/MAB_15
MAB1_9/RSVD V12
R5081 R5041
A AH11 1 2 1 2 A
DRAM_RST OUT DRAM_RST# 76 77
10_5%_2 51_1%_2
4.99K_1%_2
120PF_50V_2
1
AMD_MARS_M2_FCBGA_962P
1
R5080
C5174
INVENTEC
2
2
TITLE
MODEL,PROJECT,FUNCTION
AMD-THAMES-3
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 75 of 78
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
F F
P1V35S_DGPU
P1V35S_DGPU
U5551
U5501
M2 B1
VM_DQA0_<12> BI M2 DQ31|DQ7 VDDQ-B1 B1 VM_DQA1_<14> BI M4
DQ31|DQ7 VDDQ-B1
B3
VM_DQA0_<15> BI M4 DQ30|DQ6 VDDQ-B3 B3 VM_DQA1_<15> BI N2
DQ30|DQ6 VDDQ-B3
B12
VM_DQA0_<14> BI N2 DQ29|DQ5 VDDQ-B12 B12 VM_DQA1_<13> BI DQ29|DQ5 VDDQ-B12
10UF_6.3V_3
N4 B14
VM_DQA1_<12> BI DQ28|DQ4 VDDQ-B14
0.1UF_16V_2
0.1UF_16V_2
10UF_6.3V_3
1
N4 B14
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
VM_DQA0_<13> BI DQ28|DQ4 VDDQ-B14
0.1UF_16V_2
0.1UF_16V_2
1
1
T2 D1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
VM_DQA1_<10> BI DQ27|DQ3 VDDQ-D1
C5556
C5557
C5558
C5559
C5560
T2 D1
VM_DQA0_<11> BI DQ27|DQ3 VDDQ-D1
C5506
C5507
C5508
C5509
C5510
C5561
C5562
T4 D3
VM_DQA0_<9> BI T4 DQ26|DQ2 VDDQ-D3 D3 VM_DQA1_<8> BI U2
DQ26|DQ2 VDDQ-D3
D12
VM_DQA1_<11> BI DQ25|DQ1 VDDQ-D12
C5511
C5512
U2 D12
VM_DQA0_<10> BI U4
DQ25|DQ1 VDDQ-D12
D14 VM_DQA1_<9> BI U4 DQ24|DQ0 VDDQ-D14 D14
VM_DQA0_<8> BI M13
DQ24|DQ0 VDDQ-D14
E5 VM_DQA1_<7> BI M13 DQ23|DQ15 VDDQ-E5 E5
2
VM_DQA0_<7> BI DQ23|DQ15 VDDQ-E5
M11 E10
2
VM_DQA0_<6> BI M11 DQ22|DQ14 VDDQ-E10 E10 VM_DQA1_<4> BI N13
DQ22|DQ14 VDDQ-E10
F1
VM_DQA0_<5> BI N13 DQ21|DQ13 VDDQ-F1 F1 VM_DQA1_<5> BI N11
DQ21|DQ13 VDDQ-F1
F3
VM_DQA0_<4> BI N11 DQ20|DQ12 VDDQ-F3 F3 VM_DQA1_<6> BI T13
DQ20|DQ12 VDDQ-F3
F12
VM_DQA0_<0> BI T13 DQ19|DQ11 VDDQ-F12 F12 VM_DQA1_<1> BI T11
DQ19|DQ11 VDDQ-F12
F14
VM_DQA0_<2> BI T11 DQ18|DQ10 VDDQ-F14 F14 VM_DQA1_<0> BI U13
DQ18|DQ10 VDDQ-F14
G2
VM_DQA0_<1> BI U13 DQ17|DQ9 VDDQ-G2 G2 VM_DQA1_<3> BI U11
DQ17|DQ9 VDDQ-G2
G13
VM_DQA0_<3> BI U11 DQ16|DQ8 VDDQ-G13 G13 VM_DQA1_<2> BI F13
DQ16|DQ8 VDDQ-G13
H3
VM_DQA0_<27> BI F13 DQ15|DQ23 VDDQ-H3 H3 VM_DQA1_<27> BI F11
DQ15|DQ23 VDDQ-H3
H12
VM_DQA0_<29> BI F11 DQ14|DQ22 VDDQ-H12 H12 VM_DQA1_<24> BI E13
DQ14|DQ22 VDDQ-H12
K3
VM_DQA0_<25> BI E13 DQ13|DQ21 VDDQ-K3 K3 VM_DQA1_<26> BI E11
DQ13|DQ21 VDDQ-K3
K12
VM_DQA0_<26> BI E11 DQ12|DQ20 VDDQ-K12 K12 VM_DQA1_<25> BI B13
DQ12|DQ20 VDDQ-K12
L2
E VM_DQA0_<30> BI B13 DQ11|DQ19 VDDQ-L2 L2 VM_DQA1_<31> BI B11
DQ11|DQ19 VDDQ-L2
L13 E
VM_DQA0_<24> BI B11 DQ10|DQ18 VDDQ-L13 L13 VM_DQA1_<28> BI A13
DQ10|DQ18 VDDQ-L13
M1
VM_DQA0_<31> BI A13 DQ9|DQ17 VDDQ-M1 M1 VM_DQA1_<30> BI DQ9|DQ17 VDDQ-M1
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
1
1
A11 M3
1UF_6.3V_2
1UF_6.3V_2
VM_DQA0_<28> BI A11 DQ8|DQ16 VDDQ-M3 M3 VM_DQA1_<29> BI DQ8|DQ16 VDDQ-M3
C5513
C5514
F2 M12
VM_DQA0_<16> BI F2 DQ7|DQ31 VDDQ-M12 M12 VM_DQA1_<16> BI DQ7|DQ31 VDDQ-M12
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
1
1
F4 M14
1UF_6.3V_2
1UF_6.3V_2
VM_DQA1_<17> BI DQ6|DQ30 VDDQ-M14
C5515
C5516
C5517
C5518
F4 M14
VM_DQA0_<18> BI DQ6|DQ30 VDDQ-M14
C5563
C5564
E2 N5
VM_DQA1_<18> BI DQ5|DQ29 VDDQ-N5
C5565
C5566
C5567
C5568
E2 N5
VM_DQA0_<19> BI E4
DQ5|DQ29 VDDQ-N5
N10 VM_DQA1_<19> BI E4 DQ4|DQ28 VDDQ-N10 N10
VM_DQA0_<17> BI DQ4|DQ28 VDDQ-N10
B2 P1
2
VM_DQA0_<22> BI B2 DQ3|DQ27 VDDQ-P1 P1 VM_DQA1_<23> BI B4
DQ3|DQ27 VDDQ-P1
P3
VM_DQA0_<21> BI B4 DQ2|DQ26 VDDQ-P3 P3 VM_DQA1_<20> BI A2
DQ2|DQ26 VDDQ-P3
P12
2
VM_DQA0_<20> BI A2 DQ1|DQ25 VDDQ-P12 P12 VM_DQA1_<22> BI A4
DQ1|DQ25 VDDQ-P12
P14
VM_DQA0_<23> BI A4 DQ0|DQ24 VDDQ-P14 P14 VM_DQA1_<21> BI DQ0|DQ24 VDDQ-P14
T1
VDDQ-T1
VDDQ-T1 T1
VDDQ-T3 T3
VDDQ-T3 T3
VDDQ-T12 T12
VDDQ-T12 T12
VDDQ-T14 T14
VDDQ-T14 T14
J5
VM_MAA0_<8> BI J5 RFU/A12/NC VM_MAA1_<8> BI K4
RFU/A12/NC
C5
74 VM_MAA0_<0> BI K4 A7/A8|A0/A10 VDD-C5 C5 VM_MAA1_<7> BI K5
A7/A8|A0/A10 VDD-C5
C10
74 VM_MAA0_<1> BI K5 A6/A11|A1/A9 VDD-C10 C10 VM_MAA1_<6> BI K10
A6/A11|A1/A9 VDD-C10
D11
74 VM_MAA0_<3> BI K10 A5/BA1|A3/BA3 VDD-D11 D11 VM_MAA1_<5> BI K11
A5/BA1|A3/BA3 VDD-D11
G1
74 VM_MAA0_<2> BI K11 A4/BA2|A2/BA0 VDD-G1 G1 VM_MAA1_<4> BI H10
A4/BA2|A2/BA0 VDD-G1
G4
74 VM_MAA0_<5> BI H10 A3/BA3|A5/BA1 VDD-G4 G4 VM_MAA1_<3> BI H11
A3/BA3|A5/BA1 VDD-G4
G11
74 VM_MAA0_<4> BI H11 A2/BA0|A4/BA2 VDD-G11 G11 VM_MAA1_<2> BI H5
A2/BA0|A4/BA2 VDD-G11
G14
74 VM_MAA0_<6> BI H5 A1/A9|A6/A11 VDD-G14 G14 VM_MAA1_<1> BI H4
A1/A9|A6/A11 VDD-G14
L1
74 VM_MAA0_<7> BI H4 A0/A10|A7/A8 VDD-L1 L1 VM_MAA1_<0> BI A0/A10|A7/A8 VDD-L1
L4
VDD-L4
VDD-L4 L4
VDD-L11 L11
D VDD-L11 L11
VDD-L14 L14 D
VDD-L14 L14
D4 P11
VM_WCKA0_1_DP BI D4 WCK01|WCK23 VDD-P11 P11 VM_WCKA1_1_DP BI D5
WCK01|WCK23 VDD-P11
R5
VM_WCKA0_1_DN BI D5 WCK01#|WCK23# VDD-R5 R5 VM_WCKA1_1_DN BI WCK01#|WCK23# VDD-R5
R10
VDD-R10
VDD-R10 R10
P4
VM_WCKA0_0_DP BI P4 WCK23|WCK01 VM_WCKA1_0_DP BI P5
WCK23|WCK01
2 R5556 1
2 R5557 1
E12
60.4_1%_2
60.4_1%_2
VSSQ-E12
2 R5506 1
2 R5507 1
G3 E14
60.4_1%_2
60.4_1%_2
1UF_6.3V_2_DY
1UF_6.3V_2_DY
1UF_6.3V_2_DY
MF VSSQ-R14
1 2 J1 R14
1UF_6.3V_2_DY
1UF_6.3V_2_DY
1UF_6.3V_2_DY
2.37K_1%_2
2.37K_1%_2
2.37K_1%_2
MF VSSQ-R14
1
1K_5%_2 U1
2.37K_1%_2
2.37K_1%_2
2.37K_1%_2
VSSQ-V1
1
R5555
C5555
R5554
C5554
R5553
C5553
R5510 VSSQ-V3 U3
R5505
C5505
R5504
C5504
R5503
C5503
VSSQ-V3 U3
VSSQ-V12 U12
VSSQ-V12 U12
VSSQ-V14 U14
VSSQ-V14 U14
A5 Vpp,NC
A5 Vpp,NC
U5
2
2
Vpp,NC1
U5
2
Vpp,NC1
VSS-B5 B5
B5
VVM_REFD1_A0 A10
VSS-B5
B10
VVM_REFD1_MA0 A10 VREFD1 VSS-B10 B10
VVM_REFD2_A0 U10
VREFD1 VSS-B10
D10
VVM_REFD2_MA0 U10 VREFD2 VSS-D10 D10
VVM_REFC_A0
VREFD2 VSS-D10
G5
VVM_REFC_MA0 VSS-G5 G5
VSS-G5
VSS-G10 G10
VSS-G10 G10
H1
5.49K_1%_2
5.49K_1%_2
5.49K_1%_2
VSS-H1
1
1
H1
5.49K_1%_2
5.49K_1%_2
5.49K_1%_2
VSS-H1
1
H14
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
VSS-H14
R5552
C5552
R5551
C5551
R5550
C5550
H14 1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
VSS-H14
R5502
C5502
R5501
C5501
R5500
C5500
VSS-K1 K1
VSS-K1 K1
J14 VREFC VSS-K14 K14
J14 VREFC VSS-K14 K14
VSS-L5 L5
B VSS-L5 L5
VSS-L10 L10 B
L10
2
2
VSS-L10
P10
2
VSS-P10
VSS-P10 P10
J4 T5
VM_ADBIA0 BI J4 ABI# VSS-T5 T5 VM_ADBIA1 BI ABI# VSS-T5
T10
VSS-T10
VSS-T10 T10
SAM_K4G20325FD_FC04_BGA_170P
SAM_K4G20325FD_FC04_BGA_170P
MIRROR
MF=1
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
VRAM-1
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
F F
P1V35S_DGPU P1V35S_DGPU
U5601 U5651
M2 B1 M2 B1
VM_DQB0_<9> BI M4
DQ31|DQ7 VDDQ-B1
B3
VM_DQB1_<15> BI M4
DQ31|DQ7 VDDQ-B1
B3
VM_DQB0_<15> BI N2
DQ30|DQ6 VDDQ-B3
B12
VM_DQB1_<14> BI N2
DQ30|DQ6 VDDQ-B3
B12
VM_DQB0_<8> BI DQ29|DQ5 VDDQ-B12
VM_DQB1_<13> BI DQ29|DQ5 VDDQ-B12
10UF_6.3V_3
10UF_6.3V_3
N4 B14 N4 B14
VM_DQB0_<13> BI DQ28|DQ4 VDDQ-B14
VM_DQB1_<8> BI DQ28|DQ4 VDDQ-B14
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
T2 D1 T2 D1
VM_DQB0_<14> BI DQ27|DQ3 VDDQ-D1
VM_DQB1_<12> BI DQ27|DQ3 VDDQ-D1
C5606
C5607
C5608
C5609
C5610
C5656
C5657
C5658
C5659
C5660
T4 D3 T4 D3
VM_DQB0_<12> BI U2
DQ26|DQ2 VDDQ-D3
D12
VM_DQB1_<9> BI U2
DQ26|DQ2 VDDQ-D3
D12
VM_DQB0_<10> BI U4
DQ25|DQ1 VDDQ-D12
D14
VM_DQB1_<11> BI U4
DQ25|DQ1 VDDQ-D12
D14
VM_DQB0_<11> BI M13
DQ24|DQ0 VDDQ-D14
E5
VM_DQB1_<10> BI M13
DQ24|DQ0 VDDQ-D14
E5
VM_DQB0_<7> BI DQ23|DQ15 VDDQ-E5
VM_DQB1_<1> BI DQ23|DQ15 VDDQ-E5
2
M11 E10 M11 E10
VM_DQB0_<6> BI N13
DQ22|DQ14 VDDQ-E10
F1
VM_DQB1_<4> BI N13
DQ22|DQ14 VDDQ-E10
F1
VM_DQB0_<5> BI N11
DQ21|DQ13 VDDQ-F1
F3
VM_DQB1_<7> BI N11
DQ21|DQ13 VDDQ-F1
F3
VM_DQB0_<4> BI T13
DQ20|DQ12 VDDQ-F3
F12
VM_DQB1_<6> BI T13
DQ20|DQ12 VDDQ-F3
F12
VM_DQB0_<3> BI T11
DQ19|DQ11 VDDQ-F12
F14
VM_DQB1_<3> BI T11
DQ19|DQ11 VDDQ-F12
F14
VM_DQB0_<2> BI U13
DQ18|DQ10 VDDQ-F14
G2
VM_DQB1_<5> BI U13
DQ18|DQ10 VDDQ-F14
G2
VM_DQB0_<0> BI U11
DQ17|DQ9 VDDQ-G2
G13
VM_DQB1_<0> BI U11
DQ17|DQ9 VDDQ-G2
G13
VM_DQB0_<1> BI F13
DQ16|DQ8 VDDQ-G13
H3
VM_DQB1_<2> BI F13
DQ16|DQ8 VDDQ-G13
H3
VM_DQB0_<24> BI F11
DQ15|DQ23 VDDQ-H3
H12
VM_DQB1_<26> BI F11
DQ15|DQ23 VDDQ-H3
H12
VM_DQB0_<28> BI E13
DQ14|DQ22 VDDQ-H12
K3
VM_DQB1_<24> BI E13
DQ14|DQ22 VDDQ-H12
K3
VM_DQB0_<27> BI DQ13|DQ21 VDDQ-K3
VM_DQB1_<27> BI DQ13|DQ21 VDDQ-K3
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
1
1
E11 K12 E11 K12
1UF_6.3V_2
1UF_6.3V_2
E VM_DQB0_<25> BI DQ12|DQ20 VDDQ-K12
VM_DQB1_<25> BI DQ12|DQ20 VDDQ-K12
E
C5614
B13 L2 B13 L2
VM_DQB0_<30> BI DQ11|DQ19 VDDQ-L2
VM_DQB1_<29> BI DQ11|DQ19 VDDQ-L2
0.1UF_16V_2
0.1UF_16V_2
C5613
C5615
C5616
C5617
C5618
C5611
C5612
1
1UF_6.3V_2
1UF_6.3V_2
B11 L13 B11 L13
VM_DQB0_<31> BI DQ10|DQ18 VDDQ-L13
VM_DQB1_<30> BI DQ10|DQ18 VDDQ-L13
C5663
C5664
C5661
C5662
A13 M1 A13 M1
VM_DQB0_<29> BI A11
DQ9|DQ17 VDDQ-M1
M3
VM_DQB1_<31> BI A11
DQ9|DQ17 VDDQ-M1
M3
VM_DQB0_<26> BI F2
DQ8|DQ16 VDDQ-M3
M12
VM_DQB1_<28> BI F2
DQ8|DQ16 VDDQ-M3
M12
2
VM_DQB0_<17> BI F4
DQ7|DQ31 VDDQ-M12
M14
VM_DQB1_<18> BI F4
DQ7|DQ31 VDDQ-M12
M14
VM_DQB0_<16> BI DQ6|DQ30 VDDQ-M14
VM_DQB1_<16> BI DQ6|DQ30 VDDQ-M14
2
E2 N5 E2 N5
VM_DQB0_<18> BI E4
DQ5|DQ29 VDDQ-N5
N10
VM_DQB1_<19> BI E4
DQ5|DQ29 VDDQ-N5
N10
VM_DQB0_<20> BI B2
DQ4|DQ28 VDDQ-N10
P1
VM_DQB1_<17> BI B2
DQ4|DQ28 VDDQ-N10
P1
VM_DQB0_<21> BI B4
DQ3|DQ27 VDDQ-P1
P3
VM_DQB1_<23> BI B4
DQ3|DQ27 VDDQ-P1
P3
VM_DQB0_<23> BI A2
DQ2|DQ26 VDDQ-P3
P12
VM_DQB1_<22> BI A2
DQ2|DQ26 VDDQ-P3
P12
VM_DQB0_<19> BI A4
DQ1|DQ25 VDDQ-P12
P14
VM_DQB1_<21> BI A4
DQ1|DQ25 VDDQ-P12
P14
VM_DQB0_<22> BI DQ0|DQ24 VDDQ-P14
T1
VM_DQB1_<20> BI DQ0|DQ24 VDDQ-P14
T1
VDDQ-T1 VDDQ-T1
VDDQ-T3 T3 VDDQ-T3 T3
VDDQ-T12 T12 VDDQ-T12 T12
VDDQ-T14 T14 VDDQ-T14 T14
J5 J5
VM_MAB0_<8> BI RFU/A12/NC
VM_MAB1_<8> BI RFU/A12/NC
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
1
1
K4 C5 K4 C5
VM_MAB0_<0> BI A7/A8|A0/A10 VDD-C5
VM_MAB1_<7> BI A7/A8|A0/A10 VDD-C5
C5665
C5666
C5667
C5668
K5 C10 K5 C10
VM_MAB0_<1> BI K10
A6/A11|A1/A9 VDD-C10
D11
VM_MAB1_<6> BI K10
A6/A11|A1/A9 VDD-C10
D11
VM_MAB0_<3> BI K11
A5/BA1|A3/BA3 VDD-D11
G1
VM_MAB1_<5> BI K11
A5/BA1|A3/BA3 VDD-D11
G1
VM_MAB0_<2> BI H10
A4/BA2|A2/BA0 VDD-G1
G4
VM_MAB1_<4> BI H10
A4/BA2|A2/BA0 VDD-G1
G4
VM_MAB0_<5> BI A3/BA3|A5/BA1 VDD-G4
VM_MAB1_<3> BI A3/BA3|A5/BA1 VDD-G4
2
H11 G11 H11 G11
VM_MAB0_<4> BI H5
A2/BA0|A4/BA2 VDD-G11
G14
VM_MAB1_<2> BI H5
A2/BA0|A4/BA2 VDD-G11
G14
VM_MAB0_<6> BI H4
A1/A9|A6/A11 VDD-G14
L1
VM_MAB1_<1> BI H4
A1/A9|A6/A11 VDD-G14
L1
VM_MAB0_<7> BI A0/A10|A7/A8 VDD-L1
L4
VM_MAB1_<0> BI A0/A10|A7/A8 VDD-L1
L4
VDD-L4 VDD-L4
D VDD-L11 L11 VDD-L11 L11 D
VDD-L14 L14 VDD-L14 L14
D4 P11 D4 P11
VM_WCKB0_1_DP BI D5
WCK01|WCK23 VDD-P11
R5
VM_WCKB1_1_DP BI D5
WCK01|WCK23 VDD-P11
R5
VM_WCKB0_1_DN BI WCK01#|WCK23# VDD-R5
R10
VM_WCKB1_1_DN BI WCK01#|WCK23# VDD-R5
R10
VDD-R10 VDD-R10
P4 P4
VM_WCKB0_0_DP BI P5
WCK23|WCK01
VM_WCKB1_0_DP BI P5
WCK23|WCK01
VM_WCKB0_0_DN BI WCK23#|WCK01#
A1
VM_WCKB1_0_DN BI WCK23#|WCK01#
A1
VSSQ-A1 VSSQ-A1
R2 A3 R2 A3
VM_EDCB0_1 BI R13
EDC3|EDC0 VSSQ-A3
A12
VM_EDCB1_1 BI R13
EDC3|EDC0 VSSQ-A3
A12
VM_EDCB0_0 BI C13
EDC2|EDC1 VSSQ-A12
A14
VM_EDCB1_0 BI C13
EDC2|EDC1 VSSQ-A12
A14
VM_EDCB0_3 BI C2
EDC1|EDC2 VSSQ-A14
C1
VM_EDCB1_3 BI C2
EDC1|EDC2 VSSQ-A14
C1
VM_EDCB0_2 BI EDC0|EDC3 VSSQ-C1
C3
VM_EDCB1_2 BI EDC0|EDC3 VSSQ-C1
C3
VSSQ-C3 VSSQ-C3
P2 C4 P2 C4
VM_DDBIB0_1 BI P13
DBI3#|DBI0# VSSQ-C4
C11
VM_DDBIB1_1 BI P13
DBI3#|DBI0# VSSQ-C4
C11
VM_DDBIB0_0 BI D13
DBI2#|DBI1# VSSQ-C11
C12
VM_DDBIB1_0 BI D13
DBI2#|DBI1# VSSQ-C11
C12
VM_DDBIB0_3 BI D2
DBI1#|DBI2# VSSQ-C12
C14
VM_DDBIB1_3 BI D2
DBI1#|DBI2# VSSQ-C12
C14
P1V35S_DGPU VM_DDBIB0_2 BI DBI0#|DBI3# VSSQ-C14
E1 P1V35S_DGPU VM_DDBIB1_2 BI DBI0#|DBI3# VSSQ-C14
E1
VSSQ-E1 VSSQ-E1
VSSQ-E3 E3 VSSQ-E3 E3
VSSQ-E12 E12 VSSQ-E12 E12
2 R5606 1
2 R5607 1
2 R5657 1
60.4_1%_2
60.4_1%_2
60.4_1%_2
60.4_1%_2
G3 E14 G3 E14
VM_CASB0# IN RAS#|CAS# VSSQ-E14
VM_RASB1# IN RAS#|CAS# VSSQ-E14
R5656
L3 F5 L3 F5
VM_RASB0# IN CAS#|RAS# VSSQ-F5
VM_CASB1# IN CAS#|RAS# VSSQ-F5
VSSQ-F10 F10 VSSQ-F10 F10
VSSQ-H2 H2 VSSQ-H2 H2
J3 H13 J3 H13
VM_CKEB0 IN CKE# VSSQ-H13
VM_CKEB1 IN CKE# VSSQ-H13
2
J11 K2 J11 K2
VM_CLKB0_DN IN J12
CK# VSSQ-K2
K13
VM_CLKB1_DN IN J12
CK# VSSQ-K2
K13
C VM_CLKB0_DP IN CK VSSQ-K13
M5
VM_CLKB1_DP IN CK VSSQ-K13
M5 C
VSSQ-M5 VSSQ-M5
VSSQ-M10 M10 VSSQ-M10 M10
G12 N1 G12 N1
VM_WEB0# IN CS#|WE# VSSQ-N1
VM_CSB1#_0 IN CS#|WE# VSSQ-N1
L12 N3 L12 N3
VM_CSB0#_0 IN WE#|CS# VSSQ-N3
VM_WEB1# IN WE#|CS# VSSQ-N3
R5608 VSSQ-N12 N12 VSSQ-N12 N12
120_1%_2 N14 P1V35S_DGPU P1V35S_DGPU P1V35S_DGPU R5658 N14
P1V35S_DGPU P1V35S_DGPU P1V35S_DGPU VSSQ-N14 VSSQ-N14
1 2 J13 ZQ VSSQ-R1 R1 1 2 J13 ZQ VSSQ-R1 R1
1 2 J10 SEN VSSQ-R3 R3 120_1%_2 1 2J10 SEN VSSQ-R3 R3
1K_5%_2 VSSQ-R4 R4 1K_5%_2 VSSQ-R4 R4
R5609 R11 R5659 R11
VSSQ-R11 VSSQ-R11
J2 R12 J2 R12
DRAM_RST# IN
1 2 J1
RESET# VSSQ-R12
R14
DRAM_RST#
1
IN 2 J1
RESET# VSSQ-R12
R14
1UF_6.3V_2_DY
1UF_6.3V_2_DY
1UF_6.3V_2_DY
MF VSSQ-R14 MF VSSQ-R14
1UF_6.3V_2_DY
1UF_6.3V_2_DY
1UF_6.3V_2_DY
P1V35S_DGPU
2.37K_1%_2
2.37K_1%_2
2.37K_1%_2
1
1
1K_5%_2 U1 1K_5%_2 U1
2.37K_1%_2
2.37K_1%_2
2.37K_1%_2
VSSQ-V1 VSSQ-V1
1
R5610 R5660
R5655
C5655
R5654
C5654
R5653
C5653
VSSQ-V3 U3 VSSQ-V3 U3
R5605
C5605
R5604
C5604
R5603
C5603
2
Vpp,NC1 Vpp,NC1
2
VSS-B5 B5 VSS-B5 B5
VVM_REFD1_A1 A10 VREFD1 VSS-B10 B10 VVM_REFD1_MA1 A10 VREFD1 VSS-B10 B10
VVM_REFD2_A1 U10 VREFD2 VSS-D10 D10 VVM_REFD2_MA1 U10 VREFD2 VSS-D10 D10
VVM_REFC_A1 VSS-G5 G5 VVM_REFC_MA1 VSS-G5 G5
VSS-G10 G10 VSS-G10 G10
H1 H1
5.49K_1%_2
5.49K_1%_2
5.49K_1%_2
VSS-H1 VSS-H1
1
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
5.49K_1%_2
5.49K_1%_2
5.49K_1%_2
1
H14 H14
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
VSS-H14 VSS-H14
R5652
C5652
R5651
C5651
R5650
C5650
R5602
C5602
R5601
C5601
R5600
C5600
VSS-K1 K1 VSS-K1 K1
J14 VREFC VSS-K14 K14 J14 VREFC VSS-K14 K14
B VSS-L5 L5 VSS-L5 L5 B
VSS-L10 L10 VSS-L10 L10
2
2
P10 P10
2
VSS-P10 VSS-P10
J4 T5 J4 T5
VM_ADBIB0 BI ABI# VSS-T5
T10
VM_ADBIB1 BI ABI# VSS-T5
T10
VSS-T10 VSS-T10
SAM_K4G20325FD_FC04_BGA_170P SAM_K4G20325FD_FC04_BGA_170P
MIRROR
MF=1
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
VRAM-2
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
C C
B B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
CHANGE by XXX DATE 21-OCT-2002 SHEET 78 of 78
8 7 6 5 4 3 2 1