HP Elitebook Folio 9470m 6050A2514101

8 7 6 5 4 3 2 1
THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC

CORPORATION AND SHALL NOT BE REPODUCED,COPIED,OR USED IN WHOLE OR
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT
WRITTEN PERMISSION,INVENTEC CORPORATION, 2012 ALL RIGHT RESERVED.
F HSF Property:ROHS or Halogen-Free F
E E
D
BANDIT M2 HD+ D
MV BUILD
2013.01.04
C C
B B
A A
DRAWER
DESIGN
XXX
XXX
EE DATE
21-OCT-2002
21-OCT-2002
POWER
IRAY CHEN
IRAY CHEN
DATE
21-OCT-2002
21-OCT-2002
INVENTEC
CHECK XXX 21-OCT-2002 IRAY CHEN 21-OCT-2002 TITLE MODEL,PROJECT,FUNCTION
RESPONSIBLE XXX 21-OCT-2002 IRAY CHEN 21-OCT-2002 ULTRABOOK MAIN BOARD
SIZE= A3 VER: A02 SIZE CODE DOC.NUMBER REV
2012/09/10 2012-ECO-017507 A FILE NAME:BANDIT-MB-1310A2514101 A3 CS 1310xxxxx-0-0 X01
DATE CHANGE NO. REV P/N 6050A2514101 SHEET 1 of 80
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
TABLE OF CONTENTS D
23. IVY BRIDGE_1 (CLK,MISC,JTAG) 47. KEYBOARD

1. PROJECT NAME
24. IVY BRIDGE_2 (POWER) 48. TPM
2. TABLE OF CONTENTS
25. IVY BRIDGE_3 (DMI,DP,PEG,FDI) 49. LAN INTERFACE
3. BLOCK DIAGRAM
4. SYSTEM POWER FLOW 26. IVY BRIDGE_4 (DDR3) 50. LAN RJ45 CNTR
5. SYSTEM POWER(CHARGER) 27. IVY BRIDGE_5 (GRAPHICS POWER) 51. WLAN
6. SYSTEM POWER(BATT SELECTOR) 28. IVY BRIDGE_6 (GND,RESERVED) 52. WWAN & SIM CARD
C C
7. SYSTEM POWER(OCP) 29. DDR3_SO-DIMM0 53. DOCKING CNTR
8. SYSTEM POWER(P3V3A&P5V0A) 30. DDR3_SO-DIMM1 54. STICK POINT & B2B CNTR
8. SYSTEM POWER(P5V0A _CHG 31. PANTER POINT_1 (HDA,JTAG,SPI,SATA) 55. CODEC
10. SYSTEM POWER(P1V5) 32. PANTER POINT_2 (PCI-E,SMBUS,CLK) 56. EXT MIC AMP
11. SYSTEM POWER(P1V05M) 33. PANTER POINT_3 (DMI,FDI,GPIO) 57. JACK & USB3 CNTR
12. SYSTEM POWER(P1V05S) 34. PANTER POINT_4 (LVDS,DDI) 58. CARD READER
13. SYSTEM POWER(P1V8S) 35. PANTER POINT_5 (PCI,USB,NVRAM) 59. BUTTON LED
B 14. SYSTEM POWER(PVSA) 36. PANTER POINT_6 (GPIO,VSS_NCFT,RSVD) 60. SMART VARD & LED DB B
15. SYSTEM POWER(PVCORE1) 37. PANTER POINT_7 (POWER) 61. MIC DB

16. SYSTEM POWER(PVCORE2) 38. PANTER POINT_8 (POWER) 62. SCREW
17. POWER TEST POINT 39. PANTER POINT_9 (GND) 63. EMI & RF SOLUTION
18. POWER PAD 40. CRT / DISPLAY PORT CNTR 64. SYSTEM SEQUENCE
19. POWER(SLEEP) 41. LCM & WEBCAM
20. POWER(SEQUENCE) 42. SATA & MSATA CNTR
21. XDP CONN 43. USB CNTR & USB CHARGER
A 22. FAN & THERMAL 44. FINGER PRINTER CNTR A
45. ACCELEMETOR
46. KBC / SPI
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
TABLE OF CONTENTS
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0
A3 CS X01
CHANGE by XXX DATE 21-OCT-2002 SHEET 2 of 80
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PRIMARY LI-LON BATTERY
SECOND LI-LON BATTERY CRT R.G.B 1666MT/S DDR3_SODIMM

D IVY BRIDGE D
ULV BGA1023
THERMAL SENSOR 31MM X 24MM 1666MT/S DDR3_SODIMM
SMSC_EMC1412 LED PANEL LVDS
SATA0
ACCELEROMETER HDD(GEN3)
ST_HP3DC2TR
DISPLAY PORT SATA SATA2
FDI/DMI MSATA
DDP
C C
HDA AUDIO CODEC
DISPLAY PORT X 2 IDT 92HD91WC
(DOCKING)
PCH
PANTHER POINT QM77
USB3.0
25MM X 25MM
PCIE3 PCIE
MEDIA CARD CONTROLLER USB2.0
LPC
PCIE4 USB0 - DOCKING USB5 - BLUETOOTH USB1 - DOCKING
B WLAN B
PCIE6 USB1 - CHARGER USB7 - SMART CARD USB2 - LEFT

RJ45 GBE PHY KBC TPM1.2
SMSC 1126 SLB9635
INTEL 82579LM
USB2 - RIGHT 1 USB8 - FINGER USB3 - RIGHT 1
USB3 - RIGHT2 USB10 - CAMERA USB4 - RIGHT 2

KEYBOARD TOUCH PAD SPI 16MB POINT STICK
USB12- WWAN
A A
DOCKING CONNECTOR
USB3.0 PORT X 4 LINE IN/LINE OUT RJ-45 DP1.2 VGA INVENTEC

TITLE
BLOCK DIAGRAM
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 X01
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SLP_S3#_3R P1V8S
RICHTEK
P5V0A_CHG 8086AZQW
SLP_S3#_3R
PVSA
ADP_EN ADP_PRES 5/3.3V TPS51463
LIMIT_SIGNAL P3V3ALW
OCP OCP_OC#
KBC_PW_ON (TPS51123)
P5V0AL P5V0S
SLP_S3#_3R SLP_S3#_3R
D P3V3AL
EN0 AO6402AL D
ICS
PM_SLP_A_# P1V05M
RICHTEK
8086AZQW
CHARGER_DAT
ADAPTER CHARGER SPWON
CHARGER_CLK P3V3S
(65W) BQ24736 AO6402AL
EN_P3V3A
FDC638APZ P3V3A
C C
SLP_LAN#
FDC638APZ P3V3M
2ND BATTERY MAIN BATTERY

WWWAM_OFF
FDC638APZ PVSIM
PVBAT DDR3 / 1.5V

DDR3L/1.35V
SLP_S4#_3R
TPS51216
P1V5
KBC_GPIO22 P1V5S
B SLP_S4#_KBC SPWON FDMS7692 B
VCCP
VCCP_PG
P1V8S
GMT TPS51219
P1V5S_LDO EN_VCCP
SLP_S3#_3R G966A
A A
PVAXG
IMVP VI
PVCORE
EN_CPU ISL95833 INVENTEC
VGATE
TITLE
BLOCK DIAGRAM POWER
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVADPTR IN PVADPTR_IN 65
17
OUT VADPBL 7 17
L6015 CN6000
Q6010 NFE31PT222Z1E9L 1 1
D S
8 8 1 1 1 2 2 2
7 7 2 2 3 3 G G1
6 3 4 G2
100K_5%_2 220K_5%_2
0.1UF_16V_2
6 3 4 G
2
5 4 5
R6017
C6019
4
3
5 4 5
G 6
1000PF_50V_2
1000PF_50V_2
SEM_SM24_SOT23_3P
100PF_50V_2
100PF_50V_2
6
D6015
FAIR_FDMC4435BZ_8P
C6017
C6015
ACES_50224_0060N_001_6P
C6018
C6016
2
2
3
1
D R6015
2
D
3
OUT LIMIT_SIGNAL 755
3 2
Q6009 PVPACK
D
1 FAIR_FDMC4435BZ_8P
48 ADP_EN IN G
4 G 5
4 5
S
3 3 6 6
SSM3K7002FU 2 7
2 7
2
1 8
1
S D
8 PVBAT
Q6012
Q6011 R6000
1 S D 8 1 2
2 7 3 4
3 6
4 G 5 0.01_1%_6
NMOS_4D3S
POWERPAD_2_0610
C6028
4.3K_5%_2
AON7410 1 2
4.3K_5%_2
1
2
1
1
BAT54WS
0.1UF_16V_2
PAD6015
R6018
C C
1
D6017
R6028
2
2
CSC0402_DY
2
1
2
1UF_25V_3
2
1
C6029
C6030
17 PVBAT_IN IN
2
1
948 VADP_DEBUG IN IN PVBAT_CHG
5
6
7
8
10UF_25V_5
10UF_25V_5
1
1
10_5%_5
C6000
C6001
R6027
Q6000
D
AON7410
NMOS_4D3S
48 ADP_DET OUT
1
5
4
3
2
2
G
ACPRES
ACDRV
CMSRC
ACP
ACN
S
C6027
U6000 1UF_25V_3 PVPACK
21 2 1
4
3
2
1
TML
TI_BQ24736RGRR_QFN_20P
B 6 B
P5V0S PVADPTR P3V3AL ACDET
VCC 20 L6000 R6001
7 IOUT
PHASE 19 1 2 1 2
18.2K_1%_2
8 SDA 18 R6026 C6026 3 4

22K_5%_2
9 HIDRV
1
ETQP3W4R7WFN
2
SCL
127K_1%
17 1 2 1 2
1
R6021
10 BTST
1
R6024
R6029
ILIM 16
REGN 0.02_1%_6
B0530W_7
10UF_25V_5
10UF_25V_5
LODRV
1
5
6
7
8
RSC_0603_DY
0_5%_2 0.047UF_16V_2
D6049
C6010
C6011
DLIM
GND
SRN
SRP
R7600
D6018 D6016
Q6001
D
R6022
AON7410
2
NMOS_4D3S
1
1UF_10V_2
2 1 1 2 2 1
1
C6023
2
2 1
C6025
1 2
11
12
13
14
15
3
1M_5%_2
2
1SS355VMTE_17 Q6019
2
1
1
10K_1%_2
ACDET>0.6V:SMBUS OK
C6022
BAT54WS 0.1UF_16V_2
20K_1%_2
1
R6030
100PF_50V_2
1
S
ACDET>2.4V&<3.1V:ACOK
R6023
0.1UF_25V_2
0.1UF_25V_2
C7600
48 CHG_RST IN G
1
2
0.01UF_50V_2
C6024
C6021
1
4
3
2
1
S
100PF_50V_2
C6048
C6049
SSM3K7002FU CSC0402_DY
2
2
2
2
2
R6025
1 2
OUT 7 ICS
A 0_5%_2
R6020 A
48 1 2
CHARGER_DAT
BI
48 BI
CHARGER_CLK 0_5%_2
7 CHR_ILIM IN
R6049
7 1 2
V_3.9K IN
0.01UF_50V_2
1
0_5%_2
C6047
INVENTEC
2
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P3V3AL
PHP_PESD5V0S1BB_SOD523_2P
D7504
D7505
D7506
1
1
100PF_50V_2
0.1UF_25V_2
100PF_50V_2
100PF_50V_2
2
1
C7502
1
1
C7500
C7501
C7524
1
2K_1%_2
1
2K_1%_2
R6050
R6052
D6050
PVBATA
2
2
1
PVPACK 1 2
2
2
2
2
C SBR3M30P1_7 48 SDA_MAIN BI CN6050 C
48 R6051 G2 G2
Q6050 Q6051 SCL_MAIN BI G1 G1
1 S D 8 8 D S 1 100_5%_2
1 8 8 1 8 8 POWER
2 7 7 2
220K_5%_2
2 7 7 2 7 7 POWER
1
3 6 6 3 1 2
R6079
3 6 6 3 6 6
4 4 5 5 5 5 4 4 1 2 5 5
470K_5%_2
G G
4 4
1
R6064 R6053 1 R6057 2
FAIR_FDMC4435BZ_8P FAIR_FDMC4435BZ_8P 3 3
100_5%_2
1K_5%_2 2 2 GND
1 2
1 1 GND
100PF_50V_2
1
100_5%_2
P3V3AL
1
R6080
0_5%_2
P3V3AL FOX_BP0208C_B25AAD1_9H_8P
R6055
3 2
2
OUT MFET_A 65
C7503
R6099
2 1 1 2
2
IN
100K_5%_2
MFET_B
D7503
2
1
3
D6058 100_5%_2 OUT OCP_MAIN#
BAV99W_7_F
BAV99W_7_F
BATTERY OCP PWM#
R6058
R6097
1 2
1
B B
0_5%_2
Q6053
S1 1
2 OUT MAIN_BAT_DET# 48
48 FET_A IN G1
6
D1 3
D2
48 5 G2
LATCHED_ALARM OUT 4
S2
2N7002DW
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R6933
17 5 VADPBL 1 2
IN
255K_1%_2
200K_1%_2
P5V0AL P3V3AL
1
R6931
47K_5%_2
2
R6935
D
2
D
8
V+
3 U6903
++IN
1
1
-
OUT OUT ADP_PRES 48
2 -IN
41.2K_1%_3
CSC0402_DY
1
P5V0S
22K_5%_2
V-
1
R6930
TI_LMV393IDGKR_SOP_8P
R6934
C6906
4
R6920 C6904
1 2 1 2
665K_1%_2 1UF_10V_2
2
P5V0S
2
R6922 U6902
1 2 1 IN+ VCC 5
200K_1%_2
0.1UF_16V_2
IN 7 8 920 200K_1%_2
1
2VREF
R6924
C6903
2 VEE
2
2 1 3 4
OCP_MAIN# IN IN- OUTPUT
1
R6925
2K_5%_2
1M_1%_2
R6923
118K_1%_2 BCD_AZV321KTR_E1_SOT23_5P
C C
R6919
R6913 2 1
0.22UF_6.3V_2
1 2
OCP_TRAVEL# IN
5 ICS IN OUT CURRENT_ADC 48 R6921
118K_1%_2
2
1
46.4K_1%_2
C6900
20
LIMIT_SIGNAL_100R OUT D6902
BAV70W_7_F
R6918 Q6902
2
55 1 2 2 3 1 2
LIMIT_SIGNAL IN S D
100_5%_2
3
1
20 VBIAS IN
LES_LBSS84LT1G_SOT23_3P
5 V_3.9K OUT
1
100_5%_2
3900PF_16V_2
R6917
100K_5%_2
3.9K_5%_2
1
1
R6916
C6902
R6915
B B
12
OUT OCP_A_IN 48
1 2
P3V3AL
UDZV4.7B
D6901
R6914
B
2 1 3 C E 2
PVPACK 7 8 920 P3V3AL
IN 2VREF 47K_5%_2
Q6901
100K_5%_2
200K_1%_2
P5V0AL LMBT3904WT1G
1
1
R6928
R6927
R6932
2
0_5%_2
CHR_ILIM OUT
R6926
2
1 2
2
V+
5 1M_5%_2
U6903
++IN 7 48
6 -
OUT OUT LATCHED_ALARM
-IN
0.1UF_16V_2
1
1
64.9K_1%_2
V-
R6929
C6905
39.2K_1%_2
4
1
R6997
A A
2
2
32
Q6999
D
G 1
S
SSM3K7002FU
INVENTEC
2
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
VRP5V0A_VIN IN
EN_5V IN
9 EN_3V IN
D
D
PVBAT
1 1
PAD6110
POWERPAD_2_0610
2
75K_1%_2
1
75K_1%_2
1
R6120
R6119
2
64
65
9 8 VBATP IN OUT 2VREF 7 9
20
2
TON=3.3V:300KHZ/375KHZ
C C
IN VBATP 8 9
64
65
OUT 5V_PG 18
0.22UF_6.3V_2
1
C6114
CSC0805_DY
CSC0805_DY
10UF_25V_5
10UF_25V_5
1
1
C6110
C6111
C6161
C6160
Q6150
OUT Q6100 FAIR_FDMS7620S_8P
VRP3V3A FAIR_FDMS7620S_8P 10 D1
10
2
D1
25
4 D1 S2 5
5 4
1
6
5
4
3
2
S2
Q2
D1 Q2 OUT VRP5V0A
2
2
3 D1 S2 6
6 3
TML
TRIP2
VFB2
TONSEL
VREF
VFB1
TRIP1
S2 D1
2 D1 S2 7
OCP=7AMP 7 S2 D1 2 OCP=7AMP
7 24
P3V3ALW VO2 VO1 1 G1 G2 8
8 1 C6113 R6114 8 23 R6109 C6108
G2 G1 VREG3 PGOOD
PH 9 P5V0A_CHG
9 PH Q1
1 21 2 9 VBST2 VBST1 22 1 2 1 2 Q1
PAD6100 L6100 VRP3V3A_HG 10 DRVH2 DRVH1 21 VRP5V0A_HG L6150 PAD6150
1
2 2 1
1 2 VRP3V3A_PH 0.1UF_16V_22.2_5%_2 11 LL2 LL1 20 2.2_5%_2 0.1UF_16V_2 VRP5V0A_PH 1 2 1 1 2
2
VRP3V3A_LG 12 DRVL2 DRVL1 19 VRP5V0A_LG
ETQP3W3R3WFN ETQP3W3R3WFN
POWERPAD_2_0610 POWERPAD_2_0610
SKIPSEL
1
VREG5
4.7_5%_3
1
B B
2
15.4K_1%_2
GND
2
R7610
ENC
EN0
VIN
R6117
6.8K_1%_2 U6100
R7615
150UF_6.3V
1
R6122 TI_TPS51123RGER_QFN_24P
C6150
RSC_0603_DY
13
14
15
16
17
18
150UF_6.3V
1
+
C6100
1 2
1 2
2 1
21
0.0015UF_50V_2
P3V3AL P5V0AL
C7610
10K_1%_2
2
10K_1%_2 R6118
PAD6105 C7615
R6121
2
VRP5V0_LDO2 1 CSC0402_DY
1
PAD6103
1
2 1
2
1 2 VRP3V3_LDO
2
1
1
1 2
POWERPAD1X1M
POWERPAD1X1M R6111
1
C6112
10UF_6.3V_3
C6105
330K_5%_2_DY
1UF_25V_3
1
VO=((15.4K/10K)+1)*2
C6103
VO=((6.8K/10K)+1)*2
4.7UF_6.3V_3
2
2
A A
SKIP:OOA=3.3V; PWM=2VREF; AUTO=GND
SKIP_5V_3V IN
20
EN_5V_3V IN
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVADPTR P5V0AL
R6116 U6102
8 7 2VREF
20 1 2 1 5
IN IN+ VCC
1
49.9K_1%_2
1
R6197
20K_5%_2
C6115
2 VEE 10UF_6.3V_3
R6105
2
2
1 2
OUT VOLTAGE_ADC 48
3 IN- OUTPUT 4
D 576K_1%_3
D
0.22UF_6.3V_2
BCD_AZV321KTR_E1_SOT23_5P
100PF_50V_2
49.9K_1%_2
1
1
C6198
R6104
C6109
R6107
1 2 48
OUT ADC_VREF_1126
100K_1%_2
2
1
R6115
200K_1%_2
2
C C
PVBATA PVBATB PVADPTR
P3V3AL
65
86 4 VBATP IN
1SS355VMTE_17
2
1
PANJIT_MMSZ5252A 1SS355VMTE_17
2
2
R6101 D6104
D6105
100K_5%_2
2
1 2
D6100
D6102
2
OUT EN_P3V3A 18
1 2
1
1 2
Q6102 BAV70W_7_F
S1 1
1
2 G1
1SS355VMTE_17 6 1 R6199 2 R6113
1 1
OUT EN_3V 8 1 2
D1 3 VRP5V0A_VIN OUT OUT 48
VADP_DEBUG
R6102 D2 0_5%_2_DY
48 1 2 5 G2 P3V3A 100_5%_3
KBC_PWR_ON IN 4
0.015UF_10V_2
0_5%_2 S2 1 R6195 2
1
2N7002DW
D6101
C6102
47_5%_2
B B
2
2
P5V0AL P5V0A_CHG P5V0A
R6126
21
57
55
45
48
42
35
27 20 19 18SLP_S3#_3R 1 2
IN OUT SKIP_5V_3V
1
SHORT_0402_5
P3V3AL
R7350
P3V3AL Q7351
100K_5%_2 1
S D
8
1 8
R6103
100K_5%_2
2 7
2
1 2
2
2 7
R7351 3 6
R6106
3 6
1 2 4 5
5
4 5
RSC_0402_DY
G
0_5%_2 FAIR_FDMC6675BZ_8P
U6104 Q7350
S1 1 C7351 CSC0402_DY
1
R6198 1 2 1 2
GND VCC
I0 IN 48
KBC_PWR_ON 48
KBC_PWR_ON IN G1
1 2 1 R6100 2 4 6
20
EN_5V_3V IN O
2 R6108
1 0_5%_2_DY
2 D1 3 2 1
A 100K_5%_2_DY I1 IN CPPWR_EN 48
45 D2 A
0_5%_2 5 R7352
G2 100_5%_2
1 2 4
0.1UF_16V_2
IN KBC_GPIO51 48
1
S2
C6199
R6110 0_5%_2 2N7002DW
1
TOSHIBA_TC7SZ32FU_SSOP_5P
3
C7350
2
10UF_6.3V_3
2
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
OUT DDR3L_SEL
71.5K_1%_2
MEM_1V5-> HI DDR-> 1.35V
1
MEM_1V5-> LOW DDR-> 1.5V
R6208
32
D Q6202 P5V0A_CHG
D
D
48 1 G
MEM_1V5 IN
PVBAT
S
SSM3K7002FU
200K_5%_2
1
2
R6211
2.2UF_6.3V_3
1
C6205
10UF_25V_5
10UF_25V_5
1
1
C6210
C6211
Q6200
OCP=12AMP
2
FAIR_FDMS3668S_8P
4 D1 S2 5
P0V75S Q2
2
3 D1 S2 6 OUT VRP1V5 P1V5
2
2 D1 PHASE S2 7
U6200
R6205 C6204 1 8
12 15 1 2 1 2 G1 G2
V5IN VBST
Q1 9
14
VRP1V5_HG 2.2_5%_3 TML
DRVH 0.1UF_16V_2 PAD6200
L6200
330UF_2V_9MR_PANA_-35%
18 17 13
VRP1V5_PH 1 2 1 2
C EN_0V75 IN S3 SW
3 1 2 4
1 2 C
RSC_0603_DY
1
1 2 16 3 4 POWERPAD_2_0610
35
21
45
18 SLP_S4#_3R IN S5
PAN_ETQP3W1R0WFN_4P
R7620
R6204 RSC_0402_DY
18 1 2 11
VRP1V5_LG
EN_1V5 IN DRVL
1
R6210 0_5%_2 R6206
CSC0402_DY
C6200
2 1 6 10
1 2
DDR3L_SEL IN VREF PGND
+
10K_1%_2 20
C7620
PGOOD
2
VDDQSNS
2
8 REFIN VLDOIN 2
VTT 3
VTTSNS 1
7
0.01UF_50V_2
GND
52.3K_1%_2
0.1UF_16V_2
P0V75M_VREF
1
1
C6212
C6209
19 MODE VTTGND 4
R6207
18 TRIP VTTREF 5
100K_5%_2
30.1K_1%_2
B B
1
10UF_6.3V_3
0.22UF_6.3V_2
21
R6202
2
TML
1
R6203
C6208
C6207
TI_TPS51216RUKR_QFN_20P
2
2
VOUT=REFIN=1.8*(52.3K/(10K+52.3K))
MODE=100KOHM:TRACKING DISCHARGE
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
13
VRP1V8_1V05IN IN
OCP=4.5AMP
OUT VRP1V05_LAN_M P1V05M
1
C C
10UF_6.3V_3
C6410
VRP1V8_1V05IN IN
1
VOUT=((7.68K/10K)+1)*0.6
10_5%_2
R6402
2
11 U6400 L6400
TML PAD6400
10 PVIN VRP1V05_LAN_M_PH
LX 1 1 2 1 1 2
2
9 PVIN LX 2
2
8 SVIN LX 3 PAN_ELL5PR2R2N POWERPAD_2_0610
7 NC PGOOD 4
10K_1%_2 7.68K_1%_2
6 5
CSC0402_DY
1
22UF_6.3V_5
FB EN IN 18
EN_P1V05
1
R6400
C6403
C6400
RICHTEK_RT8068AZQW_WDFN_10P
0.1UF_16V_2
1
C6401
2
1
R6401
2
B B
2
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
MODE=100KHZ:300KHZ
18 EN_VCCP IN
100K_1%_2
1
R6304
PVBAT
2
C C
CSC0805_DY
10UF_25V_5
1
1
20 VCCP_PG OUT R6302 C6304
C6311
C6310
1 2 1 2 OCP=15AMP
17
16
15
14
13
Q6300
2.2_5%_3 FAIR_FDMS3668S_8P
0.1UF_16V_2 4 5
U6300 D1 S2 OUT VRP1V05S_VCCP
Q2 P1V05S_VCCP
2
3 6
PWPD
PGOOD
EN
BST
MODE
D1 S2
1 VREF SW 12
VRP1V05S_VCCP_PH 2 D1 PHASE S2 7
R6306
1 2 2 11
VRP1V05S_VCCP_HG 1 8
2.2UF_6.3V_3
26 VCCIO_SEL IN REFIN DH G1 G2
1
0_5%_2_DY 3 10
VRP1V05S_VCCP_LG Q1 9 L6300 PAD6300
C6308
26 IN GSNS DL TML
1
VSS_SENSE_VTT
330UF_2V_9MR_PANA_-35%
1 2 1 2
0_5%_2
1 2
4 9 P5V0A 3 1 2 4
R6305
RSC_0603_DY
26 VTT_SENSE IN VSNS V5
3 4 POWERPAD_2_0610
1
COMP
PGND
CYN_PCMB063T_R68MS_4P
TRIP
GND
2
R7630
2.2UF_6.3V_3
2
1
TI_TPS51219RTER_QFN_16P
C6305
C6300
CSC0402_DY
+
5
16
41.2K_1%_27
8
12
0.01UF_50V_2
11.3K_1%_2
1
B B
C7630
1 2
R6301
R6308
C6320
C6307
2
0.01UF_50V_2
2
2
2
VOUT=2*11.3/(10+11.3)=1.06V
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P5V0A_CHG
PAD6971
1 2 13
1 2 OUT VRP1V8_1V05IN
POWERPAD_2_0610
OCP=4.5AMP
10UF_6.3V_3
OUT VRP1V8S
P1V8S
1
C6975
C VRP1V8_1V05IN IN C
1
VOUT=((20.5K/10K)+1)*0.6
10_5%_2
R6970
2
11 U6970
TML L6970 PAD6970
10 PVIN LX 1 VRP1V8S_PH 1 2 1 1 2
2
9 PVIN LX 2
PAN_ELL5PR2R2N
2
8 SVIN LX 3 POWERPAD_2_0610
7 4 OUT P1V8S_PG 20
NC PGOOD
10K_1%_2 20.5K_1%_2
6 5
CSC0402_DY
1
22UF_6.3V_5
FB EN IN EN_1V8 18
1
R6973
C6974
C6970
RICHTEK_RT8068AZQW_WDFN_10P
0.1UF_16V_2
1
C6972
2
1
R6972
2
2
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
5.1K_1%_2 3300PF_50V_2
1
1
C6550
C6505
0.22UF_6.3V_2
R6502 SHORT FOR REMOTE SENSE
1
0.01UF_50V_2
C6504
R6506 SHORT FOR LOCAL SENSE
2
1
2
R6502
R6500
1 2
IN VCCSA_SENSE 27
RSC_0402_DY
1
R6501 0_5%_2 OUT VRPVSA
1 2
R6506
2
RSC_0402_DY
1
2
3
4
5
6
C OCP=7AMP C
2
COMP
MODE
GND
SLEW
VOUT
VREF
P5V0A_CHG PVSA
TI_TPS51463RGER_QFN_24P
25 TML L6500 PAD6500
24 VIN SW 7 VRPVSA_PH 1 2 1 1 2
2
3 1 2 4
23 VIN SW 8
0.1UF_16V_2
22UF_6.3V_5
3 4
1
22 VIN U6500 SW 9 POWERPAD_2_0610

C6510
C6511
21 PGND SW 10 CYN_PCMB063T_R33MS_4P
20 PGND SW 11 C6506
CHOKE_4PIN_2PIN
1
19 PGND BST 12 1 2
V5FILT
C6500 C6501 C6502

V5DRV
PGOOD
VID0
VID1
0.1UF_16V_2
2
22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5

EN
2
P5V0A
18
17
16
15
14
13
IN EN_PVCCSA
B B
1UF_6.3V_2
1
1
1UF_6.3V_2
C6509
C6503
C6508
1 2
CSC0402_DY
2
IN VCCSA_VID0 27
IN VCCSA_VID1 27
OUT VCCSA_PG 20
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
IN GFX_VSS_SENSE 27
2 1 1 2
IN GFX_VCC_SENSE
0.1UF_16V_2
R6743 C6743 R6740 C6739
1
1 2 1 2 2K_1%_2 330PF_50V_2
C6733
RSC_0402_DY CSC0402_DY C6742 C6741 R6742 R6738
1 2 1 2 1 2 2 1 2 1 1 2
2
R6739 C6738
R6737 0.01UF_50V_2 CSC0402_DY 2.61K_1%_2 154K_1%_2
1 2 267K_1%_2 150PF_50V_2
16 VSUMNG IN
10K_5%_NTC
C6737
619_1%_2 2 1 2 1 1 2
1
C6740 R6741
47PF_50V_2
D
R6735
470PF_50V_2 499_1%_2
0.01UF_50V_2
D
0.1UF_16V_2
1
1
1
11K_1%_2
R6736
C6734
C6735
2 2
2.61K_1%_2
VRPVAXG_BOOT1
R6734
VRPVAXG_HG1 16
2
2
1
AXG_PG 20
16 VSUMPG IN
P5V0A
P1V05S_VCCP
OUT
OUT
OUT
SHORT_0402_5
2
R6626
R6697
1 2
32
31
30
29
28
27
26
25
26
OUT VR_SVID_DATA
SHORT_0402_5
U6600 130_1%_2
2
1 1
R6625
R6696
1UF_6.3V_2
C C
ISUMPG
ISUMNG
RTNG
FBG
COMPG
PGOODG
BOOTG
UGATEG
1 2 1 2 1 2 26
OUT VR_SVID_CLK
C6626
R6732 R6731 1 24
NTCG PHASEG OUT VRPVAXG_PH1 54.9_1%_2
27.4K_1%_2 3.83K_1%_2
1
2 23
1 2 EN_CPU IN VR_ON LGATEG OUT VRPVAXG_LG1
2
R6733 26 3 22
VR_SVID_CLK OUT SCLK VCCP
470K_5%_NTC
4 21
VR_SVID_ALERT# OUT ALERT# VDD
1UF_6.3V_2
1
26 5 20
VR_SVID_DATA OUT SDA PWM2
C6625
6 19
CPU_PROCHOT# OUT VR_HOT# LGATE1 OUT VRPVCORE_LG1
1 2 1 2 23 7 18
NTC PHASE1 OUT VRPVCORE_PH1
2
R6632 R6631 P5V0A
8 17
27.4K_1%_2 3.83K_1%_2
ISEN2 UGATE1 OUT VRPVCORE_HG1
PGOOD
1 2
BOOT1
ISUMN
ISUMP
COMP
ISEN1
PAD
RTN
FB
R6633
470K_5%_NTC INTERSIL_ISL95833HRTZ_T_TQFN_32P
B B
33
10
12
13
14
15
16
11
OUT VRPVCORE_BOOT1
OUT CORE_PG 18
C6640
C6637 R6638
2 1 1 2 1 2 1 2
R6641
470PF_50V_2 33PF_50V_2 42.2K_1%_2
499_1%_2
R6642
1 2 2 1 1 2
16 VSUMP IN
2.61K_1%_2
R6639 C6638
1.96K_1%_2
1
267K_1%_2 150PF_50V_2
R6634
C6639
2 1 1 2
2200PF_50V_2
A A
0.1UF_16V_2
1
1
1
11K_1%_2
R6640
R6636
C6634
C6635
330PF_50V_2
2
IN VCCSENSE 2K_1%_2
C6641
10K_5%_NTC
1
1 2
R6635
CSC0402_DY
2
R6637 C6642
16 VSUMN IN 1 2 1 2
INVENTEC
0.1UF_16V_2
1
649_1%_2 0.01UF_50V_2
C6633
TITLE
R6643 C6643 IN VSSSENSE 26
1 2 1 2 MODEL,PROJECT,FUNCTION
Block Diagram
DOC.NUMBER REV
649_1%_2 2200PF_50V_2
2

A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVBAT
1 1
PAD6610
POWERPAD_2_0610
2
5 2
65
16 VBATR_CPU IN
0.1UF_25V_3
6
7
8
10UF_25V_5
1
1
C6611
C6610
Q6610
FDMS7692
D
NMOS_4D3S
R6621 C6621
2.2_5%_3 0.22UF_25V_3
1 2 1 2
VRPVCORE_BOOT1 IN
2
D
S
PVCORE 65
16 VBATR_CPU IN D
1
4
3
2
1
VRPVCORE_HG1 IN L6610
1 2
VRPVCORE_PH1 IN 3 4
1
1
5
6
7
8
ETQP4LR36AFM PAD6710
VRPVCORE_LG1 IN R7661 POWERPAD_2_0610
FDMS0300S
2
Q6611
1
D
RSC_0603_DY
C6601
C6600
+
470UF_2V
5 2
470UF_2V VBATR_GPU IN
21
6
7
8
R6611
1
1 2
15UF_25V
C7661 15 VSUMP OUT
G
C6710
S
2
3
2
3
Q6710
FDMS7692
D
CSC0402_DY
+
NMOS_4D3S
3.65K_1%_2 R6721 C6721
4
3
2
1
2.2_5%_3 0.22UF_25V_3
2
1 2 1 2
VRPVAXG_BOOT1 IN
2
15 VSUMN 1 2
OUT
S
R6612 PVAXG
1_5%_2 VRPVAXG_HG1 IN
4
3
2
1
L6710
1 2
VRPVAXG_PH1 IN 3 4
0.0015UF_50V_2 4.7_5%_3
5
6
7
8
C VRPVAXG_LG1 IN ETQP4LR36AFM C
R7671
FDMS0306AS
Q6711
1
D
C6700
+
21
470UF_2V
R6711
C7671
1 2
OUT
G
VSUMPG
2
3
3.65K_1%_2
4
3
2
1
2
15 VSUMNG 1 2
OUT
R6712
1_5%_2
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
PVBAT_IN IN
C P5V0AL C
PVPACK PVBATB P1V05M PVAXG
1 TP6001 1 TP6008 1 TP6014 1 TP6020 1 TP6025 1 TP6028 1 TP6032

65
PVADPTR_IN IN
TP30 TP30 TP30 TP30 TP30 TP30 TP30
1 TP6002 1 TP6009 1 TP6015 1 TP6021
P3V3AL P1V05S_VCCP PVCORE
TP30 TP30 TP30 TP30
1 TP6003 1 TP6010 1 TP6016 1 TP6022 1 TP6026 1 TP6029 1 TP6033
1 TP6039
TP30 TP30 TP30 TP30 TP40 TP30 TP30
TP30
TP6040 P5V0A_CHG P5V0A P1V8S P0V75S
1
PVADPTR PVBAT PVBATA
TP30 TP6023 TP7351 TP6030 TP6037
1 1 1 1
1 TP6041 1 TP6004 1 TP6011 1 TP6017
TP30 TP30 TP30 TP30
TP30 TP30 TP30 TP30
1 TP6005 1 TP6012 1 TP6018
P3V3ALW P1V5 PVSA P0V75M_VREF
TP30 TP30 TP30
1 TP6007 1 TP6006 1 TP6013 1 TP6019 1 TP6024 1 TP6027 1 TP6031 1 TP6038
B VADPBL IN B
TP30 TP30 TP30 TP30 TP30 TP30 TP30 TP30
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
0.1UF_16V_2
1
1 1 2 2
C7680
D7680
1SS355VMTE_17
2
1 2 1 2 10
35 27 21 20 19 18 9 SLP_S3#_3R IN OUT EN_0V75
57 55 48 45 42 R7680 R7681
1K_5%_2 20K_5%_2 P3V3S
2
35 10 IN
SLP_S4#_3R
45 21 R7687
BAT54C
D
A2
18 15 1 2
CORE_PG IN D
R7682 1K_5%_2
3 1 2
C OUT SLP_S4#_KBC 55 48
SHORT_0402_5
20K_1%_2
2
D7681
R7690
R7688
A1
OUT EN_1V5 10 1 2
35 33 VGATE IN OUT CORE_PG 15 18
48 23 KBC_GPIO22 IN SHORT_0402_5
1
R7689
20 48 23 1 2 15
PWR_GOOD_3 IN OUT EN_CPU
SHORT_0402_5
R7683
C 21
19 1 2 11
C
20
PM_SLP_A# IN OUT EN_P1V05
0.1UF_16V_2_DY
48 SHORT_0402_5
1
35
C7683
R6125
8 1 2
5V_PG IN OUT RSMRST# 33 48
35
SHORT_0402_5
2
R7684
1 2 12
SLP_S3#_3R IN OUT EN_VCCP
SHORT_0402_5
CSC0402_DY
57 55 48 45 42 35 27 21 20 19 18 9
1
P3V3ALW P3V3A
C7684
PAD7200
P3V3AL 1 1 2
2
1
POWERPAD1X1M_DY
2
B C7200 B
0.1UF_16V_2
Q7200
4 1 1 TP7201
S D
2
TP30
2
5
1 R7200 2 3 6
EN_P3V3A IN G
PMOS_4D1S
100K_5%_2
R7685
1
1 2 TPC6111
SLP_S3#_3R IN OUT EN_1V8 13
57 55 48 45 42 35 27 21 20 19 18 9 0_5%_2 C7201
CSC0402_DY
1
10UF_6.3V_3
C7685
2
2
R7686
1 2 14
SLP_S3#_3R IN OUT EN_PVCCSA
A 57 55 48 45 42 35 27 21 20 19 18 9 SHORT_0402_5 A
CSC0402_DY
1
C7686
2
INVENTEC
TITLE
POWER SEQUENCE
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE NUMER : 7000~7350 Q2971 WHETHER CAN CHANGE TO

6015B0017101 PMV65XP OR NOT
P0V75S
P1V8S P3V3ALW
22_5%_2_DY
P3V3ALW P3V3S P5V0A_CHG P5V0S P1V5 P1V5S
1
Q2971
22_5%_2
4 1 TP2971
MAX 3.3A MAX 2.8A MAX 7.5A S D 1
Q7050 Q7100 Q7151 2
R7152
R7151
1 4 1 TP7051 1 4 1 8 1 1 TP30
D S D S D S 5
2 2 TP6035 7 2 TP6036
TP30 TP30 TP30 3 G 6
5 5 6 3 PMOS_4D1S
3 2
3 2
6 G 3 6 G 3 5 G 4
NMOS_4D1S NMOS_4D1S NMOS_4D3S TPC6111
D AO6402AL AO6402AL FDMS7692 Q7152 Q7153 P3V3M
D
D
19 19 19 1 G 1 G
SPWON IN SPWON IN SPWON IN P3V3ALW
CSC0402_DY
CSC0402_DY
10UF_6.3V_3
CSC0402_DY
1
3 2 R2972 1
1
47_5%_2
S
S
1
SSM3K7002FU_DY
SSM3K7002FU C2970
C7102
C2971
2 1
C7103
C7150
0.1UF_16V_2
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
2
100_5%_5
47K_5%_2
220_5%_5
330K_5%_2
2 R7050 1
R7100 1
1
47_5%_2
CSC0402_DY
R7150
C7050
C7100
C7151
R2971
R2970
C7060
2
2
2
2 Q2972
D
1 G
S
Q2970
SSM3K7002FU
D
SLP_LAN# 1
3
2
G
SLP_LAN# IN
Q7051 Q7101 Q7150 35
S
19
D
D
1 G 1 G 1 G SSM3K7002FU
21 48
2
S
S
SSM3K7002FU SSM3K7002FU SSM3K7002FU
C C
2
2
OUT SLP_S3_5R 23
P5V0A
100K_5%_2
1
R7004
P1V05M
2
2
OUT SPWON 19
E
1 B Q7001
MMBT3906
C
200K_5%_2
1
B B
3
R7005
2
P5V0A
100K_5%_2_DY
1
R2973
1
0.1UF_25V_2
124K_1%_2
47_5%_2
2
C7000
C2975
C2976
1
R7001
1
R7002
R2974 10UF_6.3V_3
2
2
10UF_6.3V_3
3
3
100K_5%_2
2
2
Q2974
2
Q7002
D
2
2
3 2
D
D7000 1 G
35SLP_S3#_3R IN SLP_S3#_3R 1 G
BAV99W_7_F
E C
Q7000 1
S
B
Q2973
S
9 20 MMBT3906 3 20 21 35 48 18
SSM3K7002FU SSM3K7002FU
D
21
61.9K_1%_2
19 18 1
2
27 IN G
PM_SLP_A#
1
2
45 42 1
55 48
S
57
SSM3K7002FU
R7003
2
2
A A
R7000 C7001
1 2 1 2
VRP5V0A_PH IN
10_5%_2 0.01UF_50V_2
INVENTEC
TITLE
POWER(SLEEP)
REFERENCE NUMER : 2950~2999 SIZE

A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVADPTR P3V3AL
8.06K_1%_2
IN
REFERENCE NUMER : 7400~7450 7 LIMIT_SIGNAL_100R
220K_5%_2
1
1
1
BASE
R6902
R6910
P5V0S Q6900
1 R7405 2
1 2
76.8K_1%_2 2 3
1 2
P0V75S C7402 OUT VBIAS EMITTER COLLECTOR
9 8 7 2VREF 1 R7410 2 2 1 7
2VREF IN
130K_1%_2
8.66K_1%_2
48 1 R7416 2 20 34.8K_1%_2 1000PF_50V_2
R6903
R6909
11.5K_1%_2 LES_LMBT3906WT1G_SOT323_3P
1 R7417 2
2
VCCSA_PG IN P3V3S
2
14
3.3K_5%_2
D 1R7407 2
9 18
35 SLP_S3#_3R 1 R7414 2 D
SLP_S3#_3R IN
2
D7414 1M_5%_2
3.3K_5%_2
OUT ADP_A_ID 48
1
57 45 3.3K_5%_2
1
42 27
55 P5V0A
19
20
45.3K_1%_2
2 R7404
R6904
21
8
V+
20 M_PWROK 1 R7415 2 3 1 R7409 2 5 U7400
M_PWROK IN
2
33
35 3.3K_5%_2 0_5%_2 ++IN OUT 7 PWR_GOOD_3 OUT 18 23 48
- PWR_GOOD_3
6 -IN
RSC_0402_DY
3300PF_50V_2
V- 20
49.9K_1%_2
1
4
2 R7412
2 R7418
C7403
BAT54A
2
P1V5S
R7411
1 2
P3V3S 22.6K_1%_2 1R7406 2
R7413
1 2 1M_5%_2
49.9K_1%_2 P5V0A
C C
1 R7402 2
15 AXG_PG IN 1C7400 2
RSC_0402_DY
0.1UF_16V_2
8
V+
12 1 R7400 2 1 R7408 2 3 U7400
VCCP_PG IN ++IN
1
1
2
3.3K_5%_2 0_5%_2 OUT
2 -
-IN
13 1 R7425 2 R7401
P1V8S_PG IN C7401
V-
3.3K_5%_2
4
27.4K_1%_2
3300PF_50V_2
2
1
B B
AMBIENT TEMP SENSE

P3V3A
P5V0S
2VREF 1R2950 2 1 R2953 2
3.3K_5%_2
20 9 8 7 2VREF IN
1
41.2K_1%_3 1M_5%_2 R2963

1000PF_50V_2
U2951
P5V0A 1 R2962 2 136K_1%_3
2
1
5 VCC SET 1
71.5K_1%_2
2 R2954
C2950
1
150_1%_2 GND
P3V3M 4 3
2 R2951
HYST OT IN EN_5V_3V 8 9
U2950
1 R2959 R2955 C4411
+
2 1 2 1 GMT_G708T1U_SOT23_5P
+ M_PWROK 0.1UF_16V_2
46.4K_1%_2 0_5%_2 4
2
OUT OUT M_PWROK35 20

86.6K_1%_2
3 33
2
-
A A
2 R2960 1
1
3300PF_50V_2
-
AZV331KTR_E1
C2952
R2961 1
2
1K_1%_2
P1V05M 75 DEG. => 36 KOHM

110 DEG. => 10 KOHM
2
1 R2958 2
14.7K_1%_2
2
1 R2956 2
3
BAT54A
19
35
18
20 PM_SLP_A# IN
PM_SLP_A#
1 R2957 2 1 2 1
1M_5%_2
C2951 2 INVENTEC
48 3.3K_5%_2 0.068UF_10V_2 TITLE
21
D2951 POWER(SEQUENCE)
REFERENCE NUMER : 2950~2999 SIZE CODE

DOC.NUMBER
1310xxxxx-0-0
REV
X01
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
C C
P3V3A
CN4921
ENTERY_3703K_Q08N_11R_8P_DY
1
SLP_S3#_3R IN 1
2
SLP_S4#_3R IN 2
3
SLP_S5#_3R IN 3
4
PM_SLP_A# IN 4
5 5
61 55 49 6 G1
ON_OFF# IN 6 G1
7 7 G2 G2
48 35 19 8
SLP_LAN# IN 8
B ME DEBUG B
A A
INVENTEC
TITLE
XDP CONN
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE NUMBER:4400~4349
P3V3S
0_5%_2
D
R4301
P5V0S
2
20 MILS
CN4300
1 1
U4300 2 G1
5
2 G
1 48 3 G2
+
48 PWM_3S_FAN# IN R4300 TACH_FAN_IN_1126 OUT 3 G
4 1 2 4 4
2
22 THERM# IN 22_5%_2 ACES_50271_0040N_001_4P
-
TC7SET00F
0.1UF_16V_2_DY
1
C4300
2
C C
THERM SENSOR
P3V3S
B B
0.1UF_16V_2
1
1
B
C4450
3 2
2.2K_5%_2
C E
1
0_5%_2
R4453
Q4450
R4452
MMBT3904
2
2
2
2200PF_50V_2
1 2
C4451
U4450
1 8 47
34
H_THERMDA
VDD SMCLK BI THERM_CLK
2 7
H_THERMDC
DP SMDATA BI THERM_DATA 34
47
3 6
DN ALERT# OUT THERM_SCI# 38
4 5
22 THERM# OUT THERM#/ADDR GND
SMSC_EMC1412_1_ACZL_TR_MSOP_8P
A A
INVENTEC
TITLE
FAN & THERMAL
REFERENCE NUMBER:4411~4449 SIZE CODE

DOC.NUMBER
1310xxxxx-0-0
REV
X01
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P1V8S
1
1K_5%_2_DY
2.2K_5%_2
U4500
CLOCKS
R4535
R4539
J3 34
BCLK
H2
IN CLK_DMI_PCH_DP
BCLK# IN CLK_DMI_PCH_DN 34
P1V05S_VCCP
2
R4536
SNB_IVB# OUT 1 2 H_SNB_IVB# F49 PROC_SELECT#
38
DPLL_REF_CLK AG3 1 1K_5%_2
R4500 2
MISC
1K_5%_2 AG1 1 2
DPLL_REF_CLK#
TP1 1 C57
TP24 PROC_DETECT# R4501 1K_5%_2
P1V05S_VCCP
BCLK_ITP N59 XDP_BCLK_ITP_DP TP4520 1
TP24
BCLK_ITP# N58 XDP_BCLK_ITP_DN TP4521 1
D TP24
TP4503 1 C49 CATERR#
D
TP24 FOR IVB 2C FINAL SYMBOL MOVE TO OTHER BLOCK
CLOSE U6600
62_5%_2
48 A48 AT30
R4531
38 H_PECI OUT PECI SM_DRAMRST# OUT DDR3_DRAMRST#_CPU 23
DDR3
THERMAL
BF44 SM_RCOMP0 R4558 1 2
MISC
R4540 140_1%_2
2
SM_RCOMP[0]
1 2 H_PROCHOT#_R C45 BE43 SM_RCOMP1 R4559 1 2 25.5_1%_2
23 15 CPU_PROCHOT# IN PROCHOT# SM_RCOMP[1]
BG43 SM_RCOMP2
SM_RCOMP[2] R4560 1 2 200_1%_2
56_5%_2
47pF_50V_2
1 TP2430 TP2432 TP2434 TP2436
C4697
TP30 TP30 TP30 TP30
D45 TP2431 TP2433 TP2435
38 PM_THRMTRIP# OUT THERMTRIP#
TP30 TP30 TP30
1
N53 H_PRDY#
2
PRDY#
1
PREQ# N55 H_PREQ#
L56 H_TCK
JTAG & BPM

P3V3S P3V3A P1V5S TP2438
TCK
TMS L55 H_TMS
TP30 TRST# J58 H_TRST#
1
200_1%_2
R4570 35 H_TDI
1
C 1 2 C48 M60 C
1
H_PM_SYNC BI PM_SYNC TDI
H_TDO
1UF_6.3V_2
TP2439 TDO L59
R4529
0_5%_2
1
C4523 TP30 TP2437
38
B46 TP30
R4527 H_PWRGD IN UNCOREPWRGOOD
2
1
K58 XDP_DBRESET#
2
TP2440
1
DBR#
200_1%_2
TP30
U4502 R4530
PWR MANAGEMENT
2
35 1 6 1 2 BE45 G58 H_BPM0_XDP#

1
PM_DRAM_PWRGD IN 1A 1Y SM_DRAMPWROK BPM#[0]
TP30 TP2450
1
BPM#[1] E55 H_BPM1_XDP#
1
TP30 TP2451
2 GND VCC 5 130_1%_2 TP2441 BPM#[2] E59 H_BPM2_XDP#
1
TP30 TP2452
BPM#[3] G55 H_BPM3_XDP#
1
TP30 TP30 TP2453
3 2A 2Y 4 BPM#[4] G59 H_BPM4_XDP#
1
TP30 TP2454
D44 RESET# BPM#[5] H60 H_BPM5_XDP#
1
TP30
1
TP2455
1
BPM#[6] J59 H_BPM6_XDP#
1
NXP_74LVC2G07GW_SC88A_6P R4528 TP30 TP2456
P1V05S_VCCP BPM#[7] J61 H_BPM7_XDP#
1
TP30 TP2457
1
39_5%_2_DY
32
C4605
Q4505
1
P3V3S
75_5%_2
D
0.1UF_16V_2 1
G
IN SLP_S3_5R 19 P3V3S
R4567
2
B ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P R4551 1 2 B
5
35
XDP_DBRESET# IN 1K_5%_2
SSM3K7002FU_DY
50 U4501
2
2
2 R4555
+
37 BUF_PLT_RST# IN 2
48
4
4 1 2 P3V3AL P1V05S_VCCP
53 1
54 NC
20K_1%_2_DY
48 20 18 PWR_GOOD_3 IN -
60 43_5%_2
1
NXP_74LVC1G07GW_TSSOP_5P 51_5%_2
H_TDO IN R4552 1 2
R4655
3
51_5%_2
H_TMS IN R4553 1 2
51_5%_2
H_TDI IN R4554 1 2
R4571
2
34 1 2
P3V3S PCH_DDR_RST IN
20K_1%_2 P1V5 2 51_5%_2
H_TRST# IN R4556 1
1
2 51_5%_2
1K_1%_2
C4688
1
R4557 1
0.1UF_16V_2
H_TCK IN
R4563
3
Q4595 R4564
2
1 2
OUT DDR3_DRAMRST#29
32
1 G 31
30
1
5
48 18 KBC_GPIO22 IN 1K_5%_2
Q4522
NC
U4607
D
+
15 SSM3K7002FU 1 G
DDR_RST_EN
20K_5%_2
1
A 48 2 4 A
KBC_PROCHOT IN IN CPU_PROCHOT#
2
23
S
1
-
R4561
TC7SZ05F BSS138
R4562
2
3
R4607 1 2
DDR3_DRAMRST#_CPU IN
2
100K_5%_2
23 0_5%_2_DY
2
470PF_50V_2
4.99K_1%_2
1
1
INVENTEC
C4690
R4550
TITLE
2
CPU-1/6
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS
CHANGE by DATE SHEET 23 of 80
XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P1V05S_VCCP
U4500 R4503
PEG_ICOMPI G3 CPU_PEG_ICOMPI 1 2
PEG_ICOMPO G1
35 IN DMI_TX0_DN M2 DMI_RX#[0] PEG_RCOMPO G4 24.9_1%_2
35 IN DMI_TX1_DN P6 DMI_RX#[1]
35 IN DMI_TX2_DN P1 DMI_RX#[2]
35 IN DMI_TX3_DN P10 DMI_RX#[3] PEG_RX#[0] H22
IN 72
PEG_RX0_C_DN
J21 72
D PEG_RX#[1] IN PEG_RX1_C_DN
35 IN DMI_TX0_DP N3 DMI_RX[0] PEG_RX#[2] B22
IN 72
PEG_RX2_C_DN D
35 IN DMI_TX1_DP P7 DMI_RX[1] PEG_RX#[3] D21
IN 72
PEG_RX3_C_DN
35 IN DMI_TX2_DP P3 DMI_RX[2] PEG_RX#[4] A19
IN 72
PEG_RX4_C_DN
35 IN DMI_TX3_DP P11 DMI_RX[3] PEG_RX#[5] D17
IN 72
PEG_RX5_C_DN
DMI
B14 72
PEG_RX#[6] IN PEG_RX6_C_DN
35 OUT DMI_RX0_DN K1 DMI_TX#[0] PEG_RX#[7] D13
IN 72
PEG_RX7_C_DN
35 OUT DMI_RX1_DN M8 DMI_TX#[1] PEG_RX#[8] A11
35 OUT DMI_RX2_DN N4 DMI_TX#[2] PEG_RX#[9] B10
35 OUT DMI_RX3_DN R2 DMI_TX#[3] PEG_RX#[10] G8
PEG_RX#[11] A8
35 OUT DMI_RX0_DP K3 DMI_TX[0] PEG_RX#[12] B6
35 OUT DMI_RX1_DP M7 DMI_TX[1] PEG_RX#[13] H8
35 OUT DMI_RX2_DP P4 DMI_TX[2] PEG_RX#[14] E5
DMI_RX3_DP
PCI EXPRESS -- GRAPHICS

35 T3 K7
OUT DMI_TX[3] PEG_RX#[15]
K22 72
PEG_RX[0] IN PEG_RX0_C_DP
K19 72
C21 72
FDI_TX0_DN
35 U7 D19 72
OUT FDI_TX1_DN
FDI0_TX#[0] PEG_RX[3] IN PEG_RX3_C_DP
35 W11 C19 72
OUT FDI_TX2_DN
35 W1 D16 72
OUT FDI_TX3_DN
35 AA6 C13 72
OUT FDI_TX4_DN
35 W6 D12 72
OUT FDI_TX5_DN
C 35 OUT V4 FDI1_TX#[1] PEG_RX[8] C11 C
35 FDI_TX6_DN Y2 C9
OUT FDI_TX7_DN
FDI1_TX#[2] PEG_RX[9]
35 AC9 F8
OUT FDI1_TX#[3] PEG_RX[10]
PEG_RX[11] C8
PEG_RX[12] C5
35 FDI_TX0_DP U6 H6
OUT FDI_TX1_DP
FDI0_TX[0] PEG_RX[13]
35 W10 F6
OUT FDI_TX2_DP
35 W3 K6
OUT FDI_TX3_DP
35 AA7
OUT FDI0_TX[3]
Intel(R) FDI
35 OUT FDI_TX4_DP W7 FDI1_TX[0] PEG_TX#[0] G22 PEG_TX0_DN 1
C4837 2 0.1UF_16V_2 OUT 72
PEG_TX0_C_DN
35 OUT FDI_TX5_DP T4 FDI1_TX[1] PEG_TX#[1] C23 PEG_TX1_DN 1
C4838 2 0.1UF_16V_2 OUT 72
PEG_TX1_C_DN
35 OUT FDI_TX6_DP AA3 FDI1_TX[2] PEG_TX#[2] D23 PEG_TX2_DN 1
C4839 2 0.1UF_16V_2 OUT 72
PEG_TX2_C_DN
35 OUT FDI_TX7_DP AC8 FDI1_TX[3] PEG_TX#[3] F21 PEG_TX3_DN 1
C4840 2 0.1UF_16V_2 OUT 72
PEG_TX3_C_DN
PEG_TX#[4] H19 PEG_TX4_DN 1
C4841 2 0.1UF_16V_2 OUT 72
PEG_TX4_C_DN
35 IN FDI_FSYNC0 AA11 FDI0_FSYNC PEG_TX#[5] C17 PEG_TX5_DN 1
C4842 2 0.1UF_16V_2 OUT 72
PEG_TX5_C_DN
35 IN FDI_FSYNC1 AC12 FDI1_FSYNC PEG_TX#[6] K15 PEG_TX6_DN 1
C4843 2 0.1UF_16V_2 OUT 72
PEG_TX6_C_DN
PEG_TX#[7] F17 PEG_TX7_DN 1
C4844 2 0.1UF_16V_2 OUT 72
FDI_INT
PEG_TX7_C_DN
35 U11 F14
IN FDI_INT PEG_TX#[8]
PEG_TX#[9] A15
35 FDI_LSYNC0 AA10 J14
IN FDI_LSYNC1
FDI0_LSYNC PEG_TX#[10]
35 AG8 H13
IN FDI1_LSYNC PEG_TX#[11]
P1V05S_VCCP PEG_TX#[12] M10

PEG_TX#[13] F10
B PEG_TX#[14] D9 B
PEG_TX#[15] J4
1 R4502 2 CPU_EDP_COMPIO AF3 eDP_COMPIO
24.9_1%_2 AD2 eDP_ICOMPO PEG_TX[0] F22 PEG_TX0_DP 1
C4853 2 0.1UF_16V_2 OUT 72
PEG_TX0_C_DP
AG11 eDP_HPD PEG_TX[1] A23 PEG_TX1_DP 1
C4854 2 0.1UF_16V_2 OUT 72
PEG_TX1_C_DP
PEG_TX[2] D24 PEG_TX2_DP 1
C4855 2 0.1UF_16V_2 OUT 72
PEG_TX2_C_DP
PEG_TX[3] E21 PEG_TX3_DP 1
C4856 2 0.1UF_16V_2 OUT 72
PEG_TX3_C_DP
AG4 eDP_AUX# PEG_TX[4] G19 PEG_TX4_DP 1
C4857 2 0.1UF_16V_2 OUT 72
PEG_TX4_C_DP
AF4 eDP_AUX PEG_TX[5] B18 PEG_TX5_DP 1
C4858 2 0.1UF_16V_2 OUT 72
PEG_TX5_C_DP
PEG_TX[6] K17 PEG_TX6_DP 1
C4859 2 0.1UF_16V_2 OUT 72
PEG_TX6_C_DP
PEG_TX[7] G17 PEG_TX7_DP 1
C4860 2 0.1UF_16V_2 OUT 72
PEG_TX7_C_DP
DP
AC3 eDP_TX#[0] PEG_TX[8] E14
AC4 eDP_TX#[1] PEG_TX[9] C15
AE11 eDP_TX#[2] PEG_TX[10] K13
AE7 eDP_TX#[3] PEG_TX[11] G13
PEG_TX[12] K10
AC1 eDP_TX[0] PEG_TX[13] G10
AA4 eDP_TX[1] PEG_TX[14] D8
AE10 eDP_TX[2] PEG_TX[15] K4
AE6 eDP_TX[3]
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
A A
INVENTEC
TITLE
CPU-2/6
DOC.NUMBER REV
SIZE CODE X01
A3 CS 1310xxxxx-0-0
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U4500
30 M_B_DQ<0> AL4
BI SB_DQ[0]
30 BI M_B_DQ<1> AL1 SB_DQ[1] SB_CLK[0] BA34 M_CLK_DDR2_DP OUT 30
32
31
30 BI M_B_DQ<2> AN3 SB_DQ[2] SB_CLK#[0] AY34 M_CLK_DDR2_DN OUT 30
32
31
30 M_B_DQ<3> AR4 AR22 M_CKE2 32
31
30
U4500 BI M_B_DQ<4>
SB_DQ[3] SB_CKE[0] OUT
30 AK4
BI M_B_DQ<5>
SB_DQ[4]
30 AK3
BI M_B_DQ<6>
SB_DQ[5]
30 AN4
29 BI M_A_DQ<0> AG6 SA_DQ[0] BI M_B_DQ<7>
SB_DQ[6]
30 AR1
29 BI M_A_DQ<1> AJ6 SA_DQ[1] SA_CLK[0] AU36 M_CLK_DDR0_DP OUT 29 BI SB_DQ[7]
30 M_B_DQ<8> AU4
D 29 BI M_A_DQ<2> AP11 SA_DQ[2] SA_CLK#[0] AV36 M_CLK_DDR0_DN OUT 29 BI M_B_DQ<9>
SB_DQ[8]
1
30 AT2 BA36
29 BI M_A_DQ<3> AL6 SA_DQ[3] SA_CKE[0] AY26 M_CKE0
OUT 29 BI M_B_DQ<10>
SB_DQ[9] SB_CLK[1]
1
TP24 TP4505 D
30 AV4 BB36
29 BI M_A_DQ<4> AJ10 SA_DQ[4] BI M_B_DQ<11>
SB_DQ[10] SB_CLK#[1]
1
TP24 TP4506
30 BA4 BF27
29 BI M_A_DQ<5> AJ8 SA_DQ[5] BI M_B_DQ<12>
SB_DQ[11] SB_CKE[1]
TP24 TP4507
30 AU3
29 BI M_A_DQ<6> AL8 SA_DQ[6] BI M_B_DQ<13>
SB_DQ[12]
30 AR3
29 BI M_A_DQ<7> AL7 SA_DQ[7] BI M_B_DQ<14>
SB_DQ[13]
30 AY2
29 BI M_A_DQ<8> AR11 SA_DQ[8] BI M_B_DQ<15>
SB_DQ[14]
30 BA3
29 BI M_A_DQ<9> AP6 SA_DQ[9] SA_CLK[1] AT40 M_CLK_DDR1_DP OUT 29 BI M_B_DQ<16>
SB_DQ[15]
30 BE9
29 BI M_A_DQ<10> AU6 SA_DQ[10] SA_CLK#[1] AU40 M_CLK_DDR1_DN OUT 29 BI M_B_DQ<17>
SB_DQ[16]
M_CS#2
30 BD9 BE41 30
32
31
29 BI M_A_DQ<11> AV9 SA_DQ[11] SA_CKE[1] BB26 M_CKE1
SB_DQ[17] SB_CS#[0]
1
OUT
30 BD13 BE47
29 BI M_A_DQ<12> AR6 SA_DQ[12] BI M_B_DQ<19>
SB_DQ[18] SB_CS#[1] TP24 TP4508
30 BF12
29 BI M_A_DQ<13> AP8 SA_DQ[13] BI M_B_DQ<20>
SB_DQ[19]
30 BF8
29 BI M_A_DQ<14> AT13 SA_DQ[14] BI M_B_DQ<21>
SB_DQ[20]
30 BD10
29 BI M_A_DQ<15> AU13 SA_DQ[15] BI SB_DQ[21]
30 M_B_DQ<22> BD14
29 BI M_A_DQ<16> BC7 SA_DQ[16] BI M_B_DQ<23>
SB_DQ[22]
30 BE13
29 BI M_A_DQ<17> BB7 SA_DQ[17] SA_CS#[0] BB40 M_CS#0
SB_DQ[23]
M_ODT2
30 BF16 AT43 30
32
31
29 BI M_A_DQ<18> BA13 SA_DQ[18] SA_CS#[1] BC41 M_CS#1
SB_DQ[24] SB_ODT[0]
M_ODT3
OUT
30 BE17 BG47
29 BI M_A_DQ<19> BB11 SA_DQ[19] BI M_B_DQ<26>
SB_DQ[25] SB_ODT[1]
1
OUT
30 BE18
29 BI M_A_DQ<20> BA7 SA_DQ[20] BI M_B_DQ<27>
SB_DQ[26]
TP24 TP4509
DDR SYSTEM MEMORY B

30 BE21
29 BI M_A_DQ<21> BA9 SA_DQ[21] BI M_B_DQ<28>
SB_DQ[27]
30 BE14
29 BI M_A_DQ<22> BB9 SA_DQ[22] BI M_B_DQ<29>
SB_DQ[28]
30 BG14
29 BI M_A_DQ<23> AY13 SA_DQ[23] BI M_B_DQ<30>
SB_DQ[29]
30 BG18
29 BI M_A_DQ<24> AV14 SA_DQ[24] SA_ODT[0] AY40 M_ODT0
OUT 29 BI SB_DQ[30]
M_A_DQ<25> M_ODT1 30 BI M_B_DQ<31> BF19 SB_DQ[31] SB_DQS#[0] AL3 M_B_DQS0_DN OUT 30

29 AR14 BA41 29
C BI M_A_DQ<26>
SA_DQ[25] SA_ODT[1] OUT 31 BI M_B_DQ<32> BD50 SB_DQ[32] SB_DQS#[1] AV3 M_B_DQS1_DN OUT 30 C
29 AY17
BI SA_DQ[26] M_B_DQ<33> BF48 BG11 M_B_DQS2_DN
DDR SYSTEM MEMORY A
M_A_DQ<27> AR19 31 BI SB_DQ[33] SB_DQS#[2] OUT 30

29 BI SA_DQ[27] M_B_DQ<34> BD53 BD17 M_B_DQS3_DN
M_A_DQ<28> BA14 31 BI SB_DQ[34] SB_DQS#[3] OUT 30
29 BI SA_DQ[28] M_B_DQ<35> BF52 BG51 M_B_DQS4_DN
M_A_DQ<29> AU14 31 BI SB_DQ[35] SB_DQS#[4] OUT 31
29 BI SA_DQ[29]
M_B_DQ<36> BD49 BA59 M_B_DQS5_DN
M_A_DQ<30> BB14 31 BI SB_DQ[36] SB_DQS#[5] OUT 31
29 BI SA_DQ[30]
M_B_DQ<37> BE49 AT60 M_B_DQS6_DN
M_A_DQ<31> BB17 AL11 M_A_DQS0_DN 31 BI SB_DQ[37] SB_DQS#[6] OUT 31
29 BI SA_DQ[31] SA_DQS#[0] OUT 29 M_B_DQ<38> BD54 AK59 M_B_DQS7_DN
M_A_DQ<32> BA45 AR8 M_A_DQS1_DN 31 BI SB_DQ[38] SB_DQS#[7] OUT 31
29 BI SA_DQ[32] SA_DQS#[1] OUT 29 M_B_DQ<39> BE53
M_A_DQ<33> AR43 AV11 M_A_DQS2_DN 31 BI SB_DQ[39]
29 BI SA_DQ[33] SA_DQS#[2] OUT 29 M_B_DQ<40> BF56
M_A_DQ<34> AW48 AT17 M_A_DQS3_DN 31 BI SB_DQ[40]
M_A_DQ<35> BC48 AV45 M_A_DQS4_DN 31 BI SB_DQ[41]
29 BI SA_DQ[35] SA_DQS#[4] OUT 29 M_B_DQ<42> BC59
M_A_DQ<36> BC45 AY51 M_A_DQS5_DN 31 BI SB_DQ[42]
29 BI SA_DQ[36] SA_DQS#[5] OUT 29 M_B_DQ<43> AY60
M_A_DQ<37> AR45 AT55 M_A_DQS6_DN 31 BI SB_DQ[43]
M_A_DQ<38> AT48 AK55 M_A_DQS7_DN 31 BI SB_DQ[44]
29 BI SA_DQ[38] SA_DQS#[7] OUT 29 M_B_DQ<45> BG54
M_A_DQ<39> AY48 31 BI SB_DQ[45]
29 BI SA_DQ[39] M_B_DQ<46> BA58 AM2 M_B_DQS0_DP
M_A_DQ<40> BA49 31 BI SB_DQ[46] SB_DQS[0] OUT 30
29 BI SA_DQ[40] M_B_DQ<47> AW59 AV1 M_B_DQS1_DP
M_A_DQ<41> AV49 31 BI SB_DQ[47] SB_DQS[1] OUT 30
29 BI SA_DQ[41] M_B_DQ<48> AW58 BE11 M_B_DQS2_DP
M_A_DQ<42> BB51 31 BI SB_DQ[48] SB_DQS[2] OUT 30
29 BI SA_DQ[42] M_B_DQ<49> AU58 BD18 M_B_DQS3_DP
M_A_DQ<43> AY53 31 BI SB_DQ[49] SB_DQS[3] OUT 30
29 BI SA_DQ[43]
M_B_DQ<50> AN61 BE51 M_B_DQS4_DP
M_A_DQ<44> BB49 31 BI SB_DQ[50] SB_DQS[4] OUT 31
29 BI SA_DQ[44]
M_B_DQ<51> AN59 BA61 M_B_DQS5_DP
M_A_DQ<45> AU49 AJ11 M_A_DQS0_DP 31 BI SB_DQ[51] SB_DQS[5] OUT 31
29 BI SA_DQ[45] SA_DQS[0] OUT 29 M_B_DQ<52> AU59 AR59 M_B_DQS6_DP
M_A_DQ<46> BA53 AR10 M_A_DQS1_DP 31 BI SB_DQ[52] SB_DQS[6] OUT 31
29 BI SA_DQ[46] SA_DQS[1] OUT 29 M_B_DQ<53> AU61 AK61 M_B_DQS7_DP
M_A_DQ<47> BB55 AY11 M_A_DQS2_DP 31 BI SB_DQ[53] SB_DQS[7] OUT 31
29 BI SA_DQ[47] SA_DQS[2] OUT 29 M_B_DQ<54> AN58
M_A_DQ<48> M_A_DQS3_DP 31 BI SB_DQ[54]
B 29 BI BA55 SA_DQ[48] SA_DQS[3] AU17
OUT 29
31 M_B_DQ<55> AR58 B
29 BI M_A_DQ<49> AV56 SA_DQ[49] SA_DQS[4] AW45 M_A_DQS4_DP OUT 29 BI M_B_DQ<56>
SB_DQ[55]
31 AK58
29 BI M_A_DQ<50> AP50 SA_DQ[50] SA_DQS[5] AV51 M_A_DQS5_DP OUT 29 BI M_B_DQ<57>
SB_DQ[56]
31 AL58
29 BI M_A_DQ<51> AP53 SA_DQ[51] SA_DQS[6] AT56 M_A_DQS6_DP OUT 29 BI M_B_DQ<58>
SB_DQ[57]
31 AG58
29 BI M_A_DQ<52> AV54 SA_DQ[52] SA_DQS[7] AK54 M_A_DQS7_DP OUT 29 BI M_B_DQ<59>
SB_DQ[58]
31 AG59
29 BI M_A_DQ<53> AT54 SA_DQ[53] BI M_B_DQ<60>
SB_DQ[59]
31 AM60
SB_DQ[60]
M_B_A<0>
31 AL59 BF32 30
32
31
SB_DQ[61] SB_MA[0]
M_B_A<1>
BI
31 AF61 BE33 32
31
30
29 BI M_A_DQ<56> AN57 SA_DQ[56] BI M_B_DQ<63>
SB_DQ[62] SB_MA[1]
M_B_A<2>
BI
31 AH60 BD33 32
31
30
29 BI M_A_DQ<57> AN53 SA_DQ[57] BI SB_DQ[63] SB_MA[2] BI
AU30 M_B_A<3> 32
31
30
29 BI M_A_DQ<58> AG56 SA_DQ[58]
SB_MA[3]
M_B_A<4>
BI
BD30 32
31
30
29 BI M_A_DQ<59> AG53 SA_DQ[59]
SB_MA[4]
M_B_A<5>
BI
AV30 32
31
30
29 BI M_A_DQ<60> AN55 SA_DQ[60]
SB_MA[5]
M_B_A<6>
BI
BG30 32
31
30
29 BI M_A_DQ<61> AN52 SA_DQ[61] SA_MA[0] BG35 M_A_A<0>
BI 29 M_B_BS0
SB_MA[6]
M_B_A<7>
BI
30
32
31 BG39 BD29 32
31
30
29 BI M_A_DQ<62> AG55 SA_DQ[62] SA_MA[1] BB34 M_A_A<1>
BI 29 OUT M_B_BS1
SB_BS[0] SB_MA[7]
M_B_A<8>
BI
32
31
30 BD42 BE30 32
31
30
29 BI M_A_DQ<63> AK56 SA_DQ[63] SA_MA[2] BE35 M_A_A<2>
BI 29 OUT M_B_BS2
SB_BS[1] SB_MA[8]
M_B_A<9>
BI
32
31
30 AT22 BE28 32
31
30
SA_MA[3] BD35 M_A_A<3>
BI 29 OUT SB_BS[2] SB_MA[9]
M_B_A<10>
BI
BD43 32
31
30
SA_MA[4] AT34 M_A_A<4>
BI 29
SB_MA[10]
M_B_A<11>
BI
AT28 32
31
30
SA_MA[5] AU34 M_A_A<5>
BI 29
SB_MA[11]
M_B_A<12>
BI
AV28 32
31
30
SA_MA[6] BB32 M_A_A<6>
BI 29 M_B_CAS#
SB_MA[12]
M_B_A<13>
BI
32
31
30 AV43 BD46 32
31
30
29 OUT M_A_BS0 BD37 SA_BS[0] SA_MA[7] AT32 M_A_A<7>
BI 29 OUT M_B_RAS#
SB_CAS# SB_MA[13]
M_B_A<14>
BI
32
31
30 BF40 AT26 32
31
30
29 OUT M_A_BS1 BF36 SA_BS[1] SA_MA[8] AY32 M_A_A<8>
BI 29 OUT M_B_WE#
SB_RAS# SB_MA[14]
M_B_A<15>
BI
32
31
30 BD45 AU22 32
31
30
29 OUT M_A_BS2 BA28 SA_BS[2] SA_MA[9] AV32 M_A_A<9>
BI 29 OUT SB_WE# SB_MA[15] BI
BE37 M_A_A<10> 29
SA_MA[10]
M_A_A<11>
BI
A SA_MA[11] BA30
BI 29 A
BC30 M_A_A<12> 29
M_A_CAS#
SA_MA[12]
M_A_A<13>
BI
29 BE39 AW41 29
OUT M_A_RAS#
SA_CAS# SA_MA[13]
M_A_A<14>
BI ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
29 BD39 AY28 29
OUT M_A_WE#
SA_RAS# SA_MA[14]
M_A_A<15>
BI
29 AT41 AU26 29
OUT SA_WE# SA_MA[15] BI
INVENTEC
TITLE
CPU-3/6
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
F F
U4500
P1V05S_VCCP
3.2A
PVCORE VCCIO[1] AF46
VCCIO[3] AG48
VCCIO[4] AG50
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
A26 VCC[1] VCCIO[5] AG51
C4579
C4584
C4588
C4592
C4596
C4600
C4530
C4535
C4540
C4545
C4550
C4556
C4562
A29 VCC[2] VCCIO[6] AJ17
1
A34 AJ25
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
C4504
C4509
C4514
C4519
C4524
C4529
C4534
C4539
C4544
C4549
C4555
C4546
VCC[4] VCCIO[8]
A35 AJ43
1
VCC[5] VCCIO[9]
2
A39 AK50
2
VCC[7] VCCIO[11]
A42 AK51
2
VCC[8] VCCIO[12]
C26 VCC[9] VCCIO[13] AL14
E C27 VCC[10] VCCIO[14] AL15 E
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
D27 VCC[16] VCCIO[20] AL48
C4580
C4585
C4589
C4568
C4563
C4598
C4513
C4518
D32 VCC[17] VCCIO[21] AM16
2
E26 VCC[22] VCCIO[26] AN20
E28 AN42
PEG AND DDR

VCC[23] VCCIO[27]
E37 VCC[26]
E38 VCC[27]
F25 VCC[28]
F26 VCC[29] P1V05S_VCCP
F28 VCC[30]
F32 VCC[31]
F34 3.9A
CORE SUPPLY
VCC[32]
F37 VCC[33] VCCIO[30] AA14
F38 VCC[34] VCCIO[31] AA15
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
F42 VCC[35] VCCIO[32] AB17
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
G42 VCC[36] VCCIO[33] AB20
C4601
C4604
C4607
C4610
C4613
C4516
C4521
C4526
C4528
D H25 VCC[37] VCCIO[34] AC13 D
H26 VCC[38] VCCIO[35] AD16
2
H32 VCC[41] VCCIO[38] AE14
H34 VCC[42] VCCIO[39] AE15
H35 VCC[43] VCCIO[40] AF16
H40 VCC[46] VCCIO[43] AG15
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
1
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
J25 VCC[47] VCCIO[44] AG16
C4502
C4507
C4512
C4517
C4522
C4527
C4532
C4537
C4542
C4547
C4552
C4558
C4564
C4570
C4501
C4582
C4587
C4591
C4595
C4599
J29 AG21
POWER
VCC[50] VCCIO[47]
J32 VCC[51] VCCIO[48] AJ14
2
2
J34 VCC[52] VCCIO[49] AJ15
J35 VCC[53]
J37 VCC[54]
J38 VCC[55]
J40 VCC[56]
J42 VCC[57]
K26 VCC[58] VCCIO50 W16
K27 VCC[59] VCCIO51 W17
2.2UF_6.3V_2
2.2UF_6.3V_2
1
K29 VCC[60]
C4503
C4508
K32 VCC[61]
K34 VCC[62]
K35 VCC[63]
C K37 VCC[64]
C
2
K39 VCC[66]
K42 BC22 VCCIO_SEL
QUIET RAILS
L25
VCC[67] VCCIO_SEL
OUT 12
VCC[68]
L28 VCC[69]
L33 VCC[70] P1V05S_VCCP
L36 VCC[71] P1V05S_VCCP
L40 VCC[72] 0.4A
N26 VCC[73]
1
N30 AM25
1UF_6.3V_2
VCC[74] VCCPQE[1]
CLOCE U6600
C4583
N34 VCC[75] VCCPQE[2] AN22
1
N38 VCC[76]
75_1%_2
2
130_1%_2
R4506
R4512
2
2
1
SVID
A44 H_CPU_SVIDALRT# R4509 1 2 43_5%_2 VR_SVID_ALERT#
VIDALERT#
B43 VR_SVID_CLK
OUT 15
VIDSCLK
C44 VR_SVID_DATA
OUT 15
VIDSOUT
OUT 15
PVCORE
100_1%_2
SENSE LINES
R4504
B B
2
F43 VCCSENSE
VCC_SENSE
G43 VSSSENSE
OUT 15
VSS_SENSE
OUT 15
100_1%_2
R4505
VCCIO_SENSE AN16 P1V05S_VCCP
VSS_SENSE_VCCIO AN17
10_1%_2
R4507
2
VTT_SENSE
VSS_SENSE_VTT
OUT 12
OUT 12
10_1%_2
R4508
2
A A
INVENTEC
TITLE
CPU-4/6
SIZE CODE DOC.NUMBER REV

C CS 1310xxxxx-0-0 X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P0V75M_VREF P0V75M_VREF_H
F P0V75S_DIMM0_VREF_DQ P0V75S_DIMM1_VREF_DQ F
1 R4519 2
1 R4515 2
0_5%_2_DY
0_5%_2_DY
DDR_WR_VREF01 2 3 28 IN DDR_WR_VREF02 2 S D 3
1K_5%_2_DY
28 IN S D 3 2
1K_5%_2_DY
AM2302N
1
D S
AM2302N
1
Q4501
Q4500
AM2302N
R4518
2.2UF_6.3V_3_DY
100K_5%_2
0.1UF_16V_2_DY
R4514
1
G
Q4502
R4594
C4497
1
1
DDR_RST_EN
C4498
R4596 2
1
DDR_RST_EN IN 27 1
2
IN 27 SLP_S3#_3R IN
2
3.3K_5%_2
P0V75M_VREF_H 57 35
470PF_50V_2
1
2
9 55 48
C4499
45 42 19
18 20 21
PVAXG U4500 TP4530
2
1
25A TP30
1
C4685
0.1uF_16V_2
AA46 VAXG[1]
AB47 VAXG[2]
1
AB50
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
VAXG[3]
C4638
C4644
C4651
C4658
C4665
C4672
AB51 AY43
2
VAXG[4] SM_VREF
AB52 VAXG[5]
AB53 VAXG[6]
RAILS
AB55 VAXG[7] P1V5S
E AB56 E
2
VAXG[8]
AB58 VAXG[9]
AB59 VAXG[10] VDDQ[1] AJ28
AC61 VAXG[11] VDDQ[2] AJ33 4.75A
1
AD47 AJ36
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
- 1.5V
VAXG[12] VDDQ[3]
C4677
C4679
C4681
C4683
C4686
C4500
C4505
C4510
C4515
C4520
AD48 VAXG[13] VDDQ[4] AJ40
AD50 VAXG[14] VDDQ[5] AL30
AD53 AL42
2
VAXG[17] VDDQ[8]
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
1
AD55 AM33
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
VAXG[18] VDDQ[9]
1
DDR3
C4659
C4666
C4673
AD56 VAXG[19] VDDQ[10] AM36
C4623
C4627
C4631
C4635
AD58 VAXG[20] VDDQ[11] AM40

AD59 VAXG[21] VDDQ[12] AN30
POWER
AE46 VAXG[22] VDDQ[13] AN34
N45 AN38
2
VAXG[23] VDDQ[14]
2
P47 VAXG[24] VDDQ[15] AR26

10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
1
100UF_6.3V
C4678
C4680
C4682
C4684
C4687
C4689
C4691
C4525
C4511
10UF_6.3V_3
10UF_6.3V_3
1

1
+
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
22UF_6.3V
C4640
C4646
C4653
C4660
C4667
C4674
C4632
C4636

1
1
P56 VAXG[31] VDDQ[22] AV41
P61 VAXG[32] VDDQ[23] AW26
2
2
2
T48 VAXG[33] VDDQ[24] BA40
2
2
T58 BB28
2
VAXG[34] VDDQ[25]
D T59 VAXG[35] VDDQ[26] BG33 D
T61 VAXG[36]
U46 VAXG[37]
GRAPHICS
V47 VAXG[38]
V48 VAXG[39]
V50 VAXG[40]
V51 VAXG[41]
V52 VAXG[42]
V53 VAXG[43]
1
1
1UF_6.3V_2
1UF_6.3V_2
V55 VAXG[44]
C4668
C4675
1
V56
470uF_2V
VAXG[45]
C4616
V58 VAXG[46]
+
V59 VAXG[47]
W50 VAXG[48]
2
W51 VAXG[49]
2
W52 VAXG[50]
W53 VAXG[51]
W55 VAXG[52]
W56 VAXG[53]
W61 VAXG[54]
Y48 VAXG[55]
PVAXG Y61
QUIET RAILS
VAXG[56]
2
10_5%_2
R4516
P1V5S
0.6A
C VCCDQ[1] AM28 C
GFX_VCC_SENSE F45 AN26
1
15 OUT VAXG_SENSE VCCDQ[2]
1
1UF_6.3V_2
GFX_VSS_SENSE G45
15 OUT VSSAXG_SENSE
C4676
SENSE
2
LINES
10_5%_2
R4517
2
1
P1V8S BB3 VCCPLL[1]

BC1 VCCPLL[2]
SENSE LINES
BC4 VCCPLL[3]
1.8V RAIL
0.93A
VDDQ_SENSE BC43 TP4500 1
TP24
1
BA43 TP4501 1
1uF_6.3V_2
1uF_6.3V_2
VSS_SENSE_VDDQ
1
TP24
22UF_6.3V
C4669
C4648
C4655
PVSA
1
L17 VCCSA[1]
L21 VCCSA[2] R4513
2
N16 VCCSA[3] 1 2
2
N20
2
VCCSA[4]
N22 100_5%_2_DY
VCCSA[5]
P17 VCCSA[6]
PVSA P20 U10 VCCSA_SENSE

R16
VCCSA[7] VCCSA_SENSE
OUT 14
SA RAIL
VCCSA[8]
R18 VCCSA[9]
B 4.5A R21 VCCSA[10] B
U15 VCCSA[11]
V16 VCCSA[12]
VCCSA_VID0
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
V17 D48
VCCSA[13] VCCSA_VID[0]
OUT 14
1
V18 D49 VCCSA_VID1

VCCSA[14] VCCSA_VID[1]
OUT 14
C4642
C4649
C4656
C4663
C4573
V21 VCCSA[15]
W20 VCCSA[16]
2
2
2
R4630 R4631
1K_5%_2
1K_5%_2
1
1
1
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
C4643
C4650
C4506
C4664
C4567
2
A A
INVENTEC
TITLE
CPU-5/6

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
F F
U4500
U4500 U4500
B50 BE7 BG17 M4 A13 AM38

CFG<0> OUT 1 C51
CFG[0] RSVD28
BG7
OUT DDR_WR_VREF01 27 BG21
VSS[181] VSS[251]
M58 A17
VSS[1] VSS[91]
AM4
TP4450 1 B54
CFG[1] RSVD29
OUT DDR_WR_VREF02 27 BG24
VSS[182] VSS[252]
M6 A21
VSS[2] VSS[92]
AM42
CFG[2] VSS[183] VSS[253] VSS[3] VSS[93]
TP4451 1 D53 BG28 N1 A25 AM45
TP4452 1 A51 N42 BG37 N17 A28 AM48
CFG[4] RSVD30 VSS[185] VSS[255] VSS[5] VSS[95]
TP4453 1 C53 L42 BG41 N21 A33 AM58
TP4454 1 C55 L45 BG45 N25 A37 AN1
TP4455 1 H49 L47 BG49 N28 A40 AN21
TP4456 1 A55 BG53 N33 A45 AN25
TP4457 1 H51 BG9 N36 A49 AN28
TP4458 1 K49 M13 C29 N40 A53 AN33
TP4459 1 K53 M14 C35 N43 A9 AN36
TP4460 1 F53 U14 C40 N47 AA1 AN40
TP4461 1 G53 W14 D10 N48 AA13 AN43
TP4462 1 L51 P13 D14 N51 AA50 AN47
TP4463 1 F51 D18 N52 AA51 AN50
RESERVED
E TP4464 1 D52 CFG[16] D22 VSS[197] VSS[267] N56 AA52 VSS[17] VSS[107] AN54 E
TP4465 1 L53 AT49 D26 N61 AA53 AP10
TP4466 K24 D29 P14 AA55 AP51
RSVD40 VSS[199] VSS[269] VSS[19] VSS[109]
D35 VSS[200] VSS[270] P16 AA56 VSS[20] VSS[110] AP55
H43 VCC_VAL_SENSE D4 VSS[201] VSS[271] P18 AA8 VSS[21] VSS[111] AP7
K43 VSS_VAL_SENSE RSVD41 AH2 D40 VSS[202] VSS[272] P21 AB16 VSS[22] VSS[112] AR13
RSVD42
RSVD43
AG13
AM14
D43
D46
VSS[203]
VSS[204]
VSS VSS[273]
VSS[274]
P58
P59
AB18
AB21
VSS[23]
VSS[24]
VSS[113]
VSS[114]
AR17
AR21
H45 VAXG_VAL_SENSE RSVD44 AM15 D50 VSS[205] VSS[275] P9 AB48 VSS[25] VSS[115] AR41
K45 VSSAXG_VAL_SENSE D54 VSS[206] VSS[276] R17 AB61 VSS[26] VSS[116] AR48
D58 VSS[207] VSS[277] R20 AC10 VSS[27] VSS[117] AR61
RSVD45 N50 D6 VSS[208] VSS[278] R4 AC14 VSS[28] VSS[118] AR7
F48 VCC_DIE_SENSE E25 VSS[209] VSS[279] R46 AC46 VSS[29] VSS[119] AT14
E29 VSS[210] VSS[280] T1 AC6 VSS[30] VSS[120] AT19
E3 VSS[211] VSS[281] T47 AD17 VSS[31] VSS[121] AT36
H48 RSVD6 E35 VSS[212] VSS[282] T50 AD20 VSS[32] VSS[122] AT4
K48 RSVD7
DC_TEST_A4 A4
E40
F13
VSS[213]
VSS[214]
VSS[283]
VSS[284]
T51
T52
AD4
AD61
VSS[33]
VSS[34]
VSS VSS[123]
VSS[124]
AT45
AT52
DC_TEST_C4 C4 F15 VSS[215] VSS[285] T53 AE13 VSS[35] VSS[125] AT58
BA19 RSVD8 DC_TEST_D3 D3 F19 VSS[216] VSS[286] T55 AE8 VSS[36] VSS[126] AU1
AV19 RSVD9 DC_TEST_D1 D1 F29 VSS[217] VSS[287] T56 AF1 VSS[37] VSS[127] AU11
AT21 RSVD10 DC_TEST_A58 A58 F35 VSS[218] VSS[288] U13 AF17 VSS[38] VSS[128] AU28
BB21 RSVD11 DC_TEST_A59 A59 F40 VSS[219] VSS[289] U8 AF21 VSS[39] VSS[129] AU32
BB19 RSVD12 DC_TEST_C59 C59 F55 VSS[220] VSS[290] V20 AF47 VSS[40] VSS[130] AU51
AY21 RSVD13 DC_TEST_A61 A61 G48 VSS[221] VSS[291] V61 AF48 VSS[41] VSS[131] AU7
BA22 RSVD14 DC_TEST_C61 C61 G51 VSS[222] VSS[292] W13 AF50 VSS[42] VSS[132] AV17
AY22 RSVD15 DC_TEST_D61 D61 G6 VSS[223] VSS[293] W15 AF51 VSS[43] VSS[133] AV21
D AU19 RSVD16 DC_TEST_BD61 BD61 G61 VSS[224] VSS[294] W18 AF52 VSS[44] VSS[134] AV22 D
AU21 RSVD17 DC_TEST_BE61 BE61 H10 VSS[225] VSS[295] W21 AF53 VSS[45] VSS[135] AV34
BD21 RSVD18 DC_TEST_BE59 BE59 H14 VSS[226] VSS[296] W46 AF55 VSS[46] VSS[136] AV40
BD22 RSVD19 DC_TEST_BG61 BG61 H17 VSS[227] VSS[297] W8 AF56 VSS[47] VSS[137] AV48
BD25 RSVD20 DC_TEST_BG59 BG59 H21 VSS[228] VSS[298] Y4 AF58 VSS[48] VSS[138] AV55
BD26 RSVD21 DC_TEST_BG58 BG58 H4 VSS[229] VSS[299] Y47 AF59 VSS[49] VSS[139] AW13
BG22 RSVD22 DC_TEST_BG4 BG4 H53 VSS[230] VSS[300] Y58 AG10 VSS[50] VSS[140] AW43
BE22 RSVD23 DC_TEST_BG3 BG3 H58 VSS[231] VSS[301] Y59 AG14 VSS[51] VSS[141] AW61
BG26 RSVD24 DC_TEST_BE3 BE3 J1 VSS[232] AG18 VSS[52] VSS[142] AW7
BE26 RSVD25 DC_TEST_BG1 BG1 J49 VSS[233] AG47 VSS[53] VSS[143] AY14
BF23 RSVD26 DC_TEST_BE1 BE1 J55 VSS[234] AG52 VSS[54] VSS[144] AY19
BE24 RSVD27 DC_TEST_BD1 BD1 K11 VSS[235] AG61 VSS[55] VSS[145] AY30
K21 VSS[236] AG7 VSS[56] VSS[146] AY36
K51 VSS[237] VSS_NCTF_1 A5 AH4 VSS[57] VSS[147] AY4
K8 VSS[238] VSS_NCTF_2 A57 AH58 VSS[58] VSS[148] AY41
L16 VSS[239] VSS_NCTF_3 BC61 AJ13 VSS[59] VSS[149] AY45
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P L20 BD3 AJ16 AY49
NCTF
VSS[240] VSS_NCTF_4 VSS[60] VSS[150]
L22 VSS[241] VSS_NCTF_5 BD59 AJ20 VSS[61] VSS[151] AY55
L26 VSS[242] VSS_NCTF_6 BE4 AJ22 VSS[62] VSS[152] AY58
L30 VSS[243] VSS_NCTF_7 BE58 AJ26 VSS[63] VSS[153] AY9
L34 VSS[244] VSS_NCTF_8 BG5 AJ30 VSS[64] VSS[154] BA1
L38 VSS[245] VSS_NCTF_9 BG57 AJ34 VSS[65] VSS[155] BA11
L43 VSS[246] VSS_NCTF_10 C3 AJ38 VSS[66] VSS[156] BA17
L48 VSS[247] VSS_NCTF_11 C58 AJ42 VSS[67] VSS[157] BA21
L61 VSS[248] VSS_NCTF_12 D59 AJ45 VSS[68] VSS[158] BA26
M11 VSS[249] VSS_NCTF_13 E1 AJ48 VSS[69] VSS[159] BA32
M15 VSS[250] VSS_NCTF_14 E61 AJ7 VSS[70] VSS[160] BA48
C AK1 VSS[71] VSS[161] BA51 C
AK52 VSS[72] VSS[162] BB53
AL10 VSS[73] VSS[163] BC13
AL13 VSS[74] VSS[164] BC5
AL17 VSS[75] VSS[165] BC57
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P AL21 VSS[76] VSS[166] BD12
AL25 VSS[77] VSS[167] BD16
AL28 VSS[78] VSS[168] BD19
AL33 VSS[79] VSS[169] BD23
AL36 VSS[80] VSS[170] BD27
AL40 VSS[81] VSS[171] BD32
AL43 VSS[82] VSS[172] BD36
AL47 VSS[83] VSS[173] BD40
AL61 VSS[84] VSS[174] BD44
AM13 VSS[85] VSS[175] BD48
AM20 VSS[86] VSS[176] BD52
AM22 VSS[87] VSS[177] BD56
AM26 VSS[88] VSS[178] BD8
AM30 VSS[89] VSS[179] BE5
AM34 VSS[90] VSS[180] BG13
CFG[2] : PCI Express* Static x16 Lane Numbering Reversal.

1 = NORMAL MODE
0 = LANE REVERSED ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
B B
CFG[4] : eDP enable

1 = Disabled
0 = Enabled
CFG[6:5] : PCI Express Bifurcation:
00 = 1 x8, 2 x4 PCI Expres
01 = reserved
10 = 2 x8 PCI Express
11 = 1 x16 PCI Express
CFG[7] :PEG DEFER TRAINING
1: (Default) PEG Train immediately following RESETB deassertion
0: PEG Wait for BIOS for training
A A
INVENTEC
TITLE
CPU-6/6

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
F F
25 CN4100 25 P1V5
M_A_A<15..0> BI 0 98 A0 DQ0 5 4 BI M_A_DQ<63..0>
1 97 A1 DQ1 7 5
96 15 CN4100
2 A2 DQ2 2
75 VDD1 VSS16 44
3 95 A3 DQ3 17 7
76 VDD2 VSS17 48
4 92 4 0
2.2UF_6.3V_3
A4 DQ4 81 49
12PF_50V_2
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
1
1
3PF_50V_2
91 6 VDD3 VSS18
1
5 1
330UF_2.5V
A5 DQ5 82 54
C4146
C4147
C4148
90 16 VDD4 VSS19
C4106
C4113
C4117
C4118
C4115
C4109
6 A6 DQ6 3
87 VDD5 VSS20 55
86 18
+
7 A7 DQ7 6
88 VDD6 VSS21 60
8 89 A8 DQ8 21 13
93 VDD7 VSS22 61
9 85 A9 DQ9 23 9
94 65
2
107 33 VDD8 VSS23
10 11
2
2
A10_AP DQ10 99 66
84 35 VDD9 VSS24
11 A11 DQ11 15
100 VDD10 VSS25 71
12 83 A12 DQ12 22 8
105 VDD11 VSS26 72
13 119 A13 DQ13 24 12
106 VDD12 VSS27 127
14 80 A14 DQ14 34 10
111 128
10UF_6.3V_3
78 36 VDD13 VSS28
1
15 14
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
A15 DQ15 112 133
39 VDD14 VSS29
C4108
C4114
C4116
C4112
C4107
DQ16 21 117 134
109 41 VDD15 VSS30
20
25 M_A_BS0IN 108
BA0 DQ17
51 22
118 VDD16 VSS31 138
25 M_A_BS1IN 79
BA1 DQ18
53 18
123 VDD17 VSS32 139
25 M_A_BS2IN 114
BA2 DQ19
40 16
124 VDD18 VSS33 144
2
25 M_CS#0
IN 121
S0# DQ20
42 17 VSS34 145
25 M_CS#1
IN S1# DQ21 199 150
101 50 VDDSPD VSS35
19
25 M_CLK_DDR0_DP IN 103
CK0 DQ22
52 VSS36 151
23
25 M_CLK_DDR0_DN IN 102
CK0# DQ23
57 P3V3S 77 NC1 VSS37 155
24
25 M_CLK_DDR1_DP IN 104
CK1 DQ24
59
122 NC2 VSS38 156
E IN CK1# DQ25 29 E
25 M_CLK_DDR1_DN 73 67 26
125 NCTEST VSS39 161
25 M_CKE0 IN CKE0 DQ26 162
74 69 VSS40
25 M_CKE1 31
IN CKE1 DQ27 198 167
25 M_A_CAS# IN 115 CAS# DQ28 56 30 PM_EXTTS#1_R OUT 30
EVENT# VSS41
168
110 58 P0V75M_VREF 31
23
30 DDR3_DRAMRST# OUT RESET# VSS42
2.2UF_6.3V_3
25 M_A_RAS# IN RAS# DQ29 28
0.1UF_16V_2
172
12PF_50V_2
1
1
113 68 VSS43
25 M_A_WE# IN WE# DQ30 27
173
C4149
C4105
197 70 VSS44
29 SA0_DIM0 25
OUT SA0 DQ31 1 178
C4104
201 129 VREF_DQ VSS45
29 SA1_DIM0 36
OUT 202
SA1 DQ32
131
126 VREF_CA VSS46 179
35
PCH_3S_SMCLK IN SCL DQ33 184
2.2UF_6.3V_3
56 47 34 32 VSS47
0.1UF_16V_2
200 141
1
37
PCH_3S_SMDATA IN SDA DQ34 185
2
47 56 34 32 143 VSS48
C4120
DQ35 38
2 VSS1 VSS49 189
C4119
116 130 32
25 M_ODT0 IN 120
ODT0 DQ36
132 33
3 VSS2 VSS50 190
25 M_ODT1 IN ODT1 DQ37
140 39
8 VSS3 VSS51 195
DQ38 9 196
11 142 VSS4 VSS52
34
2
DM0 DQ39 13
28 147 VSS5
DM1 DQ40 41 14
46 149 VSS6
DM2 DQ41 42 19
63 157 45 VSS7 P0V75S
DM3 DQ42 P0V75M_VREF 20 VSS8
136 DM4 DQ43 159 43
25 VSS9
153 DM5 DQ44 146 40
26 VSS10 VTT1 203
170 DM6 DQ45 148 44
31 VSS11 VTT2 204
187 DM7 DQ46 158 46
32
2.2UF_6.3V_3
VSS12
0.1UF_16V_2
160
1
DQ47 47
37 VSS13 G1 G1
12 163
C4111
52
25 M_A_DQS0_DP BI 29
DQS0 DQ48
165
38 VSS14 G2 G2
C4110
54
DQS1 DQ49
175
43 VSS15
50
DQS2 DQ50
177 P3V3S
55
DQS3 DQ51
164
D 48 D
2
25 M_A_DQS4_DP BI DQS4 DQ52 FOX_AS0A626_U4RG_7H_204P
154 166
10K_5%_2_DY
49
DQS5 DQ53
174
1
51
DQS6 DQ54
176 53
DQS7 DQ55
181 NOTE:
R4103
63
25 M_A_DQS0_DN BI 27
DQS#0 DQ56
183 60
DQS#1 DQ57
191 59
DQS#2 DQ58
193 IF SA0_DIM0=0 , SA1_DIM0=0
61
2
25 M_A_DQS3_DN BI DQS#3 DQ59
25 M_A_DQS4_DN BI 135 DQS#4 DQ60 180 57 SO-DIMMA SPD ADDRESS IS 0XA0
152 182 56
DQS#5 DQ61
192 62 SO-DIMMA TS ADDRESS IS 0X30 IN SA0_DIM0 29
DQS#6 DQ62
194 P0V75S
58
25 M_A_DQS7_DN BI DQS#7 DQ63 IN SA1_DIM0 29
FOX_AS0A626_U4RG_7H_204P IF SA0_DIM0=1 , SA1_DIM0=0

SO-DIMMA SPD ADDRESS IS 0XA2
1
0_5%_2
0_5%_2
SO-DIMMA TS ADDRESS IS 0X32
R4101
R4100
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
C4100
C4103
C4102
C4101
2
2
C C
B B
A A
INVENTEC
TITLE
DDR3_SO-DIMM0

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DDR3_B_0
U4104
M_CS#2 L2 E3 M_B_DQ<0>
32 31 30 25 IN DDR3_DRAMRST# T2
C\S\ DQL0
F7 M_B_DQ<1>
BI 25
31 30 29 23 IN M_B_RAS# J3
R\E\S\E\T\ DQL1
F2 M_B_DQ<2>
BI 25
32 31 30 25 IN M_B_CAS# K3
R\A\S\ DQL2
F8 M_B_DQ<3>
BI 25
32 31 30 25 IN M_B_WE# L3
C\A\S\ DQL3
H3 M_B_DQ<4>
BI 25
32 31 30 25 IN W\E\ DQL4
BI 25
F DQL5 H8 M_B_DQ<5>
BI 25 F
G2 M_B_DQ<6>
DQL6
H7 M_B_DQ<7>
BI 25
M_CLK_DDR2_DP J7
DQL7
BI 25
32 31 30 25 IN M_CLK_DDR2_DN K7
CK
D7 M_B_DQ<8>
32 31 30 25 IN M_CKE2 K9
C\K\ DQ8
C3 M_B_DQ<9>
BI 25
32 31 30 25 IN CKE DQ9
C8M_B_DQ<10>
BI 25
DQ10
C2M_B_DQ<11>
BI 25
DQ11
A7 M_B_DQ<12>
BI 25
DQ12
A2 M_B_DQ<13>
BI 25
D3
DQ13
B8 M_B_DQ<14>
BI 25
E7
UDM DQ14
A3 M_B_DQ<15>
BI 25
LDM DQ15
BI 25
N3 M_B_A<0>
M_B_DQS1_DN B7
A0
P7 M_B_A<1>
BI 25 30 31 32
25 IN M_B_DQS1_DP C7
U\D\Q\S\ A1
P3 M_B_A<2>
BI 25 30 31 32
25 IN UDQS A2
N2 M_B_A<3>
BI 25 30 31 32
A3
P8 M_B_A<4>
BI 25 30 31 32
A4
P2 M_B_A<5>
BI 25 30 31 32
M_B_DQS0_DP F3
A5
R8 M_B_A<6>
BI 25 30 31 32
25 IN M_B_DQS0_DN G3
LDQS A6
R2 M_B_A<7>
BI 25 30 31 32
25 IN L\D\Q\S\ A7
T8 M_B_A<8>
BI 25 30 31 32
A8
R3 M_B_A<9>
BI 25 30 31 32
A9
L7 M_B_A<10>
BI 25 30 31 32
M_ODT2 K1
A10/AP
R7 M_B_A<11>
BI 25 30 31 32
R4116 32 31 30 25 IN ODT A11
BI 25 30 31 32
1 2 L8 N7 M_B_A<12>
ZQ A12/B\C\
T3 M_B_A<13>
BI 25 30 31 32
A13
T7 M_B_A<14>
BI 25 30 31 32
240_1%_1 A14
BI 25 30 31 32
E M7 M_B_A<15> E
A9
A15
BI 25 30 31 32
VSS_1
P1V5 B3 M2 M_B_BS0
E1
VSS_2 BA0
N8 M_B_BS1
IN 25 30 31 32
G8
VSS_3 BA1
M3 M_B_BS2
IN 25 30 31 32
J2
VSS_4 BA2
IN 25 30 31 32
P1V5
VSS_5
J8 VSS_6
M1 VSS_7 VDD_1 B2
1
1
M9 VSS_8 VDD_2 D9
1
1
C4124 C4123 C4122 C4121 C1 C2 C3 C4 P1 VSS_9 VDD_3 G7
P9 VSS_10 VDD_4 K2
T1 VSS_11 VDD_5 K8
1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 T9 VSS_12 VDD_6 N1
1UF_6.3V_2 1UF_6.3V_2 N9
2
2
VDD_7
2
VDD_8 R1
B1 VSSQ_1 VDD_9 R9
B9 VSSQ_2
D1 VSSQ_3
D8 VSSQ_4 VDDQ_1 A1
E2 VSSQ_5 VDDQ_2 A8
E8 VSSQ_6 VDDQ_3 C1
F9 VSSQ_7 VDDQ_4 C9
G1 VSSQ_8 VDDQ_5 D2
G9 VSSQ_9 VDDQ_6 E9
VDDQ_7 F1
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
VDDQ_8 H2
1
J1 NC_1 VDDQ_9 H9
C4135
C4136
C4137
C4138
C4139
C4140
C4141
C4142
D J9 NC_2 P0V75M_VREF D
L1 NC_3
L9 NC_4/ZQ1 VREFDQ H1
VREFCA M8
2
MICRON_MT41K512M16_FBGA_96P
DDR3_B_1
U4105
1
1
1
C4143 C4144 C4145 C4150 C4151 C4152 C4153 C4154 M_CS#2 L2 E3 M_B_DQ<16>
C\S\ DQL0
F7 M_B_DQ<17>
BI 25
31 30 29 23 IN M_B_RAS# J3
R\E\S\E\T\ DQL1
F2 M_B_DQ<18>
BI 25
1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2

32 31 30 25 IN M_B_CAS# K3
R\A\S\ DQL2
F8 M_B_DQ<19>
BI 25
1UF_6.3V_2 1UF_6.3V_2 32 31 30 25 IN C\A\S\ DQL3
BI 25
2
M_B_WE# L3 H3 M_B_DQ<20>
2
32 31 30 25 IN W\E\ DQL4
H8 M_B_DQ<21>
BI 25
DQL5
G2 M_B_DQ<22>
BI 25
DQL6
H7 M_B_DQ<23>
BI 25
M_CLK_DDR2_DP
DQL7
BI 25
C 32 31 30 25 IN J7 CK C
M_CLK_DDR2_DN K7 D7 M_B_DQ<24>
32 31 30 25 IN M_CKE2 K9
C\K\ DQ8
C3 M_B_DQ<25>
BI 25
32 31 30 25 IN CKE DQ9
C8 M_B_DQ<26>
BI 25
DQ10
C2 M_B_DQ<27>
BI 25
DQ11
A7 M_B_DQ<28>
BI 25
DQ12
A2 M_B_DQ<29>
BI 25
D3
DQ13
B8 M_B_DQ<30>
BI 25
E7
UDM DQ14
A3 M_B_DQ<31>
BI 25
LDM DQ15
BI 25
N3 M_B_A<0>
M_B_DQS3_DN B7
A0
P7 M_B_A<1>
BI 25 30 31 32
U\D\Q\S\ A1
P3 M_B_A<2>
BI 25 30 31 32
25 IN UDQS A2
N2 M_B_A<3>
BI 25 30 31 32
A3
P8 M_B_A<4>
BI 25 30 31 32
A4
P2 M_B_A<5>
BI 25 30 31 32
M_B_DQS2_DP F3
A5
R8 M_B_A<6>
BI 25 30 31 32
LDQS A6
R2 M_B_A<7>
BI 25 30 31 32
25 IN L\D\Q\S\ A7
T8 M_B_A<8>
BI 25 30 31 32
A8
R3 M_B_A<9>
BI 25 30 31 32
A9
L7 M_B_A<10>
BI 25 30 31 32
M_ODT2 K1
A10/AP
R7 M_B_A<11>
BI 25 30 31 32
R2 32 31 30 25 IN ODT A11
BI 25 30 31 32
1 2 L8 N7 M_B_A<12>
ZQ A12/B\C\
T3 M_B_A<13>
BI 25 30 31 32
A13
T7 M_B_A<14>
BI 25 30 31 32
240_1%_1 A14
BI 25 30 31 32
M7 M_B_A<15>
A15
BI 25 30 31 32
B P0V75M_VREF A9 VSS_1 B
B3 M2 M_B_BS0
E1
VSS_2 BA0
N8 M_B_BS1
IN 25 30 31 32
G8
VSS_3 BA1
M3 M_B_BS2
IN 25 30 31 32
J2
VSS_4 BA2
IN 25 30 31 32
P1V5
VSS_5
J8 VSS_6
M1 VSS_7 VDD_1 B2
M9 VSS_8 VDD_2 D9
1
P1 VSS_9 VDD_3 G7
C4126 C4125 C4128 C4127 P9 VSS_10 VDD_4 K2
T1 VSS_11 VDD_5 K8
T9 VSS_12 VDD_6 N1
0.1UF_16V_2 0.1UF_16V_2 N9
VDD_7
0.1UF_16V_2 0.1UF_16V_2 R1
2
VDD_8
B1 VSSQ_1 VDD_9 R9
B9 VSSQ_2
D1 VSSQ_3
D8 VSSQ_4 VDDQ_1 A1
E2 VSSQ_5 VDDQ_2 A8
E8 VSSQ_6 VDDQ_3 C1
F9 VSSQ_7 VDDQ_4 C9
G1 VSSQ_8 VDDQ_5 D2
G9 VSSQ_9 VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
J1 NC_1 VDDQ_9 H9
J9 NC_2 P0V75M_VREF
A L1 NC_3 A
VREFCA M8
INVENTEC
TITLE
MICRON_MT41K512M16_FBGA_96P MODEL,PROJECT,FUNCTION
35_DDR3L-2

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DDR3L_B_2 U4106
M_CS#2 L2 E3 M_B_DQ<32>
C\S\ DQL0
F7 M_B_DQ<33>
BI 25
31 30 29 23 IN M_B_RAS# J3
R\E\S\E\T\ DQL1
F2 M_B_DQ<34>
BI 25
32 31 30 25 IN M_B_CAS# K3
R\A\S\ DQL2
F8 M_B_DQ<35>
BI 25
32 31 30 25 IN M_B_WE# L3
C\A\S\ DQL3
H3 M_B_DQ<36>
BI 25
F 32 31 30 25 IN W\E\ DQL4
H8 M_B_DQ<37>
BI 25
F
DQL5
G2 M_B_DQ<38>
BI 25
DQL6
H7 M_B_DQ<39>
BI 25
M_CLK_DDR2_DP J7
DQL7
BI 25
32 31 30 25 IN M_CLK_DDR2_DN K7
CK
D7 M_B_DQ<40>
32 31 30 25 IN M_CKE2 K9
C\K\ DQ8
C3 M_B_DQ<41>
BI 25
32 31 30 25 IN CKE DQ9
C8 M_B_DQ<42>
BI 25
DQ10
C2 M_B_DQ<43>
BI 25
DQ11
A7 M_B_DQ<44>
BI 25
DQ12
A2 M_B_DQ<45>
BI 25
D3
DQ13
B8 M_B_DQ<46>
BI 25
E7
UDM DQ14
A3 M_B_DQ<47>
BI 25
LDM DQ15
BI 25
N3 M_B_A<0>
M_B_DQS5_DN B7
A0
P7 M_B_A<1>
BI 25 30 31 32
U\D\Q\S\ A1
P3 M_B_A<2>
BI 25 30 31 32
25 IN UDQS A2
N2 M_B_A<3>
BI 25 30 31 32
A3
P8 M_B_A<4>
BI 25 30 31 32
A4
P2 M_B_A<5>
BI 25 30 31 32
M_B_DQS4_DP F3
A5
R8 M_B_A<6>
BI 25 30 31 32
LDQS A6
R2 M_B_A<7>
BI 25 30 31 32
25 IN L\D\Q\S\ A7
T8 M_B_A<8>
BI 25 30 31 32
A8
R3 M_B_A<9>
BI 25 30 31 32
A9
L7 M_B_A<10>
BI 25 30 31 32
M_ODT2 K1
A10/AP
R7 M_B_A<11>
BI 25 30 31 32
R6 32 31 30 25 IN ODT A11
BI 25 30 31 32
1 2 L8 N7 M_B_A<12>
ZQ A12/B\C\
T3 M_B_A<13>
BI 25 30 31 32
A13
T7 M_B_A<14>
BI 25 30 31 32
240_1%_1 A14
BI 25 30 31 32
E M7 M_B_A<15> E
A9
A15
BI 25 30 31 32
VSS_1
B3 M2 M_B_BS0
E1
VSS_2 BA0
N8 M_B_BS1
IN 25 30 31 32
G8
VSS_3 BA1
M3 M_B_BS2
IN 25 30 31 32
J2
VSS_4 BA2
IN 25 30 31 32
P1V5
VSS_5
J8 VSS_6
M1 VSS_7 VDD_1 B2
M9 VSS_8 VDD_2 D9
P1 VSS_9 VDD_3 G7
P9 VSS_10 VDD_4 K2
T1 VSS_11 VDD_5 K8
T9 VSS_12 VDD_6 N1
VDD_7 N9
VDD_8 R1
B1 VSSQ_1 VDD_9 R9
B9 VSSQ_2
D1 VSSQ_3
D8 VSSQ_4 VDDQ_1 A1
E2 VSSQ_5 VDDQ_2 A8
E8 VSSQ_6 VDDQ_3 C1
F9 VSSQ_7 VDDQ_4 C9
G1 VSSQ_8 VDDQ_5 D2
G9 VSSQ_9 VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
J1 NC_1 VDDQ_9 H9
D J9 NC_2 P0V75M_VREF D
L1 NC_3
VREFCA M8
DDR3L_B_3
U4107
M_CS#2 L2 E3 M_B_DQ<48>
C\S\ DQL0
F7 M_B_DQ<49>
BI 25
31 30 29 23 IN M_B_RAS# J3
R\E\S\E\T\ DQL1
F2 M_B_DQ<50>
BI 25
32 31 30 25 IN M_B_CAS# K3
R\A\S\ DQL2
F8 M_B_DQ<51>
BI 25
32 31 30 25 IN M_B_WE# L3
C\A\S\ DQL3
H3 M_B_DQ<52>
BI 25
32 31 30 25 IN W\E\ DQL4
H8 M_B_DQ<53>
BI 25
DQL5
G2 M_B_DQ<54>
BI 25
DQL6
H7 M_B_DQ<55>
BI 25
C J7
DQL7
BI 25
C
32 31 30 25 IN M_CLK_DDR2_DP CK
M_CLK_DDR2_DN K7 D7 M_B_DQ<56>
32 31 30 25 IN M_CKE2 K9
C\K\ DQ8
C3 M_B_DQ<57>
BI 25
32 31 30 25 IN CKE DQ9
C8 M_B_DQ<58>
BI 25
DQ10
C2 M_B_DQ<59>
BI 25
DQ11
A7 M_B_DQ<60>
BI 25
DQ12
A2 M_B_DQ<61>
BI 25
D3
DQ13
B8 M_B_DQ<62>
BI 25
E7
UDM DQ14
A3 M_B_DQ<63>
BI 25
LDM DQ15
BI 25
N3 M_B_A<0>
M_B_DQS7_DN B7
A0
P7 M_B_A<1>
BI 25 30 31 32
U\D\Q\S\ A1
P3 M_B_A<2>
BI 25 30 31 32
25 IN UDQS A2
N2 M_B_A<3>
BI 25 30 31 32
A3
P8 M_B_A<4>
BI 25 30 31 32
A4
P2 M_B_A<5>
BI 25 30 31 32
P0V75M_VREF A5
BI 25 30 31 32
M_B_DQS6_DP F3 R8 M_B_A<6>
LDQS A6
R2 M_B_A<7>
BI 25 30 31 32
25 IN L\D\Q\S\ A7
T8 M_B_A<8>
BI 25 30 31 32
A8
R3 M_B_A<9>
BI 25 30 31 32
A9
L7 M_B_A<10>
BI 25 30 31 32
M_ODT2 K1
A10/AP
R7 M_B_A<11>
BI 25 30 31 32
R5 32 31 30 25 IN ODT A11
BI 25 30 31 32
1 2 L8 N7 M_B_A<12>
ZQ A12/B\C\
M_B_A<13>
BI 25 30 31 32
1
T3
A13
T7 M_B_A<14>
BI 25 30 31 32
C4129 C4130 C4131 C4132 240_1%_1 A14
BI 25 30 31 32
M7 M_B_A<15>
B A9
A15
BI 25 30 31 32
B
VSS_1
0.1UF_16V_2 0.1UF_16V_2 B3 M2 M_B_BS0
E1
VSS_2 BA0
N8 M_B_BS1
IN 25 30 31 32
0.1UF_16V_2 0.1UF_16V_2
2
G8
VSS_3 BA1
M3 M_B_BS2
IN 25 30 31 32
J2
VSS_4 BA2
IN 25 30 31 32
P1V5
VSS_5
J8 VSS_6
M1 VSS_7 VDD_1 B2
M9 VSS_8 VDD_2 D9
P1 VSS_9 VDD_3 G7
P9 VSS_10 VDD_4 K2
T1 VSS_11 VDD_5 K8
T9 VSS_12 VDD_6 N1
VDD_7 N9
VDD_8 R1
B1 VSSQ_1 VDD_9 R9
B9 VSSQ_2
D1 VSSQ_3
D8 VSSQ_4 VDDQ_1 A1
E2 VSSQ_5 VDDQ_2 A8
E8 VSSQ_6 VDDQ_3 C1
F9 VSSQ_7 VDDQ_4 C9
G1 VSSQ_8 VDDQ_5 D2
G9 VSSQ_9 VDDQ_6 E9
VDDQ_7 F1
VDDQ_8 H2
J1 NC_1 VDDQ_9 H9
J9 NC_2 P0V75M_VREF
A L1 NC_3
A
INVENTEC
VREFCA M8
TITLE
36_DDR3L-3

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P0V75S
R4227
1 36_1%_2
2 M_CKE2
IN 25 30 31
R4228
1 36_1%_2
2 M_ODT2
IN 25 30 31
R4229
1 36_1%_2
2 M_CS#2
F IN 25 30 31
F
R4230
1 36_1%_2
2 M_B_WE#
IN 25 30 31
R4231
1 36_1%_2
2 M_B_CAS#
IN 25 30 31
R4232 M_B_RAS#
1 36_1%_2
2
IN 25 30 31
R4233
1 36_1%_2
2 M_B_BS0
IN 25 30 31
R4234
1 36_1%_2
2 M_B_BS1
IN 25 30 31
R4235
1 36_1%_2
2 M_B_BS2
IN 25 30 31
M_B_A<15..0>
BI
R4236
1 36_1%_2
2 M_B_A<0> 0
R4237
1 36_1%_2
2 M_B_A<1> 1
R4238
1 36_1%_2
2 M_B_A<2> 2
R4239
1 36_1%_2
2 M_B_A<3> 3 R4251
M_CLK_DDR2_DP 1 2
31 30 25 IN
E R4240
36_1%_2
E
1 2 M_B_A<4> 4 30_1%_2
R4241
1 36_1%_2
2 M_B_A<5>
1
5
C4203
R4242
1 36_1%_2
2 M_B_A<6> 6
1.6PF_25V_1
R4243
1 36_1%_2
2 M_B_A<7> 7
2
R4244
1 36_1%_2
2 M_B_A<8> 8
R4252
R4245 M_CLK_DDR2_DN 1 2
1 36_1%_2
2 M_B_A<9>
31 30 25 IN
9
30_1%_2
0.1UF_16V_2
1
R4246
1 36_1%_2
2 M_B_A<10>
C4202
10
R4247
1 36_1%_2
2 M_B_A<11> 11
2
R4248
1 36_1%_2
2 M_B_A<12> 12
R4249
1 36_1%_2
2 M_B_A<13> 13
R4225
1 36_1%_2
2 M_B_A<14> 14
D R4226
D
1 36_1%_2
2 M_B_A<15> 15
P0V75S
1
1
C4209 C4208 C4207 C4206
1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2
2
2
C C
P0V75S
1
C4215 C4214 C4211 C4210
1UF_6.3V_2_DY 1UF_6.3V_2_DY 1UF_6.3V_2_DY 1UF_6.3V_2_DY

2
2
B B
P3V3S
2.2UF_6.3V_2
0.1UF_16V_2
SPD ADDRESS=30 HEX FOR MEMORY DOWN A

1
1
10K_5%_2_DY
C4213
C4212
1 R4262 2
1 R4263 2
10K_5%_2
R4260 SMB_CLK_MD_A
PCH_3S_SMCLK 1 2
56
47 34 29 BI
0_5%_2
2
R4261
PCH_3S_SMDATA 1 2 SMB_DATA_MS_A
56
47 34 29 BI
U4201 0_5%_2
1 A0 VCC 8 R4259
2 A1 WP 7 1 2
3 6 SMB_CLK_MD_A
10K_5%_2_DY
A2 SCL 0_5%_2
4 5 SMB_DATA_MS_A
1 R4264 2
1 R4265 2
10K_5%_2
VSS SDA
ATM_AT24C02B_10TU_1_8_TSSOP_8P
A A
INVENTEC
TITLE
37_DDR TERMAINAL

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE NUMER : 4700~4949 LAYOUT NOTE:JTAG_TMS TERMINATIONS NEED TO BE PLACED NEAR PCH
LAYOUT NOTE:JTAG_TDI TERMINATIONS NEED TO BE PLACED NEAR PCH
8/22 P3V3A
LAYOUT NOTE:JTAG_TDO TERMINATIONS NEED TO BE PLACED NEAR XDP
PLACEMENT NOTE
P3V3AL_RTC_BAT
100_1%_2_DY 210_1%_2_DY
210_1%_2_DY
100_1%_2_DY 210_1%_2_DY
1
1
CN4750
Q4762
R4807
R4886
R4891
1 3
1 G P3V3_RTC 57 1 33_5%_2
R4868 2 2 3
2 2 G 4 AZ_R3S_SDOUT OUT S D IN HDA_SDO_R 33
P3V3AL
2
P5V0S BSS138 PCH_TDI
G
ACES_50224_0020N_001_2P 33 OUT
2
33 OUT PCH_TMS
TP4800
PCH_TDO
100_1%_2_DY
1
33 OUT
1
A2
C4766
1
D 1 2
TP30
R4806
R4889
D
R4885
1UF_6.3V_2
1R4845
1
3 2
C4767
C
D4750
2
20K_5%_2
1
1 2
2
BAT54C
1R4834
10M_5%_2
2 R4862 1
1UF_6.3V_2
2
4
3
18PF_50V_2
C4768
20K_5%_2
P3V3AL_RTC_BAT
1
X4750 U4701
A1
1UF_6.3V_2
2 R4833 1 32.768KHZ A20 RTCX1 FWH0/LAD0 C38 LPC_3S_AD(0) BI 48 50
1M_5%_2 LPC_3S_AD(1)
C4764
C4788 A38
2
2 R4832
1 FWH1/LAD1 BI 48 50
1
1 2 C20 B37 LPC_3S_AD(2) P3V3S
2
1
RTCX2 FWH2/LAD2 BI 48 50
1K_5%_2 C37 LPC_3S_AD(3)
FWH3/LAD3 BI 48 50
18PF_50V_2
RTC
LPC
D20 RTCRST#
1
D36 LPC_3S_FRAME# 48 50
FWH4/LFRAME# OUT
SRTCRST# G22 SRTCRST# R4912
54 33 INTRUDER# E36 0_5%_2
INTRUDER# OUT LDRQ0#
K22 K36 R4906 1 2
2
INTRUDER# LDRQ1#/GPIO23
10K_5%_2_DY
1R4842 2 330K_5%_2 INTVRMEN_R C17 V5 PCI_3S_SERIRQ 33 50
INTVRMEN SERIRQ OUT PCI_3S_SERIRQ 48
C4836
2 1
AM3
SATA0RXN IN SATA_RX0_C_DN
57 33 AZ_R3S_BITCLK 1 R4910 2 N34 AM1 44
22PF_50V_2 AZ_R3S_BITCLK OUT HDA_BCLK SATA0RXP IN SATA_RX0_C_DP
SATA 6G
AP7 44
C 33_5%_2 SATA0TXN OUT SATA_TX0_C_DN 44 SATA HDD C
L34 AP5
P3V3S 33 HDA_SYNC OUT HDA_SYNC SATA0TXP OUT SATA_TX0_C_DP 44
57 33 OUT A_3S_ICHSPKR T10 SPKR SATA1RXN AM10

IN 44
A_3S_ICHSPKR SATA_RX1_C_DN
AM8
1R4880 2 A_3S_ICHSPKR SATA1RXP IN SATA_RX1_C_DP 44
AZ_R3S_RST# 1R4901 2 33_5%_2 K34 AP11 44
10K_5%_2_DY 33 57 AZ_R3S_RST# OUT HDA_RST# SATA1TXN OUT SATA_TX1_C_DN MSATA
AP10 44
P3V3_RTC
SATA1TXP OUT SATA_TX1_C_DP
33
33 AZ_R3S_SDIN0
54
57 E34 AD7
IHDA
AZ_R3S_SDIN0 IN HDA_SDIN0 SATA2RXN
1
1M_5%_2
P3V3A AD5
OUT SATA2RXP
G34 HDA_SDIN1 SATA2TXN AH5
R4831
INTRUDER# SATA2TXP AH4

1
Q4831 C34 HDA_SDIN2

1K_5%_2
D
SATA3RXN AB8
1
R4861
2
G
WWAN_DET# IN A34 HDA_SDIN3 SATA3RXP AB10
AF3
S
SATA3TXN
SATA3TXP AF1
2 2
SSM3K7002FU
SATA
33 A36
HDA_SDO_R IN HDA_SDO
2
SATA4RXN Y7
Q4755 SATA4RXP Y5
HDD_HALTLED 1 R4866 2C36 AD3
S
56 HDD_HALTLED OUT HDA_DOCK_EN#/GPIO33 SATA4TXN

56 48 33 AD1
1R4863 21 44G 1K_5%_2 SATA4TXP
BAT_GRNLED# IN 33 ISO_PREP# N32
B 0_5%_2 55 52 ISO_PREP# OUT HDA_DOCK_RST#/GPIO13
B
SATA5RXN Y3
72 Y1
D
SATA5RXP
LES_LBSS84LT1G_SOT23_3P PLACE R4867 NEAR PCH SATA5TXN AB3
PCH_TCK J3 AB1
JTAG
23
R4867 33 PCH_TCK IN JTAG_TCK SATA5TXP

1 2
Q4754 33 PCH_TMS H7 Y11 P1V05S_VCCP
PCH_TMS IN JTAG_TMS SATAICOMPO
S
51_5%_2
33 PCH_TDI K5 Y10 L2 MAX. = 100 MILS1R4851 2 L1 MAX. = 500 MILS
51 37 IN 1 PCH_TDI IN JTAG_TDI SATAICOMPI
PLT_RST# G
37.4_1%_2
33 PCH_TDO H1
PCH_TDO OUT JTAG_TDO
P1V05S_VCCP
AB12
D
SATA3RCOMPO
AB13 L2 MAX. = 100 MILS1R4852 L1 MAX. = 500 MILS

LES_LBSS84LT1G_SOT23_3P
2
3
SATA3COMPI
OUT 33 49.9_1%_2
HDA_SDO_R NOTE:
48
R4911 2 R_SPI_CLK_FLH
1 T3 AH1 1R4821 2 IMPEDANCE TARGET : 50 +/- 15% OHM
SPI_CLK_FLH OUT SPI_CLK SATA3RBIAS
AVOID ROUTING COMP SIGNALS NEXT TO CLOCK PINS.
TP4701 33_5%_2 750_1%_2
SPI
1 33 48 1 R4894 2 R_SPI_CS0#_FLH Y14 PLACE CLOSE TO PCH P3V3S

TP30 IN PCH_TDI SPI_CS0#_FLH IN SPI_CS0#
TP4702 33_5%_2 2 R4816 1 0_5%_2

1 1 T1
TP30 IN PCH_TDO 33 TP716
SPI_CS1#
SATALED# P3 LED_3S_SATA# OUT 56 33
TP4703 LED_3S_SATA#
1 33 R4895 R4907
TP30 IN PCH_TCK P3V3S
48 OUT 1 2 R_SPI_SI_FLH V4 SPI_MOSI SATA0GP/GPIO21 V14 1 2
TP4704 SPI_SI_FLH
1 33 33_5%_2 0_5%_2
A TP30 IN PCH_TMS A
48 U3 P1
SPI_SO_FLH IN SPI_MISO SATA1GP/GPIO19 OUT GPIO19
TP4707 ITL_PANTHERPOINT_FCBGA_989P
1 18 35 48
TP30 IN RSMRST# R4911,R4894,R4895,R4882 CLOSE TO PCH P3V3A
TP4708 1
TP30 IN PWR_BTN_OUT#35 48 49 ISO_PREP# 1R4905 2
TP4709 1 0_5%_2
IN SRTCRST#
1
TP30
1K_5%_2
TP4710
INVENTEC
R4904
1
TP30 IN PM_PWROK48 35
TP4711 1 Q4750
TP30 IN M_PWROK35
20
1 R4903 2 2 3
2
57 AZ_R3S_SYNC OUT OUT HDA_SYNC 33

TP4712 1
S D
TITLE
TP30 IN VGATE 18 35 33_5%_2
TP4713 BSS138 P5V0S PANTHER POINT_1/9
G
1
TP30 IN INTVRMEN_R
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 X01
1
A3 CS
XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE NUMER : 4700~4949

P3V3S U4701
BANDIT PLATFROM ID BG34 PERN1
R47382
R4908 1 BJ34 E12 FPR_OFF_PCH
1 48 46
2 GPIO20 PERP1 SMBALERT#/GPIO11 IN FPR_OFF
GPIO34 0 AV32 PETN1 0_5%_2
SMBUS
0_5%_2 AU32 H14 PCH_3A_SMCLK
PETP1 SMBCLK BI 34
PCH_3A_SMCLK
GPIO18 1
BE34 C9 PCH_3A_SMDATA 34
R4702
PERN2 SMBDATA BI PCH_3A_SMDATA
1 2 CMNID1 BF34 PERP2
0_5%_2 BB32 PETN2 R4701 1 P3V3A
2
AY32 PETP2 20K_5%_2
SML0ALERT#/GPIO60 A12 PCH_DDR_RST OUT 34
23
PCH_DDR_RST
BG36
60 PCIE_RX3_C_DN IN PERN3
BJ36 C8 PCH_3M_SMCLK 51 34
60 PCIE_RX3_C_DP IN PERP3 SML0CLK BI PCH_3M_SMCLK
P3V3A OUT 1 C4816 2 0.1UF_16V_2 PCIE_TX3_DN AV34
MEDIA CARD 60 PCIE_TX3_C_DN
1 C4811 2 0.1UF_16V_2 PCIE_TX3_DP AU34
PETN3
G12 PCH_3M_SMDATA 51 34
60 PCIE_TX3_C_DP OUT PETP3 SML0DATA BI PCH_3M_SMDATA
D R4810 1 2 CLKREQ_PCIE_CARD#
PCI-E*
0_5%_2
53
PCIE_RX4_C_DN IN BF36 PERN4 P3V3A D
BE36
R4855 1 WLAN 53 PCIE_RX4_C_DP IN PERP4
R4840
2 CLKREQ_WLAN# 1 C4819 2 0.1UF_16V_2 PCIE_TX4_DN AY34 C13 1 2
53 PCIE_TX4_C_DN OUT PETN4 SML1ALERT#/PCHHOT#/GPIO74
0_5%_2 OUT 1 C4818 2 0.1UF_16V_2 PCIE_TX4_DP BB34 PETP4 0_5%_2
53 PCIE_TX4_C_DP
R4797 1 E14 PCH_SML1CLK
2 PCH_3M_SMCLK SML1CLK/GPIO58 BI PCH_SML1CLK 34
BG37 PERN5
2.2K_5%_2 BH37 M16PCH_SML1DATA
PERP5 SML1DATA/GPIO75 BI PCH_SML1DATA 34
R4884 1 2 PCH_3M_SMDATA AY36 PETN5
2.2K_5%_2 BB36 PETP5
R4864 1 2 GPIO46
51 BJ38
0_5%_2 PCIE_RX6_C_DN IN PERN6
R4888 51 BG38
1 2 GPIO44 NIC PCIE_RX6_C_DP IN PERP6
51 OUT 1 C4820 2 0.1UF_16V_2 PCIE_TX6_DN AU36 PETN6 CL_CLK1 M7 CL_CLK1
BI 34 53
0_5%_2 R4896 PCIE_TX6_C_DN CL_CLK1
R4822 51 OUT 1 C4817 2 0.1UF_16V_2 PCIE_TX6_DP AV36 PETP6
1 2 GPIO56 1 2 PCIE_TX6_C_DP
Controller
0_5%_2 10K_5%_2_DY BG40 T11 CL_DATA1
R4829
1 2 GPIO73 PERN7 CL_DATA1 BI 34
CL_DATA1 53
Link
BJ40 PERP7
0_5%_2 AY40 PETN7
BB40 P10 CL_RST#1 34
PETP7 CL_RST1# OUT CL_RST#1 53
BE38 PERN8
BC38 PERP8 P3V3A
AW38 PETN8 R4890
C AY38 PETP8
1 2 C
0_5%_2
M10 1 R4899 2
PEG_A_CLKRQ#/GPIO47
Y40 CLKOUT_PCIE0N 10K_5%_2_DY
Y39 CLKOUT_PCIE0P
CLKOUT_PEG_A_N AB37
GPIO73 J2 PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P AB38
P3V3A AB49 AV22 23

CLKOUT_PCIE1N CLKOUT_DMI_N OUT CLK_DMI_PCH_DN
AB47 AU22 23
Q4753 P3V3A CLKOUT_PCIE1P CLKOUT_DMI_P OUT CLK_DMI_PCH_DP
S1 1 PCH_SML1CLK 2 R4856 1
2 G1 2.2K_5%_2 M1
CMNID1 OUT PCIECLKRQ1#/GPIO18
6 PCH_KBC_SMCLK 34
73
48 AM12
D1 IN PCH_KBC_SMCLK CLKOUT_DP_N
D2 3 PCH_KBC_SMDATA 73
48
34 AM13
IN PCH_KBC_SMDATA CLKOUT_DP_P
5 G2 AA48 CLKOUT_PCIE2N
P3V3A
CLOCKS
4 PCH_SML1DATA 1 2 AA47 CLKOUT_PCIE2P
S2
R4827 2.2K_5%_2 CLKIN_DMI_N BF18 1R4823 2 0_5%_2
2N7002DW P3V3S V10 BE18 1 2
GPIO20 IN PCIECLKRQ2#/GPIO20 CLKIN_DMI_P
2 R4913 1 2.2K_5%_2 R4820 0_5%_2
R4835 2 Y37 BJ30 1R4878 2 0_5%_2

P3V3S 1 55 60 CLK_PCIE_CARD_DN OUT CLKOUT_PCIE3N CLKIN_GND1_N
B IN I2C_CLK OUT Y36 CLKOUT_PCIE3P CLKIN_GND1_P BG30 1 2 B
0_5%_2_DY 60 CLK_PCIE_CARD_DP
Q4752 R4876 0_5%_2
S1 1 PCH_3S_SMCLK 32
29 34
IN PCH_3S_SMCLK 34 IN CLKREQ_PCIE_CARD# A8 PCIECLKRQ3#/GPIO25
2 2.2K_5%_2 CLKREQ_PCIE_CARD#
47 1R4859 2 0_5%_2
G1
G24
6 PCH_3A_SMCLK 2 R4830 1 56
60 CLKIN_DOT_96N
D1 P3V3A CLKIN_DOT_96P E24 1 2
D2 3 PCH_3A_SMDATA 2 1
53 Y43 R4860 0_5%_2
5 G2 R4792 2.2K_5%_2 CLK_PCIE_WLAN_DN OUT CLKOUT_PCIE4N
Y45
4 PCH_3S_SMDATA CLK_PCIE_WLAN_DP OUT CLKOUT_PCIE4P
S2 IN PCH_3S_SMDATA 32 34
29 56
CLKIN_SATA_N AK7 1R4853 2 0_5%_2
2N7002DW R4836 47 34 53 CLKREQ_WLAN#L12 AK5 1 2
1 2
IN 55 CLKREQ_WLAN# IN PCIECLKRQ4#/GPIO26 CLKIN_SATA_P
I2C_DATA R4817 0_5%_2
0_5%_2_DY
2 1 P3V3S
V45 CLKOUT_PCIE5N REFCLK14IN K45 1R4893 2
R4828 2.2K_5%_2 V46 CLKOUT_PCIE5P 0_5%_2
GPIO44 L14 H45 CLK_R3S_PCH_FB 37

PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK IN 34
CLK_R3S_PCH_FB
CLK_PEG_DN AB42 V47 XTAL25_IN C4828

1 2
P3V3S CLKOUT_PEG_B_N XTAL25_IN
CLK_PEG_DP AB40 V49 XTAL25_OUT
1 R4898 2
3
2
1M_5%_2
2 R4837 1 CLKOUT_PEG_B_P XTAL25_OUT
15PF_50V_2
2.2K_5%_2 GPIO56 E6 P1V05S_VCCP
PEG_B_CLKRQ#/GPIO56 X4751
P3V3S IN THERM_CLK 47 22 25MHZ
P3V3AL XCLK_RCOMP Y47 1 R4897 2
Q4756 2 R4843 1 51 V40 90.9_1%_2 C4826
1 2
4
1
S1 1 CLK_PCIE_LAN_DN OUT CLKOUT_PCIE6N
A 2 G1
2.2K_5%_2 51 CLK_PCIE_LAN_DP OUT V42 CLKOUT_PCIE6P A
15PF_50V_2
6 48
73 34
D1 IN PCH_KBC_SMCLK 51 38 34 IN CLKREQ_LAN# T13 PCIECLKRQ6#/GPIO45
D2 3
IN CLKREQ_LAN#
5 PCH_KBC_SMDATA 48
73 34
G2
P3V3AL
FLEX CLOCKS
V38 CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64 K43
4
S2 2 R4838 1 V37 CLKOUT_PCIE7P
2N7002DW I213 F47
CLKOUTFLEX1/GPIO65
2.2K_5%_2 GPIO46
K12 PCIECLKRQ7#/GPIO46
IN THERM_DATA 22 47 CLKOUTFLEX2/GPIO66 H47
P3V3S 1 AK14 CLKOUT_ITPXDP_N
INVENTEC
TP30 TP830
2 R4844 1 1 AK13 CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67 K49
TP30 TP831
2.2K_5%_2
ITL_PANTHERPOINT_FCBGA_989P
TITLE
PANTHER POINT_2/9
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

NOTE:
1.SLP_SUS AND SUSACK# ARE NC IF DSW IS NOT SUPPORTED
2.DPWROK SHOULD CONNECT TO RSMRST# IF DSW NOT SUPPORTED
3.PCH_DPWROK PULL UP TO P3V3S ENABLES DSW WUPPORT. NO INSTALL R4752 TO DISABLE DSW
U4701
24 BC24 BJ14 24
DMI_RX0_DN IN DMI0RXN FDI_RXN0 IN FDI_TX0_DN
24 BE20 AY14 24
24 BG18 BE14 24
24 BG20 BH13 24
BC12 24
D FDI_RXN4 IN FDI_TX4_DN
24 BE24 BJ12 24
DMI_RX0_DP IN DMI0RXP FDI_RXN5 IN FDI_TX5_DN D
24 BC20 BG10 24
DMI_RX1_DP IN DMI1RXP FDI_RXN6 IN FDI_TX6_DN
24 BJ18 BG9 24
DMI_RX2_DP IN DMI2RXP FDI_RXN7 IN FDI_TX7_DN
24 BJ20
DMI_RX3_DP IN DMI3RXP
BG14 24
FDI_RXP0 IN FDI_TX0_DP
AW24 BB14
DMI
24 DMI_TX0_DN OUT DMI0TXN FDI_RXP1 IN FDI_TX1_DP 24
FDI
24 AW20 BF14 24
DMI_TX1_DN OUT DMI1TXN FDI_RXP2 IN FDI_TX2_DP
24 BB18 BG13 24
24 AV18 BE12 24
BG12 24
FDI_RXP5 IN FDI_TX5_DP
24 AY24 BJ10 24
DMI_TX0_DP OUT DMI0TXP FDI_RXP6 IN FDI_TX6_DP
24 AY20 BH9 24
DMI_TX1_DP OUT DMI1TXP FDI_RXP7 IN FDI_TX7_DP
24 AY18
DMI_TX2_DP OUT DMI2TXP
24 AU18
DMI_TX3_DP OUT DMI3TXP
AW16 FDI_INT 24 35
FDI_INT OUT FDI_INT
P1V05S_VCCP BJ24 DMI_ZCOMP FDI_FSYNC0 AV12 FDI_FSYNC0 OUT 24 35
FDI_FSYNC0
R4760 1 2 BG25 BC10 FDI_FSYNC1
DMI_IRCOMP FDI_FSYNC1 OUT FDI_FSYNC1 24 35
49.9_1%_2
R4750 1 2 BH21 AV14 FDI_LSYNC0
DMI2RBIAS FDI_LSYNC0 OUT FDI_LSYNC0 24 35
750_1%_2
FDI_LSYNC1 BB10 FDI_LSYNC1 OUT 35 24
FDI_LSYNC1
C C
P3V3_RTC
2 R4742 1
A18 330K_5%_2
DSWVRMEN
1 R4741 2
330K_5%_2_DY
TP4700 1 C12 E22
SUSACK# DPWROK IN RSMRST# 18 33 35 48
TP30
XDP_DBRESET# K3 B9 PCIE_WAKE#_3A
1 R4781 2
35 23 XDP_DBRESET# IN SYS_RESET# WAKE# IN PCIE_WAKE# 48 53
54
System Power Management

0_5%_2
18 33 35 IN VGATE P12 SYS_PWROK CLKRUN#/GPIO32 N3 PCI_3S_CLKRUN# BI 50

VGATE PCI_3S_CLKRUN# 48 35
35
48 33 PM_PWROK L22 G8
PM_PWROK IN PWROK SUS_STAT#/GPIO61
1
0_5%_2
20
33 L10 N14 SUSCLK32_KBC 35 48
M_PWROK IN APWROK SUSCLK/GPIO62 OUT SUSCLK32_KBC
R4752
23 PM_DRAM_PWRGD B13 D10 21

35 PM_DRAM_PWRGD OUT DRAMPWROK SLP_S5#/GPIO63 OUT SLP_S5#_3R
2
B B
48 35 18 RSMRST# C21 H4 10 18 21 45
33
RSMRST# IN RSMRST# SLP_S4# OUT SLP_S4#_3R
48 35 SUS_PWR_ACK K16 F4 9 18 19 20 21 27
SUS_PWR_ACK BI SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# OUT SLP_S3#_3R 42 45 48 55 57
33 49
35 48
P3V3A PWR_BTN_OUT# E20 G10 18 19 20 21 48
PWR_BTN_OUT# IN PWRBTN# SLP_A# OUT PM_SLP_A#
1 R4743 2
35 48 IN 0_5%_2 ADP_PRES_OUT H20 ACPRESENT/GPIO31 SLP_SUS# G16 1
ADP_PRES_OUT TP4705
P3V3A 53 BT_OFF E10 AP14 H_PM_SYNC

35 BT_OFF IN BATLOW#/GPIO72 PMSYNCH OUT H_PM_SYNC 23 35
R4744 2 1 10K_5%_2_DY
ISOLATION 35 PM_RI# IN PM_RI# A10 RI# SLP_LAN#/GPIO29 K14 SLP_LAN# 35
OUT SLP_LAN# 19 48
21
P3V3S P3V3A
50 PCI_3S_CLKRUN# 1R4727 2
A 35 48 PCI_3S_CLKRUN# BI A
8.2K_5%_2 35 OUT PM_RI# R4717 1 2
PM_RI#
0_5%_2
4819 35
21 OUT SLP_LAN# R4745 1 2
SLP_LAN#
10K_5%_2_DY
PCIE_WAKE#_3A R4716 1 2
0_5%_2
INVENTEC
TITLE
PANTHER POINT_3/9
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U4701
43 L_BKLT_EN J47 AP43
OUT LVDS_VDD_EN
L_BKLTEN SDVO_TVCLKINN
43 M45 AP45
OUT L_VDD_EN SDVO_TVCLKINP
INV_PWM_3 P45 AM42

43 36 INV_PWM_3 OUT L_BKLTCTL SDVO_STALLN
AM40
SDVO_STALLP
43 LVDS_DDC_CLK T40
P3V3S BI L_DDC_CLK
43 LVDS_DDC_DATA K47 AP39
BI L_DDC_DATA SDVO_INTN
SDVO_INTP AP40
D R4824 1 2 2.2K_5%_2 T45 L_CTRL_CLK
R4825 1 2 P39 L_CTRL_DATA D
2.2K_5%_2
R4826 1 2 AF37 LVD_IBG SDVO_CTRLCLK P38
BI DPB_DDC2CLK 55 36
2.37K_1%_2 AF36 M39
LVD_VBG SDVO_CTRLDATA BI DPB_DDC2DATA 55 36
AE48
LVDS
LVD_VREFH
AE47 AT49 55
LVD_VREFL DDPB_AUXN BI DDCAUX_B0_DN
AT47 55
DDPB_AUXP BI DDCAUX_B0_DP
AT40 55
DDPB_HPD IN DPB_HPD 36
43 OUT LVDSA_CLK_DN AK39 LVDSA_CLK#
43 OUT LVDSA_CLK_DP AK40 LVDSA_CLK DDPB_0N AV42
OUT DPB0_DN 55
AV40
DDPB_0P OUT DPB0_DP 55
43 OUT LVDSA_DATA0_DN AN48 LVDSA_DATA#0 DDPB_1N AV45
OUT
P3V3S DPB1_DN 55
43 OUT LVDSA_DATA1_DN AM47 LVDSA_DATA#1 DDPB_1P AV46
OUT DPB1_DP 55
43 OUT LVDSA_DATA2_DN AK47 LVDSA_DATA#2 DDPB_2N AU48
OUT DPB2_DN
Digital Display Interface

AJ48 AU47 55
LVDSA_DATA#3 DDPB_2P OUT DPB2_DP
2.2K_5%_2
2.2K_5%_2
P3V3S 55
1
AV47
DDPB_3N OUT DPB3_DN 55
43 OUT LVDSA_DATA0_DP AN47 LVDSA_DATA0 DDPB_3P AV49
OUT
100K_5%_2
DPB3_DP 55
LVDSA_DATA1_DP
2 R4786
2 R4787
1
43 AM49
OUT LVDSA_DATA1
43 OUT LVDSA_DATA2_DP AK49 LVDSA_DATA2
2 R4788
AJ47 P46
LVDSA_DATA3 DDPC_CTRLCLK BI DPC_DDC2CLK 36
P42
DDPC_CTRLDATA BI DPC_DDC2DATA
C 43 LVDSB_CLK_DN AF40 C
OUT LVDSB_CLK#
43 OUT LVDSB_CLK_DP AF39 LVDSB_CLK DDPC_AUXN AP47
BI
MB_DP_AUXN_CONN DDCAUX_C0_DN
36 BI DPD_DDC2DATA BI 42 DDPC_AUXP AP49
BI
DPD_DDC2DATA 36 DDCAUX_C0_DP
LVDSB_DATA0_DN
1
AH45 AT38
6
3
43 OUT LVDSB_DATA#0 DDPC_HPD IN DPC_HPD 55

MB_DP_AUXN_CONN 43 OUT LVDSB_DATA1_DN AH47 LVDSB_DATA#1
S1
D2
S2
D1
Q4701 43 LVDSB_DATA2_DN AF49 AY47

OUT LVDSB_DATA#2 DDPC_0N OUT DPC0_DN 55
AF45 AY49
G1
G2
2N7002DW LVDSB_DATA#3 DDPC_0P OUT DPC0_DP 55

AY43
DDPC_1N OUT DPC1_DN 55
LVDSB_DATA0_DP AH43 AY45
2
36 42 43 OUT LVDSB_DATA0 DDPC_1P OUT DPC1_DP 55

IN DDC_EN 43 OUT LVDSB_DATA1_DP AH49 LVDSB_DATA1 DDPC_2N BA47
DDC_EN
43 OUT LVDSB_DATA2_DP AF47 LVDSB_DATA2 DDPC_2P BA48
MB_DP_AUXP_CONN AF43 LVDSB_DATA3 DDPC_3N BB47
BI DPD_DDC2CLK MB_DP_AUXP_CONN BI 36 DDPC_3P BB49
36 DPD_DDC2CLK 42
100K_5%_2
1
6
3
1
S1
D2
S2
D1
Q4702 42 36 CRT_B N48 M43

CRT_B OUT CRT_BLUE DDPD_CTRLCLK BI DPD_DDC2CLK 36
2 R4790
CRT
CRT_G P49 M36
G1
G2
42 36 CRT_G OUT CRT_GREEN DDPD_CTRLDATA BI DPD_DDC2DATA 36

2N7002DW CRT_R T49
36 42 CRT_R OUT CRT_RED
2
AT45 36
42 36 IN DDC_EN 36
DDPD_AUXN BI DDCAUX_D0_DN
DDC_EN 42 CRT_DDCCLK T39 AT43
CRT_DDCCLK BI CRT_DDC_CLK DDPD_AUXP BI DDCAUX_D0_DP 36
P3V3S BI CRT_DDCDATA M40 CRT_DDC_DATA DDPD_HPD BH41
IN 36 42
42
36 CRT_DDCDATA DPD_HPD
B B
100K_5%_2_DY
BB43 42
DDPD_0N OUT DPD0_DN
CRT_HSYNC
1
36 42 M47 BB45 42
CRT_HSYNC OUT CRT_HSYNC DDPD_0P OUT DPD0_DP
36 OUT CRT_VSYNC M49 CRT_VSYNC DDPD_1N BF44
OUT 42
42 CRT_VSYNC DPD1_DN
2 R4789
BE44 42
DDPD_1P OUT DPD1_DP
BF42 42
DDPD_2N OUT DPD2_DN
1R4627 2 1K_1%_2 T43 BE42 42
DAC_IREF DDPD_2P OUT DPD2_DP
T42 BJ42 42
C4756 CRT_IRTN DDPD_3N OUT DPD3_DN
BG42 42
36 BI 1 2 DPD_AUX#_C DDPD_3P OUT DPD3_DP
DDCAUX_D0_DN
1
6
3
0.1UF_16V_2 ITL_PANTHERPOINT_FCBGA_989P
S1
D2
S2
D1
Q4703 P3V3S
G1
G2
2N7002DW
R4930
1 2
2
DPC_DDC2CLK OUT
42 36 DP_EN IN
DP_EN 2.2K_5%_2
C4757 R4931
1 2
BI 1 2 DPD_AUX_C DPC_DDC2DATA OUT
36 DDCAUX_D0_DP
1
6
3
4
100K_5%_2_DY
0.1UF_16V_2 2.2K_5%_2
S1
D2
S2
D1
1
Q4704
G1
G2
2N7002DW P3V3S
A A
2 R4791
R4782
1 2
DP_EN IN DPB_DDC2DATA OUT
55 36
OUT DPB_HPD 1 R4759 2
42 36 DP_EN 55 36
2.2K_5%_2 DPB_HPD 100K_5%_2
R4784 1 R4932 2
1 2 55 36 DPC_HPD OUT
55 36 DPB_DDC2CLK OUT 100K_5%_2
2.2K_5%_2 OUT DPD_HPD 1 R4761 2
42 36 DPD_HPD 100K_5%_2
INVENTEC
TITLE
PANTHER POINT_4/9
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

P3V3S
RS4765
8 1 NMI_SMI_DBG# U4701
7 2 PCI_3S_INTC# RSVD1 AY7
6 3 PCI_3S_INTA# RSVD2 AV7
5 4 BG26 AU3
OUT SC_PWRSV# 37 56
TP1 RSVD3
BJ26 TP2 RSVD4 BG4
8.2K_5% BH25 TP3
P3V3S BJ16 TP4 RSVD5 AT10
BG16 TP5 RSVD6 BC8
R4772 1 8.2K_5%_2 GPIO54 AH38 TP6
2
AH37 TP7 RSVD7 AU2
R4768 1 2 8.2K_5%_2 ACCEL_INT# AK43 AT4
TP8 RSVD8
D 8.2K_5%_2 AK45 AT3
R4709 1 GPIO03 TP9 RSVD9
2
C18 TP10 RSVD10 AT1 D
R4758
1 2 8.2K_5%_2_DY N30 AY3
TP11 RSVD11
R4719 H3 TP12 RSVD12 AT5
1 2 GPIO50
AH12 TP13 RSVD13 AV3
NVRAM
0_5%_2 AM4 AV1
TP14 RSVD14
AM5 TP15 RSVD15 BB1
RSVD
Y13 TP16 RSVD16 BA3
K24 TP17 RSVD17 BB5
L24 TP18 RSVD18 BB3
AB46 TP19 RSVD19 BB7
AB45 TP20 RSVD20 BE8
P3V3S BD4
RS4784
PORT1:DOCKING RSVD21
RSVD22 BF6
8 1 GPIO52
7 2 PORT2:LEFT USB2.0(CHARGE PORT)+USB3.0 B21 TP21 RSVD23 AV5
6 3 PCI_3S_INTB# M20
5 4 PCI_3S_INTD# PORT3:RIGHT1 USB2.0+USB3.0 AY16
TP22
TP23
BG46 AV10
8.2K_5%
PORT4:RIGHT2 USB2.0+USB3.0 TP24 RSVD24
RSVD25 AT8
P3V3S 55 BE28 AY5

USB30_RX1_DN BI USB3RN1 RSVD26
C 2 R4770 1 59 USB30_RX2_DN BI BC30 USB3RN2 RSVD27 BA2 C
OUT CAMERA_ON37 43 45 BI BE32 USB3RN3
10K_5%_2_DY USB30_RX3_DN
45 BJ32 AT12
R4771 USB30_RX4_DN BI USB3RN4 RSVD28
2 1 55 BC28 BF3
IN GPIO55 37 USB30_RX1_DP BI USB3RP1 RSVD29
10K_5%_2_DY 59 BE30
USB30_RX2_DP BI USB3RP2
45 BF32
USB30_RX3_DP BI USB3RP3
45 BG32 C24 55
USB30_RX4_DP BI USB3RP4 USBP0N BI USB_P0_DN
55 USB30_TX1_DN BI AV26 USB3TN1 USBP0P A24
BI USB_P0_DP 55 DOCK_PORT
59 BB26 C25 45
P3V3A USB30_TX2_DN BI USB3TN2 USBP1N BI USB_P1_DN
45 USB30_TX3_DN BI AU28 USB3TN3 USBP1P B25
BI USB_P1_DP 45 CONN (CHARGER)
45 AY30 C26 45
0_5%_2 USB30_TX4_DN BI USB3TN4 USBP2N BI USB_P2_DN
R4736 2 1
OUT GPIO14 37 55 USB30_TX1_DP BI AU26 USB3TP1 USBP2P A26
BI USB_P2_DP 45 CONN1 RIGHT
0_5%_2 59 AY26 K28 45
R4734 2 1
OUT 37 52 55 USB30_TX2_DP BI USB3TP2 USBP3N BI USB_P3_DN
0_5%_2
LANLINK_STATUS 45 USB30_TX3_DP BI AV28 USB3TP3 USBP3P H28
BI USB_P3_DP 45 CONN2 RIGHT
R4815 2 1
OUT GPIO59 37 45 USB30_TX4_DP BI AW30 USB3TP4 USBP4N E28
0_5%_2 USBP4P D28
R4739 2 1
OUT GPIO41 37 C28
USBP5N BI USB_P5_DN 53
0_5%_2
R4737 2 1
OUT GPIO42 37 USBP5P A28
BI USB_P5_DP 53
R4793 2 1 0_5%_2
37
USBP6N C29
NC BLUETOOTH
OUT GPIO9 USBP6P B29
0_5%_2 PCI_3S_INTA#
R4778 2 1
OUT GPIO43 37 K40 PIRQA# USBP7N N28
BI USB_P7_DN 56
R4740 2 1 0_5%_2
37
PCI_3S_INTB# K38 PIRQB# USBP7P M28
BI USB_P7_DP 56 SMART CARD
OUT GPIO40 PCI_3S_INTC# H38 PIRQC# USBP8N L30
BI 46
B USB_P8_DN B
PCI
PCI_3S_INTD# G38 PIRQD# USBP8P K30
BI USB_P8_DP 46 FINGER PRINT
USB
USBP9N G30 1
GPIO50 C46 E30 1 TP7000
REQ1#/GPIO50 USBP9P
PLT_RST# GPIO52 C44 C30 TP7001
51 37 33 72
44
PLT_RST# OUT REQ2#/GPIO52 USBP10N BI USB_P10_DN 43
R4707 GPIO54 E40 REQ3#/GPIO54 USBP10P A30
BI USB_P10_DP 43 CAMERA
1 2 USBP11N L32
TP2048
0_5%_2_DY
1 D47 GNT1#/GPIO51 USBP11P K32 NC
P3V3A 43 37 CAMERA_ON E42 G32 54
CAMERA_ON OUT GNT2#/GPIO53 USBP12N BI USB_P12_DN
37 GPIO55 OUT F46 GNT3#/GPIO55 USBP12P E32
BI USB_P12_DP 54 WWAN
USBP13N C32
1
5
USBP13P A32
NC
U4700 G42
56 37 SC_PWRSV# IN PIRQE#/GPIO2
+
54 G40
OUT BUF_PLT_RST# 4 2 GPIO03 IN PIRQF#/GPIO3
60 23 BUF_PLT_RST# 37
48 NMI_SMI_DBG# C42 C33 1 R4756 2
48 53
37 50 NMI_SMI_DBG# IN PIRQG#/GPIO4 USBRBIAS#
ACCEL_INT#
2 R4713 1
D44 22.6_1%_2
IN PIRQH#/GPIO5
100K_5%_2
- 47 ACCEL_INT#
37
PHP_74LVC1G17_SOT753_5P P3V3A B33
USBRBIAS
3
1 R4794 2 K10 PME#

10K_5%_2_DY
PLT_RST# C6 A14
PLTRST# OC0#/GPIO59 IN GPIO59 37
K20
OC1#/GPIO40 IN GPIO40 37
B17
OC2#/GPIO41 IN GPIO41 37
48
37 OUT CLK_R3S_KBPCI R4774 1 2 22_5%_2 CLK_KBPCI H49 CLKOUT_PCI0 OC3#/GPIO42 C16
IN 37
CLK_R3S_KBPCI GPIO42
37
34 OUT CLK_R3S_PCH_FB R4775 1 2 22_5%_2 CLK_PCH_FB H43 CLKOUT_PCI1 OC4#/GPIO43 L16
IN 37
A CLK_R3S_PCH_FB GPIO43 A
50 37 OUT CLK_R3S_TPM R4777 1 2 22_5%_2 CLK_TPM J48 CLKOUT_PCI2 OC5#/GPIO9 A16
IN 37
CLK_R3S_TPM GPIO9
K42 D14 LANLINK_STATUS 55
CLKOUT_PCI3 OC6#/GPIO10 IN LANLINK_STATUS
48
37 CLK_R3S_DEBUG R4773 1 2 22_5%_2 CLK_DEBUG H40 C14 52 37
CLK_R3S_DEBUG OUT CLKOUT_PCI4 OC7#/GPIO14 IN GPIO14 37
1
C7675
C7674 C4761
8.2PF_50V_2_DY
8.2PF_50V_2_DY
INVENTEC
2
8.2PF_50V_2_DY
TITLE
FOR RF PANTHER POINT_5/6
DOC.NUMBER REV
SIZE CODE X01
A3 CS 1310xxxxx-0-0
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

1 R4722 2 10K_5%_2_DY
GPIO17
1 R4747 2 0_5%_2
IN GPIO27 38
1 R4725 2 0_5%_2
CMNID2
1 R4723 2 10K_5%_2_DY
GPIO35
1 R4730 2 0_5%_2
GPIO49
D
D
T7 U4701
GPIO0 BMBUSY#/GPIO0 TACH4/GPIO68 C40
OUT GPIO68 P3V3S
OCP_OC# A42 B41 D3E_WAKE# R4754
P3V3S
TACH1/GPIO1 TACH5/GPIO69 IN D3E_WAKE# 38 60
1 2
48 38 RUNSCI0#_3 H36 C41 LPC_RESET#
RUNSCI0#_3 IN TACH2/GPIO6 TACH6/GPIO70 IN LPC_RESET# 38 48
38 0_5%_2
38 22 BI THERM_SCI# E38 TACH3/GPIO7 TACH7/GPIO71 A40 GPS_XMIT_OFF#
IN 54 R4753
R4746 1 0_5%_2 THERM_SCI# GPS_XMIT_OFF#
2 GPIO19 1 2
R4785 1 0_5%_2 C10
2 RUNSCI0#_3 38 GPI_INV_LIDWAKE IN GPIO8
R4839
1 2 0_5%_2
R4780 1 2 0_5%_2 OCP_OC# LAN_DIS# C4
52 51 38 LAN_DIS# OUT LAN_PHY_PWR_CTRL/GPIO12
R4767 1 2 0_5%_2 GPIO17
G2 P4 1 R4704 2 0_5%_2
R4728 1 2 0_5%_2 DOCK_ID1
38 TLS_ENCRYTION_R IN GPIO15 A20GATE IN EC_3S_A20GATE 48
0_5%_2_DY
AU16 1 R4749 2 H_PECI
R4726 1 2 0_5%_2 DOCK_ID2 PECI BI H_PECI 23 38 48
49 U2 0_5%_2_DY
R4729 1 0_5%_2 GPIO16 IN SATA4GP/GPIO16 P3V3S
CPU/MISC
2 GPIO16 P5 PM_3S_KBCCPURST#
GPIO
C RCIN# IN PM_3S_KBCCPURST# 38 48
C
R4803 1 10K_5%_2_DY 1 2
2 GPIO49
D40 AY11 H_PWRGD R4708 0_5%_2
R4735 1 10K_5%_2_DY GPIO17 BI TACH0/GPIO17 PROCPWRGD OUT H_PWRGD23 38
2 MSATA_CD# P1V05S_VCCP
R4712 1 0_5%_2 T5 AY10 1R4731 2 PM_THRMTRIP# 38 23
2 GPIO0 WWAN_TRANSMIT_OFF# BI SCLOCK/GPIO22 THRMTRIP# IN PM_THRMTRIP#
54 56
390_5%_2 2 R4732 1
R4706 1 2 10K_5%_2_DY FPR_LOCK# E8 T14
GPIO24 IN GPIO24 INIT3_3V# 56_5%_2_DY
R4710 1 2 GPIO37
10K_5%_2_DY E16
38 GPIO27 IN GPIO27
R4769 1 2 0_5%_2 LPC_RESET# AY1
DF_TVS IN SNB_IVB# 23
R4755 1 0_5%_2 P8 GPIO28
2 GPIO68
TS_VSS1 AH8
K1
CMNID2 OUT STP_PCI#/GPIO34
TS_VSS2 AK11
K4
GPIO35 OUT GPIO35
TS_VSS3 AH10
44 V8
MSATA_CD# OUT SATA2GP/GPIO36
AK10
P3V3A TS_VSS4
M5
GPIO37 OUT SATA3GP/GPIO37
NC_1 P37
55 38 IN DOCK_ID1 N2 SLOAD/GPIO38
DOCK_ID1
R4705 1 2 0_5%_2 CLKREQ_LAN# DOCK_ID2 M3
OUT 34 51 38 DOCK_ID2 IN SDATAOUT0/GPIO39
B R4724 1 2 1K_5%_2 TLS_ENCRYTION_R 38
B
OUT 46 38 IN FPR_LOCK# V13 SDATAOUT1/GPIO48 VSS_NCTF_15 BG2
FPR_LOCK#
R4720 1 2 10K_5%_2_DY GPIO24
V3 BG48
GPIO49 OUT SATA5GP/GPIO49/TEMP_ALERT# VSS_NCTF_16
D6 BH3
53 WLAN_TRANSMIT_OFF# OUT GPIO57 VSS_NCTF_17
R4721 1 2 0_5%_2 LAN_DIS#
VSS_NCTF_18 BH47
R4714 1 2 0_5%_2 GPI_INV_LIDWAKE OUT 38
R4841 1 0_5%_2 A4 VSS_NCTF_1 VSS_NCTF_19 BJ4
2 GPIO35
A44 BJ44
VSS_NCTF_2 VSS_NCTF_20 OUT OCP_OC#
3
A45 VSS_NCTF_3 VSS_NCTF_21 BJ45
Q4805
D
NCTF
A46 VSS_NCTF_4 VSS_NCTF_22 BJ46
48 1 G
OCP_PWM_OUT IN
A5 BJ5
S
VSS_NCTF_5 VSS_NCTF_23
GPIO17 GPIO35 GPIO49 GPIO50
A6 BJ6 SSM3K7002FU
VSS_NCTF_6 VSS_NCTF_24
R4767 R4841 R4803 R4758 H
2
R4722 R4723 R4730 R4719 L B3 VSS_NCTF_7 VSS_NCTF_25 C2
0 1 0 0 SI 1 B47 VSS_NCTF_8 VSS_NCTF_26 C48

A A
0 1 0 1 SI 1B BD1 VSS_NCTF_9 VSS_NCTF_27 D1
0 1 1 0 SI 2 BD49 VSS_NCTF_10 VSS_NCTF_28 D49
1 0 0 0 PV 1 BE1 VSS_NCTF_11 VSS_NCTF_29 E1
1 1 0 0 MV BE49 VSS_NCTF_12 VSS_NCTF_30 E49
BF1 VSS_NCTF_13 VSS_NCTF_31 F1
BF49 VSS_NCTF_14 VSS_NCTF_32 F49 INVENTEC

ITL_PANTHERPOINT_FCBGA_989P TITLE
PANTHER POINT_6/9
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

TP4807
P1V05S_VCCP TP30 P3V3S
U4701
2.04A 1 L4701 70MA
1
AA23 U48 2
AC23
VCCCORE[1]
POWER VCCADAC
10UF_6.3V_3
VCCCORE[2] FBM_11_160808_181A15T
0.01UF_50V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1
CRT
AD21
0.1UF_16V_2
VCCCORE[3]
1 1
1
1
C4751
22UF_6.3V
AD23 U47
VCC CORE
VCCCORE[4] VSSADAC
C4718
C4721
C4740
AF21 VCCCORE[5]
C4747
C4749
AF23 VCCCORE[6]
C47502 2
AG21 VCCCORE[7] P3V3S
AG23
2
VCCCORE[8]
2
D AG24 VCCCORE[9] VCCALVDS AK36
AG26 VCCCORE[10] D
AG27 VCCCORE[11] VSSALVDS AK37
AG29 VCCCORE[12]
AJ23
LVDS
VCCCORE[13] TP4806 P1V8S
AJ26 VCCCORE[14] VCCTX_LVDS[1] AM37 TP30
AJ27
AJ29
VCCCORE[15]
AM38 1 L47042 70MA
1
VCCCORE[16] VCCTX_LVDS[2]
AJ31 VCCCORE[17] FBM_11_160808_181A15T
0.01UF_50V_2
0.01UF_50V_2
VCCTX_LVDS[3] AP36
1
P1V05S_VCCP
22UF_6.3V
15MA AP37
1
VCCTX_LVDS[4]
C4780
C4781
AN19 VCCIO[28]
2 2
C4782
P1V05S_VCCP TP843
2
1 BJ22 P3V3S
HVCMOS
VCCAPLLEXP
2.7A TP30
VCC3_3[6] V33 30MA
AN16
0.1UF_16V_2
VCCIO[15]
1
1
1
10UF_6.3V_3
AN17
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
VCCIO[16]
C4735
VCC3_3[7] V34
C4758
C4724
C4727
C4742
C4743
C C
2
AN21 VCCIO[17]
2
2
P1V5S
AN26 VCCIO[18]
VCCVRM[3] AT16
AN27
VCCIO
VCCIO[19]
P1V05S_VCCP
AP21
DMI
VCCIO[20]
VCCDMI[1] AT20 60MA
AP23 VCCIO[21]
1
1UF_6.3V_2
P1V05S_VCCP
AP24 VCCIO[22]
20MA
C4726
VCCCLKDMI AB36
AP26 VCCIO[23]
2
1UF_6.3V_2_DY
AT24 VCCIO[24]
1
TP4805
P1V8S
C4737
TP30
AN33 VCCIO[25]
VCCDFTERM[1] AG16
P3V3S AN34 VCCIO[26]
0.1UF_16V_2
1
C4745
2
2 1 1MA BH29 VCC3_3[3] VCCDFTERM[2] AG17
B B
C4725
0.1UF_16V_2
NAND / SPI
P1V5S VCCDFTERM[3] AJ16
2
P1V05S_VCCP
AP16 VCCVRM[2]
AJ17
30MA R4733
VCCDFTERM[4]
1 2 P1V05S_R_FDIPLL BG6 VccAFDIPLL
FDI
0_5%_2_DY P1V05S_VCCP
P3V3A
AP17 VCCIO[27] 20MA
P1V05S_VCCP VCCSPI V1
1
1UF_6.3V_2
AU20 VCCDMI[2]
C4704
2
A A
INVENTEC
TITLE
PANTHER POINT_7/9
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

P1V05S_VCCP P1V05S_VCCP
U4701
20MA 1R4779 2 P1V05S_R_VCCACLK AD49 N26 420MA
0_5%_2_DY P3V3A
VCCACLK
POWER VCCIO[29]
1UF_6.3V_2
1
C4714 P26
2MA VCCIO[30]
C4734
2 1 T16 VCCDSW3_3
VCCIO[31] P28
0.1UF_16V_2
2
C4762 2 1 V12 T27
P3V3S DCPSUSBYP VCCIO[32]
0.1UF_16V_2_DY T29
20MA T38
VCCIO[33]
VCC3_3[5] P3V3A
P1V05S_VCCP 11MA
1
T23
10UF_6.3V_3
1UF_6.3V_2
VCCSUS3_3[7]
0.1UF_16V_2
TP842
D 1
BH23 VCCAPLLDMI2
1
USB
30MA TP30 VCCSUS3_3[8] T24 D
C4748
C4732
C4731
AL29 VCCIO[14]
V23
VCCSUS3_3[9] P3V3A
2
C4723
2 1 AL24 V24
2
DCPSUS[3] VCCSUS3_3[10]
2MA
1UF_6.3V_2_DY
P1V05M VCCSUS3_3[6] P24
Clock and Miscellaneous

C4713 TP4811
1 2 TP30
1.81A AA19 VCCASW[1] P1V05S_VCCP P3V3A
2
0.1UF_16V_2
1
1
1
10UF_6.3V_3
10UF_6.3V_3
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
AA21 VCCASW[2] VCCIO[34] T26 D4700
NC
P5V0A_R_V5REF 3 1
C4708
C4729
C4716
C4738
C4739
C4763
AA24 VCCASW[3] V5REF_SUS M26
AA26 VCCASW[4] C4728
2
2
2
DCPSUS[4] AN23 1 2 P3V3A BAT54_30V_0.2A
AA27 VCCASW[5] P5V0A
10UF_6.3V_3_DY
VCCSUS3_3[1] AN24
AA29 TP4812 P3V3S
P1V05M VCCASW[6] C4730
1R4751
2
2 1 2 TP30
AA31 VCCASW[7] 10_5%_2 D4701
1
0.1UF_16V_2
NC
AC26 VCCASW[8] V5REF P34 P5V0S_R_V5REF 3 1
C C
10UF_6.3V_3
10UF_6.3V_3
P3V3A
1
AC27
C4785 VCCASW[9]
60MA
C4786
PCI/GPIO/LPC
VCCSUS3_3[2] N20 BAT54_30V_0.2A
P5V0S
1UF_6.3V_2
1
AC29 VCCASW[10]
N22 C4746
AC31 VCCASW[11]
VCCSUS3_3[3]
2 1 1R4762 2 2MA
C4715
2
2
VCCSUS3_3[4] P20 10_5%_2
AD29 VCCASW[12]
1UF_6.3V_2
P22
2
AD31 VCCASW[13]
VCCSUS3_3[5]
P3V3S 70MA
C4717
W21 VCCASW[14] VCC3_3[1] AA16 2 1
P3V3S 0.1UF_16V_2
W23 VCCASW[15] VCC3_3[8] W16
C4736
W24 VCCASW[16] VCC3_3[4] T34 80MA 1 2
0.1UF_16V_2
W26 VCCASW[17]
W29 VCCASW[18]
P3V3S
P1V05S_VCCP TP4809 W31 C4703
B
TP30 VCCASW[19]
VCC3_3[2] AJ2 2MA 1 2 B
1 L4702 2 W33
11
VCCASW[20]
0.1UF_16V_2
1
MLZ1608M100WT VCCIO[5] AF13

1UF_6.3V_2
220UF_2.5V
P1V05S_VCCP
C4700
30MA 450MA
+
2 1 N16 DCPRTC C4722

C4755
C4753
0.1UF_16V_2 VCCIO[12] AH13 1 2

P1V5S 1UF_6.3V_2
Y49 AH14
SATA
2
VCCVRM[4] VCCIO[13]
VCCIO[6] AF14
P1V05S_VCCP TP4810 P1V05S_L_ADPLLA BD47 VCCADPLLA
TP30 TP2049 P1V5S
VCCAPLLSATA AK1 1
1 L4703 2 P1V05S_L_ADPLLB BF47
11
VCCADPLLB
TP30
1
MLZ1608M100WT P1V05S_VCCP 30MA

1UF_6.3V_2
220UF_2.5V
AF11
50MA VCCVRM[1]
P1V05S_VCCP
+
2 1 AF17 VCCIO[7]
C4754
C4752
C4720 1UF_6.3V_2 AF33 VCCDIFFCLKN[1] C4741

P1V05S_VCCP
AF34 VCCDIFFCLKN[2] VCCIO[2] AC16 120MA 1 2
2 1 AG34
2
VCCDIFFCLKN[3]
1UF_6.3V_2
C4719 1UF_6.3V_2 P1V05S_VCCP VCCIO[3] AC17
2 1 150MA AG33 VCCSSC VCCIO[4] AD17

C4744 1UF_6.3V_2
A C4769 A
2 1 V16 DCPSST
P1V05M 0.1UF_16V_2 P1V05M
R4748
200MA 60MA
MISC
1 2 0_5%_2_DY T17 DCPSUS[1] VCCASW[22] T21

P1V05S_VCCP 1 2 V19 DCPSUS[2]
C4712 1UF_6.3V_2_DY
2MA VCCASW[23] V21
RTC CPU
P3V3_RTC
4.7UF_6.3V_3
0.1UF_16V_2
0.1UF_16V_2
1MA
1
BJ8 V_PROC_IO
VCCASW[21] T19
INVENTEC
C4705
C4706
C4707
0.1UF_16V_2
0.1UF_16V_2
1UF_6.3V_2
1
P3V3A
C4733
HDA
15MA TITLE
C4710
C4709
C4711
A22 P32 1 2
2
VCCRTC VCCSUSHDA
PANTHER POINT_8/9
ITL_PANTHERPOINT_FCBGA_989P 0.1UF_25V_2
2
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U4701
AY4 H46
REFERENCE NUMER : 4700~4949 AY42
AY46
VSS[159]
VSS[160]
VSS[161]
VSS[259]
VSS[260]
VSS[261]
K18
K26
AY8 VSS[162] VSS[262] K39
B11 VSS[163] VSS[263] K46
B15 VSS[164] VSS[264] K7
B19 VSS[165] VSS[265] L18
B23 VSS[166] VSS[266] L2
U4701 B27 L20
VSS[167] VSS[267]
H5 VSS[0]
B31 VSS[168] VSS[268] L26
B35 VSS[169] VSS[269] L28
AA17 VSS[1] VSS[80] AK38
B39 VSS[170] VSS[270] L36
B7 VSS[171] VSS[271] L48
F45 VSS[172] VSS[272] M12
BB12 VSS[173] VSS[273] P16
D AB11 VSS[6] VSS[85] AL16
BB16 VSS[174] VSS[274] M18
AB14 VSS[7] VSS[86] AL17
BB20 VSS[175] VSS[275] M22 D
BB22 VSS[176] VSS[276] M24
BB24 VSS[177] VSS[277] M30
BB28 VSS[178] VSS[278] M32
BB30 VSS[179] VSS[279] M34
BB38 VSS[180] VSS[280] M38
BB4 VSS[181] VSS[281] M4
AC19 VSS[13] VSS[92] AL27
BB46 VSS[182] VSS[282] M42
BC14 VSS[183] VSS[283] M46
BC18 VSS[184] VSS[284] M8
BC2 VSS[185] VSS[285] N18
BC22 VSS[186] VSS[286] P30
AC34 VSS[18] VSS[97] AM11
BC26 VSS[187] VSS[287] N47
AC48 VSS[19] VSS[98] AM14
BC32 VSS[188] VSS[288] P11
AD10 VSS[20] VSS[99] AM36
BC34 VSS[189] VSS[289] P18
AD11 VSS[21] VSS[100] AM39
BC36 VSS[190] VSS[290] T33
AD12 VSS[22] VSS[101] AM43
BC40 VSS[191] VSS[291] P40
AD13 VSS[23] VSS[102] AM45
BC42 VSS[192] VSS[292] P43
AD19 VSS[24] VSS[103] AM46
BC48 VSS[193] VSS[293] P47
AD24 VSS[25] VSS[104] AM7
BD46 VSS[194] VSS[294] P7
AD26 VSS[26] VSS[105] AN2
BD5 VSS[195] VSS[295] R2
AD27 VSS[27] VSS[106] AN29
BE22 VSS[196] VSS[296] R48
AD33 VSS[28] VSS[107] AN3
BE26 VSS[197] VSS[297] T12
C AD34 VSS[29] VSS[108] AN31
BE40 VSS[198] VSS[298] T31 C
AD36 VSS[30] VSS[109] AP12
BF10 VSS[199] VSS[299] T37
AD37 VSS[31] VSS[110] AP19
BF12 VSS[200] VSS[300] T4
AD38 VSS[32] VSS[111] AP28
BF16 VSS[201] VSS[301] W34
AD39 VSS[33] VSS[112] AP30
BF20 VSS[202] VSS[302] T46
AD4 VSS[34] VSS[113] AP32
BF22 VSS[203] VSS[303] T47
AD40 VSS[35] VSS[114] AP38
BF24 VSS[204] VSS[304] T8
BF26 VSS[205] VSS[305] V11
AD43 VSS[37] VSS[116] AP42
BF28 VSS[206] VSS[306] V17
AD45 VSS[38] VSS[117] AP46
BD3 VSS[207] VSS[307] V26
BF30 VSS[208] VSS[308] V27
AD8 VSS[40] VSS[119] AR2
BF38 VSS[209] VSS[309] V29
AE2 VSS[41] VSS[120] AR48
BF40 VSS[210] VSS[310] V31
AE3 VSS[42] VSS[121] AT11
BF8 VSS[211] VSS[311] V36
AF10 VSS[43] VSS[122] AT13
BG17 VSS[212] VSS[312] V39
AF12 VSS[44] VSS[123] AT18
BG21 VSS[213] VSS[313] V43
AD14 VSS[45] VSS[124] AT22
BG33 VSS[214] VSS[314] V7
AD16 VSS[46] VSS[125] AT26
BG44 VSS[215] VSS[315] W17
AF16 VSS[47] VSS[126] AT28
BG8 VSS[216] VSS[316] W19
AF19 VSS[48] VSS[127] AT30
BH11 VSS[217] VSS[317] W2
AF24 VSS[49] VSS[128] AT32
BH15 VSS[218] VSS[318] W27
AF26 VSS[50] VSS[129] AT34
BH17 VSS[219] VSS[319] W48
AF27 VSS[51] VSS[130] AT39
B AF29 VSS[52] VSS[131] AT42
BH19 VSS[220] VSS[320] Y12 B
H10 VSS[221] VSS[321] Y38
AF31 VSS[53] VSS[132] AT46
BH27 VSS[222] VSS[322] Y4
AF38 VSS[54] VSS[133] AT7
BH31 VSS[223] VSS[323] Y42
AF4 VSS[55] VSS[134] AU24
BH33 VSS[224] VSS[324] Y46
AF42 VSS[56] VSS[135] AU30
BH35 VSS[225] VSS[325] Y8
AF46 VSS[57] VSS[136] AV16
BH39 VSS[226] VSS[328] BG29
AF5 VSS[58] VSS[137] AV20
BH43 VSS[227] VSS[329] N24
BH7 VSS[228] VSS[330] AJ3
D3 VSS[229] VSS[331] AD47
AG19 VSS[61] VSS[140] AV38
D12 VSS[230] VSS[333] B43
AG2 VSS[62] VSS[141] AV4
D16 VSS[231] VSS[334] BE10
AG31 VSS[63] VSS[142] AV43
D18 VSS[232] VSS[335] BG41
AG48 VSS[64] VSS[143] AV8
D22 VSS[233] VSS[337] G14
AH11 VSS[65] VSS[144] AW14
D24 VSS[234] VSS[338] H16
AH3 VSS[66] VSS[145] AW18
D26 VSS[235] VSS[340] T36
D30 VSS[236] VSS[342] BG22
AH39 VSS[68] VSS[147] AW22
D32 VSS[237] VSS[343] BG24
AH40 VSS[69] VSS[148] AW26
D34 VSS[238] VSS[344] C22
AH42 VSS[70] VSS[149] AW28
D38 VSS[239] VSS[345] AP13
AH46 VSS[71] VSS[150] AW32
D42 VSS[240] VSS[346] M14
D8 VSS[241] VSS[347] AP3
AJ19 VSS[73] VSS[152] AW36
E18 VSS[242] VSS[348] AP1
AJ21 VSS[74] VSS[153] AW40
E26 VSS[243] VSS[349] BE16
AJ24 VSS[75] VSS[154] AW48
A AJ33 VSS[76] VSS[155] AV11
G18 VSS[244] VSS[350] BC16 A
G20 VSS[245] VSS[351] BG28
AJ34 VSS[77] VSS[156] AY12
G26 VSS[246] VSS[352] BJ28
AK12 VSS[78] VSS[157] AY22
G28 VSS[247]
AK3 VSS[79] VSS[158] AY28
G36 VSS[248]
G48 VSS[249]
ITL_PANTHERPOINT_FCBGA_989P H12 VSS[250]
H18 VSS[251]
H22 VSS[252]
H24 VSS[253]
H26
H30
H32
VSS[254]
VSS[255]
VSS[256]
INVENTEC
H34 VSS[257] TITLE
F3 VSS[258]
PANTHER POINT_9/9
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CRT_R
VGA_R_L2
36 1 L3052 2 120NH,5%
CRT_R IN CRT_G
VGA_G_L2
36 1 L3053 2 120NH,5%
CRT_G IN
L3055 VGA_B_L2
36 1 2 120NH,5%
CRT_B IN
CRT_B
P5V0S
12PF_50V_2
12PF_50V_2
12PF_50V_2
1
1
1 R3067 2
1 R3068 2
1 R3069 2
12PF_50V_2
12PF_50V_2
12PF_50V_2
1
150_1%_2_DY
C3068
C3058
C3056
150_1%_2_DY
150_1%_2_DY
75_1%_2
75_1%_2
75_1%_2
P3V3S
R3064 1
R3066 2
R3065 2
C3057
C3060
C3061
D
2
D
2
U3071 R3071
2
1
1
1 VCC-SYNC SYNC_OUT2 16 CRT_R_VSYNC 1 2
22_5%_2 OUT CRT_Q_VSYNC
2 15
VCC-VIDEO SYNC_IN2
CRT_R_HSYNC 1 R3072 2
IN CRT_VSYNC
3 VIDEO_1 SYNC_OUT1 14
OUT CRT_Q_HSYNC
4 13 22_5%_2
VIDEO_2 SYNC_IN1 IN CRT_HSYNC
5 12
VIDEO_3 DDC_OUT2 BI CRT_Q_DDCDATA CLOSE TO PCH
6 11
GND DDC_IN2 BI CRT_DDCDATA
7 10
VCC-DCC DDC_IN1 BI CRT_DDCCLK
8 9
P3V3S BYP DDC_OUT1 BI CRT_Q_DDCCLK
1
NXP_IP4772CZ16_SSOP_16P
C3071 C3072
0.1UF_16V_2
0.1UF_16V_2
4.7K_5%_2
4.7K_5%_2
1
2
2 R3058
2 R3063
P5V0S_CRTVDD
1 CN3050
P1
2
P5V0S P2
36 42 3
BI CRT_DDCDATA 4
P3
U3051
1 GND OUT 8 1 TP3000 P4
C 36 42 5 C
BI CRT_DDCCLK 2 IN OUT 7
TP30
P5V0S_CRTVDD
P5V0S_CRTVDD 6
P5
P6
1
3 IN OUT 6
7 P7
4 5
IN EN OC# 8
SLP_S3#_3R 1UF_6.3V_2
C3052
R3052 4.7K_5%_2 9
P8
ROHM_BD82024FVJ_TSSOP_8P P9
1
57 55 48 45 42 35 27 21 20 19 18 9 2 1
0.1UF_16V_2 10 P10
C3309
2 R3051 1 4.7K_5%_2 11 P11
2
42 12
CRT_Q_DDCDATA BI 13
P12
42 CRT_Q_HSYNC BI P13
42 14 G1
CRT_Q_VSYNC BI P14 G1
2
42 15 G2
CRT_Q_DDCCLK BI P15 G2
T-CONN_T21_0024_1A30_0_15P
P5V0A
CRT
1
CN3300
0_5%_2
P5V0A 36 1 2 C3300 0.1UF_16V_2 DPD0_C_DP 1

DPD0_DP IN 1
R3305
B 2 2
B
36 1 2 C3301 0.1UF_16V_2 DPD0_C_DN 3
DPD0_DN IN C3307 0.1UF_16V_2
3
DPD1_C_DP 4
1
36 1 2
DPD1_DP IN 4
2
0_5%_2
5 5
C3306 0.1UF_16V_2 DPD1_C_DN 6
R3303
36 36 1 2
DP_EN IN DPD1_DN IN 6
36 1 2 C3302 DPD2_C_DP 7
DPD2_DP IN 0.1UF_16V_2 8
7
8
Q3300
1 DPD2_DN 1 2 C3303 DPD2_C_DN 9
2
S1 36 IN 9
G1 2 36 DPD3_DP 1 2 C3305 0.1UF_16V_2 DPD3_C_DP 10
IN 0.1UF_16V_2 11
10
36 6
DDC_EN IN 11
3 D1
D2 36 1 2 C3304 DPD3_C_DN12
DPD3_DN IN 0.1UF_16V_2 13
12
G2 5 13
4 14 14
S2 15
2N7002DW 36 MB_DP_AUXP_CONN IN 16
15
16
17 G1
36 MB_DP_AUXN_CONN IN 18
17 G1
G2
42 MB_DPD_CONN# IN 19
18 G2
G3
IN MB_DPD_CONN#42 19 G3
20 20 G4 G4
P5V0S TYCO_2023333_3_20P
5.1M_5%_2
P3V3S
1
3
1M_5%_2
Q3301
R3304
R3302
U3300
1 TP3300
D
A 1 G
1 GND OUT 8 A
2 IN OUT 7
TP30
3 IN OUT 6
S
2
4 5
SSM3K7002FU IN EN OC#
57 55 48 45 42 35 27 21 20 19 18 9 SLP_S3#_3R
2
ROHM_BD82024FVJ_TSSOP_8P
1UF_6.3V_2
1
C3311
10UF_6.3V_3
1UF_6.3V_2
1
1
C3310
C3308
IN DPD_HPD 36
INVENTEC
2
DISPLAY PORT CNTR

2
TITLE
CRT & DP
REFERENCE NUMBER:3300~3399 SIZE CODE

DOC.NUMBER
1310xxxxx-0-0
REV
X01
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S_LCDVDD
P3V3S_LCDVDD
P3V3S
1 R3001 2 1.5A
PVBAT 100_5%_2
1
C3003
D TP3301 1
68PF_50V_2
D
C3010
TP30 4.7UF_6.3V_3
680PF_50V_2
U3000
2
56PF_50V_2
1
4.7UF_25V_5
1
C3019
C3020
5 1
2
IN OUT
C3021
1
2
P3V3S
1UF_6.3V_2
GND
C3006
4 3 36
DIS EN IN
100K_5%_2
2
2 NUVO_NCT3521U_SOT23_5P LVDS_VDD_EN
R3003 1
CN3000
2
1 1
2 2
3 3
43 36 4
LVDS_DDC_CLK IN 4
2
43 36 5
LVDS_DDC_DATA IN 6
5
6
7
36 LVDSB_CLK_DP IN 8
7
36 LVDSB_CLK_DN IN 9
8
9
10
36 LVDSB_DATA0_DP IN 11
10
P3V3S 36 LVDSB_DATA0_DN IN 12
11
12
13
C 36 LVDSB_DATA1_DP IN 14
13
C
36 LVDSB_DATA1_DN IN 15
14
15
R3004 16
36 LVDSB_DATA2_DP IN 17
16
2 1
LVDS_DDC_CLK IN 36 LVDSB_DATA2_DN IN 18
17
18
43 36 19
4.7K_5%_2 36 LVDSA_DATA0_DN IN 19
R3005 36 20
LVDSA_DATA0_DP IN 21
20
2 1
LVDS_DDC_DATA IN 22
21
36 LVDSA_DATA1_DN IN 22
43 36 23
4.7K_5%_2 36 LVDSA_DATA1_DP IN 23
24 24
36 25
LVDSA_DATA2_DN IN 26
25
36 LVDSA_DATA2_DP IN 26
27 27
36 28
LVDSA_CLK_DN IN 29
28
36 LVDSA_CLK_DP IN 30
29
BAT54_30V_0.2A PVBAT 30
31
2
31
D3000 1.5A 32 32
33
NC
33
61 48 3 1 C3008 34
LID_SW#_3 IN 35
34
680PF_50V_2 35
B 1 2 36 B
R3009 2 36 INV_PWM_3 IN 37
36
36 1
L_BKLT_EN IN 37
100K_5%_2
38 38
1
2K_5%_2 39 39
40 40
R3008
57 41
C3505 P3V3S DMIC_CLK IN 41
57 42 42
18PF_50V_2 DMIC_DAT IN 43 43
2
2 1 44 44
45 45
37 CAMERA_ON 46 46
IN
47 47 G1 G1
48 G2
P5V0S L3000
48 G2
1 2 USB_P10_L_DP 49 49 G3 G3
37 USB_P10_DP IN 50 G4
4 3 USB_P10_L_DN 50 G4
37 USB_P10_DN IN
WCM_2012_900T
4.7UF_6.3V_3
0.01UF_50V_2
ACES_50473_0500S_002_50P
0.1UF_16V_2
68PF_50V_2
47PF_50V_2
1UF_6.3V_2
1
33PF_50V_2
C3014
1
C3011
C3012
C3013
C3015
C3016
C7676
2
2
A A
INVENTEC
TITLE
REFERENCE NUMBER:3000~3049 MODEL,PROJECT,FUNCTION

LCM & WEBCAM
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CN1700
S1 GND
33
0.01UF_50V_21 2C1705 SATA_TX0_DP S2
SATA_TX0_C_DP IN 0.01UF_50V_21
A+
33 2C1704 SATA_TX0_DN S3
D SATA_TX0_C_DN IN A-
S4 GND
0.01UF_50V_21 2 C1702 SATA_RX0_DN S5 D
33 SATA_RX0_C_DN OUT B-
33
0.01UF_50V_21 2C1703 SATA_RX0_DP S6
SATA_RX0_C_DP OUT B+
S7 GND
P1 V3.3
P2 V3.3
P3 V3.3
P4 GND
P5V0S P5 GND
P6
1.3A P7
GND
V5
1
68PF_50V_2
1
P8 V5
C1700
C1701
4.7UF_6.3V_3
P9 V5
P10 GND
P11 RESERVED
P12 GND
P13
2
V12
P14 V12 G G1 HDD ( CN1700 ) : P/N 6012B0449501
P15 V12 G G2 HDD TRANSFOR CNTR ( CN1701 ) : P/N 6012B0451301
ALLTOP_SK_C11841_22P
C C
SATA HDD
P3V3S
903MA
10UF_6.3V_3
1
1
68PF_50V_2
C1956
C1957
B CN1950 B
1 WAKE# 3.3V 2
2
2 3 RESERVED GND 4
5 RESERVED 1.5V 6
7 CLKREQ# RESERVED 8
9 GND RESERVED 10
11 REFCLK- RESERVED 12
13 REFCLK+ RESERVED 14
15 RESERVED RESERVED 16
NOTE : SWAP SATA_RXP2 AND SATA_RXN2 ON CN1950 PIN 23 AND 25 FOR INTEL SSD 310 SERIES PRODUCT PINDEFINTION 17 RESERVED GND 18
19 RESERVED RESERVED 20
0.01UF_50V_2 21 GND PERST# 22
33 C1950 1 2 SATA_RX1_DP 23 24
SATA_RX1_C_DP OUT PERN0 +3.3VAUX
33 C1951 1 2 SATA_RX1_DN 25 26
SATA_RX1_C_DN OUT PERP0 GND
27 GND 1.5V 28
0.01UF_50V_2 29 30
0.01UF_50V_2 GND SMB_CLK
33 C1952 1 2 SATA_TX1_DN 31 32
SATA_TX1_C_DN IN PETN0 SMB_DATA
33 C1953 1 2 SATA_TX1_DP 33 34
SATA_TX1_C_DP IN PETP0 GND
35 GND USB_D- 36
0.01UF_50V_2 37 38
RESERVED USB_D+
39 RESERVED GND 40
41 RESERVED LED_WWAN# 42
43 RESERVED LED_WLAN# 44
45 RESERVED LED_WPAN# 46
A 47 RESERVED 1.5V 48 A
Q1950 49 RESERVED GND 50
3 2 51 52
38 MSATA_CD# OUT D S RESERVED 3.3V
G1 G1 G2 G2
SSM3K7002FU_DY
FOX_AS0B226_S40QW_7H_52P
G
72
51 37 33
1
PLT_RST# IN
MSATA
INVENTEC
TITLE
REFERENCE NUMBER:1950~1999 MODEL,PROJECT,FUNCTION

SATA HDD & M-SATA
DOC.NUMBER
CNTR
REV
SIZE CODE
1310xxxxx-0-0 X01
A3 CS
XXX 21-OCT-2002
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R2512 17.8K_1%_2
2 1
1 R2511 2
P5V0A_CHG 20K_5%_2
P5V0A_CHG
47UF_6.3V_5
1
C2513
2
P5V0A_USB_CHARAGE
0_5%_2
17
16
15
14
13
R2515
2.5A C2512 R2511 R2515 R2514
U2511 1 2
D +
FAULT#
ILIM_LO
PWPD
GND
2
ILIM_HI
100UF_6.3V TPS2543 20K 10K NI D
1
1 12 1 TP2512
IN OUT
2 11
TP30 TPS2540/A NI NI 0
37 USB_P1_DN BI
3
DM_OUT DM_IN
10
BI USB_P1_U_DN 59 PI5USB2543
37 USB_P1_DP BI
4
DP_OUT DP_IN
9
BI USB_P1_U_DP 59
ILIM_SET STATUS#
0_5%_2_DY
2
R2514
CTL1
CTL2
CTL3
P5V0A_CHG
EN
TEXAS_TPS2543RTER_QFN_16P
0.1UF_16V_2
IN CPPWR_EN 9 48
5
6
7
8
1
1
IN SLP_S4#_3R 10 18 21 35 45
C2514
IN SLP_S3#_3R 9 19 18 20 21 27 35 42 48 55 57
2
REFERENCE NUMBER:2511~2599 P5V0A_USB0
1.8A
C C
1000PF_50V_2_DY
0.1UF_16V_2
1
1
P5V0A
C2402
C2403
P5V0A_USB0
P5V0A
2
U2400
1 GND OUT 8
2 7 1 TP2400
IN OUT
TP30
3 IN OUT 6 CN2400
L2400 1 VBUS
4 5
SLP_S4#_3R IN EN OC#
4 3 USB_P2_L_DN 2
22UF_6.3V_5
37 USB_P2_DN BI D-
1 1 2 USB_P2_L_DP 3
ROHM_BD82024FVJ_TSSOP_8P 37 USB_P2_DP BI D+
C2401
45 35 21 18 10 4 PGND
22UF_6.3V_5
WCM_2012_900T
1UF_6.3V_2
5
1
37 USB30_RX3_DN OUT SSRX-

6
C2415
C2412
37 USB30_RX3_DP OUT SSRX+

0.1UF_16V_2 7 GND
2
37 C2404 1 2 USB30_TX3_C_DN 8
USB30_TX3_DN IN 9
SSTX-
G1
37 IN C2405 1 2 USB30_TX3_C_DP SSTX+ G
USB30_TX3_DP G2
0.1UF_16V_2
2
G
G G3
B G G4 B
SINGA_2UB1585_000121F_9P
USB RIGHT1
P5V0A_USB1
1.8A
P5V0A
1000PF_50V_2_DY
P5V0A_USB1
P5V0A
0.1UF_16V_2
1
1
C2408
C2409
U2401 TP2401
1 GND OUT 8 1
TP30
2 IN OUT 7
2
3 IN OUT 6
22UF_6.3V_5
1
4 5
SLP_S4#_3R IN EN OC#
C2411
18 35 10 ROHM_BD82024FVJ_TSSOP_8P
45 1 CN2401
22UF_6.3V_5
21
1UF_6.3V_2
VBUS
A A
1
37 BI L2404 4 3 USB_P3_L_DN 2 D-
USB_P3_DN
C2413
C2414
1 2 USB_P3_L_DP 3
2
37 USB_P3_DP BI D+
WCM_2012_900T 4 PGND
37 5
USB30_RX4_DN OUT 6
SSRX-
37 USB30_RX4_DP OUT SSRX+
2
0.1UF_16V_2 7 GND
37 C2406 1 2 USB30_TX4_C_DN 8
USB30_TX4_DN IN 9
SSTX-
G1
37 IN C2407 1 2 USB30_TX4_C_DP SSTX+ G
USB30_TX4_DP G2
0.1UF_16V_2 G
INVENTEC
G G3
G G4
SINGA_2UB1585_000121F_9P
TITLE
USB RIGHT2 MODEL,PROJECT,FUNCTION
USB & USB CHARGER
REFERENCE NUMBER:2400~2499 SIZE

A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P3V3ALW
P3V3A
2
R2210 R2211
0_5%_2 0_5%_2_DY
TP2201
1
1
TP30
4.7UF_6.3V_3
0.1UF_16V_2
1
1
0_5%_2
C2201
C2200
R2201
2
2
46
48 34 FPR_OFF IN
C C
19MA
CN2200
ACES_51571_0064N_001_6P
48
46 34 1
FPR_OFF IN 2
1
2
3 3
37 4
USB_P8_DP BI 5
4
G1
37 USB_P8_DN BI 5 G1
6 6 G2 G2
D2201
2 38 FPR_LOCK# IN
3
1
1
0_5%_2
R2200
PHP_PESD5V2S2UT_SOT23_3P_DY
2
B B
FINGER PRINT CONN
A A
INVENTEC
TITLE
FINGER PRINTER CNTR
REFERENCE:2200~2249 SIZE CODE
DOC.NUMBER
1310xxxxx-0-0
REV
X01
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P3V3S
C C
10UF_6.3V_3
0.1UF_16V_2
1
1
C1001
C1000
14
15
16
U1000
2
VDD
RES
RES
13 RES VDD_IO 1
12 GND NC1 2
ACCEL_INT# IN ACCEL_INT# 11 INT1 NC1 3
37 47 10 4 R1004
1 0_5%_2_DY
2
9
RES SCL_SPC
5
IN PCH_3S_SMCLK 32
34 56 29
SDA_SDI_SDO
INT2 GND 1 2
IN THERM_CLK 34 22
SDO_SA0
R1002 0_5%_2
CS
ST_HP3DC2TR_LGA_16P
P3V3S
8
7
6
R1003
1 0_5%_2
2
BI THERM_DATA 34 22
1 2 29 56
BI PCH_3S_SMDATA 32 34
1 R1001 2 R1005 0_5%_2_DY
0_5%_2_DY
B B
1
R1000
0_5%_2_DY
2
ACCELEMETOR
A A
INVENTEC
TITLE
REFERENCE NUMER : 1000~1099 SIZE

A3
CODE
CS
ACCELEMETOR
DOC.NUMBER
1310xxxxx-0-0
REV
X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE NUMER : 300~399 P3V3AL P3V3S

48
9 5 VADP_DEBUG OUT
VADP_DEBUG
CN375
1 1
CLK_R3S_DEBUG 2
VOLTAGE_ADC 9
48 37 CLK_R3S_DEBUG IN
10MA 3
2
3
50 48 33 IN LPC_3S_FRAME# 4 4
LPC_3S_FRAME#
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
PCI_3S_SERIRQ
1
50 33 48 5
PCI_3S_SERIRQ IN 5
ACES_50238_02471_001_24P
IN BUF_PLT_RST# 6 6
C316 60 54 53 23 48
37 BUF_PLT_RST#
NMI_SMI_DBG# 7
4.7UF_6.3V_3
NMI_SMI_DBG# OUT 7
0.1UF_16V_2
68PF_50V_2
P3V3_RTC 48 37 50 LPC_3S_AD(0)
1
50 8
LPC_3S_AD(0) IN 8
2 C303
2 C131
2 C314
2 C315
48 33 LPC_3S_AD(1) 9
1UF_6.3V_2 C302
68PF_50V_2_DY 50 33 48
33 LPC_3S_AD(1) BI 9
LPC_3S_AD(2) 10
C309
C320
LPC_3S_AD(2) BI 10
2
50 48 LPC_3S_AD(3) 11
50 48 33 LPC_3S_AD(3) BI 11
FOR RF 12
0.1UF_16V_2
C308 12
1
2 1 LED_PWRSTBY# 13
IN
2
56 48 61 BI 13
P3V3AL 55 CAPS_LED# 14
TP332 48 49 BI 14
0.1UF_16V_2 NUM_LOCK_LED# 15
C312
TP30 49 48 IN 15
D 2 C310 1 VCC1_POR#_3 16 16
C311
48 33 1
R375 2 SPI_CLK_FLH_R6_R 17 D
SPI_CLK_FLH IN 100_5%_2 17
2
1 0.1UF_16V_2 48 33 1
R376 2 SPI_CS0#_FLH_R6_R 18
C317 SPI_CS0#_FLH IN 1
100_5%_2
2
18
48 33 R377 SPI_SI_FLH_R6_R 19
2 1 SPI_SI_FLH IN 1
100_5%_2
2
19
48 33 SPI_SO_FLH_R6_R 20
P3V3AL SPI_SO_FLH IN R378 100_5%_2 20
68PF_50V_2 48 21 G1
R303 10K_5%_2_DY SPI_HOLD#_DB IN 21 25
106
119
22 22 26 G2
NMI_SMI_DBG#
14
15
1 2
39
58
84
49
68
NMI_SMI_DBG#OUT 37 P3V3AL 23 23
U300 2 1 48 R375,R376,R377,R378 CLOSE TO KBC 24 24
SCAN_3S_OUT(11..0) SCAN_3S_OUT(0)
2
0 21 124 0_5%_2
VCC10
ADC3-GPIO23
VCC12
VCC13
VCC14
VCC15
VCC2
VCC0
CAP
SCAN_3S_OUT(11..0) OUT KOS00 OUT0 R306 5 48
48 1 SCAN_3S_OUT(1) 20 125 CHARGER_DAT
KOS01 GPIO53-AB3_DATA OUT CHARGER_DAT D300 BAT54_30V_0.2A
2 SCAN_3S_OUT(2) 19 123 FET_A
NC
KOS02 CFETA_OUT7_NSMI IN FET_A 486
3 SCAN_3S_OUT(3) 18 KOS03 OUT8 122 3 1
OUT PM_3S_KBCCPURST# 38
4 SCAN_3S_OUT(4) 17 KOS04 OUT9-TACH2PWM_OUT 121 PWM_3S_FAN#
OUT PWM_3S_FAN# 22 48
5
6
SCAN_3S_OUT(5)
SCAN_3S_OUT(6)
16
13
KOS05
KOS06
OUT10
PWM_CHRGCTL
120 BAT_GRNLED#
118
OUT PWM#_LED49
48 33
56
OUT BAT_GRNLED# P1V05S_VCCP
45
DEBUG PORT
7 SCAN_3S_OUT(7) 12 107 CPPWR_EN OUT 0_5%_2
KOS07 GPIO01
CPPWR_EN 9 48
8 SCAN_3S_OUT(8) 10 KOS08 VREF_PECI 79 2 R356 1
9 SCAN_3S_OUT(9) 9 KOS09 GPIO3-PECI_DATA 80 R328 1 243_5%_2
OUT 38 P3V3AL
H_PECI 23
10 SCAN_3S_OUT(10) 8 KOS10 GPIO04 81 SLP_S3#_3R
IN SLP_S3#_3R 4218 35 45 57
48
SCAN_3S_OUT(11) 7 83 19 21 27 55 9 20 1 R320 2 100K_5%_2
11 KOS11 GPIO05
6 KOS12 OUT1-RSMRST# 85 NUM_LOCK_LED# OUT NUM_LOCK_LED# 48
Keyboard / Mouse Interface

5 86 FPR_OFF_K 1 0_5%_2_DY 2 R309 R330 1 2 0_5%_2 RSMRST#
KOS13 GPIO08 IN FPR_OFF 46 34 OUT RSMRST# 18 33 35 49
49 IN SCAN_3S_IN(7..0) 0 SCAN_3S_IN(0) 29 KSI0 GPIO09 87KBC_WAKE# 1 0_5%_2_DY 2 R302
OUT PCIE_WAKE#54 53 35 R329 1
C 48 SCAN_3S_IN(7..0) 2 C
1 SCAN_3S_IN(1) 28 KSI1 GPIO11 88 PCH_KBC_SMDATA
IN PCH_KBC_SMDATA 34 73
48 48
Genrel Purpose I/O Interface

2 SCAN_3S_IN(2) 27 89 PCH_KBC_SMCLK 0_5%_2
KSI2 GPIO012 IN PCH_KBC_SMCLK 34 73 48
3 SCAN_3S_IN(3) 26 KSI3 GPIO013 90 KBC_PROCHOT
OUT KBC_PROCHOT 48 23
48 4 SCAN_3S_IN(4) 25 KSI4 GPIO014 91 A_SD#
OUT A_SD#
5 SCAN_3S_IN(5) 24 92 4857
9 IN ADC_VREF_1126 KSI5 GPIO015 OUT MEM_1V5 10
ADC_VREF_1126 6 SCAN_3S_IN(6) 23 KSI6 GPIO16-TACH2PWM_IN 101 TACH_FAN_IN_1126
IN 22 48
R301 TACH_FAN_IN_1126
7 SCAN_3S_IN(7) 22 KSI7 GPIO017 102 EC_3S_A20GATE
IN EC_3S_A20GATE 38 48
1 10_5%_2
2 41 61 SP_CLK
ADC_VREF KCLK BI SP_CLK 56 48
42 ADC2_GPIO40 GPIO020 103
C300 48 IM_5S_CLK 35 105
AGND_KBC 2 1 56 IM_5S_CLK OUT IMCLK GPIO021
36 VSS7 GPIO024 4 PWR_BTN_OUT# OUT 48 33 35 49
PWR_BTN_OUT#
P3V3AL 40 73 PWRBTN_1126#
100PF_50V_2 AVCC GPIO025 IN PWRBTN_1126#48 49
20 48 IN ADP_A_ID 1 2 55
48
18
SLP_S4#_KBC OUT SLP_S4#_KBC 38 ADC4-GPIO50 GPIO026 108 SCAN_3S_OUT(17)
OUT SCAN_3S_OUT(17) 61 48
ADP_A_ID 48 OUT RUNSCI0#_3 76 74 ADP_PRES 7ADP_PRES 48
Power
RUNSCI0#_3 NEC_SCI ADP_PRES-CKT#2-GPIO27 IN
Mgmt
SIRQ
R300 300_5%_2 38 PCI_3S_CLKRUN# 55 93 PM_SLP_A# P3V3AL
50 48 35
PCI_3S_CLKRUN# IN CLKRUN# GPIO028 IN 19
PM_SLP_A# 18 35 20 21 35 48
PCI_3S_SERIRQ 2 1 57 98 SUS_PWR_ACK
50 48 33 BI SER_IRQ GPIO029 IN SUS_PWR_ACK 48 R326 100K_5%_2
33_5%_2 R333 48 37 IN CLK_R3S_KBPCI 54 PCI_CLK GPIO030 99 ADP_PRES_OUT OUT ADP_PRES_OUT 35 P3V3AL
CLK_R3S_KBPCI 2 1
48 BI 3 LPC_3S_AD(3) 51 LAD3 GPIO031 100 48 OUT KBC_PWR_ON 9 P3V3AL
50 33 LPC_3S_AD(0..3)
2 LPC_3S_AD(2) 50 LAD2 GPIO32-AB3_CLK 126 CHARGER_CLK
OUT CHARGER_CLK
LPC_3S_AD(0..3) R340
1 LPC_3S_AD(1) 48 LAD1 AB1A_CLK 112 SCL_MAIN
BI 6 48 R307 5 48 18 IN KBC_GPIO22 1 2
SCL_MAIN 2 1
R310 0 LPC_3S_AD(0) 46 LPC Bus Access Bus 111 SDA_MAIN 10K_5%_2_DY
1 2 LAD0 AB1A_DATA BI SDA_MAIN 6 48 0_5%_2
33 IN LPC_3S_FRAME# 52 LFRAME# Intreface AB1B_CLK 110 SCL_MBAY
BI 48
SHORT_0603_25 50 48 LPC_3S_FRAME# SCL_MBAY 0_5%_2
B IN LPC_RESET# 53 LRESET# AB1B_DATA 109 SDA_MBAY
BI 48 R3172 B
1 R311 2 38 48 LPC_RESET# SDA_MBAY IN VCC1_POR#_3 IN ADP_EN 1
45 70 9 48 48 5
AVSS PWMOK_PWMDEAD#-CKT#2-GPIO OUT KBC_GPIO51
SHORT_0603_25 7 6 1 71 SUSCLK32_KBC
IN SUSCLK32_KBC 48
35
R342 10K_5%_2_DY LID_SW#_3 100K_5%_2 1 R3142
LATCHED_ALARM IN ALARM_CKT#2_GPIO36 32KHZ_INPUT
61 48 43 IN
MAIN_BAT_DET# 2 59 OCP_PWM_OUT 1 2
6 48 MAIN_BAT_DET# IN HSTCLK_GPIO41 ADC_TO_PWM_OUT-GPIO19 OUT OCP_PWM_OUT 48
55 IN
56
61 LED_PWRSTBY#0_5%_2 1 R3222
48
33 3 75
SPI_CLK_FLH IN FLCLK 32KHZ_OUT-GPIO22 OUT KBC_GPIO22 48 38
2200PF_50V_2
53 48 WLAN_OFF 30 60 PM_PWROK
OUT 48
18 48 23 CAPS_LED# 0_5%_2 1 R3242
WLAN_OFF OUT GPIO39 NRESET_OUT
PM_PWROK33 35 48 IN
49
1
31 69 1K_5%_2 2 1
C306
2200PF_50V_2
5 ADP_DET IN AC-CKT#2-GPIO42 TEST_PIN R327
48 IN VCC1_POR#_3 0_5%_2 1 R3252
2 1 IM_5S_DATA 32 77
C301
56 48 IM_5S_DATA OUT IMDAT VCC1_RST# IN VCC1_POR#_3 48

WWAN_OFF 33 113 BAT_AMBERLED# 56
54 48 WWAN_OFF OUT GPIO38 Miscellaneous NBAT_LED OUT BAT_AMBERLED#
SLP_LAN# 34 115 48
19
SLP_LAN# IN GPIO37 NPWR_LED OUT LED_PWRSTBY# 61
1 R316 2 35 48
21 43 114 56 48 55
7 CURRENT_ADC IN ADC1_GPIO46 NFDD_LED OUT CAPS_LED# 49 48
300_5%_2
2
OCP_A_IN 1 2 44 116 FET_B

OCP_A_IN IN ADC_TO_PWM_IN CFETB_GPIO10 IN FET_B 48 P3V3A
748 R315 300_5%_2
56
48 BI SP_DATA 62 KDAT PWEGD 78 PWR_GOOD_3
IN PWR_GOOD_3 18 23 48
20
SP_DATA
5 48 OUT ADP_EN 63 GPIO35 FLDATAIN 95 SPI_SO_FLH
OUT 33 48 1 2
2 1 ADP_EN
43 48
61 IN LID_SW#_3 64 GPIO34 HSTCS0#_GPIO44 96 1 R319 10K_5%_2_DY
LID_SW#_3 TP1121
GPIO52-PWM3
C307 2200PF_50V_2 65 97 SPI_CS0#_FLH

TRAVEL_BAT_DET# IN Q_GPIO33 FLCS0# OUT 48 33 SPI_CS0#_FLH 1 R331 2
66 EMCLK HSTDATAOUT_GPIO45 127
OUT CHG_RST IN
67 128 SPI_SI_FLH 48 33 100K_5%_2_DY
OUT 48 1
VCC11
EMDAT FLDATAOUT
2 5
VSS0
VSS2
VSS3
VSS4
VSS5
VSS6
94 HSTDATAIN_GPIO43 33
R308 0_5%_2
P3V3A
SMSC_KBC1126_VTQFP_128P
AGND_KBC
72
37
47
56
82
104
117
11
3.3K_5%_2
1
2
P3V3AL
2
TP1120 R323
0_5%_2
R369 R368 P3V3AL P3V3S
A KBC_WAKE# OUT
1 2 A
P5V0S
3.3K_5%_2
1
1 R385 2 4.7K_5%_2
56 48 BI
48 33 R365,R366,R367 CLOSE TO SPI CN365 IM_5S_CLK
R386 4.7K_5%_2
1 8 56 48 1 2
SPI_CS0#_FLH IN R367 2 SPI_SO_FLH_R
CE# VDD
IM_5S_DATA BI
1 2 7 SPI_HOLD#_DB R387
SPI_SO_FLH OUT SO HOLD# IN SPI_HOLD#_DB 48 56 48 BI 1 2 4.7K_5%_2
33 SPI_SO_FLH 33_5%_2 3 WP# SCK 6 SPI_CLK_FLH IN 48 SP_CLK
48 SPI_CLK_FLH 33 R388 4.7K_5%_2
0_5%_2_DY
4 VSS SI 5 SPI_SI_FLH IN 56 48 BI 1 2
IN SPI_SI_FLH 33 48 SP_DATA
SPI_WP#
1
INVENTEC
R370
ACES_91960_0084L_8P
R305
1
1 2
FET_A
C366 100K_5%_2
C319
SPI BIOS TITLE
2
1 R304 2
FET_B MODEL,PROJECT,FUNCTION
16M ROM SOCKET(CN365):6026B0150101 0.1UF_16V_2
2
68PF_50V_2_DY 100K_5%_2 KBC & SPI

2
16M_8P_MICRO N25Q128A13ESEC0F(U365):6019B0988601 DOC.NUMBER REV

FOR RF SIZE
A3
CODE
CS
1310xxxxx-0-0 X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE NUMER : 300~389 P3V3AL
R348 1
R347 1
R349 1
R350 1
R351 1
R352 1
R353 1
R354 1
0_5%_2
0_5%_2
0_5%_2
0_5%_2
0_5%_2
0_5%_2
0_5%_2
0_5%_2
P3V3S
2
1 CN260 0
48 CAPS_LED# IN 1 SCAN_3S_IN(0)
2 2 1
48 3 SCAN_3S_IN(1)
D NUM_LOCK_LED# IN 4
3
2
1 2 4
REC_MUTE_LED 5
SCAN_3S_IN(2)
3 D
R381 5
270_5%_2 SCAN_3S_OUT(9) 6 6 SCAN_3S_IN(3)
4
49 OUT KSCAN_3S_IN(9) 7 7
KSCAN_3S_IN(9) SCAN_3S_IN(4)
49 OUT KSCAN_3S_IN(11) 8 8 5
KSCAN_3S_IN(11)
49 OUT KSCAN_3S_IN(13) 9 9 SCAN_3S_IN(5)
KSCAN_3S_IN(13)
3
6
49
48 OUT SCAN_3S_IN(7) 10 10
Q320 SCAN_3S_IN(7) SCAN_3S_IN(6)
49 OUT KSCAN_3S_IN(6) 11 11 7
KSCAN_3S_IN(6)
D
49 OUT KSCAN_3S_IN(5) 12 12 SCAN_3S_IN(7)

57 IN 1 G KSCAN_3S_IN(5) OUT 49 48
REC_MUTE_LED_CNTR SCAN_3S_OUT(1) 13 13 SCAN_3S_IN<7..0>
2
SSM3K7002FU SCAN_3S_OUT(10)14 14 SCAN_3S_IN<7..0>

S
SCAN_3S_OUT(6) 15 15
R383 SCAN_3S_OUT(7) 16 16
2
0_5%_2 SCAN_3S_OUT(8) 18 18
1
SCAN_3S_OUT(3) 19 19 KSCAN_3S_IN(14)
49 KSCAN_3S_IN(3) 20 P3V3S
KSCAN_3S_IN(3) OUT 20
1
6149 OUT KSCAN_3S_IN(1) 21 21
KSCAN_3S_IN(1)
KSCAN_3S_IN(2) D301
KSCAN_3S_IN(4)
49 61 OUT KSCAN_3S_IN(0) 24 24
KSCAN_3S_IN(0)
0.1UF_16V_2
KSCAN_3S_IN(10) 25
1
49 KSCAN_3S_IN(10) OUT 25
49 OUT KSCAN_3S_IN(12) 26 26
KSCAN_3S_IN(12) 3 SCAN_3S_IN(6)
C305
C 49 OUT KSCAN_3S_IN(8) 27 27 C
KSCAN_3S_IN(8)
49 OUT KSCAN_3S_IN(14) 28 28
KSCAN_3S_IN(14)
SCAN_3S_OUT(2) 30
2
30
SCAN_3S_OUT(0) 31 31 G G1
SCAN_3S_OUT(11)32 32 G G2
DAP202KGT146
2
JOINT_F0803WR_S_32PNLNT1T00L_32P KSCAN_3S_IN(6)
P3V3AL
100K_5%_2
1
R101
P3V3A
2
R100
1K_5%_2
61 55 49 21 ON_OFF# 1 2
ON_OFF# IN OUT PWRBTN_1126# 48
D303
R103
KSCAN_3S_IN(4) 1 6 SCAN_3S_IN(4)
2
47_5%_2
B B
1UF_6.3V_2
1
D100
KSCAN_3S_IN(12) 2
NC
C100
2
3 1
OUT PWR_BTN_OUT# 33 35 48
5 KSCAN_3S_IN(5)
SCAN_3S_IN(5) 3 4 KSCAN_3S_IN(13) DIODE-BAT54-TAP-PHP_DY
2
BAW56S
D304 P5V0S
KSCAN_3S_IN(2) 1 6 SCAN_3S_IN(2)
R9420
1 2
KSCAN_3S_IN(10) 2
2
5 KSCAN_3S_IN(3) 4.7K_5%_2
Q9400
S
SCAN_3S_IN(3) 3 4 KSCAN_3S_IN(11)
1 G
TP9400
3
BAW56S TP30
D
Q9401 SSM3J327R
D
CN9415
1
1 G 1
A PWM#_LED IN 2
1
A
2
S
D302 3 3
KSCAN_3S_IN(0) 1 6 SCAN_3S_IN(0) SSM3K7002FU 4 4
5
2
5
KSCAN_3S_IN(8) 2 38 IN 6 6 G G1
GPIO16 7 G2
7 G
5 KSCAN_3S_IN(1) 8 8
SCAN_3S_IN(1) 3 4 KSCAN_3S_IN(9)
HIROSE_FH34SRJ_8S_0_5SH_50_8P
BAW56S
NOTE:
GPIO16_SM FOR KEYBOARD LIGHT DETECT INVENTEC
TITLE
KEYBOARD
KEYBOARD BACK LIGHT CNTR SIZE

A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S P3V3AL P3V3A
2
2
2
R3511 R3516 D
R3510
0_5%_2_DY 0_5%_2_DY
0_5%_2
INSTALL FOR SLB9656
NO INSTALL FOR SLB9635 INSTALL FOR SLB9635
1
NO INSTALL FOR SLB9656
1
0.1UF_16V_2
C3503
P3V3S
INSTALL FOR SLB9656
U3500 NO INSTALL FOR SLB9635
LPC_3S_AD(0) 26 5
50 48 33 LPC_3S_AD(0) IN LAD0 VSB
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
2
LPC_3S_AD(1) 23
1
50 48 33 LPC_3S_AD(1) IN LAD1 R3514 P3V3S
LPC_3S_AD(2) 20 10 2
C3502
C3504
C3506
1
50 48 33 LPC_3S_AD(2) IN LPC_3S_AD(3) 17
LAD2 NC
19
50 48 33 LPC_3S_AD(3) IN LAD3 VDD
24
VDD
1
CLK_R3S_TPM 21
50 37 CLK_R3S_TPM IN P3V3S
LCLK
4
0_5%_2_DY
2
50 48 33 GND R3501
22
LPC_3S_FRAME# 11
1
LPC_3S_FRAME# IN LFRAME# GND 0_5%_2_DY
GND 18
BUF_PLT_RST# 16 25
C3501 53 50 48 BUF_PLT_RST# IN LRESET# GND
2
37 23 60 54 INSTALL FOR SLB9635
10PF_50V_2_DY R3508 2 0_5%_2NO INSTALL FOR SLB9656 28 7
C 1 LPCPD# PP C
1
2
PCI_3S_SERIRQ NC
48 33 50 PCI_3S_SERIRQ IN 27 3
SERIRQ NC
1
1 15
2 PCI_3S_L_CLKRUN# 12 C3507
PCI_3S_CLKRUN# IN R3513 CLKRUN# NC 1 2
35 48 0_5%_2
INSTALL FOR SLB9635 9 13 R3502
TESTBI_BADDR XTALI 18PF_50V_2
4
3
NO INSTALL FOR SLB9656 BUF_PLT_RST#_R 14
XTALO 0_5%_2_DY
R3507 8 TESTI GPIO 6
X3500
2
1 R3509 2 1 2 2
GPIO2
32.768KHZ
4.7K_5%_2
0_5%_2_DY INFINEON_SLB9635TT1_2FW3_19_TSSOP_28P
C3508
2
1
INSTALL FOR SLB9635 INSTALL FOR SLB9656 1 2
TPM1.2
2
NO INSTALL FOR SLB9656 R3515 NO INSTALL FOR SLB9635
R3512 18PF_50V_2
0_5%_2_DY
0_5%_2
INSTALL FOR SLB9635
1
INSTALL FOR SLB9635
B B
SLB9656TT1.2 SLB9635TT1.2
R3507 INSTALL OPEN
R3508 OPEN INSTALL
R3509 OPEN INSTALL
R3510 OPEN INSTALL
R3511 INSTALL OPEN
R3512 OPEN INSTALL
R3513 OPEN INSTALL
A A
R3514 INSTALL OPEN
X3500 OPEN INSTALL
C3507 OPEN INSTALL
C3508 OPEN INSTALL
INVENTEC
TITLE
REFERENCE NUMER : 3500~3549 MODEL,PROJECT,FUNCTION

TPM
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
34 U400
51 CLKREQ_LAN# 48 13
38 CLKREQ_LAN#
51 OUT PLT_RST# 36
CLK_REQ_N MDI_PLUS0
14
BI 52
TRD0_MB_DP
37 44 72
33 PLT_RST# IN PE_RST_N MDI_MINUS0 BI TRD0_MB_DN 52
34 34 44 17
CLK_PCIE_LAN_DP IN PE_CLKP MDI_PLUS1 BI TRD1_MB_DP 52
45 18
PCIE
CLK_PCIE_LAN_DN IN PE_CLKN MDI_MINUS1 BI TRD1_MB_DN 52
MDI
0.1UF_16V_2 C408
34 OUT 1 2 PCIE_RX6_DP 38 PETp MDI_PLUS2 20
BI
PCIE_RX6_C_DP TRD2_MB_DP 52
34 OUT 1 2 PCIE_RX6_DN 39 PETn MDI_MINUS2 21
BI
PCIE_RX6_C_DN TRD2_MB_DN 52
0.1UF_16V_2 C407 52
34 41 23
PCIE_TX6_C_DP IN PERp MDI_PLUS3 BI TRD3_MB_DP
34 42 24 52
PCIE_TX6_C_DN IN PERn MDI_MINUS3 BI TRD3_MB_DN
PCH_3M_SMCLK 28
SMBUS
6
51 34 PCH_3M_SMCLK BI PCH_3M_SMDATA 31
SMB_CLK RSVD_NC
C 34 51 PCH_3M_SMDATA BI SMB_DATA P3V3M C

4.7K_5%_2 R407
10K_5%_2_DY R405 1 P3V3M_R_1_RSVD 2 1
RSVD_VCC3P3_1 P3V3M
2 1 2 P3V3M_R_2_RSVD 2 1
RSVD_VCC3P3_2
VDD3P3 5 4.7K_5%_2 R406
90MA
LAN_DIS# 3
52 51 38 LAN_DIS# IN LAN_DISABLE_N
0.1UF_25V_2
22UF_6.3V_5
1
1
52 VDD3P3_OUT 4 V3M_LAN_OUT_IN
LED_3S_LANLINK#
C405
C406
51 LED_3S_LANLINK# OUT
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
1UF_6.3V_2
1
1
LED_3S_LANLINK#_R 1R402 470_5%_2
2 26 15
51 52 LED_3S_LANLINK#_R OUT LED0 VDD3P3_15
C402
C413
C414
C415
C416
LED_3S_LANACT# 1 2 27 19
LED
51 55 52 LED_3S_LANACT# OUT LED1 VDD3P3_19
2
R403 470_5%_2 25 LED2 VDD3P3_29 29
TP400 TP401 TP402 TP403 P1V05_LAN
TP30 TP30 TP30 TP30
2
VDD1P0_47 47 332MA
P3V3M 32 46
1
JTAG_TDI VDD1P1_46
R408 10K_5%_2_DY 34 37 P1V05_LAN
JTAG
JTAG_TDO VDD1P2_37
0.1UF_16V_2
0.1UF_16V_2
1
1
1 2 33 JTAG_TMS
1 2 35 JTAG_TCK VDD1P0_43 43
C403
C401
R409 10K_5%_2_DY P1V05_LAN
11
0.1UF_16V_2
VDD1P0_11
1
B 1 404 2 9 B
0.1UF_16V_2
C XTAL_OUT P1V05_LAN
C411
10
2
XTAL_IN
0_5%_2_DY
3
2
18PF_50V_2 TP404 VDD1P0_40 40
C412
TP30 22
25MHZ
VDD1P0_22
X400
R400
VDD1P0_16 16
2
1
30 TEST_EN VDD1P0_8 8
2
2
4
1
1 400 2 12 TP30 TP30

C RBIAS P1V05_LAN
TP410 TP411
L410
3.01K_1%_2
22PF_50V_2
1
CTRL_1P0 7 1 2
1
1K_5%_2
SWF2520CF_4R7K_M
R404
49
2 R401
VSS_EPAD
ITL_82579_PQFN_48P
0.1UF_25V_2
22UF_6.3V_5
1
1
2
C409
C410
2
2
A A
INVENTEC
TITLE
LAN
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

3Q487 2
55 37 LANLINK_STATUS OUT D S IN LED_3S_LANLINK# 51
D
D
G
SSM3K7002FU
LAN_DIS#
52 51 38 LAN_DIS#
1
IN
P3V3M
100K_5%_2
1
R485
2
LAYOUT NOTE:
C Q485 LES_LBSS84LT1G_SOT23_3P C
TO PLACE ONE 0.1UF AT EACH PIN 1 , 4 , 7 , 10
S
AND PLACE THE 1UF IN THE SPOT THAT 1 G
IS AS CLOSE AS POSSIBLE TO ALL 4 PINS
D
3
Q486 TP485 JACK485
1
3
55 33
D
TP30 Green Green LED_3S_LANLINK#_R
1 B1 B2
ISO_PREP# IN G B1 B2 IN LED_3S_LANLINK#_R
1
1 51
55 52 TD+ BI TX+
S
2 C486
55 52 TD- BI
3
TX-
G1
52
SSM3K7002FU 55 52 RD+ BI RX+ G
4
2
55 52 C+ BI
5
C+
680PF_50V_2_DY
55 52 C- BI C-
2
6 G2
1
U470
24
55 52 RD- BI
7
RX- G
3
TCT1 MCT1
22 TD-
55 52 D+ BI
8
D+
51 TRD0_MB_DN BI
2
TD1- MX1-
23 TD+
BI TD- 52
55 55 52 D- BI
A1
D-
A2
LED_3S_LANACT# 51 52
51 TRD0_MB_DP BI TD1+ MX1+ BI TD+ 52

55 A1
Yellow
A2
IN LED_3S_LANACT#
55
1
4 TCT2 MCT2 21 Yellow
6 19 RD- C485
51 TRD1_MB_DN BI
5
TD2- MX2-
20 RD+
BI RD- 55 52
SANTA_130456_231_12P
51 TRD1_MB_DP BI TD2+ MX2+ BI RD+ 55 52
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
1UF_6.3V_2
1
7 TCT3 MCT3 18 680PF_50V_2_DY

B 9 16 C- B
51 TRD2_MB_DN BI TD3- MX3- BI C- 52 55
C476
C477
C478
C479
2
C+
C475
8 17
51 TRD2_MB_DP BI
10
TD3+ MX3+
15
BI C+ 55 52
TCT4 MCT4
12 13 D-
51 TRD3_MB_DN BI
11
TD4- MX4-
14 D+
BI D- 52 55
2
51 TRD3_MB_DP BI TD4+ MX4+ BI D+ 52 55
LANK_LG_2405S_1A_SMD_24P
RJ45+RJ11 CNTR
0.01UF_100V_3
0.01UF_100V_3
0.01UF_100V_3
0.01UF_100V_3
1
1
C473
C472
C471
C470
2
2
R473 2
R472 2
R471 2
R470 2
75_1%_2
75_1%_2
75_1%_2
75_1%_2
1
1 2
A A
1000PF_2000V_6 C474
INVENTEC
TITLE
LAN RJ45 CONN
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P3V3A_Q_WLAN
P3V3ALW
1 TP1300
2 S D 3 TP30 576MA
0.1UF_16V_2_DY
1
Q1300
0_5%_2
1
G
0_5%_2
C1308
1
R1302
PMV65XP
R1304
G
Q1301
1
SSM3K7002FU
OUT CLKREQ_WLAN#
3 2 CLKREQ_WLAN#_R
2
34 D S
P3V3A
2
1
2
R1301
1 2 0_5%_2_DY
R1310 CN1300
R1303
48 WLAN_OFF IN 1 2 1 2
2
35 48 PCIE_WAKE# OUT WAKE# 3.3V
220K_5%_2 0_5%_2_DY 3 RESERVED GND 4
C 54
TP1301 1 5 RESERVED 1.5V 6 R1300 C
4.7UF_6.3V_3
0.01UF_50V_2
CLKREQ_WLAN#_R 7 8
0.1UF_16V_2
CLKREQ# RESERVED
1
9 10 10K_5%_2_DY
GND RESERVED
C1307
C1305
C1301
11 12
1
34 CLK_PCIE_WLAN_DN IN REFCLK- RESERVED
2
13 14
34 CLK_PCIE_WLAN_DP IN REFCLK+ RESERVED
15 RESERVED RESERVED 16 D1300
17 18
NC
RESERVED GND
2
1 19 20 1 3
TP1302 21
RESERVED RESERVED
22
IN WLAN_TRANSMIT_OFF#38
23
GND PERST#
24
IN BUF_PLT_RST#
34 PCIE_RX4_C_DN OUT PERN0 +3.3VAUX
10UF_6.3V_3
25 26
0.1UF_16V_2
34 PCIE_RX4_C_DP OUT PERP0 GND 23 37 48 50 54 60 BAT54_30V_0.2A
1
27 GND 1.5V 28
C1304
C1303
29 GND SMB_CLK 30
34 31 32
PCIE_TX4_C_DN IN PETN0 SMB_DATA
34 33 34
PCIE_TX4_C_DP IN PETP0 GND
35 36 37
GND USB_D- BI USB_P5_DN
2
37 38 37
RESERVED USB_D+ BI USB_P5_DP
39 RESERVED GND 40
41 RESERVED LED_WWAN# 42
43 44
45
RESERVED LED_WLAN#
46
OUT WL_LED_ALL# 61
56
P3V3A 34 CL_CLK1 IN RESERVED LED_WPAN#
34 47 48
CL_DATA1 IN RESERVED 1.5V
B R1306 34 CL_RST#1 IN 49 RESERVED GND 50 B
1 2 51 RESERVED 3.3V 52
BT_OFF# G1 G1 G2 G2
3
10K_5%_2_DY FOX_AS0B226_S40QW_7H_52P
Q1302
D
35 1 G
BT_OFF IN
S
SSM3K7002FU
2
A A
WLAN INVENTEC
TITLE
WLAN
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVSIM
1
D1451
3 BAV99
2
TP1451
TP30
TP1452
TP30 CN1451
1
D P5 GND VCC P1
BI UIM_PWR 54
54 UIM_VPP BI P6 VPP RST P2
BI UIM_RST 54 D
1
P7 P3
54 UIM_DATA BI
P8
DATA CLK
P4
BI UIM_CLK 54
R1451 Reserved Reserved
54 UIM_PWR 1 2 CD
BI CD
18PF_50V_2_DY
18PF_50V_2_DY
G2 G1
4.7UF_6.3V_3
G G
0.1UF_16V_2
47K_5%_2_DY
1
C1405
C1451
C1452
C1453
TAI_PMPAT3_08GLBS7N14N0_9P
SIM CARD
2
CAP CLOSE TO SIM CARD
TP1400
TP30
PVSIM
P3V3ALW
Q1400 2.75A
1
4 S D 1
0.1UF_16V_2_DY
0.01UF_50V_2
2
4.7UF_6.3V_3
68PF_50V_2
68PF_50V_2
68PF_50V_2
1
1
C C
0.1UF_16V_2
68PF_50V_2
68PF_50V_2
1
1
5
C1410
C1411
C1412
C1413
0_5%_2
C1402
C1414
C1415
C1416
C1417
3 G 6
R1404
PMOS_4D1S
TPC6111
2
2
2
R1403
1 2
48 WWAN_OFF IN
220K_5%_2 P3V3S
CN1400
1
PCIE_WAKE# 1 R1406 2 1 2
0_5%_2
53
54 48 35 PCIE_WAKE# OUT WAKE# 3.3V
0_5%_2_DY 3 4
LTE_GPIO0 OUT RESERVED GND
R1402
5 6
LTE_GPIO1 OUT RESERVED 1.5V
7 8
9
CLKREQ# RESERVED
10
BI UIM_PWR 54
GND RESERVED BI UIM_DATA 54
2
11 12
REFCLK- RESERVED BI UIM_CLK 54
2
13 14
15
REFCLK+ RESERVED
16
BI UIM_RST 54
RESERVED RESERVED BI UIM_VPP 54 D1410
17 18
NC
RESERVED GND
B 19 20 1 3 B
21
RESERVED RESERVED
22
IN WWAN_TRANSMIT_OFF#
38 56
GND PERST# IN 23 37 48 50 53 60
23 PERN0 +3.3VAUX 24 BUF_PLT_RST#
25 26 1 R1405
WWAN_DET# 2 BAT54_30V_0.2A
PERP0 GND IN
27 GND 1.5V 28 0_5%_2_DY INTRUDER# 33
29 GND SMB_CLK 30
31 PETN0 SMB_DATA 32
33 PETP0 GND 34 L1400
35 GND USB_D- 36 USB_P12_L_DN 4 3
BI 37
USB_P12_DN
37 RESERVED USB_D+ 38 USB_P12_L_DP 1 2
BI 37
USB_P12_DP
39 RESERVED GND 40 WCM_2012_900T
41 42
43
RESERVED LED_WWAN#
44
OUT LED_WWAN_LINK#
RESERVED LED_WLAN# 56
45 RESERVED LED_WPAN# 46
47 RESERVED 1.5V 48
49 RESERVED GND 50
51 52
38 GPS_XMIT_OFF# IN G1
RESERVED 3.3V
G2
G1 G2
FOX_AS0B226_S40QW_7H_52P
A A
WWAN
INVENTEC
TITLE
WWAN & SIM CARD
DOC.NUMBER REV
A3
CODE
CS
1310xxxxx-0-0 X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
CN3601
DETECT1#1 47
IN 33
DETECT1# PREP#
ISO_PREP#
52 2 48
RD+ IN RJ45_B+ RJ45_D+
IN D+ 52
52 3 49
RD- IN RJ45_B- RJ45_D-
IN D- 52
4 GND GND 50
5 51 C+ 52
52 TD+ IN RJ45_A+ RJ45_C+
IN
52 6 52 52
TD- IN RJ45_A- RJ45_C-
IN C-
7 GND GND 53
8 Reserved Reserved 54
9 Reserved Reserved 55
10 GND GND 56
52 11 57
LANLINK_STATUS IN RJ45_LINKLED# Reserved PCIe TX1+
12 58
LED_3S_LANACT# IN RJ45_ACTLED# Reserved PCIe TX1-
13 Reserved GND 59
57 14 60
C LINE_IN_SENSE IN LINE_IN_SENSE Reserved PCIe RX1+
C
57 15 61
LINE_OUT_SENSE IN LINE_OUT_SENSE Reserved PCIe RX1-
16 AUDIOAGND GND 62
57 17 63
A_LINEINL_DOCK IN LINE_IN_L Reserved DPB_ML1+
IN DPC0_DP 36
57 18 64
A_LINEINR_DOCK IN LINE_IN_R Reserved DPB_ML0-
IN DPC0_DN 36
19 AUDIOAGND GND 65
57 20 66
PR_AOUT_L_DOCK IN LINE_OUT_L Reserved DPB_ML1+
IN DPC1_DP 36
57 21 67
PR_AOUT_R_DOCK IN LINE_OUT_R Reserved DPB_ML1-
IN DPC1_DN 36
22 AUDIOAGND GND 68
48 23 69
LED_PWRSTBY# IN PWRLED Reserved DPB_ML2+
36 DPC_HPD IN 24 Reserved DPB_HPD Reserved DPB_ML2- 70

25 GND GND 71
26 Reserved DPB_CTRLDATA
Reserved DPB_ML3+ 72
27 Reserved DPB_CTRLCLK
Reserved DPB_ML3- 73
28 GND GND 74
36 29 75
DDCAUX_C0_DN IN Reserved DPB_AUX- DP_ML0+
IN DPB0_DP 36
30 76
36 DDCAUX_C0_DP IN Reserved DPB_AUX+ DP_ML0-
IN DPB0_DN 36
31 GND GND 77
34 32 78
I2C_CLK IN Reserved PCIe CLK1+ DP_ML1+
IN DPB1_DP 36
34 33 79
I2C_DATA IN Reserved PCIe CLK1- DP_ML1-
IN DPB1_DN 36
34 80
36 DPB_HPD IN DPA_HPD GND
35 81
36 DPB_DDC2DATA IN DPA_CTRLDATA DP_ML2+
IN DPB2_DP 36
36 82
36 DPB_DDC2CLK IN DPA_CTRLCLK DP_ML2-
IN DPB2_DN 36
B 38 DOCK_ID1 IN 37 DOCK_ID1 GND 83 B
38 84
36 DDCAUX_B0_DN IN DPA_AUX- DP_ML3+
IN DPB3_DP 36
39 85
36 DDCAUX_B0_DP IN DPA_AUX+ DP_ML3-
IN DPB3_DN 36
40 86
9 SLP_S3#_3R IN SLP_S3# GND
41 87
SLP_S4#_KBC IN RESERVED_SLP_S4# USB3_RX+
IN USB30_RX1_DP 37
42 88
VA_ON# USB3_RX-
IN USB30_RX1_DN 37
43 89
ON_OFF# IN NBSWON# GND
1K_5%_2_DY
0.1UF_16V_2_DY
37 USB_P0_DP 44 90
IN IN USB30_TX1_DP
2 R3600 1
RESERVED (I2C_CLK/USB1+) USB3_TX+

PVADPTR 45 91 37
37 USB_P0_DN IN RESERVED (I2C_Data/USB1-) USB3_TX-
IN USB30_TX1_DN
DETECT1# 37
C3602
46 92
LIMIT_SIGNAL IN DOCK_ADP_SIGNAL DETECT2#
P1 VA(120W) GND G1
0.1UF_25V_3
G3 G2
0.1UF_25V_3
GND GND
1
G4 GND GND G5
2
C3600
C3601
FOX_QL1046L_D262AR_7H_92P
2
AGND_AUDIO
A A
INVENTEC
TITLE
DOCKING CNTR
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D P3V3S
P5V0S D
2
CN200
2
R118 R113 P3V3S
G G1
4.7K_5%_2 1 1
4.7K_5%_2 2
P3V3AL 2
1
3
1
3
IN 61
56 53 4
WL_LED_ALL# 5
4
3
5
61 55 48 6
Q112 LED_PWRSTBY# OUT 6
48 33 7
OUT
D
7
BAT_GRNLED#
1 G 48 8
WWAN_TRANSMIT_OFF# IN BAT_AMBERLED# OUT 8
33 9
LED_3S_SATA# OUT 9
S
33 10
SSM3K7002FU HDD_HALTLED IN 10
56
61 53 11
WL_LED_ALL# OUT 11
12
2
12
13 13
37 14
SC_PWRSV# OUT 14
37 15
IN USB_P7_DN BI 15
16
LED_WWAN_LINK#54 37 USB_P7_DP BI
17
16
48 IM_5S_DATA BI 17
C 48 18 C
IM_5S_CLK BI 18
19 19
20 20
21 21
WLAN_WWAN_BLUETOOTH_ LED 34 47 29 32 PCH_3S_SMDATA BI

PCH_3S_SMCLK BI
22
23
22
23
32 34 47 29 24 24
56 ST_LEFT 25
BI 25
56 ST_RIGHT 26
BI 26
G G2
ACES_51536_02641_001_26P
P5V0S
B
8
CN202
8
SMART CARD B
7 7 G G2
6 6 G G1
48 5
SP_DATA BI 4
5
48 SP_CLK BI 4
56 3
ST_LEFT BI 2
3
2
56 1
ST_RIGHT BI 1
A POINT STICK A
INVENTEC
TITLE
STICK POINT & B2B CNTR

A3
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
X5R
57
20K_1%_2
SENSE_B IN
1
1 2
R528
C511
+
1
PR_AOUT_C_L_DOCK R5222 PR_AOUT_L_DOCK
PR_AOUT_L_AB IN OUT 55
57
150UF_6.3V 30_1%_3
1 2
23
P3V3S C512
+
1
PR_AOUT_C_R_DOCK R523
2
PR_AOUT_R_AB IN OUT PR_AOUT_R_DOCK 55
Q528 57
150UF_6.3V 30_1%_3
1
1
0_5%_2
G
20K_1%_2
IN
20K_1%_2
LINE_IN_SENSE X5R
1
X5R
100K_5%_2
2
55
S
C526
R517
57 A_LINEINR R504
R502
1 2 1 2
2 R503
SSM3K7002FU OUT IN A_LINEINR_DOCK 55
R529
D500 6.2K_1%_2
2
2.2UF_6.3V_3
2
1 2 C514
2
48 A_SD# IN 1 2
SPKR_EN_AB 57 A_LINEINL 1 2 1 R505 2
D 1 OUT IN A_LINEINL_DOCK 55
6.2K_1%_2
2.2UF_6.3V_3 D
AGND_AUDIO
0.1UF_16V_2
1SS355VMTE_17
R506 2
R507 2
2K_5%_2
2K_5%_2
AGND_AUDIO
C527
AGND_AUDIO
X5R
57 59
1
SENSE_A OUT
1
R531
P5V0S_AUDIO_AVDD P5V0S
P3V3S P3V3S AGND_AUDIO INT-SPEAKER CONN.
23
39.2K_1%_2
Q530 750MA
85MA
TP641
TP642
D
55 1 G
IN
0.1UF_16V_2
0.1UF_16V_2
LINE_OUT_SENSE CN640
10UF_6.3V_3
TP30
TP30
1UF_6.3V_2
1
1
1
1
P5V0S_AUDIO_AVDD
1UF_6.3V_2
S
C506
C507
C509
C510
SSM3K7002FU C502
C508
1 3
1
R530 C505 57 SPK_OUT_R_DP IN 1 G
2 4
2
2 1 C503 SPK_OUT_R_DN IN 2 G
10UF_6.3V_3 57
C504
2.49K_1%_2
2.49K_1%_2
1
1
2
2
100K_5%_2 1UF_6.3V_2 ACES_50224_0020N_001_2P
2
0.1UF_16V_2 U501
C C
2
2
1 27
2 R512
TP643
TP644
2 R511
DVDD_CORE AVDD1
AVDD2 38
0.1UF_16V_2
TP30
TP30
AGND_AUDIO CN641
3 DVDD_IO PVDD1 45
39 AGND_AUDIO
1
PVDD2 59 57 SENSE_A IN 1 3
57 SENSE_B IN 57 SPK_OUT_L_DN IN 1 G
1000PF_50V_2
1000PF_50V_2
2 4
9 DVDD SENSE_A 13
OUT SENSE_A 57 57 SPK_OUT_L_DP IN 2 G
1
14
SENSE_B OUT SENSE_B 57 ACES_50224_0020N_001_2P
C524
C525
28
HP0_PORTA_L OUT PR_AOUT_L_AB 57
2200PF_50V_2
2200PF_50V_2
2200PF_50V_2
2200PF_50V_2
P3V3S 29
HP0_PORTA_R OUT PR_AOUT_R_AB 57
1
VREFOUT_A 23
2
6
C640
C641
C642
C643
33 AZ_R3S_BITCLK IN HDA_BITCLK
31 59
5
HP1_PORTB_L
32
OUT HP_OUT_L1
4.7K_5%_2
33 AZ_R3S_SDOUT IN HDA_SDO HP1_PORTB_R OUT HP_OUT_R1 59

1
1UF_6.3V_3 X7R
2
33 10 19 C530
1 2 58
AZ_R3S_SYNC IN HDA_SYNC PORTC_L IN A_MIC
1 2 R513
20
82R514
PORTC_R
24
IN EXT_MIC_JACK 59 58
33 AZ_R3S_SDIN0 OUT 1 HDA_SDI VREFOUT_C/GPIO4 OUT MIC_BIAS 59 AGND_AUDIO
R534 2
R535 2
R536 2
R537 2
3.3_5%_2
3.3_5%_2
3.3_5%_2
3.3_5%_2
33_5%_2
33 11 15
IN HDA_RST# PORTE_L
0_5%_2_DY
AZ_R3S_RST#
16
21 R515 1
PORTE_R
0.01UF_50V_2
B B
C522
17
PORTF_L IN A_LINEINL 57
1
18
PORTF_R IN A_LINEINR 57
10PF_50V_2_DY
SPKR_EN_AB 47 EAPD
40
2
R516 SPK_PORTD_+L OUT SPK_OUT_L_DP 57

1 22 41 P5V0S_AUDIO_AVDD
43 DMIC_CLK OUT DMIC_CLK/GPIO1 SPK_PORTD_-L OUT SPK_OUT_L_DN 57
C523
4
100_5%_2
DMIC_DAT IN
DMIC0/GPIO2
43 44
1
SPK_PORTD_+R OUT SPK_OUT_R_DP 57
0_5%_2
48 43 57
46
SPDIFOUT0/GPIO3 SPK_PORTD_-R OUT SPK_OUT_R_DN
R508
2
DMIC1/GPIO0/SPDIFOUT1
MONO_OUT 25
C518 R509 C520
36 12 1 2 PCBEEP_IC_C 2 1 1 2
2
CAP+ PCBEEP
PCBEEP_IC_CR PCBEEP_CRC
49 REC_MUTE_LED_CNTR OUT 0.1UF_16V_2 0.1UF_16V_2
3
100K_5%_2
0.01UF_50V_2
PLAY_MUTE_LED_CNTR OUT 21
1
61 VREFFILT Q500
0_5%_2
C521 22
D
CAP2
C519
35 2 34
2 R510
1 G 1
CAP- V-
37
IN A_3S_ICHSPKR
VREG(+2.5V) 33
4.7UF_6.3V_3
4.7UF_6.3V_3
4.7UF_6.3V_3
S
10UF_6.3V_3
1UF_6.3V_2
1
1
1
7 SSM3K7002FU
2
X5R DVSS
C515
C516
C529
2
C517
TP500 42 26
PVSS AVSS1
TP30 30
P5V0S P5V0S_AUDIO_AVDD AVSS2
2
A 49 PAD AVSS3 33 A
2
2
U500 AGND_AUDIO
1
1 5
10UF_6.3V_3
IN OUT
IDT_92HD91B2X5NLGXWCX_QFN_48P
1
2 GND
AGND_AUDIO
C501
NR 4
0.015UF_10V_2
1
3
SLP_S3#_3R IN EN
PAD500
TI_HPA01085DVBR_SOT23_5P 1 2 1 TP510
1 2
AGND_AUDIO
2
42 35 27 21 20 19 18 9
C500
45 48 55 TP30
POWERPAD_2_0610
INVENTEC
2
AGND_AUDIO AGND_AUDIO
TITLE
AUDIO CODEC

A4
CODE
CS
DOC.NUMBER
1310xxxxx-0-0
REV
X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P5V0S_AUDIO_AVDD
IN VREF_EQ 58 C615
C C612 1 2 C
1
2 1
A_MIC OUT
57 0.1UF_16V_2
C616 15PF_50V_2
100PF_50V_2 R612 U610 X7R
2 1 1 1OUT VDD+ 8
L627
C620 AGND_AUDIO
BLM18PG600SN1D 100K_5%_2
2
1 2 1 2 2 R617 1 2 7
59 57 EXT_MIC_JACK IN 1IN- 2OUT IN VREF_EQ 58
1
0_5%_2 3 6
0.47UF_10V_3 1IN+ 2IN-
C617 R618 1
X5R 4 GND 2IN+ 5 2
68PF_50V_2 100K_5%_2
TI_TLV2462CDGKR_MSOP_8P
1
0.1UF_16V_2
100K_5%_2
2.2UF_6.3V_2
C614
R619
AGND_AUDIO
C613
2
2
X7R X5R
B B
REFERENCE NUMBER:600~649 AGND_AUDIO
A A
INVENTEC
TITLE
EXT. MIC AMPLIFIER
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P5V0A_USB_CHARAGE
1
1000PF_50V_2_DY
0.1UF_16V_2
D
C2503
C2502
D
2
L2500 1 CN2500
VBUS
3 4 USB_P1_U_L_DN 2
45 USB_P1_U_DN BI
2 1 USB_P1_U_L_DP 3
D-
45 USB_P1_U_DP BI 4
D+
PGND
WCM_2012_900T 5
37 USB30_RX2_DN OUT 6
SSRX-
37 USB30_RX2_DP OUT
0.1UF_16V_2 7
SSRX+
GND
C2500 1 2 USB30_TX2_C_DN 8
37 USB30_TX2_DN IN
C2501 1 2 USB30_TX2_C_DP 9
SSTX-
G1
37 USB30_TX2_DP IN
0.1UF_16V_2
SSTX+ G
G2
G
G G3
G G4
SINGA_2UB1585_000121F_9P
C C
USB CHARGER
P5V0S_AUDIO_AVDD
57
OUT SENSE_A JACK600 G1
G1
G2 G2
G3 G3
B 1
G4 G4 B
1 R604 L602
7 1 2
R603
7
1 R602 OUT EXT_MIC_JACK 58 57
20K_1%_2 1 R600 16_1%_2 BLM18PG600SN1D 1 2
100K_5%_2 2 2 2 L600 1 2 1 2
IN 57 IN MIC_BIAS 57
6 HP_OUT_L1
6 FBM_11_160808_121T 2.2K_5%_2
3
2 3 1 2 1 R601 16_1%_2
2 TP600
3 L601 IN HP_OUT_R1 57 1
Q600 4
4 FBM_11_160808_121T OUT JACK_DET 59
0.033UF_16V_2
0.033UF_16V_2
1
59
D
5 5 TP30
1
1
1 G C600
JACK_DET IN
220PF_50V_2
TP30
TP30
TP30
TP30
TP30
TP30
SINGA_2SJ3112_000111F_7P 1UF_6.3V_2
C601
C602
S
TP602
TP603
TP604
TP605
TP606
C603
TP601
2
SSM3K7002FU
2
AGND_AUDIO
AGND_AUDIO
AGND_AUDIO AGND_AUDIO
A A
INVENTEC
TITLE
AUDI JACK & USB3.0(LEFT) DB
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
C801
1 2
IN SD_MMC_CLK60
2.2UF_6.3V_2
22PF_50V_2_DY
1
C815
P3V3S
108MA AS CLOSE AS POSSIBLE TO JMB700
2
0.1UF_16V_2
1
SD_MMC_DATA160
SD_MMC_DATA260
SD_MMC_DATA360
SD_MMC_DATA060
D
C802
60
SD_MMC_CMD
D
2
P3V3S P1V8S_CARD
TP800
IN
IN
IN
IN
IN
1
TP30
1
0.1UF_16V_2
C800
2
48
47
46
45
44
43
42
41
40
39
38
37
BUF_PLT_RST#
IN
54 53 50 48 37 23
MDIO0
MDIO1
MDIO2
MDIO3
DV33
SDDV33_18
MDIO5
MDIO4
MDIO7
TXIN
GND
DV18
C P3V3S_VCC_READER C
1 XRSTN NC 36
2 35
P1V8S_CARD XTEST NC
34 3 34
CLK_PCIE_CARD_DN IN APCLKN NC
34 4 33
CLK_PCIE_CARD_DP IN APCLKP NC
5 APVDD GND 32 60 IN SD_MMC_CLK CN820
4
6 APGND U800 GND 31 60 IN SD_MMC_CMD SD_VDD
5
10UF_6.3V_3
1 R804 12K_1%_2
2 7 30 SD_MMC_DATA0 2 SD_CLK
0.1UF_16V_2
0.1UF_16V_2
CLOSE TO PIN5
APREXT NC 60 IN SD_CMD
1
34 IN 8 APRXP MDIO8 29 60 IN SD_MMC_DATA1 7

PCIE_TX3_C_DP 8 SD_DATA0
SD_MMC_DATA2 SD_DATA1
C816
C817
C818
34 9 28 60 9
PCIE_TX3_C_DN IN APRXN MDIO9 IN 1 SD_DATA2
34 C811 10 APV18 MDIO10 27 60 IN SD_MMC_DATA3 SD_DATA3_CD

10
1 2 0.1UF_16V_2 PCIE_RX3_DN 11 26 60 SD_MMC_WP 11 SD_WP
PCIE_RX3_C_DN OUT APTXN MDIO11 IN SD_CD_SW
CR1_PCTLN
12
CR1_CD1N
CR1_CD0N
CR1_LEDN
OUT 1 2 PCIE_RX3_DP 12 APTXP NC 25 60 38 IN D3E_WAKE# SD_COM
PCIE_RX3_C_DP 3 G1
2
SD_VSS1 GND1
34 6 G2
CPPE*
MDIO6
C813 0.1UF_16V_2 SD_VSS2 GND2
1
DV18
DV33
DV33
NC
NC
NC
0.1UF_10V_2_DY
PLAST_CS1R_201_H_N_12P
C820
P3V3S
CLOSE TO PIN10
13
14
15
16
17
18
19
20
22
23
24
R818
21
JM_JMB709_LQFP_48P
1 2
0_5%_2_DY
2
R820
1 2
10K_5%_2_DY
34 3 2 IN SD_MMC_WP60
CLKREQ_PCIE_CARD# IN D S
B B
G
P3V3S Q800
SSM3K7002FU
1
D3E_WAKE# IN
60 38 P3V3S
PLACE R821,C819,C820 CLOSE TO U820
0.1UF_16V_2
1
C809
P3V3S_VCC_READER
2
R821
1 2
IN SD_MMC_WP 60
1K_5%_2
P3V3S_VCC_READER
TP8191
A TP30 A
1
10UF_6.3V_3
P1V8S_CARD
C819
10UF_6.3V_3
2
C814
PLACE C814 CLOSE TO U800-18

2
INVENTEC
TITLE
CARD READER
DOC.NUMBER REV
REFERENCE NUMBER:800~899 CHANGE by DATE
SIZE
A3
CODE
CS 1310xxxxx-0-0
SHEET
X01
XXX 21-OCT-2002 60 of 80
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
MUTE BOTTON
P3V3S
49 KSCAN_3S_IN(0) IN OUT SCAN_3S_OUT(17)
3
48 61 R115
SW154
PureWhite 270_5%_2
D 1 4
1
1 2
3
53
56 WL_LED_ALL# IN - +
D
G1 GND
2 - + 3 1 2
Yellow
R114
3
270_5%_2
4
D110
MISAKI_NTC011_BA1J_A160T_4P Q110
D
EVL_23_22B_Y2ST3D_C30_2T_4P
1 G
S
WIRELESS BOTTON
SSM3K7002FU
SCAN_3S_OUT(17)
2
KSCAN_3S_IN(1) IN OUT 48 61
49
3
SW152
3
G1 GND
4
MISAKI_NTC011_BA1J_A160T_4P
C 4
WIRELESS/BLUETOOTH LED C
P3V3AL
0.1UF_16V_2
1
C9413
2
U9413
1 VDD
GND 3
2
48
43 LID_SW#_3 OUT OUT
MAG_MH248BESO_SOT23_3P EVL_23_22B_Y2ST3D_C30_2T_4P
P3V3S
R126
Q125 D126 270_5%_2
S1 1
2 2 Yellow 3 1
B PLAY_MUTE_LED_CNTR OUT G1 - + 2 B
57 6
D1 3 1 4 1
D2 - + 2
5 G2 PureWhite R127
4 270_5%_2
S2
2N7002DW
2 1
SW9021 P3V3AL R130
OUT ON_OFF# 21 49 55
2
0_5%_2
2
130_1%_2
2
R9031
G1 GND
19_217_W1D_AP1Q2QY_3T
1
2 1
3
1
MISAKI_NTC011_BA1J_A160T_4P
MUTE LED
D9006
A A
1
56 55 48 LED_PWRSTBY# OUT
POWER SWITCH
INVENTEC
TITLE
BUTTON LED
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
XTAL_12M_OUT
X9400
1
XTAL_12M_IN 2
NC
18PF_50V_2
18PF_50V_2
12MHZ
1
P5V0S_SM P3V3AL_SM
C9418
C9419
D9001
24MA
NC
1 2 1 R9002 2
62 LED_SM_PWRSTBY# IN 1 2
270_5%_2
2
PVSM_VCC_SM EVL_12_21_T3D_CP1Q2B12Y_2C_2P
C9406
DGND_SM
P3V3S_SM_AB
0.1UF_16V_2
DGND_SM POWER LED
P3V3AL_SM
1
2
1 R9412 D9002
1
U9400 2 WHITE
62 SCARDC8 1 28 2 Pure White
IN SCARD0C8 XO
0_5%_2_DY 62 BAT_SM_GRNLED# OUT -
R9003 2
R9400 62 SCARDC6 2 27 R9402 1 1
D IN SCARD0C6 XI
62 +
4.7K_5%_2 62 3 26 3 Yellow
SCARDFCB IN SCARD0FCB PWRSV_SEL IN SC_PWRSV#_SM 100K_5%_2 BAT_SM_AMBERLED# OUT -
270_5%_2 D
4 SMIO_5VPWR LEDCRD 25 YELLOW
62
DGND_SM 5 24
2
62 SCARDRST IN SCARD0RST LEDPWR EVL_12_22_Y2ST3D_C30_2C_3P
2
6 23
R9401 2 62 SCARDCLK IN SCARD0CLK RESET
62 SCARDDATA IN 1
P3V3S_SM_AB 470_5%_2 62 USB_P7_SM_DN IN
7
8
SCARD0DATA
DM
EEPDATA
EEPCLK
22
21
P3V3S_SM_AB
BATTERY LED
1
62 9 20
USB_P7_SM_DP IN 10
DP P1-6
19 ICCINSERTN
AV33 ICCINSERTN OUT 62 C9411
11 18
PVSM_VCC_SM SCPWR0 VDDH
1UF_6.3V_2
12 17
5VGND VDDP P1V8S_SM
1
1
13 5VINPUT VDD 16
2
C9405 14 V33OUT V18OUT 15
1
C9410
C9404 ALCOR_AU9542B56_GBS_GR_SSOP_28P
0.1UF_16V_2
DGND_SM 0.1UF_16V_2
2
2
1UF_6.3V_2 P5V0S_SM P3V3S_SM_AB
DGND_SM P3V3S_SM
1
TP94031
2
D9032
C9409 C9407
TP30 WHITE 2
DGND_SM 1UF_6.3V_2
Pure White
- R9000
DGND_SM
1
1
0.1UF_16V_2 1 1 2
2
+
C9403 C9402 3 -
Yellow
270_5%_2
DGND_SM C9401 C9400
YELLOW
3
EVL_12_22_Y2ST3D_C30_2C_3P
C 1UF_6.3V_2 0.1UF_16V_2 1UF_6.3V_2
0.1UF_16V_2
C
Q9000
2
D
DGND_SM 1 G
62 WL_LED_SM_ALL# IN
WIRELESS LED
S
SSM3K7002FU
2
DGND_SM DGND_SM 1 TP9000
TP30
PVSM_VCC_SM
CN9410
TP94151 1 VCC
DGND_SM
62 SCARDRST 2 CN9412
TP30 OUT RST
P5V0S_SM
62 SCARDCLK 3 G2 P3V3S_SM
OUT CLK G
0.1UF_16V_2
1
62 SCARDFCB 4 26
OUT C4
P3V3S_SM
26 P3V3S_SM
C9415
62 SCARDC6 6 25
OUT
1K_5%_2
VPP 25
1
7 24 D9030
62 SCARDDATA OUT IO P3V3AL_SM 24
I425
R9008
8 23 WHITE 2
62 SCARDC8 OUT
C8 23 Pure White
22 - R9005
22
1 1 2 270_5%_2
3
9 LED_SM_PWRSTBY# 21 +
2
62 ICCINSERTN OUT SW-CD 62 IN 21

3 Yellow
BAT_SM_GRNLED# Q9001 HDD_STP# IN -
B 62 OUT 20 20 B
D
10 62 BAT_SM_AMBERLED# 19 YELLOW EVL_12_22_Y2ST3D_C30_2C_3P
SW-CD-GND OUT 19
1 G
5 GND 62 IN LED_3S_SM_SATA# 18 18 HDD_STP# SSM3K7002FU
DGND_SM 62 IN HDD_SM_HALTLED 17 17
S
HAMB_083AA24F08B_10P 62 WL_LED_SM_ALL# 16
IN 16
15
3
15 IN LED_3S_SM_SATA#
2
14 62
14 Q9002
62 IN SC_PWRSV#_SM 13 13 62
D
DGND_SM 62 USB_P7_SM_DN 12 1 G
IN 12
HDD_SM_HALTLED IN
62 USB_P7_SM_DP 11
100K_5%_2_DY
IN 11
1
SSM3K7002FU
S
62 BI IM_5S_DATA_SM 10 10
62 BI IM_5S_CLK_SM 9 9
R9007
8
2
P3V3S_SM 8
62 ST_RIGHT_SM
BI
ST_LEFT_SM
1
2
CN9413
1
7
6
7
6 SATA LED & HDD-HALTED LED
2
62 BI 2
PCH_3S_SMDATA_SM 5
3 62 BI 5
62 IM_5S_CLK_SM BI 3
PCH_3S_SMCLK_SM 4
4 62 BI 4
62 IM_5S_DATA_SM BI 4
3
5 3
5
62 BI ST_LEFT_SM 2 2
62 PCH_3S_SMCLK_SM BI 6 6 G G1
7 G2 62 BI ST_RIGHT_SM 1 1
62 PCH_3S_SMDATA_SM BI 8
7 G
G G1
8
DGND_SM
DGND_SM
1
1000PF_50V_2
A A
C9416
ACES_51536_02641_001_26P
2
DGND_SM
DGND_SM
DGND_SM
TOUCHPAD DGND_SM
S9400
SCREW420_700_0_1P
INVENTEC
1
FIX9400 FIX9401 FIX9402 FIX9403 FIX9404 FIX9405 TITLE
SMART CARD DOUGHTER BOARD SMART CARD DB

1
1
FIX_MASK FIX_MASK FIX_MASK FIX_MASK FIX_MASK FIX_MASK DOC.NUMBER REV
SIZE CODE
DGND_SM A3 CS
1310xxxxx-0-0 X01
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CN630 P3V3S_CAM
D 1 1
OUT DMIC_CLK_DB
2 2
OUT DMIC_DATA_DB D
3 3
4 1 L6302 1 TP630
4
5 5 BLM15AG121SS1D TP30
6 6
1
7 7
8 8
G1 9 C630
G 9
G2 G 10 10 1UF_16V_3
ACES_50376_01001_001_10P
2
DGND_SYS1 DGND_SYS1
DGND_SYS1
C C
P3V3S_CAM P3V3S_CAM
1
1
C631 C632
0.1UF_16V_2 0.1UF_16V_2
P3V3S_CAM
2
2
X7R X7R
MIC630 MIC631
B 1 GND VDD 6 1 GND VDD 6 B
DGND_SYS1 DGND_SYS1
2 5 2 5
L_R DATA IN DMIC_DATA_DB L_R DATA IN DMIC_DATA_DB
3 4 3 4
GND CLK IN DMIC_CLK_DB GND CLK IN DMIC_CLK_DB
KNOWLES_SPM0423HD4H_WB_6P
KNOWLES_SPM0423HD4H_WB_6P
LEFT RIGHT
DGND_SYS1
DGND_SYS1
A A
REFERENCE NUMBER:630~639 FIX630
FIX_MASK_0.8 FIX_MASK_0.8
FIX631 FIX632
FIX_MASK_0.8
INVENTEC
MIC DOUGHTER BOARD
1
1
TITLE
MIC DB
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
S9 SCREW250_0_0_1P
S15 SCREW300_600_1P
1
S1
1
SCREW250_500_1P
S5 S7 ST16
SCREW330_600_0_1P STDPAD_3.15_5.5_TOP
1
SCREW330_600_0_1P 1.75MM
1
S25
SCREW250_550_500_1P
ST17
1
D S4 STAPAD_1.15_6_1P
1.75MM D
SCREW450_800_600_1P
1
1
ST18 SCREW300_700_1P
S23
STAPAD_1.15_6_1P
1
S8 1.75MM
S3 S6
1
SCREW330_600_0_1P SCREW330_600_0_1P
SCREW450_700_0_1P
1
1
ST19
STDPAD_3.15_5.5_TOP
1.75MM
1
S20
S2
S10 SCREW450_800_600_1P
SCREW450_800_1P
1
SCREW450_800_600_1P
1
1
C C
ST21
STDPAD_3.15_5.5_TOP
1.75MM
S27
1
SCREW250_550S_1P
1
ST22
STDPAD_3.15_5.5_TOP
1.75MM
1
FIX1 FIX2 FIX3
S26
1
FIX_MASK FIX_MASK FIX_MASK
SCREW250_500_1P
B B
FIX4 FIX5 FIX6
1
PVBAT PVBAT
1
FIX_MASK FIX_MASK FIX_MASK
9 8
65 VBATP IN S28
2200PF_50V_2
2200PF_50V_2
2200PF_50V_2
2200PF_50V_2
68PF_50V_2
68PF_50V_2
68PF_50V_2
68PF_50V_2
0.1UF_25V_2
0.1UF_25V_2
0.1UF_25V_2
0.1UF_25V_2
1
1
C7639
C7640
C7641
C7642
C7643
C7644
C7645
C7646
C7647
C7648
C7649
C7650
SCREW250_500_1P
S24
2
SCREW300_700_600_1P
1
CLOSE TO Q6100 CLOSE TO Q6150 CLOSE TO Q6200 CLOSE TO Q6300
A A
INVENTEC
TITLE
SCREW
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVADPTR PVADPTR
PVBAT
1
C7551 C7553
C7550 C7552
1
1
1
C7666 C7667
12PF_50V_2 68PF_50V_2 12PF_50V_2 68PF_50V_2 C7664 C7665
P5V0S P5V0A
2
C7663
1 2 0.1UF_25V_2 0.1UF_25V_2
0.1UF_25V_2 0.1UF_25V_2
2
2
2
0.1UF_16V_2
PVADPTR P5V0A_CHG
D P3V3S P1V05S_VCCP
C7656 D
1 2 PVBAT
1
1
C7555 C7557 0.1UF_16V_2
C7554 C7556
1
1
1
1
1
C7670 C7634 C7635 C7636
12PF_50V_2 68PF_50V_2 12PF_50V_2 68PF_50V_2 P3V3S P1V05S_VCCP C7668 C7669
2
2
C7677
1 2 0.1UF_25V_2
0.1UF_25V_2 0.1UF_25V_2 0.1UF_25V_2
0.1UF_25V_2 0.1UF_25V_2
2
2
2
0.1UF_16V_2
P5V0A_CHG P5V0A_CHG
1
1
C7559 C7561
C7558 C7560
12PF_50V_2 68PF_50V_2 12PF_50V_2 68PF_50V_2 PVPACK

P5V0A_CHG P3V3ALW
2
2
C C
1
C7672 C7673
C7632 C7633
PVBAT PVADPTR 0.1UF_25V_2 0.1UF_25V_2

0.1UF_25V_2 0.1UF_25V_2
2
1
C7509 C7510 C7511

C7508
68PF_50V_2
68PF_50V_2 68PF_50V_2 68PF_50V_2
2
PVBAT
OUT VBATR_CPU 65
16
1
1
1
C7699
C7698 C7637
P1V5 0.1UF_25V_2
0.1UF_25V_2
6 MFET_A OUT 0.1UF_25V_2
2
1
2
B C7512 C7514 C7515 B
C7516
68PF_50V_2 68PF_50V_2 68PF_50V_2 68PF_50V_2
2
C7513 EMI SOLUTION

68PF_50V_2
P1V8S P1V8S P1V5 P1V5S C7678 C7694

C7690 C7629
1 2 1 2 64
8 VBATP 1 2
1 2 OUT PVBAT
1
9
0.1UF_16V_2 0.1UF_16V_2
C7518 C7519 C7520 0.1UF_16V_2 0.1UF_25V_2
C7517
2
68PF_50V_2 68PF_50V_2 68PF_50V_2 68PF_50V_2 C7679 C7695 L7600
C7628
1 2 1 2
1 2
P1V5S
P1V5
2
C7691 0.1UF_16V_2 0.1UF_16V_2 120OHM_25%_DY

0.1UF_25V_2
1 2
1
C7681 C7696 5 17 C7626
0.1UF_16V_2 1 2 1 2 1 2
PVADPTR_IN OUT
VBATR_CPU
65
16 OUT
0.1UF_16V_2 0.1UF_16V_2 0.1UF_25V_2
P1V05S_VCCP
A P1V5 P1V5S C7697 A
C7692
1 2
1
1 2
C7521 C7522 0.1UF_16V_2
0.1UF_16V_2 AGND_AUDIO
68PF_50V_2 68PF_50V_2
P1V5 P1V5S
C7693
2
1 2
0.1UF_16V_2
AGND_AUDIO
INVENTEC
TITLE
RF SOLUTION EMI & RF SOLUTION
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
C C
B B
A A
INVENTEC
TITLE
SYSTEM SEQUENCE
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
PVCORE_DGPU
PAD6750
1 2
VRPVCORE_DGPU IN 1 2
POWERPAD_2_0610 MAX=50A
OCP=42A
PVBAT
C C
POWERPAD_2_0610
15UF_25V_DY
1
1
C6799
PAD6760
+
71 EN_DGPU IN
1
2
2
1
1K_5%_2
R6755
2
R6755=100K , FSW=300KHZ
R6755=200K , FSW=400KHZ
OUT 51219VREF R6755=1K , FSW=500KHZ Q6750
2
TI_CSD87588N_LGA_5P
R6752
1 2 VIN 2 VRPVBAT_DGPU
Control
0_5%_2 R6765 C6765 FET
10UF_25V_5
10UF_25V_5
10UF_25V_5
0.1UF_25V_2
P3V3S 71 DGPU_PG OUT
1
1
0_5%_2_DY
1 R6766 2 2.2_5%_3 0.1UF_16V_2 1

DGPU_VID1 IN TG
C6760
C6761
C6762
C6763
1 2 1 2
R6750
SHORT_0402_5 VSW 5
17
16
15
14
13
U6751
1 R6767 2 ANPEC_APL6502A8I_TRG_8P
R6762 2
SHORT_0603_25
DGPU_VID2 IN 5 VID0 VDA 3 U6750
Sync
0.033UF_16V_2
SHORT_0402_5 2 4 BG FET
B VID1 B
PGND
1
2
1 R6768 2 1 4
PWPD
PGOOD
EN
BST
MODE
DGPU_VID3 IN VID2 VDD
C6770
SHORT_0402_5 8 VID3
R6769 2 7 VID4 GND 6 1 VREF SW 12 VRPVCORE_DGPU_PH
1
1
DGPU_VID4 IN
3
1UF_6.3V_3
SHORT_0402_5 VRPVCORE_DGPU_HG
1
2 REFIN DH 11
2
R6770 2
C6773
1 C6775
DGPU_VID5 IN TI_TPS51219RTER_QFN_16P
SHORT_0402_5 3 GSNS DL 10 VRPVCORE_DGPU_LG 1 2
L6750
4 9 PCMC104T_R36MN
VSNS V5 IN VR_VDD5 CSC0402_DY 1 2
OUT VRPVCORE_DGPU
2
COMP
PGND 3 4
RSC_0603_DY
1
TRIP
GND
100PF_50V_2
0.1UF_16V_2
0_5%_2_DY
1
R6763 2
Q6751
SHORT_0603_25
C6769
C6768
R7675
TI_CSD87588N_LGA_5P
R6751
2.2UF_6.3V_3
C6767
1
VIN 2
5
1
C6766
2 1
470UF_2V
Control
2
FET
42.2K_1%_2
1
2
0.01UF_50V_2
2 C6750
1
+
1
TG
R6756
VSW 5
CSC0402_DY
2
1
Sync
3
4 BG FET
PGND
C7700
2
A A
2
3
R6771 R6764
1 2 1 2
IN VRPVCORE_DGPU
R6759
RSC_0402_DY 0_5%_2
VSNS 10_1%_2
1 2
IN GPU_VCC_SENSE
GSNS
INVENTEC
1 2
IN GPU_VSS_SENSE
1
R6760
SHORT_0402_15
C6774 TITLE
1000PF_50V_2
Block Diagram
2
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
P1V0S_VCCP
POWERPAD_2_0610
1
PAD6940
1
2
2
1
4.7UF_6.3V_3
5
6
7
8
Q6940
FDMC7672
D
C6945
NMOS_4D3S
2
C C
P5V0A PVDDCI
S
GMT_G9330TB1U_SOT23_6P
U6940
OCP=8AMP
4
3
2
1 6
1
VCC DRV
22UF_6.3V_5
22UF_6.3V_5
1
1
2 5
0.1UF_16V_2
GND ADJ
CSC0402_DY
47_5%_2
806_1%_2
HIGH : 0.908V = 0.5 [ 1 + ( ( R6941//R6943) / R6942 ) ]
1
3 4
2
PGD EN
C6942
R6940
C6940
C6947
2
C6943
90.9_1%_2
LOW : 0.954V=0.5 ( 1+ R6941/R6942 )
R6943
R6941
12
2
2
0.033UF_16V_2
1
1
C6941
S S D D
2
Q6941
SSM3K17FU
G
VDDCI_PG
100_1%_2
OUT R6944
G
1 2 VDDCI_SW IN 73
IN EN_VDDCI R6942
1000pF_50V_2
1K_5%_2
1
B B
C6944
1
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
BACO W/O BACO

R132 MOUNT OPEN
P1V8S_DGPU
P1V8S P15V0A R135 OPEN MOUNT
P1V5S_DGPU P1V5 P1V5
2
SI 1129
R494
2.2UF_6.3V_2
Q56 Q21
1
1 4 560K_1%_2 1 8
D S S D
2 2 7
C591
C593
C597
C599
C652
C604
5 SI 1130 3 6
1
P3V3A R500 R135
C 6 G 3 1 2 (7A) 1 2 4 G 5 C
NMOS_4D1S NMOS_4D3S
0_5%_2 0_5%_2
2
AO6402AL C589 TPCA8057_H
2 1
3
Q58
0.1uF_25V_2_DY
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
D
1 R518 2 (1.3A) 1
68PF_50V_2
G
1
0.1uF_25V_2
1
1
S
C651
100K_5%_2
C119
SSM3K7002FU C120
3
Q59
SI 1011 0.01UF_50V_2
2
DGPU_PWR_EN
2
71 1 G
IN
S
SSM3K7002FU
2
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
OCP=6AMP
D 0.943V=0.5(1+R6951/R6952) D
P1V0S_VCCP PVPCIE
POWERPAD1X1M
1
1
4.7UF_6.3V_3
5
6
7
8
PAD6950
1
FDMC7696
D
C6955
Q6950
NMOS_4D3S
2
2
2
P5V0A
S
GMT_G9330TB1U_SOT23_6P
U6950
4
3
2
1 6
1
VCC DRV
22UF_6.3V_5
1
1
2 5
0.1UF_16V_2
GND ADJ
47_5%_2
3 PGD 4
90.9_1%_2
EN
1
C6952
R6950
C6953
C C
R6951
12
2
2
0.033UF_16V_2
2
C6951
100_1%_2
R6952
2
71 IN EN_VPCIE
2
B B
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
2
D6000
NC
DIODE-BAT54-TAP-PHP
3 1
D
DB 0711 D
R6003 R6002
69 IN DGPU_PWR_EN 1 2 1 2 EN_DGPU OUT 67
0.1uF_16V_2
1
0_5%_2 8.2K_5%_2
C6002
2
DB 0817
C C
SI 1026
DB 0726 R6004 2
1 EN_VPCIE 70
OUT
0.1uF_16V_2
10K_5%_2
1
C6003
P3V3S
2
1
10K_5%_2
1 R6005 2 EN_P1V5S_DGPU OUT

R6010
0.1uF_16V_2
10K_5%_2
1
B B
C6004
2
R6011
DB 0807
DGPU_PWROK 1 2 DGPU_PG
2
OUT IN 67
0_5%_2
0.1uF_16V_2
1
C6008
2
A A
INVENTEC
TITLE
Block Diagram
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U34
PART 1 0F 9
CLOSE TO GPU WHISTLER M2 PRO

24 BI PEG_TX0_C_DP AA38 PCIE_RX0P PCIE_TX0P Y33 PEG_RX0_DP BI 72
24 BI PEG_TX0_C_DN Y37 PCIE_RX0N PCIE_TX0N Y32 PEG_RX0_DN BI 72
72 PEG_RX0_DN C5000 1 2 0.1uF_16V_2 PEG_RX0_C_DN OUT 24
IN
24 PEG_TX1_C_DP Y35 W33 PEG_RX1_DP 72 72 PEG_RX1_DN C5001 1 2 0.1uF_16V_2 PEG_RX1_C_DN OUT 24
BI PCIE_RX1P PCIE_TX1P BI IN
24 BI PEG_TX1_C_DN W36 PCIE_RX1N PCIE_TX1N W32 PEG_RX1_DN BI 72
IN
24 PEG_TX2_C_DP W38 U33 PEG_RX2_DP 72 72 PEG_RX3_DN C5004 1 2 0.1uF_16V_2 PEG_RX3_C_DN OUT 24
D 24 BI PEG_TX2_C_DN V37 PCIE_RX2N PCIE_TX2N U32 PEG_RX2_DN BI 72
72 PEG_RX4_DN C5003 1 2 0.1uF_16V_2 PEG_RX4_C_DN OUT 24 D
IN
24 PEG_TX3_C_DP V35 U30 PEG_RX3_DP 72 72 PEG_RX5_DN C5006 1 2 0.1uF_16V_2 PEG_RX5_C_DN OUT 24
24 BI PEG_TX3_C_DN U36 PCIE_RX3N PCIE_TX3N U29 PEG_RX3_DN BI 72
IN
24 PEG_TX4_C_DP U38 T33 PEG_RX4_DP 72 72 PEG_RX7_DN C5007 1 2 0.1uF_16V_2 PEG_RX7_C_DN OUT 24
24 BI PEG_TX4_C_DN T37 PCIE_RX4N PCIE_TX4N T32 PEG_RX4_DN BI 72
24 BI PEG_TX5_C_DP T35 PCIE_RX5P PCIE_TX5P T30 PEG_RX5_DP BI 72

24 BI PEG_TX5_C_DN R36 PCIE_RX5N PCIE_TX5N T29 PEG_RX5_DN BI 72
72 PEG_RX0_DP C5010 1 2 0.1uF_16V_2 PEG_RX0_C_DP 24
IN OUT
24 PEG_TX6_C_DP R38 P33 PEG_RX6_DP 72 72 PEG_RX1_DP C5009 1 2 0.1uF_16V_2 PEG_RX1_C_DP 24
BI PCIE_RX6P PCIE_TX6P BI IN OUT
24 BI PEG_TX6_C_DN P37 PCIE_RX6N PCIE_TX6N P32 PEG_RX6_DN BI 72
IN OUT
24 PEG_TX7_C_DP P35 P30 PEG_RX7_DP 72 72 PEG_RX3_DP C5011 1 2 0.1uF_16V_2 PEG_RX3_C_DP 24
BI PCIE_RX7P PCIE_TX7P BI IN OUT
24 BI PEG_TX7_C_DN N36 PCIE_RX7N PCIE_TX7N P29 PEG_RX7_DN BI 72
IN OUT
N38 N33 72 PEG_RX5_DP C5015 1 2 0.1uF_16V_2 PEG_RX5_C_DP 24
C PCIE_RX8P PCIE_TX8P IN OUT C
M37 PCIE_RX8N PCIE_TX8N N32
IN OUT
M35 N30 72 PEG_RX7_DP C5013 1 2 0.1uF_16V_2 PEG_RX7_C_DP 24
PCIE_RX9P PCIE_TX9P IN OUT
L36 PCIE_RX9N PCIE_TX9N N29
L38 PCIE_RX10P PCIE_TX10P L33 C IS 0402

PCI EXPRESS INTERFACE
K37 PCIE_RX10N PCIE_TX10N L32
K35 PCIE_RX11P PCIE_TX11P L30

J36 PCIE_RX11N PCIE_TX11N L29
J38 PCIE_RX12P PCIE_TX12P K33

H37 PCIE_RX12N PCIE_TX12N K32
H35 PCIE_RX13P PCIE_TX13P J33

G36 PCIE_RX13N PCIE_TX13N J32
B B
G38 PCIE_RX14P PCIE_TX14P K30
F37 PCIE_RX14N PCIE_TX14N K29
F35 PCIE_RX15P PCIE_TX15P H33

E37 H32
PCIE_RX15N PCIE_TX15N PVPCIE
R5002
R236
1 2
CLOCK HEATHROW/CHELSEA MOUNT
1.69K_1%_2
THAMES/WHISTLER/SEYMOUR OPEN
BI CLK_PEG_DP AB35 PCIE_REFCLKP
CLK_PEG_DN AA36 R215 PVPCIE
BI PCIE_REFCLKN
HEATHROW/CHELSEA OPEN
THAMES/WHISTLER/SEYMOUR MOUNT
FOR PARK AND CAPILANO CALIBRATION
THE PWRGOOD BALL MUST
BE CONNNECCTED TO GND PCIE_CALR_TX Y30
R5005
1 2 AH16 TEST_PG PCIE_CALR_RX Y29 1 R5004 2 1K_5%_2
1K_5%_2
72 BI PEG_PLT_RST# AA30 PERSTB
A AMD_216_0834002_00_FCBGA_962P A
P3V3S_DGPU
C5018
1 2
5
0.1UF_16V_2
U5001
DGPU_HOLD_RST#
1
+
BI
1
R5006 2100K_5%_2 4 PEG_PLT_RST# BI 72
INVENTEC
2
-
TC7SZ08FU
3
TITLE
44
51 37 33 BI PLT_RST# GPU-1
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S_DGPU
2
R90951
U34
SI2 1227 PART 2 0F 9
MV 0313 10K_5%_2_DY
MUTI GFX
AD29 GENLK_CLK TXCAP_DPA3P AU24
1
GENLK_VSYNC AC29 AV23
MEM_ID3 MEM_ID2 MEM_ID1 MEM_ID0 OUT GENLK_VSYNC TXCAM_DPA3N
VENDOR Die Ver IEC P/N
(R514) (R507) (R510) (R497) P1V8S_DGPU TX0P_DPA2P AT25
F AJ21 SWAPLOCKA
DPA TX0M_DPA2N AR24 F
0 0 0 0 SAMSUNG(2GB) C 6019B0842201
AK21 SWAPLOCKB
(K4G20325FC-HC04) TX1P_DPA1P AU26
AV25
10K_5%_2_DY
10K_5%_2_DY
10K_5%_2_DY
TX1M_DPA1N
0 0 0 1 SAMSUNG(2GB)
10K_5%_2
1 R905142
1 R905072
1 R905102
1 R904972
(K4G20325FD-FC04) MV NEW D 6019B0971801 AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27
AU8 DVPCNTL_MVP_1 TX2M_DPA0N AR26
0 0 1 0 HYNIX (2GB)(DEFAULT) VEGA 6019B0843001
AP8 DVPCNTL_0
(H5GQ2H24MFR-T2C) AW8 DVPCNTL_1 TXCBP_DPB3P AR30
AR3 DVPCNTL_2 TXCBM_DPB3N AT29
0 0 1 1 HYNIX (2GB) A 6019B0971701
AR1 DVPCLK
(H5GQ2H24AFR-T2C)MV NEW MEM_ID0 AU1 DVPDATA_0 TX3P_DPB2P AV31
MEM_ID1 AU3 DVPDATA_1 TX3M_DPB2N AU30
DPB
MEM_ID2 AW3 DVPDATA_2
0 1 0 0 ELPIDA (2GB) NONE NONE NONE MEM_ID3 AP6 DVPDATA_3 TX4P_DPB1P AR32
AW5 DVPDATA_4 TX4M_DPB1N AT31
AU5 DVPDATA_5
AR6 DVPDATA_6 TX5P_DPB0P AT33
AW6 DVPDATA_7 TX5M_DPB0N AU32
AU6 DVPDATA_8
AT7 DVPDATA_9 TXCCP_DPC3P AU14
AV7 DVPDATA_10 TXCCM_DPC3N AV13
AN7 DVPDATA_11
P3V3S_DGPU AV9 DVPDATA_12 TX0P_DPC2P AT15
R90695 AT9 AR14
GPU_THM_CLK 1 2 10K_5%_2 1 R90710 2 0_5%_2 DVPDATA_13 TX0M_DPC2N
73 BI AR10 DVPDATA_14
DPC
R90699 2 10K_5%_2 AW10 DVPDATA_15 TX1P_DPC1P AU16
GPU_THM_DAT 1
73 BI AU10 DVPDATA_16 TX1M_DPC1N AV15
AP10 DVPDATA_17
1
E AV11 DVPDATA_18 TX2P_DPC0P AT17 E
Q9088 AT11 DVPDATA_19 TX2M_DPC0N AR16
AR12
G
DVPDATA_20
SSM3K7002FU AW12 AU20
DVPDATA_21 TXCDP_DPD3P
2 S D 3 PCH_KBC_SMCLK AU12 AT19
BI 34 48
AP12
DVPDATA_22 TXCDM_DPD3N
DVPDATA_23
2 3 PCH_KBC_SMDATA AT21
S D BI 34 48 TX3P_DPD2P
AR20
Q9089 TX3M_DPD2N
SSM3K7002FU DPD
GPU_THM_CLK
G
AJ23 AU22
73 OUT GPU_THM_DAT AH23
SMBCLK
SMBus TX4P_DPD1P
AV21
73 OUT SMBDATA TX4M_DPD1N
1
TX5P_DPD0P AT23
SYSTEM BORAD PULL UP TX5M_DPD0N AR22
GPU_LCM_CLK AK26
P3V3S P3V3S_DGPU P3V3S_DGPU OUT GPU_LCM_DAT AJ26
SCL
I2C
OUT SDA
TP24
R GPU_R1
AD39 TP9090
2 3 R90172 GENERAL PURPOSE I/O AD37
2
S D
AVSSN#1
1 2
1uF_10V_3
GPU_GPIO0
R90684
1
AH20
2
73 OUT GPIO_0
C90816
10K_5%_2
TP24
Q9084 R90675 GPU_GPIO1 AH18 GPU_G1
AE36 TP9091
73 OUT GPIO_1 G
G
10K_5%_2 GPU_GPIO2
SI 1201 AM2321P
200_5%_2 73 OUT AN16 GPIO_2 AVSSN#2 AD35
TP24
1
AF37GPU_B1
13
B TP9092
GPU_THROT# AH17 AE38
2
Q9082
1
OUT GPIO_5_AC_BATT AVSSN#3

R90679 68 OUT VDDCI_SW AJ17 TP24
D
GPIO_6
DAC1 1 TP9093
DGPU_PWR_EN# 1 2 1 G GPU_LCM_BLEN AK17 AC36 AUD_1 TP24
IN 73 OUT GPIO_7_BLON HSYNC
1
AUD_0 TP9094OUT 73
D AJ13 GPIO_8_ROMSO VSYNC AC38
OUT 73 D
S
1K_5%_2 GPU_GPIO9 AH15

P3V3S_DGPU
73 OUT AJ16
GPIO_9_ROMSI
SSM3K7002FU GPIO_10_ROMSCK R90209
GPU_GPIO11 AK16 AB34 1 2 I=125MA
2
73 OUT GPU_GPIO12 AL16

GPIO_11 RSET
P1V8S_DGPU
2
73 OUT GPIO_12 499_1%_2
GPU_GPIO13 AM16 AD34
73 OUT GPIO_13 AVDD
R90184 SI 1115 AM14 GPIO_14_HPD2 AVSSQ AE34
10K_5%_2 POW_SW0 AM13
73 OUT POW_SW2 AK14
GPIO_15_PWRCNTL_0
AC33
GPUTHERM_INT#
73 OUT GPIO_16 VDD1DI
SI2 1227 AG30 AC34
1
OUT AN14
GPIO_17_THERMAL_INT VSS1DI
GPIO_18_HPD3
CTF SI 1115 AM17
IF GPIO_22_EN = 0 , THEN GPIO[13:11] DEFINES THE PRIMARY MEMORY APERTURE SIZE. 73 OUT POW_SW1 AL13
GPIO_19_CTF
V13
73 OUT AJ14
GPIO_20_PWRCNTL_1 NC#1
U13
GPIO_21 NC#2
GPIO_13 GPIO_12 GPIO_11 MEMORY APERTURE SIZE AK13 GPIO_22_ROMCSB NC#3 AC31 1 R90237
2
GPU_GPIO23 AN13 AD30 0_5%_2_DY
0 0 1 2GB / 1GB (DEFAULT) 73 OUT CLKREQB NC#4
AC32
TP9034 NC#5
NC#6 AD32
1 1 0 RESERVED VR_TT#1 TP24 AG32 AF32
VR_TT#: REGULTOR HOT INPUT OPTION - NOT CURRENTLY QUALIFIED IN AG33
GPIO_29 NC#7
AA29
P3V3S_DGPU P1V8S_DGPU
GPIO_29, GPIO30 ARE NC ON THAMES/WHISTLER/SEYMOUR IN 1 TP24
GPIO_30 NC#8
AG21
HEATHROW/CHELSEA OPEN
NC#9 THAMES/WHISTLER/SEYMOUR MOUNT
AJ19 GENERICA
TP9033 AK19 GENERICB
GPU_GPIO0 R901821 2 10K_5%_2_DY
73 IN GPU_GPIO1 CLOSE TO GPU AJ20 GENERICC
1
73 IN R901711 2 10K_5%_2_DY AK20 GENERICD

GPU_GPIO9 R901851 2 10K_5%_2_DY 499_1%_2 2
73 IN AJ24 GENERICE_HPD4 NC_TSVSSQ AF33 1
SI 1014 R90164 SI 1115 AH26 GENERICF_HPD5 R90238 0_5%_2_DY
GPU_GPIO11 R901771 2 10K_5%_2_DY
C 73 IN GPU_GPIO12
AH24 GENERICG_HPD6 NC_TSVSSQ SHOULD BE TIED TO GND ON THAMES/WHISTLER/SEYMOUR C
73 IN R901651 2 10K_5%_2_DY GPU_VREFG
GPU_GPIO13 R901591 2
2 2
73 IN 10K_5%_2_DY
GPU_GPIO23 PS_0 AM34 1
R90290 2 0_5%_1_DY PS_0 IN 73
73 IN R901451 2 10K_5%_2_DY PS0_0 Bits[5:1]: 11|001
1
AUD_0 R905521 2 10K_5%_2_DY 1

R90291 2 0_5%_1_DY PS_1
73 OUT AUD_1
AC30 CEC_1 IN 73
PS0_1 Bits[5:1]: 11|000
73 OUT R905471 2 10K_5%_2_DY R90178
C90186 1
R90292 2 0_5%_1_DY PS_2 IN 73
GPU_GPIO2 R90160 1 2 10K_5%_2
249_1%_2
0.1UF_16V_2 AK24 AD31 PS0_2 Bits[5:1]: 00|000
73 IN GPU_LCM_BLEN SI 1115 HPD1
MLPS PS_1
1
R90293 2 0_5%_1_DY PS_3 IN 73
73 IN R90170 1 2 10K_5%_2 PS0_3 Bits[5:1]: 11|000
CTF R90154 1 2 10K_5%_2 SI 1111
2
TP9025
1
73 IN POW_SW0
73 OUT R90515 1 2 3K_5%_2 VDDC_CT
1
POW_SW1 R90107 1 2 3K_5%_2 AH13 AG31
73 IN POW_SW2
VREFG PS_2
TP24 73 IN MULTI LEVEL PIN STRAP (MLPS)
73 IN R909501 2 3K_5%_2
FOR R_PU_X AND R_PD_X AND C_X, SELECTION
SI2 1227
0_5%_2_DY
TP9039 REFER TO AN_MGEN_X1
8.45K_1%_2
2 R90800 1
2 R90804 1
BACO PARTS FOR MLPS SHOULD BE PLACED CLOSE TO ASIC
1
PX_EN AL21 AD33 THE TOTAL RESISTANCE OF TRACE SHOULD BE LESS THAN 3 OHM
OUT PX_EN PS_3
TP24
5.1K_1%_2
R90190
1 2 2 1 PS_0 PS_2
DEBUG DDC/AUX
R90162 AM26
DDC1CLK 73 OUT 73 OUT
10K_5%_2_DY
I572 AN26
1K_5%_2 I574
0.68uF_10V_2
DDC1DATA
2 R90801 1
2R90805 1
1
2
4.75K_1%_2
2K_1%_2
R90191
C90501
C90505
AD28
CSC0402_DY
TESTEN
AUX1P AM27
AUX1N AL27
P3V3S_DGPU 1 GPIO24_TRSTB AM23 JTAG_TRSTB DDC2CLK AM19

TP9081
2
1
TP24 1 TP24 AN23 JTAG_TDI DDC2DATA AL19

TP9013
B 1 TP24 AK23 JTAG_TCK B
1 GPIO27_TMS TP9060 AL24 JTAG_TMS AUX2P AN20
TP9082 TP24 1 TP24 AM24 JTAG_TDO AUX2N AM20 82n 680n
TP9015
DDCCLK_AUX3P AL30 TP24 1 TP9014 VDDC_CT
AM30 TP24 1 TP9016
DDCDATA_AUX3N 73 IN
THERMAL
AL29
0_5%_2_DY
0_5%_2_DY
DDCCLK_AUX4P
2 R90802 1
2 R90806 1
R90851 1 AF29 DPLUS DDCDATA_AUX4N AM29
1 2 TP9080 1
TP24 AG29 DMINUS
TP9079 TP24 AN21
10K_5%_2 DDCCLK_AUX5P
DDCDATA_AUX5N AM21
ENABLE MLPS AK32 GPIO_28_FDO
PS_1 PS_3
DDCCLK_AUX6P AK30
I=8MA AL31 TS_A DDCDATA_AUX6N AK29 73 OUT 73 OUT
P1V8S_DGPU
1
2R90803 1
2R90807 1
1
4.75K_1%_2
4.75K_1%_2
GPU_CLK
C90503
C90512
TP24
CSC0402_DY
CSC0402_DY
L9012 DDCVGACLK AJ30 1
TSVDD TP9095
1 2 AJ32 TSVDD DDCVGADATA AJ31 1
GPU_DATA TP9096
AJ33 TSVSS
TP24
SI 1207
10UF_6.3V_3
BLM18EG601SN1D
0.1UF_16V_2
1
1
1UF_6.3V_2
C90190
C90197
C90198
2
2
AMD_216_0834002_00_FCBGA_962P
NC NC
2
A A
THAMES/WHISTLER/SEYMOUR ONLY
INVENTEC
DO NOT INSTALL FOR HEATHROW/CHELSEA TITLE
NC_TSVSSQ SHOULD BE TIED TO GND ON THAMES/WHISTLER/SEYMOUR GPU-2
PS_0 SHOULD BE TIED TO GND ON THAMES/WHISTLER/SEYMOUR SIZE CODE DOC.NUMBER REV
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U34
PART 3 0F 9
GDDR5/DDR3
DQA0(0) MAA0(0)
MEMORY INTERFACE A
79 C37 G24 79
BI DQA0_0 MAA0_0/MAA_0 BI
79 BI DQA0(1) C35 DQA0_1 MAA0_1/MAA_1 J23 MAA0(1) BI 79
79 BI DQA0(2) A35 DQA0_2 MAA0_2/MAA_2 H24 MAA0(2) BI 79
79 BI DQA0(3) E34 DQA0_3 MAA0_3/MAA_3 J24 MAA0(3) BI 79
79 BI DQA0(4) G32 DQA0_4 MAA0_4/MAA_4 H26 MAA0(4) BI 79
79 BI DQA0(5) D33 DQA0_5 MAA0_5/MAA_5 J26 MAA0(5) BI 79
D 79 BI DQA0(6) F32 DQA0_6 MAA0_6/MAA_6 H21 MAA0(6) BI 79
79 BI DQA0(7) E32 DQA0_7 MAA0_7/MAA_7 G21 MAA0(7) BI 79 D
79 BI DQA0(8) D31 DQA0_8 MAA1_0/MAA_8 H19 MAA1(0) BI 79
79 BI DQA0(9) F30 DQA0_9 MAA1_1/MAA_9 H20 MAA1(1) BI 79
79 BI DQA0(10) C30 DQA0_10 MAA1_2/MAA_10 L13 MAA1(2) BI 79
79 BI DQA0(11) A30 DQA0_11 MAA1_3/MAA_11 G16 MAA1(3) BI 79
79 BI DQA0(12) F28 DQA0_12 MAA1_4/MAA_12 J16 MAA1(4) BI 79
79 BI DQA0(13) C28 DQA0_13 MAA1_5/MAA_BA2 H16 MAA1(5) BI 79
79 BI DQA0(14) A28 DQA0_14 MAA1_6/MAA_BA0 J17 MAA1(6) BI 79
79 BI DQA0(15) E28 DQA0_15 MAA1_7/MAA_BA1 H17 MAA1(7) BI 79
79 BI DQA0(16) D27 DQA0_16
79 BI DQA0(17) F26 DQA0_17 WCKA0_0/DQMA_0 A32 WCKA0_0 BI 79
DQA0(18) WCKA0_0#
CHANNEL A 79
79
79
BI
BI DQA0(19)
DQA0(20)
C26
A26
F24
DQA0_18
DQA0_19
WCKA0B_0/DQMA_1
WCKA0_1/DQMA_2
C32
D23
E22
WCKA0_1
WCKA0_1#
BI
BI
79
79
79
BI DQA0_20 WCKA0B_1/DQMA_3 BI
79 BI DQA0(21) C24 DQA0_21 WCKA1_0/DQMA_4 C14 WCKA1_0 BI 79
79 BI DQA0(22) A24 DQA0_22 WCKA1B_0/DQMA_5 A14 WCKA1_0# BI 79
79 BI DQA0(23) E24 DQA0_23 WCKA1_1/DQMA_6 E10 WCKA1_1 BI 79
79 BI DQA0(24) C22 DQA0_24 WCKA1B_1/DQMA_7 D9 WCKA1_1# BI 79
79 BI DQA0(25) A22 DQA0_25
79 BI DQA0(26) F22 DQA0_26 EDCA0_0/QSA_0 C34 EDCA0_0 BI 79
79 BI DQA0(27) D21 DQA0_27 EDCA0_1/QSA_1 D29 EDCA0_1 BI 79
79 BI DQA0(28) A20 DQA0_28 EDCA0_2/QSA_2 D25 EDCA0_2 BI 79
79 BI DQA0(29) F20 DQA0_29 EDCA0_3/QSA_3 E20 EDCA0_3 BI 79
C 79 DQA0(30) D19 E16 EDCA1_0 79
C
BI DQA0_30 EDCA1_0/QSA_4 BI
79 BI DQA0(31) E18 DQA0_31 EDCA1_1/QSA_5 E12 EDCA1_1 BI 79
79 BI DQA1(0) C18 DQA1_0 EDCA1_2/QSA_6 J10 EDCA1_2 BI 79
79 BI DQA1(1) A18 DQA1_1 EDCA1_3/QSA_7 D7 EDCA1_3 BI 79
79 BI DQA1(2) F18 DQA1_2
79 BI DQA1(3) D17 DQA1_3 DDBIA0_0/QSA_0B A34 DBIA0_0 BI 79
79 BI DQA1(4) A16 DQA1_4 DDBIA0_1/QSA_1B E30 DBIA0_1 BI 79
79 BI DQA1(5) F16 DQA1_5 DDBIA0_2/QSA_2B E26 DBIA0_2 BI 79
79 BI DQA1(6) D15 DQA1_6 DDBIA0_3/QSA_3B C20 DBIA0_3 BI 79
DDR3/GDDR3MEMORY STUFF OPTION 79 BI DQA1(7) E14 DQA1_7 DDBIA1_0/QSA_4B C16 DBIA1_0 BI 79
79 BI DQA1(8) F14 DQA1_8 DDBIA1_1/QSA_5B C12 DBIA1_1 BI 79
GDDR5 GDDR3 DDR3 79 BI DQA1(9) D13 DQA1_9 DDBIA1_2/QSA_6B J11 DBIA1_2 BI 79
79 BI DQA1(10) F12 DQA1_10 DDBIA1_3/QSA_7B F8 DBIA1_3 BI 79
MVDDQ 1.5V 1.8V/1.5V 1.5V 79 BI DQA1(11) A12 DQA1_11
79 BI DQA1(12) D11 DQA1_12 ADBIA0/ODTA0 J21 ADBIA0# BI 79
79 BI DQA1(13) F10 G19 ADBIA1# BI 79
RA 40.2R 40.2R 40.2R 79 DQA1(14) A10
DQA1_13 ADBIA1/ODTA1
BI DQA1_14
79 BI DQA1(15) C10 DQA1_15 CLKA0 H27 CLKA0 OUT 79
RB 100R 100R 100R 79 BI DQA1(16) G13 DQA1_16 CLKA0B G27 CLKA0# OUT 79
79 BI DQA1(17) H13 DQA1_17
79 BI DQA1(18) J13 DQA1_18 CLKA1 J14 CLKA1 OUT 79
79 BI DQA1(19) H11 DQA1_19 CLKA1B H14 CLKA1# OUT 79
B P1V5S_DGPU 79 DQA1(20) G10 B
BI DQA1_20
79 BI DQA1(21) G8 DQA1_21 RASA0B K23 RASA0# OUT 79
DQA1(22) K9 K19 RASA1#
2
79 BI DQA1_22 RASA1B OUT 79

79 BI DQA1(23) K10 DQA1_23
R5082
RA 40.2_1%_2
79 BI DQA1(24) G9 DQA1_24 CASA0B K20 CASA0# OUT 79
79 BI DQA1(25) A8 DQA1_25 CASA1B K17 CASA1# OUT 79
79 BI DQA1(26) C8 DQA1_26
DQA1(27) E8 K24 CSA0#
21
79 BI OUT 79
1UF_6.3V_2
DQA1_27 CSA0B_0
1
79 BI DQA1(28) A6 DQA1_28 CSA0B_1 K27

C5043
R5083 79 BI DQA1(29) C6 DQA1_29

RB 100_1%_2 79 BI DQA1(30) E6 DQA1_30 CSA1B_0 M13 CSA1# OUT 79
79 BI DQA1(31) A5 DQA1_31 CSA1B_1 K16
2
1
MVREFDA_GPU L18 MVREFDA CKEA0 K21 CKEA0 OUT 79

MVREFSA_GPU L20 MVREFSA CKEA1 J20 CKEA1 OUT 79
P1V5S_DGPU R5077 1 2 RSC_0402_DY L27 K26 WEA0# 79

NC_MEM_CALRN0 WEA0B OUT
R5076 1 2 RSC_0402_DY N12 NC_MEM_CALRN1 WEA1B L15 WEA1# OUT 79
R5079 1 2 RSC_0402_DY AG12 NC_MEM_CALRN2
P1V5S_DGPU
R5078 1 2 RSC_0402_DY M12 NC_MEM_CALRP1 MAA0_8/MAA_13 H23 MAA0(8) BI 79
R5081 1 2 M27 J19 MAA1(8)
2
120_1%_2 MEM_CALRP0 MAA1_8/MAA_14 BI 79

R5084 R5080 1 2 120_1%_2 AH12 MEM_CALRP2 MAA0_9/MAA_15 M21 TP24 1
TP5018
M20 TP24 1
A RA 40.2_1%_2
MAA1_9/RSVD
TP5019
A
M96/92 ONLY
21
1UF_6.3V_2
1
C5044
R5085 FOR M97,BROADWAY,MADISO AND PARK ONLY

RB 100_1%_2
AMD_216_0834002_00_FCBGA_962P
IF R258,R249,R146,R244 SHOULD BE MOUNT,
P/N 6013A0087806 (243OHM,1%)
2
1
INVENTEC
TITLE
GPU-3
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U34
PART 4 0F 9
GDDR5/DDR3
80 BI DQB0(0) C5 DQB0_0 MAB0_0/MAB_0 P8 MAB0(0) BI 80
80 BI DQB0(1) C3 DQB0_1 MAB0_1/MAB_1 T9 MAB0(1) BI 80
80 BI DQB0(2) E3 DQB0_2 MAB0_2/MAB_2 P9 MAB0(2) BI 80
80 BI DQB0(3) E1 DQB0_3 MAB0_3/MAB_3 N7 MAB0(3) BI 80
80 BI DQB0(4) F1 DQB0_4 MAB0_4/MAB_4 N8 MAB0(4) BI 80
80 BI DQB0(5) F3 DQB0_5 MAB0_5/MAB_5 N9 MAB0(5) BI 80
80 BI DQB0(6) F5 DQB0_6 MAB0_6/MAB_6 U9 MAB0(6) BI 80
80 BI DQB0(7) G4 DQB0_7 MAB0_7/MAB_7 U8 MAB0(7) BI 80
D 80 BI DQB0(8) H5 DQB0_8 MAB1_0/MAB_8 Y9 MAB1(0) BI 80
MEMORY INTERFACE B
80 BI DQB0(9) H6 DQB0_9 MAB1_1/MAB_9 W9 MAB1(1) BI 80 D
80 BI DQB0(10) J4 DQB0_10 MAB1_2/MAB_10 AC8 MAB1(2) BI 80
80 BI DQB0(11) K6 DQB0_11 MAB1_3/MAB_11 AC9 MAB1(3) BI 80
DQB0(12) MAB1(4)
CHANNEL B 80
80
80
BI
BI DQB0(13)
DQB0(14)
K5
L4
M6
DQB0_12
DQB0_13
MAB1_4/MAB_12
MAB1_5/BA2
AA7
AA8
Y8
MAB1(5)
MAB1(6)
BI
BI
80
80
80
BI DQB0_14 MAB1_6/BA0 BI
80 BI DQB0(15) M1 DQB0_15 MAB1_7/BA1 AA9 MAB1(7) BI 80
80 BI DQB0(16) M3 DQB0_16
80 BI DQB0(17) M5 DQB0_17 WCKB0_0/DQMB_0 H3 WCKB0_0 BI 80
80 BI DQB0(18) N4 DQB0_18 WCKB0B_0/DQMB_1 H1 WCKB0_0# BI 80
80 BI DQB0(19) P6 DQB0_19 WCKB0_1/DQMB_2 T3 WCKB0_1 BI 80
80 BI DQB0(20) P5 DQB0_20 WCKB0B_1/DQMB_3 T5 WCKB0_1# BI 80
80 BI DQB0(21) R4 DQB0_21 WCKB1_0/DQMB_4 AE4 WCKB1_0 BI 80
80 BI DQB0(22) T6 DQB0_22 WCKB1B_0/DQMB_5 AF5 WCKB1_0# BI 80
80 BI DQB0(23) T1 DQB0_23 WCKB1_1/DQMB_6 AK6 WCKB1_1 BI 80
80 BI DQB0(24) U4 DQB0_24 WCKB1B_1/DQMB_7 AK5 WCKB1_1# BI 80
80 BI DQB0(25) V6 DQB0_25
80 BI DQB0(26) V1 DQB0_26 EDCB0_0/QSB_0 F6 EDCB0_0 BI 80
80 BI DQB0(27) V3 DQB0_27 EDCB0_1/QSB_1 K3 EDCB0_1 BI 80
80 BI DQB0(28) Y6 DQB0_28 EDCB0_2/QSB_2 P3 EDCB0_2 BI 80
80 BI DQB0(29) Y1 DQB0_29 EDCB0_3/QSB_3 V5 EDCB0_3 BI 80
80 BI DQB0(30) Y3 DQB0_30 EDCB1_0/QSB_4 AB5 EDCB1_0 BI 80
80 BI DQB0(31) Y5 DQB0_31 EDCB1_1/QSB_5 AH1 EDCB1_1 BI 80
C 80 DQB1(0) AA4 AJ9 EDCB1_2 80
C
BI DQB1_0 EDCB1_2/QSB_6 BI
80 BI DQB1(1) AB6 DQB1_1 EDCB1_3/QSB_7 AM5 EDCB1_3 BI 80
80 BI DQB1(2) AB1 DQB1_2
80 BI DQB1(3) AB3 DQB1_3 DDBIB0_0/QSB_0B G7 DBIB0_0 BI 80
80 BI DQB1(4) AD6 DQB1_4 DDBIB0_1/QSB_1B K1 DBIB0_1 BI 80
DQB1(5) AD1 P1 DBIB0_2
DDR3/GDDR3MEMORY STUFF OPTION 80
80
BI
BI DQB1(6) AD3
DQB1_5
DQB1_6
DDBIB0_2/QSB_2B
DDBIB0_3/QSB_3B W4 DBIB0_3
BI
BI
80
80
80 BI DQB1(7) AD5 AC4 DBIB1_0 BI 80
GDDR5 GDDR3 DDR3 80 DQB1(8) AF1
DQB1_7 DDBIB1_0/QSB_4B
AH3 DBIB1_1 80
BI DQB1_8 DDBIB1_1/QSB_5B BI
80 BI DQB1(9) AF3 AJ8 DBIB1_2 BI 80
MVDDQ 1.5V 1.8V/1.5V 1.5V 80 DQB1(10) AF6
DQB1_9 DDBIB1_2/QSB_6B
AM3 DBIB1_3 80
BI DQB1_10 DDBIB1_3/QSB_7B BI
80 BI DQB1(11) AG4 DQB1_11
RA 40.2R 40.2R 40.2R 80 BI DQB1(12) AH5 DQB1_12 ADBIB0/ODTB0 T7 ADBIB0# BI 80
80 BI DQB1(13) AH6 DQB1_13 ADBIB1/ODTB1 W7 ADBIB1# BI 80
80 BI DQB1(14) AJ4
RB 100R 100R 100R 80 DQB1(15) AK3
DQB1_14
L9 CLKB0 80
BI DQB1_15 CLKB0 OUT
80 BI DQB1(16) AF8 DQB1_16 CLKB0B L8 CLKB0# OUT 80
80 BI DQB1(17) AF9 DQB1_17
80 BI DQB1(18) AG8 DQB1_18 CLKB1 AD8 CLKB1 OUT 80
80 BI DQB1(19) AG7 DQB1_19 CLKB1B AD7 CLKB1# OUT 80
P1V5S_DGPU 80 DQB1(20) AK9
BI DQB1_20
80 BI DQB1(21) AL7 DQB1_21 RASB0B T10 RASB0# OUT 80
B DQB1(22) AM8 Y10 RASB1# B
2
80 BI DQB1_22 RASB1B OUT 80

80 BI DQB1(23) AM7 DQB1_23
R90221 DQB1(24) AK1 W10 CASB0#
80 BI DQB1_24 CASB0B OUT 80
40.2_1%_2 DQB1(25) AL4 AA10 CASB1#
80 BI DQB1_25 CASB1B OUT 80
80 BI DQB1(26) AM6 DQB1_26
DQB1(27) AM1 P10 CSB0#
21
80 BI OUT 80
1UF_6.3V_2
DQB1_27 CSB0B_0
1
DQB1(28)
C90273
80 AN4 L10
BI DQB1_28 CSB0B_1
R90210 80 BI DQB1(29) AP3 DQB1_29
100_1%_2 80 BI DQB1(30) AP1 DQB1_30 CSB1B_0 AD10 CSB1# OUT 80
80 BI DQB1(31) AP5 DQB1_31 CSB1B_1 AC10
2
1
CKEB0 U10 CKEB0 OUT 80

MVREFDB_GPU Y12 MVREFDB CKEB1 AA11 CKEB1 OUT 80
MVREFSB_GPU AA12 MVREFSB
WEB0B N10 WEB0# OUT 80
WEB1B AB11 WEB1# OUT 80
P1V5S_DGPU
MAB0_8/MAB_13 T8 MAB0(8) BI 80
W8 MAB1(8)
2
MAB1_8/MAB_14 BI 80
MAB0_9/MAB_15 U12 TP24 1
R90194 V12 TP24 1 TP9042
MAB1_9/RSVD
40.2_1%_2 TP9041
DRAM_RST AH11 M96/92 ONLY
A A
21
1UF_6.3V_2
1
C90233
R90198
100_1%_2 AMD_216_0834002_00_FCBGA_962P
R90509 R90496
1 2 1 2 VM_RST# 79 80
IN
2
1
10_5%_2 51_1%_2
4.99K_1%_2
120PF_50V_2
2
R90513
1
C90639
INVENTEC
1
2
TITLE
GPU-4
DOC.NUMBER REV
A3 CS
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
HEATHROW/CHELSEA THAMES/WHISTLER/SEYMOUR
PCIE_VDDC 0.935V 1V
VDDCI 0.95V 1V
F F
1.8V 440MA PCIE_VDDR P1V8S_DGPU

L9014
0.1UF_16V_2
0.1UF_16V_2
10UF_6.3V_3
1 2
1
1UF_6.3V_2
1UF_6.3V_2
C90258
C90232
C90259
C90264
BLM18PG121SN1
C90229
SI 1011
U34
PART 5 0F 9
2
P1V5S_DGPU P1V5S_DGPU
I=3.4A FOR DDR3,MVDDQ=1.5V
AC7
MEM I/O
AA31 1
0_5%_2_DY
VDDR1#1 NC_PCIE_VDDR#1
TP30
1 R902312
AD11 AA32 1 TP90000
TP30 TP90001
1
10UF_6.3V_3
10UF_6.3V_3
1
AF7 VDDR1#3 NC_PCIE_VDDR#3 AA33
22UF_6.3V_5
C90598
220UF_2V
TP30
1
TP90002
C90337
C90217
C90347
AG10 VDDR1#4 NC_PCIE_VDDR#4 AA34 1 PVPCIE
TP30 TP90003
AJ7 W30 1
+
TP30 TP90004
AK8 VDDR1#6 NC_PCIE_VDDR#6 Y31 1
TP30 TP90005 R90208 2
AL9 VDDR1#7 NC_BIF_VDDC#1 V28 1
G11 W29
PCIE
2
VDDR1#8 NC_BIF_VDDC#2 0_5%_2_DY
E E
2
G14 VDDR1#9 PCIE_PVDD AB37 SI 1011
G17 VDDR1#10
G20 VDDR1#11 PCIE_VDDC#1 G30 R208 R231 L14
0.1UF_16V_2 1UF_6.3V_2 2.2UF_6.3V_2
0.1UF_16V_2 1UF_6.3V_2 2.2UF_6.3V_2
0.1UF_16V_2 1UF_6.3V_2 2.2UF_6.3V_2
0.1UF_16V_2 1UF_6.3V_2 2.2UF_6.3V_2

1
1
G23 VDDR1#12 PCIE_VDDC#2 G31 HEATHROW/CHELSEA OPEN OPEN
C90286
C90311
C90391
C90214
G26 VDDR1#13 PCIE_VDDC#3 H29 THAMES/WHISTLER/SEYMOUR OPEN MOUNT PVPCIE
G29 VDDR1#14 PCIE_VDDC#4 H30
H10 VDDR1#15 PCIE_VDDC#5 J29
J7 VDDR1#16 PCIE_VDDC#6 J30 I=2.5A
10UF_6.3V_3
2.2uF_6.3V_2
2.2uF_6.3V_2
1
1
J9 L28
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
2
2
VDDR1#17 PCIE_VDDC#7
C90282
C90299
C90370
C90289
C90281
C90307
K11 VDDR1#18 PCIE_VDDC#8 M28
1
K13 VDDR1#19 PCIE_VDDC#9 N28
C90324
C90340
C90272
C90366
K8 VDDR1#20 PCIE_VDDC#10 R28
L12 VDDR1#21 PCIE_VDDC#11 T28 PVPCIE
L16 U28
2
VDDR1#22 PCIE_VDDC#12
L21 VDDR1#23
L23 I=1.2A
2
VDDR1#24
L26 N27 1 R90861 2
VDDR1#25 BIF_VDDC#1
BACO
SI 1014
1
1
C90379 L7 VDDR1#26 BIF_VDDC#2 T27 0_5%_2
C90381
C90201
C90721
M11 VDDR1#27 PVCORE_DGPU
N11 VDDR1#28 (27.2A) I=33A
P7 VDDR1#29 VDDC#1 AA15
CORE
R11 VDDR1#30 VDDC#2 AA17
1
U11 AA20
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
2
2
VDDR1#31 VDDC#3
C90247
C90209
C90242
C90278
C90223
C90240
C90246
U7 VDDR1#32 VDDC#4 AA22
Y11 VDDR1#33 VDDC#5 AA24
Y7 VDDR1#34 VDDC#6 AA27
VDDC#7 AB16
D AB18 D
2
VDDC#8
VDDC#9 AB21
P1V8S_DGPU VDDC#10 AB23
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
C90261
C90227
C90226
C90221
C90208
C90244
C90279
LEVEL VDDC#11 AB26
L907
I=250MA TRANSLATION VDDC#12 AB28
VDDC_CT
10UF_6.3V_3
1 2 AF26 VDD_CT#1 VDDC#13 AC17

0.1UF_16V_2
1
1
1UF_6.3V_2
C90130
C90189
C90200
AF27 VDD_CT#2 VDDC#14 AC20

FBM_11_160808_121T AG26 AC22
VDD_CT#3 VDDC#15
2
AG27 VDD_CT#4 VDDC#16 AC24
VDDC#17 AC27
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
1
1
VDDC#18 AD18
C90207
C90243
C90222
C90277
C90225
C90245
C90241
2
I/O VDDC#19 AD21

P3V3S_DGPU I=60MA AF23 VDDR3#1 VDDC#20 AD23
AF24 VDDR3#2 VDDC#21 AD26
10UF_6.3V_3
AG23 VDDR3#3 VDDC#22 AF17

1
1
1UF_6.3V_2
C90184
C90210
AG24 AF20
2
VDDR3#4 VDDC#23
VDDC#24 AF22
M96 FOR +V1.8S_VGA DVP VDDC#25 AG16
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
10UF_6.3V_3
AD12 VDDR4#1 VDDC#26 AG18
22UF_6.3V_5
22UF_6.3V_5
1
1
C90213
C90315
C90188
C90180
C90257
C90216
C90285
AF11 VDDR4#2
2
AF12 VDDR4#3 VDDC#27 AH22

P1V8S_DGPU AF13 VDDR4#4 VDDC#28 AH27
VDDC#29 AH28
L9023
I=300MA VDDC#30 M26
2
1 2 VDDR4 AF15 VDDR4#5 VDDC#31 N24
AG11 VDDR4#6 VDDC#32 R18
BLM18PG600SN1D AG13 VDDR4#7 VDDC#33 R21
1
C C
C90615
C90616
AG15 VDDR4#8 VDDC#34 R23

0.1UF_16V_2
1UF_6.3V_2
VDDC#35 R26
VDDC#36 T17
VDDC#37 T20
VDDC#38 T22
2
VDDC#39 T24
VDDC#40 U16
VDDC#41 U18
VDDC#42 U21
VDDC#43 U23
VDDC#44 U26
VDDC#45 V17
VDDC#46 V20
VDDC#47 V22
VDDC#48 V24
VDDC#49 V27
VDDC#50 Y16
VDDC#51 Y18
VDDC#52 Y21
VDDC#53 Y23
VDDC#54 Y26 VDDCI AND VDDC SHOULD HAVE REGULATORS WITH A MERGE OPTION ON PVB PVDDCI
VDDC#55 Y28
I=3.6A~6A
VDDCI#1 AA13 PEAK=4A VDDCI
VDDCI#2 AB13
AC12
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
VDDCI#3
1
C90293
C90274
C90296
C90295
C90298
C90291
VDDCI#4 AC15
B VDDCI#5 AD13 B
VDDCI#6 AD16
M15
ISOLATED
VDDCI#7
CORE I/O
VDDCI#8 M16
2
VDDCI#9 M18
VOLTAGE
VDDCI#10 M23
SENESE
VDDCI#11 N13
22UF_6.3V_5
22UF_6.3V_5
1
1
AF28 N15
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
FB_VDDC VDDCI#12
SI 1115
C90297
C90294
C90206
C90239
C90211
C90284
VDDCI#13 N17
VDDCI#14 N20
AG28 FB_VDDCI VDDCI#15 N22
VDDCI#16 R12
R13
2
VDDCI#17
AH29 FB_GND VDDCI#18 R16
SI 1115 VDDCI#19 T12
VDDCI#20 T15
VDDCI#21 V15
VDDCI#22 Y13
AMD_216_0834002_00_FCBGA_962P
A A
INVENTEC
TITLE
GPU-5

8 7 6 5 4 3 2 1
A
B
C
D
8
8
U34
PART 6 0F 9
AB39 PCIE_VSS#1 GND#75 A3

E39 PCIE_VSS#2 GND#76 A37
F34 PCIE_VSS#3 GND#77 AA16
F39 PCIE_VSS#4 GND#78 AA18
G33 PCIE_VSS#5 GND#79 AA2
G34 PCIE_VSS#6 GND#80 AA21
H31 PCIE_VSS#7 GND#81 AA23
H34 PCIE_VSS#8 GND#82 AA26
H39 AA28
7
PCIE_VSS#9 GND#83
7
J31 PCIE_VSS#10 GND#84 AA6

J34 PCIE_VSS#11 GND#85 AB12
K31 PCIE_VSS#12 GND#86 AB15
L31 PCIE_VSS#15 GND#89 AB22
L34 PCIE_VSS#16 GND#90 AB24
M34 PCIE_VSS#17 GND#91 AB27
M39 PCIE_VSS#18 GND#92 AC11
N31 PCIE_VSS#19 GND#93 AC13
N34 PCIE_VSS#20 GND#94 AC16
P31 PCIE_VSS#21 GND#95 AC18
R34 PCIE_VSS#24 GND#98 AC23
T31 PCIE_VSS#25 GND#99 AC26
U31 PCIE_VSS#28 GND#102 AD15
U34 AD17
6
PCIE_VSS#29 GND#103
6
V34 PCIE_VSS#30 GND#104 AD20

V39 PCIE_VSS#31 GND#105 AD22
W31 PCIE_VSS#32 GND#106 AD24
W34 PCIE_VSS#33 GND#107 AD27
Y34 PCIE_VSS#34 GND#108 AD9
Y39 PCIE_VSS#35 GND#109 AE2
GND#110 AE6
GND#111 AF10
GND#112 AF16
GND#113 AF18
GND GND#114 AF21
GND#115 AG17
F15 GND#1 GND#116 AG2
F25 GND#6 GND#121 AH21
F27 GND#7 GND#122 AJ10
F29 AJ11
5
GND#8 GND#123
5

F33 GND#10 GND#125 AJ28
F9 GND#12 GND#127 AK11
G2 GND#13 GND#128 AK31
G6 GND#14 GND#129 AK7
H9 GND#15 GND#130 AL11
J2 GND#16 GND#131 AL14
J27 GND#17 GND#132 AL17
K14 GND#20
K7 GND#21 GND#135 AL23
L11 GND#22 GND#136 AL26
L17 GND#23 GND#137 AL32
L2 GND#24 GND#138 AL6
L22 GND#25 GND#139 AL8
L24 GND#26 GND#140 AM11
L6 GND#27 GND#141 AM31
M17 AM9
4
GND#28 GND#142
4
M22 GND#29 GND#143 AN11
M24 GND#30 GND#144 AN2
N16 GND#31 GND#145 AN30
N18 GND#32 GND#146 AN6
N2 GND#33 GND#147 AN8
N21 GND#34 GND#148 AP11
N23 GND#35 GND#149 AP7
N26 GND#36 GND#150 AP9
N6 GND#37 GND#151 AR5
R15 GND#38 GND#152 B11
R17 GND#39 GND#153 B13
R2 GND#40 GND#154 B15
R20 GND#41 GND#155 B17
R22 GND#42 GND#156 B19
R24 GND#43 GND#157 B21
R27 GND#44 GND#158 B23
R6 GND#45 GND#159 B25
T11 GND#46 GND#160 B27
T13 GND#47 GND#161 B29
CHANGE by T16 B31
3
GND#48 GND#162
3
T18 GND#49 GND#163 B33
T21 GND#50 GND#164 B7
T23 GND#51 GND#165 B9
XXX
T26 GND#52 GND#166 C1

U15 GND#53 GND#167 C39
U17 GND#54 GND#168 E35
U2 GND#55 GND#169 E5
U20 GND#56 GND#170 F11
U22 GND#57 GND#171 F13
U24 GND#58
U27 GND#59
U6 GND#60
V11 GND#61
V16 GND#62
V18 GND#63
V21 GND#64
V23 GND#65
DATE
V26 GND#66
W2 GND#67
W6
2
GND#68
2
Y15 GND#69
Y17 GND#70
Y20 GND#71
Y22 GND#72 VSS_MECH#1 A39
Y24 GND#73 VSS_MECH#2 AW1
21-OCT-2002
Y27 GND#74 VSS_MECH#3 AW39

A3
SIZE
AMD_216_0834002_00_FCBGA_962P
TITLE
CS
CODE
GPU-6
77 SHEET
of
1
DOC.NUMBER
1
1310xxxxx-0-0
80
INVENTEC
X01
REV
A
B
C
D
8 7 6 5 4 3 2 1
F F
U34
CHECK POWER NET
CHECK POWER NET PART 8 0F 9
P1V0S_DGPU_DPEF_VDD
DP_VDDR DP_VDDC
I=237MA I=222MA DP_VDDC
HEATHROW/CHELSEA THAMES/WHISTLER/SEYMOUR
P1V8S_DPE_VDD18 DP_VDDC#1 AP31 DPLL_VDDC 0.935V 1V
AP32 SPLL_VDDC
DP_VDDC#2
DP_VDDC#3 AN33
DP_VDDC#4 AP33
AN24 DP_VDDR#1
AP24 DP_VDDR#2 DP_VDDC#5 AP13
AP25 DP_VDDR#3 DP_VDDC#6 AT13 P1V8S_DGPU
AP26 DP_VDDR#4 DP_VDDC#7 AP14 I=75MA
AU28 DP_VDDR#5 DP_VDDC#8 AP15 DPLL_PVDD
R901761 2 10K_5%_2 AV29 DP_VDDR#6
10UF_6.3V_3
1 L9021 2
0.1UF_16V_2
1
1
R901681 2 AL33
1UF_6.3V_2
10K_5%_2 DP_VDDC#9
C90612
C90631
AM33 FBM_11_160808_121T
DP_VDDC#10
C903
E U34 TP9019 AP20 DP_VDDR#7 DP_VDDC#11 AK33 U34 E
AP21 DP_VDDR#8 DP_VDDC#12 AK34
1
PART 7 0F 9
BACK LIGHT BRIGHTNESS MODULATE AP22 DP_VDDR#9
PART 9 0F 9
TP24
AP23
2
NO CONNECTOR DP_VDDR#10
AK27 GPU_LCM_PWM AU18
LVDS CONTROL
VARY_BL
AJ27 GPU_LCM_VCC_EN
OUT AV19
DP_VDDR#11
DIGON
OUT DP_VDDR#12
DP GND
BACK LIGHT POWER CONTORL DP_VSSR#1 AN27 PVPCIE

AH34 DP_VDDR#13 DP_VSSR#2 AP27 AM32 DPLL_PVDD XTALIN AV33 1
AJ34 AP28 TP9012
AK35 AF34
DP_VDDR#14 DP_VSSR#3
AW24
I=140MA DPLL_VDDC
AN31
TP24
TXCLK_UP_DPF3P DP_VDDR#15 DP_VSSR#4 DPLL_VDDC
TXCLK_UN_DPF3N AL36 AG34 DP_VDDR#16 DP_VSSR#5 AW26 1 2
1
L901
0.1UF_16V_2
C90638
C90648
C90645
10UF_6.3V_3
AM37 AN29
1UF_6.3V_2
DP_VDDR#17 DP_VSSR#6
AJ38 AL38 AP29 FBM_11_160808_121T AN32
TXOUT_U0P_DPF2P DP_VDDR#18 DP_VSSR#7 DPLL_PVSS
TXOUT_U0N_DPF2N AK37 DP_VSSR#8 AP30
DP_VSSR#9 AW30 XTALOUT AU34 1
TXOUT_U1P_DPF1P AH35 SI 1115 DP_VSSR#10 AW32 TP909
TP24
2
TXOUT_U1N_DPF1N AJ36 DP_VSSR#11 AN17
DP_VSSR#12 AP16
TXOUT_U2P_DPF0P AG38 DP_VSSR#13 AP17 H7 MPLL_PVDD#1
TXOUT_U2N_DPF0N AH37 DP_VSSR#14 AW14 P1V8S_DGPU H8 MPLL_PVDD#2
DP_VSSR#15 AW16
AF35 AN19 AW34 GPU_XOIN_27M
TXOUT_U3P
AG36
DP_VSSR#16
AP18 1.8V 150MA MPV18 XO_IN
IN 78
PLLS/XTAL
TXOUT_U3N DP_VSSR#17
DP_VSSR#18 AP19 1 2 MPV18 AM10 SPLL_PVDD
DP_VSSR#19 AW20 L906
1
CALIBRATION
DP_VSSR#20 AW22 FBM_11_160808_121T
0.1UF_16V_2
10UF_6.3V_3
C90129
C90143
D DP_VSSR#21 AN34 D
AP34 GPU_LCM_L1_TXCL_DP R90516 AP39 AN9 AW35 GPU_XOIN2_100M
TXCLK_LP_DPE3P
AR34 GPU_LCM_L1_TXCL_DN
OUT 1 2 AW28
DP_VSSR#22
AR39
SPLL_VDDC XO_IN2
IN 78
TXCLK_LN_DPE3N
OUT DPAB_CALR DP_VSSR#23
AU37
DP_VSSR#24
AW37 GPU_LCM_L1_TXDL0_DP 150_1%_2 AF39
TXOUT_L0P_DPE2P
OUT DP_VSSR#25
2
AU35 GPU_LCM_L1_TXDL0_DN R90511 AH39 AN10
TXOUT_L0N_DPE2N
OUT 1 2 AW18
DP_VSSR#26
AK39
SPLL_PVSS
DPCD_CALR DP_VSSR#27
AR37 GPU_LCM_L1_TXDL1_DP AL34
TXOUT_L1P_DPE1P
AU39 GPU_LCM_L1_TXDL1_DN
OUT DP_VSSR#28
AV27 1.8V 75MA SPV18
TXOUT_L1N_DPE1N
OUT 150_1%_2 DP_VSSR#29
R90545 DP_VSSR#30 AR28 1 2 SPV18 CLKTESTA AK10
AP35 GPU_LCM_L1_TXDL2_DP 1 2 AM39 AV17 L905 AF30 AL10
TXOUT_L2P_DPE0P
AR35 GPU_LCM_L1_TXDL2_DN
OUT DPEF_CALR DP_VSSR#31
AR18 AF31
NC_XTAL_PVDD CLKTESTB
TXOUT_L2N_DPE0N
OUT DP_VSSR#32 FBM_11_160808_121T NC_XTAL_PVSS
10UF_6.3V_3
0.1UF_16V_2
150_1%_2 DP_VSSR#33 AN38
0_5%_2_DY
C90128
C90144
AN36 AM35
2
TXOUT_L3P DP_VSSR#34
R90235
TXOUT_L3N AP37
2
AMD_216_0834002_00_FCBGA_962P
PVPCIE
1
AMD_216_0834002_00_FCBGA_962P
AMD_216_0834002_00_FCBGA_962P 150MA SPV10

1 2 SPV10
L9025
FBM_11_160808_121T HEATHROW/CHELSEA OPEN
10UF_6.3V_3
0.1UF_16V_2
THAMES/WHISTLER/SEYMOUR MOUNT
1
C90644
C90647
C P1V8S_DGPU C
P1V8S_DPE_VDD18
L9011
1 2 I=237MA
2
BLM18PG600SN1D
10UF_6.3V_3
0.1UF_16V_2
1
1
C90195
C90199
2
10pF_50V_2
10pF_50V_2
1
1
C90650
C90658
PVPCIE SI 1107
P1V0S_DGPU_DPEF_VDD 6018B0052601
P3V3S_DGPU X904
I=222MA
2
1 3
5.1K_5%_2_DY
1 2
10UF_6.3V_3
L9010 4 2
0.1UF_16V_2
R90760
1
2
5.1K_5%_2
C90183
C90187
R90157
BLM18PG600SN1D
27MHZ
1 2
I=500MA 1M_5%_2
R90521
P3V3S_DGPU U9010
1 X1_ICLK X2 10
B B
2
L9027
1
1 2 4 VDD_100M R90519 33_5%_2
FBM_11_160808_121T 8 5 1 2 GPU_XOIN2_100M
VDD_27M 100M OUT 78
0.01UF_50V_2
0.01UF_50V_2
1
1
C90179
C90154
C90176
7 S0
1 R90525 33_5%_2
2.2UF_6.3V_2
3 9 2 GPU_XOIN_27M
S1 27M OUT 78
R907612
R90153
5.1K_5%_2
0_5%_2
6 GND_PLL
2 GND_27M TML 11
2
IDT_6V40088_DFN_10P
1
A A
INVENTEC
TITLE
GPU-7

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U5501
P1V5S_DGPU
U5500
P1V5S_DGPU
DQA1(25) M2 B1
74 BI DQ31|DQ7 VDDQ-B1
74
74
74
74
BI
BI
BI
BI
DQA0(7)
DQA0(0)
DQA0(6)
DQA0(2)
M2
M4
N2
N4
DQ31|DQ7
DQ30|DQ6
DQ29|DQ5
DQ28|DQ4
VDDQ-B1
VDDQ-B3
VDDQ-B12
VDDQ-B14
B1
B3
B12
B14
CHANNEL A MEMORY 74
74
74
74
BI
BI
BI
BI
DQA1(29)
DQA1(27)
DQA1(28)
DQA1(26)
M4
N2
N4
T2
DQ30|DQ6
DQ29|DQ5
DQ28|DQ4
DQ27|DQ3
VDDQ-B3
VDDQ-B12
VDDQ-B14
VDDQ-D1
B3
B12
B14
D1
DQA0(4) T2 D1 MV 0313 DQA1(31) T4 D3
74 BI DQA0(1) T4
DQ27|DQ3 VDDQ-D1
D3
74 BI DQA1(24) V2
DQ26|DQ2 VDDQ-D3
D12
74 BI DQA0(5) V2
DQ26|DQ2 VDDQ-D3
D12 VENDER DENSITY VENDER PN IEC PN 74 BI DQA1(30) V4
DQ25|DQ1 VDDQ-D12
D14
74 BI DQA0(3)
DQ25|DQ1 VDDQ-D12 74 BI DQA1(21)
DQ24|DQ0 VDDQ-D14
F 74 BI V4 DQ24|DQ0 VDDQ-D14 D14 74 BI M13 DQ23|DQ15 VDDQ-E5 E5 F
DQA0(9) M13 E5 DQA1(20) M11 E10
74 BI DQA0(10) M11
DQ23|DQ15 VDDQ-E5
E10 SAMSUNG 64MX32 K4G20325FD-FC04 6019B0971801 74 BI DQA1(22) N13
DQ22|DQ14 VDDQ-E10
F1
74 BI DQA0(8) N13
DQ22|DQ14 VDDQ-E10
F1
74 BI DQA1(23) N11
DQ21|DQ13 VDDQ-F1
F3
74 BI DQA0(11) N11
DQ21|DQ13 VDDQ-F1
F3
74 BI DQA1(19) T13
DQ20|DQ12 VDDQ-F3
F12
74 BI DQA0(12) T13
DQ20|DQ12 VDDQ-F3
F12 HYNIX 64MX32 H5GQ2H24AFR-T2C 6019B0971701 74 BI DQA1(16) T11
DQ19|DQ11 VDDQ-F12
F14
74 BI DQA0(14) T11
DQ19|DQ11 VDDQ-F12
F14
74 BI DQA1(18) V13
DQ18|DQ10 VDDQ-F14
G2
74 BI DQA0(15) V13
DQ18|DQ10 VDDQ-F14
G2
74 BI DQA1(17) V11
DQ17|DQ9 VDDQ-G2
G13
74 BI DQA0(13) V11
DQ17|DQ9 VDDQ-G2
G13 SAMSUNG 64MX32 K4G20325FC-HC04 6019B0842201 74 BI DQA1(5) F13
DQ16|DQ8 VDDQ-G13
H3
74 BI DQA0(24) F13
DQ16|DQ8 VDDQ-G13
H3
74 BI DQA1(7) F11
DQ15|DQ23 VDDQ-H3
H12
74 BI DQA0(25) F11
DQ15|DQ23 VDDQ-H3
H12
74 BI DQA1(6) E13
DQ14|DQ22 VDDQ-H12
K3
74 BI DQA0(29) E13
DQ14|DQ22 VDDQ-H12
K3 HYNIX 64MX32 H5GQ2H24MFR-T2C 6019B0843001 74 BI DQA1(2) E11
DQ13|DQ21 VDDQ-K3
K12
74 BI DQA0(27) E11
DQ13|DQ21 VDDQ-K3
K12
74 BI DQA1(3) B13
DQ12|DQ20 VDDQ-K12
L2
74 BI DQA0(26) B13
DQ12|DQ20 VDDQ-K12
L2
74 BI DQA1(1) B11
DQ11|DQ19 VDDQ-L2
L13
74 BI DQA0(28) B11
DQ11|DQ19 VDDQ-L2
L13
74 BI DQA1(4) A13
DQ10|DQ18 VDDQ-L13
M1
74 BI DQA0(31) A13
DQ10|DQ18 VDDQ-L13
M1
74 BI DQA1(0) A11
DQ9|DQ17 VDDQ-M1
M3
74 BI DQA0(30) A11
DQ9|DQ17 VDDQ-M1
M3
74 BI DQA1(8) F2
DQ8|DQ16 VDDQ-M3
M12
74 BI DQA0(22) F2
DQ8|DQ16 VDDQ-M3
M12
74 BI DQA1(9) F4
DQ7|DQ31 VDDQ-M12
M14
74 BI DQA0(21) F4
DQ7|DQ31 VDDQ-M12
M14
74 BI DQA1(10) E2
DQ6|DQ30 VDDQ-M14
N5
74 BI DQA0(23) E2
DQ6|DQ30 VDDQ-M14
N5
74 BI DQA1(11) E4
DQ5|DQ29 VDDQ-N5
N10
P1V5S_DGPU
74 BI DQA0(20) E4
DQ5|DQ29 VDDQ-N5
N10
74 BI DQA1(15) B2
DQ4|DQ28 VDDQ-N10
P1
74 BI DQA0(17) B2
DQ4|DQ28 VDDQ-N10
P1
74 BI DQA1(13) B4
DQ3|DQ27 VDDQ-P1
P3
74 BI DQA0(19) B4
DQ3|DQ27 VDDQ-P1
P3
74 BI DQA1(12) A2
DQ2|DQ26 VDDQ-P3
P12
74 BI DQA0(18) A2
DQ2|DQ26 VDDQ-P3
P12 P1V5S_DGPU
74 BI DQA1(14) A4
DQ1|DQ25 VDDQ-P12
P14
74 BI DQA0(16) A4
DQ1|DQ25 VDDQ-P12
P14
74 BI DQ0|DQ24 VDDQ-P14
T1
CLKA0 R5517 1 260.4_1%_2 74 BI DQ0|DQ24 VDDQ-P14 VDDQ-T1
79 74 IN CLKA0# R5518 1 260.4_1%_2 VDDQ-T1 T1 VDDQ-T3 T3
79 74 IN VDDQ-T3 T3 VDDQ-T12 T12
T12 T14
VDDQ-T12
CLKA1 R5509 1 260.4_1%_2 VDDQ-T14
VDDQ-T14 T14 79 74 IN CLKA1# R5508 1 260.4_1%_2
E 79 74 IN 74 BI MAA1(8) J5 RFU/A12/NC E
MAA0(8) J5 MAA1(7) K4 C5
74 BI MAA0(0) K4
RFU/A12/NC
C5
74 BI MAA1(6) K5
A7/A8|A0/A10 VDD-C5
C10
74 BI MAA0(1) K5
A7/A8|A0/A10 VDD-C5
C10
74 BI MAA1(5) K10
A6/A11|A1/A9 VDD-C10
D11
74 BI MAA0(3) K10
D11
74 BI MAA1(4) K11
A5/BA1|A3/BA3 VDD-D11
G1
74 BI MAA0(2) K11
G1
74 BI MAA1(3) H10
A4/BA2|A2/BA0 VDD-G1
G4
74 BI MAA0(5) H10
G4
74 BI MAA1(2) H11
G11
74 BI MAA0(4) H11
G11
74 BI MAA1(1) H5
G14
74 BI MAA0(6) H5
G14
74 BI MAA1(0) H4
A1/A9|A6/A11 VDD-G14
L1
74 BI MAA0(7) H4
L1
74 BI A0/A10|A7/A8 VDD-L1
L4
L4
VDD-L4
L11
VDD-L4 VDD-L11
VDD-L11 L11 VDD-L14 L14
L14 WCKA1_0 D4 P11
WCKA0_1 D4
VDD-L14
P11
74 IN WCKA1_0# D5
WCK01|WCK23 VDD-P11
R5
74 IN WCKA0_1# D5
WCK01|WCK23 VDD-P11
R5
74 IN WCK01#|WCK23# VDD-R5
R10
74 IN WCK01#|WCK23# VDD-R5
R10 WCKA1_1 P4
VDD-R10
WCKA0_0 P4
VDD-R10 74 IN WCKA1_1# P5
WCK23|WCK01
74 IN WCKA0_0# P5
WCK23|WCK01 74 IN WCK23#|WCK01#
A1
74 IN WCK23#|WCK01#
A1 EDCA1_3 R2
VSSQ-A1
A3
EDCA0_0 R2
VSSQ-A1
A3
74 OUT EDCA1_2 R13
EDC3|EDC0 VSSQ-A3
A12
74 OUT EDCA0_1 R13
EDC3|EDC0 VSSQ-A3
A12
74 OUT EDCA1_0 C13
EDC2|EDC1 VSSQ-A12
A14
74 OUT EDCA0_3 C13
EDC2|EDC1 VSSQ-A12
A14
74 OUT EDCA1_1 C2
EDC1|EDC2 VSSQ-A14
C1
74 OUT EDCA0_2 C2
EDC1|EDC2 VSSQ-A14
C1
74 OUT EDC0|EDC3 VSSQ-C1
C3
74 OUT EDC0|EDC3 VSSQ-C1
C3 DBIA1_3 P2
VSSQ-C3
C4
DBIA0_0 P2
VSSQ-C3
C4
74 BI DBIA1_2 P13
DBI3#|DBI0# VSSQ-C4
C11
74 BI DBIA0_1 P13
DBI3#|DBI0# VSSQ-C4
C11
74 BI DBIA1_0 D13
DBI2#|DBI1# VSSQ-C11
C12
74 BI DBIA0_3 D13
C12
74 BI DBIA1_1 D2
C14
74 BI DBIA0_2
DBI1#|DBI2# VSSQ-C12 74 BI DBI0#|DBI3# VSSQ-C14
D 74 BI D2 DBI0#|DBI3# VSSQ-C14 C14 VSSQ-E1 E1 D
VSSQ-E1 E1 VSSQ-E3 E3
VSSQ-E3 E3 VSSQ-E12 E12
E12 RASA1# G3 E14
CASA0# G3
VSSQ-E12
E14
74 IN CASA1# L3
RAS#|CAS# VSSQ-E14
F5
74 IN RASA0# L3
RAS#|CAS# VSSQ-E14
F5
74 IN CAS#|RAS# VSSQ-F5
F10
74 IN CAS#|RAS# VSSQ-F5
F10
VSSQ-F10
H2
VSSQ-F10 VSSQ-H2
H2 CKEA1 J3 H13
CKEA0 J3
VSSQ-H2
H13
74 IN CLKA1# J11
CKE# VSSQ-H13
K2
74 IN CLKA0# J11
CKE# VSSQ-H13
K2
79 74 BI CLKA1 J12
CK# VSSQ-K2
K13
79 74 BI CLKA0 J12
CK# VSSQ-K2
K13
79 74 BI CK VSSQ-K13
M5
79 74 BI CK VSSQ-K13
M5
VSSQ-M5
M10
VSSQ-M5 VSSQ-M10
M10 CSA1# G12 N1
WEA0# G12
VSSQ-M10
N1
74 IN WEA1# L12
CS#|WE# VSSQ-N1
N3
74 IN CSA0# L12
CS#|WE# VSSQ-N1
N3
74 IN WE#|CS# VSSQ-N3
N12
74 IN WE#|CS# VSSQ-N3
N12
VSSQ-N12
N14
VSSQ-N12 VSSQ-N14
VSSQ-N14 N14 R5510 1 2 120_1%_2 J13 ZQ VSSQ-R1 R1
R5519 1 2 120_1%_2 J13 R1 1 2 J10 R3
ZQ VSSQ-R1 R5502 1K_5%_2 SEN VSSQ-R3
R5500 1 2 1K_5%_2 J10 SEN VSSQ-R3 R3 VSSQ-R4 R4
VSSQ-R4 R4 VSSQ-R11 R11
P1V5S_DGPU R11 P1V5S_DGPU VM_RST# J2 R12
P1V5S_DGPU VM_RST# J2
VSSQ-R11
R12
80 79 75 IN 1 2 J1
RESET# VSSQ-R12
R14
80 79 75 IN J1
RESET# VSSQ-R12
R14
MF VSSQ-R14
V1
MF VSSQ-R14 VSSQ-V1
C55001 2 R5503 1K_5%_2
VSSQ-V1 V1 1UF_6.3V_2_DY VSSQ-V3 V3
C55101 2
1UF_6.3V_2_DY VSSQ-V3 V3 R55121 2 2.37K_1%_2 VSSQ-V12 V12
1 2 1K_5%_2
R5524 1 2 2.37K_1%_2 VSSQ-V12 V12 VSSQ-V14 V14
R5501 V14 R55111 2 5.49K_1%_2 A5
VSSQ-V14 Vpp,NC
R5525 1 2 5.49K_1%_2
C A5 Vpp,NC C55011 2 1UF_6.3V_2 V5 Vpp,NC1 C
C5511 1 2 1UF_6.3V_2 V5 Vpp,NC1 VSS-B5 B5
VSS-B5 B5 A10 VREFD1 VSS-B10 B10
A10 VREFD1 VSS-B10 B10 V10 VREFD2 VSS-D10 D10
V10 VREFD2 VSS-D10 D10 VSS-G5 G5
VSS-G5 G5 VSS-G10 G10
VSS-G10 G10 P1V5S_DGPU VSS-H1 H1
P1V5S_DGPU VSS-H1 H1 VSS-H14 H14
VSS-H14 H14 VSS-K1 K1
K1 C55021 2
J14 K14
VSS-K1 1UF_6.3V_2_DY VREFC VSS-K14
C55061 2
J14 K14
1UF_6.3V_2_DY VREFC VSS-K14 R55131 2 2.37K_1%_2 VSS-L5 L5
R55201 2 2.37K_1%_2 VSS-L5 L5 VSS-L10 L10
L10 R55141 2 5.49K_1%_2 P10
VSS-L10 VSS-P10
R55211 2 5.49K_1%_2 P10 C55031 2 1UF_6.3V_2 J4 T5
VSS-P10 ABI# VSS-T5
C55071 2 1UF_6.3V_2 J4 ABI# VSS-T5 T5 VSS-T10 T10
VSS-T10 T10
SAM_K4G10325FE_HC04_FBGA_170P
SAM_K4G10325FE_HC04_FBGA_170P P1V5S_DGPU
P1V5S_DGPU
C55041 2
1UF_6.3V_2_DY
C55081 2
1UF_6.3V_2_DY R55161 2 2.37K_1%_2
R55221 2 2.37K_1%_2
R55151 2 5.49K_1%_2
R55231 2 5.49K_1%_2 C55051 2 1UF_6.3V_2
B C55091 2 1UF_6.3V_2 B
ADBIA1#
ADBIA0#
74 IN
74 IN
P1V5S_DGPU
P1V5S_DGPU
10UF_6.3V_3
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
10UF_6.3V_3
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
C5523
C5522
C5521
C5520
C5519
C5518
C5514
C5513
C5512
1
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
C5535
C5534
C5533
C5532
C5531
C5530
C5526
C5525
C5524
C5517
C5516
C5515
C5527
C5528
C5529
2
2
A A
INVENTEC
TITLE
VRAM1 & VRAM2

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U5503
U5502 P1V5S_DGPU
P1V5S_DGPU
DQB1(27) M2 B1
75 BI DQB0(14) M2 DQ31|DQ7 VDDQ-B1 B1 75 BI DQB1(30) M4
DQ31|DQ7 VDDQ-B1
B3
75 BI DQB0(9) M4 DQ30|DQ6 VDDQ-B3 B3 75 BI DQB1(25) N2
DQ30|DQ6 VDDQ-B3
B12
75 BI DQB0(15) N2 DQ29|DQ5 VDDQ-B12 B12 75 BI DQB1(29) N4
DQ29|DQ5 VDDQ-B12
B14
75 BI DQB0(8) N4 DQ28|DQ4 VDDQ-B14 B14 75 BI DQB1(26) T2
DQ28|DQ4 VDDQ-B14
D1
75 BI DQB0(11) T2 DQ27|DQ3 VDDQ-D1 D1 75 BI DQB1(31) T4
DQ27|DQ3 VDDQ-D1
D3
75 BI DQB0(10) T4 DQ26|DQ2 VDDQ-D3 D3 75 BI DQB1(24) V2
DQ26|DQ2 VDDQ-D3
D12
75 BI DQB0(13) V2 DQ25|DQ1 VDDQ-D12 D12 75 BI DQB1(28) V4
DQ25|DQ1 VDDQ-D12
D14
75 BI DQB0(12) V4 DQ24|DQ0 VDDQ-D14 D14 75 BI DQB1(22)
DQ24|DQ0 VDDQ-D14
F DQB0(1) M13 E5 75 BI M13 DQ23|DQ15 VDDQ-E5 E5 F
75 BI DQB0(6) M11
DQ23|DQ15 VDDQ-E5
E10 75 BI DQB1(23) M11 DQ22|DQ14 VDDQ-E10 E10
75 BI DQB0(0) N13
DQ22|DQ14 VDDQ-E10
F1 75 BI DQB1(20) N13 DQ21|DQ13 VDDQ-F1 F1
75
75
75
BI
BI
BI
DQB0(7)
DQB0(2)
DQB0(5)
N11
T13
T11
DQ21|DQ13
DQ20|DQ12
DQ19|DQ11
VDDQ-F1
VDDQ-F3
VDDQ-F12
F3
F12
F14
CHANNEL B MEMORY 75
75
75
BI
BI
BI
DQB1(21)
DQB1(18)
DQB1(17)
N11
T13
T11
DQ20|DQ12
DQ19|DQ11
DQ18|DQ10
VDDQ-F3
VDDQ-F12
VDDQ-F14
F3
F12
F14
75 BI DQB0(3) V13
DQ18|DQ10 VDDQ-F14
G2 75 BI DQB1(19) V13 DQ17|DQ9 VDDQ-G2 G2
75 BI DQB0(4) V11
DQ17|DQ9 VDDQ-G2
G13 75 BI DQB1(16) V11 DQ16|DQ8 VDDQ-G13 G13
75 BI DQB0(16) F13
DQ16|DQ8 VDDQ-G13
H3 75 BI DQB1(4) F13 DQ15|DQ23 VDDQ-H3 H3
75 BI DQB0(18) F11
DQ15|DQ23 VDDQ-H3
H12 75 BI DQB1(0) F11 DQ14|DQ22 VDDQ-H12 H12
75 BI DQB0(17) E13
DQ14|DQ22 VDDQ-H12
K3 75 BI DQB1(7) E13 DQ13|DQ21 VDDQ-K3 K3
75 BI DQB0(23) E11
DQ13|DQ21 VDDQ-K3
K12 75 BI DQB1(2) E11 DQ12|DQ20 VDDQ-K12 K12
75 BI DQB0(19) B13
DQ12|DQ20 VDDQ-K12
L2 75 BI DQB1(6) B13 DQ11|DQ19 VDDQ-L2 L2
75 BI DQB0(21) B11
DQ11|DQ19 VDDQ-L2
L13 75 BI DQB1(3) B11 DQ10|DQ18 VDDQ-L13 L13
75 BI DQB0(20) A13
DQ10|DQ18 VDDQ-L13
M1 75 BI DQB1(5) A13 DQ9|DQ17 VDDQ-M1 M1
75 BI DQB0(22) A11
DQ9|DQ17 VDDQ-M1
M3 75 BI DQB1(1) A11 DQ8|DQ16 VDDQ-M3 M3
75 BI DQB0(26) F2
DQ8|DQ16 VDDQ-M3
M12 75 BI DQB1(10) F2 DQ7|DQ31 VDDQ-M12 M12
75 BI DQB0(27) F4
DQ7|DQ31 VDDQ-M12
M14 75 BI DQB1(15) F4 DQ6|DQ30 VDDQ-M14 M14
75 BI DQB0(31) E2
DQ6|DQ30 VDDQ-M14
N5 75 BI DQB1(9) E2 DQ5|DQ29 VDDQ-N5 N5
P1V5S_DGPU
75 BI DQB0(24) E4
DQ5|DQ29 VDDQ-N5
N10 75 BI DQB1(14) E4 DQ4|DQ28 VDDQ-N10 N10
75 BI DQB0(29) B2
DQ4|DQ28 VDDQ-N10
P1 75 BI DQB1(8) B2 DQ3|DQ27 VDDQ-P1 P1
75 BI DQB0(28) B4
DQ3|DQ27 VDDQ-P1
P3 75 BI DQB1(12) B4 DQ2|DQ26 VDDQ-P3 P3
75 BI DQB0(30) A2
DQ2|DQ26 VDDQ-P3
P12 75 BI DQB1(11) A2 DQ1|DQ25 VDDQ-P12 P12
75 BI DQ1|DQ25 VDDQ-P12 P1V5S_DGPU DQB1(13) A4 P14
CLKB0 R5535 1 260.4_1%_2 75 BI DQB0(25) A4 DQ0|DQ24 VDDQ-P14 P14 75 BI DQ0|DQ24 VDDQ-P14
T1
80 75 IN CLKB0# VDDQ-T1 T1 VDDQ-T1
80 75 IN R5536 1 260.4_1%_2
T3 VDDQ-T3 T3
VDDQ-T3
VDDQ-T12 T12
VDDQ-T12 T12
T14
T14 CLKB1 R5527 1 260.4_1%_2 VDDQ-T14
VDDQ-T14 80 75 IN CLKB1#
80 75 IN R5526 1 260.4_1%_2
MAB1(8)
E MAB0(8) J5 75 BI J5 RFU/A12/NC E
75 BI MAB0(0) K4
RFU/A12/NC
C5 75 BI MAB1(7) K4 A7/A8|A0/A10 VDD-C5 C5
75 BI MAB0(1) K5
A7/A8|A0/A10 VDD-C5
C10 75 BI MAB1(6) K5 A6/A11|A1/A9 VDD-C10 C10
75 BI MAB0(3) K10
D11 75 BI MAB1(5) K10 A5/BA1|A3/BA3 VDD-D11 D11
75 BI MAB0(2) K11
G1 75 BI MAB1(4) K11 A4/BA2|A2/BA0 VDD-G1 G1
75 BI MAB0(5) H10
G4 75 BI MAB1(3) H10 A3/BA3|A5/BA1 VDD-G4 G4
75 BI MAB0(4) H11
G11 75 BI MAB1(2) H11 A2/BA0|A4/BA2 VDD-G11 G11
75 BI MAB0(6) H5
G14 75 BI MAB1(1) H5 A1/A9|A6/A11 VDD-G14 G14
75 BI MAB0(7) H4
L1 75 BI MAB1(0) H4 A0/A10|A7/A8 VDD-L1 L1
L4 VDD-L4 L4
VDD-L4
VDD-L11 L11
VDD-L11 L11
VDD-L14 L14
VDD-L14 L14
WCKB1_0 D4 P11
75 IN WCKB0_1 D4 WCK01|WCK23 VDD-P11 P11 75 IN WCKB1_0# D5
WCK01|WCK23 VDD-P11
R5
75 IN WCKB0_1# D5 WCK01#|WCK23# VDD-R5 R5 75 IN WCK01#|WCK23# VDD-R5
R10
VDD-R10
VDD-R10 R10
WCKB1_1 P4
75 IN WCKB0_0 P4 WCK23|WCK01
75 IN WCKB1_1# P5
WCK23|WCK01
75 IN WCKB0_0# P5 WCK23#|WCK01#
75 IN WCK23#|WCK01#
A1
VSSQ-A1
VSSQ-A1 A1
EDCB1_3 R2 A3
75 OUT EDCB0_1 R2 EDC3|EDC0 VSSQ-A3 A3 75 OUT EDCB1_2 R13
EDC3|EDC0 VSSQ-A3
A12
75 OUT EDCB0_0 R13 EDC2|EDC1 VSSQ-A12 A12 75 OUT EDCB1_0 C13
EDC2|EDC1 VSSQ-A12
A14
75 OUT EDCB0_2 C13 EDC1|EDC2 VSSQ-A14 A14 75 OUT EDCB1_1 C2
EDC1|EDC2 VSSQ-A14
C1
75 OUT EDCB0_3 C2 EDC0|EDC3 VSSQ-C1 C1 75 OUT EDC0|EDC3 VSSQ-C1
C3
VSSQ-C3
VSSQ-C3 C3
DBIB1_3 P2 C4
75 BI DBIB0_1 P2 DBI3#|DBI0# VSSQ-C4 C4 75 BI DBIB1_2 P13
DBI3#|DBI0# VSSQ-C4
C11
75 BI DBIB0_0 P13 DBI2#|DBI1# VSSQ-C11 C11 75 BI DBIB1_0 D13
C12
75 BI DBIB0_2 D13 DBI1#|DBI2# VSSQ-C12 C12 75 BI DBIB1_1 D2
C14
75 BI DBIB0_3 D2 DBI0#|DBI3# VSSQ-C14 C14 75 BI DBI0#|DBI3# VSSQ-C14
D VSSQ-E1 E1 VSSQ-E1 E1 D
VSSQ-E3 E3
VSSQ-E3 E3
VSSQ-E12 E12
VSSQ-E12 E12
RASB1# G3 E14
75 IN CASB0# G3 RAS#|CAS# VSSQ-E14 E14 75 IN CASB1# L3
RAS#|CAS# VSSQ-E14
F5
75 IN RASB0# L3 CAS#|RAS# VSSQ-F5 F5 75 IN CAS#|RAS# VSSQ-F5
F10
VSSQ-F10
VSSQ-F10 F10
VSSQ-H2 H2
VSSQ-H2 H2
CKEB1 J3 H13
75 IN CKEB0 J3 CKE# VSSQ-H13 H13 75 IN CLKB1# J11
CKE# VSSQ-H13
K2
80 75 BI CLKB0# J11 CK# VSSQ-K2 K2 80 75 BI CLKB1 J12
CK# VSSQ-K2
K13
80 75 BI CLKB0 J12 CK VSSQ-K13 K13 80 75 BI CK VSSQ-K13
M5
VSSQ-M5
VSSQ-M5 M5
VSSQ-M10 M10
VSSQ-M10 M10
CSB1# G12 N1
75 IN WEB0# G12 CS#|WE# VSSQ-N1 N1 75 IN WEB1# L12
CS#|WE# VSSQ-N1
N3
75 IN CSB0# L12 WE#|CS# VSSQ-N3 N3 75 IN WE#|CS# VSSQ-N3
N12
VSSQ-N12
VSSQ-N12 N12
VSSQ-N14 N14
VSSQ-N14 N14
P1V5S_DGPU R5528 1 2 120_1%_2 J13 ZQ VSSQ-R1 R1
R5537 1 2 120_1%_2 J13 ZQ VSSQ-R1 R1
R5506 1 2 1K_5%_2 J10 SEN VSSQ-R3 R3
R5504 1 2 1K_5%_2 J10 SEN VSSQ-R3 R3
VSSQ-R4 R4
VSSQ-R4 R4
VSSQ-R11 R11
VSSQ-R11 R11 P1V5S_DGPU VM_RST# J2 R12
80 79 75 IN VM_RST# J2 RESET# VSSQ-R12 R12 80 79 75 IN 1 2 J1
RESET# VSSQ-R12
R14
MF VSSQ-R14
J1 MF VSSQ-R14 R14
P1V5S_DGPU R5507 1K_5%_2 VSSQ-V1 V1
VSSQ-V1 V1 C55361 2
1UF_6.3V_2_DY VSSQ-V3 V3
1 2 VSSQ-V3 V3
V12 R55301 2 2.37K_1%_2 VSSQ-V12 V12
C55431 2 1UF_6.3V_2_DY R5505 1K_5%_2 VSSQ-V12
V14
VSSQ-V14
VSSQ-V14 V14 R55291 2 5.49K_1%_2 A5 Vpp,NC
R55391 2 2.37K_1%_2 A5 Vpp,NC
C V5 Vpp,NC1
C55371 2 1UF_6.3V_2 V5 Vpp,NC1 C
R55401 2 5.49K_1%_2 B5 VSS-B5 B5
VSS-B5
A10 VREFD1 VSS-B10 B10
C55441 2 1UF_6.3V_2 A10 VREFD1 VSS-B10 B10
V10 VREFD2 VSS-D10 D10
V10 VREFD2 VSS-D10 D10
VSS-G5 G5
VSS-G5 G5
VSS-G10 G10
VSS-G10 G10 P1V5S_DGPU
P1V5S_DGPU VSS-H1 H1
VSS-H1 H1
VSS-H14 H14
VSS-H14 H14
VSS-K1 K1
VSS-K1 K1 C55381 2
C55421 2
J14 K14 1UF_6.3V_2_DY J14 VREFC VSS-K14 K14
1UF_6.3V_2_DY VREFC VSS-K14
R55311 2 2.37K_1%_2 VSS-L5 L5
R55381 2 2.37K_1%_2 VSS-L5 L5
L10
VSS-L10
VSS-L10 L10 R55321 2 5.49K_1%_2
R55411 2 5.49K_1%_2 P10 VSS-P10 P10
VSS-P10
C55391 2 1UF_6.3V_2 J4 ABI# VSS-T5 T5
C55451 2 1UF_6.3V_2 J4 ABI# VSS-T5 T5
T10
VSS-T10
VSS-T10 T10
P1V5S_DGPU
P1V5S_DGPU
C55401 2 MF = 1 FOR MIRROR

C55461 2 1UF_6.3V_2_DY
1UF_6.3V_2_DY
R55341 2 2.37K_1%_2
R55421 2 2.37K_1%_2
R55331 2 5.49K_1%_2
R55431 2 5.49K_1%_2
C55411 2 1UF_6.3V_2
B C55471 2 1UF_6.3V_2 B
ADBIB1#
75 IN ADBIB0# 75 IN
P1V5S_DGPU
P1V5S_DGPU
10UF_6.3V_3
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
1
1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
0.1UF_16V_2
C5559
C5558
C5557
C5556
C5555
C5554
C5550
C5549
C5548
10UF_6.3V_3
1
1UF_6.3V_2
1UF_6.3V_2
C5570
C5569
C5568
C5567
C5566
C5562
C5561
C5553
C5552
C5551
1
C5571
C5565
C5564
C5563
1
1UF_6.3V_2
C5560
2
2
2
2
A A
INVENTEC
TITLE
VRAM3 & VRAM4

8 7 6 5 4 3 2 1

HP Elitebook Folio 9470m 6050A2514101

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8 7 6 5 4 3 2 1

THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC

F HSF Property:ROHS or Halogen-Free F

23. IVY BRIDGE_1 (CLK,MISC,JTAG) 47. KEYBOARD

15. SYSTEM POWER(PVCORE1) 37. PANTER POINT_7 (POWER) 61. MIC DB

PRIMARY LI-LON BATTERY

SECOND LI-LON BATTERY CRT R.G.B 1666MT/S DDR3_SODIMM

PCIE6 USB1 - CHARGER USB7 - SMART CARD USB2 - LEFT

USB3 - RIGHT2 USB10 - CAMERA USB4 - RIGHT 2

USB3.0 PORT X 4 LINE IN/LINE OUT RJ-45 DP1.2 VGA INVENTEC

2ND BATTERY MAIN BATTERY

PVBAT DDR3 / 1.5V

8 SDA 18 R6026 C6026 3 4

R6110 0_5%_2 2N7002DW

22 VIN U6500 SW 9 POWERPAD_2_0610

C6500 C6501 C6502

22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5

SIZE CODE 1310xxxxx-0-0 X01

1 TP6001 1 TP6008 1 TP6014 1 TP6020 1 TP6025 1 TP6028 1 TP6032

REFERENCE NUMER : 7000~7350 Q2971 WHETHER CAN CHANGE TO

REFERENCE NUMER : 2950~2999 SIZE

CHANGE by XXX DATE 21-OCT-2002 SHEET 19 of 80

AMBIENT TEMP SENSE

41.2K_1%_3 1M_5%_2 R2963

OUT OUT M_PWROK35 20

P1V05M 75 DEG. => 36 KOHM

REFERENCE NUMER : 2950~2999 SIZE CODE

REFERENCE NUMBER:4411~4449 SIZE CODE

JTAG & BPM

35 1 6 1 2 BE45 G58 H_BPM0_XDP#

PCI EXPRESS -- GRAPHICS

P1V05S_VCCP PEG_TX#[12] M10

DDR SYSTEM MEMORY B

M_A_DQ<25> M_ODT1 30 BI M_B_DQ<31> BF19 SB_DQ[31] SB_DQS#[0] AL3 M_B_DQS0_DN OUT 30

M_A_DQ<27> AR19 31 BI SB_DQ[33] SB_DQS#[2] OUT 30

PEG AND DDR

SIZE CODE DOC.NUMBER REV

PVAXG U4500 TP4530

AD58 VAXG[20] VDDQ[11] AM40

P47 VAXG[24] VDDQ[15] AR26

P53 VAXG[29] VDDQ[20] AR36

P55 VAXG[30] VDDQ[21] AR40

15 OUT VAXG_SENSE VCCDQ[2]

P1V8S BB3 VCCPLL[1]

PVSA P20 U10 VCCSA_SENSE

V18 D49 VCCSA_VID1

SIZE CODE DOC.NUMBER REV

B50 BE7 BG17 M4 A13 AM38

CFG[2] : PCI Express* Static x16 Lane Numbering Reversal.

CFG[4] : eDP enable

SIZE CODE DOC.NUMBER REV

FOX_AS0A626_U4RG_7H_204P IF SA0_DIM0=1 , SA1_DIM0=0

SIZE CODE DOC.NUMBER REV

1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2

SIZE CODE DOC.NUMBER REV

SIZE CODE DOC.NUMBER REV

1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2

1UF_6.3V_2_DY 1UF_6.3V_2_DY 1UF_6.3V_2_DY 1UF_6.3V_2_DY

SPD ADDRESS=30 HEX FOR MEMORY DOWN A

SIZE CODE DOC.NUMBER REV

1 2 C20 B37 LPC_3S_AD(2) P3V3S

57 33 OUT A_3S_ICHSPKR T10 SPKR SATA1RXN AM10

INTRUDER# SATA2TXP AH4