DEVELOPMENT OF VOLTAGE-CONTROLLED OSCILLATOR 600-

800MHZ FOR DIRECT CONVERSION RECEIVER ARCHITECTURE

1
MARDENI R., 2H. T.SO
1,2
Faculty of Engineering, Multimedia University, Cyberjaya, 63100, Selangor, Malaysia
E-mail: 1mardeni.roslee@mmu.edu.my, 2hongteck88@yahoo.com

Abstract- In wireless communication devices, one of the unique challenges found is the requirement for the design with
high efficiency and cost efficiency in mass production. Thus, in this work, we come out with a new design that uses lesser
components and occupies relatively smaller PCB space. The paper presents the realization of better VCO to cover frequency
band of 600-800 MHz to replace current VCO design in a two-way radio with direct conversion receiver architecture. This
work can help further in cost reduction and allow better utilization on the PCB space for other enhancement circuitry that
benefits customers.

Index terms- Wireless, Voltage Controlled Oscillator

I. INTRODUCTION Voltage Controlled Oscillator (VCO) is an oscillator

Two-way radio is widely accepted and used in
government and public safety, enterprise and military
sector. It is an efficient communication device in
mission critical activities such as in police
department, security, emergency response unit,
military department and etc [1]. It is not only
confined to that extent as peoples are also using it as
a communication device for recreation activities like
camping, hiking, hunting and etc. Capability of
provide fast, secure and clear audio quality better
enable one to efficiently coordinate and communicate
with on-the-go workforce[2]. Two-way radio is a
combination of receiver and transmitter and also
known as transceiver. It is usually operates in half
duplex mode, where operator can only talk or listen
but not at the same time. Unlike cellular or mobile
phone which operate in full duplex mode which uses
two different radio frequencies to transmit and
receive simultaneously[3]. In this work, the paper
focus on the heart of the frequency generation unit,
voltage controlled oscillator where Colpitts VCO
topology within 600-800 MHz is being proposed.
This range is within the microwave frequency range
of 300MHz to 300GHz. The advantage of this
topology is better phase noise. In order to cover for a
wider bandwidth, more than one VCO might required
to do the job. To align with engineering efficiency
initiative, it could be much more cost efficient if only
a single VCO is required to cover same amount of
bandwidth. A Hartley topology VCO is usually
capable of achieving larger bandwidth, the only
limitation is that the phase noise is not as good as in
the Colpitts design. To further enhance phase noise
performance in Hartley topology, the project also
proposes a new high Q embedded resonator to replace
existing discrete coaxial resonator. This initiative
found useful in cost reduction without compromise
on quality.
whose frequency can be varied by changing the
voltage (Vctrl) applied to voltage dependent
impedance (varactor) [4]. Varactor is a diode where
its capacitance varies with the applied reverse biased
voltage. By changing the reverse bias voltage, it
actually alters the width of the depletion zone
(dielectric)[5]. Hence changes the total effective
capacitance of the diode.
In electronic circuitry, oscillation relates to the
continual transfer of energy between the reactive
components [2]. This transfer will waste energy and
therefore oscillation will die out naturally. If there is
an active device that can put energy back into this
see-saw operation, then oscillation will continue. This
is also referred to as feedback with gain just enough
to overcome losses.
In the existing radio products, Colpitts topology is
used in VCO design [6-8]. This is mainly due to its
better phase noise performance and less self and
mutual inductance in the tank circuit. In several
aspects, the Colpitts oscillator is the opposite of the
Hartley Oscillator. Colpitts and Hartley oscillators are
the two common configurations in LC tuned
oscillator. The basic structure without biasing can be
seen in Fig. 1.
Figure 1: Equivalent Circuit for Colpitts and Hartley VCO

II. LITERATURE REVIEW

Figure 2: Equivalent Circuit of the Colpitts Oscillator

Proceedings of Research World International Conference, Osaka, Japan, 3rd-4th September 2016, ISBN: 978-93-86083-34-0
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 Development Of Voltage-Controlled Oscillator 600-800mhz For Direct Conversion Receiver Architecture

In Fig.1, both circuits utilize a parallel LC circuit

connected between the collector and the base with a
fraction of the tuned circuit voltage fed to the emitter
of the transistor. If the frequency of operation is low
enough, transistor parasitic capacitances can be
ignored. Hence, the frequency of oscillation is
determined by the resonant frequency of the parallel
tuned circuit, also known as tank circuit.
Theoretically, Colpitts oscillator can be described in
equation (1) whereas equation (2) is for Hartley
oscillator [9,10]
1 Figure 3: Basic Colpitts Oscillator Circuit

C1C 2 (1)
L Radio frequency choke (RFC) in the oscillator
C1  C 2
1 provides high reactance at ωo but low DC
 resistance[11,12]. As the oscillation grows, the
C ( L1  L2 ) (2)
effective gain of the transistor is reduced below its
The ratio L1/L2 or C1/C2 determines the
small signal value. The LC tuned oscillator also
feedback factor and thus must be optimized with
known as self-limiting oscillators. The tuning
consideration of transistor gain to ensure that
bandwidth, ∆BW, can be given as below:
oscillation will start. To determine the oscillation
condition for the Colpitts oscillator, transistor is BW 
f max

C max (10)
replaced with its equivalent circuit as in Fig.2. To f min C min
make the analysis simpler, transistor capacitances is For Colpitts topology, it can be shown that;
ignored except capacitance CBE is a part of C2.
C1C1
A node equation at the transistor collector yields: C 3 max  ( ) (11)
C1  C 2
1 BW 
sC 2V  g mV  (  sC1 )(1  s 2 LC 2 )V  0 (3) CC
R C 3 min ( 1 1 )
C1  C 2
Since V  0 oscillations have started, it can then be
The fixed value in the feedback capacitor,
eliminated as below: C1 and C2 limits the frequency bandwidth by
confining the total tunable capacitance in the tank
2 C2 1 ( 4) circuit. As to extent the bandwidth, the feedback
s 3 LC1C 2  s ( L )  s (C1  C 2 )  )( g m  )  0
R R capacitor are eliminated and uses resonator as part of
the feedback circuit, thus becoming Hartley VCO as
1  2 LC 2 (5) shown in equation below, the tuning bandwidth
(g m   )  j[ (C1  C 2 )   3 LC1C 2 ]  0
R R become:
For oscillation to start, both the real and imaginary C 3 max
parts must be zero. Setting the imaginary part to zero  BW 
C 3 min
gives;
1
Hence, Hartley VCO has wider bandwidth than
o  Colpitts VCO. In the past it was difficult to realize
C1C 2
L Hartley VCO due to the difficulty in determining the
C1  C 2
tapping ratio in feedback circuit and ensuring high Q-
ωo is the resonant frequency of the tank circuit. factor. However, with CST 3-D simulator, the high Q
Setting the real part to zero yields; embedded resonator can be realized in a more
C2 (7 )
g R m
efficient way in this work.
C1
To sustain oscillation, magnitude of the gain from the III. DESIGN GOALS FOR VCO
base to collector (gmR) must be equal to inverse of the
voltage ratio provided by the capacitive divider: In our proposed design, VCO phase noise of -
vbc C1 (8) 118dBc/Hz@25kHz is used to meet 3dB margin from

vcc C2 regulatory specification for Adjacent Channel
Loop gain must be greater than unity in order for Selectivity (ACS), which require >70dB to comply
oscillation to start, which equivalent to; with ETS 300 086. Hum and Noise spec of <-50dB
C ( 9) @25kHz is to guarantee at least 5dB design margin
g R 2
m
C1 from regulatory spec in TIA 603. Operating steering
As shown in Fig.3, an oscillation grows in amplitude, line voltage of 2 to 9 Volts is to ensure the VCO
the transistor non-linear characteristic reduces the design is robust enough to ensure minimum Vctrl of
loop gain to unity, thus sustaining oscillations[10,11]. 1.3 Volt and maximum Vctrl of 12 Volts is sufficient

Proceedings of Research World International Conference, Osaka, Japan, 3rd-4th September 2016, ISBN: 978-93-86083-34-0
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 Development Of Voltage-Controlled Oscillator 600-800mhz For Direct Conversion Receiver Architecture

to cater for parts tolerances that results in frequency future design enhancement to support wider
shift. bandwidth if required. The design is based on Hartley
Table. 1 VCO Design Goals topology with embedded resonator technology. By
embedding the resonator between ground layers, the
risk of microphonics is also greatly reduces.
Microphonics is situation where some electronic
components transform mechanical vibration into
undesired electrical noise. Two-way radio susceptible
to microphonics could experience audio feedback or
audio regeneration. In this case, microphonics could
happen as results of interaction between discrete
coaxial resonator. The VCO uses transistor from NXP
and two pairs of back to back varactor diode from
Toshiba. The resonator is simulated through 3D-
Computer Simulation Tools (CST) to be in optimum
length in order to cater for the required frequency
bands. The resonators can be designed to be of
IV. VCO DESIGN TOPOLOGY IN DIRECT different length and shape in order to cater for various
CONVERSION RECEIVER (DCR) PLATFORM frequency bands.

In the current or existing portable radio platform

which is direct conversion receiver (DCR)
architecture, the major of FGU elements are
integrated in RF IC [13,14]. The VCO generate signal
at twice of the channel frequency to support DCR.
Divide by 2 dividers are incorporated in Rodinia’s
internal Rx and Tx paths. Current VCO design in our
radio product is shown in below schematic, Fig.4. It
uses dual Colpitts VCOs to cover 600-800 MHz.
VCO 1: 600-700 MHz
Colpitt
Design

Varactor
coupling cap

Steering line
voltage

3 pairs back to 960MHz To Pi-network and matching Figure 5:Schematic of Proposed Hartley VCO Design with
back varactor Resonator circuit
Embedded Resonator
VCO 2: 700-800 MHz

VCO schematic as in previous Fig.5 as created in

Cadence and test board layout is routed in Allegro
Cv1 and Cv2 Cadence 16.5. The PCB board file is imported into
Ct
CST 3D for EM layout simulation. Then, VCO is
simulated using Advanced Design System (ADS)
momentum co-simulation tools and lastly fabrication.
Figure 4: Dual Colpitts VCOs Design in DCR Platform.
VI. SIMULATION RESULTS AND
Back to back varactors are used to prevent the RF DISCUSSION
voltage from swinging into the varactor forward-
biased region which has a very low Q factor. Besides, A. Embedded Resonator Simulation Results
it could ensure that the RF voltage always fall within After the series of optimization process in length,
the varactor reverse biased region that has higher Q shape and thickness on the embedded resonator, the
factor which is important to obtain good phase noise best design is finalized and ready for PCB
performance. fabrication. Hartley VCO requires layout
modification each time a different inductance is
V. METHODOLOGY desired. In the experiments, it was to ensure the
embedded resonator inductance hit around 7nH. This
In our work, the schematic in Fig.5 consists of two inductance value obtained from ADS momentum
VCOs; first VCO is the focus in this project which simulation as a 7nH discrete inductor is basically
covers the entire 600-800 MHz bandwidth. The meeting the 600-800 MHz bandwidth requirement.
second VCO is prepared intentionally to reserve for Hence, the embedded resonator was designed to such

Proceedings of Research World International Conference, Osaka, Japan, 3rd-4th September 2016, ISBN: 978-93-86083-34-0
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 Development Of Voltage-Controlled Oscillator 600-800mhz For Direct Conversion Receiver Architecture

inductance value. Table 2 shows CST simulated

inductance and Q results the design. The finalized
embedded resonator design is illustrated in Fig.6.
Table .2 Simulated Design on Embedded Resonator for
Inductance and Q-factor

(a)

(b)
Figure 8: ADS Momentum Simulation on Hartley VCO 600-
800 MHz (a): design (b) results.

Figure 6: Embedded Resonator in CST VII. MEASUREMENT RESULTS

For verification purposes, an actual measurement was

implemented on the Hartley VCO test board and
existing dual-Colpitts was compared with the VCO
design. In the evaluation, it is found that all the
critical parameter goals are met. The key parameter
for comparison are Frequency curve againts Vctrl,
phase noise, hum and noise, prescaler power level,
harmonics rejections, current drain and stability.
A. Frequency Response and Phase Noise
Table. 3 Control Voltage and Corresponding Frequencies at
25oC
Figure 7: Feedback Network and Optimum

After finalize on the shape and length on embedded

resonator, designer can start to work on optimum
tapping ratio for feedback network in Hartley VCO as
in Fig.7. In Colpitts VCO, the two feedback
capacitances are optimized by physically changing
the capacitor value. However, Hartley VCO requires
layout changes each time a different inductance or
tapping ratio (L1/L2) is desired. From ADS
momentum simulation, VCO is oscillating at 600-800
MHz with operating control voltage from 2-10 volts
and at the same time meeting current drain Based on Table 3, it is noted that VCO cross over
requirement with tapping ratio of 1.45-1.6. L1/L2 of frequency at 700MHz in dual Colpitts VCO design
1.53 was chosen to ensure better margin. where VCO #1 operated from 600 to 700MHz
whereas VCO #2 is from 700 to 800 MHz.
Frequency (MHz) vs. Vctrl (V)
B. ADS Momentum Simulation Results 900.00

850.00
ADS momentum simulation is used to simulate on 800.00
Frequency (MHz)

entire operating BW with control voltage from 2-10 750.00

Volt. Optimization on the VCO design can be done 700.00 Hartley VCO with
Embedded Resonator
Colpitts VCO #1
650.00
by changing the component value on maintank 600.00
Colpitts VCO #2

capacitor, varactor diode, tank coupling capacitor, 550.00

varactor coupling capacitor, transistor and etc. The 500.00

0 2 4 6 8 10 12
Vctrl (V)
simulated frequencies againts control voltage is
Figure 9: Frequency vs. Control Voltage on Each Design.
shown in Fig.8.

Proceedings of Research World International Conference, Osaka, Japan, 3rd-4th September 2016, ISBN: 978-93-86083-34-0
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 Development Of Voltage-Controlled Oscillator 600-800mhz For Direct Conversion Receiver Architecture
Hum & Noise (25deg-C)
-43.00

Spec for 12.5kHz : <45dB

-45.00

-47.00

Hum & Noise (dB)

Proposed Design @12.5kHz
-49.00 Current Design @12.5kHz
Spec for 25kHz : <50dB
Spec for 12.5kHz

-51.00 Proposed Design @25kHz

600 625 650 675 700 725 750 775 800 Current Design @25kHz

Spec for 25kHz

-53.00

-55.00

-57.00

Figure 10: Proposed Design Frequency (MHz)

Figure 12: Hum and Noise Comparison between Proposed and

Current Design at (a)25oc
Additionally, a guard band is calculated based on
minimum and maximum control voltage of 1 volt and
VIII. COST REDUCTION VIA PCB SPACE
10 volt respectively. The minimum and maximum
voltages are determined by the RF IC requirement. AND PARTS COUNT
From the frequency curve in Fig.9, operating control
In this work, it is able to reduce a cost of production.
voltage for VCO is designed to be at 2 volt at close to
There are around 132.63 mm2 in PCB space is saved,
600 MHz and 9 Volt at around 800 MHz. Hence
which found the achievement in this work. Smaller
lower guard band is around 30.7 MHz and upper
PCB space occupied allow smaller form factor in
guard band is around 25.3 MHz, as shown in Fig.10.
radio design and better utilization on the PCB for
Based on Fig.10, single Hartley VCO is able to cover
other enhancement circuitry in future. The total cost
frequency band of 600-800 MHz at operating vctrl of
for parts used in Hartley VCO only cost US$ 0.25
around 2 to 9 Volt. For the same bandwidth, two
compared to shipping design that cost US$ 1.35. In
Colpitt is needed. Across the band, VCO phase noise
dual Colpitts VCO the cost involved 2 coaxial
must be able to pass design goal with margin as well.
discrete resonators (US$0.43 x 2) and also the 53
Measured phase noise performance is depicted in the
parts cost around US$ 0.49. Total up is US$ 1.35. So
Fig.11. Phase noise evaluation results are found met
in overall, we saved 132.63 mm2 in PCB space and
the design goal and it is also better than the existing
about US$ 1.10 in manufacturing cost.
Colpitts design. Evaluation is performed over-
temperature of -30oC, 25oC and 60 oC, but here only
CONCLUSION
25oC is shown as in Fig.11 to ensure stability and
robustness of the design. Graph below are
A new design that uses lesser components and
comparison done based on Hartley VCO with
occupies relatively smaller PCB space for many type
embedded resonator (proposed design) and Colpitts
of wireless communication application is presented.
VCO (current or existing design). In overall, the
The achievement of single Hartley VCO with
proposed design is slightly better or very much
embedded resonator covering entire 600-800MHz
comparable to current design. This is mainly due to
frequency band able to reduce design cycle time by
high Q embedded resonator for phase noise of -30oC,
reducing the number of VCO required, hence increase
25oC and 60oC.
engineering efficiency and productivity. This
VCO Phase Noise (25deg-C)
initiative also aligns with worldwide company
-108.00
philosophy in production cost reduction without
-110.00
SBNR Spec <-111dBc/Hz compromise on quality.
-112.00 Proposed Design @12.5kHz

Current Desig n @12.5kHz

SBNR (dBc/Hz)

-114.00
Sp ec for 12.5kHz ACKNOWLEDGMENT
Sp ec for 25kHz
-116.00
Proposed Design @25kHz
SBNR Spec <-118dBc/Hz
-118.00
600 625 650 675 700 725 750 775 800
Current Desig n @25kHz
The authors would like to thank to R&D Motorola
-120.00 Solutions Penang, Malaysia, the Centre of Wireless
-122.00 Technology of Multimedia University (MMU),
Frequency (MHz)
Centre for Communication and Signal Processing of
Figure 11: Phase noise comparison between proposed and MMU and Faculty of Engineering of MMU for
current design at 25oc
supports rendered in this work.
B. Hum and Noise Measurement
Additionally, Single Hartley VCO performance REFERENCE
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Proceedings of Research World International Conference, Osaka, Japan, 3rd-4th September 2016, ISBN: 978-93-86083-34-0
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 Development Of Voltage-Controlled Oscillator 600-800mhz For Direct Conversion Receiver Architecture
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