energies

Article
A Hybrid DC Circuit Breaker with
Fault-Current-Limiting Capability for VSC-HVDC
Transmission System
Muhammad Ahmad 1,2 and Zhixin Wang 1,2, *
1 School of Electronics Information and Electrical Engineering, Shanghai Jiao Tong University,
Shanghai 200240, China; ahmad1406@sjtu.edu.cn or muhammad.ahmad14@hotmail.com
2 Key Laboratory of Control of Power Transmission and Conversion, Ministry of Education,
Shanghai 200240, China
* Correspondence: wangzxin@sjtu.edu.cn; Tel.: +86-21-3420-4527




Received: 28 April 2019; Accepted: 18 June 2019; Published: 21 June 2019


Abstract: The direct current circuit breakers are considered a promising option to protect the
transmission line against commonly appearing line-to-ground fault. However, the challenges of
losses in the nonoperational stage, escalation of response against fault current, and large fault current
handling capability remain the debatable issues for direct current circuit breakers. This paper
introduces a novel topology of the hybrid circuit breaker with fault-current-limiting characteristics,
which contains three branches: the main branch, fault-current-limiting branch, and energy absorption
branch. The main branch includes a mechanical switch, breaker impedance, and bidirectional
power electronics switches. In the fault-current-limiting branch, a fault-current-limiting circuit
is introduced which contains n numbers of bidirectional switches and current-limiting inductors,
which are connected in series to make the design modular in nature. During the normal working
stage, the current flows through the main branch of the breaker. Once a fault in the system
is confirmed, the fault current is transferred to the fault-current-limiting branch. At this stage,
the intensity of the fault current is reduced significantly using the fault-current-limiting circuit,
and finally, the residual current is shifted to the energy absorption branch. The working principle,
design considerations, and parametric analysis concerning the design of hybrid circuit breakers
are incorporated in this paper. The performance of the proposed breaker is evaluated using a
three-terminal voltage-source converter-based high-voltage direct current transmission network;
for this purpose, a PSCAD/EMTDC simulation tool is used. The performance of the proposed breaker
is also compared with other topologies. The comparative analysis shows that the proposed breaker is
a good alternative considering high fault current interruption requirements, response time against
fault current, and power losses.

Keywords: breakers; hybrid DC circuit breaker; fault current limiters; non-superconducting fault
current limiters; current-limiting inductors; voltage source converter

1. Introduction
Due to increased penetration of renewable energy into power grids, the VSC-HVDC transmission
projects have gained attention globally because the VSC-HVDC systems allow the independent control
of active and reactive power [1–5]. With the passage of time, the rating of VSC-HVDC projects has
increased; the details of HVDC projects in [6–8] strengthen this argument. The VSC-HVDC-based
transmission shows more vulnerability against frequently appearing L-G faults. The increased
ratings of VSC-HVDC networks demand the protection equipment with increased fault current
handling capabilities.

Energies 2019, 12, 2388; doi:10.3390/en12122388 www.mdpi.com/journal/energies

Energies 2019, 12, 2388 2 of 16

With an increased rating of VSC-HVDC network and vulnerability towards commonly appearing
L-G faults, the protection equipment is required to handle large fault current. In this context, the FCLs
are generally used and classified into two types: SFCLs and NSFCLs. The studies [9–12] contain some
examples under the umbrella of SFCLs; likewise, [13–15] present the examples of NSFCLs. The FCL of
both types can limit the fault current to some extent, but the fault current cannot be forced to zero or
isolated totally. Therefore, DCCBs are considered a reliable option to isolate the fault current. Generally,
DCCBs are divided into three major types: mechanical active and passive resonance circuit breakers,
solid-state circuit breakers (SSCB), and hybrid circuit breakers (HCBs) [16]. In 2012, a paradigm shift in
the high-voltage DCCBs area was observed with the introduction of HCBs [17,18]. Later on, in 2014,
another state-of-the-art HCB was introduced with experimental validation [19]. The [19] highlights
the comparative analysis of two important HCBs. Although HCBs possess good features in terms of
response time [17–19], they have limitations in handling large fault currents with increased voltage
ratings. Therefore, different researchers had used the breakers in a combination of FCLs to ensure the
safety, fault isolation capability, and increased fault current handling capacity as well [20,21].
In Reference [22], a compound current limiter and circuit breaker is introduced; likewise in
Reference [23], the new topology for HCBs is explained in detail. In Reference [24], the implantation
of breakers on a small scale is explained. The new designs of breakers placed between negative and
positive terminals of line, and multiterminals are explained in [25–27]. Some miscellaneous protection
schemes to protect the line against L-G faults using HCBs and other approaches are elucidated in [28,29].
In addition, some examples of SFCLs with DCCBs are given in [30,31], whereas the comprehensive
comparison between NSFCL and SFCL is given in [32].
The recent investigations in [20,21] explain the hybridization of NSFCL and DCCB; these two
examples are comprehensively elaborated here, because in the later stages, some results are reproduced
for comparative analysis. In Reference [20], three breakers were used; one was called MCB, and the
other two were named as BCBs. Apart from breakers, three CLIs were also used. The working
principle was explained as follows: during normal operation, the CLIs were connected in parallel
and thus the equivalent impedance was reduced. As a result, the on-state loss was reduced too.
In case of the fault, the CLIs were used in series and had included heavy impedance during the fault
current limitation stage. In this way, the intensity of the fault current was reduced. At the terminal
stage, the MOAs used in the MCB and BCBs were used to absorb the residual current. The BCBs
had ensured the parallel operation of current-limiting inductors during normal operating condition,
and series operation in faulty condition. In Reference [21], a hybrid current-limiting circuit breaker
for DC line was proposed which had two major components: energy-dissipating circuit and isolation
mechanism. The energy-dissipating circuit (contains) inductance, power electronics-based switches
(Thyristors), and energy-dissipating resistor. The working mechanism of the hybrid current-limiting
circuit breaker was simple: in case of a fault, the intensity of the fault current was suppressed by
employing current-limiting inductance, and then the main circuit was isolated using a mechanical
switch. Eventually, the residual current was dissipated by the MOA and resistor.
In this paper, an improved method is developed to limit the quantum of the fault current. Similar
tactics as of [20] are chosen to limit the fault current, but with significant modifications, to solve some
key issues. In the previous study, to achieve the fault-current-limiting operation, two additional
breakers (BCBs) were used to guarantee the series and parallel operation of the CLIs. These additional
breakers had significantly increased the cost. Moreover, the CLIs remained in the circuit during normal
operating condition, and as a result, the large size of inductors could result in more losses. However,
using the proposed FCLC, the CLIs are only used when fault current suppression is required, and this
is considered a major advantage. Thus, the use of large CLIs for high fault current handling is possible,
and parallel operation of CLIs is alleviated. Since no CLI is used during normal operation, power loss
in normal condition due to FCLC is zero. The schematic diagram of the proposed FCLC for DCCB
is shown in Figure 1, whereas Figure 2 contains the schematic diagram of the fault current limiter
discussed in [20]. In Figure 1, S1 , S2 , S3 . . . . . . Sn represent the bidirectional PE switches and L1 , L2 , L3
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The
Energies
The working principle
working
2019, 12, 2388
principle of
of proposed
proposed topology,
topology, analysis
analysis to
to determine
determine thethe size
size of
of CLIs,
CLIs, current
3 of in
current 16
in
different
different stages,
stages, and
and transient
transient overvoltage
overvoltage analysis
analysis are
are discussed
discussed inin Section
Section 22 of
of the
the paper.
paper. In
In Section
Section
3,
3, simulation
simulation results
results are
are presented
presented to
to verify
verify the
the theoretical
theoretical concepts.
concepts. Section
Section 4
4 contains
contains the
the
. . . . . . Ln represent the CLIs. By employing CLIs, the fault current can be reduced effectively; however,
comparative analysis of proposed solutions with other available topologies. Finally, in Section 5, the
the main branch of the breaker has to tolerate transient overvoltage. To rectify this issue, the conceptthe
comparative analysis of proposed solutions with other available topologies. Finally, in Section 5, of
conclusions
conclusions of
of the
the paper
paper are
are presented.
presented.
parallel arrester is used, and the details are charted in the subsequent part of this study.

S
S11 L
L11

S
S22 L
L22

S
S33 L
L33

S
Snn L
Lnn
Figure
Figure 1.
1. Proposed
Proposed FCLC
FCLC for
for DCCB used in
DCCB used in auxiliary
auxiliary branch
branch of
of breaker.
breaker.
breaker.

L
L11
MCB
MCB

BCB
BCB L
L22

BCB
BCB
L
L33
Figure 2. Fault-current-limiting circuit with MCB and BCB.
Figure
Figure 2.
2. Fault-current-limiting
Fault-current-limiting circuit
circuit with
with MCB
MCB and
and BCB.
BCB.
The working principle of proposed topology, analysis to determine the size of CLIs, current in
2.
2. Proposed
Proposed
different stages,Topology
Topology
and transient overvoltage analysis are discussed in Section 2 of the paper. In Section 3,
simulation results are presented to verify the theoretical concepts. Section 4 contains the comparative
2.1.
2.1. Working
Working Principle
Principlesolutions with other available topologies. Finally, in Section 5, the conclusions of
analysis of proposed
The
The proposed
the paper HCB
HCB with
are presented.
proposed with FCLC
FCLC contains
contains three
three branches:
branches: the
the main
main branch,
branch, auxiliary
auxiliary branch,
branch, and
and
energy
energy transfer branch, as shown in Figure 3. The main branch constitutes a mechanical switch called
transfer branch, as shown in Figure 3. The main branch constitutes a mechanical switch called
2.
UFD,Proposed Topology
UFD, and and bidirectional
bidirectional PEPE switches
switches composed
composed of of IGBTs,
IGBTs, also
also known
known as as LCS.
LCS. The
The proposed
proposed FCLC
FCLC to to
limit the
limitWorking fault
the fault current is placed in the auxiliary branch. The third branch of the
current is placed in the auxiliary branch. The third branch of the HCB is called the HCB is called the
2.1. Principle
energy
energy absorption
absorption branch,
branch, which
which consists
consists of of an
an MOA.
MOA. In In Figure
Figure 3,3, the
the value
value of
of CLR
CLR is is represented
represented by by
L b, which is called the breaker impedance. Although the design of the FCLC is modular in branch,
The proposed HCB with FCLC contains three branches: the main branch, auxiliary nature,
Lb, which is called the breaker impedance. Although the design of the FCLC is modular in nature,
and
threeenergy
three CLIs transfer
CLIs are
are branch,at
considered
considered atasthis
shown
this stage,
stage,in namely,
Figure 3.L
namely, LThe
1, L2,main
and branch
L3, and constitutes a mechanical
three bidirectional switch
PE switches
1, L2, and L3, and three bidirectional PE switches
called
composed UFD, ofand
IGBTsbidirectional
are named PE
as Sswitches
1, S2, and composed of IGBTs, also known as
composed of IGBTs are named as S1, S2, and S3. It must be noted that the CLIs are connected in series,
S 3. It must be noted that the CLIs are LCS. The
connected proposed
in series,
FCLC
and to
these limit
are the
not fault current
coupled is placed
magnetically.
and these are not coupled magnetically. in the auxiliary branch. The third branch of the HCB is called
the energy absorption branch, which consists of an MOA. In Figure 3, the value of CLR is represented
by Lb , which is called the breaker impedance. Although the design of the FCLC is modular in nature,
three CLIs are considered at this stage, namely, L1 , L2 , and L3 , and three bidirectional PE switches
composed of IGBTs are named as S1 , S2 , and S3 . It must be noted that the CLIs are connected in series,
and these are not coupled magnetically.
Energies 2019, 12, x 4 of 16
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Main Branch
Main Branch
UFD LCS
CLR UFD LCS
CLR Main Branch
Lb UFD LCS
CLR
Lb S1 L1 CLIs
S1 L1 CLIs
Lb
FCLC
Auxiliary Branch FCLC S12
S2
LL12
L2
CLIs
Auxiliary Branch
FCLC S23 LL23
Auxiliary Branch S3 L3

Energy Absorption MOA

MOA S3 L3
EnergyBranch
Absorption
Branch
Energy Absorption
MOA
Branch Figure 3. Proposed HCB with FCLC.
Figure 3. Proposed HCB with FCLC.
In order to understand the working principleHCB
Figure 3. Proposed of thewithproposed
FCLC. scheme and its contours, it is
In order to understand the working principle of the proposed scheme and its contours, it is
divided into four different working periods. The different operating periods with reference of time
dividedIn into four
In order different working periods. Theofdifferent operating periods
and itswith reference of time
are shown orderintoFigure
tounderstand
understand thethe
4. During working
t ≤ t1principle
0 ≤working principle
, normal the
ofproposed
current the scheme
proposed
flows through scheme
the whole contours,
and its it is divided
contours,
system includingit is
are
intoshown
four
divided in Figure
different 4.
working During
periods. 0 ≤ t ≤
Thet 1, different
normal current
operating flows through
periods with the whole
reference system
of time including
are shown
the maininto four of
branch different
the CB.workingThe path-I periods. The different
indicates the current operating
duringperiods with reference
this interval (see Figure of time
5a).
the
in
are main 4.
Figure
shown branch
in During
Figureof 0the
4.≤ CB.
t ≤
Duringt The
1 , normal
0 ≤path-I
t ≤ t , indicates
current
normal thethrough
flows
current current
flows during
the whole
through this interval
system
the whole (see Figure
including
system the 5a).
main
including
Normal current means the rated current of the system, defined according to design considerations.
1
Normal
branch ofcurrent
the CB.means the rated current of the system, defined according tointerval
design considerations.
the
At tmain
1, the branch
fault inThe
ofthe path-I
the CB.
systemindicates
The is path-I the indicates
suspected. current during
Afterthe this
faultinterval
thecurrent isduring (see
this
suspected, Figure 5a). (see
it usually Normal Figure
takes current
5a).
a few
At t
means 1, the
the fault
rated in the
current system
of the is suspected.
system, defined After the
according fault
to is
design suspected, it
considerations. usually
At t takes
, the a few
Normal
millisecondscurrent means the
to confirm. ratedthis
During current
time,ofthe thecurrent
system,continues
defined according to design
to flow through 1 branch in
fault
considerations.
the main of
milliseconds
the
At system isto confirm.
suspected. During
After this
the time,
fault is the current
suspected, continues
it usually to flow
takes a through
few the
millisecondsmain tobranch
confirm. of
the tCB
1, the
andfault in the
switches system
start to open is gradually.
suspected. The After the fault
direction is suspected,
of current flow duringit usually takesremains
this time a few
the CB and
During this switches startDuring
to continues
openthis gradually. theThe direction of current flow during this timebranch
remains
milliseconds
the same as time, ≤the
t ≤ current
ofto0confirm. t1. to flow
time, through
current the main
continues branch
to flowofthrough
the CB and the switches
main start of
to
the
opensame as
gradually.of 0 ≤ t
The ≤ t 1.
direction of current flow during this time remains
the CB and switches start to open gradually. The direction of current flow during this time remains the same as of 0 ≤ t ≤ t1 .
the same as of 0 ≤ t ≤ t1. Fault Current Handling Stages
Fault Current Handling Stages
Normal Working Suspect/
Normal Working Fault CurrentLimitation
Suspect/ Handling StagesClearance
Stage Confirmation Limitation Clearance
Stage
Normal Working Confirmation
Suspect/
0≤
0 ≤Stage≤ tt1
tt ≤ ≤ tt ≤
tt11 ≤ ≤ tt 2
Confirmation
≤ tt ≤
≤ tt 3
t Limitation
t 2 ≤ > tt 3
tt >
Clearance
1 2 2 3 3
0 ≤ t ≤ t1 t1 ≤ t ≤ t 2 t 2 ≤ t ≤ t3 t > t3
0 t1 t2 t3 t4
0 t1 t2 t3 t4
0 t1 Time Axis
t2 t3 t4
Time Axis
Figure 4. Different operating periods with fault current handling stages.
Figure 4.
Figure 4. Different operating Time
Different operating periods Axis
periods with fault
with fault current handling stages.

Once the
Once the fault in the
Figure 4. system
Differentisoperating
confirmed at
t2 ,tt22the
periods ,with
the switches associated
fault current handling with the
stages. main branch of
Once the fault
fault ininthe
thesystem
systemisisconfirmed
confirmedatat , theswitches
switches associated
associated with
withthethe
main branch
main of the
branch of
the
CB CBCB are
are are
opened opened and
andandthe thethe fault
faultfault current
current is directed
is directed to the to the
FCLC FCLC placed
placed in
in the the auxiliary
auxiliary branch
branch of
of the the
CB.
the Once opened
the fault in the system current
is is directed
confirmed at t to the
2, the
FCLC
switches placed in the
associated auxiliary
with the branch
main of the
branch of
CB. At
At this this
stage, stage, fault
fault fault
current current limitation
limitation operation
operation is achieved. is achieved. Figure
FigureFigure 5b
5b explainsexplains the
the current current flow
flow during
CB. At this stage, current limitation operation is achieved. 5b explains the current flow
tthe CB are
during t2 ≤ topened
2 ≤ t ≤t2t3≤. t After
during t3and
≤ t3. After
≤ t3. After
t3,the
, the the fault
switches
t3,current
the
current
switches
switchesin the is
in the
in the
directed
auxiliary
auxiliary
auxiliary
tobranch
branch the FCLC
branch are placedand
are opened
areopened
opened
in
and
and
the
the auxiliary
the residualbranch
theresidual
residual
of the
fault current
fault
fault
current
current
CB.
is At
is shiftedthis
shifted
shifted toto stage,
to thethe
the MOA. fault
MOA.
MOA. At At this
At this limitation
stage,
this stage, the
stage, the operation
fault
the fault current
fault current
current is isisachieved.
forced
is forced to
forced to Figure
zero
to zero 5b
and
zero and explains
isolated
and isolated the
from
isolated from current
from thethe flow
system.
the system.
system.
is
during t ≤ t ≤ t . After t , the switches in the auxiliary branch are opened and the residual fault current
The flow
The flow of
2 of current
current during
3 during this
3 this period
period isis elucidated
elucidated in in Figure 5c. 5c.
The flow of
is shifted to current
the MOA. duringAt thisthisstage,
period theis fault
elucidated
current inisFigure
Figure
forced5c.to zero and isolated from the system.
The flow of current during LCSthis period is elucidated in Figure 5c. LCS
CLR UFD LCS CLR UFD LCS
CLR UFD CLR UFD
Path-I LCS Path-II LCS
Path-I
CLR UFD CLR
Path-II UFD
FCLC FCLC
Path-I FCLC Path-II
FCLC
FCLC FCLC
MOA MOA
MOA MOA
(a) (b)
(a) MOA (b) MOA
Figure 5. Cont.
(a) (b)
 Energies
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UFD LCS
LCS
CLR
CLR UFD

Path-III
Path-III
FCLC
FCLC

MOA
MOA
(c)(c)
Figure
Figure 5.5.Flow
Flowofofcurrent
currentthrough
through different
different branches
branches ofofbreakers
breakers during
duringdifferent time
different timeintervals: (a)
intervals: (a)0 0≤ ≤t ≤t ≤t1t1
Figure 5. Flow of current through different branches of breakers during different time intervals:
and t 1 ≤ t ≤ t2 ; (b) t 2 ≤ t ≤ t 3; (c) t
and t1 ≤ t ≤ t2; (b) t2 ≤ t ≤ t3; (c) t > t3> t 3
(a) 0 ≤ t ≤ t1 and t1 ≤ t ≤ t2 ; (b) t2 ≤ t ≤ t3 ; (c) t > t3 .
2.2.
2.2.Determination
2.2. Determinationofof
Determination ofCurrent
Currentand
Current andSize
and Sizeofof
Size ofCurrent-Limiting
Current-LimitingInductors
Current-Limiting Inductors
Inductors
The
Thesize
sizeof ofbreaker
breakerimpedance
impedance(CLR/L (CLR/L b)b)and
andcurrent-limiting
current-limitinginductancesinductances(CLIs,(CLIs,LLL 1,1,LL
2, andandLLL 3)3
The size of breaker impedance (CLR/L b ) and current-limiting inductances (CLIs, 1 , L22,, and 3)
depends
dependson
depends on design
on design considerations
design considerations
considerationsor or the
orthe desired
thedesired requirements.
desiredrequirements.
requirements. The The equivalent
The equivalent circuit
equivalent circuit to
circuit to estimate
to estimate
estimate thethe
the
values
valuesof
values ofcurrent,
of current,CLR,
current, CLR,and
CLR, andCLIs
and CLIsisisisdivided
CLIs dividedinto
divided intotwo
into twoparts:
two parts:an
parts: anequivalent
an equivalentcircuit
equivalent circuitofof
circuit ofthethesystem
the systembefore
system before
before
the fault
the fault
the and
fault and an
and an equivalent
an equivalent circuit
equivalent circuit circuit ofof the
ofthe system
thesystem
systemafterafter the
afterthe fault.
thefault. The
fault. The equivalent
The equivalent circuits
circuitsfor
equivalent circuits forthe
for thetime
the time
time
intervals
intervals000≤≤≤t tt≤≤
intervals ≤t1t1and
andt1t≤11 ≤≤
1 and t t≤t≤t≤2tare
are
2t2 shown
areshown
shown ininin
Figure
Figure
Figure 6a,b,
6a,b,
6a,b,respectively.
respectively.The
respectively. Theinternal
The internalresistance
internal resistanceofof
resistance ofUFD
UFD
UFD
and
andLCS
and LCSis
LCS isisminimal,
minimal,
minimal, therefore,
therefore,
therefore, forfor
for simplicity,
simplicity,
simplicity, thesetheseare are
these areignored.
ignored. The The
ignored. Thesecond
second second equivalent
circuitcircuit
equivalent
equivalent circuit
is drawnisis
drawn
drawn
for for the
for the
the fault fault current
fault current
current limitation limitation
limitation stage
stage during during
stage theduring the
timethe time
t ≤time t ≤ t
t ≤ t 2 ≤and
2 ≤t
t ≤tis
3 and
3 and is
shown shown
is shown in Figure
in Figure
in Figure 6c. 6c.
6c.
2 3

LLb b LLb b

++ ++
IdcIdc=I=I1 1 I2I2
VVdcdc VVdcdc
-- --
(a)
(a) (b)
(b)

LLb b LL1 1 LL2 2 LL3 3

++ FCLC
FCLCInductances
Inductances
VVdcdc I3I3
--
(c)(c)
Figure
Figure 6. The simplified equivalent circuits in different working stages: (a)(a)
for normal working stage;
Figure6.6.The
Thesimplified
simplifiedequivalent
equivalentcircuits
circuitsinindifferent
differentworking
workingstages:
stages: (a)for
fornormal
normalworking
working
(b) for fault suspect/confirmation
stage; stage; (c) for fault current limitation stage.
stage;(b)
(b)for
forfault
faultsuspect/confirmation
suspect/confirmationstage;
stage;(c)(c)for
forfault
faultcurrent
currentlimitation
limitationstage.
stage.
During 0 ≤ t ≤ t1 , the value of the current increases from zero to the rated value. This rated value
During
During0 0≤ ≤t t≤ ≤t1t,1the
, thevalue
valueofofthe thecurrent
currentincreases
increasesfrom
fromzero
zerototothe
therated
ratedvalue.
value.This
Thisrated
ratedvalue
value
is considered as the line current which is predefined. The current during this period is defined by
isisconsidered
considered as the line current which is predefined. The current during this period is definedby
as the line current which is predefined. The current during this period is defined by
Equation (1). In Equation (1), Idc represents the rated value of the line current.
Equation
Equation(1).
(1).InInEquation
Equation(1), (1),IdcIdcrepresents
representsthe
therated
ratedvalue
valueofofthe
theline
linecurrent.
current.
IIIII I=
==IIdc
I dc
dc
(1)
(1)
(1)
Once
Oncethe
Once thefault
the faultin
fault inthe
in thesystem
the systemat
system attt2t2is
at isdetected,
2 is detected,ititittakes
detected, takesaaafew
takes fewmilliseconds
few millisecondstoto
milliseconds toconfirm
confirmthe
confirm theexistence
the existence
existence
of
ofthe
the fault.
fault. During
During this
this time, the current
current continues
continues toto flow
flow through
through the
the main
main
of the fault. During this time, the current continues to flow through the main branch of the CB, branch
branch of of
thethe
CB,CB,
andand
the
and
the quantum
quantum of the fault current in this interval is calculated using equivalent circuit
the quantum of the fault current in this interval is calculated using the equivalent circuit in Figure 6b.
of the fault current in this interval is calculated using the equivalent circuit in
in Figure
Figure 6b.
6b.
Energies 2019, 12, 2388 6 of 16

The current during t1 ≤ t ≤ t2 is calculated with the application of KVL and Laplace Transformation.
The final result is given obtained in the time domain, which is given by Equation (2).
!
Vdc
I2 = II + t (2)
Lb

In Equation (2), I1 is the constant which depends on the initial condition, Vdc is the rated line
voltage, and Lb represents the value of CLR. In Equation (2), the constant I1 is accessed by using
Equation (1). From Equation (2), an approximate value of Lb can be calculated, keeping in view the
maximum permissible range of fault current I2 , which is the peak value of the current the system
attains after fault detection. Once the fault is confirmed at t2 , the FCLC in the auxiliary branch is
activated. For this case, the equivalent circuit diagram is shown in Figure 6c. The following constraints
are considered for calculating the current during this period:

L1 = L2 = L3 = L (3)

Application of KVL for the circuit in Figure 6c results in the following equation:
! !
dI3 dI3
Vdc = Lb + 3L (4)
dt dt

or
dI3
Vdc = (L + 3L) (5)
dt b
Solving Equation (5) to get the current during the time t2 ≤ t ≤ t3 :

I2 Lr Vdc
I3 = + (t) (6)
Lb + 3L Lb + 3L
or
1
I3 = [I2 Lb + Vdc (t)] (7)
Lb + 3L
In Equation (7), the current I2 depends on the initial conditions. From Equation (3), it is obvious
that I2 is the maximum permitted current after fault detection. Since I3 represents the amount of
suppressed current, Equation (7) is used to estimate the values of inductances (L1 = L2 = L3 = L) used
during the fault current limitation stage. After the time t3 , the residual current I3 is transferred to
the energy absorption branch (i.e., MOA) and the fault current at this stage is converged to zero and
isolated from the system. The energy absorbed by the MOA at the final stage is calculated using the
following mathematical relationship [33]:
Z
E= V (t)I (t)dt (8)

In Equation (8), E represents the energy absorbed by the MOA, V(t) represents the voltage across
the MOA, and I(t) represents the current through the MOA. The graphical illustration of DC current
explaining the behavior of the current in different stages is highlighted in Figure 7. In Figure 7,
tfc represents fault clearance time, which is calculated as:

t f c = t4 − t2 (9)

Based on the above analysis, it can be concluded that the transfer of current from one branch of the
breaker to another branch at the switching instants t1 , t2 , t3 , and t4 depends on two factors: maximum
values of the current and time to attain it. In other words, it depends on rate of change of the current.
Energies 2019, 12, x 7 of 16

Energies 2019, 12, x 7 of 16

maximum values of the current and time to attain it. In other words, it depends on rate of change of
the current.
Energies 2019, 12, 2388 7 of 16
maximum values of the current and time to attain it. In other words, it depends on rate of change of
the current. Idc
Idc

I3
I2 I3
I1 I2 I4
I1 I4
t
1 tfc Main Brancht
10
1
tfc Control Signal
Main Branch
0 Auxiliary Branch
Control Signal
10 Control Signal

00 t1 t2 t3 t4Auxiliary Branch
Control Signal

0 t1 t2 t3 t4
Figure 7. The graphical illustration of estimated DC current with control signals.
Figure 7. The graphical illustration of estimated DC current with control signals.
Figure 7. The graphical illustration of estimated DC current with control signals.
2.3. Transient Overvoltage Analysis
2.3. Transient Overvoltage Analysis
2.3. Transient Overvoltage
By application Analysis
of FCLC in the auxiliary branch of the proposed HCB, the quantum of the fault
By application of FCLC in the auxiliary branch of the proposed HCB, the quantum of the fault
current can be reduced effectively. However, due to the use of FCLC in the auxiliary branch, the main
By application
current of FCLC
can be reduced in the auxiliary
effectively. However,branch due to ofthetheuseproposed
of FCLC in HCB,
the the quantum
auxiliary of the
branch, thefault
main
branch of the breaker has to sustain voltage overshoot for a brief time. To avoid this problem, the
current
branchcanof be
thereduced
breakereffectively. However,
has to sustain dueovershoot
voltage to the use of forFCLC in the
a brief auxiliary
time. branch,
To avoid thisthe main
problem,
protection scheme for the main branch is essential. In this context, several approaches are discussed
branch of the breaker
the protection schemehas to sustain
for the voltage
main branch overshootInfor
is essential. thisa context,
brief time. To avoid
several this problem,
approaches the
are discussed
in the literature. For example, in Reference [34], the concept of parallel MOA was used to guard PE
protection scheme For
in the literature. for the main branch
example, is essential.
in Reference [34], theIn concept
this context, severalMOA
of parallel approaches
was used areto
discussed
guard PE
switches against overvoltage; the schematic layout is shown in Figure 8, where Rs and Ls represent
inswitches
the literature.
against For example, inthe
overvoltage; Reference
schematic [34], the concept
layout is shown ofin
parallel
FigureMOA wasRused
8, where s andtoLsguard PE
represent
system resistance and inductance, respectively, Lp represents stray inductance that exists between
switches against overvoltage;
system resistance the schematic
and inductance, layoutLpisrepresents
respectively, shown in Figure 8, where Rthat
stray inductance s and Ls represent
exists between
IGBT switch and main arrester (MOAm), and Vdc represents the terminal DC voltage. The components
system resistance
IGBT switch and inductance,
and main arrester (MOA respectively,
m ), and V dcL represents
represents
p thestray inductance
terminal DC that
voltage. exists
The between
components
with dotted lines are used to protect the IGBT switch against overvoltage. A similar approach as
IGBT
withswitch
dottedand main
lines arearrester
used to(MOA m),the
protect andIGBT
Vdc represents the terminal
switch against DC voltage.
overvoltage. The components
A similar approach as
discussed in [34] was utilized to protect the switches in the main branch against transient overvoltage;
with dottedinlines
discussed [34] are
wasused to protect
utilized thethe
to protect IGBT switch
switches in against
the mainovervoltage.
branch againstA similar
transientapproach as
overvoltage;
the schematic layout is given in Figure 9.
discussed in [34]layout
the schematic was utilized
is giventoinprotect
Figurethe9. switches in the main branch against transient overvoltage;
the schematic layout is given in Figure 9.
Lp MOAm

Lp MOAm
L`p MOAov
Rs Ls L`p MOAov
+ Rs Ls
Vdc Vdc

+
-

-
Figure8.8.AAscheme
scheme forprotection
protectionofofPE
PEswitches
switchesagainst
againstovervoltage.
overvoltage.
Figure for

Figure 8. A scheme for protection of PE switches against overvoltage.

 Energies 2019, 12, x 8 of 16
Energies2019,
Energies 12,x2388
2019,12, 8 of1616
8 of

L`p MOAov
L`p MOAov
Lb
Lb Main Branch
+ Main Branch
+ FCLC

Vdc
FCLC

Vdc
- MOAm
- MOAm

Figure 9. Representing the protection approach for switches in main branch of the HCB with FCLC.
Figure 9. Representing the protection approach for switches in main branch of the HCB with FCLC.
Figure 9. Representing the protection approach for switches in main branch of the HCB with FCLC.
3. Results
3. Results and and Discussion
Discussion
3. Results and Discussion
The proposed
The proposed HCB HCB with
with FCLCFCLC is is tested
tested with
with aa three-terminal
three-terminal VSC-HVDC VSC-HVDC transmission
transmission system, system,
using The proposed
PSCAD/EMTDC HCB with FCLC
simulation is tested
tool. The with
VSC a
is three-terminal
based on
using PSCAD/EMTDC simulation tool. The VSC is based on a two-level converter with the standarda VSC-HVDC
two-level convertertransmission
with the system,
standard
using PSCAD/EMTDC
double-loop
double-loop control scheme
control simulation
scheme for each
for tool.
each The VSC
terminal.
terminal. is based
The
The schematic
schematicon alayout
two-level
layout of the
of converter
the system
system with with thethe placement
the standard
placement
double-loop
of HCB
of HCB is control
is elucidated
elucidated inscheme
inFigurefor
Figure10. each
10.The terminal.
Thedetails The schematic
detailsofofparameters
parametersfor layout
foreach of the
eachterminalsystem
terminalare with
are the
given
given ininplacement
Table-A1
Table A1 in
ofthe
inHCBthe is elucidated
Appendix in
[21]. Figure
The 10. The
details details
of of
parametersparameters
used for
for each
the
Appendix A [21]. The details of parameters used for the proposed HCB with FCLC for preliminary terminal
proposed are
HCB givenwithin Table-A1
FCLC for
insimulation
the Appendix
preliminary [21].
simulation The
analysisdetailsare of parameters
available in used
Table-A2 for
in the
the proposed
Appendix.
analysis are available in Table A2 in the Appendix A. To test the performance of the ToHCBtest with
the FCLC
performance for
preliminary
of the proposed
proposed HCB with simulation
HCB analysis
with
FCLC, FCLC,
the are the
L-G available
faultL-G in Table-A2
on fault
cable on
12 cable in
12 the
is introduced. Appendix.
is introduced.
The proposed To
Thetest the performance
proposed
breaker tobreaker
limit andto
ofisolate
the and
limit proposed
isolate HCB
the with
fault FCLC,
current the
is L-G fault
commissioned on cable
on 12
either is
sideintroduced.
of the
the fault current is commissioned on either side of the transmission line. The overall response The
transmissionproposed line. breaker
The to
overall
limit
DC and isolate
response
current DCwith thethefault
current withcurrent
placement is the
of commissioned
the placement on either
of the breaker
proposed proposed side of in
is breaker
shown the transmission
isFigure
shown in Figure
11. line.11.
It must The
be overall
It must
noted be
that
response
noted
the thatDCthe
performance current with
performance
of the theofplacement
proposed theHCB is of
proposed the
HCB
analyzed proposed 200 breaker
is analyzed
for kV voltagefor is
200shown in Figure
kV voltage
level. This level.
voltage 11.This
It must
level be
voltage
is used
noted
level that
is the
used performance
in various of the
real-world proposed
projects; HCB
for is analyzed
example, the for 200
Zhoushan
in various real-world projects; for example, the Zhoushan five-terminal VSC-HVDC project in China is kV voltage level.
five-terminal This voltage
VSC-HVDC
level
projectis used
designed infor in
200various
China kV real-world
is designed
voltage for 200
level. projects;
Thus kVthe for example,
voltage
simulationlevel.results
Thusthe provide
Zhoushan
the simulation five-terminal
a good results
assessment VSC-HVDC
provide a good
considering
project
assessment
the in China
real-world is designed
considering
applications the and for operating
200 kVapplications
real-world voltage level.
conditions. andThus the simulation
operating conditions. results provide a good
assessment considering the real-world applications and operating conditions.
Rectifier Line-12 Inverter
Phase Reactor
Rectifier Line-12 Inverter
Phase Reactor
Phase Reactor Phase Reactor
Bus-I

Bus-II
Bus-I

AC-Grid I
Bus-II

AC Grid II
AC-Grid I VSC-I Line-12 VSC-II
Breaker

AC Grid II
VSC-I Line-12 VSC-II
Breaker

Line-13 Inverter
Line-13 Inverter
Bus-III

Phase Reactor
Bus-III

Phase Reactor

Line-13 AC Grid III

Line-13
VSC-III AC Grid III
Energies 2019, 12, x 9 of 16
VSC-III
Figure 10. Three-terminal VSC-HVDC system.
Figure 10. Three-terminal VSC-HVDC system.
The details of the events for the particular result are as follows. From 0 to 0.2 s, the system is
I2 I1 Normal operating region
The details
allowed of the
to operate events for
in normal the particular
or steady-state result are
condition. as follows.
During From
this time, the0system
to 0.2 s,carries
the system
the ratedis
I3
allowed to operate
DC current, whichinisnormal
definedorassteady-state
0.5 kA. At 0.2condition.
s (say, t1),During
the L-Gthis time,
fault is the system
introduced carries
on
Fault suspect/conformation
the
cable 12. rated
It can
I2 Stage
DCbe current,
observedwhich from is
thedefined as Figure
result in 0.5 kA.11 Atthat
0.2 sthe
(say, t1),current
fault the L-Gincreases
fault is introduced
with a high onrate,
cable
and12.atIt0.202
can
be observed
s (say, from
t2), the thecurrent
fault result inreaches
Figure the
11 that
levelthe
offault current increases
approximately with a high
4 kA. During this rate, and at
interval, the0.202
fault
s current
(say, t2),isthe fault to
allowed current reachesthe
flow though themain
levelbranch ofI4the breaker.
of approximately I4
3 kA.
FaultDuring this region
current limiting interval, the fault
I1
current is allowed to flow though the main branch of the breaker.
I4 Fault current isolation region

Figure 11. Overall response DC current.

Figure 11. Overall response DC current.

At 0.202 s, the fault in the system is considered confirmed, and the fault-current-limiting
operation begins, by opening the switches in the main branch and closing the switches in the FCLC
(in auxiliary branch). The FCLC remains alive for 3 milliseconds and the fault current first drops
sharply and then at 0.205 s, it reaches the value of less than 3 kA. In this way, by employing the FCLC,
 At 0.202 s, the fault in the system is considered confirmed, and the fault-current-limiting
operation begins, by opening the switches in the main branch and closing the switches in the FCLC
(in auxiliary branch). The FCLC remains alive for 3 milliseconds and the fault current first drops
sharply and then at 0.205 s, it reaches the value of less than 3 kA. In this way, by employing the FCLC,
Energies 2019, 12, 2388 9 of 16
the fault current is reduced significantly. After 0.205 s (say, t3), the switches in the FCLC are opened
and the residual current is shifted to the MOA, and at the instant t4, the fault current is fully isolated
fromThe the details
system.of the events for the particular result are as follows. From 0 to 0.2 s, the system is
allowedThetosupplementary
operate in normal results include the condition.
or steady-state current though During thethis
main branch,
time, auxiliary
the system branch,
carries and
the rated
energy absorption branch of the breaker; these results are shown in Figure
DC current, which is defined as 0.5 kA. At 0.2 s (say, t1 ), the L-G fault is introduced on cable 12. It can 12a–c, respectively. These
results
be segregate
observed response
from the result of the11
in Figure DC thatcurrent during
the fault currentdifferent
increases intervals. For example,
with a high rate, and in Figure
at 0.202 s
12a, tthe
(say, 2 ), current
the fault through
current the
reachesLCSthe is outlined,
level of which
approximately shows 4 that
kA. from
During 0 to
this 0.202 s,
interval, the
thecurrent
fault flows
current
through
is allowed the tomain
flow branch,
though the andmain
at 0.202 s, theofswitches
branch the breaker.open completely and the current drops to zero.
Likewise,
At 0.202 from Figure
s, the fault12b, it can
in the be observed
system is considered that confirmed,
the FCLC remains inactive until 0.202 s,operation
and the fault-current-limiting and after
that, the fault-current-limiting operation begins, and due to the three
begins, by opening the switches in the main branch and closing the switches in the FCLC (in auxiliary CLIs, the current in this branch
is restricted
branch). Theto 1.5 kA
FCLC (approximately).
remains At 0.205 s, the
alive for 3 milliseconds andswitches
the faultincurrent
the FCLCfirst open
dropsand the current
sharply and then in
the0.205
at branch s, it is dropped
reaches the to zero.ofRight
value less thanafter3 0.205
kA. Ins,this
the way,
residual current is shifted
by employing the FCLC, to the
theMOA, which
fault current
is reduced
shown insignificantly.
Figure 12c. After 0.205 s (say, t3 ), the switches in the FCLC are opened and the residual
currentFurthermore,
is shifted tothe the result
MOA, in andFigure
at the 13a
instantrepresents the current
t4 , the fault voltage isacross the circuit
fully isolated from breaker. It is
the system.
important to note that allresults
The supplementary branches in thethe
include circuit breaker
current thoughare connected in parallel,
the main branch, so the branch,
auxiliary voltage
across
and themabsorption
energy is the same. To avoid
branch of the voltage
breaker; overshoot acrossare
these results theshown
main branch
in Figure of 12a–c,
the circuit breaker,
respectively.
due toresults
These parasitic inductance
segregate the and CLIs in
response of the
theauxiliary
DC current branchduring of the breaker,
different an MOA For
intervals. of larger
example,size
(MOA ) is used with the main branch of the breaker, as discussed
in Figure 12a, the current through the LCS is outlined, which shows that from 0 to 0.202 s, the current
ov in [34]. This MOA shares some
part ofthrough
flows the energy in thebranch,
the main fault current
and atlimitation
0.202 s, thestage and also
switches openresists the voltage
completely and the overshoot
current across
drops
thezero.
to mainLikewise,
branch offrom the breaker in order
Figure 12b, to be
it can reduce the quantum
observed that the of the fault
FCLC remainscurrent. Fromuntil
inactive Figure
0.20213a,s,
it can be noted that the voltage overshoot is observed twice, first
and after that, the fault-current-limiting operation begins, and due to the three CLIs, the current in when the fault-current-limiting
operation
this branchbegins at 0.202
is restricted to s,
1.5and
kA secondly at 0.205 At
(approximately). s, when
0.205 s, the theresidual
switches current
in the is transferred
FCLC open and to the
the
MOA. Figure 13b,c show energy absorbed by overvoltage arrester
current in the branch is dropped to zero. Right after 0.205 s, the residual current is shifted to the MOA, (MOA ov) and main arrester
(MOAis
which m),shown
respectively.
in Figure 12c.

0
0.2 0.201 0.202 0.203
Time [sec]

(a) (b) (c)

Figure 12.Current
Figure 12. Currentthrough different
through branches
different of breaker:
branches (a) main
of breaker: (a) branch; (b) FCLC
main branch; (b)(auxiliary branch);
FCLC (auxiliary
(c) MOAm
branch); . MOAm.
(c)

Furthermore, the result in Figure 13a represents the voltage across the circuit breaker. It is
important to note that all branches in the circuit breaker are connected in parallel, so the voltage across
them is the same. To avoid voltage overshoot across the main branch of the circuit breaker, due to
parasitic inductance and CLIs in the auxiliary branch of the breaker, an MOA of larger size (MOAov )
is used with the main branch of the breaker, as discussed in [34]. This MOA shares some part of the
energy in the fault current limitation stage and also resists the voltage overshoot across the main branch
of the breaker in order to reduce the quantum of the fault current. From Figure 13a, it can be noted
that the voltage overshoot is observed twice, first when the fault-current-limiting operation begins
at 0.202 s, and secondly at 0.205 s, when the residual current is transferred to the MOA. Figure 13b,c
show energy absorbed by overvoltage arrester (MOAov ) and main arrester (MOAm ), respectively.
Energies 2019, 12, x 10 of 16

Energies 2019, 12, x 10 of 16

Energies 2019, 12, 2388 10 of 16

Energies 2019, 12, x 10 of 16

[MJ][MJ]

Energy [MJ]
[kV] [kV]

[MJ] [MJ]
Energy
Voltage

EnergyEnergy

EnergyEnergy
VoltageVoltage

[MJ]
[kV]

(a) (b) (c)

(a) (b) (c)
Figure 13. Miscellaneous results: (a) voltage across breaker; (b) energy absorbed by MOAov; (c) energy
absorbed
Figure 13.by MOAm.
Miscellaneous results: (a) voltage across
(a) (b) breaker; (b) energy absorbed by MOA(c)ov; (c) energy
absorbed by MOAm.
Moving
Figure forward,
Figure13.
13. the impact
Miscellaneous
Miscellaneous results:of
results: (a)varying
(a) voltage the
voltageacrossvalues
across of (b)
breaker;
breaker; current-limiting
(b)energy
energyabsorbedinductances
absorbedby
byMOA
MOAovov;;(c)(Lenergy
(c) 1 = L2 = L3 =
energy
L) in absorbed
the FCLC
Moving by MOAmm.the impact of varying the values of current-limiting inductances (Lshows
by is
MOA
absorbedforward,also observed,
. keeping all other parameters unchanged, and Figure 14 1 = L2 = the
L3 =
overall
L) in the response
FCLC isofalso the DC current.keeping
observed, It is observed from
all other the resultsunchanged,
parameters that the larger andvalues
Figureof14 inductances
shows the
lower Moving
the
Moving rate forward,
of
forward, the
increase impact
of
the the
impact of of
varying
current and
varying the
alsovalues
improve
the of current-limiting
values the
of fault inductances
clearance
current-limiting time (Lt1fc).=In
(i.e.,
inductances (L == LL23==LL)
L21addition, 3=
overall response of the DC current. It is observed from the results that the larger values of inductances
in
the the
peakFCLC
L) in the value is also
of observed,
the current keeping
during all
the other
fault parameters
current unchanged,
limitation stage and Figure
reduces 14
with shows
larger the
L. overall
Figure
lower the FCLC
rate ofis also observed,
increase keeping
of the current andall other
also parameters
improve unchanged,
the fault clearance timeand Figure
(i.e., tfc).14 Inshows
addition, the
response
15a,b show of the
the DC current. It isenergy
observed from the results that the larger values of inductances lower
overall
the peak value corresponding
response ofofthe
thecurrent
DC current.
during It isabsorbed
observed
the by
fault current overvoltage
from the results
limitation arrester
that
stage the (MOA ) and
largerovwith
reduces values main L.arrester
of inductances
larger Figure
the
(MOA rate
lower ),of
mthe
increase
respectively.
rate of The
theofquantified
current anddataalso improve
andofalso
system the the
responsefault clearance
under varyingtime (i.e.,
values tfcof
t).fcmain
LIn is addition,
given in
15a,b show theofcorresponding
increase theenergy
current absorbed improve
by overvoltage fault clearance
arrester (MOA timeov)(i.e.,
and ). In addition,
arrester
the
Tablepeak
1.
the peak value of the current
value of the current during the
during the fault current limitation stage reduces with larger L. Figure 15a,b
(MOA m), respectively. The quantified datafault currentresponse
of system limitation stagevarying
under reducesvalues
with larger
of L is L. Figure
given in
show
15a,btheshowcorresponding energy absorbed
the corresponding by overvoltage
energy absorbed arrester (MOA
by overvoltage ov ) (MOA
arrester and main arrester (MOAm ),
ov) and main arrester
Table 1.
respectively. The quantified
(MOAm), respectively. data of system
The quantified data response
of systemunder
responsevarying
under values
varyingof L values
is givenofinL Table is given 1. in
Table 1.
Current
Current [kA] [kA][kA]
Current

Figure 14. The influene of L on overall DC current.

Figure 14. The influene of L on overall DC current.
Figure 14. The influene of L on overall DC current.
0.6
Figure 14. The influene of L on0.06
L=100 mH L=100 mH
0.6 overall DC current.
L=100mH
mH 0.06 L=100mH
L=150 mH
Energy [MJ]

L=150
Energy [MJ]

0.4
0.04
0.6 L=150mH
mH
[MJ] [MJ]

L=150mH
mH
[MJ] [MJ]

0.4 L=200 L=200

L=100 mH 0.06
0.04 L=100 mH
Energy Energy

L=200mH
mH
EnergyEnergy

0.2 L=200mH
L=250 mH 0.02 L=250
L=150 mH L=150 mH
0.4
0.2 0.04
0.02 L=250mH
L=300 mH
L=250mH
L=300 mH
L=200 mH L=200 mH
0
0 0.2045 0.205 0.2055 0.206 0.2065 0.207 L=300 mH
0.202 0.203 0.204 0.205 0.206 L=300 mH
0.2 L=250 mH 0.02
0 Time [sec] L=250 mH
0 Time [sec] 0.2045 0.205 0.2055 0.206 0.2065 0.207
0.202 0.203 0.204 0.205 0.206
L=300 mH
Time [sec] L=300 mH
Time [sec]
(a) 0 (b)
0 0.2045 0.205 0.2055 0.206 0.2065 0.207
0.202 0.203 0.204 0.205 0.206
(a)absorbed by arrester under different
different values of L:
values of Time
L: (a) [sec]
(b) ov
MOA
Figure 15. Time
Energy
[sec] (a) MOA m.
ov; (b) MOAm.

Figure 15. Energy absorbed by arrester under different values of L: (a) MOAov; (b) MOAm.
(a) (b)

Figure 15. Energy absorbed by arrester under different values of L: (a) MOAov; (b) MOAm.
Energies 2019, 12, 2388 11 of 16
Energies 2019, 12, x 11 of 16

Table 1. Repressing the statistical details of

Table 1. of system
system response
response under
under varying
varying values
values of
of L.
L.

Fault Peak
PeakCurrent
Currentin
inFault
Fault Energy
Size of L Size
Fault
of Clearance Energy Absorbed Energy Absorbed
Energy Absorbed
Clearance Current Limitation Stage
Current Limitation Absorbed by
(mH) L (mH) Time (ms) by MOAov (MJ)by MOAm by(MJ)
MOAm (MJ)
Time (ms) (kA)(kA)
Stage MOAov (MJ)
100 100 3.25 3.25 1.40
1.40 0.43060.4306 0.052 0.052
150 150 3.15 3.15 1.00
1.00 0.45580.4558 0.024 0.024
200 200 3.11 3.11 0.76
0.76 0.47050.4705 0.014 0.014
250 250 3.08 3.08 0.62
0.62 0.48100.4810 0.009 0.009
300 300 3.05 3.05 0.52
0.52 0.48810.4881 0.006 0.006

4. Comparative
4. Comparative Analysis of Proposed
Analysis of Proposed Breaker
Breaker and
and Other
Other Topologies
Topologies
So far,
So far, the
the critical
criticalresults
resultsofofthe theproposed
proposed HCB HCB with
withFCLCFCLCunder various
under conditions
various have have
conditions been
discussed.
been In this
discussed. In segment
this segment of the paper,
of the paper,thethe performance
performance of ofthetheproposed
proposedHCB HCBwithwith FCLC
FCLC is is
compared with other solutions to evaluate the effectiveness and competitiveness.
compared with other solutions to evaluate the effectiveness and competitiveness. For this purpose, For this purpose, a
three-terminal VSC-HVDC model is used, with the same parameters
a three-terminal VSC-HVDC model is used, with the same parameters discussed in Table A1 in the discussed in Table A1 in the
Appendix.A.
Appendix The designs
The designs of of
thethe proposed
proposed FCLCFCLC and andcurrent-limiting
current-limiting breaker
breakerin in
[20]
[20]areare
modular
modular in
nature, therefore the number of CLIs can be changed according to
in nature, therefore the number of CLIs can be changed according to requirements; for compression requirements; for compression
purpose, one
purpose, one CLR
CLR andand three
three CLIsCLIs areare used.
used. TheThe details
details ofof breaker
breaker parameters
parameters used used forfor compression
compression
purpose are
purpose are the
the same
same as as in
in Table
TableA2 A2in inthe
theAppendix
Appendix.A.
The results presented in Figure
The results presented in Figure 16 signify the16 signify the DC
DC current
current flowing
flowing through
through the the systems
systems for for three
three
different cases.
different cases. The
Theresults
resultsin inFigure
Figure17 17show
showthe theresponse
responseofof voltage
voltage across
across thethe breaker,
breaker, andand Figure
Figure 18
18 shows the power absorbed by the main arrester for different solutions.
shows the power absorbed by the main arrester for different solutions. The details of the results The details of the results
discussed ininFigure
discussed Figure 16 16
are are as follows:
as follows: at 0.2at s, a0.2 s, in
fault a the
faultsystem
in theis introduced,
system is introduced, and for 2
and for 2 milliseconds,
milliseconds,
the the current
current is allowed is allowed
to flow through to the
flow through
main branch theofmain branch
breaker of breaker
discussed discussed
in [18,20] in [18,20]
and proposed
and proposed scheme. It is observable that during this time, the rate
scheme. It is observable that during this time, the rate of increase of the current and maximum valueof increase of the current and
maximum value of current for [18] and the proposed scheme is the
of current for [18] and the proposed scheme is the same. However, in the same interval, the rate of same. However, in the same
interval, of
increase thetherate of current
fault increaseisof thefor
less fault current isdiscussed
the solution less for the solution
in [20], and thediscussed
maximum in [20],
value and the
of the
maximum value of the current is also a bit lower. Because the CLIs are used
current is also a bit lower. Because the CLIs are used in parallel even in normal condition, they resist in parallel even in normal
condition,
the they resistinthe
steep increment thesteep
fault increment
current during in thefault
faultconfirmation
current during stage.fault confirmation stage.

Figure The
16. The
Figure 16. response
response of DC
of DC current
current flowing
flowing through
through the system
the system under
under the the influence
influence of
of different
different
solutions.solutions.
Energies 2019, 12, x 12 of 16
Energies 2019, 12, 2388 12 of 16
Energies 2019, 12, x 12 of 16

Figure 17. Voltage across the breaker under influence of different solutions.
Figure 17.
Figure Voltage across
17. Voltage across the
the breaker
breaker under
under influence
influence of
of different
different solutions.
solutions.

Figure
Figure 18. Power absorbed
18. Power absorbed by
by main
main MOA
MOA under
under different
different solutions.
solutions.
Figure 18. Power absorbed by main MOA under different solutions.
The fault-current-limiting operation is applied for 3 milliseconds. During the fault current
The fault-current-limiting operation is applied for 3 milliseconds. During the fault current
limitation stage, the current startsoperation
The fault-current-limiting to flow through is appliedthe auxiliary branch of theDuring breaker the in [18,20] and the
limitation stage, the current starts to flow through thefor 3 milliseconds.
auxiliary branch of the breaker fault
in current
[18,20] and
proposed
limitation scheme.
stage, Since
the current the design
starts of the
to flow breaker
through in [18] has no
theinauxiliarycapacity
branch to limit
of the the fault current, during
the proposed scheme. Since the design of the breaker [18] has no capacity to breaker
limit thein [18,20]
fault and
current,
this
the interval, the
proposed current
scheme. continues
Since the design to increase and reaches
of the breaker in [18] the
has peak
no value of
capacity to 8limit
kA (approximately).
during this interval, the current continues to increase and reaches the peak the faultof
value current,
8 kA
For [20],this
during during this time,
interval, the
the during intensity
current of the faultincrease
continues current isand firstreaches
reducedthe andpeak then increased of to the
(approximately). For [20], this time, the to intensity of the fault current value and
is first reduced 8then
kA
level of 2
(approximately).kA (approximately).
For [20], duringIn the proposed
this time, the In scheme,
intensity the FCLC is
of the fault employed
current in the auxiliary
is firstisreduced branch,
andinthen
increased to the level of 2 kA (approximately). the proposed scheme, the FCLC employed the
and thus the the
increased fault current is first dropped and then increased toscheme,
1.4 kA (approximately).
auxiliary to branch, level and of 2thus
kA (approximately).
the fault current In the proposed
is first dropped andthe thenFCLC is employed
increased to 1.4 in the
kA
The details
auxiliary branch, of and
results thusconcerning
the fault voltage
current across
is the breaker
first dropped inand
Figure then 17 is as follows.
increased to From
1.4 kA 0
(approximately).
to 0.2 s, the voltage across the breaker is zero for all cases because during this time, the system is
(approximately).
The details of results concerning voltage across the breaker in Figure 17 is as follows. From 0 to
operating in normal condition. At 0.2 s, a fault in the system isinintroduced forasthe proposed HCB,
0.2 s,The thedetails
voltage of across
results concerning
the breaker voltage
is zero across
for all the casesbreaker
because Figure
during17this is follows.
time, the From
system 0 to
is
and
0.2 [18]
s, the the voltage
voltage remains
across the zero
breakeruntil is 0.202
zero s,
for because
all casesfor 2 ms
because after the
during introduction
this time, theof the
system fault,
is
operating in normal condition. At 0.2 s, a fault in the system is introduced for the proposed HCB, and
the currentincontinues
operating normal to flow through
condition. s,the
At 0.20.202 maininbranch
a fault the system of theisbreaker.
introduced For for
Reference
the proposed[20], the voltage
[18] the voltage remains zero until s, because for 2 ms after the introduction of theHCB, fault,andthe
across
[18] the the breaker
voltage is
remains also observed
zero until during
0.202 s, fault
because confirmation
for 2 ms stage
after due
the to the
introduction use of
of parallel
the fault,CLIs.
the
current continues to flow through the main branch of the breaker. For Reference [20], the voltage
At 0.202 continues
current s, the faulttocurrent limitation
flowobserved
through thestarts;
main the transient
branch voltage
of the overshoot
breaker. For is large for Reference [20],
across the breaker is also during fault confirmation stage due toReference
the use of [20], paralleltheCLIs.
voltage At
however,
across it can be compensated using capacitors in parallel with BCBs. For the proposed HCB with
0.202 s,the thebreaker
fault currentis also limitation
observed during starts; the fault confirmation
transient voltagestage due to the
overshoot use of
is large forparallel
Reference CLIs. At
[20],
FCLC,
0.202 s,thetheittransient
fault voltage
current overshoot
limitation is controlled
starts; the transient usingvoltage
the concept of parallel
overshoot arresters
is large as mentioned
for Reference [20],
however, can be compensated using capacitors in parallel with BCBs. For the proposed HCB with
in [34].
however, The voltage across the breaker discussed in [18] remains zero during the fault-current-limiting
FCLC, theit can be compensated
transient using capacitors
voltage overshoot is controlledin parallelusing with
theBCBs.
concept For the proposed
of parallel HCB with
arresters as
stage
FCLC, because
the in no fault-current-limiting
transient voltage component is used. The the
second voltage overshoot is observed
mentioned [34]. The voltageovershoot
across theisbreaker controlled using
discussed in [18] concept
remains ofzeroparallel
during arresters
the fault- as
when
mentionedthe currentin [34]. is shifted
The becauseto theacross
voltage main MOA at the final
the breaker stage. From
discussed in [18]Figure
remains 17, it canduringbe observedfault- that
current-limiting stage no fault-current-limiting component is used.zero The secondthe voltage
during this stage,stage
current-limiting voltage acrossno
because thefault-current-limiting
proposed HCB is better than the other
component two The cases.second
The results in
overshoot is observed when the current is shifted to the main MOA atisthe used.
final stage. Fromvoltage
Figure
Figure
overshoot 18 show the power absorbed by the main arrester under different causes, and it is clear that
17, it can beisobservedobservedthat when the current
during this stage, is shifted
voltagetoacross the main MOA at the
the proposed HCB final stage.than
is better From theFigure
other
the
17, main arrester in the proposed HCB absorbs the energy less than the others. The performance
twoitcases.
can beThe observed
resultsthat during18
in Figure this stage,
show thevoltage
poweracross absorbedthe proposed
by the main HCBarrester
is betterunderthan the other
different
evaluation
two cases. charts in Tables 2 and 183 summarize the details of comparative analysis.
causes, andThe it isresults
clear that in Figure
the mainshow arrester theinpower absorbed
the proposed by the
HCB main
absorbs arrester
the energy under
less different
than the
causes, and it is clear that the main arrester in the proposed HCB absorbs the energy less than the
Energies 2019, 12, 2388 13 of 16

Table 2. Performance evaluation chart for normal and fault suspect/confirmation stage.

Current in Normal Working Stage Current in Fault Suspect/Confirmation Stage

Schemes
I1 (max) [kA] I2 (max) [kA] Time to Attain [ms]
[18] 0.5 3.8 2
[20] 0.5 3.2 2
Proposed 0.5 3.2 2

Table 3. Performance evaluation chart for fault current limitation and clearance stage.

Current in Limitation Stage Clearance Stage

Schemes Time to Energy Absorbed by Clearance Attained
I3 (max) [kA]
Attain [ms] MOA [MJ] [ms]
[18] 8.25 3 1.78 3.8
[20] 2.04 3 0.76 4.8
Proposed 1.40 3 0.05 3.8

From the details of the performance evaluation charts in Tables 2 and 3, it is established that the
proposed HCB with FCLC can prove to be a good alternative to limit and isolate the fault current in
VSC-HVDC transmission systems.

5. Conclusions
A novel topology of HCB is proposed in this paper, with additional characteristics to limit the
fault current. The main branch of the breaker is constituted by using UFD and IGBT switches, as used
in several other topologies discussed in the literature. In the auxiliary branch, a new circuit named
FCLC is introduced. During the fault current suppression stage, the intensity of the fault current is
reduced by using FCLC. The reduction in the fault current can cause transient voltage overshoot, which
is reduced by using a parallel asserter in the main branch. During fault current limitation, a portion of
energy is absorbed by the asserter used for overvoltage protection, thus the requirement for the main
asserter is also reduced. The values of CLR and inductances in FCLC can be designed by considering
the following aspects: cost, the maximum permissible range of fault current, the required level of fault
current suppression, and fault clearance time. A larger size of CLI can reduce the fault current more
quickly, but it also causes transient voltage overshoot; consequently, the requirement for protection
equipment in the main branch of the breaker also increases, thus a smaller size of CLI is recommended.
The simulation results for different case studies and comprehensive comparative analysis indicate that
the proposed HCB with FCLC can prove to be a good alternative to limit and isolate the fault current
with reasonable efficiency.

Author Contributions: The author M.A. presented the core idea of this paper. Furthermore, he had done the
numerical analysis and all simulation-based experiments. W.Z. suggested the pertinent literature for review and
supervised the whole process of write-up.
Funding: Authors would like to acknowledge the following agencies for their support: Project Supported by
National Key R&D Program of China (2018YFB0904600); and Special Funding of Technical Standard of Shanghai
Science and Technology Commission (18DZ2205700).
Conflicts of Interest: The authors declare no conflict of interest.
Energies 2019, 12, 2388 14 of 16

Abbreviations
BCCB Branch circuit breaker LCC Line-commutated converters
CLR Current-limiting reactance LCS Load commutation switch
CLIs Current-limiting inductors L-G Line-to-ground
CB Circuit breaker MOA Metal oxide arrester
DC Direct current MCB Main circuit breaker
DCCB Direct current circuit breaker ms Milliseconds
FCLC Fault-current-limiting circuit MJ Megajoule
FCL Fault current limiters NSFCLs Non-superconducting FCL
HVDC High-voltage direct current PE Power electronics
HVAC High-voltage alternating current SFCLs Superconducting FCL
HCB Hybrid circuit breaker VSC Voltage source converter

Appendix A
Table A1. Three-terminal VSC-HVDC parameters.

Parameters Values
DC voltage Vdn ±200 kV
DC link parameters DC current Idn 0.5 kA
DC link capacitor 300 µF
Terminal-1 (P1 ) 0 MW
Active power Terminal-2 (P2 ) +200 MW
Terminal-3 (P3 ) −200 MW
Length of cable 12 200 km
Length of cable 13 100 km
DC line parameters
Resistance per unit length (R) 0.035 Ω/kM
Inductance per unit length (L) 0.156 mH/kM
Grid-1 voltage 420 kV
AC grid Grid-2 voltage 500 kV
Grid-3 voltage 420 kV

Table A2. Proposed HCB with FCLC parameters.

Parameters Values
CLR Lb 38.4 mH
Inductor-1 L1 100 mH
CLIs Inductor-2 L2 100 mH
Inductor-3 L3 100 mH
Parasitic inductance L’p 2 µH

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