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BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, Pilani

Pilani Campus
AUGS/ AGSR Division

SECOND SEMESTER 2018-19


COURSE HANDOUT
Date: 07.01.2019

In addition to part I (General Handout for all courses appended to the Time table) this portion gives further
specific details regarding the course.

Course No : EEE/INSTR/CS F241


Course Title : CS/EEE/INSTR F241 Microprocessor Programming & Interfacing
Instructor-in-Charge : Dr. Nitin Chaturvedi
Instructor : Prof. J P Mishra, Dr. Vinay Chamola, Dr. Meetha Shenoy, Dr. Puneet
Mishra, Dr. Pramila, G S Sesha Chalapathi, Devesh Samaiya
Practical Instructors : Rahul Sharma, Pramila Mahala, Tejasvi Alladi, Poonam Poonia, Anuj Ojha,
Tulsi Ram Sharma, Punit Khatri, Krishna Veer singh, Ziyaur Rahman,
Aukaran khanna

1. Course Description:

This course is a basic introduction to processor ISA, Assembly programming, Computer & Embedded
Architecture. Intel 80x86 is used as a platform through the course. 8086 - 80486 Programmers model of
processor, processor architecture; Instruction set, modular assembly programming using subroutines,
macros etc.; Timing diagrams; Concept of interrupts: hardware & software interrupts, Interrupt handling
techniques, Interrupt controllers. Types of Memory & memory interfacing. Programmable Peripheral
devices and I/O Interfacing, DMA controller and its interfacing. Design of processor based system.

2. Scope and Objective:

The scope of the course is centered on the Intel 80x86 microprocessor and study of its assembly language
programming. It also covers interfacing of x86 to external chips. The emphasis is on understanding the
basic programmer’s model of 80x86 and its instruction set. And finally the objective of the course is to
design simple microprocessor based system after learning basic microprocessor programming and its
interfacing with external peripheral chips.

3. Text Book:

Barry B Brey, The Intel Microprocessors .Pearson, Eight Ed. 2009.

4. Reference Books:

Douglas V Hall, Microprocessor and Interfacing, TMH, Second Edition.

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BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, Pilani
Pilani Campus
AUGS/ AGSR Division

5. Course Plan :

Module No Lecture Topics to be covered Reference to Learning Objective


Text
Session

1 1 Introduction to Microprocessor and Chapter 1 Learn Compute Architecture,


Microcomputers Memory & I/O organization,
CISC/RISC processors

2 2-3 Microprocessor Programmer's Model Chapter 2 Learn Programmer's Model,


BIU

3 4-6 8086-486 Instruction Format Chapter 3 Learn instruction format and


Addressing Modes

4 7-16 Assembly Programming Chapter 4-6, 8 Learn Instruction Set & ALP

5 17-19 8086/8088 Hardware Specifications Chapter 9 Learn Pin Out, Modes of


operation, Clocking, Buses

6 20-23 Memory Interface Chapter -10 Memory Devices, Address


Decoding- Memory Interface
8086- 80386

7 24 I/O Interfacing Chapter 11.1, Learn Basic I/O interfacing


11.2 (I/O mapped I/O and
Memory mapped I/O) I/O
port address decoding

8 25-27 Programmable Peripheral Devices Chapter 11.3 8255

9 28-29 Interrupts Chapter 12.1, Learn types of interrupts,


12.2, Vector tables, Priority
Schemes

30-31 Interrupt Controller Chapter 12.4 Learn 8259 interrupt


controller

10 32-34 Programmable Timer Chapter 11.4 Learn Timer 8253/8254

35-36 Converters Chapter 11.6 Learn ADC, DAC

11 37-39 DMA controller Chapter -13 Learn Basic Operation, 8237,


Shared Bus, Disk Memory
Systems, Video Displays

40-41 Bus Interface Chapter 15 Learn ISA, PCI, Com,


USB,AGP

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BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, Pilani
Pilani Campus
AUGS/ AGSR Division

6. Evaluation Scheme:

SL. No Component & Nature Duration Weightage Date Nature

1 Quizzes ---- 40 (13.3%) Continuous Continuous


2 Lab Quiz/Assignments ---- 30 (10%) Continuous Continuous
3 Mid-Semester Test 90 min. 80 (~26.6%) 12/03/2019 OB/CB
4 Design Assignment -- 30 (10%) Tentative
20/04/2019

5 Comprehensive Exam 3 hours 120 (40%) 03/05/2019 OB/CB

7. Chamber Consultation Hour: Thursday/Firday 5-6 pm


8. Course Notice: Will be displayed on Nalanda Notice board
9. Make-up Policy: Make up will be allowed for genuine cases. Prior application should be sent for
seeking the same. No make up for Quiz, Lab.
10. Note: A student who scores less than 10% marks (30 marks) will be awarded NC.

Instructor-in-Charge
CS/EEE/INSTR F241

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