Ee212 Lecture Notes 2019

Prof. Dr.
Cengiz Beşikci
Electrical and Electronics Engineering Department
Middle East Technical University
February 2019
EE 212-Semiconductor Devices and Modeling
NOTICE
This document is intended to be used solely for
educational purposes at the Electrical and
Electronics Engineering Department of the
Middle East Technical University by the students
taking the course EE 212. No part of this
document can be reproduced, distributed or
transmitted by any means.
Middle East Technical University, EE 212-Semiconductor Devices and Modeling, Lecture Notes
1
Course Description: Basic semiconductor concepts. Conduction mechanisms in

semiconductors and physical electronics. Physics of p-n junction diodes, bipolar
junction transistors (BJTs) and field-effect transistors (FETs). Modes of operation
and characteristics. Transistor biasing and small-signal models for BJTs and FETs.
Secondary effects in transistors. Dynamic models for diodes and transistors.
Modeling concepts for computer-aided design.
Grading
Midterm Examination 1 : 25%
Midterm Examination 2 : 25%
Final Examination : 30%
Short Examinations: 15%
Attendance and Homework: 5%
Course Rules-I
• In order to take the final examination student must meet the following condition:
A minimum PRE score of 30.00 calculated as follows:
Midterm 1 Score + Midterm 2 Score

PRE Score = x0.5 + Average Short Examination Scorex0.2 + Attendance Rate(%)x0.1
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Students who fail to meet the above condition will be assigned the NA grade.
• Midterm 1, Midterm 2 and Short Examination scores will be assigned out of 100.
• Attendance rate will be calculated using the student attendance recorded during the semester.
•A single make up examination will be offered for the midterm examinations in the case of
presentation of an approved medical report or legal (documented) excuse acceptable by the
Department .
2
Course Rules-II
• Attend the lectures.
Good attendance rate : 100%
Any attendance rate below 100% is not desirable.
Course topics are stongly related to each other. Therefore, if you must miss a
lecture, make sure you review the material covered in this lecture before
coming to class for the next one.
• Study regularly and review the covered material at least one day before
each lecture.
• Participate in the class discussions.
• Come on time to class for the lectures. Please be aware of the fact that
students arriving late greatly disturb the presentation of the lecture. Such
disturbances will not be allowed by the instructors if they occur repeatedly.
Course Rules-III
• Academic dishonesty will absolutely not be tolerated and disciplinary
action will be initiated in case unethical conduct is suspected.
• Do not hesitate to contact your instructor during the semester (before it is

too late) if you do not feel that you are comprehending the course
material well enough even though you study regularly and have a good
attendance rate. Your instructor will help you figure out the problem.
• Do not attempt to contact any of the instructors with the intention of

raising your grade during the letter grade assignment phase.
• You will be allowed to inspect your corrected examination booklets on

the dates announced at least three days in advance. Do not attempt to
make a reservation at another date for this purpose unless you have an
approved legal (documented) excuse.
3
Course Rules-IV
• Do not forget to bring your calculator to the examinations. You will not be
allowed to share a calculator with a classmate during the examinations.
• Access to mobile phones, tablet PCs and having any stored/recorded

course related information on the calculators, desks, armlet chairs etc
during the examinations will be considered as unethical conduct.
• Midterm and final examinations will be started exactly at the time

announced by the Department. Make sure you arrive at least 20 minutes
before the examinations start.
• Short examinations will be given during the lecture hours. Students

coming late to class will not be allowed to take the short examination and
will not be given a make up for this examination.
GOOD LUCK!

Preface
The miracles of electronics and optoelectronics building the information age could
not have been possible without an important class of materials called
semiconductors. The ingenuity of the mankind combined with the generosity of the
Nature has led to the invention of devices implementing important functions such as
amplification, sensing, switching and processing which have greatly changed our
daily life. The majority of these devices relies on the exceptional properties of the
semiconductors.
Solid state device technology is a very wide and interdisciplinary field covering
disciplines such as physics, electrical engineering, material science, chemistry and
mechanical engineering. Therefore, it is not an easy task to teach the fundamentals
of this technology especially at an introductory level assuming no background other
than freshman physics, calculus and preliminary circuit theory. With the objective of
providing the students with a background on the most essential fundamentals of
semiconductors and solid state devices at an introductory level, the material
presented in this course is carefully selected to include the topics which every
electrical engineer, independent of specialization area, should be familiar with.
4
With discussions far from being advanced, we will first get familiar with the basic
properties of semiconductors and then utilize these properties to construct and study
electronic/photonic devices that find wide application areas in the field of electrical
engineering. Our motivation will be toward understanding the basic principles and
predict/model the behavior of these devices in circuit applications with the main
objective of acquiring substantial background for junior year courses on analog and
digital electronics (EE 311 and EE 312) as well as some senior level courses.
In summary, while you will not be a solid state engineering expert after taking this
course, you will be ahead of understanding semiconductor devices at a black-box
level. Note that successful implementation of many circuit/system applications relies
on this background which will allow you perform your job as an electrical engineer in
a more efficient and productive manner. If you choose to specialize in this important
area of Electrical Engineering, you will have a chance to be exposed to much wider
and detailed coverage of the related topics in our senior level course EE419-Solid
State Devices.
After taking this course you will
• understand the fundamentals of semiconductors and solid-state electronics at a

depth sufficient to understand the principles of p-n junction diodes and transistors,
• understand the preliminary device models utilized by circuit simulators,
• predict the behaviour of diodes and transistors in analog and digital circuits,
• learn how transistors are utilized for amplification of signals,
• learn how optical devices such as photodetectors, solar cells and LEDs work,
• acquire substantial background for junior year courses on analog and digital
electronics (EE 311 and EE 312) as well as the senior level course EE 419.
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A BRIEF GUIDE TO USE THIS DOCUMENT

This document is intended to be self-sufficient for a student regularly attending the
lectures and reviewing the course material. However, some of the references that you
may wish to consult for further discussion/material are given on the selected slides
with the corresponding sections of the edition listed on the chapter cover page (you
can also find related discussions in the other reference books). Please note that
section numbers may change in a different edition and be aware that you will be
responsible for the topics covered in this document. Targeting 100% attendance rate
will minimize the need to consult multiple reference books to comprehend the course
material.
The Lecture Notes will be available for download from METU CLASS Web Site in pdf
format. Please download and have it printed and bound (to bring to class) as soon as
possible.
CHAPTER I
INTRODUCTION TO
SEMICONDUCTOR FUNDAMENTALS
6
References
1) B. G. Streetman and S. K. Banerjee, Solid State Electronic Devices, 6th Edition,

Prentice Hall, 2006.
2) R. F. Pierret, Semiconductor Device Fundamentals, Addison-Wesley, 1996.
3) J. Singh, Semiconductor Devices An Introduction, McGraw-Hill, 1994.
4) R. F. Pierret, Advanced Semiconductor Fundamentals, Modular Series on Solid

State Devices, Volume VI, Addison-Wesley, 2003.
5) M. Shur, Introduction to Electronic Devices, John Wiley, 1996.
6) R. C. Jaeger and T. N. Blalock, Microelectronic Circuit Design, Mc Graw Hill, 2nd

Edition, 2004
The Role of This Chapter

The characteristics of a semiconductor device strongly depend on the physical
properties of the material used for device fabrication. The operational principles of a
device constructed with a particular combination of semiconductor structures are
established through the behavior of charge carriers in the material based on these
physical properties and the operating conditions.
The objective of this chapter is to introduce the basic properties of semiconductors and
the action of the charge carriers inside semiconductors at a depth sufficient to
understand the operation of devices such as diodes and transistors at a preliminary
level.
We will start with a qualitative description of the formation of energy bands in solids
and classification of materials based on their electrical conductivity. The next topic of
discussion will be the doping of semiconductors to control their conductivity through
creation of charge carriers free for conduction. We will then discuss the action of
charge carriers in response to Electric-field and carrier density gradients as well as to
optical excitation creating excess carriers in the material.
It is a must to comprehend the material in this chapter in order to be able to

understand the operational principles of diodes and transistors.
7
V
+
V - I=
R
I
t
w
L
L
R=
1
wt
= , : resistivity ( − cm),  : conductivity (-cm)−1 , R: resistance ()

L R, wt (cross sectional area) R 
Solid State Electronic Materials Ref.6: 2.1
Classification   Typical 
(-cm)
Example
Insulator Large Small > 105 Diamond
Semiconductor Moderate Moderate 10-3-105 Silicon

(Controllable) (Controllable)
Conductor Small Large < 10-3 Copper
Q: What makes semiconductors so important for electronics?
A: The ability to modify the resistivity (conductivity) in a very wide range

by adding impurities to the material (as we will see later).
The most widely used semiconductor is Silicon (Si) which is a column IV

element in the periodic table. Since it (ideally) contains only one type of
atom (Si), it is called elemental semiconductor.
8
Bonding Types Ref.1: 3.1.1
Ionic Bonding: Electron exchange between the atoms resulting in

formation of ions. Example: Na (1s22s22p63s1) and Cl (1s22s22p63s23p5).
3s1 electron of Na atom → Cl atom.
The atoms are held together by the coulombic forces between the Na+
and Cl- ions.
Q: Is NaCl a conductor or insulator?
A:
The outer orbits of all atoms are completely filled and there are no
electrons loosely bound to the atoms constructing the crystal. This
is equivalent to saying that there are no free electrons to
contribute to current (no free charge carriers).Therefore, NaCl is
an insulator.
Bonding Types Ref.1: 3.1.1
Metallic Bonding: The outer electrons (such as 3s1 in Na) belong to the
whole lattice and the crystal is held together by the forces between the
positive ions and the free electrons. Note that a huge number of electrons
is available for conduction → high conductivity.
Covalent Bonding: This is the type of bonding occuring in most
semiconductors. Consider Si atoms with the electronic structure:
1s22s22p6 3s23p2
In Si crystal each silicon atom shares its four outer orbit electrons with
the neighboring Si atoms. The bonding forces result from quantum
mechanical interactions between the electrons.
Si atom
Shared outer
orbit electrons
forming the covalent
bond
9
Energy Bands Ref.1: 3.1.2, Ref. 2: 2.2.2
Bottom of the conduction band (EC)

Atoms are far away from each other.
Interaction starts. Electrons in the outer shell do not interact.
Level splitting.
4N States N Si atoms
Conduction Band 6N states
2N electrons
no allowed Energy Band Gap 2N states n=3

states in this gap Eg 2N electrons
4N States
Valence Band Si:1s22s22p6 3s23p2
8N states
4N electrons
Top of the valence band (EV) (half filled band)
n=2
Core level electrons do not start
yet to interact at this distance. n=1
actual spacing in Si crystal
distance between the atoms

Conduction Band
EC Conduction Band
EC
Eg Eg
Overlapping Bands
EV
EV Valence Band
Valence Band
Conductor
Insulator Semiconductor (Metal)
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Q: What is the difference between the energy states of isolated atoms

and those in a solid?
A:
Electrons in isolated atoms occupy discrete energy states. On
the other hand, energy bands (allowed and forbidden) form in a
solid when we bring the atoms together to construct the crystal.
Q: Comment on the energy difference between the states in an
energy band of a typical crystal.
A:
Since N in a typical crystal is a huge number, the energy
difference between the states in a band is very small. Therefore,
the conduction and valence bands can be considered to be
continuous bands of energies.
4N States free electron

conduction
band 0 Electrons
empty state
Energy Band Gap Thermal
(hole)
Eg Excitation
valence
band
4N States finite  , nonzero 

4N Electrons Both bands contribute to conductivity.
Perfect insulator at 0 K. Conduction band does not
contribute to conduction since there are no charge
carriers. All the states in the valence band are filled
 no contribution of the valence band to current.
 = ,  = 0
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Carriers Ref.1: 3.2.3, Ref. 2: 2.2.3
free electron
EC
→
EV
broken covalent bond (hole)

Thermal excitation generates electron hole pairs (EHPs).
Q: What is the energy required to break a covalent bond (excite an

electron from the valence to the conduction band?
A: Eg.
Carriers Ref.1: 3.2.3, Ref. 2: 2.3.3
Intrinsic Semiconductor: perfectly pure semiconductor (intrinsic Si

contains only Si atoms).
Carrier density in intrinsic semiconductor is called intrinsic carrier

concentration (ni).
Q: What is the relation between the conduction band electron density (n)
and valence band hole density (p) in an intrinsic semiconductor?
S: The free carriers are generated by thermal excitation in an intrinsic
semiconductor under equilibrium. Note that each thermal excitation
creates
▪ one electron in the conduction band

▪ one hole in the valence band
Therefore n=p=ni
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Carriers Ref.1: 3.2.3
Note that there should be an inverse process balancing the thermal

generation in order to achieve time independent electron and hole
concentrations in a semiconductor (otherwise n and p continuously
increase with time). The inverse process is called recombination.
An electron is excited from the valence

An electron makes a transition from the
band to conduction band resulting in
conduction band to an empty state in the
a filled state in the conduction band and
valence band resulting in loss of an EHP.
an empty state (hole) in the valence band.
np = ni2
Carriers Ref.1: 3.2.3
Q: How do the carrier concentrations (n and p) change with

temperature in an intrinsic (pure) semiconductor?
A: When the temperature is increased the thermal generation rate

becomes higher leading to a larger generation rate for EHPs. Due to
the larger densities of electrons in the conduction band and holes in
the valence band, the recombination rate is also increased. Obviously,
we still need to have a balance between the generation and
recombination rates. However, at a higher temperature this balance
occurs at higher n and p resulting in ni increasing with temperature.
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Important Semiconductors
The characteristics of a semiconductor device strongly depend on the physical

properties of the material used for device fabrication. Different applications
requiring different physical properties call for the availability of a wide group of
semiconductors for device fabrication. Among these materials, Si and GaAs are
the most well known semiconductors with the most mature technologies.
Si is a material which is abundant in nature offering the lowest cost solution for
the manufacturer. It is one of the most extensively studied semiconductors with
very well known properties and characteristics. However, there exist electron
device applications where the physical properties of Si do not meet the
requirements. At the same time, Si does not work well for optical devices (such
as lasers) while some other semiconductors (such as GaAs) do.
The following table lists the energy bandgaps of some semiconductors. Some
of these materials are elemental semiconductors (Si and Ge), while the others
are compound semiconductors formed by combining elements from different
columns (mostly III and V) of the periodic table.
Important Semiconductors
We see that energy bandgaps varying in a
wide range are available for fabricating
devices to operate with different
characteristics. The other physical
properties of these materials also change in
a wide scale offering devices with different
▪ operation frequencies
▪ operation conditions (biasing voltage,
temperature etc)
▪ radiation emission characteristics
▪ radiation detection characteristics
▪ .......
The discussion in this course will mostly
focus on Si based devices while the
semiconductor fundamentals presented in
this chapter are, of course, applicable to all
semiconductors.
14
Intrinsic Carrier Concentration Ref.1: 3.2.3, Ref. 6: 2.2
Q: List the possible parameters governing the intrinsic carrier

concentration in a semiconductor.
A:
▪ Temperature, Tthermal excitation rate  EHP generation rate
▪ Eg, Bandgap   thermal excitation rate  EHP generation rate

Bandgap Energy
in eV (1.12 eV for Si)
Eg
−
ni = BT 3e kT
T in K
Boltzmann Constant
material T in K (8.62x10-5 eV/K)
dependent
parameter
(1.08x1031 K-3-cm-6 for Si)
Intrinsic Carrier Concentration
15
Doping Ref.1: 3.2.4, Ref. 2: 2.3.4
The most important property of a semiconductor for electronic

device applications is the ability to control the resistivity of the
material by introducing impurities at controlled amounts.
This process is called doping. An intrinsic (pure) semiconductor

can be doped to make n>p (n-type) or p>n (p-type).
Formation of contacts between n and p type semiconductors

results in devices performing useful functions such as rectification
and amplification of signals as well as switching which establish
the basis for analog and digital electronics.
Doping-n type Ref.1: 3.2.4, Ref. 2: 2.3.4
Q: What happens if a Column V impurity such as P is added to Si which is a

Column IV element?
A: When a P atom replaces a Si atom in the crystal, four of the (five) outer
shell electrons of P are used to form bond with the neighboring Si atoms. We
have one electron left out of this bonding structure. This electron
is loosely bound to the P atom and can easily be set free for conduction.
+- Coulombic Attraction
the fifth electron
valence band
electrons Si Si Si
Si P Si Si
Si Si Si
Si Si Si Si
16
Doping-n type Ref.1: 3.2.4, Ref. 2: 2.3.4
Since Column V impurity P donates an electron free for conduction to Si, it is

called donor atom.
This type of doping process can be represented using the energy band diagram
as shown below. electron set free for conduction donor
energy level
Si Si Si
Si P Si Si
donor atoms thermal
excitation
Si Si Si
Si Si Si Si
Note that the donor atom is charge neutral when it is introduced to the crystal. If you
take one electron away from this atom (set the electron free for conduction), the donor
atom becomes positively charged (called donor ionization).
Q: What is the (thermal) energy required to ionize the donor atom (ionization energy)?
A: EC-ED.
Doping-n type
Q: Consider an intrinsic (pure) semiconductor. Mark the correct answer for

this semiconductor.
n=p=ni n>p, n>ni n<p, n<ni
Q: Now dope this semiconductor with donors. Mark the correct answer for the
doped semiconductor.
n=p=ni n>p, n>ni n<p, n<ni
Q: Compare the hole density in an intrinsic semiconductor (p=ni) with that in

a donor doped semiconductor.
pdonor-doped>ni pdonor-doped< ni
17
Doping-n type
A: In order to answer this question, remember that the product of the electron
and hole concentrations is constant at a given temperature or
ndoped pdoped = ni2
We have increased n over ni by doping the semiconductor with donor impurities
(ndoped >ni). Then 2
ni
pdonor − doped =  ni
ndonor −doped
Q: Find the expression for the electron concentration in a donor doped
semiconductor if the donor doping density is ND donors per cm 3. Assume that
all the donors are ionized (donate electrons to the conduction band).
A: The sources of electrons in a donor doped semiconductor are
• donor ionization
• thermal generation
n  N D + ni
However,
Doping-n type
In order to find the required expression we need to use the following relations:
1) The charge neutrality of the semiconductor is not disturbed through
thermal generation (an EHP is created) or recombination (an EHP is
destroyed).
Donor ionization does not disturb the charge neutrality either. Hence, a
negatively charged electron is created for each positively charged ionized
donor.
Then total negative charge must be equal to total positive charge in the
material or
volume
qVn = qV ( N D + + p)  n = N D + + p
Assuming complete ionization, N D + = N D ,
n = ND + p
2) np = ni2
N D + N D 2 + 4ni2
n=
2
18
Doping-p type Ref.1: 3.2.4, Ref. 2: 2.3.4
Q: What happens if a Column III impurity such as B is added to Si which is a

Column IV element?
A: When a B atom replaces a Si atom in the crystal, four valence electrons are
needed to complete the covalent bond with the neighboring Si atoms.
However, since B atom has three outer shell electrons, an incomplete bond is
constructed with a vacancy. This incomplete bond (vacany) does not need to
be fixed in position. Note that electrons from Si-Si bonds (if provided with
necessary energy) can fill this vacancy (completing the bond) and transfer the
incomplete bond to another atom. This is considered as the impurity taking an
electron from the valence band which includes the electrons of the Si-Si
bonds. Once this happens, the B atom becomes negatively charged (with one
extra electron). vacancy
Doping-p type Ref.1: 3.2.4, Ref. 2: 2.3.4
This type of doping process can be represented using the energy band diagram
as follows. The above described process can be visualized as B atoms
accepting electrons from the valence band and creating empty states (holes)
in this band.
Since Column III impurity B accepts (receives) an electron from the valence
band, it is called acceptor atom.
acceptor
acceptor atoms energy level
Q: What is the (thermal) energy required to ionize the acceptor atom (ionization energy)?
A: EA-EV.
19
Doping-p type
As the valence electrons move from atom to atom filling vacancies, the
vacancies also move through the crystal. However, note that the direction of
motion of the vacancy (as a result of the motion of the electrons) will be
opposite to that of the electrons.
vacancy
motion of vacancy
motion of valence electrons

The contribution of the valence band to conduction (motion of valence band
electrons) can be described using the motion of the vacancies. However, note
that the vacancy (hole) should be treated as a positively charged particle.
Doping-p type
Q: Find the expression for the hole concentration in an acceptor doped

semiconductor if the acceptor doping density is NA acceptors per cm3. Assume
that all the acceptors are ionized (accept electrons from the valence band).
A: The sources of holes in an acceptor doped semiconductor are
• acceptor ionization
• thermal generation
However,
p  N A + ni
Use charge neutrality equation:
qVp = qV ( N A− + n)  p = N A− + n
Assuming complete ionization, N A− = N A ,
p = NA + n N A + N A2 + 4ni2
p=
np = ni2 2
20
Compensation Ref.1: 3.3.4
Q: What happens if I dope a semiconductor with both donors and acceptors?

A: This process is called compensation. The electrons of the donor atoms fill
the vacancies created by the acceptors. This is not a desirable process and it
should be avoided unless absolutely necessary, since it degrades the transport
properties of the material due to high concentration of impurity atoms (both
donors and acceptors).
EC
+ + + + + ED
Compensated Semiconductor
- - - - - EA
EV
The above pictured process is equivalent to the annihilation of a valence band

hole created by an acceptor by a conduction band electron created by a donor.
Carrier Concentrations Ref. 2: 2.5.4, 2.5.5
Q: How do I find the electron and hole concentrations in a compensated

semiconductor?
A:
N D − N A + ( N D − N A ) 2 + 4ni2
pn = n → n =
2
i ,
2
N A − N D + ( N A − N D ) 2 + 4ni2
p=
2
21
Carrier Concentrations Ref. 2: 2.5.7
The variation of the electron concentration in a donor doped semiconductor with

temperature is shown below.
thermal
generation
Fermi Dirac Distribution Function Ref.1: 3.3.1, Ref. 2: 2.4.2
Fermi-Dirac Function governs the occupancy of the available energy states by the
carriers.
1
f (E) = E − EF
1+ e kT
f(E): probability that an energy state at an energy E is occupied by an

electron at temperature T.
EF: reference energy level (Fermi Level).
22
Fermi Function is symmetrical around the Fermi Level.

E F
1.0
0.9
0.8 300 K
0.7
1 EF=0.5 eV
f (E) = 0.6
f(E)
E − EF 0.5
1+ e kT 0.4
0.3 1-f(E) f(E)
0.2
0.1
0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
f ( EF + E ) = 1 − f ( EF − E ) Energy (eV)
Probability that the energy state Probability that the energy state
at EF+E is occupied at EF-E is empty
Fermi-Dirac Function yields the occupancy probability of a state

at energy E assuming that there exists an available energy state
at this energy.
Note that no electron can occupy an energy level in a forbidden

gap even though f(E) may not be zero in this energy interval, since
no available energy states exist in the forbidden energy gaps.
Conduction Band
EC
Eg
EV
Valence Band
23
Fermi Dirac Distribution Function
Q: Where is the Fermi level located in an intrinsic semiconductor?
A: n=p in an intrinsic semiconductor. Assuming that the density of the available energy
states in the conduction band is identical to that in the valence band, E F should be
located at the midgap position to make n=p. In other words, the probability that a state is
occupied (an electron exists) at an energy E above Ec should be equal to the
probability that a state E below Ev is empty (a hole exists) in order to have n=p. The
symmetry of the Fermi function around the Fermi level satisfies this requirement if the
Fermi level is positioned at the midgap.
Eg EC − EV E + EV
EF = EV + = EV + = C
2 2 2
n = p = ni
EF=(EC+EV)/2=Ei (intrinsic level) in intrinsic semiconductor

EF − Ei Ei − EF
n= ni e kT , p = ni e kT
Q: How does EF-Ei change when an intrinsic semiconductor is
doped with donors?
A: ND  (initially ND=0)  n  EF-Ei   EF moves closer to the
conduction band edge (EC).
Ei
Q: How does Ei-EF change when an intrinsic semiconductor is doped

with acceptors?
A:
24
Exercise Questions Ref. 2: 3.1.5
E.1-1 Consider the following semiconductor. Plot the energy band diagram
of this semiconductor with and without the biasing voltage V.
S.1-1
Total Electron Energy Displays the variation
Kinetic Energy of the electron potential
EC energy with position
Potential Energy = -q x electrostatic potential (V )
Ei
dV 1 dEc
Then =− = − E ( E − field ) or
EV dx q dx
x E = 1 dEc
q dx
25
with V and nonzero E

V=0, E=0, dEc/dx=0 electron potential
energy decreased,
EC
kinetic energy increased
Ei
EV
1 dEc
E= x
q dx hole kinetic
energy increased
Exercise Questions
E.1-2 (to be solved on white board)
The occupation probability of a semiconductor with Eg=1 eV, ni=1010 cm-3
(300 K) is shown below. Find the electron concentration in the conduction
band at 300 K. kT= 25 meV.
S.1-2
26
Exercise Questions
Find the location of the Fermi level with respect to the intrinsic level in
GaAs at 300 K if it is doped with donor atoms at a density of 1014 cm-3.
The intrinsic carrier concentration of GaAs is approximately 2x106 cm-3 at
300 K.
S.1-3
HOMEWORK 1
Average Time to Complete: 140 min
27
HMW-1.1 Homework 1
Circle the appropriate answer for the following 30 questions.
Refer to to the figure below to answer questions i and ii.
•The energy bandgap of the material is

a) EA-EB
b) EB-EC
c) EC-ED
d) EA-ED
e) None of the above
•There are
a) 0 electrons in the energy range A-B at T=0 K
b) 4N electrons in the energy range C-D at T=0 K
c) 0 electrons in the energy range B-C at T=0 K
d) some electrons in the energy range A-B at T>0 K
e) All of the above
• Consider two intrinsic semiconductors with the same electron and hole mobilities. If the energy bandgap of
Semiconductor 1 is smaller than that of Semiconductor 2,
a) Semiconductor 2 will exhibit larger conductivity
b) Semiconductor 1 will exhibit smaller carrier concentration
c) The recombination rate in semiconductor 1 will be larger under equilibrium
d) The thermal generation rate in Semiconductor 2 will be larger under equilibrium
HMW-1.1 Homework 1
28
HMW-1.1 Homework 1
•In an intrinsic semiconductor, the probability that a state E above Ec is occupied is
a) equal to the probability that a state E below Ev is empty
b) independent of the temperature
c) independent of the energy bandgap
d) greater than the probability that a state 2E above Ec is occupied
e) none of the above
• Which of the following is wrong for a perfectly pure Si crystal having N Si atoms?
a) The number of filled states in the conduction band is equal to the number of the empty states in the valence band.
b) There does not exist any available energy state in the energy range between the bottom of the valence band and
the top of the conduction band.
c) There are less than 4N empty states in the conduction band at temperatures above 0 K.
d) There are 4N available energy states in the valence band.
e) The electronic structure of Si is 1s22s22p63s23p2
•Which of the following is correct when an insulator is compared with an intrinsic semiconductor?
a) Size of the energy bandgap is smaller in an insulator.
b) In an insulator the conduction and the valence bands overlap.
c)The two materials will exhibit similar resistivity at T=0 K.
d)The conductivity of the semiconductor will be smaller at room temperature.
e)The semiconductor has a smaller free carrier concentration at the same temperature for T > 0 K.
HMW-1.1 Homework 1
29
HMW-1.1 Homework 1
HMW-1.1 Homework 1
30
HMW-1.1 Homework 1
HMW-1.1 Homework 1
• Which of the following is wrong for the Fermi Dirac function?
a) f(E) may be nonzero in the forbidden energy gap region.
b) f(EF)=1/2 for T>0 K
c) f(E) is symmetrical around EF.
d) f(EF+E)- f(EF-E)=1
e) f(E) increases with increasing temperature for energies above EF.
• Which of the following is the correct charge neutrality equation for a p-type semiconductor (having only
acceptors as impurities) in the case of partial impurity ionization
a) p+ND=n+Na
b) n=p+NA-
c) p=n+NA-
d) n=p+NA
• What is the hole concentration in a Si sample at 600 K if it is doped with donors and acceptors at densities
of ND=2x1013 cm-3 and NA=1x1013 cm-3 and all the impurities are ionized?
a) ~1x1015 cm-3
b) ~1x107 cm-3
c) ~1x1013 cm-3
d) ~ -1x1013 cm-3
e) ~1x1014 cm-3
• The electrostatic potential at one side (Side A) of a uniform semiconductor bar is 1 V higher than the potential
at the other side (Side B). Which of the following is/are correct?
i) The conduction band edge at Side B is 1 eV higher than that at Side A
ii) The kinetic energy of the electrons is increased as they move from Side B to Side A
iii) The potential energy of the electrons in Side B is 1 eV higher that at Side A
a) i and ii b) i and iii c) ii and iii d) only ii e) i, ii and iii
31
HMW-1.2 Homework 1
HMW-1.3 Homework 1
32
HMW-1.4 Homework 1
HMW-1.5 Homework 1
33
HMW-1.6 Homework 1
Carrier Transport-Drift Ref. 2: 3.1
Motion of a single electron in the absence of Electric Field is shown below.
free flight
Electron is scattered at the end of each free flight.
The scattering may be due to the disturbance by
the impurities,defects, lattice vibrations etc.
The instantaneous velocity of the electron is not zero (even when E-field=0)
and the motion arises from the nonzero thermal energy of the electron.
This motion is random.
Q: What is the average velocity of an electron with thermal motion if you follow
its trajectory in momentum space for a sufficiently large duration, t?
A:
34
Q: What is the average velocity of a very large number of electrons with

thermal motion at any instant, t ?
A:
I
Q: What is the current, I ?

A:
Q: How do the electrons move in the presence of an E-field?

A:
Nonzero average
(drift) velocity in this direction
EF
Drift motion due to the Electric Field is superimposed on the random thermal motion.
The resulting current is called drift current.
35
Q: How do I describe the current resulting from this complicated

motion of the electrons?
A: It is not too difficult (at least under steady-state conditions).
We will be interested only in the average (drift) velocity in response

to an E-field which establishes the current flowing through material.
Note that the thermal motion (due to random nature) will have no
effect on the current. If we know the average (drift) velocity (vd) of
the electrons under an applied E-field:
electron drift velocity(cm/sec)

Electron drift current density J n = −qnvdn
(A/cm2)=C/(sec-cm2)
charge density (C/cm 3)
Similarly, hole drift velocity(cm/sec)
Hole drift current density J p = qpvdp

Q: How do I establish the relation between the drift current density
and E-field (E)?
A: The electron and hole drift velocities can be expressed as
vdn=-µnE and vdp=µpE under low enough E-fields.
µn: electron mobility (cm2/V-sec)

µp: hole mobility (cm2/V-sec)
Under high fields above relations lose validity, and the
drift velocity does not depend linearly on the E-field.
36
The steady-state electron velocity-EF characteristics of Si and GaAs are

shown below.
v=E approximation
T=300 K
(with constant mobility)
is acceptable under low
E-fields.
Data from Ref. 5
Electron mobility in GaAs is larger than that in Si resulting in higher speed of

operation (GaAs devices may operate under higher frequencies).
Mobility is a material dependent parameter determined by the

combined effects of various scattering mechanisms in the material.
If the carrier motion is frequently disturbed by scattering mechanisms,

this results in a low carrier mobility meaning that the carriers can not
acquire large drift velocities under E-field.
Typically, electron mobility is larger than the hole mobility.
Q: Write the expressions for the electron and hole drift current
densities in terms of carrier mobilities.
A:
J n = −qnvdn = −qn(− n E ) = qnn E
J p = qpvdp = qp p E
 Note that both drift currents are in the direction of the E-field.
37
Carrier Transport-Drift Ref. 2: 3.1, Ref. 6: 2.7
Electrons
Si
300 K
Holes
(approximated data)
Q: How do I describe the conductivity of a material in terms of mobility?
A: Remember that Ohm’s Law relates the current density to E-field by
J =E
Then,
J = J n + J p = q ( n n + p  p ) E =  E   = q ( n  n + p  p )
 Note that conductivity depends on both mobility and carrier

(electron and hole) densities.
Q: Write the approximate expression for the conductivity of an n-type

semiconductor in terms of donor doping density (ND>>ni, NA=0).
A: If ND>>ni , nND, p=ni2/nni2/ND << n. Then
  qnn  qN D n
38
Carrier Transport-Diffusion Ref. 1: 4.4.1
The second basic transport mechanism is diffusion which takes place

when there exist carrier density gradients. Electrons and holes
(like particles) tend to diffuse from regions of high concentration toward
regions of low concentration.
The motion of carriers due to diffusion establish currents called diffusion

currents.
electron diffusion coefficient (cm 2/sec) hole diffusion coefficient (cm 2/sec)
n(x) dn p(x)
J n = qDn J p = − qD p
dp
dx dx
electron motion hole motion
electron diffusion hole diffusion
current current
x x
Carrier Transport-Diffusion Ref. 1: 4.4.2
The diffusion coefficient is related to the mobility through the following

expression
kT kT
Dn = n , D p =  p (Einstein Relation)
q q
kT
= VT (thermal voltage)
q
VT  25 meV at 300 K
39
Carrier Transport-Drift and Diffusion Currents Ref. 1: 4.4.2
Let’s consider the following case where we have both carrier density gradients
and E-field.
J ndrift = qnvn d = qn n E
J pdrift = qpvp d = qp p E
n
J ndiff = qDn
x
p
J pdiff = −qDp
x
n p
J ntotal = qn nE + qDn , J ptotal = q p pE − qDp
x x
Exercise Questions
E.1-4 The temperature dependence of the electron concentration in a semiconductor
(doped with donors only) is given below. A bias voltage is applied to a sample of
this semiconductor as shown below. Find the current flowing through the sample
at 500 K. The electron and hole mobilities in this semiconductor at 500 K are
3000 and 2000 cm2/V-sec, respectively.
S.1-4
n=1x1016 cm-3
ND=4x1015 cm-3
n + N A = p + N D (complete ionization)
1x1016 + 0 = p + 4 x1015 cm −3 → p = 6 x1015 cm −3
10V
I = JA = EA = q(nn + p p ) 0.2 x0.1cm 2 = 269mA
1cm
40
Exercise Questions
A semiconductor sample is doped with 1014 donor atoms/cm3 and 7x1013
acceptor atoms/cm3. At the temperature of the sample, the resistivity of
the intrinsic semiconductor is 60 ohm-cm., the electron mobility is 3800
cm2/V-sec and the hole mobility is 1800 cm2/V-sec. Find the total current
density through the sample if an electric field of 2 V/cm is applied.
S.1-5
Recombination-Generation Processes Ref. 1: 4.3.1, Ref. 2: 3.3.1
Recombination: a process through which free carriers are lost
Generation : a process through which free carriers are generated
41
Recombination-Generation Processes Ref. 1: 4.3.1, Ref. 2: 3.3.1
Recombination-Generation Processes Ref. 1: 4.3.1
Thermal Equilibrium-No Excitation

The recombination rate must be equal to the generation rate in order
to achieve time independent carrier concentrations.
Since both electrons and holes are needed in a recombination process,

recombination rate can be expressed as
req =  r no po
where no and po stand for the equilibrium carrier densities and r is the
proportionality (recombination) constant.
Q: Find the thermal generation rate expression at equilibrium.
A: gthermal=req= r nopo= r ni2
42
Now let’s illuminate a semiconductor with light having a photon energy larger
than the bendgap (Eg). We are now optically exciting the semiconductor and we
are no longer under equilibrium conditions.
optically excited electron
optical excitation
photons with h>Eg

EC
Eg
EV
Interaction of the photons with the valence band electrons create electron hole
pairs as a result of electron transitions from the valence to the conduction
band.
Since we have optical generation in addition to thermal generation, the electron

and hole concentrations are now larger than equilibrium densities.
If we keep the light on, we eventually reach steady state with
n = no + n , p = po + p
total electron concentration excess electron concentration
At steady-state we should have time independent carrier concentrations which requires
a balance between the recombination and total (thermal + optical) generation rate.
g thermal + g optical = total generation rate =  r np = recombination rate

=  r (no + n)( po + p) =  r no po +  r npo +  r no p +  r  n p
goptical =  r  npo +  r no p +  r  n p
In a semiconductor the carrier with a larger concentration is called majority carrier. The
other carrier type is the minority carrier.
Electrons are majority carriers in n-type material.

Holes are minority carriers in n-type material.
Electrons are minority carriers in p-type material.
Holes are majority carriers in p-type material.
43
goptical =  r  npo +  r no p +  r  n p
If the optically generated (steady-state) excess carrier concentration is much

smaller than the equilibrium majority carrier density, the excitation level is
considered to be low. Then,
g optical =  r p( po + no ) +  r  p 2 (δ n = δ p )
ignore if low level excitation, n<<no in n-type
g optical p<<po in p-type
p =
 r (no + po )
1
Define =   p = goptical
 r (no + po )
recombination lifetime steady-state excess carrier
concentration with the light on
Recombination-Generation Processes
E.1-6: A semiconductor sample (ND=1016 cm-3, ni=2x106 cm-3, =1x10-6 sec)
is illuminated continuously (and uniformly) with gop=1016 EHP/(cm3-sec).
Find the electron and hole densities in the sample under illumination.
S.1-6:
Since ND  ni , no  N D
n = p = g op = 1016 EHP /(cm 3 − sec)x10−6 sec = 1010 cm −3
Note that n = p  no as required by the low level excitation condition.
n = no +  n  no = 1x1016 cm −3
ni2
p = po +  p = + p = 4 x10− 4 + 1010  1x1010 cm −3
no
Note that low level excitation does not considerably change the majority
carrier density, however the change in the minority carrier concentration is huge.
44
E.1-7: A p-type semiconductor sample is continously illuminated with light

(low level excitation) and the light is turned off at t=0. Find the expression for
the excess electron density, n (t) for t>0.
S.1-7:
45
Continuity Equation Ref. 1: 4.4.3
Consider the highlighted volume in the following n-type semiconductor bar.

The hole generation rate is equal to the hole recombination rate in this
volume. Find the rate of change of hole density in the volume.
p p 1
qAx = I p ( x) − I p ( x + x)  =  I p ( x) − I p ( x + x) 
t t qAx  
volume
Ip(x)=q x number of holes entering/unit time
rate of hole charge
build up in the volume Ip(x+x)=q x number of holes leaving/unit time
Continuity Equation
Now, consider the highlighted volume in the following n-type semiconductor bar.
This volume is optically excited (low level) with a rate of gop EHP/(cm3-sec).
The thermal generation rate of electron hole pairs in this volume is gT
EHP/(cm3-sec) and the recombination rate is r EHP/(cm3-sec).
rate of hole charge loss

in the volume
due to recombination
p
qAx = I p ( x) − I p ( x + x ) + qAx ( g op + gT ) − qAxr
t
volume
rate of hole charge build up rate of hole charge generation
in the volume due to the difference in the volume due to optical
rate of hole charge between entering and leaving currents and thermal generation
build up in the volume
46
Continuity Equation
p I p ( x) − I p ( x + x) p 1 J p
= + ( gop + gT − r )  =− + gop − (r − gT )
t qAx t q x
Define r-gT : net recombination rate (recombination – thermal generation rate)
r − gT =  r (no +  n)( po +  p) −  r no po =  r  npo +  r no n +  r  n p
r gT
Under low level excitation,
p
r − gT =  r  npo +  r no p =  r (no + po ) p =
Then, p
p 1 J p  p
=− − + gop under low level excitation.
t q x p
p 1 J p  p
If there is no optical excitation (gop=0), =− −
t q x  p
This equation is known as the hole continuity equation.
Continuity Equation Ref. 1: 4.4.3, Ref. 2: 3.4.1
A similar derivation for electrons yields

n 1 J n  n
= −
t q x  n
which is the electron continuity equation.
Remember that
Equilibrium carrier concentrations are time independent. Then
 p 1 J p  p  n 1 J n  n
=− − = −
t q x  p t q x  n
47
Diffusion Equation Ref. 1: 4.4.3, Ref. 2: 3.4.2
Remember that
n p
J ntotal = qn nE + qDn , J ptotal = q p pE − qDp
x x
If E=0 (zero E-field),

n p
J ntotal = qDn , J ptotal = −qDp
x x
If the above equations are inserted into the continuity equations to represent
Jn and Jp,
The above equations are known as hole and electron diffusion equations since
they are applicable under zero E-field (no drift, diffusion only).
Exercise Questions
Consider a uniformly donor doped silicon sample in equilibrium . This sample is
uniformly illuminated for t  0 (low level excitation). Find the expression for
the excess hole concentration, p(t), in the sample for t>0 in terms of hole
recombination lifetime, p, optical generation rate, gop, and the other necessary
parameters.
S.1-8
48

Excess holes are continuously injected into a semi-infinite n-type semiconductor
bar at x=0. E=0 inside the bar. Excess hole concentration (p) at the injection
point (x=0) is p. Find the expression for the steady-state excess hole
concentration throughout the bar in terms of p, hole diffusion coefficient, Dp,
and hole recombination lifetime,p. Plot p(x). Assume low level injection.
hole
injection
x→ x
x=0
S.1-9
Exercise Questions
S.1-9 continued
49
HOMEWORK 2
HMW-2.1 Homework 1
Circle the appropriate answer for the following 20 questions.
50
HMW-2.1 Homework 1
HMW-2.1 Homework 1
51
HMW-2.1 Homework 1
HMW-2.1 Homework 1
52
HMW-2.1 Homework 1
HMW-2.2 Homework 2
53
HMW-2.3 Homework 2
HMW-2.4 Homework 2
54
HMW-2.5 Homework 2
Consider the following figure showing the electron drift current density under an E-
field of 100 V/cm in an n-type semiconductor (NA=0) versus 1000/T where T is the
temperature. The electron mobility in the semiconductor is equal to 1250 cm 2/V-sec
and it is independent of temperature in the temperature range 220-300 K.
The energy bandgap is also independent of temperature in this range. Find the
energy bandgap of this semiconductor as precisely as possible.
Hint: Note that Jn=0.49 A/cm2 at T=296 K and Jn=0.3 A/cm2 at T=281 K
HMW-2.6 Homework 2
Consider the highlighted volume in the following n-type semiconductor bar.
This volume is optically excited (low level) with a rate of gop EHP/(cm3-sec).
The thermal generation rate of electron hole pairs in this volume is gT
EHP/(cm3-sec) and the recombination rate is r EHP/(cm3-sec). Write the
difference between the steady-state hole currents entering and leaving this
volume [Ip(x)-Ip(x+x)] in terms of gop, gT, r and the other necessary
parameters.
55
HMW-2.7 Homework 2
D kT
Show that =
 q
Hints: 1) Under equilibrium
i) Idrift+Idiffusion =Itotal= 0 for both electrons and holes.
dEF
ii) =0
dx
1 dEC 1 dEi
2) E = =
q dx q dx
HMW-2.8 Homework 2
56
HMW-2.9 Homework 2
HMW-2.9 Homework 2
57
HMW-2.10 Homework 2 Ref. 2
Consider an n-type semiconductor bar with ND=1016 cm-3, p=500 cm2/V-sec and
very large L. Hole recombination lifetime (p) in the bar is 10-7 sec. Half of this
bar (x>0) is illuminated with gop= 1020 EHP/(cm3-sec) as shown below. Find and
plot the steady-state excess hole concentration (p(x)) throughout the bar.
Assume that E=0 inside the bar.
x=-L x=0 x=L x
HMW-2.11 Homework 2
58
HMW-2.12 Homework 2
Assume that the following n-type semiconductor bar is continuously illuminated
from one side as shown below. L is much smaller than the hole diffusion length in
the bar. There is an ohmic contact at x=L where the excess minority carrier
concentration is zero. The excess hole concentration at x=0 is p and the
excitation level is low.
Assume that the E-field in the bar is negligibly small. Start from the continuity
equation and derive the expression for the average time required for an excess
hole created at x=0 to reach the boundary at x=L in terms of hole diffusion
coefficient and other necessary parameters.
HMW-2.13 Homework 2
59
CHAPTER II
p-n Junction Diodes
p-n Junction Diodes
References
1) B. G. Streetman and S. K. Banerjee, Solid State Electronic Devices, 6th

Edition, Prentice Hall, 2006.
4) M. Shur, Introduction to Electronic Devices, John Wiley, 1996.
5) R. C. Jaeger and T. N. Blalock, Microelectronic Circuit Design, Mc Graw Hill, 2nd

Edition, 2004 .
60
p-n Junction Diodes

• Semiconductor devices (such as transistors) performing different functions in
electronic circuits include p-n junctions in their internal structures. p-n junction is one
of the most important building parts utilized in the construction of these devices.
• You should be familiar (through an earlier course) with the utilization of a p-n
junction diode in simple circuits. While the p-n junction by itself is able to perform
some important functions in electronics and optoelectronics such as rectification,
waveform shaping, radiation detection and light emission, it allows the configuration
of devices with more complicated structures to implement important signal processing
functions.
•Due to the above reasons, the characteristics of important semiconductor devices

can not be understood even at an introductory level without an understanding of the
principles of p-n junction operation. The main objective of this chapter is to provide
this primary background in order to form the basis for our discussions in the following
chapters on transistors.
It is a must to comprehend the material in this chapter in order to be able to

follow the discussions in the subsequent chapters.
p-n Junction Diodes-Junction Formation Ref. 1: 5.2.1
When a p type semiconductor is brought into contact with an n-type semiconductor,

large electron and hole density gradients arise since the hole concentration in the p-side
is much larger than that in the n-side, and the electron concentration in the n-side is much
larger than that in the p-side. Carrier concentration gradients call for diffusion of carriers
(holes start to diffuse from the p to the n-side, and the electrons diffuse from the n to the
p-side). Diffusing carriers leave behind the charge of the immobile ionized impurity atoms
(donors in the n-side and acceptors in the p-side). The uncompensated charge creates
a built-in E-field at the junction. Before Contact
+
-
P N
NA>>ni ND>>ni
=q(ND+p-NA-n)=0 (NAp) =q(ND+p-NA-n)=0 (NDn)
61
p-n Junction Diode at Equilibrium (no Biasing Voltage)
Creation of the depletion region and built-in E-field
+ hole diffusion
electron diffusion -
uncompensated ionized acceptors uncompensated ionized donors
P +
+
N
-
-
charge neutral Depletion Region charge neutral

=q(ND+p-NA-n)=0 (NAp) E-field
=q(ND+p-NA-n)=0 (NDn)
=-qNA =qND
There exists uncompensated (nonzero) charge inside the depletion region
resulting in the creation of an E-field at the junction. .

Nonzero E-field at the junction leads to electron and hole drift currents.
Diffusion
+
-
Ohmic Contact Diffusion Current Ohmic Contact
+
Drift +
-
-
charge neutral Depletion Region charge neutral

E-field
P Drift Current N
62
Equilibrium E-field
+ h diffusion
- e diffusion I=0
+ h drift
- e drift
The net current flowing through the junction should be zero under equilibrium
conditions.
h diffusion current
h drift current
e diffusion current
e drift current
Based on the requirements of equilibrium, the sum of the hole drift and diffusion
currents is zero as well as that of the electrons. This results in zero net current
flowing through the junction.
In summary, formation of the contact between p and n type materials calls for
diffusion currents due to carrier density gradients. However, the diffusion of
the carriers from one side to the other also generates drift currents due to a built
in E-field created at the juction. Electron and hole diffusion currents are canceled
by electron and hole drift currents, and no current flows through the junction
under equilibrium (zero bias).
E-field
+
-
+
NA>>ni - ND>>ni
dn dp
I n = qA( n nE + Dn )=0 I p = qA(  p pE − Dp )=0
dx dx
63
Equilibrium E-field
Built-in E-field
creates electrostatic
potential difference
V between the p and n
sides (built in potential)
Vbi
Fermi Level is constant
througout the junction
under equilibrium.
Equilibrium E-field
+
-
+
NA>>ni - ND>>ni
dn dp
I n = qA( n nE + Dn )=0 I p = qA(  p pE − Dp )=0
dx dx
pp:equilibrium hole concentration in the p-sideNA
np:equilibrium electron concentration in the p-sideni2/ NA
nn:equilibrium electron concentration in the n-side ND
pn:equilibrium hole concentration in the n-side ni2/ ND
64
p-n Junction Diodes-Junction Formation Ref. 1: 5.2.1, 5.2.2, 5.2.3
E-field
Equilibrium
 p kT
q pp np nn pn Energy Band Diagram
Before Contact
dp EC
I p = q (  p pE − D p )=0
dx EFn-EFp
(charge density) EV
kT dp ionized acceptors
= pE − =0 at the p-side
ionized donors
1
q dx qND at the n-side
Vbi = ( EFn − EFp )
kT dp dV q
E=− =− -qNA W
qp dx dx
Vn pn EF (Electric Field)
kT dp
 dV = −
Vp
q 
pp
p dEF  −qN A
= =
kT p dx  
Vn − V p = Vbi = − ln( n ) V dEF  qN D
q pp = =
dx  
kT N N
Vbi = ln( A D )
q ni2 Vbi
p-n Junction Diodes-Junction Formation Ref. 1: 5.2.1, 5.2.2, 5.2.3

E-field
Equilibrium
pp np nn pn
qAxn N D = qAx p N A
ND (charge density)
W = xn + x p = xn (1 + ) ionized donors
NA
qND at the n-side
xn
1
Vbi = − 
− xp
Edx =
2
WEmax -qNA W
ionized acceptors
1 qN D EF (Electric Field)
Vbi =W xn at the p-side
2 
dEF  −qN A
1 qN D W Emax = =
= W dx   qN D
2  1+ ND Emax = x
 qN D
 n
V dEF
NA = =
dx  
2 N A + N D Replace Vbi by
W = Vbi Vbi-VF under forward bias
q N AND Vbi
Vbi+VR under reverse bias
65
p-n Junction Diodes-Operation Modes Ref. 1: 5.3.1
p-n Junction Diode under Reverse Bias

p
smaller diffusion current
R n
electrostatic potential difference

and the diffusion barrier are increased.
The balance between drift and diffusion
is disturbed.
Due to the larger diffusion barrier, the
diffusion current should obviously be
smaller than that under equilibrium.
What about the drift current? Does the drift current considerably change
with bias voltage?
smaller diffusion current
Note that the drift current is generated by the minority carriers entering (or generated at)
the depletion region (electrons in the p-side, holes in the n-side). In the absence of optical
excitation, these minority carriers are created by thermal generation. The thermal
generation rate depends on temperature and the bandgap of the semiconductor. Unless
the bandgap of the semiconductor is small, the minority carrier density will be low at room
temperature resulting in a very small drift current (as is the case in a Si diode).
66
A minority carrier (electron on the p-side or hole on the n-side) must be created in a
volume within a diffusion length from the edge of the depletion region in order to
contribute to the drift current. Remember that the diffusion length is defined as the
average distance a carrier can diffuse before being annihilated by recombination. Hence,
the minority carriers generated outside the above described region can not reach the
depletion region (and contribute to drift current) since they are annihilated by
recombination.
Now, let’s go back to our question. Does the drift current depend on the bias voltage?
The bias voltage changes the depletion region width and the E-field magnitude inside the
depletion region. A larger reverse bias results in a stronger E-field at the junction. One
can think that this leads to a larger drift current due to larger minority carrier velocity
(if the carrier velocity is not saturated). However, it can be shown that the drift current
does not depend on the velocity of the minority carriers as they transit the depletion
region since this current is limited by the generation rate of the minority carriers. In order
to make this statement more clear, let’s suppose that N electrons are generated per
second in this volume. If the E-field in the depletion region is large enough (it is!)
to result in a sufficiently large velocity (even under zero bias), then N electrons/second
are collected at the n side independent of the biasing voltage. In other words, the number
of the electrons passing to the n side (electron component of the drift current) is limited by
the electron generation rate and depends on N.
67
In summary,
Equilibrium diffusion current= Equilibrium drift current
Reverse bias diffusion current << Equilibrium diffusion current
Reverse bias drift current  Equilibrium drift current
 the current is dominated by drift under reverse bias.
 reverse bias current is bias independent.
p-n Junction Diode under Forward Bias

Diffusion
+
- F
Diffusion Current
P - + N I
+ (mostly diffusion)
- Drift +
- +
- - +
+ - + -
Drift Current
Excess electrons Depletion Region Excess holes
injected from the n-side E-field injected from the p-side
68
Equilibrium diffusion current= Equilibrium drift current
Forward bias diffusion current >> Equilibrium diffusion current
Forward bias drift current  Equilibrium drift current
 the current is dominated by diffusion under forward bias.
Since the barrier for diffusion depends strongly on the biasing

voltage, forward bias (diffusion) current is strongly bias dependent
(increases exponentially with forward bias).
69
Equilibrium
P Diffusion Current
N Drift Current
Forward Bias
P Diffusion Current
N Drift Current
Reverse Bias
P Diffusion Current
N Drift Current
p-n Junction Diodes-Exercise Question

You form a p-n junction between p-type (NA= 1x1016 cm-3 ) and n-type (NA= 1x1018
cm-3 ) Si. Calculate the depletion layer width and draw the energy band diagram of
the junction in equilibrium. Show and label the Fermi level and the (calculated)
junction potential on the diagram.
S.2-1
70
p-n Junction Diodes-Current
Q: Find the expression for the hole concentration at x=xn in terms of pn.
A:
Under equilibrium conditions: pn pp

qVBi qVBi
kT pp − −
Vbi = ln( ) or pn = p p e kT
or p( xn ) = p(− x p )e kT
q pn
p-n Junction Diodes-Current Ref.1: 5.3.2
or
Under equilibrium conditions:

qV
p( xn ) p − Bi
= n = e kT
p(− x p ) p p
Note that the built-in potential (Vbi) arises from the E-field forming at the junction to create
drift currents opposing the diffusion currents in order to meet the requirements of equilibrium
(I=0). A hole in the p-side has to overcome a potential barrier of qVBi in order to diffuse to the
n-side under equilibrium conditions. This potential barrier will be reduced by qV F if a forward
bias of VF is applied. Therefore, it is reasonable to assume that p(xn) will be increased (above
the equilibrium value) by a factor of eqVF/kTwith the application of the forward bias, VF, since
the occupancy of an energy state decreases exponentially with increasing energy.
71
Then under forward bias:

q (VBi −VF ) q (VBi −VF ) q (VBi −VF )
p( xn ) − − −
=e kT
or p( xn ) = p(− x p )e kT
 p pe kT
p(− x p )
where we have assumed that the majority carrier concentrations do not considerably
change with forward bias (low level injection) such that p(-xp) is still equal to the
equilibrium hole (majority carrier) density in the p-side (pp). Then, the ratio of the hole
concentration at x=xn to pn is expressed as
q (VBi −VF ) qVBi qVF qVF
p( xn ) p p p( xn ) −
. = =e kT
.e kT
=e kT
or p( xn ) = pn e kT
p p pn pn
qVF
Similarly, n(− x p ) = n p e
kT
Q: Find the expressions for the the excess carrier concentrations in the following diode
for x>xn and x<-xp. Assume that
• W n>>Lp and W p>>Ln where Lp and Ln are the diffusion lengths of the injected holes
and electrons in the n and p sides, respectively,
• the injection level is low enough not to change the majority carrier concentrations,
• Electric Field outside the depletion region is zero.
qVF qVF
n(− x p ) = n p e kT p( xn ) = pn e kT
Wp Wn
72
A: Let’s first try to guess the distributions of the excess holes in the n-side
and the excess electrons in the p-side before starting the quantitative analysis.
Since E-Field is zero outside the depletion region, the injected carriers move
by diffusion in the charge neutral regions. The diffusion length is defined as the
average distance a (injected or generated) carrier can diffuse before it is
annihilated (by recombination).
Since W n>>Lp and W p>>Ln , the injected excess carriers will not be able to
reach the ohmic contacts meaning that p(W n)=n(-Wp)=0. The injected
excess carrier densities on both sides decrease with distance between the
depletion layer edges and the ohmic contacts.
Do they decrease linearly? I don’t think so since a linear decrease in the

carrier concentration corresponds to a constant difffusion current. Consider the
electron diffusion current in the p-side.
n  n
J ndiff = qDn = qDn
x x
n  n
J ndiff = qDn = qDn
x x
A constant electron diffusion current requires zero recombination (and no
electron loss) since constant (position independent) electron current
means that the number of electrons passing through a location per unit
time must be uniform throughout the charge neutral n-side.
Since there exists recombination in the n- and p-sides, diffusion currents

must change (decrease) with position which is in conflict with linear
decrease in the excess carrier concentrations.
73
In order to derive the expression for the excess carrier concentrations in the
charge neutral regions (with zero E-field) the diffusion equations must be solved.
 2n n  2p p
At steady-state, = =
x 2 Dn n x 2 D p p
xp xn
0 0
The general xsolutions xof the above equations are:

n
− n
p( x) = C1e + C2 e for xn  0

Lp Lp
L p = D p τ p , hole diffusion length in the n-side
xp xp
− Ln = Dn τ n , electron diffusion length in the p − side
n( x) = C3e L + C4e
n Ln
for xp  0
Applying the boundary conditions,
qVF qVF qVF
p( xn = 0) = pn e kT − pn = pn (e kT − 1)  C1 + C2 = pn (e kT − 1),
qVF
xn → , p → 0  C1 = 0, C2 = pn (e kT − 1)
qVF qVF qVF
n( x p = 0) = n p e kT − n p = n p (e kT − 1)  C3 + C4 = n p (e kT − 1),
qVF
x p → , n → 0  C3 = 0, C4 = n p (e kT − 1)
xn xp
qVF − qVF −
Then p( xn ) = pn (e − 1)e , xn  0 , n( x p ) = n p (e − 1)e , xp  0
kT Lp kT Ln
74
qVF −
xp
n p qVF −
xn
n( x p ) = n p (e kT − 1)e p( xn ) = pn (e − 1)e

Ln kT Lp
Q: Find the current flowing through the diode under above conditions.
dp
qV
Dp F
A: For xn0, I p = −qADp = qA pn (e kT − 1)

xn = 0 dxn Lp
dn
qVF
Dn
For xp0, In x p =0
= qADn = −qA n p (e kT − 1)
dx p Ln
Note that both currents are indeed in the same direction. The difference in the sign
arises from the definition of the xn and xp coordinates in opposite directions.
If we assume that there is no recombination in the depletion region, then the electron
current at xp=0 should be equal to that at xn=0. Therefore, we obtain the total current
as the sum of the electron current at xp=0 and the hole current at xn=0.
qV qV
Dp Dn F F
I = qA( pn + n p )(e kT − 1) = I s (e kT − 1) Shockley Equation

Lp Ln Is: reverse saturation current
Remember that we have initially assumed W n>>Lp and W p>>Ln. Therefore, the above
equation is applicable only for those diodes with the p-and n-side lengths much longer
than the minority carrier diffusion lengths.
L p = D p τ p , hole diffusion length in the n-side
Ln = Dn τ n , electron diffusion length in the p − side
qVF
Lp Ln
I = qA( pn + n p )(e kT − 1)
p n Strong
temperature
dependence
Under reverse bias (V<0) with V >>kT/q,
Lp Lp ni2 Ln ni2
Ln
I = −qA( pn + n p ) = −qA( + )
p n  p ND  n N A
75
Let’s now plot the electron and hole diffusion currents through the device.
xn
−
d p
qV
Dp F
I p ( xn ) = −qAD p = qA pn (e kT − 1)e p for xn0

L
dxn Lp
xp
d n
qV
F −
D for xp0
I n ( x p ) = qADn = qA n n p (e kT − 1)e Ln
dx p Ln
Q: The total current (Ip+In) flowing through the device must be constant (position
independent). Complete the following figure by including all the current components
throughout the entire device including the depletion region. Assume that p-side NA is larger
than n-side ND.
A:
xn
qV xp
Dp qVF −
D −
I pn = qA pn (e kT − 1)e
F Lp
I np = qA n n p (e kT − 1)e Ln Lp
Ln
76
Q: Now explain the plot you have obtained (majority carrier currents).
A:
In the charge neutral regions away from the depletion region edges, the current
is carried by majority carriers. This is expected since the majority carriers lost
by recombination with the injected minority carriers and injection to the other
side must be supplied by the majority carrier (drift) currents. Note that even a
small E-field in the bulk regions is sufficient to have a large enough current due
to the large concentration of majority carriers
p-n Junction Diodes-I-V Characteristic
qV
I = Is (e kT − 1)
Is: reverse saturation current
The above equation may not accurately

describe the dependence of the diode
qV
current on the biasing voltage V in real
diodes due to nonideal effects. A more I = I s (e − 1)
nkT
accurate expression includes a nonideality
factor n .
Nonideal effects may become dominant under low and high injection levels (forward bias).
n may approach 2 under low and high forward bias voltages while it is close to 1
in a good diode under moderate forward bias.
Another nonideal effect is the increase in the reverse bias current of a diode with
increasing reverse bias voltage due to widening depletion region. The reverse current
increases approximately in proportion to (Vbi+VR)1/2.
77
p-n Junction Diodes-I-V Characteristic
Slope=decade/60 mV
Temperature Coefficient: It can be shown that the voltage drop across a forward biased
Si diode decreases by 1.8 mV for every 1 oC increase in the diode temperature.
p-n Junction Diodes-Capacitances Ref.1: 5.5.4
Junction (Depletion) Capacitance
dQdepletion  N AND A
CDEP = =A q = ,
dV 2(Vbi − V ) N A + N D WDEP
for a p+-n diode (NA>>ND) q N D
CDEP = A
2(Vbi − V )
This capacitance is dominant under reverse and low forward bias where the minority
carrier injection is not at considerable level.
Diffusion Capacitance
Diffusion capacitance arises from the minority carrier charge stored in the n and p sides
during forward bias. The bias dependency of the minority carrier charge results in a
capacitance effect.
78
p-n Junction Diodes-Capacitances Ref.1: 5.5.4
Let’s consider a long p+-n junction diode with NA>>ND and W n>>Lp.
qVF qVF
Dp Dn Dp
I = qA( pn + n p )(e kT − 1)  qA pn e kT since p n  n p
Lp Ln Lp
Charge stored under the excess hole distribution (in the n-side) is
xn
qVF − qVF
Q p = qA pn e dxn = qALp pn e kT
kT Lp
e
qV
dQp q2 A F
q
Cdiff = = L p pn e kT = I p
dVF kT kT
+
Diffusion capacitance dominates under
forward bias.
n p
p-n Junction Diodes-Zener Breakdown Ref.1: 5.4.1
In a p-n junction with both sides heavily doped (large NA on the p-side and large ND on the
n-side), reverse bias breakdown occurs at relatively low bias voltages due to tunnelling. This
breakdown mechanism is called Zener Breakdown.
With increasing reverse bias voltage, conduction band edge on the n-side eventually goes
below the valence band edge on the p-side. Once this occurs, a large number of filled states
in the p-side valence band is aligned in energy with a large number of empty states in the n-
side conduction band. Significant tunneling starts if both sides are heavily doped due to a
small depletion layer width and a low barrier for tunneling. Note that electron tunneling from
p to n side results in reverse current in the opposite direction (from n to p). If at least one
side is lightly doped, large depletion region width results in a large tunneling barrier and
avalanche breakdown occurs instead of Zener breakdown. Zener breakdown voltage
decreases with increasing temperature.
79
p-n Junction Diodes-Avalanche Breakdown Ref.1: 5.4.2
If the reverse bias voltage across the diode is increased to a large magnitude, a very
large E-field exists in the depletion region. Under this condition, the minority carriers may
acquire large kinetic energy sufficient to break a covalent bond by colliding with the
atoms (impact ionization) while passing through the depletion region. The EHPs created
by this process may also create new EHPs resulting in the EHP generation and the
reverse current through the junction growing like an avalanche (processes 1→2→3→4...).
This type of breakdown mechanism is called avalanche breakdown.
+
P 2+ +1 N
- - - + -
+
- -4 - +
3
Depletion Region
E-field
p-n Junction Diodes-Avalanche Breakdown Ref.1: 5.4.2
Avalanche breakdown voltage increases with temperature. In order

to have avalanche breakdown, at least one side of the diode must
be lightly/moderately doped, otherwise Zener breakdown occurs
due to tunneling.
80
p-n Junction Diodes-Dynamic Behavior Ref.5: 3.20
turn on storage delay time

1
Si diode
VD (V)
0
recovery
-1
capacitive behavior
2 due to junction -20 5 10 15 20
1
capacitance Time (ns)
V (V)
0 3
2
-1
IF=1.3 mA1
ID (mA)
-2
0
0 5 10 15 20
Time (ns) -1
2V − 0.7V
IF = = 1.3 mA -2
1K  IR= -2.7 mA
-3
−2V − 0.7V 0 5 10 15 20
IR = = −2.7 mA Time (ns)
1K 
p-n Junction Diodes-Dynamic Behavior Ref.5: 3.20
2
Diode voltage can not be reversed instantaneously
when the biasing voltage is switched to -2 V turn on storage delay time, S
1
reverse bias. As long as excess minority carrier
VD (V)
charge (injected during the forward bias) exists, 0

the diode voltage remains positive and small recovery
during the storage delay time. This results in a -1
large reverse current flow through the device.
−2V − 0.7V -2
IR = = −2.7 mA 0 5 10 15 20
1K  Time (ns)
After the excess charge is removed by 3

recombination (long diode) or reaching the 2
contact (short diode), large reverse bias IF=1.3 mA1
voltage starts to develop across the diode
ID (mA)
and eventually reaches -2 V (bias voltage) 0

with the diode current = -IS (very small). -1
IF -2
 S =  T ln(1 − ) IR= -2.7 mA
IR -3
0 5 10 15 20
for a short diode. Time (ns)
81
p-n Junction Diodes-Exercise Questions
In the previous section, we have worked on a long diode. Let’s now see how we should
express the diode current in the case of a short diode with p- and n-side lengths much
shorter than the diffusion lengths of the minority carriers. Note that there will exist
negligible recombination of the injected minority carriers under this condition meaning
that the diffusion currents arising from minority carrier injection should not change with
position. In addition to this information, we need the boundary conditions at the ohmic
contacts to find the excess carrier distributions throughout the diode. The excess carrier
concentration at the ohmic contacts is zero.
n=0 p=0

S.2-2
82
E.2-3 Find the expression for transit time of the holes (T) in a short p+-n junction
diode in terms of the length of the n-side (ignore depletion layer width).
S.2-3:
qVF qVF
dp p (e kT − 1) Q p qAWn pn (e kT − 1) / 2
I P = −qAD p  qAD p n = 
dxn Wn T T
Wn2
T =
2Dp

Find the expression for the diffusion capacitance of a short p +-n diode.
S.2-4
83
Consider the following silicon p+-n junction diode.
n side doping density = 1x1016 cm-3,
d=2x10-6 m
contact (built-in) potential of the diode = 0.840 V ,
hole mobility in the n-side = 250 cm2/V-sec
p in the n-side = 5x10-11 seconds,
p-n junction cross sectional area: 10-4 cm2
V= 0.640 V, Electric-field=0 for 0<x<d
The diode is under steady-state conditions.
i) Calculate the total charge due to the excess holes in the side
ii) Ignore the contribution of electrons to current and calculate the diode current
by using the excess hole charge found in the previous step.
iii) Calculate the diffusion capacitance of the diode.
S.2-5
84
CHAPTER III
Photonic Devices-
Photodetectors, Solar Cells
and Light Emitting Diodes
Photodetectors, Solar Cells and LEDs

References
1) B. G. Streetman, S. K. Banerjee, Solid State Electronic Devices,6th Edition,

4) http://en.wikipedia.org/wiki/Solar_cell
85
Optoelectronic devices detecting electromagnetic radition have found a wide application area both
as discrete sensors and integrated sensor arrays. Photodetectors sensing in various wavelenght
bands such as x-ray, UV, visible and infrared are enjoying enlarging markets for a wide range of
applications.
Particular applications which have significantly increased the demand to photodetectors are optical
communication, signal processing and data storage. Utilization of photons with very desirable
properties for this purpose is realized through devices emitting and detecting light at a wavelength
proper for the application.
Imaging is another area where photodetector technology has a huge market. Due to the wide
electromagnetic spectrum covering the operation of various sensors, many different
semiconductors and detector technologies are employed for imaging in different bands.
Due to the increasing energy demand, the importance of solar cell technology converting solar
energy into electricity should be obvious, The Sun is sourcing an enormous amount of energy. The
utilization of this huge energy source properly depends (at least) partly on the development of the
solar cell technology.
Since the focus of this course is on the electron devices, we will present a very brief introduction to
optical devices at a preliminary level by leaving a very important type of optical device, the LASER,
out of discussion. Optical devices are discussed with much wider coverage in the senior level
course EE 419-Solid State Devices.
Optical Absorption Processes in Semiconductors
Semiconductor c (µm)
Si 1.1
GaAs 0.89
InP 1
In0.53Ga0.47As 1.7
InSb 5.5
HgxCd1-xTe 1-25
hc 1.24
c = = where E g is in eV and λ in μm
Eg Eg
86
Photodetectors- Photoconductor Ref. 2: 10.4
Photoconductor
dn photons
= p( 2 ).wL (cm 2 ). (electrons / photons )
dt cm − sec
electron photo-generation rate quantum efficiency

Photodetectors- Photoconductor Ref. 2: 10.4
I total = JA =  Ewt = ( dark +  ) Ewt =  p Ewt

I dark =  dark Ewt ,  dark = q( n no +  p po )
 p = q[ n (no +  n) +  p ( po +  p )] where  n =  p = gop p
 = q( n +  p ) n
I photo =  Ewt = q( n +  p ) n Ewt = q ( n +  p ) gop n Ewt
87
Photodetectors- Photovoltaic Detectors Ref. 1: 8.1.1
Photovoltaic Detectors
Photoconductors are not suitable devices for large format imaging arrays including
many pixels with small dimensions since a photoconductor needs a large enough
biasing voltage to create a sufficiently large E-field for the collection of photo-generated
carriers. A reverse biased p-n junction, on the other hand, does not need a large biasing
voltage and it operates with a very small current level being compatible with dense
arrays for high resolution imaging.
VB Dark Current (=0)
−1
Operating  J 
EHP Generation R0 A =  
Substrate (transparent to IR radiation)
Point
 V  |Vb =0
Photocurrent Generation
EHP/(cm3-sec)
I photo = qAgop Ln + qAgopW + qAgop L p = qAgop ( L p + Ln + W )
charge generated charge generated charge generated

per second in per second in per second in
diffusion region in p-side depletion region diffusion region in n-side
88
For a long diode, Lp qV

Ln
I total = qA( pn + np )(e kT − 1) − qAg op ( L p + Ln + W )
p n
Under reverse bias (V<0) with V >>kT/q,

Lp L
I total = −qA( pn + n n p ) − qAg op ( L p + Ln + W )]
Strong p n
temperature
dependence L p ni2 Ln ni2
= −qA( + ) − qAg op ( L p + Ln + W )
 p ND  n N A
current due to thermally << current due to optically

generated carriers (Idark) generated carriers (Iphoto)
must hold to have large S/N

cool down the diode if you are dealing
with low band semiconductors (large ni).
As an example infrared sensors
for thermal imagers operate with cooling.
Solar Cells Ref. 1: 8.1.1, 8.1.2, Ref. 2: 10.3.1
Solar Cell is a device used to convert radiation energy to electricity. The most powerful
source of radiation is, of course, the Sun which is expected to continue to provide
huge energy output for billions of years.
The conventional solar cell is a large area p-n junction. As shown below, in the fourth
quadrant of its I-V characteristic, an illuminated p-n junction delivers power to a resistor
connected between its terminals.
R I
I
p n
V
+ V -
89
The total current through an illuminated p-n

junction is
qV
I total = I S (e nkT − 1) − I photo
In the case R→ (open circuit) the voltage developing on the p-n junction is called
open circuit voltage, VOC. For Si solar cells, VOC0.7 V.
nkT I photo
VOC = ln(1 + )
q IS
In the case R=0 (short circuit) the current through the the p-n junction is called
short circuit current, ISC=Iphoto.
I I Maximum
Power Point
ISC
Imax
V Vmax VOC V
Pmax I V
ce = x100 = max max x100 Ff =
I maxVmax
Pinput Pinput I SCVOC
conversion efficiency optical power
fill factor
F f I SCVOC
ce = x100
Pinput
90
Solar Cells Ref. 3: 9.3.1, Ref. 4
Materials commonly employed for solar cells: Si (monocrystalline, polycrystalline,

amorphous), CdTe and GaAs.
Solar Cell Structure
LEDs Ref. 3: 9.4.1
Light Emitting Diode (LED)

LEDs utilize the emission of photons through radiative recombination of electrons-
holes to emit light. The photon emission wavelength is dependent on the energy
bandgap of the material. Therefore, different semiconductors are needed for light
emission at different colors.
Electron Injection
emitted photons
I
absorbed photons
Hole Injection
91
LEDs
Dominant radiative recombination must take place at a location close to the surface
in order to minimize reabsorption.
Ref. 2
qV qV
Dp Dn
I p = qA pn (e kT − 1), I n = qA n p (e kT − 1)
Lp Ln
In case the top layer is p-type as shown above, In must be much larger than Ip in order
to have most recombination (and emission) occuring in the p-type layer
(close to the surface).
LEDs
http://en.wikipedia.org/wiki/File:LED,_5mm,_green_(en).svg
Author: inductiveload
92
HOMEWORK 3
HMW-3.1 Homework 3
Circle the correct answer for the following 30 questions.
93
HMW-3.1 Homework 3
HMW-3.1 Homework 3
94
HMW-3.1 Homework 3
• The nonideality factor (n) in a typical Si p-n junction may approach 2 under
a) low forward bias voltages only
b) reverse bias only
c) moderately large forward bias only
d) low and high forward bias voltages
• When the reverse bias voltage magnitude (Vr) across a p-n junction diode is increased, the depletion
capacitance
a) is increased in proportion to (Vbi+Vr)
b) is increased in proportion to (Vbi+Vr)1/2
c) does not change
d) is decreased in proportion to (Vbi+Vr)
e) is decreased in proportion to (Vbi+Vr)1/2
• When a p-n junction diode is switched from forward to reverse bias at t=0,
i) a considerable current may flow through the junction at t=0+
ii) the junction voltage keeps nearly its forward bias value for a while
iii) the magnitude of the diode current is decreased to (approximately) Is at steady state under
reverse bias
a) only i b) i and ii c) i and iii d) ii and iii e) i, ii and iii
• The reverse current through an ideal p-n junction diode is almost independent of the applied reverse voltage
(if │Vr│ >>kT/q). This is because this current
a) is not sensitive to the height of the potential energy barrier (barrier for diffusion).
b) is mainly limited by how often the minority carriers are swept through the depletion region to the other side of the
diode
c) is due to majority carriers
d) is mainly limited by how fast the carriers are swept through depletion region to the other side of the diode.
HMW-3.1 Homework 3
• The storage delay time of a p-n junction diode is defined as the amount of time
a) required to get rid of the excess carriers injected during forward bias
b) required to decrease the diode current to the steady-state reverse bias value after the
bias is switched from forward to reverse
c) required to increase the diode current to the steady-state forward bias value after a
forward bias is applied to the diode under equilibrium
d) required to decrease the diode current to 1/e of its value after the bias is switched from
forward to reverse
• In a p+-n junction diode,
i) Zener breakdown occurs before the avalanche breakdown
ii) the magnitude of the breakdown voltage increases with increasing temperature
iii) the breakdown voltage is independent of the doping densities
a) only i b) i and ii c) only ii d) ii and iii e) i, ii and iii
• In a p-n junction diode, avalanche breakdown occurs due to
i) tunneling
ii) the large E-field in the depletion region under large reverse bias
iii) breaking of covalent bonds by highly energetic carriers in the depletion region
a) only i b) i and ii c) only ii d) ii and iii e) i, ii and iii
95
HMW-3.1 Homework 3
• At the onset of Zener breakdown in p-n junction diode,
i) the conduction band minimum of n side is aligned with the valence band maximum of p-side
ii) tunneling of electrons starts from the empty states (holes) in the valence band of the p-side
to the filled states in the conduction band of the n-side
iii) the energies of some of the filled valence band states in the p-type material are aligned with
some empty conduction band states in the n-type material
a) only i b) i and ii c) i and iii d) ii and iii e) i, ii and iii
• The transit time of holes (in the n-side) in a short p+-n junction diode, does not significantly
depend on
a) p in n-side b)Dp in n-side c) n-side length d)biasing voltage e)doping density in n-side
• The switching (from forward to reverse) speed of a long p+-n junction diode can
considerably be increased by
a) decreasing the hole recombination lifetime in the n-side
b) increasing the forward bias voltage
c) increasing the diode area
d) decreasing the depletion capacitance
• In a p+-n junction diode under forward bias
a) the diode current is dominated by electron diffusion
b) diode capacitance is mostly determined by the junction (depletion) capacitance
c) the voltage drop on the diode decreases with increasing temperature
d) the diode current does not depend on the doping density in the n-side
HMW-3.1 Homework 3
96
HMW-3.1 Homework 3
HMW-3.1 Homework 3
• The cut off wavelength of a photodetector fabricated wih a semiconductor with energy
bandgap of 1.24 eV will be
a) 1.24 m b) 1 m c) 0.62 m d) 2.48 m e) 3.72 m
• If a photoconductor is exposed to illumination (low level excitation) with an optical

generation rate of gop and the electron recombination lifetime=hole recombination
lifetime=, the illumination induced change in the conductivity of the material (at steady-
state) will be
a) (n+p)gop b) q(n+p)gop c) q(n+p)gop d) (n+p)gop e) q(n+p)gop
• Photovoltaic photodetectors fabricated with low energy bandgap semiconductors need
cooling in order to provide good performance. Why?
a) to increase the thermally generated minority carrier concentration
b) to decrease ni
c) to partially ionize the impurity atoms
d) to increase the quantum efficiency
• The conversion efficiency of a solar cell is defined as
a) (Electrical Power Output/Optical Power Input)x100
b) (Optical Power Output/Electrical Power Input)x100
c) (Electrical Power Output/Electrical Power Input)x100
d) (Optical Power Output/Optical Power Input)x100
97
HMW-3.2 Homework 3
HMW-3.2 Homework 3
98
HMW-3.2 Homework 3
HMW-3.3 Homework 3
99
HMW-3.4 Homework 3
HMW-3.5 Homework 3
100
HMW-3.6 Homework 3
CHAPTER IV
Bipolar Junction Transistors
101
Bipolar Junction Transistors
References
3) A. S. Sedra and K. C. Smith, Microelectronic Circuits, Oxford University Press, 5th

Edition, 2004.
4) R. C. Jaeger and T. N. Blalock, Microelectronic Circuit Design,Mc Graw Hill, 2nd

Edition, 2004.
Bipolar Junction Transistors Ref. 5

• After its invention in 1947 by Bardeen, Brattain and Shockley, BJT had functioned for
a long time as the only three-terminal device starting a new era in electronics. After the
characteristics of the MOSFETs were improved by increasing the quality of the Si-SiO2
interface, BJT has been challenged by the MOSFETs which have replaced BJTs in a
group of applications. However, BJTs, still find a wide application area with certain
properties that can not be fullfilled by the field-effect transistors such as high current
handling capability and a larger transconductance.
•The objective of this chapter is to provide a sound understanding of the BJT

operational principles and physics.
•After studying this chapter, you will have an understanding of the device behavior and
characteristics as well as the model parameters used by circuit simulators such as
SPICE. This background will allow the utilization of this device in integrated and
discrete circuit design more efficiently.
102
Kvin
or
Kin
Controlled Current Source
Kvin Voltage Controlled
or
vo = − Kvin RL = − Kin rin RL = − KRL vs Kin Current Controlled
vin=vs Amplification if KRL>1
BJTs- Constructing the Transistor Ref. 1: 7.1

Now let’s see how we can construct a controlled current source by using semiconductors.
So far we are familiar with p-n junctions which (under ideal conditions) provide a bias
independent current in the reverse bias region. This (drift) current is established by the
minority carriers created around the depletion region.
Current (nA)
-0.1
-0.2
-0.3
-10 -8 -6 -4 -2 0
Reverse Bias Voltage (V)
Minority carriers that are able to

Other minority carriers are lost by
diffuse up to the depletion region
recombination before they reach the
(created within a diffusion length
depletion region (do not contribute to
from the depletion layer edge)
the drift current).
contribute to the drift current.
103
-0.1
T1
-0.2
Current (nA)
-0.3 T2
increasing T
-0.4
T3
-0.5
-0.6 T4
-0.7
-10 -8 -6 -4 -2 0
Reverse Bias Voltage (V)
Reverse (drift) current can be controlled by the minority

carrier generation rate which depends on temperature
and optical excitation rate (if illumination exists).
Looks like the characteristics of a controlled current source. However, (of course) it is
not a good idea to control the current with temperature and/or optical illumination for
amplification.
Furthermore, the drift current due to thermally generated minority carriers is too low
(with the bandgap of typical semiconductors such as Si).
We should find a way to control the reverse current of a p-n junction electrically. This is
equivalent to controlling the electron (minority carrier) concentration in this region with
a bias voltage (or current).
Current
Rate 1 Rate 2
Large Small
Reverse Bias Voltage (V) Current Current
We need an adjustable electron injector that should be integrated with a reverse

biased p-n junction.
104
Adjustable Electron Injector Current Source

Forward Biased p-n Junction Reverse Biased p-n Junction
Electron Injection Rate
Adjustable by VF
Hole Injection
VF Integrate VR
Current (I)
WB VF2
VF1
VR
E-Field
I
VF VR
Adjustable Electron Injector Current Source

Forward Biased p-n Junction Reverse Biased p-n Junction
WB
Emitter
E C Collector
Base
B E-Field
I
VF VR
Due to the forward bias across the BE junction electrons are injected (from the emitter) into
the base. Some of the injected electrons recombine with the holes in the base. However, most
of them reach the BC depletion region (if W B<<Ln). Electrons reaching the BC depletion
region are swept by the E-field into the collector establishing the collector current which is
the drift curent of the reverse biased BC junction. Note that this current is much larger than
the drift (reverse) current in a typical p-n junction since the injected electron density is typically
much larger than that created by thermal generation in a p-n junction diode.
In a p-n junction diode the reverse current depends on temperature through the thermal
generation rate of the minority carriers. In a BJT, the collector current depends on the injected
minority carrier density which is adjustable by the forward bias voltage across the BE junction.
105
BJTs-Operation Ref. 1: 7.1
recombination
IEn: electron component of the emitter current

IEp: hole component of the emitter current
IE: total emitter current
IC: collector current
IB: base current
Q: What are the mechanisms establishing the base current?

A:
•Hole injection from the base into the emitter leads to hole depletion in the base. These
holes lost due to injection must be resupplied through the base contact.
• Some of the electrons injected from the emitter recombine with the holes in the base.
These holes lost due to recombination must be resupplied through the base contact.
• Thermally generated holes (minority carriers) in the collector are swept into the base (by
the E-field of BC depletion layer). This mechanism decreases the amount of hole flow
into the base through the base terminal (base current).
106
Q: What happens when the base terminal is open circuited?

A: Hole flow into the base is stopped. No resupply of holes lost due to recombination
with the injected electrons and injection from the base to emitter→negative charge
build up in the base→loss of forward bias across the emitter-base junction→no more
minority carrier injection from the emitter into the base→IE=IC0.
The amount of electron flow through the base (and therefore the collector current) can
be adjusted through the control of the base current (large I B→large IC).
• If the base width is kept small, only a small fraction of the injected electrons
recombines in the base.
• If the emitter doping is much larger than the base doping, the electron injection from
the emitter into the base is much larger than hole injection from base into emitter.
The above conditions result in a collector current much larger than the base current.
Current Gain!
IEn(1) Thermally Generated

Current (IC)
Ignore 4 and 5 Minority Carriers

Emitter IEp(2) WB Collector VBE2
under typical
conditions 6 VBE1
1 C
E 7 + 4
3
5 VR
2
( 1+2) IE Base B IB E-Field IC (6)
injected minority
carriers
(2+3)
VBE IE=IB+IC VCB

4 and 5 are very small (due low to thermal generation rate ( in Si at 300 K )).
Ignore 4 and 5 and define IC BI En
= = = B
I En (1) IE I En + I Ep
= = ( Emitter Injection Efficiency )
I En + I Ep (1) + (2)
I B = I Ep + (1 − B ) I En
I (6)
B= C = ( Base Transport Factor ) IC BI En
I En (1) = =
IC (6) IB I Ep + (1 − B ) I En
= = (Current Gain)
I B (2) + (3) BI En / I E B 
= = =
I
= C =
(6)
(Current Transfer Ratio) ( I Ep + (1 − B) I En ) / I E 1 − B 1 − 
I E (1) + (2)
107
IEn(1)
IEp(2) WB
6
E + 1 C
2 3
IE B IC
IB E-Field
I En (1) VBE IE=IB+IC VCB

= =
I En + I Ep (1) + (2) In a Good npn BJT:
WB<<Ln to minimize (3), IEnIC, B1
I C (6)
B= =
I En (1) (1)>>(2) to make IEIEn . ((2) does not contibute to IC).
This can be achieved by doping Emiter heavily with
IC (6)
= = respect to Base.
I B (2) + (3)
IC (6) If both conditions are satisfied, IEIC→IB0 → high  and 1.
= = Large Current Gain!
I E (1) + (2)
BJTs-pnp BJT
CHECK YOURSELF-POINT 
Q: Convert the previous slide for a pnp BJT.
E + C
= In a Good pnp BJT:
B=
=
=
108
CHECK YOURSELF-POINT

Q: Explain the relation between the  of an npn BJT and the electron recombination
lifetime and the electron transit time in the base. Assume unity emitter injection efficiency.
BJTs- Circuit Symbols
Collector Collector
-
+ n VBC p
VCB IC IC
Base
- Base +
+ -
p VCE=VCB+VBE IB n VEC=VEB+VBC
IB - +
-
+ VEB IE
VBE IE +
- p Emitter
n Emitter
npn BJT I E = IC + I B pnp BJT

IC =  I E
with BE junction forward- and
IC =  I B BC junction reverse-biased
I E = (  + 1) I B
109
BJTs- Operation
Configurations
Output
Output
Input +
Input VCB
-
Common Base
Common Emitter
Input
Output
Common Collector
BJTs- Operation
Common Base IC-VCB characteristics of the npn BJT.
IC
IC=IE
+
VCB
-
IE 
0 VCB IC
110
BJTs-Operation
Q: The following figure shows the picture of an npn BJT fabricated on a Si wafer.
Discuss the effects of exchanging the emitter and collector terminals on the device
performance (Does the device offer the same current gain if the collector is used as
emitter (and the emitter as collector) while BC junction is forward- and BE junction is
reverse-biased?)
Emitter Contact Base Contact
Collector Contact
BJTs-Operation Modes
BE Junction BC Junction Mode npn pnp

Forward Forward Saturation VBE>0 VEB>0
VBC>0 VCB>0
Forward Reverse Forward Active VBE>0 VEB>0

VBC<0 VCB<0
Reverse Forward Reverse Active VBE<0 VEB<0

VBC>0 VCB>0
Reverse Reverse Cut off VBE<0 VEB<0

VBC<0 VCB<0
111
BJTs- Characteristics Ref. 4: 5.7
IC-VCE (Common Emitter) Characteristics of the npn BJT
100 A
0.78 V
VCB= 0V VBE IB 80 A
0.77 V
Saturation
Forward Active 60 A
Saturation
Forward Active
0.76 V
40 A
0.75 V
0.74 V 20 A
0.73 V
Cut-off (IB=0)
0.72 V
Deep Saturation
VBE
BJTs- Characteristics
Q: Explain the variation of IC (with VCE) in the saturation region.
VCE=VCB+VBE
A: Start from the boundary between FA and SAT regions on a curve (say VBE=0.75 V) and
decrease VCE. As VCE goes below =0.75 V, VCB will be negative (BC junction is forward biased).
Forward bias across the BC junction results in electron injection from the collector into base
opposing the injection from the emitter. As VCE is decreased further with VBE kept constant, the
forward bias across the BC junction is increased. Therefore, I C is decreased with decreasing VCE.
Note that
ICIB
in SAT.
VBE VBC
112
Q: Convert the common emitter characteristics for a pnp BJT.
Saturation = 0V
Forward Active
Q: Determine the relations between the terminal currents in the reverse active mode
of the npn BJT.
A:
Collector
VCB< 0
+ n
I E =  R IC Forward Biased
-
IC
Base
IE = R IB p Electron Flow
IB
IC = (  R + 1) I B +
VBE< 0 IE
R Reverse Biased
-
n
R = Emitter
R +1 npn BJT
113
BJTs- Characteristics Ref. 4: 5.7
 F=100,  R=10
VBE>0
VBC>0 100 A
VBE>VBC
80 A
Forward Sat.
IC
Reverse Sat.
VBE>0 IB 60 A
VBC>0 40 A
VBC>VBE Forward Active
20 A
Reverse Active
Both Junctions
Forward Biased
VCE=VCB+VBE=VBE-VBC
Q: Plot the IB-VBE characteristics of the npn BJT.
114
HOMEWORK 4
HMW-4.1 Homework 4
• How would you describe an ideal pnp BJT biased in the proper mode for amplification?
a) as a reverse biased n-p junction integrated with a hole injector
b) as a forward biased p-n junction integrated with a hole collector
c) as a device providing a controlled terminal current indepent of the terminal voltage
d) as a current amplifier
• A BJT can be used as a good amplifier of AC signals, if
a) it is an npn BJT
b) it operates in the saturation region
c) it operates as a controlled current source
d) it has an emitter injection efficiency >> 1
e) All of the above
• Consider a npn BJT biased in the proper mode for amplification. The function of the emitter
in this BJT is
a) to provide the electrons for the drift current through the B-C junction
b) to provide the holes lost from the base in order to maintain charge neutrality
c) to maintain an emitter current independent of the E-B biasing voltage
d) to provide majority carriers (holes) to the base in order to establish the collector current
• If the electron recombination lifetime in the base and the base transit time are represented
by n and T in a typical npn BJT with an emitter injection efficiency smaller than 1,
a) =n/T b) =T/n c) >n/T d) <n/T e) >T/n
115
HMW-4.1 Homework 4
HMW-4.1 Homework 4
116
HMW-4.1 Homework 4
HMW-4.1 Homework 4
117
HMW-4.1 Homework 4
HMW-4.1 Homework 4
118
HMW-4.1 Homework 4
HMW-4.2 Homework 4
119
HMW-4.3 Homework 4
BJTs-Terminal Current Expressions Ref. 5: 7.3.2
WE IB
pne,, npb and pnc are the

qVBE
equilibrium minority kT
carrier concentrations in n pb e
qVBE
the emitter, base and collector. kT
pne e
Assume W E>>Lp pnc qV
npb − qVCB − CB
kT
pne n pb e kT p nc e
xE 0 0 xB 0 2 xC
ni2 n ni2
Assume doping levels >> n i  pne = , n pb = i , pnc =
N DEmitter N ABase N DCollector
120
BJTs-Ebers-Moll Model Ref. 5: 7.3.4
Let’s now construct an equivalent circuit for the BJT which will be applicable under
any biasing condition (F.A, SAT, cut-off or reverse active).
RIR FIF
E C
- VBE + + VBC -
IE IC
IB
IF B IR
qVBE qVBC
I F = I ES (e kT
− 1) I R = I CS (e kT
− 1)
IES: saturation current of the EB junction with B shorted to C (V BC=0).
ICS: saturation current of the CB junction with E shorted to B (V BE=0).
qVBE qVBC Note that FIES=RICS
I E = I ES (e kT
− 1) −  R I CS (e kT
− 1) These equations are known as
qVBE qVBC the Ebers-Moll model
I C =  F I ES (e kT
− 1) − I CS (e kT
− 1) for the npn BJT.
BJTs-Ebers-Moll Model
qVBE qVBC
I E = I ES (e kT
− 1) −  R I CS (e kT
− 1)
qVBE qVBC
I C =  F I ES (e kT
− 1) − I CS (e kT
− 1)
Define FIES=RICS=IS
qVBE qVBC qVBE qVBC qVBE
IS IS
IE = (e kT
− 1) − I S (e kT
− 1) = I S (e kT
−e kT
)+ (e kT
− 1)
F F
qVBE qVBC qVBE qVBC qVBC
IS IS
I C = I S (e kT
− 1) − (e kT
− 1) = I S (e kT
−e kT
)− (e kT
− 1)
R R
qVBC qVBE
IS IS 
I B = I E − IC = (e kT
− 1) + (e kT
− 1) ( Note that  = )
R F  +1
121
Q: Explain (qualitatively) the following difference between the IC-VCE
characteristics of npn BJTs with different R.
IS=1x10-15 A, F=100, R=1 IS=1x10-15 A, F=100, R=10
Q: Construct the Ebers-Moll model for the pnp BJT (equivalent circuit and the
terminal current expressions).
122
BJTs-Ebers-Moll Model Ref. 4: 5.9.2
Now, let’s simplify the Ebers-Moll model for the npn BJT for F.A. Region operation
with VBE>> kT/q, VCB >> kT/q
qVBE
qVBE qVBC
IS qVBE qVBE
IS qVBE
 + 1 qVkT I e kT
BE
I E = I S (e kT
−e kT
)+ (e kT
− 1)  I S e kT
+ e kT
= F ISe = S
F F F F
qVBE qVBC qVBC qVBE
IS
I C = I S (e kT
−e kT
)− (e kT
− 1)  I S e kT
= F IE F
R ( Note that  F = )
qVBE F +1
qVBC qVBE kT
IS IS IS e IC
IB = (e kT
− 1) + (e kT
− 1)  =
R F F F
Equivalent Circuit IC=FIB
IB
IC =  F I B , I E = (  F + 1) I B B
+ C
0.7 V
 F IB
-
IE=(F+1)IB E
Q: Find the collector current of the BJT in the following circuit. F=100.
A: 10 V
B IB
IC=FIB
+ C
RC 5 K 5V RB 0.7 V
 F IB RC
-
RB 10 K
10 V
5V + IE=(F+1)IB E
VBE
-
RE
RE 5 K
Assume F.A. Region Operation.
5 V = I B RB + 0.7 V + (  F + 1) I B RE
I B = 6.4  A, IC =  F I B = 0.64 mA
Obviously, VBE >0 V.
VC = 10 V − RC IC = 6.8 V
VB = 5 V − I B RB = 4.9 V
VB  VE , VC  VB  F.A. Region 
123
BJTs-Secondary Effects Ref. 4: 5.10.1, 5.10.2
Base Width Modulation
So far we have considered the BJT as an ideal current source in the forward active
region assuming that the collector current does not change with V CE. On the other hand,
IC-VCE characteristics of a real BJT are as shown below due to the change in the
base width with the reverse bias voltage across the B-C junction. This known as the base
width modulation effect or Early effect. qVBE
IC2 I C  I S e kT in F.A. region
IC1
npn BJT I C1 IC 2
=
VA + VCE1 VA + VCE 2
−1
 dI  zero VCB IS
ro =  C  VA VA+VCB
 dVCE  I C 2 VA + VCB V
 → I S = I SO (1 + CB )
I C1 VA VA
VA (Early Voltage) VCE1 VCE2
Ideal BJT
in the F.A.
IC + Ideal Real BJT
IC
I
+ current in the F.A. +
mode I
VCE  rO
mode +
V source VCE  V
- -
- -
BJTs-Secondary Effects
Let’s see how the collector current increases with increasing V CE in the F.A. region.
E B qV C
BE
VCB2> VCB1
kT
n pb e
qVBE VCB
kT
pne e
pnc
qVCB
npb − qVCB −
pne n pb e kT pnc e kT
xE 0 0 xB 0 xC
W B2 W B1
As VCE is increased by keeping the VBE constant, the reverse bias voltage (VCB) across
the BC junction is also increased. Due to the larger excess minority carrier concentration
gradient in the base, IEn, being proportional to dn(xB)/dxB, attains a larger value.
It should be noted that base width reduction also increases the current gain () of the
device due to the increase in the base transport factor (less recombination in the base).
124
BJTs-Secondary Effects Ref. 5: 7.5.3
Avalanche Breakdown
If the reverse bias across a junction (BE or BC) exceeds the breakdown voltage,
avalanche breakdown occurs resulting in loss of useful transistor action.
Common Base Common Emitter
IE=0 IB=0
BVCBO BVCEO
+
VCC=VCE
IE +
V =V
-
- CC CB IB
BJTs-Secondary Effects
Q: Which junction (BE or BC) has a larger breakdown voltage?
A: Remember that emitter is heavily doped in order to have a good emitter injection
efficiency. Therefore the emitter doping is higher than the collector doping making the
avalanche breakdown voltage of the BC junction larger than that of the BE junction.
This does not create a problem for a BJT operating in the forward active region
since the BE junction is forward biased in this mode.
Collector doping must be selected by taking the breakdown voltage (maximum BC

junction reverse bias) into account.
125
BJTs-Biasing
Biasing: In order to use the BJT in a specific mode of operation, proper biasing
voltages must be applied to the device terminals. As an example, the device is used
in the forward active mode (as a controlled current source) for the amplification of ac
signals.
Biasing establishes the operating point of the transistor which determines the device
parameters governing the characteristics of the circuit such as the gain, input
resistance and the output voltage swing of an amplifier.
Therefore, the biasing circuit must be carefully designed to achieve the optimum circuit
Performance. VCC
R1 RC An example circuit biasing the BJT in the F. A. region

using a DC power supply (VCC) and resistors.
+
VBE
-
R2 RE
BJTs-Biasing Ref. 3: 5.5.1
BJT operates in the F.A. region, if RC is selected properly

to yield VC > VB.
VCC VCC
R1 RC RC
RR
Voltage divider (with VC RBB = 1 2 IC
VCC) establishes the R1 + R2 +
VB n
BE junction forward p VCE
+ RBB + -
biasing voltage. VBE
-
n = VBB + IB
VBE
-
- R2 IE
VBB = VCC
R2 R1 + R2
VBB = RBB I B + VBE

V − VBE
I B = BB , IC = I B , I E =( +1)I B ,
A single DC power supply is sufficient to RBB
forward bias the BE junction and reverse VCE =VCC -IC R C , Q-point: (IC , VCE )
bias the BC junction at the same time.
IB is dependent on VBE, IC is dependent on   this is not a good design since it does
not provide Q-point (bias) stability. As an example, if the BJT is replaced with another
one with a different , a different Q-point is measured or the change in the temperature
(changing the BJT characteristics) results in a shift of the Q-point.
126
Let’s add a resistor (RE) to the emitter.

R2 VCC
VCC VBB = VCC
R1 + R2
RC
R1 RC R1R2
RBB =
R1 + R2 IC
+
VCE
RBB + -
+
VBE = VBB + IB
VBE
-
- - IE
RE
R2 RE
VBB = RBB I B + VBE + RE I E = RBB I B + VBE + RE (  + 1) I B
VBB − VBE
IB = , IC = I B , I E =( +1)I B , VCE =VCC -IC R C -I E R E
RBB + (  + 1) RE
Q-point: (I , V ) Assume large  IE and IC are
C CE
VBB VBB stabilized!
if ( +1)R E  RBB and VBB  VBE , I B  , IC  I E   I B 
(  + 1) RE RE
Q: How does the addition of RE provide Q-point stability?;
Let’s assume that IC and IE are increased

for some reason. This will increase VE
resulting in a smaller VBE if VB is almost
fixed. Decrease in VBE calls for a decrease
in IC and IE. The feedback action of RE
keeps IC (and VCE) constant.
VB
Q: How do I assure a constant VB?
A:
I
VB = VBB − I B RBB = VBB − E RBB
+
VE  +1
VE
fixed should be
-
small enough
to have negligibly
small voltage drop
on RBB
R2 I
VB  VBB = VCC  VE = I E RE  E RBB  (  + 1) RE  RBB
R1 + R2  +1
127

Q: Show that the above condition is equivalent to having I1>>IB and I1I2.
VCC
R1 RC
I1
IB
+
VBE
-
I2
R2 RE
Do not choose R1 and R2 too low in order to achieve a small RBB. Small R1 and R2
leads to a large current sink from the power supply as well as a low small signal input
resistance (as we will see later).
VCC
VCC
R1R2 RC
RBB = IC
R1 R1 + R2
I1 RC
+
IB = IB +
VCE
RBB VBE - IE
VBB + -
+
VBE -
- RE
I2 RE
R2
Choosing R1 and R2 to yield I1I2IC/10 will be acceptable under typical conditions.
128
BJTs-Biasing
Q: Find the Q-point of the BJT in the following circuit.
10 V
VCC R2 VCC
VBB = VCC = 3.33 V
R1 + R2
R1 RC
RC 3 K R1R2
100 K RBB = = 33.3 K 
R1 + R2 IC
+
=100 VCE
VBE=0.7 V + RBB + -
VBE
-
= VBB + IB
VBE
-
- IE
RE RE
R2 2.33 K
50 K
VBB = RBB I B + VBE + RE I E = RBB I B + VBE + RE (  + 1) I B
VBB − VBE 3.33 − 0.7

IB = =  10  A
RBB + (  + 1) RE 33.3 + 101x 2.33
IC = I B =1 mA  I E , VCE =VCC -IC R C -I E R E  4.7 V
Q-point: (1 mA, 4.7 V)
BJTs-Biasing
Q: How do I find the Q-point, if the BJT I-V characteristics are provided?
A:
1.88
IB
IC (mA)
Q-Point
1 IB= 10 A
Load Line
2 4 6 8 10 12 14 16
4.7
VCE =VCC -IC R C -I E R E  VCC -IC (R C +R E ) =10 V-IC x5.33K 
129
BJTs-Biasing
Q: How do you perform a more accurate analysis if the IB-VBE characteristic
of the BJT is provided.
BJTs-Biasing
Q: How does the Q-point change when RC is increased by keeping the BJT in the
F. A. region?
S:
VCE =VCC -IC R C -I E R E  VCC -IC (R C +R E )

Note that IC is independent of VCB (and VCE with fixed with VBE) as long as the BJT
remains in the forward active region. IC is dependent on VBB, RBB and RE through VBE
and IB. It does not depend on RC since variation in RC is reflected as a change in VCE
which (ideally) has no effect on IC in the F. A. region.
130
BJTs-Biasing
Q: Find the required value of RC to operate the BJT on the boundary between the
F.A. and saturation regions with IB=10 A.
S:
Let’s define the boundary between the F.A. and saturation regions with V CE=0.2 V.
VCE =VCC -IC R C -I E R E  VCC -IC (R C +R E )=10- 1 mA(R C +2.33 K)=0.2 V

R C  7.5K 
Note that IC is constant at 1 mA up to the boundary.
BJTs-Biasing
Q: Find the collector current in the following circuit.
A: Since RC >7.5 K, BJT is in the saturation region.
Assume VCEsat 0.2 V.
10 K
3.33V = 33.3KI B + 0.7V + 2.33KI E
10V = 10 KI C + VCEsat + 2.33KI E
I E = IC + I B
Solve to get
I E = 0.81 mA
I C = 0.79 mA
I B = 0.02 mA
IC   I B
If RC is increased to 20 K, IE=0.488 mA, IC=0.443 mA, IB=0.045 mA.
131
BJTs-Biasing Design Guidelines Ref. 3: 5.5.1, Ref. 4: 5.12.2
VCC In order to achieve a specific IC with a given min and VCC
+ • RE=VCC/(3IE) VCC/(3IC)
R1 RC Vcc/3
I1 - • Make I1 >> IBmax=IC/min, choose I1=IC/10 if  is sufficiently
IB VC large (make sure I1  10 IB) → VBVccR2/(R1+R2) VE=Vcc/3
+
VB Vcc/3 • R + R  VCC , V  V R2 V
1 2 B CC = CC ,
- I1 R1 + R2 3
VE
I2 + Find R 1 and R 2 .
RE Vcc/3
• R = VCC − Vc
R2
- c
IC
BJTs-Biasing with a Current Source Ref. 3
VCC
Current I forced through the emitter develops a forward biasing
RC voltage across the BE junction.
The BJT operates in the F.A. Region (Is there any other possible
mode of operation in this configuration?)
+
VBE Main Advantage:
RB -
I Stable emitter and collector currents with the freedom of
selecting RB large (high input resistance).
132
BJTs-EXERCISE QUESTIONS
E.4-1: (to be solved on white board) IB-VBE characteristic of the npn BJT used in the
following circuit is given below. Emitter injection efficiency and base transport factor of the BJT
are both equal to 0.995. Contribution of the thermally generated minority carriers around the
B-C depletion region to base current is negligible.
a) Find the collector current and collector-emitter voltage of the BJT in the following
circuit, and plot the IC-VCE characteristic of the BJT on the provided graph.
100
Base Current ( A)
75
50
25
0
0.00 0.25 0.50 0.75
Base Emitter Voltage (V)
133
E.4-2: (to be solved on white board) Consider the following Si n-p-n bipolar
junction transistor. Do not use the Ebers-Moll equations to answer any part
of this question.
a) Ignore recombination in the base and the contribution of the thermally

generated minority carriers to the collector current. Derive the expression for the
collector current in terms of ni, VBE , W B, Dn (electron diffusion coefficient in the
base) , junction cross sectional area (A) and the other necessary parameters.
Show complete work and simplify your expression (VBE and VCB >>VT). You do not
need to derive the expressions for the excess carrier distributions.
134
b) Express the saturation current (Is) of this transistor under the conditions of
part (a).
c) CIRCLE the correct answer. Ignore the Early Effect.

Ic is independent of VCB . YES NO
NAB does not affect the base transport factor. YES NO
BE junction diffusion capacitance is independent of W B. YES NO
Ic is the drift current of the BC junction. YES NO
Injected electrons travel through charge neutral base mostly by diffusion.YES NO
Thermally generated minority carriers around BC junction decreases IB. YES NO
The above BJT is slower than a pnp BJT. YES NO
Ic is kept constant if VBE decreases and VCB increases by same amount. YES NO
d) What is the emitter injection efficiency of this transistor if W E=W B,

NDE=NAB and there is no recombination in the emitter and base .
e) Find the  of the transistor under the conditions of part (d) and explain
your result qualitatively based on the operational principles of BJT. Also
explain how you can improve the performance of this transistor.
Explanation:
135
f) How does NDC affect the IC-V characteristics of this device under large
CE
collector to emitter voltages? Explain what happens if NDC is increased.
g) Now let’s assume that W E=W B=W C, NDE=NAB=NDC, EB junction area=BC

junction area and no recombination takes place in the device. Express VCB
(in terms of VBE) required to have zero electron diffusion current in the base.
E.4-3 (to be solved on white board) The following circuits are constructed by using the
same Si BJT with F=R=0.9.
0.7 V
0.8 V
+
VBE
-
+
VBE Circuit 2
Circuit 1 - 10 mA
a) Use the Ebers Moll Model to determine IE, IB and IC in Circuit 2.

b) What is the operation region of the BJT in Circuit 2.
c) Show and label the electron and hole flow directions due to minority carrier injection for the BJT
of Circuit 2. Is the collector current in Circuit 2 controllable by V BE? Explain your reasoning.
+
0.8 V
-
136
E.4-5 (to be solved on white board) Find the emitter current and V CE in the following circuit
constructed with a BJT having a very large . Comment on the value of VCE (note that
a small current is flowing through RB) .
5V
RC 14 K
RB
10 K
RE 4.6 K
-5 V
137
E.4-6 (to be solved on white board) Consider the following circuit. 5V
a) What are the possible modes of operation for the BJT?
RB 14 K
RC 4.3 K
b) Find operating (Q) point of the transistor (=30).
HOMEWORK 5
138
HMW-5.1 Homework 5
HMW-5.2 Homework 5
139
HMW-5.3 Homework 5
Consider the following BJT with the given minority carrier distributions in the emitter
and base. pne and npb are the equilibrium minority carrier concentrations in the emitter
and base, respectively. VCB>>kT/q, W E>>Lpe (Lpe is the hole diffusion length in
emitter).
i) Derive the expression for the emitter injection efficiency of the device in terms of the
electron diffusion coefficient in the base (Dnb), the hole diffusion coefficient in the
emitter (Dpe), hole recombination lifetime in the emitter (pe), pne, npb and the other
necessary parameters.
ii) Use your answer to part (i) to find the expression for the  of the device in terms of
the electron diffusion coefficient in the base (Dnb), the hole diffusion coefficient in the
emitter (Dpe), hole recombination lifetime in the emitter (pe), pne, npb and the other
necessary parameters.
HMW-5.4 Homework 5
140
HMW-5.5 Homework 5
CHAPTER V
MOS Capacitor
and
MOSFET
141
MOS Capacitor
References

4) A. S. Sedra and K. C. Smith, Microelectronic Circuits, Oxford University Press, 5th

Edition 2004.
5) R. C. Jaeger and T. N. Blalock, Microelectronic Circuit Design,Mc Graw Hill, 2 nd
Edition 2004.
6) R. T. Howe and C. G. Sodini, Microelectronics, An Integrated Approach, Prentice

Hall Electronics and VLSI Series, 1997.
MOS Capacitor and MOSFET

Metal oxide semiconductor field effect transistor (MOSFET) is the most widely used
electron device that has greatly accelerated the development of electronics. The
construction of the fast computers and many other electronic equipment we use today
has been made possible mainly through the improvements in the MOSFET
technology. This chapter presents an introductory level discussion on MOSFETs
including preliminary device physics, operational principles and biasing.
We will start by introducing the MOS capacitor which forms the voltage controllable
channel of the MOSFET. Understanding the characteristics of the MOS capacitor will
allow us comprehend the operational principles of MOSFETs.
142
MOS Capacitor-Accumulation Ref. 3: 16.1, 16.2
Consider a Metal/Oxide (Insulator)/p-type Semiconductor (MOS) structure. If a bias

voltage is applied to have negative potential on the metal (gate) with respect to the
semiconductor (substrate), negative charge appears on the gate. This negative charge
must be balanced with positive charge on the semiconductor side. This balance is
achieved by attracting the positive charge (holes) to the interface between the oxide
and the semiconductor.
V
Metal
-
-
-
+
-
hole accumulation
layer
Oxide
+
+
+
+
Gate
-
-
-
-
M O
Semiconductor
+
+
-
-
-
-
p-type
+
+
S
-
-
-
-
Substrate +
+
+
-
-
-
-
MOS Capacitor-Accumulation Ref. 3: 16.1, 16.2
E-Field
Charge Density
Metal Oxide Semiconductor

X
M O S
Holes are accumulated at the
semiconductor surface to create
an equivalent positive charge.
Negative
charge is
- +
+ - +
- +
- +
-
deposited
on the metal - +
+ -
+
-
+
-
+
-
M O
- + + + +
V
+ - + - - - -
MO S + + + +
accumulation
layer
- + - - - -
143
MOS Capacitor-Depletion Ref. 3: 16.1, 16.2
If a bias voltage is applied to have positive potential on the metal (gate) with respect to
the semiconductor (substrate), positive charge appears on the gate. This positive
charge must be balanced with negative charge on the semiconductor side. This
balance is achieved by pushing the holes away from the interface between the oxide
and the semiconductor. Absence of the holes (compensating the ionized acceptor
charge) at the interface creates a depletion region.
M
+
+
V
-
+
Depletion Region
O
-
-
-
-
M O S
+
+
-
-
-
-
+
+
+
-
-
-
-
+
+
+
-
-
-
-
MOS Capacitor-Depletion Ref. 3: 16.1, 16.2
E-Field Charge Density
M O S
Holes are pushed away from the
semiconductor surface to create an
Positive charge is equivalent negative charge due to the
deposited on the metal uncompensated ionized acceptors..
+ - +
- +
- +
-
+ + +
M
+
O
- - - -
+ + +
V
+ + - - - -
- + + +
MO S + - - - -
144
MOS Capacitor-Inversion Ref. 3: 16.1, 16.2
If the bias voltage is increased, electrons in the p-type substrate are attracted to the
interface to balance increasing positive charge on the gate. The presence of the
electrons at the interface inverts this region from p to n-type.
M
+
+
+
+
+
+
+
+
V inversion
-
O
layer
- - - -
S
-
-
-
-
M O
+
+
-
-
-
-
S
+
+
-
-
-
-
+
+
+
-
-
-
-
MOS Capacitor-Inversion Ref. 3: 16.1, 16.2
Positive charge
E-Field Charge Density
on metal
X
Ionized
acceptors
M O S
Electrons are Electrons
attracted to the in the
interface İnversion
layer
M O S
+ - - +
- +
- +
-
inversion +
+ + +
layer +
+
- - - - -
+ + + +
+ +
- - - - -
V + + +
- +
+
- - - - -
MO S
145
MOS Capacitor-Inversion

Q: Draw the energy band diagrams and charge distributions for a MOS
structure on n type substrate under accumulation, depletion and inversion.
MOS Capacitor Ref. 3: 16.1, 16.2
Inversion
s: surface potential=(Eibulk-Eisurface)/q
+
V
-
q(x)
MO S
Condition for sufficiently large inversion: qs=2qF

This condition is called strong inversion.
EF − Ei Ei − EF qF q (s −F ) qs

n = ni e kT ,p = ni e kT , pbulk = ni e kT , nsurface = ni e kT = no e kT
The surface electron concentration is equal to the hole (majority) carrier
concentration in the bulk ( substrate).
146
MOS Capacitor
Q: Find the surface potential required for inversion of a MOS structure constructed
on p-type Si substrate doped to NA=1x1016 cm-3. T=300 K.
Ei − EF qF
kT N
A: pbulk  N A = ni e kT = ni e kT  F = ln( A )
q ni
1x1016
= 26mV ln( ) = 0.36 V , s = 2F = 0.72 V
1x1010
Typical layer thicknesses in a MOS Structure:
Inversion layer < 10 nm
Depletion layer: several hundred nm
Charge on the metal is confined to a several A thick region
MOS Capacitor Ref. 1: 6.4.2
Q: Find the expression for electron density at the semiconductor side of a MOS
structure in terms of the potential, (x).
A: Eibulk − EF qF
po = ni e kT = ni e kT ,
q ( x ) q (F − ( x ))
−
p( x) = po e kT = ni e kT
q
− F
po no = ni  no = ni e kT ,
2
− q (F − ( x )) q ( x )
n( x) = ni e kT = no e kT
147
MOSFETs – Introduction
We have used two p-n junctions to construct a controlled current source called BJT.
Now let’s see if we can build a similar circuit element (that can be used for amplification
and switching) by using a MOS structure. So far we know that the electron concentration
in the inversion layer of a MOS capacitor (on p substrate) can be controlled with the
voltage applied to the metal electrode. Let’s call this electrode ‘gate’ and the conductive
layer forming beneath it ‘channel’. How do I turn this device into a controlled current
source?
Obviously, I should add two more electrodes through which a current proportional to the
channel electron density will flow as a result of an E-field created in the x direction due
to the biasing voltage applied between these two terminals. Since the channel is n-type
(on a p-type substrate), I should connect the additional electrodes through n-type Si
regions.
Electron density in the
+
VG channel is controllable by VG.
- I
+
VGVT  channel on
M Gate VD
n+-Si -
n+-Si O VG<VT  channel off
x S p-type Si  (I=0)
Integrate
MOSFETs – Introduction Ref. 4:4.1.1-4.1.5
Resultant Structure
Call this terminal Drain
Call this terminal Source
since it collects the
since it injects (sources)
electrons injected from the Source.
electrons into the device.
n-channel
Call this terminal Body.
Note that the inversion layer (channel depth) with a real thickness of several nm is
exaggerated in this drawing.
148
+ +
VGS VGD
- n-channel -
The gate voltage required to induce the inversion layer (n-channel) is called the
threshold voltage (VT). The voltage across the oxide (vox) must be larger than VT in
order to have the inversion layer at a location in the channel. For example,
if VGS=VG (since VS=0)>VT inversion layer (n-channel) exists at the source end
if VG-VD =VGD >VT inversion layer (n-channel) exists at the drain end
I0 VGVT I
I
Under both conditions, the p-n diodes
between the p type substrate and
(small) n-type drain/source contacts are
n-channel reverse biased and no current flows
through the substrate (body) terminal.
I0 VG<VT
I0 I0 I0
Channel ON
(small)
MOS capacitor working
in the inversion mode
Channel OFF
MOS capacitor working
in the depletion mode
I0
149
VGVT VGVT
VD3
VD1
VGVT ID=IS
linear region
VD2 VD3
VD2 VG
saturation region
VD1
VD=VDS
0
Channel is pinched off
at the drain end.
Case 1: small VDS (VD=VD1) with VG>VT.

The inversion layer extends throughout the entire region between the drain and source.
This region of operation is called the linear region. The device operates like a resistor
in this region. However, note that this is a voltage controlled resistor since the resistivity
of the channel is controlled by the gate voltage (VG=VGS). Conductivity () of the channel
depends on the electron density in the inversion layer (channel) which is controlled by
VG.
L 1 L
R= =
wt  wt
VGVT
ID=IS
VD1
VG
L
VD=VDS (small)
0
150
Q: Is the electron concentration in the inversion layer uniform through the channel?
A: No, it is not. Note that the electron concentration in the inversion layer at any
location in the channel depends on the difference between V G and the potential of
that particular location in the channel V(x). Potential on the metal is of course uniform.
Potential on the metal side is VG.
(constant through the channel)
Channel potential V(x) is VD at the drain end.
Channel potential V(x) is 0 at the source end.

x
Since VG-V(x) is not uniform through the channel,
the electron density (or the channel depth) has a
V(x) tapered shape. Since VG-V(x) is larger at the source
end, this point has the largest electron density.
VD
Q: What are the required conditions to operate
the n-channel MOSFET in the linear region.
VG-V(x) x
A: VG-V(x)>VT through the entire channel. Since
VG VD>VS , it is sufficient to check if the inversion
VGD layer exists at the drain end (VGD>VT). If it does,
VT the device is operating in the linear region
x
Case 2: VD=VD2 with VG>VT. ID=IS

linear region
VD2
VG
VD2 saturation region
VD=VDS
0
The channel is pinched off (disappears) at the drain end. In order to have this condition,
VG-VD=VG-VD2=VT VGD=VT. The dependence of ID on VD exhibits a different
characteristic beyond this point when VD is further increased. Under ideal conditions, the
drain current does not increase any more with increasing V D (now, we have a current
source!). Therefore, this point is a boundary between two different operation regions of
the MOSFET.
151
Case 3: VD=VD3 with VG>VT. ID=IS
linear region
VGVT VD3
VG
VD3
saturation region
VD=VDS
0
xpinchoff x
The pinch off point moves toward the source end since V G-VD=VGD<VT or VG-V(x)=VT at a
location closer to the source end (V(x) decreases in this direction). Note that
VG − V ( x pinchoff ) = VT or V ( x pinchoff ) = VG − VT = VGS − VT
Q:Why does the drain current saturate when the channel is pinched off at the drain end?
A: As stated before, the channel potential, V(x)=VG-VT at the pinch off point.
VGVT
This means that the voltage drop across
VD the undepleted channel is independent
of the drain voltage.The rest of VD drops
across the depleted part of the channel
(which exhibits much higher resistance).
Since the voltage drop across the invesion
layer is fixed by VG and VT, the drain
current does not change with VD once the
channel is pinched off at the drain end.
Q: What about the pinch off point moving toward the source end with increasing V D?
I still expect VD dependent ID, since the channel resistance should be decreased
with decreasing channel length resulting in a larger I D.
A: Yes it does. Indeed the drain current in a real MOSFET increases with increasing
VD because of this reason. This is called channel length modulation effect which will be
discussed later. Let’s ignore this effect at this stage.
152
Q: How does the drain current flow through the depleted part of the channel?
A: The current flow through the depleted part of the channel is similar to the current
flow through a reverse biased p-n junction.
VGVT
I
VD
The carriers contributing to the drift (drain) current are provided by the electron inversion layer.
The large E-field at the drain junction sweeps the electrons to the drain. The drain current
(in saturation) is independent of the drain voltage exceeding V dsat (additional increase appears
as reverse bias across the drain junction depletion region).
MOSFETs – I-V Characteristics

Q: How do the ID-VDS characteristics of the n-channel MOSFET look like under varying
VGS and VDS?
A:
IDS VGD=VGS-VDS=VT
VGD=VGS-VDS>VT VDsat=VGS-VT  VDsat  as VGS 
linear region
VGS5
VGS4 VGS>VT
saturation region VGS3 VGD=VGS-VDS<VT
Pinch off locus
VGS2
VGS
VDS
0
VGS1<VT cut-off region
The MOSFET can be used as a voltage controlled current source in the saturation
region.
153
MOSFETs – Derivation of Drain Current Expression Ref. 5:4.2.2
We will derive the expression for the drain current of an n-channel

MOSFET in the linear region.
ID should depend on biasing voltages as well as the device parameters.
Remember that the channel behaves as a voltage controlled resistor in the

linear region. Therefore, the drain current is governed by the resistance of the
channel as well as the drain voltage.
Since, the resistance of the channel depends on the electron density in

the inversion, layer which is set by the gate voltage, we should expect to get an
expression in terms of both VD and VG.
It is a good idea to start by establishing the relation between the channel

electron density and the gate voltage.
In order to induce inversion layer charge on the semiconductor side at point x

(under strong inversion):
VG − V ( x) = VT

Cox = WL ox : oxide capacitance
tox
tox : oxide thickness x
Define C’’ox: oxide capacitance per area, C’’ox=ox/tox

Inversion layer charge per unit area (Qinv‘’) at location x is
Qinv '' ( x) = Cox'' (VG − V ( x) − VT )
I ( x) = Qinv
'
( x)vdn ( x)
electron drift velocity=-nE(x)
charge per unit length
154
dV ( x) dV ( x)
I ( x) = −W Qinv '' ( x) n = − n WCox '' VG − V ( x) − VT 
dx dx
L VD
 I ( x)dx = −Cox nW  VG − V ( x) − VT  dV

''
0 0
− I ( x) = I D (independent of position)
W V
I D = Cox'' n (VG − VT − D )VD
L 2
W V
or I D = Cox'' n (VGS − VT − DS )VDS if the source is not grounded (VS  0 V)
L 2
Let’s take a closer look at this expression. The following figure shows the I D-VDS
characteristics of a MOSFET calculated using the above expression.
MOSFETs – Derivation of Drain Current Expression
Q: The above expression predicts ID correctly up to the marked VDS voltages. Why?
155
For small VDS,

Cox '' nW VDS2  Cox '' nW
ID = −
 GS T DS
(V V )V −  (VG − VT )VDS

L 2  L
Then the conductance of the device in the linear region is
I D Cox '' nW
gD = = (VGS − VT ) voltage controlled resistance
VD L
ID=IS
VG
VD=VDS (small)
0

Saturation Current: The current expression for the linear region is applicable up to the
boundary between the linear and saturation regions. Since the drain current is ideally
constant beyond this point:
Cox '' nW  2
VDSsat 
I Dsat = I Dlinear VDsat =V -V = (VGS − VT )VDSsat − 
G T L  2 
Cox '' nW  (VGS − VT )2  1 Cox '' nW
= (VGS − VT )(VGS − VT ) − = (VGS − VT ) 2
L  2  2 L
voltage controlled current source

in the saturation region.
156
MOSFETs – Transconductance
Q: A MOSFET (operating in the saturation region) is utilized as a voltage controlled

current source to amplify ac signals as shown below. Find the expression for g m in terms
of device parameters.
A: in=0 IG=0
vo (amplified signal)
+ vo=-gm RLvs
vs vgs id= gmvgs RL
- v0
= − g m RL
vs
equivalent circuit
1 Cox '' nW
ID = (VGS − VT )2 in the saturation region.
2 L
i W 2I D
g m = D = Cox '' n (VG − VT ) =
vGS L VGS − VT
Transconductance
Q: List the requirements to achieve a large voltage gain (high transconductance) with this MOSFET.
A: High electron mobility in the inversion layer and small channel length.
MOSFETs – Current Expressions

n-channel MOSFET
W V
I D = Cox'' n (VGS − VT − DS )VDS in linear region, VGS >VT , VGD >VT (VGS -VDS >VT )
L 2
1 Cox '' nW
ID = (VGS − VT ) 2 in saturation region, VGS >VT , VGD <VT (VGS -VDS <VT )
2 L
I D = 0 in cut off, VGS <VT
W
Define K n = nCox'' (transconductance parameter)
L
V
I D = K n (VGS − VT − DS )VDS in linear region, VGS >VT , VGD >VT (VGS -VDS >VT )
2
1
I D = K n (VGS − VT ) 2 in saturation region, VGS >VT , VGD <VT (VGS -VDS <VT )
2
I D = 0 in cut off, VGS <VT
157
MOSFETs – Transfer Characteristic Ref. 5:4.2.9
Transfer Characteristic-Saturation Region
MOSFET Parameters:
C’’ox=3.5x10-7 F/cm2
VT =0.25 V
µnCoxW/L=3.5 mA/V
MOSFETs –Channel Length Modulation Effect Ref. 4:4.2.3
The drain current of a real MOSFET is not constant (increases with V DS) in the
saturation region. This is due to the movement of the pinch off point toward the source
end shortening the channel. As discussed before, the channel potential is constant at
V(x)=VG-VT (if VG is kept constant) at the pinch off point. A reduction of L in the
channel length results in a proportional decrease in the channel resistance
(R/R  L/L).
L 1 L R L 1 L
R= = , I D = I Dsat ( ) = I Dsat ( ) = I Dsat ( )  I Dsat (1 + )
wt  wt R − R L − L 1 − L / L L
for L  L
This effect is modeled using a parameter
called channel length modulation parameter, .
VGVT
1 Cox nW
VD ID = (VG − VT ) 2 (1 + VDS ),
2 L
1 L VGS4
L = I
VGS3
VDS L D VGS2
VGS1
L −1
 dI 
ro =  D 
 dVDS 
1/ VDS
158
MOSFETs – Body Effect Ref. 4:4.2.5
We have so far assumed that the Source and Body terminals of the MOSFET are short
circuited. In some circuit configurations it is not possible to have V SB=0. Under this
condition, threshold voltage of the device is modified which is known as the Body Effect.
Nonzero (negative) Body voltage increases the depletion region width in the substrate.
Due the increase in the amount of depletion charge in the case of nonzero V SB, larger
gate voltage is necessary to have the same inversion layer charge (electron density)
with VSB=0.
VT == VTO +  ( 2F + VSB − 2F )
 : Body Effect Parameter , VTO : VT when VSB = 0.
MOSFETs – Depletion Mode Ref. 5:4.2.9
A physically implanted n-channel exists in the depletion type MOSFET. Since an

n-channel is already present, the device conducts current even when V GS=0 V. In order
to turn the drain current off, a sufficiently large negative bias voltage must be applied
to the gate. This bias voltage is defined as the threshold voltage of the depletion type
MOSFET.
n-channel depletion mode MOSFET
G
S D
Metal
Oxide
n-channel n+
n+
p-type Substrate
B
159
MOSFETs – Depletion Mode Ref. 5:4.2.9
ID VT=-2 V
VGS= 2 V
VGS= 1 V
Transfer Characteristics-Saturation Region VGS=0 V
depletion mode VGS= -1 V
VT= -0.25 V
enhancement mode
VT=0.25 V
VDS
0
VGS< -2 V (cut off)
MOSFETs – p-channel Ref. 5:4.3
p-channel MOSFET (PMOS) is constructed on an n-type substrate. A p-channel (hole

inversion layer is formed between the p+ drain and source regions by the application
of a negative gate voltage with a sufficiently large magnitude.
p-channel enhancement mode MOSFET

G
D VDS<0 (VS>VD)
S
Metal VT negative
Oxide
p+ p+
VGS<VT to have the inversion
layer at the source end
VB>VS, VD
n-type Substrate
B
160
MOSFETs – p-channel Ref. 5:4.3
VG G VD VDS<0 (VS>VD)
IS VS ID
S D
Metal VT =-2 V negative
Oxide
p+ p+ ISD
VGS= - 7 V
n-type Substrate VGS= - 6 V
VGS= - 5 V
B
VGS= - 4 V
VSD
0
VGS > - 2 V, cut off
MOSFETs – Current Expressions Ref. 5:4.3
p-channel enhancement type MOSFET

VDS<0 (VS>VD) VT negative
W
Define K p =  p Cox'' (transconductance parameter)
L
_________________________________________________________
VSD
I SD = K p (VSG + VT − )VSD
2
in linear region, VGS negative and VGS > VT , VGD negative and VGD > VT
_________________________________________________________
1
I SD = K p (VSG + VT ) 2 (1+ VSD )
2
in saturation region, VGS negative and VGS > VT , VGD > VT
__________________________________________________________
I SD = 0 in cut off, VGS  VT
161
MOSFETs – Circuit Symbols Ref. 5:4.4
D D D
G G G
B B
S S S
n-channel enhancement p-channel enhancement n-channel enhancement (VSB=0)
D D D
G G G
B B
S S S
p-channel enhancement (VSB=0) p-channel depletion n-channel depletion
D D
G G
p-channel depletion (VSB=0) n-channel depletion (VSB=0)
S S
HOMEWORK 6
162
HMW-6.1 Homework 6
HMW-6.1 Homework 6
163
HMW-6.2 Homework 6
HMW-6.3 Homework 6
164
HMW-6.4 Homework 6
HMW-6.5 Homework 6
i) Consider the following ideal MOS structure constructed with p-type Si doped at
NA=1.2x1016 cm-3. Ignore the voltage drop on the oxide and draw the energy band
diagram of the structure with the biasing arrangement shown in the figure. Show and
label the metal Fermi level (EFM), semiconductor Fermi Level (EFS), intrinsic level (Ei),
EC and EV. State the operation region and express the electron concentration in the
semiconductor side as a function of position (n(x)) in terms of the potential (x), ni and
NA.  is zero in the bulk (away from the interface).
165
HMW-6.5 Homework 6
ii) Now assume that an enhancement type MOSFET with threshold voltage of 0.7 V is
constructed on the semiconductor described above. Complete the following figure to show all
the details of the MOSFET structure including the depletion and the inversion regions with
VD=1.3V. Provide the necessary labels and minimize the overlap capacitances.
HMW-6.5 Homework 6
iii) If the B terminal is connected to a negative supply voltage, the charge in the inversion layer
is ……………… since the charge due to ionized acceptors is ……………………. and a
………………. gate voltage must be applied to have the same inversion layer electron density
with the case when VSB=0V. This is called ………………………….. effect.
iv) Now, assume that the drain voltage is decreased to 0.1 V. Express the channel current I(x)
in terms of the channel potential (V(x)), electron mobility in the inversion layer (n), oxide
capacitance per unit area (Cox’’), gate voltage (VG), the threshold voltage (VT) and the channel
width (W).
v) Use your answer to part (iv) to derive the expression for the drain current in terms of the
drain potential (VD), electron mobility in the inversion layer (n), oxide capacitance per unit area
(Cox’’), gate voltage (VG), threshold voltage (VT), channel width (W) and channel length (L).
vi) If the gate voltage is 2 V, the expression derived in part (v) will be applicable up to a drain
voltage of ………. V.
166
HMW-6.5 Homework 6
vii) Roughly plot the ID versus VGS characteristic of this MOSFET with VD=2V. Provide the
necessary label.
viii) If VD = 4 V, VG = 2 V and VT = 0.7 V, the voltage drop across the depleted (pinched off)
part of the channel is ………… V.
ix) Draw the ID versus VDS characteristics of this MOSFET (with different gate-source voltages
including positive, negative and zero VGS) which will be obtained, if an n channel is physically
implanted between the source and drain regions. Provide the necessary labels.
HMW-6.6 Homework 6
167
HMW-6.7 Homework 6
HMW-6.8 Homework 6
168
HMW-6.9 Homework 6
MOSFETs-Biasing
Biasing: In order to use the MOSFET in a specific mode of operation, proper biasing
voltages must be applied to the device terminals. As an example, the device is used
in the saturation mode (as a controlled current source) for the amplification of ac
signals.
Biasing establishes the operating point of the transistor which determines the device
parameters governing the characteristics of the circuit such as the gain and the output
voltage swing of an amplifier.
Therefore, the biasing circuit must be carefully designed to achieve the optimum circuit
performance. VDD
An example circuit biasing the MOSFET in the saturation

R1 RC
region using a DC power supply (VDD) and resistors.
R2 RE
169
MOSFETs-Biasing Ref. 4:4.3, Ref. 5: 4.8, 4.9
MOSFET operates in the saturation region if VGS>VT and VGD<VT.
VDD VDD
R1 RD RD
RR
Voltage divider (with RG = 1 2 ID
VDD) establishes the R1 + R2
+
gate biasing voltage. VDS
RG +
- = VGG + IG=0 VGS-
-
- - IS=ID
R2 RS R2 RS
VGG = VDD
R1 + R2
Kn
VGG = VGS + I D RS . Assume sat. region operation, I D = (VGS − VT ) 2
2
Kn
VGG = VGS + RS (VGS − VT )2 (ignore channel length modulation)
2
Solve the above equation to find VGS (choose the solution that makes sense),
Kn
Find ID from I D = (VGS − VT ) 2 and check to see if VGD =VGS -VDS <VT (verify sat. region assumption).
2
VDS =VDD -I D (R D +R S ) , Q-point: (I D , VDS )
MOSFETs-Biasing
Q . The threshold voltage and transconductance coefficient of the n-channel
enhancement mode MOSFET in the following circuit are VT=1 V and Kn= 6 mA/V2 (=0).
Find the Q-point of the MOSFET.
A:
430 K K
VGG = 10 = 4.34V = VGS + I D 20 K , I D = n (VGS − 1) 2 = 3 x10 −3 (VGS − 1) 2
990 K 2
4.34 = VGS + 2 x104 x3 x10−3 (VGS − 1) 2
VGS = 1.228V , 0.755V . 0.755V  VT  VGS = 1.228V
−4
I D = 1.56 x10 A, VDS = 10 − I D (20 K  + 20 K ) = 3.76V
VGD = VGS − VDS = −2.53V  VT  saturation assumption is correct
Q-point: (1.56x10-4 A, 3.76V)
170
MOSFETs-EXERCISE QUESTIONS
E.5-1: (to be solved on white board) Consider the following circuit.
i) What are the possible regions of operation for the MOSFET?

15 V VS
Kp= 50 A/V2
VT= -2 V
i) Find the Q-point of the MOSFET.
RG
470 K
RD
220 K
E.5-2: (to be solved on white board) Consider the following amplifer equivalent circuit
under the following conditions.
Case 1: an n-channel enhancement type MOSFET (in saturation region) is performing

the amplification with gate, source and drain connected to A, B and C, respectively.
Case 2: an npn BJT (in F.A. region) is performing the amplification with base, emitter
and collector connected to A, B and C, respectively.
iin A iout=-gmvin
C
vo (amplified signal)
+ Rin vo=-gm RLvin=-gm RLvs
vs vin gmvin RL
- v
B Av (voltage gain) = o = − g m R L
vs
equivalent circuit
i) What is Rin in the case of MOSFET?
171
2I
ii) We have obtained gm as g m =
D
in the case of MOSFET? What is the g m
expression for the BJT?
VGS − VT
VBE
Hint: Remember that I C  I S e

VT
in the forward active region.
iii) Which transistor is likely to provide a larger voltage gain? (Assume that both devices
are operating at a DC current of 10 mA and VGS-VT=1 V for the MOSFET).
MOSFET as a Switching Device

A digital signal is a combination of binary numbers 0 and 1. Depending on the number
of binary numbers utilized to represent signals, a huge number of combinations can be
produced to represent different states/conditions. Digital circuits (such as those in
computers) use these signals to implement useful functions.
In order to have an idea on the above mentioned representation, let’s convert an
analog (continuous) signal varying in the range 0-1.6 V to digital signal using the
combinations of five binary numbers (5-bit). As shown in the figure below, we choose
to sample the analog signal in time with 1 s time interval to generate the following
digital data representing the time variation of the analog signal.
Time Analog 5-bit
(s) Signal (V) Digital Signal
1 0 00000
2 0.1 00001
3 0.2 00010
4 0.1 00001
5 0.5 00101
6 0.8 01000
7 0.3 00011
8 0.4 00100
9 1.0 01010
10 1.6 10000
11 1.5 01111
12 1.3 01101
172
The accuracy of this conversion can be increased using a larger number of bits and
a smaller sampling time interval. However, this requires dealing with a larger
amount of data calling for higher density of data storage/handling and faster
conversion process to catch up with the time varying signal.
Each bit having one of two discrete values (0 or 1) can be represented using two
distinct voltage levels. Let’s suppose we choose to represent state 0 with 0 V and
state 1 with 5 V, respectively. Under this condition, 4-bit binary numbers can be
produced through the combination of four switches as shown below.
5V 5V 5V 5V
R R R R
Bit 4 Bit 3 Bit 2 Bit 1
Representation of Binary Number 1010
5V 5V 5V 5V
R R R R
In order to produce the binary number 1010 1 0 1 0
the switches should be arranged to generate
the pattern 5 V (1) 0 V (0) 5 V (1) 0 V (0).
MOSFET as a Switching Device Ref. 5, 6
How do we implement these switches in digital circuits? The utilization of mechanical

switches would not be feasible. Why not using transistors in different regions of operation
corresponding to different switch positions? This approach facilitates fast and reliable
switching with very long switch lifetimes (unlike the mechanical switches). Both BJTs and
MOSFETs can be employed for switching applications. However, since most of the modern
digital circuits are constructed with MOSFETs, we will see (in this course) the
implementation of a MOSFET switch using an n-channel enhancement type MOSFET.
We know that MOSFET has three regions of operation: cut-off, linear and saturation (as
shown below), and the voltage between drain and source is controllable with the gate
voltage. Under a given drain voltage, a large (enough) gate voltage moves the MOSFET
into linear region with a small VDS (0 state) similar to a closed switch. On the other hand,
small (enough) gate voltage results in (nearly) zero drain current just like the case in an
open switch. Therefore, we can utilize the MOSFET as a switch by using the transistor in
cut-off and linear regions.
D
G
173
Let’s construct a MOSFET switch using an n-channel enhancement type MOSFET
with Kn= 1 mA/V2 and VT= 1 V. The following figure shows the ID-VDS characteristics of
the MOSFET with gate-source voltage of 5 V. The figure also shows the load line and
corresponding operating point with an RD value of 2 K. When the input voltage is
lower than VT, the MOSFET operates in the cut-off region and the output voltage is 5
V. On the other hand, a high (5 V) input voltage results in a low (0.6 V) output voltage.
Therefore, the circuit is inverting the input signal yielding ouput level (1) in response to
input level of (0) and vice versa. This circuit is called an inverter which is the most
basic logic (digital) circuit.
 RD= 2 K
Q
MOSFET as a Switching Device Ref. 6

There are other logic circuits (constructed using a larger number of transistors) functioning as
building elements of a digital circuit. Those logic elements will be introduced in the junior level
course EE 348. A typical digital circuit contains many of these elements combined to perform a
specific function.
Now, let’s cascade two inverters as shown below. Since we invert the signal two times now, we
expect the output level to be identical to that at the input. Let’s assume that the input (Vin) is at
high level. Under this condition the MOSFETs in the first and second stages are expected to
operate in linear and cut-off regions, respectively. In the previous circuit, we have obtained an
output (low level) voltage of 0.6 V when the input was at high level. Since the (assumed)
threshold voltage of the MOSFET is 1 V, it would be safe to keep the output of the first stage
below 1 V to keep the second MOSFET in cut-off. Since 0.6 V < 1 V, there does not seem to be
a problem unless noise (or other transient signal) is coupled, for example, to the gate of the
MOSFET in the second stage. If the total voltage at this node goes above 1 V, the second
MOSFET will leave the cut-off region and it will be driven into the saturation (and maybe into the
linear reagion) which is not desirable.
174
In view of the above discussion, it is clear that we must have safety margins in order to
avoid creation of erroneous digital levels in a digital circuit. Now, let’s take a look at the
(simplified) input-output (transfer) characteristic of a typical inverter with the following
definitions.
VOHmin: minimum output voltage when the output is at high (1) level
VOLmax: maximum output voltage when the output is at low (0) level
VILmax: the maximum input voltage that can be regarded as the low (0) level
VIHmin: the minimum input voltage that can be regarded as the high (1) level
The noise (safety) margins should then be
defined as
High Level Noise Margin (NMH)= VOHmin-VIHmin

Low Level Noise Margin (NML)= VILmax-VOLmax
Obviously, the transition region should be

small to have large noise margin. transition region

Now, let’s look at the low level output voltages of the MOSFET inverter with two different
drain resistances (RD). As RD is increased, VOL decreases.This is expected since we
have previously found the resistance of the MOSFET in the linear region as
1
Ron  (under small VDS) which is independent of RD (use the voltage vision rule).
K n (VGS − VT )
175
Q. How does RD affect the noise margin of the inverter? Discuss qualitatively.
1) Is a larger RD better to have larger noise margin?
2) What are the problems associated with a large RD?
i) It is not feasible to fabricate large resistors in integrated circuits.
ii) Consider the following circuit showing the input capacitance of the second stage
(loading the first stage) and think about the switching speed of the inverter with a
large RD.
This issue will be explored further in Q.4 of Homework Set 7.

E.5-3: (to be solved on white board)
Find the required W/L ratio of the MOSFET (with VT= 1V) in the following circuit to meet
the specifications:
nCox “=50 A/V2
Maximum Power Dissipation in the Inverter: 0.5 mW
VOL: 0.25 V
176
Dynamic Response of the Inverter

tr: rise time VOH
%90
tf: fall time
(VOL+VOH)/2
tPHL: high to low propagation delay %10 %10
tPLH: low to high propagation delay VOL tr

tf
t PHL +t PLH tPLH
tP =
2 tPHL
propagation delay
VOH
(VOL+VOH)/2
VOL
HOMEWORK 7
177
HMW-7.1 Homework 7
HMW-7.2 Homework 7
R3= 1 K
178
HMW-7.3 Homework 7
HMW-7.4 Homework 7
We have seen that a large enough drain resistance (RD) is needed in the following
MOSFET inverter. Consider the space (in an integrated circuit) occupied by a 1 m
wide 100 K resistor fabricated with a Si layer of thickness 1 m doped at 1x1017
cm−3. Then, consider replacing RD in the following circuit with a current source
(constructed with a transistor) and comment on the noise margin of the inverter in
this case.
179
CHAPTER VI
Small Signal Modeling

Introduction to Transistor Amplifiers
Small Signal Modeling and Introduction to Transistor Amplifiers
References
1) A. S. Sedra and K. C. Smith, Microelectronic Circuits, Oxford University Press,
2004.
2) R. C. Jaeger and T. N. Blalock, Microelectronic Circuit Design,Mc Graw Hill, 2003.
180
Small Signal Modeling and Introduction to Transistor Amplifiers

We will see in this chapter how the transistors can be utilized for linear amplification of
ac signals. The purpose of this discussion is to provide the preliminary background on
transistor amplifiers which will be considerably extended in the junior level course
EE311-Analog Electronics. We will limit the discussion at this stage to the Common
Emitter BJT and Common Source MOSFET amplifiers. As you will see in EE 311 in the
following semester, it is possible to use the transistors in different configurations (in
terms of connection of the terminals to the input signal and load) which provide different
amplifier properties (such as voltage and current gains, input and output resistances).
We will start with an introduction to small signal modeling which is essential for linear
amplification. This discussion will be followed by the construction of small signal models
and their utilization in the analysis of transistor amplifer circuits.
It is essential to comprehend the material in this section in order to understand the

possibilies offered by BJTs and MOSFETs for signal amplification.
Small Signal Modeling
Notation:
lowercase
vac → purely ac signal

CAPITAL lowercase
VDC → purely DC signal

lowercase CAPITAL
vAC+DC → ac+DC signal
CAPITAL
181
Small Signal Modeling-Diode
As an introduction to small signal modeling, let’s start with a question.
Q: How do you find the diode voltage in the following circuit containing both ac and
DC voltage sources if the diode characteristics are provided? vac is a small amplitude
ac signal.
+
vac 20 mVSinwt vD
1V
VDC -
A: It is not difficult to find the DC voltage on the diode.
Draw the DC equivalent circuit and plot the load line on the diode I-V characteristic.
You should be familiar with this approach.
Load Line
VD = 0.58 V
DC DC Operating Point
ID = 0.42 mA
DC
182
What about the diode ac voltage?
You can construct the ac equivalent circuit as follows. Note that the diode is still
under forward bias with the 1 V DC voltage supply even though it is (naturally)
not shown in the ac equivalent circuit. Diode ac voltage is obviously not equal to
vac due to the voltage drop on R. In other words vac is divided between R and the
diode. In order to apply the voltage division rule, we need to find out the
resistance displayed by this diode to small amplitude ac signals. This is called
the small signal resistance of the diode.
20 mVSinwt vdac
The small signal (dynamic) resistance can be found from the slope of the diode I-V
characteristic at the DC operating point. Note that the slope depends on the operating
point (DC biasing condition) therefore we must first carry out the DC analysis to identify
the DC operating point.
dI −1
rd = ( )
dV
at the operating point
183
The slope of the I-V characteristic of our diode is approximately 17 mA/V at the DC
operating point resulting in a small signal resistance of 1/(17mA/V)60 .
Diode I-V characteristic

can be considered to
be linear in this small
vD interval.

The diode can be represented by a 60  resistor in the small signal equivalent circuit.
Then we can apply the voltage division rule as
rd
vdac = vac  0.057vac  1.1mVSinwt
rd + R
20 mVSinwt +
vdac rd= 60 
-
Then the total (ac+DC) voltage on the diode is 0.58 V+1.1 mVSinwt
CHECK YOURSELF-POINT  DC ac
Q: While the diode current depends nonlinearly on the diode voltage, we have modeled
the diode as a resistor in the ac equivalent circuit. What is the (specified) condition
justifying this approach?
184
Q: How does rd depend on VDC. Explain qualitatively.
In case, you do not have access to the graphical diode data, you can use the diode
equation to carry out an equivalent analysis. The saturation current (I s) of the diode in
the circuit is 77 fA and n=1 (ideal diode). If we write the diode equation
VD + vd
iD = I S (e vD /VT
− 1) → I D + id = I S (e VT
− 1)
VD + vd
 v 1 v 
VD vd D V
Since VD  VT , I D + id  I S e VT
= I S e e = I S e VT 1 + d + ( d ) 2 + ....
VT VT
 VT 2 VT 
VD
vd v 1 v
 I S e VT (1 + ) if d  ( d ) 2 or vd  2VT
VT VT 2 VT

VD
VD VD VT
vd ISe
I D + id  I S e VT
(1 + )=I S e VT
+ vd if vd  2VT  50mV at 300 K
VT VT
DC ac
diode small signal resistance
VD
VT
IS e ID V
id = vd = vd , then rd = T
VT VT ID DC diode current
The small signal resistance of the diode is determined by the DC operating point as
expected. Furthermore, we see that in order to have the ac diode current linearly depend
on the ac diode voltage (represent the diode with a resistor in the ac equivalent circuit),
the ac voltage on the diode should be much smaller than approximately 50 mV at room
temperature. This is the small signal condition discussed previously.
The DC current of the diode in our circuit was 0.42 mA. Then r d=25 mV/0.42 mA60 
which is equal to the small resistance found by graphical analysis. Note that the conditions
satisfy the small signal requirement, since the amplitude of the ac voltage on the diode
(1 mV) is much smaller than 2VT.
185
Introduction to BJT Amplifiers Ref. 4: 5.6
If an ac signal is applied to the base of an npn BJT biased in the forward active region,
this signal introduces an ac component to the base-emitter junction voltage of the BJT.
As result, the collector current in the circuit includes an ac component since it depends
on the base emitter voltage. VBE
Remember that I C  I S e T
5V V
in the forward active region.
2 K
VBE + vbe VBE vbe VBE
v OUT iC = I S e VT
= ISe e VT VT
 ISe VT
(1 +
vbe
)
VT
vCE VBE
v
VBE
v
if be << VT
vBE vbe
= IS e VT
+ ISe VT (ex  1+x for small x)
vbe VT
+
VBE
-
0.7 V
IC ic DC + ac
DC + ac
vCE = vOUT = VCC − iC RC = VCC − ( I C + ic ) RC = VCC − I C RC − ic RC
For small amplitude be: v DC + ac
vOUT = VCC − I C RC − ic RC
5V
vbe → ac input signal
2 K
vce=-icR → ac output signal
v OUT
VBE
C
vbe I
vce = −ic RC = − I S e VT
RC = − C RC vbe 180o
vCE VT VT phase
vBE difference
vout I
vbe AV (voltage gain) = = − C RC = − g m RC
vbe VT
+
VBE 0.7 V
- IC
gm = Transconductance of the BJT
VT
Note that ic = g m vbe
186
vBE
10 mV
iC vBE
0.335 mA Load Line
vCE vout
AV (voltage gain) = = −67
vbe
670 mV
Q: Does the amplifier in the above circuit amplify linearly under the given condition.
A: Yes, it does since,
IC
vout = vce = − RC vbe
VT
constant (set by DC biasing conditions)
output (vout) depends linearly on input (vbe)
Q: What is the required condition for linear amplification?
A: Remember that we have assumed small amplitude vbe so that
VBE + vbe VBE vbe VBE V

BE BE V
vbe VT vbe
iC = I S e VT
= IS e eVT VT
 ISe VT
(1 + ) = I S e + I S e
VT
VT VT
ic linearly depends on vbe. IC ic
187
Q: How small vbe should be for linear amplification?

A: Small enough to have
 v 
vbe
1 v v
e VT = 1 + be + ( be ) 2 + ....  1 + be 
 VT 2 VT  VT
vbe 1 v
 ( be ) 2  vbe  2VT
VT 2 VT
This is the small signal condition for amplification with BJTs.
Q: What happens if this condition is not satisfied?

A: Nonlinear amplification → Distortion !
Q: How do I find the small signal ac characteristics (such as ac voltage

gain) of a BJT amplifier without going through (tedious) graphical analysis?
A: Similar to what we have done for the diode, you need to replace the BJT
with a small signal ac equivalent circuit. Now let’s construct this equivalent
circuit. So far we found that
IC
ic = g m vbe = vbe small signal resistance
VT of the forward biased base-emitter
junction diode
Collector
ib ic
ic B + + C
Base -
ib
+
vce → vbe=v
-
r ic=gmv=ib
-
ie vce
+
vbe -
ie=(+1)ib E
-
Emitter
The above equivalent circuit is called the Hyrid- Small Signal Equivalent Circuit
188
ib ic
Collector
B C
ic + +
Base -
ib +
vce → vbe=v
-
r ic=gmv=ib
-
ie vce
+
vbe - ie=(+1)ib E
Emitter
-
vbe v v   V
r = =  =  = = = T
ib ic /  g mv g m I C / VT I B
IC
gm =
VT
Small signal model parameters depend on the DC biasing conditions!

Q: Find the small signal voltage gain of the following circuit.
5V A: Since we are interested in the ac voltage gain,
we start by drawing the ac equivalent circuit.
2 K Replace
C vo Ideal DC Power Supply
Ideal DC Current Supply
→
→
Short Circuit
Open Circuit
Large Enough Capacitor → Short Circuit
vCE RL Large Enough Inductor → Open Circuit
vBE
vin
+ ib ic vo
VBE 0.7 V AV (voltage gain) =
- vin
ce RL
be
ie=(+1)ib
189
After drawing the ac equivalent circuit, the BJT is replaced with the small
signal equivalent circuit.
ib ic
ic
ib
ce
RL → +
v r
ic=gmv=ib
RC//RL
be
-
ie=(+1)ib ie=(+1)ib
vo − g mv ( RC / / RL )
AV = = = − g m ( RC / / RL )
vin v
Now let’s find the small signal input and output resistances of the circuit.
Rout Rin ib ic Rout

Rin
ib ic
ce
RL → v+ r
ic=gmv=ib
RC RL

be -
ie=(+1)ib ie=(+1)ib
vin v
Rin = = = r , Rout = RC
ib ib
Q: How is the input resistance affected by the Q-point of the BJT?
190
Introduction to BJT Amplifiers
Q: How large a capacitor should be in order to be replaced with a short circuit in the
ac equivalent circuit? Discuss qualitatively.
Q: How do you represent nonideal DC voltage and current sources in the ac
equivalent circuit?

So far we have modeled the BJT (in the F.A. region) as an ideal controlled current
source. However, we know from an earlier discussion that the collector current depends
on the collector emitter voltage through the Early Effect which can be included in the
small signal equivalent circuit as follows.
ib ic
B gmv=ib + C
v+ r ro
-
vce
ie=(+1)ib E
-
IC
−1
npn BJT  dI  V +V V
ro =  C  = A CE  A
 dVCE  IC IC
VA (Early Voltage) VCE

191
Q: Find the voltage gain and the output resistance of the amplifier including the Early
Effect.
A:
ic
Rout ib ic Rout
ib
ce
RL → v+
r
ic=gmv=ib
ro RC RL
be -
ie=(+1)ib ie=(+1)ib
vo − g m v ( RC / / RL / / ro ) Rout = RC / / ro
AV = = = − g m ( RC / / RL / / ro )
vin v
Q: What is the voltage gain of the above amplifier in terms of the DC voltage drop on R C
if RL//ro >> RC.
A:
vo − g mv ( RC / / RL / / ro ) I R I
AV = =  − g m RC = − C C (Remember that g m = C )
vin v VT VT
Q: What is the voltage gain of the amplifier if I CRC=VCC/3 (Remember the biasing design
guidelines).
I C RC VCC
A: AV = − =  13VCC
VT 3VT
Q: Is it possible (practically) to have a very large small signal voltage gain with a single
BJT amplifier?
192
Q: Find the resistance seen from the emitter of a BJT with the base grounded.
A: ib
+
ic=gmvbe=ib
vber RC
-
ie=(+1)ib
Rin
+
ix
Rin Vx
-
vx vbe ir r
Rin = = = b  =  = re , Note that vx = −vbe and ix = −ie
ix ie (  + 1)ib (  + 1)
The resistance seen from the base with emitter grounded (r ) is larger than this resistance
(re) by a factor of +1. Resistance Reflection Rule: multiply the resistance connected to
the emitter by +1 to reflect it to the base.
Based on the above discussion, it should be clear that the following equivalent circuit
can be used as an alternative to the hybrid- model to represent the small signal
equivalent of the npn BJT.
C
ic
i=gmv
ib T-Equivalent Circuit
B ro
+
vbe=v re
- i
ie
E
193
Introduction to BJT Amplifiers

Q: Draw the small signal models for pnp BJT.
Introduction to BJT Amplifiers-Common Emitter Amplifier

Q: Find the voltage gain and the input and output resistances of the following amplifier.
=100 10 V
VCC
A: Start with DC analysis.
VBE=0.7 V Replace the capacitors by open circuits.
VA=200 V R1 VCC
RC 3 K
100 K VCC
Rout
Rin C2 R1
1 K vout RC
RC
vs+
+ RL 33.3 K
→
RS C1 VBE 3 K
- +
+ VCE
RE VBE RBB + -
-
R2 C3 - VBB + VBE
3.33 V -
50 K 2.33 K
RE -
R2 RE
C1, C2: coupling capacitors

(input source and load can be coupled
without disturbing the Q-point.) VBB − VBE 3.33 − 0.7
IB = =  10  A
C3: bypass capacitor (increases the gain RBB + (  + 1) RE 33.3 + 101x 2.33
of the amplifier by removing RE from the IC = I B =1 mA, VCE =VCC -IC R C -I E R E  4.7 V
ac equivalent circuit).
194
Draw the AC equivalent circuit. Replace the capacitors and dc voltage sources by short
circuit.
+ →
-
AC equivalent circuit
vout
1 K → Rs
RC//RL
+
vs R1//R2
Replace the BJT with the small signal equivalent circuit.
AC equivalent circuit
vout
Rs
RC//RL
vs+ R1//R2
- Small Signal equivalent circuit
Rs
ib ic Rout
ic=gmv=ib vout
vs+ v+
r ro RC RL
R1//R2 -
-
ie=(+1)ib
195
Rs
vb ib ic Rout g = I C = 1mA = 38.5 mA / V
m
ic=gmv=ib vout VT 26mV

V  100
r = T = = = 2.6 K 
vs+ v+
r ro RC RL I B g m 38.5 x10−3
R1//R2 - VA 200V
- ro = = = 200 K 
ie=(+1)ib I C 1mA
Rin 3K//3K=1.5K
ro  RC / / RL
vout vout vb − g m v ( RC / / RL / / ro ) Rin

AV = = =
vs vb vs v RS + Rin
R1 / / R2 / / r
= − g m ( RC / / RL / / ro )  −40
RS + R1 / / R2 / / r
Rin = R1 / / R2 / / r  2.4 K , Rout = RC / / ro  RC = 3K 

Q: Discuss qualitatively how you can improve the voltage gain of the above amplifier.
196
Introduction to MOSFET Amplifiers Ref. 4: 4.6
If an ac signal is applied to the gate of an n-channel enhancement mode MOSFET

biased in the saturation region, this signal introduces an ac component to the gate-source
voltage of the MOSFET. As result, the drain current in the circuit includes an ac
component since it depends on the gate-source voltage.
Kn
Remember that iD = (vGS − VT )2 in the saturation region
Cox '' nW 2
where K n = .
L
Kn K
iD = I D + id = (vGS − VT ) 2 = n (VGS + vgs − VT ) 2
2 2
Kn
= (VGS − VT ) 2 + 2(VGS − VT )vgs + vgs2 
2
if vgs2  2(VGS − VT )vgs or vgs  2(VGS − VT )
vgs Kn
iD = I D + id = (VGS − VT ) 2 + K n (VGS − VT )vgs
VGS 2
DC + ac
id = Kn (VGS − VT )vgs if vgs  2(VGS − VT )

ac drain current depends linearly on ac gate-source voltage → linear amplification.
This is the small signal condition for MOSFET.
As found in the preceeding chapter (and as obvious from the above result):
iD W 2I D
gm = = Cox '' n (VGS − VT ) = K n (VGS − VT ) =
vGS Q-point
L VGS − VT

Q: Compare the small signal requirements for BJT and MOSFET. Which device
can handle larger amplitude ac input signals while providing linear amplification?
197
Now, let’s construct the small signal equivalent circuit for the MOSFET operating
in the saturation region.
D ig=0 id
→
G G +
v+gs id=gmvgs
D
- vds
S is=id S
-
2I D
g m = K n (VGS − VT ) =
VGS − VT
In order to account for the channel length modulation effect the finite output resistance
should be added to the equivalent circuit.
D ig=0 id
id=gmvgs
→
G G + + D
vgs ro
- vds
S is=id S
-
VGS4
VGS3
ID VGS2 1/  + VDS 1
VGS1 ro = 
 dI 
−1
ID ID
ro =  D 
 dVDS 
1/ VDS
198

Q: Show that the following T-small signal model for the MOSFET is equivalent
to the above model.
D
gmvgs
ig=0 T-Equivalent Circuit
G ro
+ 1/gm
vgs
-
Introduction to MOSFET Amplifiers

Q: Draw the small signal equivalent circuit for the p-channel MOSFET.
199
Introduction to MOSFET Amplifiers-Common Source Amplifier
Q: Find the small signal voltage gain and the input and output resistances of the
following MOSFET amplifier.
A: Draw the DC equivalent circuit and carry
VT=1 V out the DC anlaysis.
Kn= 6 mA/V2
=0.02 V-1 RD
RG1 RD
Rout
vout RG1
Rin
RL
RG2
vs RG2
RS RS
Q-point: (1.56x10-4 A, 3.76V)

VGS=1.23V
Introduction to MOSFET Amplifiers-Common Source Amplifier

Draw the ac equivalent circuit and replace the MOSFET with the small
signal equivalent circuit. 1
r  = 320 K 
o
ID
g m = K n (VGS − VT ) = 1.38 mA / V
→ R G ig =0
in D
ic Rout
ro
+
vgs gmvgs RL
RG1//RG2-
RD
vo − g m vgs ( RD / / RL / / ro )
AV = = = − g m ( RD / / RL / / ro )  −9
vs vgs
Rin = RG1 / / RG 2 = 243K 
Rout = RD / / ro  RD  19 K 
200
TWO-STAGE AMPLIFIER EXAMPLE
E.6-1:
TWO-STAGE AMPLIFIER EXAMPLE
S.6-1 (continued)
201
HOMEWORK 8
HMW-8.1 Homework 8
202
HMW-8.2 Homework 8
HMW-8.3 Homework 8
203
HMW-8.4 Homework 8
204

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Prof. Dr.

EE 212-Semiconductor Devices and Modeling

Course Description: Basic semiconductor concepts. Conduction mechanisms in

EE 212-Semiconductor Devices and Modeling

A minimum PRE score of 30.00 calculated as follows:

Midterm 1 Score + Midterm 2 Score

• Participate in the class discussions.

EE 212-Semiconductor Devices and Modeling

• Do not hesitate to contact your instructor during the semester (before it is

• Do not attempt to contact any of the instructors with the intention of

• You will be allowed to inspect your corrected examination booklets on

• Access to mobile phones, tablet PCs and having any stored/recorded

• Midterm and final examinations will be started exactly at the time

• Short examinations will be given during the lecture hours. Students

EE 212-Semiconductor Devices and Modeling

EE 212-Semiconductor Devices and Modeling

After taking this course you will

• understand the fundamentals of semiconductors and solid-state electronics at a

• understand the preliminary device models utilized by circuit simulators,

• learn how transistors are utilized for amplification of signals,

A BRIEF GUIDE TO USE THIS DOCUMENT

1) B. G. Streetman and S. K. Banerjee, Solid State Electronic Devices, 6th Edition,

2) R. F. Pierret, Semiconductor Device Fundamentals, Addison-Wesley, 1996.

3) J. Singh, Semiconductor Devices An Introduction, McGraw-Hill, 1994.

4) R. F. Pierret, Advanced Semiconductor Fundamentals, Modular Series on Solid

5) M. Shur, Introduction to Electronic Devices, John Wiley, 1996.

6) R. C. Jaeger and T. N. Blalock, Microelectronic Circuit Design, Mc Graw Hill, 2nd

EE 212-Semiconductor Devices and Modeling

The Role of This Chapter

It is a must to comprehend the material in this chapter in order to be able to

Solid State Electronic Materials Ref.6: 2.1

Insulator Large Small > 105 Diamond

Semiconductor Moderate Moderate 10-3-105 Silicon

Q: What makes semiconductors so important for electronics?

A: The ability to modify the resistivity (conductivity) in a very wide range

The most widely used semiconductor is Silicon (Si) which is a column IV

Ionic Bonding: Electron exchange between the atoms resulting in

Q: Is NaCl a conductor or insulator?

Bonding Types Ref.1: 3.1.1

Bottom of the conduction band (EC)

no allowed Energy Band Gap 2N states n=3

distance between the atoms

Energy Bands Ref.1: 3.1.3, Ref. 2: 2.2.4

Q: What is the difference between the energy states of isolated atoms

Energy Bands Ref.1: 3.1.3, Ref. 2: 2.2.2

4N States free electron

4N States finite  , nonzero 

broken covalent bond (hole)

Q: What is the energy required to break a covalent bond (excite an

Carriers Ref.1: 3.2.3, Ref. 2: 2.3.3

Intrinsic Semiconductor: perfectly pure semiconductor (intrinsic Si

Carrier density in intrinsic semiconductor is called intrinsic carrier

▪ one electron in the conduction band

Note that there should be an inverse process balancing the thermal

An electron is excited from the valence

Carriers Ref.1: 3.2.3

Q: How do the carrier concentrations (n and p) change with

A: When the temperature is increased the thermal generation rate

The characteristics of a semiconductor device strongly depend on the physical

Q: List the possible parameters governing the intrinsic carrier

▪ Eg, Bandgap   thermal excitation rate  EHP generation rate

Intrinsic Carrier Concentration

The most important property of a semiconductor for electronic

This process is called doping. An intrinsic (pure) semiconductor