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HP Spectre XT 13-2000 Qcu00 - Vcu01 - La-8554p-Rev 3.0
HP Spectre XT 13-2000 Qcu00 - Vcu01 - La-8554p-Rev 3.0
1 1
2
Compal Confidential 2
Date : 2012/5/23
3 3
Version 3.0
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019HW
Date: Thursday, May 09, 2013 Sheet 1 of 46
A B C D E
A B C D E
Compal Confidential
Model Name : QCU00 Hadid
Intel DDR3 1333/1600MHz 1.5V
1
File Name : LA8554P DDR3L 1333MHz 1.35V
1
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019HW
Date: Thursday, May 09, 2013 Sheet 2 of 46
A B C D E
A B C D E
+VGFX_CORE Core voltage for UMA graphic ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator ON OFF OFF
S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS_VCCP +V1.05SP to +1.05VS_VCCP switched power rail for CPU ON OFF OFF
+VCCP +VCCP (1.05V ) power for PCH ON OFF OFF
+1.5V +1.5VP to +1.5V power rail for DDRIII (1.35V OR 1.5V) ON ON OFF
+1.5VS +1.5VS switched power rail ON OFF OFF
Mini Card2
CLKOUT DESTINATION
Mini Card3
TP module
PCI0 PCH_LPBACK
SMBUS Control Table
PCI1 PCI_LPC
EC_SMB_CK2 EC_SMB_CK1
BATT G-Sensor TP
SOURCE Charger HP Amp MINI3 SODIMM EC_SMB_DA2 EC_SMB_DA1 PCI2 None
EC_SMB_CK1 KB932
V V V PCI3 None
EC_SMB_DA1
EC_SMB_CK2 KB932
V PCI4 None
EC_SMB_DA2
USB Port Table
PCH_SMBCLK 1 External
PCH_SMBDATA PCH
V V USB 2.0 USB 1.1 Port
USB Port
3
SATA DESTINATION 0 USB2.0 (left side) 3
PCH_SML1CLK PCH UHCI0
PCH_SML1DATA
V SATA0 None
1 USB2.0 (Right side)
2
UHCI1
3
SATA1 m-SATA,JMINI2 EHCI1
4
UHCI2
5
SATA2 None 6
UHCI3
DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION 7
SATA3 None 8 Camera
UHCI4
CLKOUT_PCIE0 10/100/1G LAN CLKOUTFLEX0 None 9 BT
SATA4 None 10
EHCI2 UHCI5
CLKOUT_PCIE1 WLAN CLKOUTFLEX1 None 11
SATA5 None 12
UHCI6
CLKOUT_PCIE2 None CLKOUTFLEX2 None 13
4
CLKOUT_PCIE6 None
: means Analog Ground
CLKOUT_PCIE7 None
Security Classification Compal Secret Data Compal Electronics, Inc.
2011/06/29 2011/06/29 Title
CLKOUT_PEG_B None Issued Date Deciphered Date
SCHEMATICS,MB A8554
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
C C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019HW
Date: Thursday, May 09, 2013 Sheet 3 of 46
A B C D E
5 4 3 2 1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019HW
Date: Thursday, May 09, 2013 Sheet 4 of 46
5 4 3 2 1
5 4 3 2 1
UCPU1 QC52@ UCPU1 QC53@ UCPU1 QC55@ UCPU1 QC56@ PEG_ICOMPI and RCOMPO signals should be
2.0G R1 1.9G R1 1.8G R1 1.7G R1
shorted and routed
UCPU1 QC9B@ UCPU1 QC9C@ UCPU1 QC9E@
with - max length = 500 mils - typical
2.0G R1 1.9G R1 1.7G R1 +VCCP impedance = 43 mohms
D PEG_ICOMPO signals should be routed with - D
1
max length = 500 mils
UCPU1 L18@ UCPU1 L17@ UCPU1 L16@ RC1
2.0G R3 1.9G R3 1.7G R3 24.9_0402_1% - typical impedance = 14.5 mohms
@ UCPU1A
2
G3 PEG_COMP
PEG_ICOMPI G1
M2 PEG_ICOMPO G4
15 DMI_CRX_PTX_N0 DMI_RX#[0] PEG_RCOMPO
15 DMI_CRX_PTX_N1 P6
P1 DMI_RX#[1]
15 DMI_CRX_PTX_N2 DMI_RX#[2]
15 DMI_CRX_PTX_N3 P10 H22
DMI_RX#[3] PEG_RX#[0] J21
N3 PEG_RX#[1] B22
15 DMI_CRX_PTX_P0 DMI_RX[0] PEG_RX#[2]
15 DMI_CRX_PTX_P1 P7 D21
DMI_RX[1] PEG_RX#[3]
DMI
15 DMI_CRX_PTX_P2 P3 A19
P11 DMI_RX[2] PEG_RX#[4] D17
15 DMI_CRX_PTX_P3 DMI_RX[3] PEG_RX#[5] B14
K1 PEG_RX#[6] D13
15 DMI_CTX_PRX_N0 DMI_TX#[0] PEG_RX#[7]
M8 A11
15 DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8]
N4 B10
15 DMI_CTX_PRX_N2 DMI_TX#[2] PEG_RX#[9]
R2 G8
15 DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] A8
K3 PEG_RX#[11] B6
15 DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12]
M7 H8
15 DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13]
P4 E5
15 DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14]
T3 K7
15 DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15]
K22
PEG_RX[0] K19
PEG_RX[1] C21
U7 PEG_RX[2] D19
C 15 FDI_CTX_PRX_N0 FDI0_TX#[0] PEG_RX[3] C
W11 C19
15 FDI_CTX_PRX_N1 FDI0_TX#[1] PEG_RX[4]
W1 D16
15 FDI_CTX_PRX_N2 FDI0_TX#[2] PEG_RX[5]
Intel(R) FDI
AC9 F8
15 FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10] C8
PEG_RX[11] C5
U6 PEG_RX[12] H6
15 FDI_CTX_PRX_P0 FDI0_TX[0] PEG_RX[13]
W10 F6
15 FDI_CTX_PRX_P1 FDI0_TX[1] PEG_RX[14]
W3 K6
15 FDI_CTX_PRX_P2 FDI0_TX[2] PEG_RX[15]
AA7
15 FDI_CTX_PRX_P3 FDI0_TX[3]
W7 G22
15 FDI_CTX_PRX_P4 FDI1_TX[0] PEG_TX#[0]
T4 C23
15 FDI_CTX_PRX_P5 FDI1_TX[1] PEG_TX#[1]
AA3 D23
15 FDI_CTX_PRX_P6 FDI1_TX[2] PEG_TX#[2]
AC8 F21
15 FDI_CTX_PRX_P7 FDI1_TX[3] PEG_TX#[3] H19
+VCCP AA11 PEG_TX#[4] C17
15 FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5]
15 FDI_FSYNC1 AC12 K15
FDI1_FSYNC PEG_TX#[6] F17
U11 PEG_TX#[7] F14
15 FDI_INT FDI_INT PEG_TX#[8] A15
PEG_TX#[9]
1
PEG_TX#[14] J4
eDP_COMPIO and ICOMPO signals PEG_TX#[15]
EDP_COMP AF3
should be shorted near balls AD2 eDP_COMPIO F22
AG11 eDP_ICOMPO PEG_TX[0] A23
B
and routed with typical eDP_HPD PEG_TX[1] B
D24
impedance <25 mohms PEG_TX[2] E21
AG4 PEG_TX[3] G19
AF4 eDP_AUX# PEG_TX[4] B18
eDP_AUX PEG_TX[5] K17
PEG_TX[6]
DP
SANDY-BRIDGE_BGA1023~D
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 5 of 46
5 4 3 2 1
5 4 3 2 1
+VCCP
1
CC1
0.1U_0402_16V4Z
1
2 RC3
75_0402_5%
+3VS
5
D UC1 D
RC4
2
1 XDP_DBRESET# RC5 2 1 1K_0402_5%
P
NC 4 BUFO_CPU_RST# 2 1 BUF_CPU_RST#
PLT_RST# 2 Y circuit check 10k
16,22,23,26,28,30 PLT_RST# A
1
SN74LVC1G07DCKR_SC70-5
@ RC6
3
43_0402_1% 750_0402_1%
2
@ R956
0_0402_5%
1 2
CLOCKS
MISC
F49 Connect DPLL_REF_SSCLK on Processor to GND
17 H_SNB_IVB# PROC_SELECT# AG3 RC82 1 2 1K_0402_5% through 1K ± 5% resistor.
DPLL_REF_CLK AG1 RC83 1 2 1K_0402_5%
DPLL_REF_CLK# +VCCP Connect DPLL_REF_SSCLK# on Processor to VCCP
PROC_DETECT (Processor Detect): pulled to 1 2 C57
ground on the processor package. There is no RC7 @ 10K_0402_5% PROC_DETECT# through 1K ± 5% resistor
RC11 2 1 10K_0402_5% H_CPUPWRGD_R connection to the processor silicon for this N59
signal. System board designers may use this BCLK_ITP CLK_RES_ITP 14
CRB use 0ohm PD N58 CLK_RES_ITP# 14
signal to determine if the processor is present BCLK_ITP#
PAD T5 C49
CATERR#
THERMAL
@
BF44 SM_RCOMP0
1 2 H_PROCHOT#_R C45 SM_RCOMP[0] BE43 SM_RCOMP1
28,35 H_PROCHOT# PROCHOT# SM_RCOMP[1] SM_RCOMP Trace Width=15mils
DDR3
MISC
RC10 56_0402_5% BG43 SM_RCOMP2
SM_RCOMP[2]
PWR MANAGEMENT
J58 XDP_TRST#
TRST#
SANDY-BRIDGE_BGA1023~D
+3VS
+3V_PCH
DDR3 Compensation Signals Place close to CPU
2
0_0402_5%
2
15 SYS_PWROK B +VCCP
4 PM_SYS_PWRGD_BUF C263 0.1U_0402_16V7K
2 O XDP_TRST# 1 2
15 PM_DRAM_PWRGD A
G
RC28
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 6 of 46
5 4 3 2 1
5 4 3 2 1
UCPU1C
UCPU1D
12 DDR_A_D[0..63]
12 DDR_B_D[0..63]
DDR_A_D0 AG6
DDR_A_D1 AJ6 SA_DQ[0] AU36 M_CLK_A_DDR0 DDR_B_D0 AL4
SA_DQ[1] SA_CLK[0] M_CLK_A_DDR0 12 SB_DQ[0]
DDR_A_D2 AP11 AV36 M_CLK_A_DDR#0 DDR_B_D1 AL1 BA34 M_CLK_B_DDR0
SA_DQ[2] SA_CLK#[0] M_CLK_A_DDR#0 12 SB_DQ[1] SB_CLK[0] M_CLK_B_DDR0 12
DDR_A_D3 AL6 AY26 DDR_A_CKE0 DDR_B_D2 AN3 AY34 M_CLK_B_DDR#0
SA_DQ[3] SA_CKE[0] DDR_A_CKE0 12 SB_DQ[2] SB_CLK#[0] M_CLK_B_DDR#0 12
DDR_A_D4 AJ10 DDR_B_D3 AR4 AR22 DDR_B_CKE0
SA_DQ[4] SB_DQ[3] SB_CKE[0] DDR_B_CKE0 12
DDR_A_D5 AJ8 DDR_B_D4 AK4
D DDR_A_D6 AL8 SA_DQ[5] DDR_B_D5 AK3 SB_DQ[4] D
DDR_A_D7 AL7 SA_DQ[6] DDR_B_D6 AN4 SB_DQ[5]
DDR_A_D8 AR11 SA_DQ[7] DDR_B_D7 AR1 SB_DQ[6]
DDR_A_D9 AP6 SA_DQ[8] AT40 DDR_B_D8 AU4 SB_DQ[7]
DDR_A_D10 AU6 SA_DQ[9] SA_CLK[1] AU40 DDR_B_D9 AT2 SB_DQ[8] BA36
DDR_A_D11 AV9 SA_DQ[10] SA_CLK#[1] BB26 DDR_B_D10 AV4 SB_DQ[9] SB_CLK[1] BB36
DDR_A_D12 AR6 SA_DQ[11] SA_CKE[1] DDR_B_D11 BA4 SB_DQ[10] SB_CLK#[1] BF27
DDR_A_D13 AP8 SA_DQ[12] DDR_B_D12 AU3 SB_DQ[11] SB_CKE[1]
DDR_A_D14 AT13 SA_DQ[13] DDR_B_D13 AR3 SB_DQ[12]
DDR_A_D15 AU13 SA_DQ[14] DDR_B_D14 AY2 SB_DQ[13]
DDR_A_D16 BC7 SA_DQ[15] DDR_B_D15 BA3 SB_DQ[14]
DDR_A_D17 BB7 SA_DQ[16] BB40 DDR_B_D16 BE9 SB_DQ[15]
SA_DQ[17] SA_CS#[0] DDR_A_CS0# 12 SB_DQ[16]
DDR_A_D18 BA13 BC41 DDR_B_D17 BD9 BE41
SA_DQ[18] SA_CS#[1] SB_DQ[17] SB_CS#[0] DDR_B_CS0# 12
DDR_A_D19 BB11 DDR_B_D18 BD13 BE47
DDR_A_D20 BA7 SA_DQ[19] DDR_B_D19 BF12 SB_DQ[18] SB_CS#[1]
DDR_A_D21 BA9 SA_DQ[20] DDR_B_D20 BF8 SB_DQ[19]
DDR_A_D22 BB9 SA_DQ[21] DDR_B_D21 BD10 SB_DQ[20]
DDR_A_D23 AY13 SA_DQ[22] DDR_B_D22 BD14 SB_DQ[21]
DDR_A_D24 AV14 SA_DQ[23] AY40 DDR_B_D23 BE13 SB_DQ[22]
SA_DQ[24] SA_ODT[0] M_A_ODT0 12 SB_DQ[23]
DDR_A_D25 AR14 BA41 DDR_B_D24 BF16 AT43
SA_DQ[25] SA_ODT[1] SB_DQ[24] SB_ODT[0] M_B_ODT0 12
DDR_A_D26 AY17 DDR_B_D25 BE17 BG47
DDR_A_D27 AR19 SA_DQ[26] DDR_B_D26 BE18 SB_DQ[25] SB_ODT[1]
DDR_A_D28 BA14 SA_DQ[27] DDR_B_D27 BE21 SB_DQ[26]
DDR_A_D29 AU14 SA_DQ[28] DDR_B_D28 BE14 SB_DQ[27]
DDR_A_D30 BB14 SA_DQ[29] DDR_B_D29 BG14 SB_DQ[28]
SA_DQ[30] DDR_A_DQS#[0..7] 12 SB_DQ[29]
DDR_A_D31 BB17 AL11 DDR_A_DQS#0 DDR_B_D30 BG18
SA_DQ[31] SA_DQS#[0] SB_DQ[30] DDR_B_DQS#[0..7] 12
DDR_A_D32 BA45 AR8 DDR_A_DQS#1 DDR_B_D31 BF19 AL3 DDR_B_DQS#0
DDR_A_D33 AR43 SA_DQ[32] SA_DQS#[1] AV11 DDR_A_DQS#2 DDR_B_D32 BD50 SB_DQ[31] SB_DQS#[0] AV3 DDR_B_DQS#1
DDR_A_D34 AW48 SA_DQ[33] SA_DQS#[2] AT17 DDR_A_DQS#3 DDR_B_D33 BF48 SB_DQ[32] SB_DQS#[1] BG11 DDR_B_DQS#2
DDR_A_D35 BC48 SA_DQ[34] SA_DQS#[3] AV45 DDR_A_DQS#4 DDR_B_D34 BD53 SB_DQ[33] SB_DQS#[2] BD17 DDR_B_DQS#3
DDR SYSTEM MEMORY A
DDR_A_D36 BC45 SA_DQ[35] SA_DQS#[4] AY51 DDR_A_DQS#5 DDR_B_D35 BF52 SB_DQ[34] SB_DQS#[3] BG51 DDR_B_DQS#4
SANDY-BRIDGE_BGA1023~D
SANDY-BRIDGE_BGA1023~D
@
@
+1.5V
@ RC35
1
0_0402_5%
1 2 RC36
1K_0402_5%
RC37
2
1K_0402_5%
S
H_DRAMRST# 3 1 DDR3_DRAMRST#_R 1 2
6 H_DRAMRST# DDR3_DRAMRST# 12
QC2
2
BSS138_NL_SOT23-3
RC38
G
2
4.99K_0402_1%
1
A A
1
CC3
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/06/29 Deciphered Date 2011/06/29 Title
0.047U_0402_16V4Z
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 7 of 46
5 4 3 2 1
5 4 3 2 1
CFG2
1
D
1
QC9A 2 DRAMRST_CNTRL_PCH D
G QC9B 2 DRAMRST_CNTRL_PCH 14,28,7
+V_DDR_REFA_DQ S BSS138W-7-F_SOT323-3 G RC40
3
RC15 +V_DDR_REFB_DQ S BSS138W-7-F_SOT323-3 @ 1K_0402_1%
3
1 2 +V_DDR_REFA_R RC86
2
D @ 0_0402_5% 1 2 +V_DDR_REFB_R D
@ 0_0402_5%
1
@ RC14
1K_0402_1% @ RC87 PEG Static Lane Reversal - CFG2 is for the 16x
1K_0402_1%
2
1: Normal Operation; Lane # definition matches
For Chief River only
CFG2 * socket pin map definition
0:Lane Reversed
CFG4
1
RC41
1K_0402_1%
@ UCPU1E @
2
T9 CFG0 B50 BE7 +V_DDR_REFA_R
CFG1 C51 CFG[0] RSVD28 BG7 +V_DDR_REFB_R
T6 CFG[1] RSVD29
T10@ CFG2 B54
CFG3 D53 CFG[2]
T11@ CFG[3] Display Port Presence Strap
@ CFG4 A51 N42
CFG5 C53 CFG[4] RSVD30 L42
T12@ CFG[5] RSVD31
C CFG6 C55 L45 C
1 : Disabled; No Physical Display Port
T13
T7 @
T8 @
CFG7
CFG8
H49
A55
CFG[6]
CFG[7]
CFG[8]
RSVD32
RSVD33
L47 CFG4 * attached to Embedded Display Port
T14@ CFG9 H51
CFG10 K49 CFG[9] M13
T15@ CFG[10] RSVD34 0 : Enabled; An external Display Port device is
T16@ CFG11 K53 M14
CFG12 F53 CFG[11] RSVD35 U14 connected to the Embedded Display Port
6 CFG12 @ CFG[12] RSVD36
6 CFG13 @ CFG13 G53 W14
CFG14 L51 CFG[13] RSVD37 P13
6 CFG14 CFG[14] RSVD38
6 CFG15 CFG15 F51
CFG16 D52 CFG[15] CFG6
T17 CFG[16]
T18 CFG17 L53 AT49
CFG[17] RSVD39 K24 CFG5
@ RSVD40
@
RESERVED
1
+CPU_CORE RC42 1 2 49.9_0402_1% VCC_VAL_SENSE H43
2 1 49.9_0402_1% VSS_VAL_SENSE K43 VCC_VAL_SENSE AH2 @ RC48 @ RC49
RC43 VSS_VAL_SENSE RSVD41 AG13 1K_0402_1% 1K_0402_1%
RSVD42 AM14
RC44 1 2 49.9_0402_1% VAXG_VAL_SENSE H45 RSVD43 AM15
+VGFX_CORE
2
2 1 <BOM Structure>VSSAXG_VAL_SENSE K45 VAXG_VAL_SENSE RSVD44
RC45 49.9_0402_1% VSSAXG_VAL_SENSE
N50
TBC <BOM Structure>
F48 RSVD45
VCC_DIE_SENSE
CPU_RSVD6 H48
CPU_RSVD7 K48 RSVD6
RSVD7 A4
DC_TEST_A4 PCIE Port Bifurcation Straps
1
C4
BA19 DC_TEST_C4 D3
RC46 RC47 AV19 RSVD8 DC_TEST_D3 D1
RSVD9 DC_TEST_D1 00 = 1 x 8, 2 x 4 PCI Express
1K_0402_1% 1K_0402_1% AT21 A58
RSVD10 DC_TEST_A58 01 = reserved
B @ @ BB21 A59 CFG[6:5]
* B
2
1
BG26 BE3
BE26 RSVD24 DC_TEST_BE3 BG1 @ RC50
BF23 RSVD25 DC_TEST_BG1 BE1 1K_0402_1%
BE24 RSVD26 DC_TEST_BE1 BD1
RSVD27 DC_TEST_BD1
2
SANDY-BRIDGE_BGA1023~D
A
0: PEG Wait for BIOS for training A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 8 of 46
5 4 3 2 1
5 4 3 2 1
@ UCPU1F
+CPU_CORE AF46
VCCIO[1] AG48
VCCIO[3] AG50
A26 VCCIO[4] AG51
A29 VCC[1] VCCIO[5] AJ17
A31 VCC[2] VCCIO[6] AJ21
A34 VCC[3] VCCIO[7] AJ25
A35 VCC[4] VCCIO[8] AJ43
A38 VCC[5] VCCIO[9] AJ47
D A39 VCC[6] VCCIO[10] AK50 D
A42 VCC[7] VCCIO[11] AK51
C26 VCC[8] VCCIO[12] AL14
C27 VCC[9] VCCIO[13] AL15
C32 VCC[10] VCCIO[14] AL16
C34 VCC[11] VCCIO[15] AL20
C37 VCC[12] VCCIO[16] AL22
C39 VCC[13] VCCIO[17] AL26
C42 VCC[14] VCCIO[18] AL45
D27 VCC[15] VCCIO[19] AL48
D32 VCC[16] VCCIO[20] AM16
D34 VCC[17] VCCIO[21] AM17
D37 VCC[18] VCCIO[22] AM21
D39 VCC[19] VCCIO[23] AM43
D42 VCC[20] VCCIO[24] AM47
E26 VCC[21] VCCIO[25] AN20
E28 VCC[22] VCCIO[26] AN42
E32 VCC[23] VCCIO[27] AN45
E34 VCC[24] VCCIO[28] AN48
E37 VCC[25] VCCIO[29]
E38 VCC[26]
VCC[27]
CORE SUPPLY
F25
F26 VCC[28]
POWER
J34 AJ15
J35 VCC[52] VCCIO[49] +VCCP
J37 VCC[53]
J38 VCC[54]
J40 VCC[55] +3VS
J42 VCC[56]
VCC[57] RC51
K26 W16
VCC[58] VCCIO50
1
K27 W17 1 2
K29 VCC[59] VCCIO51 RC52 @
K32 VCC[60] 75_0402_5%
K34 VCC[61] 0_0805_5%
K35 VCC[62]
2
K37 VCC[63]
K39 VCC[64]
K42 VCC[66] BC22 VCCP_PWRCTRL_R 110K_0402_5%
2
L25 VCC[67] VCCIO_SEL
L28 VCC[68] choose low or high @ RC53
L33 VCC[69]
L36 VCC[70] +VCCP +VCCP
B L40 VCC[71] +1.05VS_VCCPQ B
QUIET RAILS
N26 VCC[72]
VCC[73] RC54
N30 AM25
VCC[74] VCCPQE[1]
1
N34 AN22 1 2
N38 VCC[75] VCCPQE[2] 0_0805_5% RC55
VCC[76] 130_0201_5%
1 2
CC73 1U_0402_6.3V6K
2
A44 H_CPU_SVIDALRT# 1 2
VIDALERT# VR_SVID_ALRT# 44
B43 H_CPU_SVIDCLK RC57 43_0201_5%
SVID
VIDSCLK VR_SVID_CLK 44
C44 H_CPU_SVIDDAT
VIDSOUT VR_SVID_DAT 44
VCC_SENSE VCCSENSE 44
G43 VSSSENSE
VSS_SENSE VSSSENSE 44
1
RC63 1 2 +VCCP Place the PU
10_0402_1% RC64
AN16 VCCIO_SENSE 100_0201_1%
resistors close to VR
VCCIO_SENSE VCCIO_SENSE 40
AN17 VSS_SENSE_VCCIO
VSS_SENSE_VCCIO VSS_SENSE_VCCIO 40
1
2
A RC66 A
10_0402_1%
2
SANDY-BRIDGE_BGA1023~D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 9 of 46
5 4 3 2 1
5 4 3 2 1
+1.5V_CPU_VDDQ +1.5V
‧ Can connect to GND if motherboard only
supports external graphics and if GFX VR is not
CC74 2 1 0.1U_0402_10V7K
stuffed in a common motherboard design,
‧ VAXG can be left floating in a common
CC75 2 1 0.1U_0402_10V7K
motherboard design (Gfx VR keeps VAXG from
floating) if the VR is stuffed
UCPU1G +1.5V_CPU_VDDQ
+VGFX_CORE
+V_SM_VREF should
1
D D
have 20 mil trace width RC68
AA46 1K_0402_1%
AB47 VAXG[1] RC67
AB50 VAXG[2] 0_0402_5%
Ultra-DC (GT2)29A
2
AB51 VAXG[3] AY43 +V_SM_VREF_CNT 2 1 +V_SM_VREF
AB52 VAXG[4] SM_VREF
Ultra-DC (GT1)18A VAXG[5]
1
AB53 1
AB55 VAXG[6] CC79 RC69
AB56 VAXG[7] 0.1U_0402_16V4Z 1K_0402_1%
AB58 VAXG[8] 5A
AB59 VAXG[9] AJ28 2
2
AC61 VAXG[10] VDDQ[1] AJ33
AD47 VAXG[11] VDDQ[2] AJ36
AD48 VAXG[12] VDDQ[3] AJ40
VAXG[13] VDDQ[4]
Follow CRV board
AD50 AL30 Delete CC100 add 10uF*1 1uF*2
- 1.5V RAILS
AD51 VAXG[14] VDDQ[5] AL34
AD52 VAXG[15] VDDQ[6] AL38
AD53 VAXG[16] VDDQ[7] AL42 +1.5V_CPU_VDDQ
AD55 VAXG[17] VDDQ[8] AM33
AD56 VAXG[18] VDDQ[9] AM36
AD58 VAXG[19] VDDQ[10] AM40
AD59 VAXG[20] VDDQ[11] AN30
VAXG[21] VDDQ[12]
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
AE46 AN34
VAXG[22] VDDQ[13]
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
N45 AN38
POWER
VAXG[23] VDDQ[14] 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC102
CC101
CC85
CC86
CC87
CC88
CC89
CC90
CC91
CC92
P47 AR26
VAXG[24] VDDQ[15]
CC100
CC93
CC94
CC95
CC96
CC97
CC98
CC99
P48 AR28
P50 VAXG[25] VDDQ[16] AR30
P51 VAXG[26] VDDQ[17] AR32 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
P52 VAXG[27] VDDQ[18] AR34
DDR3
P53 VAXG[28] VDDQ[19] AR36
P55 VAXG[29] VDDQ[20] AR40
C P56 VAXG[30] VDDQ[21] AV41 C
P61 VAXG[31]
VAXG[32]
VDDQ[22]
VDDQ[23]
AW26 +1.5V_CPU_VDDQ Source
T48 BA40 +1.5V SI7326DN-T1-E3_PAK1212-8 +1.5V_CPU_VDDQ
VAXG[33] VDDQ[24]
GRAPHICS
T58 BB28 +VSB QC4
T59 VAXG[34] VDDQ[25] BG33 1
T61 VAXG[35] VDDQ[26] 2
VAXG[36]
1
U46 +3VALW 5 3
VAXG[37]
2
V47
V48 VAXG[38] RC70 RC71
VAXG[39]
1
20K_0402_5%
V50 100K_0402_5% 470_0603_5%
4
VAXG[40]
1
V51 R78
2
V52 VAXG[41] RC72
1
V53 VAXG[42] 100K_0402_5% RUN_ON_CPU1.5VS3 @
VAXG[43]
3
V55 Q10
2
V56 VAXG[44]
2
VAXG[45]
1
V58 1 SB000002X00
VAXG[46] 2N7002DWH_SOT363-6
1
V59 RUN_ON_CPU1.5VS3# 5 D BSS138W-7-F_SOT323-3
W50 VAXG[47] 1@ RC74 2 QC5B 2 RUN_ON_CPU1.5VS3#
VAXG[48] 28 CPU1.5V_S3_GATE
6
W51 0_0402_5% RC73 CC118 G
4
12/6 Base on Intel review result, W52 VAXG[49] @ RC75 330K_0402_5% 2 0.1U_0402_25V6 S
3
W53 VAXG[50] 0_0402_5%
change to 100 ohm VAXG[51] 2N7002DWH_SOT363-6
W55 1 2 2
VAXG[52] 28,31,38,39,40 SUSP# QC5A
W56
W61 VAXG[53] +1.5V_CPU_VDDQ
1
+VGFX_CORE Y48 VAXG[54]
Y61 VAXG[55]
VAXG[56]
1
1
RC84 RC76
100_0201_1% 0_0603_5%
QUIET RAILS
2
2
AM28
VCCDQ[1]
LINES
SENSE
B F45 AN26 B
44 VCC_AXG_SENSE VAXG_SENSE VCCDQ[2]
G45 1U_0402_6.3V6K
44 VSS_AXG_SENSE VSSAXG_SENSE Follow PDDG 0.71 page 6
1 2
2 1RC85
100_0201_1%
+1.8VS 1.2A
1.8V RAIL
BC1
VCCPLL[2]
1U_0402_6.3V6K
CC121
1U_0402_6.3V6K
CC122
1 1 1 BC4
VCCPLL[3]
CC26
2 2 2 BC43 T1 PAD
+VCCSA VDDQ_SENSE BA43 T2 PAD
4A
SENSE LINES
VSS_SENSE_VDDQ
@
+VCCSA L17 @
L21 VCCSA[1]
N16 VCCSA[2]
N20 VCCSA[3]
VCCSA[4]
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
SA RAIL
1 1 1 1 1 N22
P17 VCCSA[5]
VCCSA
VCCSA[6]
CC23
CC20
CC22
CC21
CC24
P20 U10
VCCSA[7] VCCSA_SENSE VCCSA_SENSE 42
R16 VID0 VID1 Vout Sandy Ivy
2 2 2 2 2 R18 VCCSA[8] 1 2
R21 VCCSA[9] @ RC78 0_0402_5%
VCCSA[10]
0 0 0.9V V V
U15
V16 VCCSA[11]
VCCSA[12]
0 1 0.8V V V
V17 D48 VCCSA_VID0
VCCSA[13] VCCSA_VID[0] VCCSA_VID0 42
V18 D49 VCCSA_VID1 1 0 0.725V X V
VCCSA[14] VCCSA_VID[1] VCCSA_VID1 42
V21
A W20 VCCSA[15] A
1 1 0.675V X V
VCCSA[16]
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1
CC129
CC130
CC131
CC132
CC133
2 2 2 2 2 SANDY-BRIDGE_BGA1023~D
@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/06/29 Deciphered Date 2011/06/29 Title
Delete CC25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 10 of 46
5 4 3 2 1
5 4 3 2 1
UCPU1H
A13 AM38
A17 VSS[1] VSS[91] AM4
A21 VSS[2] VSS[92] AM42
A25 VSS[3] VSS[93] AM45
A28 VSS[4] VSS[94] AM48
A33 VSS[5] VSS[95] AM58
A37 VSS[6] VSS[96] AN1
A40 VSS[7] VSS[97] AN21
A45 VSS[8] VSS[98] AN25 UCPU1I
A49 VSS[9] VSS[99] AN28
D A53 VSS[10] VSS[100] AN33 D
A9 VSS[11] VSS[101] AN36
AA1 VSS[12] VSS[102] AN40 BG17 M4
AA13 VSS[13] VSS[103] AN43 BG21 VSS[181] VSS[251] M58
AA50 VSS[14] VSS[104] AN47 BG24 VSS[182] VSS[252] M6
AA51 VSS[15] VSS[105] AN50 BG28 VSS[183] VSS[253] N1
AA52 VSS[16] VSS[106] AN54 BG37 VSS[184] VSS[254] N17
AA53 VSS[17] VSS[107] AP10 BG41 VSS[185] VSS[255] N21
AA55 VSS[18] VSS[108] AP51 BG45 VSS[186] VSS[256] N25
AA56 VSS[19] VSS[109] AP55 BG49 VSS[187] VSS[257] N28
AA8 VSS[20] VSS[110] AP7 BG53 VSS[188] VSS[258] N33
AB16 VSS[21] VSS[111] AR13 BG9 VSS[189] VSS[259] N36
AB18 VSS[22] VSS[112] AR17 C29 VSS[190] VSS[260] N40
AB21 VSS[23] VSS[113] AR21 C35 VSS[191] VSS[261] N43
AB48 VSS[24] VSS[114] AR41 C40 VSS[192] VSS[262] N47
AB61 VSS[25] VSS[115] AR48 D10 VSS[193] VSS[263] N48
AC10 VSS[26] VSS[116] AR61 D14 VSS[194] VSS[264] N51
AC14 VSS[27] VSS[117] AR7 D18 VSS[195] VSS[265] N52
AC46 VSS[28] VSS[118] AT14 D22 VSS[196] VSS[266] N56
AC6 VSS[29] VSS[119] AT19 D26 VSS[197] VSS[267] N61
AD17 VSS[30] VSS[120] AT36 D29 VSS[198] VSS[268] P14
AD20 VSS[31] VSS[121] AT4 D35 VSS[199] VSS[269] P16
AD4 VSS[32] VSS[122] AT45 D4 VSS[200] VSS[270] P18
AD61
AE13
VSS[33]
VSS[34] VSS VSS[123]
VSS[124]
AT52
AT58
D40
D43
VSS[201]
VSS[202]
VSS[271]
VSS[272]
P21
P58
AE8
AF1
VSS[35]
VSS[36]
VSS[37]
VSS[125]
VSS[126]
VSS[127]
AU1
AU11
D46
D50
VSS[203]
VSS[204]
VSS[205]
VSS VSS[273]
VSS[274]
VSS[275]
P59
P9
AF17 AU28 D54 R17
AF21 VSS[38] VSS[128] AU32 D58 VSS[206] VSS[276] R20
AF47 VSS[39] VSS[129] AU51 D6 VSS[207] VSS[277] R4
AF48 VSS[40] VSS[130] AU7 E25 VSS[208] VSS[278] R46
AF50 VSS[41] VSS[131] AV17 E29 VSS[209] VSS[279] T1
C AF51 VSS[42] VSS[132] AV21 E3 VSS[210] VSS[280] T47 C
AF52 VSS[43] VSS[133] AV22 E35 VSS[211] VSS[281] T50
AF53 VSS[44] VSS[134] AV34 E40 VSS[212] VSS[282] T51
AF55 VSS[45] VSS[135] AV40 F13 VSS[213] VSS[283] T52
AF56 VSS[46] VSS[136] AV48 F15 VSS[214] VSS[284] T53
AF58 VSS[47] VSS[137] AV55 F19 VSS[215] VSS[285] T55
AF59 VSS[48] VSS[138] AW13 F29 VSS[216] VSS[286] T56
AG10 VSS[49] VSS[139] AW43 F35 VSS[217] VSS[287] U13
AG14 VSS[50] VSS[140] AW61 F40 VSS[218] VSS[288] U8
AG18 VSS[51] VSS[141] AW7 F55 VSS[219] VSS[289] V20
AG47 VSS[52] VSS[142] AY14 G48 VSS[220] VSS[290] V61
AG52 VSS[53] VSS[143] AY19 G51 VSS[221] VSS[291] W13
AG61 VSS[54] VSS[144] AY30 G6 VSS[222] VSS[292] W15
AG7 VSS[55] VSS[145] AY36 G61 VSS[223] VSS[293] W18
AH4 VSS[56] VSS[146] AY4 H10 VSS[224] VSS[294] W21
AH58 VSS[57] VSS[147] AY41 H14 VSS[225] VSS[295] W46
AJ13 VSS[58] VSS[148] AY45 H17 VSS[226] VSS[296] W8
AJ16 VSS[59] VSS[149] AY49 H21 VSS[227] VSS[297] Y4
AJ20 VSS[60] VSS[150] AY55 H4 VSS[228] VSS[298] Y47
AJ22 VSS[61] VSS[151] AY58 H53 VSS[229] VSS[299] Y58
AJ26 VSS[62] VSS[152] AY9 H58 VSS[230] VSS[300] Y59
AJ30 VSS[63] VSS[153] BA1 J1 VSS[231] VSS[301]
AJ34 VSS[64] VSS[154] BA11 J49 VSS[232]
AJ38 VSS[65] VSS[155] BA17 J55 VSS[233]
AJ42 VSS[66] VSS[156] BA21 K11 VSS[234]
AJ45 VSS[67] VSS[157] BA26 K21 VSS[235]
AJ48 VSS[68] VSS[158] BA32 K51 VSS[236] A5
AJ7 VSS[69] VSS[159] BA48 K8 VSS[237] VSS_NCTF_1 A57
AK1 VSS[70] VSS[160] BA51 L16 VSS[238] VSS_NCTF_2 BC61
AK52 VSS[71] VSS[161] BB53 L20 VSS[239] VSS_NCTF_3 BD3
AL10 VSS[72] VSS[162] BC13 L22 VSS[240] VSS_NCTF_4 BD59
NCTF
AL13 VSS[73] VSS[163] BC5 L26 VSS[241] VSS_NCTF_5 BE4
B AL17 VSS[74] VSS[164] BC57 L30 VSS[242] VSS_NCTF_6 BE58 B
AL21 VSS[75] VSS[165] BD12 L34 VSS[243] VSS_NCTF_7 BG5
AL25 VSS[76] VSS[166] BD16 L38 VSS[244] VSS_NCTF_8 BG57
AL28 VSS[77] VSS[167] BD19 L43 VSS[245] VSS_NCTF_9 C3
AL33 VSS[78] VSS[168] BD23 L48 VSS[246] VSS_NCTF_10 C58
AL36 VSS[79] VSS[169] BD27 L61 VSS[247] VSS_NCTF_11 D59
AL40 VSS[80] VSS[170] BD32 M11 VSS[248] VSS_NCTF_12 E1
AL43 VSS[81] VSS[171] BD36 M15 VSS[249] VSS_NCTF_13 E61
AL47 VSS[82] VSS[172] BD40 VSS[250] VSS_NCTF_14
AL61 VSS[83] VSS[173] BD44
AM13 VSS[84] VSS[174] BD48
AM20 VSS[85] VSS[175] BD52
AM22 VSS[86] VSS[176] BD56
AM26 VSS[87] VSS[177] BD8 SANDY-BRIDGE_BGA1023~D
AM30 VSS[88] VSS[178] BE5
AM34 VSS[89] VSS[179] BG13
VSS[90] VSS[180] @
SANDY-BRIDGE_BGA1023~D
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 11 of 46
5 4 3 2 1
5 4 3 2 1
0.1U_0402_16V7K CD28
0.1U_0402_16V7K CD27
0.1U_0402_16V7K CD30
0.1U_0402_16V7K CD29
0.1U_0402_16V7K CD40
0.1U_0402_16V7K CD39
DDR_A_MA2 P3 H8 DDR_A_D0 DDR_A_MA2 P3 H8 DDR_A_D16 DDR_A_MA2 P3 H8 DDR_A_D33 2 2 DDR_A_MA1 P7 H3 DDR_A_D55
A2 DQL5 A2 DQL5 A2 DQL5 A1 DQL4
0.1U_0402_16V7K CD42
0.1U_0402_16V7K CD41
DDR_A_MA3 N2 G2 DDR_A_D3 DDR_A_MA3 N2 G2 DDR_A_D23 DDR_A_MA3 N2 G2 DDR_A_D35 DDR_A_MA2 P3 H8 DDR_A_D48
DDR_A_MA4 P8 A3 DQL6 H7 DDR_A_D5 DDR_A_MA4 P8 A3 DQL6 H7 DDR_A_D17 DDR_A_MA4 P8 A3 DQL6 H7 DDR_A_D37 DDR_A_MA3 N2 A2 DQL5 G2 DDR_A_D51
D 1 1 DDR_A_MA5 P2 A4 DQL7 1 1 DDR_A_MA5 P2 A4 DQL7 1 1 DDR_A_MA5 P2 A4 DQL7 DDR_A_MA4 P8 A3 DQL6 H7 DDR_A_D52 D
DDR_A_MA6 R8 A5 DDR_A_MA6 R8 A5 DDR_A_MA6 R8 A5 1 1 DDR_A_MA5 P2 A4 DQL7 +0.75VS
DDR_A_MA7 R2 A6 D7 DDR_A_D12 DDR_A_MA7 R2 A6 D7 DDR_A_D28 DDR_A_MA7 R2 A6 D7 DDR_A_D45 DDR_A_MA6 R8 A5
DDR_A_MA8 T8 A7 DQU0 C3 DDR_A_D15 DDR_A_MA8 T8 A7 DQU0 C3 DDR_A_D31 DDR_A_MA8 T8 A7 DQU0 C3 DDR_A_D46 DDR_A_MA7 R2 A6 D7 DDR_A_D57
DDR_A_MA9 R3 A8 DQU1 C8 DDR_A_D8 DDR_A_MA9 R3 A8 DQU1 C8 DDR_A_D29 DDR_A_MA9 R3 A8 DQU1 C8 DDR_A_D40 DDR_A_MA8 T8 A7 DQU0 C3 DDR_A_D59
DDR_A_MA10 L7 A9 DQU2 C2 DDR_A_D11 DDR_A_MA10 L7 A9 DQU2 C2 DDR_A_D25 DDR_A_MA10 L7 A9 DQU2 C2 DDR_A_D47 DDR_A_MA9 R3 A8 DQU1 C8 DDR_A_D60
7 DDR_A_MA[0..14] A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A9 DQU2
CD5
1U_0402_6.3V6K
CD6
1U_0402_6.3V6K
CD7
CD8
CD9
10U_0603_6.3V6M
CD10
10U_0603_6.3V6M
CD11
10U_0603_6.3V6M
R7 A7 R7 A7 R7 A7 L7 C2
1U_0402_6.3V6K
1U_0402_6.3V6K
DDR_A_MA11 DDR_A_D9 DDR_A_MA11 DDR_A_D30 DDR_A_MA11 DDR_A_D41 DDR_A_MA10 DDR_A_D62
DDR_A_MA12 N7 A11 DQU4 A2 DDR_A_D10 DDR_A_MA12 N7 A11 DQU4 A2 DDR_A_D27 DDR_A_MA12 N7 A11 DQU4 A2 DDR_A_D43 DDR_A_MA11 R7 A10/AP DQU3 A7 DDR_A_D61
7 DDR_A_DQS#[0..7] A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A11 DQU4 1 1 1 1 1 1 1
DDR_A_MA13 T3 B8 DDR_A_D13 DDR_A_MA13 T3 B8 DDR_A_D24 DDR_A_MA13 T3 B8 DDR_A_D44 DDR_A_MA12 N7 A2 DDR_A_D58
DDR_A_MA14 T7 A13 DQU6 A3 DDR_A_D14 DDR_A_MA14 T7 A13 DQU6 A3 DDR_A_D26 DDR_A_MA14 T7 A13 DQU6 A3 DDR_A_D42 DDR_A_MA13 T3 A12/BC DQU5 B8 DDR_A_D56
7 DDR_A_DQS[0..7] A14 DQU7 A14 DQU7 A14 DQU7 A13 DQU6
DDR_A_MA14 T7 A3 DDR_A_D63
A14 DQU7 2 2 2 2 2 2 2
7 DDR_A_D[0..63] +1.5V +1.5V +1.5V
DDR_A_BS0 M2 B2 DDR_A_BS0 M2 B2 DDR_A_BS0 M2 B2 +1.5V
7 DDR_A_BS0 BA0 VDD BA0 VDD BA0 VDD
7 DDR_A_BS1 DDR_A_BS1 N8 D9 DDR_A_BS1 N8 D9 DDR_A_BS1 N8 D9 DDR_A_BS0 M2 B2
DDR_A_BS2 M3 BA1 VDD G7 DDR_A_BS2 M3 BA1 VDD G7 DDR_A_BS2 M3 BA1 VDD G7 DDR_A_BS1 N8 BA0 VDD D9
7 DDR_A_BS2 BA2 VDD BA2 VDD BA2 VDD BA1 VDD
K2 K2 K2 DDR_A_BS2 M3 G7 @
VDD K8 VDD K8 VDD K8 BA2 VDD K2
VDD N1 VDD N1 VDD N1 VDD K8
M_CLK_A_DDR0 J7 VDD N9 M_CLK_A_DDR0 J7 VDD N9 M_CLK_A_DDR0 J7 VDD N9 VDD N1
7 M_CLK_A_DDR0 CK VDD CK VDD CK VDD VDD
M_CLK_A_DDR#0 K7 R1 M_CLK_A_DDR#0 K7 R1 M_CLK_A_DDR#0 K7 R1 M_CLK_A_DDR0 J7 N9
7 M_CLK_A_DDR#0 CK VDD CK VDD CK VDD CK VDD
DDR_A_CKE0 K9 R9 DDR_A_CKE0 K9 R9 DDR_A_CKE0 K9 R9 M_CLK_A_DDR#0 K7 R1
7 DDR_A_CKE0 CKE VDD CKE VDD CKE VDD CK VDD
DDR_A_CKE0 K9 R9
CKE VDD
7 M_A_ODT0 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1 M_A_ODT0 K1 A1
DDR_A_CS0# L2 ODT VDDQ A8 DDR_A_CS0# L2 ODT VDDQ A8 DDR_A_CS0# L2 ODT VDDQ A8 M_A_ODT0 K1 A1
7 DDR_A_CS0# CS VDDQ CS VDDQ CS VDDQ ODT VDDQ
7 DDR_A_RAS# DDR_A_RAS# J3 C1 DDR_A_RAS# J3 C1 DDR_A_RAS# J3 C1 DDR_A_CS0# L2 A8
DDR_A_CAS# K3 RAS VDDQ C9 DDR_A_CAS# K3 RAS VDDQ C9 DDR_A_CAS# K3 RAS VDDQ C9 DDR_A_RAS# J3 CS VDDQ C1
7 DDR_A_CAS# CAS VDDQ CAS VDDQ CAS VDDQ RAS VDDQ
7 DDR_A_WE# DDR_A_WE# L3 D2 DDR_A_WE# L3 D2 DDR_A_WE# L3 D2 DDR_A_CAS# K3 C9
WE VDDQ E9 WE VDDQ E9 WE VDDQ E9 DDR_A_WE# L3 CAS VDDQ D2
VDDQ F1 VDDQ F1 VDDQ F1 WE VDDQ E9
DDR_A_DQS0 F3 VDDQ H2 DDR_A_DQS2 F3 VDDQ H2 DDR_A_DQS4 F3 VDDQ H2 VDDQ F1
DDR_A_DQS1 C7 DQSL VDDQ H9 DDR_A_DQS3 C7 DQSL VDDQ H9 DDR_A_DQS5 C7 DQSL VDDQ H9 DDR_A_DQS6 F3 VDDQ H2
DQSU VDDQ DQSU VDDQ DQSU VDDQ DDR_A_DQS7 C7 DQSL VDDQ H9 +1.5V
DQSU VDDQ
E7 A9 E7 A9 E7 A9
D3 DML VSS B3 D3 DML VSS B3 D3 DML VSS B3 E7 A9
DMU VSS DMU VSS DMU VSS DML VSS
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
E1 E1 E1 D3 B3 1
VSS VSS VSS DMU VSS
CD12
CD13
CD14
CD15
CD16
CD17
CD18
CD19
CD20
CD21
G8 G8 G8 E1 1 1 1 1 1 1 1 1 1 1
DDR_A_DQS#0 G3 VSS J2 DDR_A_DQS#2 G3 VSS J2 DDR_A_DQS#4 G3 VSS J2 VSS G8 + CD22
DDR_A_DQS#1 B7 DQSL VSS J8 DDR_A_DQS#3 B7 DQSL VSS J8 DDR_A_DQS#5 B7 DQSL VSS J8 DDR_A_DQS#6 G3 VSS J2 330U_B2_2.5VM_R15M
DQSU VSS M1 DQSU VSS M1 DQSU VSS M1 DDR_A_DQS#7 B7 DQSL VSS J8
VSS M9 VSS M9 VSS M9 DQSU VSS M1 2 2 2 2 2 2 2 2 2 2 2
VSS P1 VSS P1 VSS P1 VSS M9
DDR3_DRAMRST# T2 VSS P9 DDR3_DRAMRST# T2 VSS P9 DDR3_DRAMRST# T2 VSS P9 VSS P1
7 DDR3_DRAMRST# RESET VSS RESET VSS RESET VSS VSS
T1 T1 T1 DDR3_DRAMRST# T2 P9
2 RD1 1 L8 VSS T9 2 RD2 1 L8 VSS T9 2 RD3 1 L8 VSS T9 RESET VSS T1
ZQ VSS ZQ VSS ZQ VSS 2 RD4 1 L8 VSS T9 SGA00004400
240_0402_1% 240_0402_1% 240_0402_1% ZQ VSS
J1 B1 J1 B1 J1 B1 240_0402_1%
C L1 NC VSSQ B9 L1 NC VSSQ B9 L1 NC VSSQ B9 J1 B1 C
J9 NC VSSQ D1 J9 NC VSSQ D1 J9 NC VSSQ D1 L1 NC VSSQ B9
L9 NC VSSQ D8 L9 NC VSSQ D8 L9 NC VSSQ D8 J9 NC VSSQ D1
NC VSSQ E2 NC VSSQ E2 NC VSSQ E2 L9 NC VSSQ D8
M7 VSSQ E8 M7 VSSQ E8 M7 VSSQ E8 NC VSSQ E2
NC VSSQ F9 NC VSSQ F9 NC VSSQ F9 M7 VSSQ E8
VSSQ G1 VSSQ G1 VSSQ G1 NC VSSQ F9
VSSQ G9 VSSQ G9 VSSQ G9 VSSQ G1
VSSQ VSSQ VSSQ VSSQ G9
96-BALL 96-BALL 96-BALL VSSQ +0.75VS +0.75VS
SDRAM DDR3L SDRAM DDR3L SDRAM DDR3L 96-BALL
EDJ4216BBBG-GN-F_FBGA96 EDJ4216BBBG-GN-F_FBGA96 EDJ4216BBBG-GN-F_FBGA96 SDRAM DDR3L
EDJ4216BBBG-GN-F_FBGA96
@ @ @
@ DDR_A_RAS#RD17 1 2 36_0201_1% DDR_B_RAS#RD42 1 2 36_0201_1%
1U_0402_6.3V6K
CD23
1U_0402_6.3V6K
CD24
1U_0402_6.3V6K
CD25
1U_0402_6.3V6K
CD26
DDR_A_CAS#RD18 1 2 36_0201_1% DDR_B_CAS#RD43 1 2 36_0201_1%
7 DDR_B_MA[0..14] M_A_ODT0 RD19 1 2 36_0201_1% M_B_ODT0 RD44 1 2 36_0201_1% 1 1 1 1
DDR_A_CKE0RD20 1 2 36_0201_1% DDR_B_CKE0RD41 1 2 36_0201_1%
7 DDR_B_DQS#[0..7]
DDR_A_WE# RD21 1 2 36_0201_1% DDR_B_WE# RD46 1 2 36_0201_1%
DDR_A_MA10RD22 1 2 36_0201_1% DDR_B_MA10RD47 1 2 36_0201_1% 2 2 2 2
7 DDR_B_DQS[0..7]
DDR_A_CS0# RD23 1 2 36_0201_1% DDR_B_CS0# RD48 1 2 36_0201_1%
7 DDR_B_D[0..63] DDR_A_BS2 RD24 1 2 36_0201_1% DDR_B_BS2 RD45 1 2 36_0201_1%
0.1U_0402_16V7K CD43
DDR_B_MA2 DDR_B_D2 2 2 DDR_B_MA1 DDR_B_D17 DDR_B_MA0 DDR_B_D38 2 2 DDR_B_MA1 DDR_B_D48 DDR_A_MA11RD35 DDR_B_MA11RD59
N2 A2 DQL5 G2 P3 A1 DQL4 H8 P7 A0 DQL3 H3 P3 A1 DQL4 H8 1 2 36_0201_1% 1 2 36_0201_1%
0.1U_0402_16V7K CD46
0.1U_0402_16V7K CD45
0.1U_0402_16V7K CD50
0.1U_0402_16V7K CD49
DDR_B_MA3 DDR_B_D5 DDR_B_MA2 DDR_B_D23 2 2 DDR_B_MA1 DDR_B_D36 DDR_B_MA2 DDR_B_D51 DDR_A_MA9 RD36 DDR_B_MA9 RD60
A3 DQL6 A2 DQL5 A1 DQL4 A2 DQL5
0.1U_0402_16V7K CD48
0.1U_0402_16V7K CD47
DDR_B_MA4 P8 H7 DDR_B_D0 DDR_B_MA3 N2 G2 DDR_B_D20 DDR_B_MA2 P3 H8 DDR_B_D39 DDR_B_MA3 N2 G2 DDR_B_D49 DDR_A_MA14RD33 1 2 36_0201_1% DDR_B_MA14RD57 1 2 36_0201_1%
1 1 DDR_B_MA5 P2 A4 DQL7 DDR_B_MA4 P8 A3 DQL6 H7 DDR_B_D16 DDR_B_MA3 N2 A2 DQL5 G2 DDR_B_D33 DDR_B_MA4 P8 A3 DQL6 H7 DDR_B_D53
DDR_B_MA6 R8 A5 1 1 DDR_B_MA5 P2 A4 DQL7 DDR_B_MA4 P8 A3 DQL6 H7 DDR_B_D37 1 1 DDR_B_MA5 P2 A4 DQL7 DDR_A_MA13RD38 1 2 36_0201_1% DDR_B_MA13RD62 1 2 36_0201_1%
DDR_B_MA7 R2 A6 D7 DDR_B_D11 DDR_B_MA6 R8 A5 1 1 DDR_B_MA5 P2 A4 DQL7 DDR_B_MA6 R8 A5 DDR_A_MA6 RD39 1 2 36_0201_1% DDR_B_MA6 RD63 1 2 36_0201_1%
DDR_B_MA8 T8 A7 DQU0 C3 DDR_B_D8 DDR_B_MA7 R2 A6 D7 DDR_B_D27 DDR_B_MA6 R8 A5 DDR_B_MA7 R2 A6 D7 DDR_B_D58 DDR_A_MA7 RD40 1 2 36_0201_1% DDR_B_MA7 RD64 1 2 36_0201_1%
DDR_B_MA9 R3 A8 DQU1 C8 DDR_B_D10 DDR_B_MA8 T8 A7 DQU0 C3 DDR_B_D25 DDR_B_MA7 R2 A6 D7 DDR_B_D47 DDR_B_MA8 T8 A7 DQU0 C3 DDR_B_D56 DDR_A_MA8 RD37 1 2 36_0201_1% DDR_B_MA8 RD61 1 2 36_0201_1%
DDR_B_MA10 L7 A9 DQU2 C2 DDR_B_D12 DDR_B_MA9 R3 A8 DQU1 C8 DDR_B_D31 DDR_B_MA8 T8 A7 DQU0 C3 DDR_B_D41 DDR_B_MA9 R3 A8 DQU1 C8 DDR_B_D62
DDR_B_MA11 R7 A10/AP DQU3 A7 DDR_B_D14 DDR_B_MA10 L7 A9 DQU2 C2 DDR_B_D28 DDR_B_MA9 R3 A8 DQU1 C8 DDR_B_D43 DDR_B_MA10 L7 A9 DQU2 C2 DDR_B_D61
DDR_B_MA12 N7 A11 DQU4 A2 DDR_B_D13 DDR_B_MA11 R7 A10/AP DQU3 A7 DDR_B_D30 DDR_B_MA10 L7 A9 DQU2 C2 DDR_B_D44 DDR_B_MA11 R7 A10/AP DQU3 A7 DDR_B_D63
DDR_B_MA13 T3 A12/BC DQU5 B8 DDR_B_D15 DDR_B_MA12 N7 A11 DQU4 A2 DDR_B_D29 DDR_B_MA11 R7 A10/AP DQU3 A7 DDR_B_D42 DDR_B_MA12 N7 A11 DQU4 A2 DDR_B_D60
DDR_B_MA14 T7 A13 DQU6 A3 DDR_B_D9 DDR_B_MA13 T3 A12/BC DQU5 B8 DDR_B_D26 DDR_B_MA12 N7 A11 DQU4 A2 DDR_B_D45 DDR_B_MA13 T3 A12/BC DQU5 B8 DDR_B_D59
A14 DQU7 DDR_B_MA14 T7 A13 DQU6 A3 DDR_B_D24 DDR_B_MA13 T3 A12/BC DQU5 B8 DDR_B_D46 DDR_B_MA14 T7 A13 DQU6 A3 DDR_B_D57
A14 DQU7 DDR_B_MA14 T7 A13 DQU6 A3 DDR_B_D40 A14 DQU7
B +1.5V A14 DQU7 B
DDR_B_BS0 M2 B2 +1.5V +1.5V
7 DDR_B_BS0 BA0 VDD +1.5V
7 DDR_B_BS1 DDR_B_BS1 N8 D9 DDR_B_BS0 M2 B2 DDR_B_BS0 M2 B2
DDR_B_BS2 M3 BA1 VDD G7 DDR_B_BS1 N8 BA0 VDD D9 DDR_B_BS0 M2 B2 DDR_B_BS1 N8 BA0 VDD D9
7 DDR_B_BS2 BA2 VDD BA1 VDD BA0 VDD BA1 VDD
K2 DDR_B_BS2 M3 G7 DDR_B_BS1 N8 D9 DDR_B_BS2 M3 G7
VDD K8 BA2 VDD K2 DDR_B_BS2 M3 BA1 VDD G7 BA2 VDD K2
VDD N1 VDD K8 BA2 VDD K2 VDD K8
M_CLK_B_DDR0 J7 VDD N9 VDD N1 VDD K8 VDD N1 +1.5V +1.5V +1.5V +1.5V
7 M_CLK_B_DDR0 CK VDD VDD VDD VDD
7 M_CLK_B_DDR#0 M_CLK_B_DDR#0 K7 R1 M_CLK_B_DDR0 J7 N9 N1 M_CLK_B_DDR0 J7 N9
DDR_B_CKE0 K9 CK VDD R9 M_CLK_B_DDR#0 K7 CK VDD R1 M_CLK_B_DDR0 J7 VDD N9 M_CLK_B_DDR#0 K7 CK VDD R1
7 DDR_B_CKE0 CKE VDD CK VDD CK VDD CK VDD
DDR_B_CKE0 K9 R9 M_CLK_B_DDR#0 K7 R1 DDR_B_CKE0 K9 R9
CKE VDD CK VDD CKE VDD
1
DDR_B_CKE0 K9 R9
M_B_ODT0 K1 A1 CKE VDD RD5 RD6 RD67 RD66
7 M_B_ODT0 ODT VDDQ
7 DDR_B_CS0# DDR_B_CS0# L2 A8 M_B_ODT0 K1 A1 M_B_ODT0 K1 A1 1K_0402_1% 1K_0402_1% 1K_0402_1% 1K_0402_1%
DDR_B_RAS# J3 CS VDDQ C1 DDR_B_CS0# L2 ODT VDDQ A8 M_B_ODT0 K1 A1 DDR_B_CS0# L2 ODT VDDQ A8 +VREF_CA_A +VREF_CA_B +V_DDR_REFA_DQ +V_DDR_REFB_DQ
7 DDR_B_RAS# RAS VDDQ CS VDDQ ODT VDDQ CS VDDQ
7 DDR_B_CAS# DDR_B_CAS# K3 C9 DDR_B_RAS# J3 C1 DDR_B_CS0# L2 A8 DDR_B_RAS# J3 C1
2
DDR_B_WE# L3 CAS VDDQ D2 DDR_B_CAS# K3 RAS VDDQ C9 DDR_B_RAS# J3 CS VDDQ C1 DDR_B_CAS# K3 RAS VDDQ C9
7 DDR_B_WE# WE VDDQ CAS VDDQ RAS VDDQ CAS VDDQ
E9 DDR_B_WE# L3 D2 DDR_B_CAS# K3 C9 DDR_B_WE# L3 D2 +VREF_CA_A +VREF_CA_B +V_DDR_REFA_DQ +V_DDR_REFB_DQ
VDDQ F1 WE VDDQ E9 DDR_B_WE# L3 CAS VDDQ D2 WE VDDQ E9
DDR_B_DQS0 F3 VDDQ H2 VDDQ F1 WE VDDQ E9 VDDQ F1
DQSL VDDQ VDDQ VDDQ VDDQ
1
CD31
1U_0402_6.3V6K
CD32
1U_0402_6.3V6K
CD38
1U_0402_6.3V6K
CD37
1U_0402_6.3V6K
DDR_B_DQS1 C7 H9 DDR_B_DQS2 F3 H2 F1 DDR_B_DQS6 F3 H2
DQSU VDDQ DDR_B_DQS3 C7 DQSL VDDQ H9 DDR_B_DQS4 F3 VDDQ H2 DDR_B_DQS7 C7 DQSL VDDQ H9 RD7 RD8 RD68 RD65
DQSU VDDQ DQSL VDDQ DQSU VDDQ 1 1 1 1
DDR_B_DQS5 C7 H9 1K_0402_1% 1K_0402_1% 1K_0402_1% 1K_0402_1%
E7 A9 DQSU VDDQ
D3 DML VSS B3 E7 A9 E7 A9
2
DMU VSS E1 D3 DML VSS B3 E7 A9 D3 DML VSS B3 2 2 2 2
VSS G8 DMU VSS E1 D3 DML VSS B3 DMU VSS E1
DDR_B_DQS#0 G3 VSS J2 VSS G8 DMU VSS E1 VSS G8
DDR_B_DQS#1 B7 DQSL VSS J8 DDR_B_DQS#2 G3 VSS J2 VSS G8 DDR_B_DQS#6 G3 VSS J2
DQSU VSS M1 DDR_B_DQS#3 B7 DQSL VSS J8 DDR_B_DQS#4 G3 VSS J2 DDR_B_DQS#7 B7 DQSL VSS J8
VSS M9 DQSU VSS M1 DDR_B_DQS#5 B7 DQSL VSS J8 DQSU VSS M1
VSS P1 VSS M9 DQSU VSS M1 VSS M9
DDR3_DRAMRST# T2 VSS P9 VSS P1 VSS M9 VSS P1
RESET VSS T1 DDR3_DRAMRST# T2 VSS P9 VSS P1 DDR3_DRAMRST# T2 VSS P9
2 RD9 1 L8 VSS T9 RESET VSS T1 DDR3_DRAMRST# T2 VSS P9 RESET VSS T1
ZQ VSS 2 RD10 1 L8 VSS T9 RESET VSS T1 2 RD11 1 L8 VSS T9
240_0402_1% ZQ VSS 2 RD12 1 L8 VSS T9 ZQ VSS
J1 B1 240_0402_1% ZQ VSS 240_0402_1%
L1 NC VSSQ B9 J1 B1 240_0402_1% J1 B1
NC VSSQ NC VSSQ NC VSSQ 1 1
J9 D1 L1 B9 J1 B1 L1 B9
L9 NC VSSQ D8 J9 NC VSSQ D1 L1 NC VSSQ B9 J9 NC VSSQ D1 CD33 CD34
NC VSSQ E2 L9 NC VSSQ D8 J9 NC VSSQ D1 L9 NC VSSQ D8 0.1U_0402_16V4Z 0.1U_0402_16V4Z
M7 VSSQ E8 NC VSSQ E2 L9 NC VSSQ D8 NC VSSQ E2 2 2
NC VSSQ F9 M7 VSSQ E8 NC VSSQ E2 M7 VSSQ E8
VSSQ G1 NC VSSQ F9 M7 VSSQ E8 NC VSSQ F9
VSSQ G9 VSSQ G1 NC VSSQ F9 VSSQ G1 Tacoma Tacoma
VSSQ VSSQ G9 VSSQ G1 VSSQ G9
VSSQ VSSQ VSSQ
1
96-BALL G9
SDRAM DDR3L 96-BALL VSSQ 96-BALL RD13 RD14 RD15 RD16
EDJ4216BBBG-GN-F_FBGA96 SDRAM DDR3L 96-BALL SDRAM DDR3L 30.1_0402_1% 30.1_0402_1% 30.1_0402_1% 30.1_0402_1%
A EDJ4216BBBG-GN-F_FBGA96 SDRAM DDR3L EDJ4216BBBG-GN-F_FBGA96 A
@ EDJ4216BBBG-GN-F_FBGA96
2
Enter RAM Enter RAM
@ @
END topology END topology
@
M_CLK_A_DDR0 M_CLK_B_DDR0
1 1
CD35 CD36
1.5P_0402_50V8 1.5P_0402_50V8
2 2
M_CLK_A_DDR#0 M_CLK_B_DDR#0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
D C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019HW
Date: Thursday, May 09, 2013 Sheet 12 of 46
5 4 3 2 1
5 4 3 2 1
PCH_RTCX1
1 2 PCH_RTCX2
RH115 10M_0402_5% UH1A
1
YH1 A38 LPC_AD1
FWH1 / LAD1 LPC_AD1 23,28,30
LPC
1 2 CH4 CLRP1 PCH_RTCX2 C20 B37 LPC_AD2
RTCX2 FWH2 / LAD2 LPC_AD2 23,28,30
1U_0603_10V4Z SHORT PADS C37 LPC_AD3
LPC_AD3 23,28,30
2
1 2 2 PCH_RTCRST# D20 FWH3 / LAD3
RTCRST#
15P_0402_50V8J
RTC
15P_0402_50V8J SM_INTRUDER# K22 K36
CH5 CLRP2 INTRUDER# LDRQ1# / GPIO23
2 2 1U_0603_10V4Z SHORT PADS PCH_INTVRMEN C17 V5 SERIRQ SERIRQ 28,30
2
2 INTVRMEN SERIRQ
D D
AM3
HDA_BIT_CLK N34 SATA0RXN AM1
HDA_BCLK SATA0RXP AP7
SATA 6G
HDA_SYNC L34 SATA0TXN AP5
1/13 Change dimension to stardard part HDA_SYNC SATA0TXP
IHDA
1 2 HDA_BIT_CLK A34 SATA3RXN AB10
26 HDA_BITCLK_AUDIO HDA_SDIN3 SATA3RXP AF3
1 2 SATA3TXN AF1 INTVRMEN
SATA3TXP
@ CH46 22P_0402_50V8J HDA_SDOUT A36
HDA_SDO Y7
* H:Integrated VRM enable
L:Integrated VRM disable
SATA
1 2 HDA_RST# SATA4RXN Y5
26 HDA_RST_AUDIO# SATA4RXP
RH120 33_0402_5% C36 AD3
+5VS HDA_DOCK_EN# / GPIO33 SATA4TXN AD1
N32 SATA4TXP
HDA_DOCK_RST# / GPIO13 Y3 +3VS
SATA5RXN
2
G
Y1
QH1 SATA5RXP AB3
1 2 HDA_SYNC_R 3 1 HDA_SYNC PCH_JTAG_TCK J3 SATA5TXN AB1 SERIRQ RH131 2 1 10K_0402_5%
26 HDA_SYNC_AUDIO JTAG_TCK SATA5TXP
RH121 33_0402_5%
S
JTAG
BSS138W-7-F_SOT323-3
PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2 SATA_LED# RH138 2 1 10K_0402_5%
1 2 RH158 1 2 JTAG_TDI SATAICOMPI RH130 37.4_0402_1%
1M_0402_5% RH122 @ 0_0402_5% PCH_JTAG_TDO H1
JTAG_TDO AB12 +1.05VS_SATA3
SATA3RCOMPO
C C
AB13 SATA3_COMP 1 2 +3VS
SATA3COMPI RH132 49.9_0402_1%
SPI
P3 SATA_LED# SATA_LED# 26
SATALED#
PCH_SPI_SI V4 V14 HDDHALT_LED# R67 1 2 10K_0402_5%
SPI_MOSI SATA0GP / GPIO21
HDA_SDO
+3V_PCH +3V_PCH +3V_PCH PCH_SPI_SO U3 P1 BBS_BIT0_R R60 1 2 10K_0402_5%
SPI_MISO SATA1GP / GPIO19 +3V_PCH
ME debug mode , this signal has a weak internal PD
1
PANTHER-POINT_FCBGA989
@ RH127 @ RH128 @ RH129 L=>security measures defined in the Flash HDA_SDOUT RH140 2 @ 1 1K_0402_5%
200_0402_5% 200_0402_5% 200_0402_5% Descriptor will be in effect (default)
*Low = Disabled
High = Enabled
2
2 1 1 2PCH_SPI_CLK HDA_SYNC
33_0402_5%
22P_0402_50V8J This signal has a weak internal pull-down
On Die PLL VR is supplied by
Reserve for EMI please close to U48 1.5V when smapled high
1.8V when sampled low
Needs to be pulled High for Huron River platfrom
+3V_PCH
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019HW
Date: Thursday, May 09, 2013 Sheet 13 of 46
5 4 3 2 1
5 4 3 2 1
PV# 9/13 change power rail form +3VALW->+3V_PCH
SMBUS
A12 DRAMRST_CNTRL_PCH DRAMRST_CNTRL_PCH 28,7,8 GPIO74 1 RH263 2 10K_0402_5%
BG36 SML0ALERT# / GPIO60
BJ36 PERN3 C8 SML0CLK
D PERP3 SML0CLK D
AV34 DRAMRST_CNTRL_PCH 1 2
AU34 PETN3 G12 SML0DATA RH161 1K_0402_5%
PETP3 SML0DATA
26 PCIE_PRX_DTX_N4 PCIE_PRX_DTX_N4 BF36 1 2
PCIE_PRX_DTX_P4 BE36 PERN4 RH176 1M_0402_5%~D
PCIE Card Reader 26 PCIE_PRX_DTX_P4 PERP4
CH83 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N4 AY34 C13 GPIO74 @
26 PCIE_PTX_C_DRX_N4 PETN4 SML1ALERT# / PCHHOT# / GPIO74
CH82 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P4 BB34
26 PCIE_PTX_C_DRX_P4 PETP4 E14 SML1CLK
SML1CLK / GPIO58
PCI-E*
BG37 10/18 check to intel
BH37 PERN5 M16 SML1DATA
AY36 PERP5 SML1DATA / GPIO75
BB36 PETN5
PETP5
BJ38
BG38 PERN6 CLKIN_DMI2# RH162 1 2 10K_0402_5%
AU36 PERP6 M7 1 2
Controller
CLKIN_DMI2 RH163 10K_0402_5%
AV36 PETN6 CL_CLK1 CLKIN_DMI# RH164 1 2 10K_0402_5%
PETP6 CLKIN_DMI RH165 1 2 10K_0402_5%
Link
BG40 T11 CLKIN_DOT96# RH166 1 2 10K_0402_5%
BJ40 PERN7 CL_DATA1 CLKIN_DOT96 RH167 1 2 10K_0402_5%
AY40 PERP7 CLKIN_SATA# RH168 1 2 10K_0402_5%
BB40 PETN7 P10 CLKIN_SATA RH169 1 2 10K_0402_5%
PETP7 CL_RST1# CLK_PCH_14M RH170 1 2 10K_0402_5%
BE38
BC38 PERN8
AW38 PERP8 If use extenal CLK gen, please place close to CLK gen
AY38 PETN8 else, please place close to PCH
PETP8 RH8
M10 PCH_GPIO47 10K_0402_5% 2 1 +3V_PCH
CLK_PCIE_LAN# Y40 PEG_A_CLKRQ# / GPIO47
22 CLK_PCIE_LAN# CLKOUT_PCIE0N
Giga Lan---> CLK_PCIE_LAN Y39
22 CLK_PCIE_LAN CLKOUT_PCIE0P
RH171 AB37
1 2 10K_0402_5% PCIECLKREQ0# J2 CLKOUT_PEG_A_N AB38
CLOCKS
+3V_PCH PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
22 LAN_CLKREQ#
CLK_PCIE_MINI1# AB49 AV22 CLK_CPU_DMI#
23 CLK_PCIE_MINI1# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI# 6
C CLK_PCIE_MINI1 AB47 AU22 CLK_CPU_DMI C
23 CLK_PCIE_MINI1 CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI 6
WLAN--->
+3VS 2 RH316 1 10K_0402_5% M1
PCIECLKRQ1# / GPIO18 AM12
23 MINI1_CLKREQ# CLKOUT_DP_N AM13
AA48 CLKOUT_DP_P
AA47 CLKOUT_PCIE2N
CLKOUT_PCIE2P BF18 CLKIN_DMI#
RH1821 2 10K_0402_5% V10 CLKIN_DMI_N BE18 CLKIN_DMI
+3VS PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
2
+3V_PCH RH3201 2 10K_0402_5% L14 H45 CLK_PCI_LPBACK CLK_PCI_LPBACK 16 RH186
PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK RH188
2.2K_0402_5%
2.2K_0402_5%
2
AB42 V47 XTAL25_IN 2N7002DWH_SOT363-6
1
AB40 CLKOUT_PEG_B_N XTAL25_IN V49 XTAL25_OUT
1
CLKOUT_PEG_B_P XTAL25_OUT SMBCLK 6 1
PCH_SMBCLK 23,29
+3V_PCH RH1831 2 10K_0402_5% E6
PEG_B_CLKRQ# / GPIO56 QH2A
1/19 WL_OFF# Change to GPIO45 Y47 XCLK_RCOMP 1 2 +1.05VS_VCCDIFFCLKN
V40 XCLK_RCOMP RH184 90.9_0402_1% RH192 @
V42 CLKOUT_PCIE6N 1 2
23 WL_OFF# CLKOUT_PCIE6P
5
B 0_0402_5% B
RH185 1 2 10K_0402_5% T13 +3VS
+3V_PCH PCIECLKRQ6# / GPIO45 SMBDATA 3 4
PCH_SMBDATA 23,29
XTAL25_IN V38 K43 CLK_FLEX0 @ T42 PAD~D
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64
1
FLEX CLOCKS
V37 2N7002DWH_SOT363-6
2 1 XTAL25_OUT CLKOUT_PCIE7P F47 RH322
CLKOUTFLEX1 / GPIO65 QH2B
1M_0402_5% RH187 RH1891 2 10K_0402_5% K12 @ T43 PAD~D 10K_0402_5% RH194
+3V_PCH PCIECLKRQ7# / GPIO46 H47 1 2
YH2 25MHZ 10PF +-20PPM 7V25000014 @ RH190 2 1 0_0402_5% CLK_BCLK_ITP# AK14 CLKOUTFLEX2 / GPIO66 @ T44 PAD~D 0_0402_5%
6 CLK_RES_ITP#
2
@ RH191 2 1 0_0402_5% CLK_BCLK_ITP AK13 CLKOUT_ITPXDP_N K49 DGPU_PRSNT# @
6 CLK_RES_ITP CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67
1 3
1 3
1
12P_0402_50V8J
CH12
+3VS
1
2
2 CH13 @
@
@
RH193
CH14
2 CLK_PCH_14M 2 1 1 2
33_0402_5% 22P_0402_50V8J
2
RH195 CH15 2N7002DWH_SOT363-6
CLK_PCI_LPBACK2 1 1 2
33_0402_5% 22P_0402_50V8J SML1CLK 6 1
EC_SMB_CK2 26,28
Reserve for EMI please close to
UH1 QH6A
5
A SML1DATA 3 4 A
EC_SMB_DA2 26,28
2N7002DWH_SOT363-6
QH6B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019HW
Date: Thursday, May 09, 2013 Sheet 14 of 46
5 4 3 2 1
5 4 3 2 1
UH1C
DMI
FDI
BG12 FDI_CTX_PRX_P5 FDI_CTX_PRX_P5 5 LVDS_IBG AF37 P38
FDI_RXP5 LVD_IBG SDVO_CTRLCLK PCH_DDPB_CLK 21
DMI_CRX_PTX_P0 AY24 BJ10 FDI_CTX_PRX_P6 FDI_CTX_PRX_P6 5 PAD~D T37 AF36 M39
5 DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 LVD_VBG SDVO_CTRLDATA PCH_DDPB_DAT 21
DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7 FDI_CTX_PRX_P7 5
5 DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7
DMI_CRX_PTX_P2 AY18 AE48
5 DMI_CRX_PTX_P2 DMI2TXP LVD_VREFH
DMI_CRX_PTX_P3 AU18 AE47 AT49
5 DMI_CRX_PTX_P3 DMI3TXP LVD_VREFL DDPB_AUXN
AW16 FDI_INT AT47
FDI_INT FDI_INT 5 DDPB_AUXP AT40
+VCCP DDPB_HPD PCH_DDPB_HPD 21
BJ24 AV12 FDI_FSYNC0 PCH_TXCLK- AK39
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 5 24 PCH_TXCLK- LVDSA_CLK#
LVDS
PCH_TXCLK+ AK40 AV42 PCH_DPB_N2 21
24 PCH_TXCLK+ LVDSA_CLK DDPB_0N
1 2 DMI_IRCOMP BG25
DMI_IRCOMP FDI_FSYNC1
BC10 FDI_FSYNC1
FDI_FSYNC1 5 DDPB_0P
AV40 PCH_DPB_P2 21 D2
RH196 49.9_0402_1% PCH_TXOUT0- AN48 AV45
1 2 RBIAS_CPY BH21 AV14 FDI_LSYNC0
24 PCH_TXOUT0-
PCH_TXOUT1- AM47 LVDSA_DATA#0 HDMI DDPB_1N AV46
PCH_DPB_N1 21
D1
PCH_DPB_P1 21
CRT
28 SUSWARN# 1 @ RH2082 SUSWARN#_R K16 F4 PM_SLP_S3# T39 AT43
SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# PM_SLP_S3# 28 CRT_DDC_CLK DDPD_AUXP
0_0402_5% M40 BH41
CRT_DDC_DATA DDPD_HPD
1
RI# A10 K14 PCH_GPIO29 PANTHER-POINT_FCBGA989
RI# SLP_LAN# / GPIO29 RH220
10/21 Add pull up 10K to +3V_PCH 1K_0402_0.5%
PANTHER-POINT_FCBGA989
PCH_ GPIO 29
2
+3V_PCH Check EC for S3 S4 LED
C268 @
PCH_PWROK 1 2 +3VS
100P_0402_50V8J
UH3
1
PCH_PWROK 1 RH308
IN1 4 SYS_PWROK
OUT 10K_0402_5%
2
GND
A
44 VGATE IN2 A
1 2 LVDS_IBG @
2
RH222 2.37K_0402_1%
MC74VHC1G08DFT2G_SC70-5 1 2 PCH_ENVDD
3
RH224 100K_0402_5%
1 2 ENBKL
RH225 100K_0402_5%
RH223 2 1 10K_0402_5% SYS_PWROK
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/06/29 Deciphered Date 2011/06/29 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019HW
Date: Thursday, May 09, 2013 Sheet 15 of 46
5 4 3 2 1
5 4 3 2 1
UH1E
AY7
RSVD1 AV7
BG26 RSVD2 AU3
BJ26 TP1 RSVD3 BG4
BH25 TP2 RSVD4
BJ16 TP3 AT10
BG16 TP4 RSVD5 BC8
AH38 TP5 RSVD6
AH37 TP6 AU2
AK43 TP7 RSVD7 AT4
AK45 TP8 RSVD8 AT3
C18 TP9 RSVD9 AT1
N30 TP10 RSVD10 AY3
H3 TP11 RSVD11 AT5
D AH12 TP12 RSVD12 AV3 D
AM4 TP13 RSVD13 AV1
AM5 TP14 RSVD14 BB1
Y13 TP15 RSVD15 BA3
K24 TP16 RSVD16 BB5
L24 TP17 RSVD17 BB3
AB46 TP18 RSVD18 BB7
AB45 TP19 RSVD19 BE8
TP20 RSVD20
RSVD
BD4
RSVD21 BF6
RSVD22
B21 AV5
M20 TP21 RSVD23 AV10
AY16 TP22 RSVD24
BG46 TP23 AT8
TP24 RSVD25
AY5
RSVD26 BA2
BE28 RSVD27
27 USB3_RX1_N USB3Rn1
BC30 AT12
BE32 USB3Rn2 RSVD28 BF3
BJ32 USB3Rn3 RSVD29
BC28 USB3Rn4
27 USB3_RX1_P USB3Rp1
BE30
BF32 USB3Rp2
BG32 USB3Rp3 C24 USB20_N0
USB3Rp4 USBP0N USB20_N0 27
AV26 A24 USB20_P0 External USB3.0
27 USB3_TX1_N USB3Tn1 USBP0P USB20_P0 27
BB26 C25 USB20_N3
USB3Tn2 USBP1N USB20_N3 26
AU28 B25 USB20_P3 USB2.0 with charge port on daughter board
USB3Tn3 USBP1P USB20_P3 26
AY30 C26
AU26 USB3Tn4 USBP2N A26
27 USB3_TX1_P USB3Tp1 USBP2P
AY26 K28
C AV28 USB3Tp2 USBP3N H28 C
AW30 USB3Tp3 USBP3P E28
11/14 Delete Finger print
USB3Tp4 USBP4N D28
USBP4P C28
USBP5N A28
USBP5P C29
USBP6N B29
PCI_PIRQA# K40 USBP6P N28
PCI_PIRQB# K38 PIRQA# USBP7N M28
PIRQB# USBP7P
PCI
PCI_PIRQC# H38 L30 USB20_N8
PIRQC# USBP8N USB20_N8 24
DB# 10/20 move ACCEL_INT# to PCH_GPIO_02. PCI_PIRQD# G38 K30 USB20_P8 Camera
PIRQD# USBP8P USB20_P8 24
PCH_GPIO_03 is reserved for ODD_DA# G30 USB20_N9
USBP9N USB20_N9 23
DGPU_HOLD_RST# C46 E30 USB20_P9 MPCIE-WLAN
REQ1# / GPIO50 USBP9P USB20_P9 23
USB
DGPU_SELECT# C44 C30
DGPU_PWR_EN E40 REQ2# / GPIO52 USBP10N A30
REQ3# / GPIO54 USBP10P L32
GPIO51 D47 USBP11N K32
GPIO53 E42 GNT1# / GPIO51 USBP11P G32 +3V_PCH
GPIO55 F46 GNT2# / GPIO53 USBP12N E32
GNT3# / GPIO55 USBP12P C32
USBP13N A32
ACCEL_INT# G42 USBP13P USB_OC0# RH318 1 2 10K_0201_5%
30 ACCEL_INT# PIRQE# / GPIO2
ODD_DA# G40 27 USB_OC0# USB_OC1# RH319 1 2 10K_0201_5%
DP_CBL_DET C42 PIRQF# / GPIO3 C33 USBRBIAS
Within
1
500 2mils USB_OC2# RH324 1 2 10K_0201_5%
PIRQH# D44 PIRQG# / GPIO4 USBRBIAS# RH229 22.6_0402_1% USB_OC3# RH323 1 2 10K_0201_5%
PIRQH# / GPIO5
B33
AOAC_PME# K10 USBRBIAS USB_OC4# RH325 1 2 10K_0201_5%
28 AOAC_PME# PME# USB_OC5# RH326 1 2 10K_0201_5%
22,23,26,28,30,6 PLT_RST# PLT_RST# C6 A14 USB_OC0# USB_OC6# RH328 1 2 10K_0201_5%
PLTRST# OC0# / GPIO59 K20 USB_OC1# USB_OC7# RH327 1 2 10K_0201_5%
OC1# / GPIO40 B17 USB_OC2#
B CLK_PCI_LPBACK RH230 2 1 22_0402_5% CLK_PCI0 H49 OC2# / GPIO41 C16 USB_OC3# B
14 CLK_PCI_LPBACK CLKOUT_PCI0 OC3# / GPIO42
CLK_PCI_LPC RH231 1 2 22_0402_5% CLK_PCI1 H43 L16 USB_OC4# Change to 0201 size
28,30 CLK_PCI_LPC CLKOUT_PCI1 OC4# / GPIO43
CLK_PCI_DEBUG RH242 1 2 22_0402_5% CLK_PCI2 J48 A16 USB_OC5#
23 CLK_PCI_DEBUG CLKOUT_PCI2 OC5# / GPIO9
K42 D14 USB_OC6#
H40 CLKOUT_PCI3 OC6# / GPIO10 C14 USB_OC7#
CLKOUT_PCI4 OC7# / GPIO14
Change to 0201 size +3VS
PANTHER-POINT_FCBGA989
GPIO28
2
D 1 2 SLP_ME_CSW_DEV# D
RH267 10K_0402_5% 28 EC_SMI# EC_SMI# C10 RH238
GPIO8
10K_0402_5%
DMC_DET# C4
1 2 SLP_ME_CSW_DEV# LAN_PHY_PWR_CTRL / GPIO12
1
RH241 1K_0402_5% 28 EC_LID_OUT# 2 1 EC_LID_OUT#_R G2 P4 GATEA20 28
RH154 0_0402_5% GPIO15 A20GATE
@
AU16 PCH_PECI_R 1 @ 2
PECI H_PECI 28,6
COMS_LED_PCH U2 0_0402_5% RH239
SATA4GP / GPIO16 P5 EC_KBRST# +1.8VS
RCIN# EC_KBRST# 28
GPIO
EC_WP# D40 AY11
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD 6
1
CPU/MISC
PCH_GPIO22 T5 AY10 H_THERMTRIP#_C 1 2 H_THRMTRIP# H_THRMTRIP# 6 RH226
SCLOCK / GPIO22 THRMTRIP# 390_0402_5% RH240 2.2K_0402_5%
DDR3L_EN E8 T14
41 DDR3L_EN GPIO24 INIT3_3V#
2
PCH_GPIO27 E16 AY1 NV_CLE 2 1 H_SNB_IVB# 6
GPIO27 DF_TVS RH227 1K_0402_5%
SLP_ME_CSW_DEV# P8
28 SLP_ME_CSW_DEV# GPIO28 AH8
BT_ON# K1 TS_VSS1 Layout note: CLOSE TO THE BRANCHING POINT
23 BT_ON# STP_PCI# / GPIO34 AK11
10/21 Common BT_ON is GPIO 34 PCH_GPIO35 K4 TS_VSS2
GPIO35 AH10
(Rout to GPIO 38 currently), GPIO 38 pull TS_VSS3
high 10K to 3VS only GPIO36 V8
SATA2GP / GPIO36 AK10
PCH_GPIO37 M5 TS_VSS4
SATA3GP / GPIO37
GPIO38 N2 P37
SLOAD / GPIO38 NC_1 +3VS
PCH_GPIO39 M3 11/04 add GPIO69 for Intel require
C SDATAOUT0 / GPIO39 C
PCH_GPIO48 V13 BG2 GPIO69 1 RH312 2 10K_0201_5%
SDATAOUT1 / GPIO48 VSS_NCTF_15
GPIO49 V3 BG48 GPIO68 1 RH310 2 10K_0201_5%
SATA5GP / GPIO49 / TEMP_ALERT# VSS_NCTF_16
PCH_GPIO37 HDD_DETECT# D6 BH3 GPIO6 1 RH243 2 10K_0201_5%
25 HDD_DETECT# GPIO57 VSS_NCTF_17
FDI TERMINATION VOLTAGE OVERRIDE
BH47 GPIO1 1 RH244 2 10K_0201_5%
LOW - Tx, Rx terminated VSS_NCTF_18
* to same voltage A4
VSS_NCTF_1 VSS_NCTF_19
BJ4 EC_KBRST# 1 RH295 2 10K_0201_5%
(DC Coupling Mode)
A44 BJ44 EC_WP# 1 RH273 2 10K_0201_5%
VSS_NCTF_2 VSS_NCTF_20
+3VS A45 BJ45 COMS_LED_PCH 1 RH247 2 10K_0201_5%
VSS_NCTF_3 VSS_NCTF_21
NCTF
A46 BJ46 Change to 0201 size
RH245 2 @ 1 1K_0402_5% PCH_GPIO37 VSS_NCTF_4 VSS_NCTF_22
A5 BJ5
VSS_NCTF_5 VSS_NCTF_23
RH246 2 1 PCH_GPIO37 A6 BJ6 +3V_PCH
VSS_NCTF_6 VSS_NCTF_24
100K_0402_5% B3 C2 DDR3L_EN 1 2 10K_0402_5%
VSS_NCTF_7 VSS_NCTF_25 @ RH248
PCH_GPIO37 PU 100K for DIS Mode B47 C48 HDD_DETECT# 1 2 10K_0402_5%
VSS_NCTF_8 VSS_NCTF_26 RH249
BD1 D1 DMC_DET# 1 2 10K_0402_5%
GPIO27 VSS_NCTF_9 VSS_NCTF_27 RH251
BD49 D49 EC_LID_OUT#_R 1 2 1K_0402_5%
VSS_NCTF_10 VSS_NCTF_28 RH252
PCH_GPIO27 (Have internal Pull-High)
BE1 E1 EC_SMI# 1 2 10K_0402_5%
*High: VCCVRM VR Enable
Low: VCCVRM VR Disable BE49
VSS_NCTF_11 VSS_NCTF_29
E49
@ RH253
B VSS_NCTF_12 VSS_NCTF_30 B
1 2 PCH_GPIO27 BF1 F1
@ RH250 10K_0402_5% VSS_NCTF_13 VSS_NCTF_31
BF49 F49
VSS_NCTF_14 VSS_NCTF_32
+3VS
PANTHER-POINT_FCBGA989 Reserve for DDR Strap pin
10/23 reserve GPIO 36 pull up resistor and add pull down resistor
DDR strap pin GPIO39 GPIO48 GPIO49 GPIO0 1 2 10K_0201_5%
Vendor/PN RH254
+3VS
1 2 GPIO36
Samsung SA00005GJ00
256M16/1600 K4B4G1646B-HCK0 FBGA RH330 RH329 RH331 GPIO38 1
RH256
2 10K_0201_5%
@ RH301 10K_0402_5%
DDR3 0 0 0
Hynix SA00005GI00
256M16/1600 H5TQ4G63MFR-PBC FBGA RH330 RH329 RH262 1
@ RH329
2 10K_0201_5% PCH_GPIO48 1
@ RH257
2 10K_0201_5%
Hynix SA00005AV00
256MX16/1600 H5TC4G63MFR-PBA 96P RH260 RH329 RH331 1
@ RH331
2 10K_0201_5% GPIO49 1
@ RH262
2 10K_0201_5%
A 1 0 0 A
Change to 0201 size
RH260 RH329 RH262
1 0 1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019HW
Date: Thursday, May 09, 2013 Sheet 17 of 46
5 4 3 2 1
5 4 3 2 1
+VCCP
1300mA
63mA LH1
1.73A
0.01U_0402_16V7K
0.1U_0402_10V7K
AA23 1mA U48 +VCCADAC 2 1
AC23 VCCCORE[1] VCCADAC BLM18PG181SN1D_2P
VCCCORE[2] 1 1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 AD21
CRT
VCCCORE[3]
CH20
CH21
AD23 U47 CH22
VCCCORE[4] VSSADAC
CH18
CH19
CH16
CH17 AF21 10U_0603_6.3V6M
VCC CORE
10U_0603_6.3V6M AF23 VCCCORE[5] 2 2 2
D 2 2 2 2 AG21 VCCCORE[6] +3VS D
AG23 VCCCORE[7]
AG24 VCCCORE[8] AK36
VCCCORE[9]
1mA VCCALVDS
AG26
AG27 VCCCORE[10] AK37 +1.8VS
AG29 VCCCORE[11] VSSALVDS 0.1UH_MLF1608DR10KT_10%_1608
AJ23 VCCCORE[12] 40mA LH2
VCCCORE[13] Near AP43
LVDS
AJ26 AM37 +VCCTX_LVDS 2 1
AJ27 VCCCORE[14] VCCTX_LVDS[1] CH23 1
VCCCORE[15] 1 1
AJ29 AM38 CH25 0.1uH inductor, 200mA
AJ31 VCCCORE[16] VCCTX_LVDS[2] CH24
VCCCORE[17] AP36 0.01U_0402_16V7K
60mAVCCTX_LVDS[3]
0.01U_0402_16V7K 2 2 2
AP37 22U_0805_6.3V6M
+VCCP AN19 VCCTX_LVDS[4]
+VCCP VCCIO[28]
2 1 +VCCAPLLEXP BJ22
@ RH264 0_0603_5% VCCAPLLEXP
30mA
10U_0805_4VAM
1 V33 +3VS_VCC3_3_6 1@ RH265 2 +3VS
VCC3_3[6]
HVCMOS
Place CH35 Near AP19 pin AN16 0_0402_5%
VCCIO[15]
CH27
1 Change to 0402
AN17
2 VCCIO[16] V34 CH26
@ VCC3_3[7]
0.1U_0402_10V7K
+VCCP AN21 2
VCCIO[17]
AN26
RH297 VCCIO[18]
1 2 +1.05VS_VCC_EXP
3.799A AN27 2925mA AT16 +VCCAFDI_VRM
0_0805_5% VCCIO[19] VCCVRM[3] +VCCP_VCCDMI
+VCCP
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 AP21 20mA
VCCIO[20] RH266
CH28
C C
147mA
CH29
CH30
CH31
CH32
DMI
AP24 0_0402_5%
VCCIO[22]
VCCIO
+3VS CH33
AP26 AB36 +1.05VS_VCC_DMI_CCI
75mA 1@ RH314 2 Change to 0402
VCCIO[23] VCCCLKDMI +VCCP 2 1U_0402_6.3V6K
1 0_0402_5%
AT24
VCCIO[24] CH34
1U_0402_6.3V6K
1
DFT / SPI
1 RH269 0_0805_5%
0.1U_0402_10V7K
+VCCP CH35
AJ16 1
0.1U_0402_10V7K VCCDFTERM[3]
190mA
2
CH36
+VCCAFDI_VRM AP16
VCCVRM[2] AJ17
Place CH53 Near AP13,AP15 pin VCCDFTERM[4] 2
2 1 +1.05VS_VCCAPLL_FDI BG6
@ RH270 0_0402_5% VccAFDIPLL
Change to 0402
30mA RH271
1 2+1.05VS_VCCDPLL_FDIAP17
+VCCP
0_0402_5% VCCIO[27] V1 +3V_VCCPSPI
10mA 1@ RH272 2
30mA
FDI
VCCSPI +3VS
Change to 0402 20mA 0_0402_5%
+VCCP_VCCDMI AU20 1
VCCDMI[2]
Change to 0402
CH38 2/29 change power rail to 3VS
B PANTHER-POINT_FCBGA989 1U_0402_6.3V6K B
2 follow QAU30,50
+VCCAFDI_VRM
RH275
+1.5V_PCIE 2 1 +VCCAFDI_VRM
0_0603_5%
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019HW
Date: Thursday, May 09, 2013 Sheet 18 of 46
5 4 3 2 1
5 4 3 2 1
D
+3V_DSW AD49 N26 +1.05VS_VCCUSBCORE 2 1 AO3413_SOT23
1 VCCACLK VCCIO[29] +VCCP
CH39 RH285 0_0603_5%
D
1 2 P26 1 3 1
2
VCCIO[30]
0.1U_0402_10V7K
28 PCH_VREG_EN# RH309 @ 0_0603_5% T16
D 0.1U_0402_10V7K 2 VCCDSW3_33mA P28 CH40 D
VCCIO[31]
1
1U_0402_6.3V6K
G
1
2
+VCCP LH3 +PCH_VCCDSW V12 T27 2 RH279
DCPSUSBYP VCCIO[32]
CH41
10UH_LB2012T100MR_20% 1 20K_0402_5%
1 2 T29 31 PCH_PWR_EN#
@ CH42 +3VS_VCC_CLKF33 T38 VCCIO[33] 2
2
VCC3_3[5]
10U_0805_10V4Z
1 0.1U_0402_10V7K
@ @ 2 T23 +3V_VCCPUSB 2 1
+VCCP 119mA VCCSUS3_3[7] +3V_PCH
CH43
0.1U_0402_10V7K
+VCCAPLL_CPY_PCH BH23 RH281 0_0603_5%
VCCAPLLDMI2 T24
2 VCCSUS3_3[8] 1 +3V_PCH +5V_PCH +3V_PCH
0.1U_0402_10V7K
AL29
VCCIO[14]
CH44
V23 1
VCCSUS3_3[9]
USB
2
2
CH47
+VCCSUS1 AL24 V24 +VCCA_USBSUS DH3
DCPSUS[3] VCCSUS3_3[10]
1U_0402_6.3V6K
1 RH284
CH45 P24 2 100_0402_5%
VCCSUS3_3[6] 1
@
CH48
1U_0402_6.3V6K AA19 CH751H-40PT_SOD323-2
1
2 VCCASW[1] T26 @ +PCH_V5REF_SUS
+VCCP VCCIO[34] +VCCP 2
AA21 1
VCCASW[2]
22U_0805_6.3V6M
22U_0805_6.3V6M
2 @ 1 +1.05VM_VCCSUS AA24 M26 +PCH_V5REF_SUS CH49
R407 0_0603_5% VCCASW[3] 1mA V5REF_SUS 2 1 0.1U_0603_25V7K
1 1 +3V_PCH 2
0.1U_0402_10V7K
CH50
CH51
1 AA26 RH287 0_0603_5%
CH52
1U_0402_6.3V6K AN24 +3V_VCCPSUS_1
2 AA29 VCCSUS3_3[1]
VCCASW[6] 2
803mA
AA31 +5VS +3VS
RH307 VCCASW[7]
+VCCP 2 1 +VCCP_VCCASW AC26 P34 +PCH_V5REF_RUN
VCCASW[8] 1mA V5REF
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
C RH289 DH4 C
1 1 1
0_0805_5% AC27 0_0603_5% RH288
VCCASW[9]
CH53
CH54
CH55
N20 +3V_VCCPSUS 2 1 +3V_PCH 100_0402_5%
VCCSUS3_3[2]
PCI/GPIO/LPC
AC29
VCCASW[10]
1
2 2 2 N22 CH56 CH751H-40PT_SOD323-2
1
AC31 VCCSUS3_3[3] 1U_0402_6.3V6K +PCH_V5REF_RUN
VCCASW[11] P20 +3VS
1
2
+3VS AD29 VCCSUS3_3[4]
VCCASW[12] P22 +3VS_VCCPCORE 2 1 CH57
RH313 AD31 VCCSUS3_3[5] RH290 0_0805_5% 1U_0603_10V6K
VCCASW[13] 1 2
2 1
W21 AA16 CH58
0_0805_5% VCCASW[14] VCC3_3[1] 0.1U_0402_10V7K
W23 W16 2 +3VS
LH4 1 2 +3VS_VCC_CLKF33 VCCASW[15] VCC3_3[8]
1U_0402_6.3V6K
@ CH59 W26
VCCASW[17] CH60
10U_0603_6.3V6M 2 2 W29 +3VS 0.1U_0402_10V7K
VCCASW[18] 2
W31 AJ2
VCCASW[19] VCC3_3[2] +1.05VS_SATA3
1
W33 RH294
VCCASW[20] AF13 CH62 2 1
VCCIO[5] +VCCP
0.1U_0402_10V7K 1
+VCCRTCEXT N16 2 0_0805_5%
DCPRTC AH13 CH63
1 VCCIO[12] 1U_0402_6.3V6K
CH64 +VCCAFDI_VRM Y49 AH14 +1.05VS_SATA3 2
+VCCP 0.1U_0402_10V7K VCCVRM[4] VCCIO[13]
2
B AF14 LH5 B
+1.05VS_VCCA_A_DPL BD47 VCCIO[6] 10UH_LB2012T100MR_20%
1 VCCADPLLA80mA
SATA
CH65 AK1 +VCCSATAPLL 1 2 +VCCP
+1.05VS_VCCA_B_DPL BF47 VCCAPLLSATA +VCCAFDI_VRM @
1U_0402_6.3V6K VCCADPLLB80mA
2 1
+VCCP +1.05VS_VCCDIFFCLKN AF11 +VCCAFDI_VRM CH66
AF17 VCCVRM[1] 10U_0805_10V4Z
2 1 +1.05VS_VCCDIFFCLKN AF33 VCCIO[7] +1.05VS_VCC_SATA RH299 @
RH298 0_0603_5% 1 AF34 VCCDIFFCLKN[1] AC16 +1.05VS_VCC_SATA 2 1 2
50mA VCCDIFFCLKN[2] VCCIO[2] +VCCP
AG34
VCCDIFFCLKN[3]
1U_0402_6.3V6K
CH67 AC17 1 0_0805_5%
1U_0402_6.3V6K VCCIO[3]
+VCCP 2
CH68
+1.05VS_SSCVCC 95mA AG33 AD17
VCCSSC VCCIO[4]
2 1 2
RH300 0_0603_5% 1 1 +VCCSST V16
CH70 DCPSST +VCCP
CH69 0.1U_0402_10V7K
1U_0402_6.3V6K +1.05VM_VCCSUS T17 T21
2 2 V19 DCPSUS[1] VCCASW[22]
DCPSUS[2]
MISC
+VCCP V21
VCCASW[23]
CPU
0.1U_0402_10V7K
0.1U_0402_10V7K
CH73
CH71
4.7U_0603_6.3V6K
2 2 2 A22 P32 +VCCSUSHDA 2 1
RTC
0.1U_0402_10V7K
1U_0402_6.3V6K
RH305 0_0603_5%
1 1 1 1
150_0402_1%
LH6 PANTHER-POINT_FCBGA989 CH77
1
CH74
CH75
CH76
A 10UH_LB2012T100MR_20% 0.1U_0402_16V4Z A
+VCCP 1 2 +1.05VS_VCCA_A_DPL
2 2 2 2
RH306
@
1 2 +1.05VS_VCCA_B_DPL
2
22U_0805_6.3V6M
22U_0805_6.3V6M
LH7
1U_0402_6.3V6K
1U_0402_6.3V6K
10UH_LB2012T100MR_20%
1 1 1 1 Security Classification Compal Secret Data Compal Electronics, Inc.
CH78
CH80
CH79
CH81
UH1I
AY4 H46
AY42 VSS[159] VSS[259] K18
AY46 VSS[160] VSS[260] K26
AY8 VSS[161] VSS[261] K39
B11 VSS[162] VSS[262] K46
B15 VSS[163] VSS[263] K7
B19 VSS[164] VSS[264] L18
D UH1H B23 VSS[165] VSS[265] L2 D
H5 B27 VSS[166] VSS[266] L20
VSS[0] B31 VSS[167] VSS[267] L26
AA17 AK38 B35 VSS[168] VSS[268] L28
AA2 VSS[1] VSS[80] AK4 B39 VSS[169] VSS[269] L36
AA3 VSS[2] VSS[81] AK42 B7 VSS[170] VSS[270] L48
AA33 VSS[3] VSS[82] AK46 F45 VSS[171] VSS[271] M12
AA34 VSS[4] VSS[83] AK8 BB12 VSS[172] VSS[272] P16
AB11 VSS[5] VSS[84] AL16 BB16 VSS[173] VSS[273] M18
AB14 VSS[6] VSS[85] AL17 BB20 VSS[174] VSS[274] M22
AB39 VSS[7] VSS[86] AL19 BB22 VSS[175] VSS[275] M24
AB4 VSS[8] VSS[87] AL2 BB24 VSS[176] VSS[276] M30
AB43 VSS[9] VSS[88] AL21 BB28 VSS[177] VSS[277] M32
AB5 VSS[10] VSS[89] AL23 BB30 VSS[178] VSS[278] M34
AB7 VSS[11] VSS[90] AL26 BB38 VSS[179] VSS[279] M38
AC19 VSS[12] VSS[91] AL27 BB4 VSS[180] VSS[280] M4
AC2 VSS[13] VSS[92] AL31 BB46 VSS[181] VSS[281] M42
AC21 VSS[14] VSS[93] AL33 BC14 VSS[182] VSS[282] M46
AC24 VSS[15] VSS[94] AL34 BC18 VSS[183] VSS[283] M8
AC33 VSS[16] VSS[95] AL48 BC2 VSS[184] VSS[284] N18
AC34 VSS[17] VSS[96] AM11 BC22 VSS[185] VSS[285] P30
AC48 VSS[18] VSS[97] AM14 BC26 VSS[186] VSS[286] N47
AD10 VSS[19] VSS[98] AM36 BC32 VSS[187] VSS[287] P11
AD11 VSS[20] VSS[99] AM39 BC34 VSS[188] VSS[288] P18
AD12 VSS[21] VSS[100] AM43 BC36 VSS[189] VSS[289] T33
AD13 VSS[22] VSS[101] AM45 BC40 VSS[190] VSS[290] P40
AD19 VSS[23] VSS[102] AM46 BC42 VSS[191] VSS[291] P43
AD24 VSS[24] VSS[103] AM7 BC48 VSS[192] VSS[292] P47
AD26 VSS[25] VSS[104] AN2 BD46 VSS[193] VSS[293] P7
AD27 VSS[26] VSS[105] AN29 BD5 VSS[194] VSS[294] R2
AD33 VSS[27] VSS[106] AN3 BE22 VSS[195] VSS[295] R48
AD34 VSS[28] VSS[107] AN31 BE26 VSS[196] VSS[296] T12
C AD36 VSS[29] VSS[108] AP12 BE40 VSS[197] VSS[297] T31 C
AD37 VSS[30] VSS[109] AP19 BF10 VSS[198] VSS[298] T37
AD38 VSS[31] VSS[110] AP28 BF12 VSS[199] VSS[299] T4
AD39 VSS[32] VSS[111] AP30 BF16 VSS[200] VSS[300] W34
AD4 VSS[33] VSS[112] AP32 BF20 VSS[201] VSS[301] T46
AD40 VSS[34] VSS[113] AP38 BF22 VSS[202] VSS[302] T47
AD42 VSS[35] VSS[114] AP4 BF24 VSS[203] VSS[303] T8
AD43 VSS[36] VSS[115] AP42 BF26 VSS[204] VSS[304] V11
AD45 VSS[37] VSS[116] AP46 BF28 VSS[205] VSS[305] V17
AD46 VSS[38] VSS[117] AP8 BD3 VSS[206] VSS[306] V26
AD8 VSS[39] VSS[118] AR2 BF30 VSS[207] VSS[307] V27
AE2 VSS[40] VSS[119] AR48 BF38 VSS[208] VSS[308] V29
AE3 VSS[41] VSS[120] AT11 BF40 VSS[209] VSS[309] V31
AF10 VSS[42] VSS[121] AT13 BF8 VSS[210] VSS[310] V36
AF12 VSS[43] VSS[122] AT18 BG17 VSS[211] VSS[311] V39
AD14 VSS[44] VSS[123] AT22 BG21 VSS[212] VSS[312] V43
AD16 VSS[45] VSS[124] AT26 BG33 VSS[213] VSS[313] V7
AF16 VSS[46] VSS[125] AT28 BG44 VSS[214] VSS[314] W17
AF19 VSS[47] VSS[126] AT30 BG8 VSS[215] VSS[315] W19
AF24 VSS[48] VSS[127] AT32 BH11 VSS[216] VSS[316] W2
AF26 VSS[49] VSS[128] AT34 BH15 VSS[217] VSS[317] W27
AF27 VSS[50] VSS[129] AT39 BH17 VSS[218] VSS[318] W48
AF29 VSS[51] VSS[130] AT42 BH19 VSS[219] VSS[319] Y12
AF31 VSS[52] VSS[131] AT46 H10 VSS[220] VSS[320] Y38
AF38 VSS[53] VSS[132] AT7 BH27 VSS[221] VSS[321] Y4
AF4 VSS[54] VSS[133] AU24 BH31 VSS[222] VSS[322] Y42
AF42 VSS[55] VSS[134] AU30 BH33 VSS[223] VSS[323] Y46
AF46 VSS[56] VSS[135] AV16 BH35 VSS[224] VSS[324] Y8
AF5 VSS[57] VSS[136] AV20 BH39 VSS[225] VSS[325] BG29
AF7 VSS[58] VSS[137] AV24 BH43 VSS[226] VSS[328] N24
AF8 VSS[59] VSS[138] AV30 BH7 VSS[227] VSS[329] AJ3
AG19 VSS[60] VSS[139] AV38 D3 VSS[228] VSS[330] AD47
B AG2 VSS[61] VSS[140] AV4 D12 VSS[229] VSS[331] B43 B
AG31 VSS[62] VSS[141] AV43 D16 VSS[230] VSS[333] BE10
AG48 VSS[63] VSS[142] AV8 D18 VSS[231] VSS[334] BG41
AH11 VSS[64] VSS[143] AW14 D22 VSS[232] VSS[335] G14
AH3 VSS[65] VSS[144] AW18 D24 VSS[233] VSS[337] H16
AH36 VSS[66] VSS[145] AW2 D26 VSS[234] VSS[338] T36
AH39 VSS[67] VSS[146] AW22 D30 VSS[235] VSS[340] BG22
AH40 VSS[68] VSS[147] AW26 D32 VSS[236] VSS[342] BG24
AH42 VSS[69] VSS[148] AW28 D34 VSS[237] VSS[343] C22
AH46 VSS[70] VSS[149] AW32 D38 VSS[238] VSS[344] AP13
AH7 VSS[71] VSS[150] AW34 D42 VSS[239] VSS[345] M14
AJ19 VSS[72] VSS[151] AW36 D8 VSS[240] VSS[346] AP3
AJ21 VSS[73] VSS[152] AW40 E18 VSS[241] VSS[347] AP1
AJ24 VSS[74] VSS[153] AW48 E26 VSS[242] VSS[348] BE16
AJ33 VSS[75] VSS[154] AV11 G18 VSS[243] VSS[349] BC16
AJ34 VSS[76] VSS[155] AY12 G20 VSS[244] VSS[350] BG28
AK12 VSS[77] VSS[156] AY22 G26 VSS[245] VSS[351] BJ28
AK3 VSS[78] VSS[157] AY28 G28 VSS[246] VSS[352]
VSS[79] VSS[158] G36 VSS[247]
PANTHER-POINT_FCBGA989 G48 VSS[248]
H12 VSS[249]
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
VSS[258]
A PANTHER-POINT_FCBGA989 A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019HW
Date: Thursday, May 09, 2013 Sheet 20 of 46
5 4 3 2 1
5 4 3 2 1
1
0.1U_0402_16V4Z 2
R3 470_0402_5%
R4 470_0402_5%
R5 680_0402_5%
R6 680_0402_5%
R7 680_0402_5%
R8 680_0402_5%
R9 680_0402_5%
R10 680_0402_5%
Q50
2N7002_SOT23 +3VS
2
2
1 3
S
HDMI connector
1
G
2
R18
+3VS 1M_0402_5%
2
G
1
JHDMI1
2
R15 3 1 HDMI_HPD 19
15 PCH_DDPB_HPD HP_DET
18
D
100K_0402_5% +HDMI_5V_OUT +5V
1
1 17
U2 R22 HDMI_SDATA 16 DDC/CEC_GND
2
2N7002H_SOT23-3 @ C40 HDMI_SCLK 15 SDA
20K_0402_5% SCL
14
0.1U_0402_16V4Z 2 13 Reserved
2
HDMI_R_CK- 12 CEC
C SM070001310 400ma 90ohm@100mhz DCR 0.3 CK- C
11
HDMI_R_CK+ 10 CK_shield
PCH_DPB_P3_RP R17 1 2 20_0402_5% HDMI_R_CK+ HDMI_R_D0- 9 CK+
8 D0-
1 2 HDMI_R_D0+ 7 D0_shield
@ L1 1 2 HDMI_R_D1- 6 D0+
WCM-2012-900T_0805 5 D1-
4 3 HDMI_R_D1+ 4 D1_shield 23
4 3 HDMI_R_D2- 3 D1+ GND 22
PCH_DPB_N3_RP R19 1 2 20_0402_5% HDMI_R_CK- 2 D2- GND 21
HDMI_R_D2+ 1 D2_shield GND 20
D2+ GND
SUYIN_100042GR019M23MZR
PCH_DPB_P0_RP R21 1 2 20_0402_5% HDMI_R_D0+ CONN@
1 2
@ L3 1 2
WCM-2012-900T_0805
4 3
4 3
PCH_DPB_N0_RP R24 1 2 20_0402_5% HDMI_R_D0-
+HDMI_5V_OUT
+3VS +3VS
B PCH_DPB_P1_RP R25 1 2 20_0402_5% HDMI_R_D1+ B
1 2
@ L4 1 2
WCM-2012-900T_0805
4 3
4 3
2
PCH_DPB_N1_RP R26 1 2 20_0402_5% HDMI_R_D1- R23 R29 RH315
1.5K_0402_5% 1.5K_0402_5% 2.2K_0402_5% RH304
2.2K_0402_5%
5
PCH_DPB_P2_RP R27 1 2 20_0402_5% HDMI_R_D2+
1
1 2 PCH_DDPB_CLK 4 3 HDMI_SCLK
1 2 15 PCH_DDPB_CLK
@ L5
WCM-2012-900T_0805 2N7002DWH_SOT363-6
4 3 QH7B
4 3
PCH_DPB_N2_RP R28 1 2 20_0402_5% HDMI_R_D2-
2
PCH_DDPB_DAT 1 6 HDMI_SDATA
15 PCH_DDPB_DAT
2N7002DWH_SOT363-6
QH7A
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019HW
Date: Thursday, May 09, 2013 Sheet 21 of 46
5 4 3 2 1
5 4 3 2 1
W=60mils W=60mils
+3VALW
+LAN_VDD
Q4 +LAN_IO 1.5A
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1 3 1
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
C13 AO3413L_SOT23-3 1 1 1 1 1 1 1
1U_0402_6.3V6K 1 1 1 1 1 1
G
C20 C21 C22 C23 C24 C25 C26
2
2 C14 C15 C16 C17 C18 C19
+VSB 2 2 2 2 2 2 2
2 2 2 2 2 2
2
D D
R30
470K_0402_5% These caps close to U64: Pin 3,6,9,13,29,41,45
Q5 These caps close to U1: Pin 12,27,39,42,47,48
1
EN_WOL
270K_0402_5%
SB000002X00 1 +LAN_IO Rising time (10%~90%)要>1mS and <100mS
2
BSS138W-7-F_SOT323-3 D
2 R31 1
28 WOL_EN
G C27 +LAN_IO
S 0.1U_0603_25V7K R32 +LAN_VDD
3
1 2 +LAN_VDDREG R33
1
2
0.1U_0402_16V7K
1 2 +LAN_EVDD10
0.1U_0402_16V7K
1U_0402_6.3V6K
0_0603_5% 1 1
0_0603_5%
C28 C29 1 1
4.7U_0603_6.3V6K
2 2 C30 C31
close to U1 Pin 22, 23 U1 2 2
ENSWREG 21 +LAN_EVDD10
3.3V : Enable switching regulator 34 EVDD10
0V : Disable switching regulator +LAN_VDDREG 35 VDDREG 3
VDDREG AVDD10 +LAN_VDD
6
AVDD10 9
R45 1 2 2.49K_0402_1% 46 AVDD10 45 +LAN_VDD
RSET AVDD10 L6 JLAN1 CONN@
W=60mils
24 36 +LAN_SROUT1.05 1 2 RJ45_TX3- 8
49 GND REGOUT PR4-
PGND W=60mils
2.2UH +-20% SQE3010T-2R2M-N 1 2 RJ45_TX3+ 7
PR4+
B Value = RTL8111F-CGT_QFN48_6X6 C34 C35 RJ45_RX1- 6 B
Part number = SA00004Y700 0.1U_0402_16V7K PR2-
2 1 RJ45_TX2- 5
PR3-
RJ45_TX2+ 4
4.7U_0603_6.3V6K PR3+
RJ45_RX1+ 3
PR2+ 9
TS1
These components close to U44: Pin 36 RJ45_TX0- 2 GND 10
LAN_MDIP0 1 24 RJ45_TX0+
( Should be place within 200 mils ) PR1- GND 11
TD1+ TX1+ RJ45_TX0+ 1 GND 12
LAN_MDIN0 2 23 RJ45_TX0- PR1+ GND
TD1- TX1- SANTA_130460-4
+V_DAC 3 22 R47 1 2 75_0402_5%
TDCT1 TXCT1 R48 1 2 75_0402_5%
+V_DAC 4 21 R49 1 2 75_0402_5%
TDCT2 TXCT2 R50 1 2 75_0402_5% RJ45_GND
LAN_MDIP1 5 20 RJ45_RX1+ SI# Change C39 to 1808 type 4/12 LED brightness fine tune
TD2+ TX2+
C38 1 2 LAN_MDIN1 6 19 RJ45_RX1- change from 510ohm to 330ohm
TD2- TX2- 2 1
10P_1808_3KV @ 10P_0603_50V8-J
0.01U_0402_16V7K LAN_MDIP2 7 18 RJ45_TX2+ C39 C281
TD3+ TX3+
LAN_MDIN2 8 17 RJ45_TX2- 1 2 +LAN_IO
TD3- TX3-
1 1
+V_DAC 9 16 C140 C139 Amber LED10
TDCT3 TXCT3
2
LAN_LED0 2 1 LAN_ACTIVITY# 1 2
1
3
Main:SP050006Y00
2nd:SP050006P00
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/06/29 Deciphered Date 2011/06/29 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019HW
Date: Thursday, May 09, 2013 Sheet 22 of 46
5 4 3 2 1
5 4 3 2 1
Temp Footprint:ACES_50711_0520W-001_52P-T
+3V_AOAC
1
D LPC_AD2
14 CLK_PCIE_MINI1# LPC_AD2 13,28,30
2 13 11 12 14 LPC_AD1
17 BT_ON# 14 CLK_PCIE_MINI1 LPC_AD1 13,28,30
G 15 13 14 16 LPC_AD0
15 16 LPC_AD0 13,28,30
Q26 3 S
2N7002_SOT23-3
PLT_RST# 17 18
16,22,26,28,30,6 PLT_RST# 17 18
CLK_PCI_DEBUG 19 20 WL_OFF# WL_OFF# 14
16 CLK_PCI_DEBUG 19 20
21 22 PLT_RST# Delete PLT_RST_ buffer
23 21 22 24
14 PCIE_PRX_DTX_N3 23 24 +3V_AOAC
14 PCIE_PRX_DTX_P3 25 26
27 25 26 28
29 27 28 30 MINI3_SMBCLK R86 1 @ 2 0_0402_5% PCH_SMBCLK
29 30 PCH_SMBCLK 14,29
31 32 MINI3_SMBDATA R87 1 @ 2 0_0402_5% PCH_SMBDATA
14 PCIE_PTX_C_DRX_N3 31 32 PCH_SMBDATA 14,29
33 34
14 PCIE_PTX_C_DRX_P3 33 34
35 36 USB20_N9
35 36 USB20_N9 16
37 38 USB20_P9
37 38 USB20_P9 16
39 40
41 39 40 42
43 41 42 44 MINI1_LED#
43 44 MINI1_LED# 28
C 45 46 C
@ R58 47 45 46 48
E51TXD_P80DATA 10_0402_5% 2 E51TXD_P80DATA2_R 49 47 48 50
28 E51TXD_P80DATA 49 50
1
@1R57 2 E51RXD_P80CLK_R 51 52
28 E51RXD_P80CLK 51 52
0_0402_5% R92
4.7K_0402_5%
G1
G2
G3
G3
1
(9~16mA)
53
54
55
56
2
R70
+3V_AOAC
100K_0402_5%
2
BT_ON 2 1 E51RXD_P80CLK_R
1K_0402_5%
R326
R370
+1.5VS 500 375 5 (Not wake enable)
1K_0402_5%
C69
2
1 2
+3V_AOAC
2
0.047U_0402_16V7K
G
1 3 +3VALW
D
Q11
A A
AO3413L_SOT23-3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019HW
Date: Thursday, May 09, 2013 Sheet 23 of 46
5 4 3 2 1
5 4 3 2 1
INVPWR_B+ L7 B+
+LCDVDD
Place closed to JLVDS1
W=60mils FBMA-L11-201209-221LMA30T_0805
+3VS 2 1
L8
FBMA-L11-201209-221LMA30T_0805
1 1 1 2 1
+LCDVDD C56 C57 C58
LCD POWER CIRCUIT 0.1U_0402_16V4Z 10U_0603_6.3V6M 0.1U_0402_16V4Z C59
1 1
C60 SM010014520 3000ma
1
+3VALW +3VS 2 2 2 680P_0402_50V7K 68P_0402_50V8J
220ohm@100mhz
D
R61
W=60mils 2 2 DCR 0.04 D
100_0603_5%
1
1
2
R62 C55
100K_0402_5% +3VS
4.7U_0603_6.3V6K
6
2 R64 1 2 2.2K_0402_5% LCD_CLK W=60mils W=60mils
2
R63 C66 2 1 220P_0402_50V7K INVTPWM
3
200K_0402_5% S Q7 R65 1 2 2.2K_0402_5% LCD_DATA
2 2 1 2 AO3413L_SOT23-3 C67 2 1 220P_0402_50V7K DISPOFF# 1 1
Q6A G @ C64 @ C65
DMN66D0LDW-7_SOT363-6 1 D 10P_0402_50V8J 10P_0402_50V8J
1
1
C61 +LCDVDD
0.047U_0402_16V7K 2 2
W=60mils
2
1 1
3
C63
0.1U_0402_16V4Z
C62
15 PCH_ENVDD
PCH_ENVDD 5 2 2
4.7U_0603_6.3V6K
LCD/LED PANEL Conn.
Q6B
4
DMN66D0LDW-7_SOT363-6
L11
1 2 USB20_P8_R
16 USB20_P8 1 2
+LCDVDD
4 3 USB20_N8_R
16 USB20_N8 4 3
1/5 Delete INVT_PWM WCM-2012-900T_4P
JLVDS1
1 R229 2 0_0402_5% 1
2 1
PCH_LCD_CLK 3 2
@ 15 PCH_LCD_CLK 3
15 DPST_PWM 1@ R197 2 0_0402_5% 15 PCH_LCD_DATA PCH_LCD_DATA 4
INVTPWM 43 4
5
15 PCH_TXOUT0+ 5
6
15 PCH_TXOUT0- 6
7
8 7
15 PCH_TXOUT1+ 8
1
@ 9
15 PCH_TXOUT1- 9
R72 10
11 10
10K_0402_5% 15 PCH_TXOUT2+ 11
12
15 PCH_TXOUT2- 12
13
2
14 13
15 PCH_TXCLK+ 14
15
15 PCH_TXCLK- 15
16
FB1 17 16
43 FB1 17
B FB2 18 B
43 FB2 18
FB3 19
43 FB3 19
FB4 20
43 FB4 20
+LG_VOUT 21
22 21
23 22
24 23
25 24
+3VS 25
USB20_N8_R 26
+3VS USB20_P8_R 27 26
28 27
D_MIC_CLK 29 28
@ 26 D_MIC_CLK D_MIC_DATA 30 29
26 D_MIC_DATA 30
1
R76 1 2
0_0402_5% R73 31
4.7K_0402_5% 32 GND
D4 33 GND
RB751V_SOD323 34 GND
2
35 GND
BKOFF# 1 2 DISPOFF# @ D55 GND
28 BKOFF# DISPOFF# 43
D_MIC_DATA 2 STARC_111H30-000000-G4-R
1 CONN@
1
D_MIC_CLK 3
R74
10K_0402_5% TVNST52302AB0_SOT523-3
2
A
6/27 Add ESD solution A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019HW
Date: Thursday, May 09, 2013 Sheet 24 of 46
5 4 3 2 1
5 4 3 2 1
D D
+3VS_MSATA
1 1 1
C44 C45 C43
JSATA1 PJSSD1
1 2 +3VS_MSATA2 1 +3VS
3 1 2 4 2 1
5 3 4 6 @ JUMP_43X39
7 5 6 8
9 7 8 10
11 9 10 12
13 11 12 14
15 13 14 16
17 15 16 18
19 17 18 20
21 19 20 22
1 2 SATA_PRX_C_DTX_P1 23 21 22 24
13 SATA_PRX_DTX_P1 23 24
0.01U_0402_16V7K 1 2 C662 SATA_PRX_C_DTX_N1 25 26
13 SATA_PRX_DTX_N1 25 26
0.01U_0402_16V7K C661 27 28
29 27 28 30
1 2 SATA_PTX_C_DRX_N1 31 29 30 32
13 SATA_PTX_DRX_N1 31 32
13 SATA_PTX_DRX_P1 0.01U_0402_16V7K 1 2 C660 SATA_PTX_C_DRX_P1 33 34
0.01U_0402_16V7K C659 35 33 34 36
37 35 36 38
39 37 38 40
+3VS_MSATA 39 40
B 41 42 B
43 41 42 44
45 43 44 46
47 45 46 48
@ R59 49 47 48 50
HDD_DETECT# 1 2 0_0402_5% 51 49 50 52
17 HDD_DETECT# 51 52
53 54
GND GND
BELLW_80003-1123
CONN@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019HW
Date: Thursday, May 09, 2013 Sheet 25 of 46
5 4 3 2 1
A B C D E
MUTE_LED 29
1
RA46
270_0402_1%
3 2
QA1B
MUTE_LED_L 5 JIO1 CONN@
1/5 Add FAN PWM function 1
28 EC_PWM_FAN 1
2N7002KDW_SOT363-6 2
28 FAN_SPEED1
4
3 2
1 16,22,23,28,30,6 PLT_RST# 3 1
+5VALW 4
5 4
28,29 PWR_LED# 5
2
14 PCIE_PTX_C_DRX_P4 6
7 6
14 PCIE_PTX_C_DRX_N4 7
RA32 8
8
100K_0402_5%
14 CLK_PCIE_CD 9
9
6
PCIE Card Reader 14 CLK_PCIE_CD# 10
1
11 10
QA1A 12 11
14 PCIE_PRX_DTX_P4 12
2 13
23,29 AOAC_PW_ON 14 PCIE_PRX_DTX_N4 13
14
2N7002KDW_SOT363-6 U2D_DP3 15 14
1
U2D_DN3 16 15
17 16
28 EAPD 17
24 D_MIC_DATA 18
19 18
24 D_MIC_CLK 19
20
13 SATA_LED# 20
+5V_AOAC_LED 21
MUTE_LED_L 22 21
PCH_SMB_DA1_AMP 23 22
PCH_SMB_CK1_AMP 24 23
25 24
+3VS +5VS 13 HDA_SPKR 25
13 HDA_RST_AUDIO# 26
27 26
13 HDA_SYNC_AUDIO 27
13 HDA_SDIN0 28
29 28
13 HDA_BITCLK_AUDIO 29
13 HDA_SDOUT_AUDIO 30
31 30
32 31
+USB_BS 32
33
33
2
34
34
2
RH228 35
RH280 36 35 41
2.2K_0402_5% +5VS 36 G1
2N7002DWH_SOT363-6 2.2K_0402_5% 37 42
37 G2
2
38 43
1
39 38 G3 44
1
1 6 PCH_SMB_CK1_AMP 40 39 G4 45
14,28 EC_SMB_CK2 +3VS 40 G5
2 2
QH5A STARC_111H40-100000-G4-R
5
4 3 PCH_SMB_DA1_AMP
14,28 EC_SMB_DA2
2N7002DWH_SOT363-6
QH5B
1/18 Modify JIO1 pin define
100K_0402_5%
1
RU13 +3VALW VL
VL 1 2 RH337
U8 100K_0402_5%
1000P_0402_50V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
74AHC1G09GW_TSSOP5
5
0_0402_5% 1 1 1
2
5
CU4
P
B
0.1U_0402_16V4Z
CU5
CU6
4 USB_CHARGE_EN_R
4 3 USB_CHARGEEN 2 O Number = SA00003Y000
Part
1 28 USB_CHARGE_EN A
G
2 2 2
CU1
1U_0402_6.3V6K
1
3
3 QA2B 3
C115
R146
2 2N7002KDW_SOT363-6 1M_0402_5%
2
UU1
1
1 12 <CONN>
IN OUT
<PCH> 13 9 USB_IN_STATUS#
FAULT# STATUS# USB_IN_STATUS# 37
USB20_N3 2 11 U2D_DN3
16 USB20_N3 DM_OUT DM_IN
USB20_P3 3 10 U2D_DP3
16 USB20_P3 DP_OUT DP_IN
ILIM_SEL 4 15 RU11 2 1 19.1K_0402_1%
USB_CHARGE_EN_R 5 ILIM_SEL ILIM_LO 16 RU5 2 1 19.1K_0402_1%
EN ILIM_HI +5VALW +2543PWR
USB_CTL1 6
USB_CTL2 1 RU16 2 USB_CTL2_R 7 CTL1 14
28 USB_CTL2 CTL2 GND Modify from pin15 to pin16 1125
0_0402_5% USB_CTL3 8 17 W=80mils
CTL3 GPAD SI7326DN-T1-E3_PAK1212-8
Add for SDP mode at MV phase 07/24
TPS2543RTER_QFN16_3X3 W=80mils U4
+3VL 1
2
10U_0603_6.3V6M
3 5
2
C518
0.1U_0402_16V4Z
C97
RU14 1 1
10K_0402_5%
10K_0402_5%
C99
4
2
@ @ 10K_0402_5% 0.1U_0402_16V4Z
2 2
RU12
RU8
RU7 RU15
1
ILIM_SEL 2 C98 2 2 1
+VSB
10K_0402_5% 10K_0402_5% 1000P_0402_50V7K R187
20K_0402_5%
2 1
2 1
6
USB_CTL1 USB_CTL2_R USB_CTL3 1
1
D C187
RU9 RU10 +3VS 2 Q21 0.1U_0603_25V7K
100K_0402_5% 100K_0402_5% G SB000002X00 USB_IN_STATUS# 2
S BSS138W-7-F_SOT323-3 2
3
QA2A
1
1
2N7002KDW_SOT363-6
4 4
State S0 S3 S4, S5
Mode SDP DCP(Mouse/KB wake) DCP(Power wake)
Security Classification Compal Secret Data Compal Electronics, Inc.
CTL1 CTL2 CTL3
ILIM_ CTL1 CTL2 CTL3 ILIM_ CTL1 CTL2 CTL3 ILIM_ Issued Date 2011/06/29 Deciphered Date 2011/06/29 Title
SEL SEL SEL SCHEMATICS,MB A8554
Control Pin THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
1 1 1 0 0 1 1 1 0 0 1 1 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 26 of 46
A B C D E
A B C D E
1 1
1000P_0402_50V7K
1 8
150U_B2_6.3VM_R45M
0.1U_0402_16V4Z
GND OUT
1000P_0402_50V7K
2 7
3 IN OUT 6
IN OUT 1
4 5 1 1
EN OC# + +USB_AS
1 1
G547F1P81U_MSOP8 C90 C91 C92
0.1U_0402_16V4Z
C88 C89
2 2 2
2 2
JUSB1
USB3TXDP1_C 9
1 SSTX+
1 2 USB_OC0# USB3TXDN1_C 8 VBUS
USB_OC0# 16 SSTX-
@ R94 0_0402_5% USB20_P0_C 3
USB_ON# 7 D+
28 USB_ON# GND
USB20_N0_C 2 10
USB3RXDP1_C 6 D- GND 11
4 SSRX+ GND 12
USB3RXDN1_C 5 GND GND 13
SSRX- GND
LOTES_AUSB0014-P001A
CONN@
2 2
@ R227 0_0402_5%
16 USB3_TX1_N C685 1 2 0.1U_0402_16V7K USB3TXDN1 1 2 USB3TXDN1_C
USB20_P0_C
WCM-2012-900T_4P USB20_N0_C
4 3
4 3
3
1 2
1 2
L21
@
16 USB3_TX1_P C684 1 2 0.1U_0402_16V7K USB3TXDP1 1 2 USB3TXDP1_C
@ R228 0_0402_5% PJDLC05C_SOT23-3
@ R231 0_0402_5% D10
USB3_RX1_N 1 2 USB3RXDN1_C
16 USB3_RX1_N
1
WCM-2012-900T_4P
4 3
4 3 D9
USB3RXDN1_C 1 1 109 USB3RXDN1_C
1 2
1 2 USB3RXDP1_C 2 2 98 USB3RXDP1_C
L22
USB3_RX1_P 1 2 USB3RXDP1_C USB3TXDN1_C 4 4 77 USB3TXDN1_C
16 USB3_RX1_P
@ R232 0_0402_5%
USB3TXDP1_C 5 5 66 USB3TXDP1_C
@ R233 0_0402_5%
USB20_N0 1 2 USB20_N0_C 3 3
16 USB20_N0
WCM-2012-900T_4P 8
4 3
4 3 IP4292CZ10-TB
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
C C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019HW
Date: Thursday, May 09, 2013 Sheet 27 of 46
A B C D E
5 4 3 2 1
+3VALW_EC
2 BOARD_ID +3VALW_EC
L9
+3VALW_EC
0.1U_0402_16V4Z
C100
0.1U_0402_16V4Z
C101
0.1U_0402_16V4Z
C102
0.1U_0402_16V4Z
C103
1000P_0402_50V7K
C104
1000P_0402_50V7K
C105
1
ECAGND
BOARD_ID 0_0603_5% 0.1U_0402_16V4Z
2 2 2 2 1 1 2
2
← +3VALW_EC
1
D D
R112
100K_0402_5%
2 1
+3VALW_EC Project_ID
M12
K12
B11
CH751H-40PT_SOD323-2
K7
J7
J6
J4
U5 EC_ACIN 2 1 ACIN 15,34,36
2
D5
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
R136 2/29 change KB PWM from M10 to M9
100K_0402_5% C109 2 1 100P_0402_50V8J
@
17 GATEA20 GATEA20 M2 M9 KBL_PWM# KBL_PWM# 29
1
+3VS
1
A11
2
KB932BF A0 LFBGA 128P KBC 20mil L10
2
R714
A 10K_0402_5% A
2
KSO9 C233 1 2 100P_0402_50V8J KSI2 KSI5 27 33
R131 KSO8 C232 1 2 100P_0402_50V8J KSI1 KSO0 26 27 GND
100K_0402_5% KSO7 C235 1 2 100P_0402_50V8J KSI0 KSI2 25 26
KSO6 C234 1 2 100P_0402_50V8J KSI3 24 25
28 KSO[0..15] 24
KSO5 C237 1 2 100P_0402_50V8J KSO5 23
Keyboard backlight Conn
1
KSO4 C236 1 2 100P_0402_50V8J KSO15 KSO1 22 23
2 ON/OFF# KSO3 C240 1 2 100P_0402_50V8J KSO14 KSI0 21 22 +5VS +5VALW
ON/OFF# 28 21
KSO2 C238 1 2 100P_0402_50V8J KSO13 KSO2 20
ON/OFFBTN# 1 KSO1 C241 1 2 100P_0402_50V8J KSO12 KSO4 19 20
19
1
KSO0 C239 1 2 100P_0402_50V8J KSO11 KSO7 18
3 51ON# KSO10 KSO8 17 18 R80
2 51ON# 34 17
KSI7 C243 1 2 100P_0402_50V8J KSO9 KSO6 16 100K_0402_5%
C269 KSI6 C242 1 2 100P_0402_50V8J KSO8 KSO3 15 16 +5VS_KBL Q9
D6 15 R369
3
0.1U_0402_16V7K CHN202UPT_SC70-3 KSI5 C245 1 2 100P_0402_50V8J KSO7 KSO12 14 S
2
1 KSI4 C244 1 2 100P_0402_50V8J KSO6 KSO13 13 14 2 2 1
KSI3 C248 1 2 100P_0402_50V8J KSO5 KSO14 12 13 G
12
3
D KSI2 C246 1 2 100P_0402_50V8J KSO4 KSO11 11 CONN@ JKBL1 D 1K_0402_5%
1
EC_ON 2 Q46 KSI1 C249 1 2 100P_0402_50V8J KSO3 KSO10 10 11 1
2N7002KDW_SOT363-6
28 EC_ON 10 1
0.047U_0402_16V7K
Q49B
G 2N7002H_SOT23-3 KSI0 C250 1 2 100P_0402_50V8J KSO2 KSO15 9 2 AO3413L_SOT23-3
KSO1 WL_WHIT 8 9 5 2 3 5
S 1
3
8 G1 3
2
KSO0 WLAN_AMBER 7 6 4 KBL_PWM# 28
7 G2 4
C68
R132 26 MUTE_LED 6 @
4
5 6 ACES_50504-0040N-001
+3VS 5 2
10K_0402_5% R372 1 2 360_0402_5% 4
28 CAP_LOCK# 4
+5VS 3
1
R374 1 2 360_0402_5% 2 3
28 KB_BKL_LED# 2
1
1
TP ON/OFF LED
4/13 Add AC/battery plug-in detect circuit 4/12 change power rail to +5VALW +3VS
JTP2
+5VALW +5VALW 1
1 2 TP_ON_OFF
5 2 3 TP_ON_OFF 28
G1 3 1
6 4
G2 4 C223
51ON# 2 0.1U_0402_16V7K
1
1 R368 2 1 2 C10 Amber White ACES_50504-0040N-001
CONN@
VIN
100_0402_5% 1U_0603_25V6 R367 R371
@ @ 560_0402_5% 360_0402_5%
1
2
BATT+ 1 R375 2 1 2 C11 2 @ Q47 WLAN_AMBER WL_WHIT
100_0402_5% 1U_0603_25V6 SB000002X00
2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
G
3
@ @ S BSS138W-7-F_SOT323-3
3
TP/B TO M/B
1
Q48A
Q48B
@ R133 2 5 +5VS
28 WLAN_OFF_LED# WLAN_ON_LED# 28 +5VALW
1M_0402_5%
+3VALW_EC +3V_TP
4
2
1
R728
@ R83 @ Q19 2 1
3
100K_0402_5% S 0_0603_5%
2 Q13
VCU01 MV Phase change to reverse 7/24 G
2
D 3 1
D
1
AO3413L_SOT23-3 +5VS_TP AO3413L_SOT23-3 @ 1
G
1
D
2
TP_ON_OFF 2 @ Q16 SYSON# C220
G SB000002X00 31 SYSON#
S BSS138W-7-F_SOT323-3 2 0.1U_0402_16V7K
3
Power On/Off board Conn.
1
D7
+5VS_TP
+5VS
10/07 change conn to SP010014M10 HDD LED Power
1
+5VALW AZ5125-02S.R7G_SOT23-3
R77 +5VS_KBL JTP1
+3V_TP
JPW1 1K_0402_5% @ 1
1
1
+5VALW
1 2 @ R201 1 @ R7571 2 100_0603_5% 2
PWR_LED# 2 1 R75 0_0402_5% PCH_SMBDATA_R 3 2
26,28 PWR_LED#
3
3 2 2 @ R198 1 PCH_SMBCLK_R 4 3
+3VALW_EC 3 100K_0402_5% +5V_AOAC_LED 4
4 TP_DATA 0_0402_5% 5
28 LID_SW# 4 R373 28 TP_DATA 5
1
ON/OFFBTN# 5 7 D TP_CLK 6 9
2
5 G1 28 TP_CLK 6 G1
6 8 23,26 AOAC_PW_ON
1 2 2 Q12 1 7 10
6 G2 2N7002_SOT23-3 8 7 G2
2N7002KDW_SOT363-6
1 1 1 G 1 8
C116
C672 C671 C670 ACES_51524-0060N-001 1K_0402_5% S
3
CONN@ ACES_51524-0080N-001
2
Q49A
C117
100P_0402_50V8J 100P_0402_50V8J
100P_0402_50V8J 1 CONN@
2 2 2 2 2
28 AOAC_PW_ON# C70 100P_0402_50V8J
1 0.047U_0402_16V7K
2 100P_0402_50V8J
CPU stand‐off CLIP x 28
@ H7
H_2P3
@ H8
H_2P5
@ H9
H_2P3
@ H10
H_2P3 @ H1 @ H2 @ H3 @ H4
PCB
ZZZ1 CLIP1 CLIP2 CLIP3 CLIP4 CLIP5 CLIP21 CLIP25
4/10 Change HW Shutdown solution
U7
1
1
HOLEA HOLEA HOLEA HOLEA H_3P3 H_3P3 H_3P3 H_3P3 CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 +3VS
HOLEA HOLEA HOLEA HOLEA HW_SHUTDOWN# 1 6
1
1
37 HW_SHUTDOWN# RST1# TEST
2 5
1
GND DSR
1
1
@ H11 @ H12 @ H13 @ H14 CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 CH751H-40PT_SOD323-2 FT7521_MO_252 C251
H_2P5 H_2P0 H_2P3N H_2P3 0.1U_0402_16V7K
1
1
HOLEA HOLEA HOLEA HOLEA 2
mSATA card stand‐off
1
CLIP11 CLIP12 CLIP13 CLIP14 CLIP15 CLIP23 CLIP27 FD1 FD2 FD3 FD4
1
CLIP16 CLIP17 CLIP18 CLIP19 CLIP20 CLIP24 CLIP28 Security Classification Compal Secret Data Compal Electronics, Inc.
1
CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 CLIP_2X10 2011/06/29 2011/06/29 Title
@ H19 @ H20
Issued Date Deciphered Date
SCHEMATICS,MB A8554
1
H_1P2N H_1P1N
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HOLEA HOLEA Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019HW
Date: Thursday, May 09, 2013 Sheet 29 of 46
1
1
5 4 3 2 1
4/9 Modify Circuit, 9635 & 9656 co-lay for WIN8 SKU
1
0.1U_0402_16V4Z 9656@ 9635@
1 1 1 R738 R737
1
D C677 C678 C679 9656@ 0_0402_5% 0_0402_5% D
R739
0.1U_0402_16V4Z 0_0402_5%
2
2 2 2
0.1U_0402_16V4Z 1 Base I/O Address
2
C676 0 = 02Eh +3VS
* 1 = 04Eh
0.1U_0402_16V4Z
24
19
10
1
U69 2
R731
VSB
VDD
VDD
VDD
9635@ 4.7K_0402_5%
LPC_AD0 26 28 LPC_PD#_TPM
13,23,28 LPC_AD0
2
LPC_AD1 23 LAD0 LPCPD# 9 BADD
13,23,28 LPC_AD1 LAD1 TESTB1/BADD
LPC_AD2 20 8 R733 2 1 0_0402_5%
13,23,28 LPC_AD2 LAD2 TEST1
1
LPC_AD3 17 9635@ R732
13,23,28 LPC_AD3 LAD3 14 TPM_XTALO @ 4.7K_0402_5%
XTALO 13 TPM_XTALI
TPM XTALI
21 SLB 9635 TT 1.1 @
16,28 CLK_PCI_LPC
2
22 LCLK 2 T40 PAD
13,23,28 LPC_FRAME# LFRAME# GPIO2
16 6
16,22,23,26,28,6 PLT_RST# LRESET# GPIO
27 T41 PAD
13,28 SERIRQ SERIRQ
15 PM_CLKRUN#_TPM PM_CLKRUN#_TPM 15 @
1 2 7 CLKRUN# 1
+3VALW PP NC 3
NC
2
9635@ @ R734 12
GND
GND
GND
GND
R507 4.7K_0402_5% @R736 NC
0_0402_5% 0_0402_5%
SLB9635TT_TSSOP28
4
11
18
25
2
1
C C
+3VS
1/13 change Y8 to standard part
1
18P_0402_50V8J
9635@ TPM_XTALI C681 1 2
R506
1
4.7K_0402_5% 9635@
1
@R735
2
Y8 9635@
@ 10M_0402_5% 32.768KHZ_12.5PF_9H03200019
LPC_PD#_TPM R505 2 1 0_0402_5% SUS_STAT#
SUS_STAT# 15
2
TPM_XTALO C680 1 2
PLT_RST# R740 2 9656@ 1 0_0402_5% BADD
18P_0402_50V8J
9635@
ACCELEROMETER
B B
+3VALW
U25
1 9 +3VALW
Vdd_IO INT2 11
INT1 ACCEL_INT# 16
EC_SMB_CK1 4 14
28,35,36 EC_SMB_CK1 SCL/SPC VDD
EC_SMB_DA1 6
28,35,36 EC_SMB_DA1 SDA/SDI/SDO
7 5
2 R166 1 8 SDO/SA0 GND 12
+3VALW CS GND
10K_0402_5% 10
RES
2
13 1 1
@ R167 2 RES 15 C218
3 NC RES 16 C219
0_0402_5% NC RES 0.1U_0402_16V7K 10U_0603_6.3V6M
2 2
HP3DC2
1
1
@ R168
0_0402_5%
2
A
Must be placed in the center of the system. A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 30 of 46
5 4 3 2 1
A B C D E
+5VALW +5VALW
+5VALW TO +5VS
2
+5VALW
SI7326DN-T1-E3_PAK1212-8 +5VS R174 R175
U12 100K_0402_5% 100K_0402_5%
1
10U_0603_6.3V6M
2
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1 5 3 SYSON# SUSP 1
1 1 29 SYSON# 41,6 SUSP
C172
1U_0603_25V6
C173
1 1 R176
1
D
C174
C175
470_0603_5%
1
SYSON 2 U13 D
28,40,41 SYSON
4
2 2 G 2N7002H_SOT23-3 2 U14
10,28,38,39,40 SUSP#
1
2 2 S G 2N7002H_SOT23-3
1
R177 S
3
6
100K_0402_5% R178
10K_0402_5%
20mil 10mil
2
+VSB 2 1 5VS_GATE 2 SUSP
2
R180
20K_0402_5% 1 Q14A
1
3
C179 DMN66D0LDW-7_SOT363-6
0.1U_0603_25V7K
SUSP 5 2
Q14B
4
DMN66D0LDW-7_SOT363-6
2 +3VALW TO +3VS 2
2
R182 R183 R184 @ R185
22_0603_5% 470_0603_5% 470_0603_5% 470_0603_5%
+3VALW +3VS
6 2
3 1
6 1
6 1
SI7326DN-T1-E3_PAK1212-8
U18
1 @
2
2
10U_0603_6.3V6M
C181
10U_0603_6.3V6M
C182
1U_0603_25V6
C184
R186
470_0603_5% Q15A Q15B Q17A Q18A
1
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
4
2 2 2 2
1
R188 10mil
20mil 47K_0402_5%
6
+VSB 2 1 3VS_GATE
1
3
C191 2 SUSP
0.1U_0603_25V7K
Q20A
1
SUSP 5 2 DMN66D0LDW-7_SOT363-6
Q20B
4
DMN66D0LDW-7_SOT363-6
3 3
+5VALW
+3VALW TO +3VALW(PCH AUX Power)
Short J1 for PCH VCCSUS3.3
2
R189
+3VALW +3V_PCH 100K_0402_5%
J1
1 2
1
1 2 PCH_PWR_EN#
19 PCH_PWR_EN#
JUMP_43X39@ 40mil
SI7326DN-T1-E3_PAK1212-8
U15
3
1
2
2
10U_0603_6.3V6M
5 3 1 1
10U_0603_6.3V6M
C177
1U_0603_25V6
C178
1 1 28 PCH_PWR_EN 5 Q17B
10U_0603_6.3V6M
1
470_0603_5% DMN66D0LDW-7_SOT363-6
4
4
2 2
1
2 2 R192
100K_0402_5%
2
6
20mil 10mil
+VSB R181 2 1 200K_0402_5% 3V_GATE
4 2 PCH_PWR_EN# 4
1
Q43A
1
3
C180 DMN66D0LDW-7_SOT363-6
0.1U_0603_25V7K
2
PCH_PWR_EN# 5
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019HW
Date: Thursday, May 09, 2013 Sheet 32 of 46
5 4 3 2 1
5 4 3 2 1
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019HW
Date: Thursday, May 09, 2013 Sheet 33 of 46
5 4 3 2 1
5 4 3 2 1
For RF request
B+
2200P_0402_50V7K
2200P_0402_50V7K
6.8P_0402_50V8C
6.8P_0402_50V8C
0.1U_0402_25V6
0.1U_0402_25V6
1
1
PC51
PC53
PC54
PC56
D D
2
PC52
PC55
ADPIN PL1 VIN
HCB2012KF-121T50_0805
1 2
ACES_88299-0610
6
6 5 B+
5 4 ACIN_LED 1 2
4 3 Charge_LED
3 2 PL2
1000P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
100P_0402_50V8J
6.8P_0402_50V8C
6.8P_0402_50V8C
HCB2012KF-121T50_0805
0.1U_0402_25V6
0.1U_0402_25V6
2 1
100P_0402_50V8J
1
1
PC57
PC59
PC60
PC62
PC3
PC4
1
1
@ PJP1 PR1 @
PC1
PC2 1K_0402_5%
2
PC58
PC61
1000P_0402_50V7K
2
2
3
C C
PD1
PJSOT24CW_SOT323
PD4
1
PJSOT24CW_SOT323
+3VLP +3VALW +3VLP +3VALW
10K_0402_5%
1
1
@ 0_0402_5% 0_0402_5%
PR33
100K_0402_1%
PR32 @ PR30 PR31
2
turn off 3/5VALW in S5
VIN
3
2
+3VLP
10K_0402_5%
10K_0402_5%
1 2
1
37.1
10K_0402_1%
1
100K_0402_5%
TP0610K-T1-GE3 1P SOT23-3
PR40
1
1
PR26
PR27
PQ5
PR39
B @ @ B
2
2
VS PU2
2N7002KW_SOT323-3
@ 74LVC1G02GW_SOT353-5
PD8
5
15,28,36 ACIN @ D PR25
1 2 2 249_0402_1% 1
P
G ACIN_LED 1 2 4 B
PQ1 O
PQ7
2
LL4148_LL34-2 A
G
TP0610K-T1-GE3 1P SOT23-3 BAT_CHG_LED 28
PR29 0_0402_5%
PD3 S
0.22U_0603_25V7K
100K_0402_5%
LL4148_LL34-2
1
2 1 3 1 @
BATT+
PR28
0.22U_0603_25V7K
PC9
100K_0201_1%
1
2
1
1
PC6 @ @ @
PR4
PC5
2
0.1U_0603_25V7K
@
2
PR5
2
5
22K_0201_1%
1 2 2
P
29 51ON# B
Charge_LED 4
Y 1 BAT_CHG_LED
A
G
PU3
3
MC74VHC1G08DFT2G SC70 5P
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 34 of 46
5 4 3 2 1
5 4 3 2 1
BATT++ BATT+
D
For KB930 ‐‐> Keep PU1 circuit For KB9012 ‐‐> Remove PU1 circuit, but keep PR25 D
PL3
SMB3025500YA_2P
(Vth = 0.825V) PH1, PR15, PQ3, PR17,PR18, PR16
BATT++ 2 1 BATT+
VCIN0_PH‐‐>NTC_V
VCIN1_PH‐‐>Turbo_V
1
PC7 PC8
1000P_0402_50V7K 0.01U_0402_25V7K
2
PH1 under CPU botten side :
ACES_50281-0120N-001 CPU thermal protection at 97+‐3 degree C
1
1 Recovery at 55 +‐3 degree C
2
2 3
3 4 PR11
4
5
5 100_0201_1% Rset = 3 * Rtmh
6 1 2
EC_SMB_DA1 28,30,36
6
7
7
8 PR10
Rhyst = (Rset* Rtml) / (3*Rtml ‐ Rset)
8 9 100_0201_1%
9
10
10 1 2
EC_SMB_CK1 28,30,36
Rtmh at 97C = 6.24K, Rtml at 55C = 27.16K
13 11
C 14 GND
GND
11
12
12 Rset = 3 * 6.24K =18.72K → 18.7K C
1
1 2 BATT_TEMP
BATT_TEMP 28
PR12
1
PC10 18.7K_0402_1%
.1U_0402_16V7K
2
2
PR13
1
PU1 8.06K_0402_1%
1 8
1
VCC TMSNS1 PH1
2 7 100K_0402_1%_NCP15WF104F03RC
GND RHYST1
2
MAINPWON 3 6
37 MAINPWON OT1 TMSNS2
+3VS 4 5 2 1 2 1
OT2 RHYST2 ADP_I 28,36
G718TM1U_SOT23-8 PR14 PR15
6.04K_0201_1%
2
28K_0402_1%
1
PR16 PR17
B 100K_0201_1% 10K_0201_1% B
PQ2
TP0610K-T1-GE3 1P SOT23-3
1
28,6 H_PROCHOT#
2
B+ 3 1
+VSB
1
D
PQ3
0.22U_1206_25V7K
100K_0201_1%
2 1 2
H_PROCHOT#_EC 28
1
G
@ PR18
1
1
PR19
2N7002KW_SOT323-3 0_0201_5%
Active point = 71.67W
PC11
+5VALW PC12 @ S
3
0.1U_0603_25V7K
Recovery point = 63.17W
2
2
2
2
2
PR21
PR20 22K_0201_1%
100K_0201_1% 1 2
@ short pad
PR22
1
0_0201_5% D
1 2 2 PQ4
15,37 SPOK
G SSM3K7002FU_SC70-3
S
3
1
PC13 @
.1U_0402_16V7K
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 35 of 46
5 4 3 2 1
A B C D
1
D
2 PQ101
G SSM3K7002FU_SC70-3
S
3
1 1
1 2 1 2
PR101 PR102
1M_0201_1% 3M_0201_1%
B+
VIN P1 PQ103
P2
PR103 PL101
TPCA8057-H_PPAK56-8-5 AON7702L_DFN8-5 PQ104
0.02_1206_1%
PQ102 1.2UH +-30% 1231AS-H-1R2N=P3 2.9A AON7702L_DFN8-5
1 1 1 4 1 2 1
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
2 2 2
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
10U_0805_25V6K
5 3 3 5 2 3 @ 5 3
0.1U_0402_25V6
1
@
PC105
VIN
PC108
PC106
0.01U_0402_50V7K
@
1
1
0_0201_5%
PC107
1
1
PC103
PC104
PC102
0_0402_5%
4
4
1
PR104
PC101
PC110
2
PR105
2 PC109
0.1U_0402_25V6
2
@ 1 2 PD101
@
2
3
2
BAT54CW_SOT323-3
0.1U_0402_25V6
0.1U_0402_25V6
BQ24725_BATDRV 1 2
1
PC111
PC112
PR106
4.12K_0603_1%
PC113 0.047U_0402_25V7K
1
4.12K_0603_1%
4.12K_0603_1%
2
1
1 2
PR108
PR107
5
10_1206_1%
1
PQ105
PR109
2
AON7408L_DFN8-5
2
2
PR110 2
BQ24725_ACP
BQ24725_ACN
0_0603_5% PR111
1
DH_CHG 1 2 4
BQ24725_BST
PD102 BATT+
BQ24725_LX
0_0402_5%
1
1 2 RB751V-40_SOD323-2
DH_CHG
PD103
2011/03/18 PC114 PC115 PL102 PR112
3
2
1
1 2 10UH_FDSD0630-H-100M-P3_3.8A_20% 0.01_1206_1% RB751V-40_SOD323-2
delete VIN voltage 1U_0603_25V6K
BQ24725_LX 1 2 CHG 1 4
1U_0603_25V6K
detecting circuit
4.7_1206_5%
5
1
2 3
20
19
18
17
16
PR113
PU101
1 CSOP1
1 CSON1
PQ106
BTST
VCC
PHASE
HIDRV
REGN
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.01U_0402_50V7K
21 AON7406L_DFN8-5
0.1U_0402_25V6
0.1U_0402_25V6
PAD
1
@
PC118
PC119
2
1
PC121
PC116
PC117
1 15 4
PC122
DL_CHG
ACN LODRV
680P_0402_50V7K
PC120
2
2 14
2
ACP GND
PR114
3
2
1
2
BQ24725ARGRR QFN 20P CHARGER 0_0603_5% @
BQ24725_CMSRC 3 13 SRP 1 2 CSOP1
CMSRC SRP
1
BQ24725_ACDRV 4 12 SRN 1 2 CSON1
2
PR116 ACDRV SRN PR115
10K_0201_1% 0_0603_5% PC123
For KB930 --> Keep PR116 1 2 5 11 BQ24725_BATDRV 0.1U_0603_25V7K
+3VALW ACOK ACDET BATDRV
IOUT
SDA
ILIM
SCL
+3VLP
3
@ PR117
10K_0402_1%
+3VALW 3
6
10
1 2
1 2
PR119
0_0201_5%
0.01U_0402_25V7K
1 2
VIN
100K_0201_1%
15,28,34 ACIN 390K_0201_1%
1
PR118
1
PR120
@ 0_0201_5%
PC124
0_0201_5%
2
short pad
2
270K_0201_1%
2
PR123
1
PR124
1
PR122
@
short pad
2
@
2
0_0201_1%
short pad
0.047U_0402_16V7-K
42.2K_0201_1%
PR125
EC_SMB_CK1 28,30,35
1
1
PC125
PR126
@
2
short pad
EC_SMB_DA1 28,30,35
2
2 1
ADP_I 28,35
Vin Dectector PC126
100P_0402_50V8J
4 4
ILIM and external DPM Security Classification Compal Secret Data Compal Electronics, Inc.
3.37A Issued Date 2011/10/03 Deciphered Date 2014/12/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 36 of 46
A B C D
A B C D E
2VREF_8205
1U_0603_16V6K
1
PC302
2
1 +3VLP 1
PR320 @ PR321
1 2 1 2
0_0402_5% 0_0402_5%
PR301 PR302
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
PR303 PR304
20K_0201_1% 20K_0201_1% B++
1 2 1 2
B+ B++ For RF request
For RF request
+3VLP
ENTRIP2
ENTRIP1
4.7U_0805_25V6-K
PL301
2200P_0402_50V7K
10U_0805_25V6K
FB_3V
FB_5V
PR306
6.8P_0402_50V8C
0.1U_0402_25V6
HCB2012KF-121T50_0805 PR305
1
PC305
1 2 150K_0201_5% 75K_0402_1%
1
PC303
PC304
PC322
1 2 1 2
2200P_0402_50V7K
4.7U_0805_25V6-K
PC306
6.8P_0402_50V8C
0.1U_0402_25V6
2
10U_0805_6.3V6M
2
1
1
PC301
PC307
PC308
PC321
PU301
5
PC309
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
5
PQ302
2
PQ301 25 AON7408L_DFN8-5
2
AON7408L_DFN8-5 P PAD
15,35 SPOK
7 24 4
4 VO2 VO1
2 8 23 PC311 2
PC310 VREG3 PGOOD 0.22U_0603_16V7K
PR307 PR308
1 2BST1_3V 1 2BST_3V 9 22 BST_5V 1 2BST1_5V1 2
3
2
1
BOOT2 BOOT1
0_0402_5% 0_0402_5%
1
2
PL302 3 0.22U_0603_16V7K UG_3V 10 21 UG_5V PL303
4.7UH_TMPC0502H-4R7M-Z01-D_2.8A_20% UGATE2 UGATE1 2.2UH_MMD-06CZ-2R2M-V1_8A_20%
+3VALW
1 2 LX_3V 11
PHASE2 PHASE1
20 LX_5V 1 2
+5VALW
1
5
4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1
5
4.7_1206_5%
PR309
SKIPSEL
PD302 PR311
150U_UD_6.3VM_R18M
PR310
1
VREG5
RLZ5.1B_LL34 499K_0201_1% 1
GND
B+
VIN
+ PC312 @ 1 2 1 2 RT8205LZQW(2) WQFN 24P PWM
NC
EN
2
1SNUB_3V
4 +
PC313
150U_B2_6.3VM_R35M @
1SNUB_5V 2
4
+3.3VALWP
13
14
15
16
17
18
2
680P_0603_50V7K
1 2
@ PR322 0_0402_5% PQ304 2
680P_0603_50V7K
TDC=3.5A
PC314
3
2
1
PQ303 MDU1512RH_POWERDFN56-8-5
1
2
3
Peak Current=5A
PC316
AON7406L_DFN8-5 @ PR312
2
1U_0603_10V6K
@ 0_0201_5%
B++ VL
200K _0201_1%
1
0.1U_0603_25V7K
MAINPWON 1 2
OCP current=6.1A
2
1
PC315
@
PR313
PC318
Rtrip=150K
1
PC317
2
4.7U_0805_10V6K
2
ENTRIP1
ENTRIP2
2VREF_8205
3 3
+5VALWP UMA
6
PR323
0_0201_5%
F=300KHz
1 2 Total Capacitor 1050uF,
26 USB_IN_STATUS# 1 2
VL
short pad
@ PR315 PR314
ESR 4.43mohm
0_0201_5% 100K_0201_1%
1 2
29 HW_SHUTDOWN#
short pad
@ PR316
0_0201_5%
MAINPWON 1 2
35 MAINPWON
1
PJP302
2 1
PD301
LL4148_LL34-2
PR317
1M_0201_1% PQ306
+3VLP 2
@ JUMP_43X39
1 +3VL
2 1 1 2 2 LTC015EUBFS8TL NPN UMT3F
VIN
4.7U_0603_6.3V6K
402K_0402_1%
1
PC319
4 4
PR318
PR319
316K_0402_1%
2
2 1
2
VS
For KB930 ‐‐> Keep PD301, PR317, PR319
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/10/03 Deciphered Date 2014/12/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 37 of 46
A B C D E
A B C D
1 1
2
PC602
680P_0402_50V7K
1
2 SNUB_1.8VSP
PR602
4.7_0402_1%
2 2
1
PL601 PL602
4
HCB1608KF-121T30_0603 1UH_PH041H-1R0MS_3.8A_20% PJP601
PG
22U_0805_6.3V6M
PVIN LX 2 1
1
22P_0402_50V8J
9 3 @ JUMP_43X39
20K_0201_1%
PVIN LX
1
PC601
PC603
8
PR603
short pad
2
@ PR601 SVIN
0_0201_5% 6 1.8VSP_FB
22U_0805_6.3V6M
+1.8VS
22U_0805_6.3V6M
2
SUSP# 1 2 EN_1.8VSP 5 FB
10,28,31,39,40 SUSP#
2
EN
1
PC604
NC
NC
PC605
TP
TDC=1.08A
1
47K_0201_1%
11
2
1
PC606 @
Peak Current=1.542A
10K_0201_1%
PR604
0.1U_0402_10V7K
PU601
PR605
2
SY8033BDBC_DFN10_3X3
2
2
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 38 of 46
A B C D
A B C D
1 1
2
PC1002
680P_0402_50V7K
1 SNUB_+1.5V_PCIEP
2 2
4.7_0402_1%
2
PR1002
PL1001 PL1002
1
4
HCB1608KF-121T30_0603 PU1001 1UH_PH041H-1R0MS_3.8A_20% PJ1001
+5VALW 1 2 10 2 1 2
+1.5V_PCIEP +1.5V_PCIEP 2 1
+1.5V_PCIE
PG
PVIN LX 2 1
9 3 @ JUMP_43X39
PVIN LX
2
15K_0201_1%
22U_0805_6.3VAM
22U_0805_6.3VAM
short pad 8
SVIN
PR1003
22P_0402_50V8J
@ PR1001
1
0_0201_5% 6
+1.5V_PCIE
22U_0805_6.3VAM
FB
PC1004
PC1005
PC1006
1 2 EN_+1.5V_PCIEP 5
10,28,31,38,40 SUSP# EN
1
NC
NC
TP
2
TDC=0.46A
PC1001
SY8033BDBC_DFN10_3X3
1
@ PC1009
2
11
1
0.1U_0402_10V7K
Peak Current=0.66A
2
10K_0201_1%
2
PR1004
1
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 39 of 46
A B C D
5 4 3 2 1
D
For RF request PL501
D
HCB2012KF-121T50_0805
+V1.05SP_B+ 1 2
B+
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
33U_D_25VM_R60M
0.1U_0402_25V6
6.8P_0402_50V8C
1
1
+
PC511
PC502
PC503
PC504
PC501
PC512
2
2
2
+3VS
1
PR501 PR502 PC505 PQ501
4
10K_0201_1% 0_0603_5% 0.22U_0603_16V7K AON6920_DFN5X6A-8-10~D
1 2 1 2
G1
D1
D1
D1
EE Modify
2
PU501
1 10 BST_+1.05VSP 9 10
42 VTTPWRGOOD PGOOD VBST D2/S1 D1
1 2 PR503 TRIP_+1.05VSP 2 9 UG_+1.05VSP PL502
53.6k_0201_1% TRIP DRVH 1UH_KJ0730-1R0M_11A_20%
G2
S2
S2
S2
short pad @ PR504
EN_+1.05VSP 3
EN SW
8 SW_+1.05VSP 1 2
+VCCP
5
0_0201_5% FB_+1.05VSP 4 7 +1.05VSP_5V 1
VFB V5IN
+5VALW
1
1 2
10,28,31,38,39 SUSP# + PC506
C RF_+1.05VSP 5 6 LG_+1.05VSP C
RF DRVL PR505 @ 220U_B2_2.5VM_R15M
1
@ PR506 11 4.7_1206_5%
0_0201_5% TP PC507 2
2
1U_0603_6.3V6M
0.1U_0402_25V6
1 2 TPS51212DSCR_SON10_3X3
2
28,31,41 SYSON
PC509
PC510 @
1
PC508 @ 680P_0603_50V7K
2
.1U_0402_16V7K PR507 1 2
VSS_SENSE_VCCIO 9
2
470K_0201_1%
PR508
10_0201_1%
2
PR509 PR510
5.1K_0201_1% 100_0201_1%
2 1 1 2
VCCIO_SENSE 9
2
PR511
B 10K_0201_1% B
1
+VCCP
TDC=7A
Peak Current=9A
OCP current=11.9A
Rtrip =53.6k
A A
short pad
@ PR401
0_0201_5%
DDR3L_EN 1.5VP
2
1 2 EN_1.5VP PC402
28,31,40 SYSON
680P_0402_50V7K L DDR3 1.5V
D D
H DDR3L 1.35V
1
1
PC409 @
SNUB_+1.5VP
0.1U_0402_10V7K
2
PU401
4.7_0402_1%
2
SY8809DFC_DFN8_2X2
PR402
PL401 1 8
HCB2012KF-121T50_0805 EN FB
1 2 1.5V_IN 2 7 PL402
+5VALW
1
IN PG 1UH_KJ0730-1R0M_11A_20%
2200P_0402_50V7K
22U_0805_6.3VAM
22U_0805_6.3VAM
3 6 1 2
LX LX +1.5VP
1
PC401
PC403
PC404
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
4 5 1
GND GND @
1
+ PC412
PC405
PC406
PC407
PC408
150U_B2_6.3VM_R35M
2
2
+3VS
750k_0201_1%
2
10K_0201_1%
PR403
22P_0402_50V8J
150K_0201_1%
2
2
1
PR404
PR405
1
PC410
C C
PR406
1
D @ 5.1K_0201_1%
1
2 1 2
DDR3L_EN 17
G
.1U_0402_16V7K
2
S
PC411
PR407
10K_0201_1%
2
PQ401
1
2
SSM3K7002FU_SC70-3
PR408
100K_0201_1%
1
+1.5V
PC452
1
3 7
4.7U_0805_6.3V6K VREF NC
1
2
PR452
1K_0201_1%
4
VOUT NC
8 PC453
1U_0603_10V6K
+1.5V
+0.75VSP TDC=10.5A
2
9
2
TP
APL5336KAI-TRL SOP TDC=1.4A Ipeak=15A
VREF_APL5336
Peak Current=2A Total Capacitor 1050uF,
PC454
short pad ESR 4.43mohm
SSM3K7002FU_SC70-3
+0.75VSP
1
.1U_0402_16V7K
@ PR451
1
0_0201_5% D
PR453
PQ451
HW side:
1
2 1 0.75VS_N_002 2
31,6 SUSP 1K_0201_1%
G PC455
C106 330uF 17m
2
1
PC451 @ S 10U_0805_6.3V6M
3
0.1U_0402_10V7K
C218 390uF 10m
2
VGA@ CV122 390uF 10m
@ C189 330uF 15m
A A
D D
For RF request
+VCCSA
2
PC652
6.8P_0402_50V8C
6.8P_0402_50V8C
6.8P_0402_50V8C
6.8P_0402_50V8C
680P_0402_50V7K 1 1 1 1
PC662
PC663
PC664
PC665
SNUB_+VCCSA
C C
2 2 2 2
4.7_0402_1%
2
PR652
1
PL651 SY8037CDCC_DFN12_3X3 PL652
HCB1608KF-121T30_0603 PU651 1UH_PCMB042T-1R0MS_4.5A_20%
+5VALW 1 2 +VCCSA_PWR_SRC 12
PVIN LX
1 +VCCSA_PHASE 1 2
+VCCSA
11 2
PVIN LX
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
PC653
68P_0402_50V8J 10 3 PR653 SA_PGOOD 28
SVIN LX
2
PC654
PC655
PC656
PC657
2200P_0402_50V7K
100K_0201_1%
0.1U_0603_25V7K
22U_0805_6.3VAM
22U_0805_6.3VAM
2
+VCCSAP_FB 1 9 4 2 1
2 FB PG +3VS
1
1
PC651
PC658
+VCCSA
1
PC659
PC660
8 5 +VCCSA_EN 1 2
VOUT EN PR654
GND
2
1 7
VID1 VID0
6 short pad 0_0201_5%
@
TDC=4.2A
0.1U_0402_10V7K
@
Ipeak=6A
13
PR656
PC661
100_0201_1%
2
2
1K_0201_1%
1K_0201_1%
40 VTTPWRGOOD 2 1
PR651
PR655
2 1
VCCSA_SENSE 10
VCCSA_VID0 10
B B
VCCSA_VID1 10
A A
2011/03/23
Delete jump for layout space
PQ701
P5103EMG_SOT23-3 PL701
4.7UH_TMPC0502H-4R7M-Z01-D_2.8A_20% PD702
D D
D
3 1 1 2 2 1
INVPWR_B+ SW +LG_VOUT
10_1206_1%
1U_0805_50V7K
1U_0805_50V7K
100P_0402_50V8J
SR24_SMA2
1
100K_0201_1%
1U_0805_50V7K
1U_0805_50V7K
1U_0805_50V7K
1U_0805_50V7K
1U_0805_50V7K
PD701
0.1U_0603_50V7K
0.1U_0603_50V7K
G
2
1
1
LL4148_LL34-2
1U_0805_25V6K
1U_0805_25V6K
PC702
PR702
PC703
PC704
PC705
PC706
PC707
PC708
PC709
PC710
1
1
PC701
PC711
PC712
PR703
2
2
2
1 2
@ @
220P_0603_50V8J
PC713
2
2
1 2 DCTRL
24 INVTPWM PR704
0.015U_0603_50V7K
PR701
1
51_1206_5%
1
10K_0402_1%
1
1M_0201_1%
PC714
EN
2
PR705
@
C C
17
16
15
14
13
PU701
IFB6
IFB5
TPAD
FAULT
EN
1 12
PGND IFB4 FB4 24
SW 2 11 DCTRL
SW DCTRL
TPS61181ARTER_QFN16_3X3
1 2 EN 3 10
24 DISPOFF# VBAT GND
1
100P_0402_50V8J
PR706
1
1M_0201_1%
10K_0201_1%
PC715
+LG_VOUT 4 9 FB3 24
VO IFB3
PR707
100P_0402_50V8J
2
ISET
IFB1
IFB2
1
CIN
1U_0805_50V7K
@
1
PC716
B B
2
8
PC717
0.1U_0402_10V7K FB2 24
0.1U_0402_10V7K
60.4K_0402_1%
1
1
2011/03/22
1
PC718
PC719
Change AGND name to GNDA_P PR708
2
FB1 24
2
@ 2
1 2
@ PR709
0_0603_5%
short pad
Ifb=1000*1.229/(60.4k)=20.348mA AGND PGND
A A
+CPU_CORE
1
@ PR202 PR203 @
100_0201_1% 100_0201_1%
2
@ PC229
0.1U_0402_25V6
9 VSSSENSE
1 2 VCCSENSE 9
PR204 0_0402_5%
PR205 0_0402_5%
2
2
+5VALW
1 1
1
PR206
2.2_0402_5% @ @
VCC PL201
1
VCC PR210 PC202 HCB2012KF-121T50_0805
1
3.3K_0402_1% 390P_0402_50V7K 1 2
For RF request
1
PR207 PR208 PR209 @ PR212 PR213 PR201 +CPU_5V
2
PC203
66.5k_0201_1%
41.2K_0402_1% 2.2_0402_1%
51K_0402_1%
10K_0402_1%
1 2 1 2
66.5k_0201_1%
2.2U_0603_10V6K PL203 +5VALW
22U_0805_6.3V6M
22U_0805_6.3V6M
2200P_0402_50V7K
0.1U_0402_25V6
PH201 HCB2012KF-121T50_0805
6.8P_0402_50V8C
1
2
1 2 1 2
150U_UD_6.3VM_R18M
1
1
PC205
PC206
PC207
PC230
+
PC240
10K_0402_1%_ERTJ0EG103FA
1
1
PC204
2
SETINIA 0.1U_0402_25V6 2
PR214
5
RNTC1P
3.3K_0402_1%
RNTC1N
PC201
2
TEMPMAX PR215 PC208 PR216
0_0402_5% 0.22U_0603_10V7K 0_0402_5% PQ201
ICCMAX 1 2 1 2 1 2 4 AON7408L_DFN8-5
ICCMAXA +CPU_CORE
PL202
1
BOOT_CPU
PR217 PR218 PR219 PR221 1UH_PCMC063T-1R0MN_11A_20%
3
2
1
10K_0402_1%
10K_0201_1%
33K_0201_1%
PR222 1 2
10K_0402_1%
16.9K_0402_1%
4.7_0402_1%
5
2
PR223
2
2
PC209
220P_0402_50V8J
2
VCC @ PR224
2 1
4 1.58K_0402_1%
2
@ PC210
10K_0402_1%_ERTJ0EG103FA PQ202
10K_0402_1%_ERTJ0EG103FA
680P_0402_50V7K
TPCA8057-H_PPAK56-8-5
1
2.4K_0402_1%
3
2
1
2
1
2
1
2 2.4K_0201_1% PR228 1 2 2
PH203
PH202
FB_CPU
@ PR229
PR226
1 2 VCC PC212
1.69K_0402_1%
2
0.1U_0402_25V6
@ PR231
1
10K_0402_1%
1 2
1
PC211
10
PR232
2
9
1
PU201 10K_0402_1% 0.1U_0402_25V6
1
432_0201_1%
0.1U_0402_25V6
SETINIA
VCC
GFXPS2
RGND
FB
COMP
ISEN1N
ISEN1P
TONSET
BOOT1
2
2
PR233
1
41
2 GND +CPU_CORE TDC=23.1A
1
1
11 40 UG_CPU PC215
6.8P_0402_50V8C
6.8P_0402_50V8C
6.8P_0402_50V8C
6.8P_0402_50V8C
Ipeak=33A
2
SETINI UGATE1
2.2U_0603_10V6K
1 1 1 1
12 39 PHASE_CPU @ PR235 0_0402_5% +5VALW
OCP=39.6A
PC232
PC233
PC234
PC235
2
TMPMAX PHASE1 1 2
OCSET 13 38
@ 0_0402_5%
PR237
15K_0201_1% ICCMAX LGATE1
LG_CPU
@ 2 2 2 2 F=700KHz
VCC 1 PR236 2 1 2 14
ICCMAXA PVCC
37 1 PR238
0_0402_5% 2
PVCC
Total Capacitor 660uF,
15
TSEN LGATEA
36 LG_GFX
ESR 4.5mohm
1
10K_0201_1%
PH204
1 2 16 RT8165BGQW_WQFN40_5X5 35 PHASE_GFX
PR239 OCSET PHASEA
VR_ON 28
@ 10K_0402_1%_ERTJ0EG103FA 17 34 UG_GFX
TSENA UGATEA
2
18 33 BOOT_GFX 0_0402_5%
OCSETA BOOTA PR240 @
PR242 OCSETA 19 32 EN_GFX 1 2 PR243 PR244 For RF request +CPU_5V
PR241 10K_0402_1% 5.1K_0201_1% IBIAS EN 41.2K_0402_1% 2.2_0402_1%
1
2200P_0402_50V7K
VCC 1 2 1 2 PR245 20 31 1 2 1 2 +GFX_5V
VRHOT TONSETA
53.6K_0402_1%
1
22U_0805_6.3VAM
22U_0805_6.3VAM
0.1U_0402_25V6
10K_0201_1%
PC241
PH205
6.8P_0402_50V8C
1
1
VRA_READY
PC231
1 2 PR246 PC216
PC219
VR_READY
PC217
PC218
0.1U_0402_25V6
2
2
ISENAN
COMPA
ISENAP
@ 10K_0402_1%_ERTJ0EG103FA PC220
RGNDA
ALERT
2
VCLK
PR247 0_0402_5% 0.22U_0603_10V7K
VDIO
2
FBA
1 2 1 2 4
1
PC221 PR249
3 PR248 75_0402_1% 0_0402_5% PQ203 3
21
22
23
24
25
26
27
28
29
30
1 2 VR_HOT# 0.1U_0402_25V6 1 2 AON7408L_DFN8-5 +VGFX_CORE
+VCCP VR_HOT# 28
2
PL204
3
2
1
PR250 10K_0201_1% 2.2UH_PCMC063T-2R2MN_8A_20%
FB_GFX
+3VS 1 2 VGATE 1 2
5
VR_SVID_ALRT#
VR_SVID_DAT PQ204
4.7_0402_1%
2
VR_SVID_CLK TPCA8057-H_PPAK56-8-5
PR252
PR251 75_0201_1%
+VCCP
1 2
2
4
PR253 130_0201_5% @ PR254
2 1
1 2 1.82K_0402_1%
1
@ PC222
1
PR255 680P_0402_50V7K
3
2
1
1
10K_0201_1%
1 2 PC223
1
220P_0402_50V7K
2
1
1 2
RNTCAN
RNTCAP
0.1U_0402_25V6 @ PR259
2
2K_0402_1% PC225
0.1U_0402_25V6
1 2
9 VR_SVID_ALRT#
1
PR261
3.3K_0402_1%
9 VR_SVID_DAT
1
PC226
9 VR_SVID_CLK PH206
0.1U_0402_25V6 +GFX_CORE
2
2
1
2 1
15 VGATE PC227 TDC=12.6A
1
10K_0402_1%_ERTJ0EG103FA 560P_0402_50V7K
Ipeak=18A
2
6.8P_0402_50V8C
6.8P_0402_50V8C
6.8P_0402_50V8C
6.8P_0402_50V8C
1 1 1 1 Total Capacitor 660uF,
PC237
PC236
PC239
PC238
ESR 7.5mohm
0_0402_5%
1
4 4
PR266
short pad
2 2 2 2
PR265
0_0201_1%
@
2
10 VSS_AXG_SENSE 1 2 VCC_AXG_SENSE 10
1
@ PC228 @
@ PR267 0.1U_0402_25V6
1
10_0201_1%
PR268 @
2
+
+
+VGFX_CORE
2 1 2 1 2 1 2 1 2 1
2
1
2
1
2
1
PC1184 PC1178 PC1166 PC1154 PC1136 PC1118 PC1104
1U_0402_6.3V6K 10U_0603_10V6M 22U_0805_6.3V6M 470U_D2_2VM_R4.5M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 22U_0805_6.3V6M
2 1 2 1 2 1 2 1
2
1
2
1
PC1185 PC1179 PC1167 PC1137 PC1119 PC1105
5
5
2 1 2 1 2 1 2 1
+VGFX_CORE
2
1
2
PC1186 PC1180 PC1168 PC1138 PC1120 PC1106 1
1U_0402_6.3V6K 10U_0603_10V6M 22U_0805_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 22U_0805_6.3V6M
2 1 2 1 2 1 2 1
2
1
2
1
2 1 2 1 2 1 2 1
2
1
2
1
2 1 2 1 2 1 2 1 2 1
2
1
PC1189 PC1183 PC1171 PC1141 PC1123 PC1109
1U_0402_6.3V6K 10U_0603_10V6M 22U_0805_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 22U_0805_6.3V6M
2 1 2 1 2 1 2 1
2 1 2 1 2 1 2 1
4
4
2 1 2 1
PC1192 PC1112
1U_0402_6.3V6K 22U_0805_6.3V6M
2 1
2
1
PC1193 PC1113
1U_0402_6.3V6K 22U_0805_6.3V6M
2 1
2
1
PC1194 PC1114
1U_0402_6.3V6K 22U_0805_6.3V6M
2 1
PC1115
22U_0805_6.3V6M
Issued Date
Security Classification
3
3
+VCCP
2011/10/03
2 1 2 1 2 1
2
1
2
1
+
2 1 2 1 2 1
2
1
2
1
2 1 2 1 2 1
2
1
2 1 2 1 2 1
2
1
2 1 2 1 2 1
2
1
2 1 2 1 2 1
2
2
2
1
2 1 2 1
2
1
2 1 2 1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
2
1
Date:
2 1 2 1
2
1
2 1 2 1
2
1
Sheet
SCHEMATICS,MB A8554
45
of
Compal Electronics, Inc.
46
Rev
C
A
B
C
D
5 4 3 2 1
spec of panel output current has changed to 61.5mA(max) change panel drive output current to 60mA 43 1.change pr708 from 52.3K_0402_1% to 60.4K_0402_1% PV
C C
5
10
11
B B
12
13
14
15
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A8554
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019HW C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, May 09, 2013 Sheet 46 of 46
5 4 3 2 1