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1 1

Compal Confidential
2 2

QAL30 Project
3
LA-8061P REV 0.4 Schematic 3

Intel Ivy Bridge/Panther Point

2012-01-13 Rev. 0.4

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 1 of 46
A B C D E
5 4 3 2 1

Compal Confidential
Model Name : QAL30 Mobile Ivy Bridge
File Name : LA-8061PR01 CPU Dual / Quad Core Memory BUS(DDRIII)
Dual Channel 204pin DDRIII-SO-DIMM X2
Socket-rPGA989 1.5V DDRIII 1333/1600 BANK 0, 1, 2, 3 page 10,11
37.5mm*37.5mm
D D
page 4,5,6,7,8,9

FDI x8 DMI x4
(UMA) 100MHz
100MHz 5GB/s
LVDS Conn. HDMI Conn. CRT Conn. 2.7GT/s
page 20 page 22 page 21

CRT USB
Intel Panther Point USB/B Right Int. Camera RTS5129 3IN1
5V 480Mbps USB port 4,9 USB port 10 USB port 11
HDMI
page 26 page 20 page 26
LVDS PCBGA989
25mm*25mm

PCI-Express (PCIE 2.5GT/s) 100MHz SATA port 0 SATA HDD


5V (6Gb/s) page 27
port 2 port 1
C C

PCIeMini Card RTL8111E 1G SATA port 2 SATA ODD


WLAN & BT 2.0 5V 1.5GHz(150MB/s) page 27
PCIe port 1
USB port 13 page 24
PCIe port 2 BIOS ROM
page 30
page 23
page 12,13,14,15,
RJ45 16,17,18,19 HD Audio 3.3V 24.576MHz/48Mhz
page 24

LPC BUS HDA Codec


33MHz ALC259
page 25

ENE KB9012
(Co-Lay KB930)
page 29
B B

Int.
MIC CONN MIC CONN HP CONN SPK CONN
page 25 page 25 page 26 page 26

Touch Pad Int.KBD


page 26 page 32

CPU XDP
page 5

USB/B RTC CKT.


page 26 page 12 PCH XDP
page 12
A Power/B DC/DC Interface CKT. A

page 31 page 34

Fan Control Power Circuit DC/DC


page 31 page 35~44
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Wednesday, December 21, 2011 Sheet 2 of 46
5 4 3 2 1
5 4 3 2 1

Board ID Table for AD channel


Vcc 3.3V +/- 5% BOARD ID Table USB PORT# DESTINATION
Ra 100K +/- 5%
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max Board ID PCB Revision 0 USB2/3 (Left Hand dise front)
0 0 0 V 0 V 0 V 0 QAL30
1 8.2K +/- 5% 0.168V 0.250 V 0.362 V 1 1 USB2/3 (Left Hand dise back)
D D
2 18K +/- 5% 0.436 V 0.503 V 0.538 V 2
3 33K +/- 5% 0.712 V 0.819 V 0.875 V 3 2 None
4 56K +/- 5% 1.036 V 1.185 V 1.264 V 4
5 100K +/- 5% 1.453 V 1.650 V 1.759 V 5 3 None
6 200K +/- 5% 1.935 V 2.200 V 2.341 V 6
7 NC 2.500 V 3.300 V 3.300 V 7 4 USB2 (Right Hand side front)

5 None

6 None

SMBUS Control Table PCH 7 None

SOURCE MINI1 BATT SODIMM SODIMM


CLKOUT DESTINATION 8 None
PCH
0001 011x b 1001 000x b 1001 010x b
9 USB2 (Left Hand side back)
C
EC_SMB_CK1 KB930 X V X X X PCI0 PCH_LOOPBACK C

EC_SMB_DA1 KB9012
10 CAMERA
EC_SMB_CK2 KB930 X X X X V PCI1 EC
EC_SMB_DA2 KB9012
11 Card Reader
PCH_SMBCLK PCI2 TPM
PCH_SMBDATA PCH
V X V V 12 None
PCI3 None
PCH_SML1CLK
PCH_SML1DATA PCH
X X X X PCI4 None 13 BT Comb

OPTIMUS: XDP@/D@

DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION SATA DESTINATION PCI EXPRESS DESTINATION
B B
CLKOUT_PCIE0 LAN CLKOUTFLEX0 None SATA0 HDD Lane 1 LAN

CLKOUT_PCIE1 WLAN CLKOUTFLEX1 None SATA1 None Lane 2 WLAN

CLKOUT_PCIE2 None CLKOUTFLEX2 None SATA2 ODD Lane 3 None

CLK CLKOUT_PCIE3 None CLKOUTFLEX3 None SATA3 None Lane 4 None

CLKOUT_PCIE4 None SATA4 None Lane 5 None

CLKOUT_PCIE5 None Symbol Note : SATA5 None Lane 6 None

CLKOUT_PCIE6 None : means Digital Ground Lane 7 None

CLKOUT_PCIE7 None Lane 8 None


A
CLKOUT_PEG_A VGA
: means Analog Ground A

CLKOUT_PEG_B None
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Wednesday, December 21, 2011 Sheet 3 of 46
5 4 3 2 1
5 4 3 2 1

+V1.05S_VCCP

JCPU1I
RC1 PEG_ICOMPI and RCOMPO signals should be shorted and routed
24.9_0402_1% with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms T35 F22
JCPU1A VSS161 VSS234
T34 VSS162 VSS235 F19
D PEG_COMP D
PEG_ICOMPI J22 T33 VSS163 VSS236 E30
PEG_ICOMPO J21 T32 VSS164 VSS237 E27
14 DMI_CRX_PTX_N0 B27 DMI_RX#[0] PEG_RCOMPO H22 T31 VSS165 VSS238 E24
14 DMI_CRX_PTX_N1 B25 T30 E21
DMI_RX#[1] VSS166 VSS239
14 DMI_CRX_PTX_N2 A25 T29 E18
DMI_RX#[2] VSS167 VSS240
14 DMI_CRX_PTX_N3 B24 DMI_RX#[3] PEG_RX#[0] K33 T28 VSS168 VSS241 E15
M35 T27 E13
PEG_RX#[1] VSS169 VSS242
14 DMI_CRX_PTX_P0 B28 DMI_RX[0] PEG_RX#[2] L34 T26 VSS170 VSS243 E10
14 DMI_CRX_PTX_P1 B26 DMI_RX[1] PEG_RX#[3] J35 P9 VSS171 VSS244 E9
14 DMI_CRX_PTX_P2 A24 J32 P8 E8

DMI
DMI_RX[2] PEG_RX#[4] VSS172 VSS245
14 DMI_CRX_PTX_P3 B23 DMI_RX[3] PEG_RX#[5] H34 P6 VSS173 VSS246 E7
H31 P5 E6
PEG_RX#[6] VSS174 VSS247
14 DMI_CTX_PRX_N0 G21 DMI_TX#[0] PEG_RX#[7] G33 P3 VSS175 VSS248 E5
14 DMI_CTX_PRX_N1 E22 G30 P2 E4
DMI_TX#[1] PEG_RX#[8] VSS176 VSS249
14 DMI_CTX_PRX_N2 F21 F35 N35 E3
DMI_TX#[2] PEG_RX#[9] VSS177 VSS250
14 DMI_CTX_PRX_N3 D21 E34 N34 E2
DMI_TX#[3] PEG_RX#[10] VSS178 VSS251
PEG_RX#[11] E32 N33 VSS179 VSS252 E1
14 DMI_CTX_PRX_P0 G22 D33 N32 D35
DMI_TX[0] PEG_RX#[12] VSS180 VSS253
14 DMI_CTX_PRX_P1 D22 DMI_TX[1] PEG_RX#[13] D31 N31 VSS181 VSS254 D32
14 DMI_CTX_PRX_P2 F20 B33 N30 D29
DMI_TX[2] PEG_RX#[14] VSS182 VSS255

PCI EXPRESS* - GRAPHICS


14 DMI_CTX_PRX_P3 C21 C32 N29 D26
DMI_TX[3] PEG_RX#[15] VSS183 VSS256
N28 D20
VSS184 VSS257
PEG_RX[0] J33 N27 VSS185 VSS258 D17
PEG_RX[1] L35 N26 VSS186 VSS259 C34
K34 M34 C31
FDI_CTX_PRX_N0 PEG_RX[2] VSS187 VSS260
14 FDI_CTX_PRX_N0 A21 FDI0_TX#[0] PEG_RX[3] H35 L33 VSS188 VSS261 C28
FDI_CTX_PRX_N1 H19 H32 L30 C27
14 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI0_TX#[1] PEG_RX[4] VSS189 VSS262
14 FDI_CTX_PRX_N2 E19 G34 L27 C25
FDI_CTX_PRX_N3 FDI0_TX#[2] PEG_RX[5] VSS190 VSS263
14 FDI_CTX_PRX_N3 F18 FDI0_TX#[3] PEG_RX[6] G31 L9 VSS191 VSS264 C23

Intel(R) FDI
FDI_CTX_PRX_N4 B21 F33 L8 C10
14 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI1_TX#[0] PEG_RX[7] VSS192 VSS265
14 FDI_CTX_PRX_N5 C20 F30 L6 C1
FDI_CTX_PRX_N6 FDI1_TX#[1] PEG_RX[8] VSS193 VSS266
14 FDI_CTX_PRX_N6 D18 E35 L5 B22
C FDI_CTX_PRX_N7 FDI1_TX#[2] PEG_RX[9] VSS194 VSS267 C
E17 E33 L4 B19
14 FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
F32
D34
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
FDI_CTX_PRX_P0 A22 E31 L1 B13
14 FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI0_TX[0] PEG_RX[13] VSS198 VSS271
14 FDI_CTX_PRX_P1 G19 FDI0_TX[1] PEG_RX[14] C33 K35 VSS199 VSS272 B11
FDI_CTX_PRX_P2 E20 B32 K32 B9
14 FDI_CTX_PRX_P2 FDI0_TX[2] PEG_RX[15] VSS200 VSS273
FDI_CTX_PRX_P3 G18 K29 B8
14 FDI_CTX_PRX_P3 FDI0_TX[3] VSS201 VSS274
FDI_CTX_PRX_P4 B20 M29 K26 B7
14 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI1_TX[0] PEG_TX#[0] VSS202 VSS275
14 FDI_CTX_PRX_P5 C19 FDI1_TX[1] PEG_TX#[1] M32 J34 VSS203 VSS276 B5
FDI_CTX_PRX_P6 D19 M31 J31 B3
14 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7 FDI1_TX[2] PEG_TX#[2] VSS204 VSS277
14 FDI_CTX_PRX_P7 F17 FDI1_TX[3] PEG_TX#[3] L32 H33 VSS205 VSS278 B2
L29 H30 A35
FDI_FSYNC0 PEG_TX#[4] VSS206 VSS279
14 FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#[5] K31 H27 VSS207 VSS280 A32
FDI_FSYNC1 J17 K28 H24 A29
14 FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] VSS208 VSS281
J30 H21 A26
FDI_INT PEG_TX#[7] VSS209 VSS282
14 FDI_INT H20 J28 H18 A23
FDI_INT PEG_TX#[8] VSS210 VSS283
H29 H15 A20
FDI_LSYNC0 PEG_TX#[9] VSS211 VSS284
14 FDI_LSYNC0 J19 G27 H13 A3
FDI_LSYNC1 FDI0_LSYNC PEG_TX#[10] VSS212 VSS285
14 FDI_LSYNC1 H17 E29 H10
FDI1_LSYNC PEG_TX#[11] VSS213
PEG_TX#[12] F27 H9 VSS214
D28 H8
PEG_TX#[13] VSS215
F26 H7
PEG_TX#[14] VSS216
E25 H6
PEG_TX#[15] VSS217
A18 H5
eDP_COMPIO VSS218
A17 M28 H4
eDP_ICOMPO PEG_TX[0] VSS219
B16 M33 H3
RC2 24.9_0402_1% eDP_HPD# PEG_TX[1] VSS220
PEG_TX[2] M30 H2 VSS221
EDP_COMP L31 H1
+V1.05S_VCCP PEG_TX[3] VSS222
C15 L28 G35
eDP_AUX PEG_TX[4] VSS223
D15 K30 G32
EDP_HPD# eDP_AUX# PEG_TX[5] VSS224
+V1.05S_VCCP K27 G29
eDP

PEG_TX[6] VSS225
J29 G26
B 10K_0402_5% PEG_TX[7] VSS226 B
C17 eDP_TX[0] PEG_TX[8] J27 G23 VSS227
@ RC8 F16 H28 G20
eDP_TX[1] PEG_TX[9] VSS228
C16 G28 G17
eDP_TX[2] PEG_TX[10] VSS229
G15 eDP_TX[3] PEG_TX[11] E28 G11 VSS230
F28 F34
PEG_TX[12] VSS231
C18 D27 F31
eDP_TX#[0] PEG_TX[13] VSS232
E16 E26 F29
eDP_TX#[1] PEG_TX[14] VSS233
D16 D25
eDP_TX#[2] PEG_TX[15]
F15
eDP_TX#[3]

TYCO_2013620-2_IVY BRIDGE
CONN@

TYCO_2013620-2_IVY BRIDGE
CONN@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(1/6) DMI,FDI,PEG
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 4 of 46
5 4 3 2 1
5 4 3 2 1

14 SYSTEM_PWROK

+3V_PCH
+3VS +3V_PCH +3VS

0.1U_0402_16V4Z
+1.5V_CPU_VDDQ

CC33
RC12 @ RC13
RC15 RC11 10K_0402_5% RC14
200_0402_1% 200_0402_1% 0_0402_5% 200_0402_1%
@

5
D UC1 D
1

G VCC
B VDDPWRGOOD
Y 4
14 PM_DRAM_PWRGD D_PWG 2
RC21 0_0402_5% A
MC74VHC1G09DFT2G_SC70-5

3
@
RC25
39_0402_1%

SSM3K7002FU_SC70-3
@
9,34 RUN_ON_CPU1.5VS3# RC17 QC2

1
D
0_0402_5% 2
G
34,40 SUSP @ RC16 S

3
0_0402_5%

+3VS +V1.05S_VCCP

0.1U_0402_16V4Z
RC38

CC36
75_0402_5%

C C

1
UC2 RC35

P
NC
2 BUFO_CPU_RST# BUF_CPU_RST#
15,23,24,28,29 PLT_RST# A Y 4 43_0402_1%

G
SN74LVC1G07DCKR_SC70-5

3
@
RC40
JCPU1B 0_0402_5%
Processor Pullups +V1.05S_VCCP
T504 @

H_PROCHOT# RC44 A28


BCLK CLK_CPU_DMI 13
62_0402_5% C26 A27

MISC

CLOCKS
16 H_SNB_IVB# PROC_SELECT# BCLK# CLK_CPU_DMI# 13
T505 @
AN34
SKTOCC# CLK_CPU_DPLL_R
DPLL_REF_CLK
A16 RC37 1K_0402_5% PU/PD for JTAG signals
A15 CLK_CPU_DPLL#_R RC41 1K_0402_5%
DPLL_REF_CLK# +V1.05S_VCCP +V1.05S_VCCP

T0501 @ H_CATERR# AL33


CATERR#
XDP_TMS_R 51_0402_5% RC46
H_CPUPWRGD 10K_0402_5% RC45

THERMAL
AN33 R8 H_DRAMRST# XDP_TDI_R 51_0402_5% RC47
16,29 H_PECI PECI SM_DRAMRST# H_DRAMRST# 6
DDR3 Compensation Signals XDP_PREQ#_R 51_0402_5% @ RC48

DDR3
MISC
RC42
H_PROCHOT#_R AL32 AK1 SM_RCOMP0 SM_RCOMP0 140_0402_1% RC56 XDP_TDO_R 51_0402_5% RC49
29,35 H_PROCHOT# PROCHOT# SM_RCOMP[0]
56_0402_5% A5 SM_RCOMP1
B SM_RCOMP[1] SM_RCOMP2 SM_RCOMP1 25.5_0402_1% RC59 B
SM_RCOMP[2] A4

H_THERMTRIP# AN32 SM_RCOMP2 200_0402_1% RC61 XDP_TCK_R 51_0402_5% RC53


16 H_THERMTRIP# THERMTRIP#
XDP_TRST#_R 51_0402_5% RC55

AP29 XDP_PRDY#_R
PRDY# XDP_PREQ#_R
AP27
PREQ#
AR26 XDP_TCK_R
TCK XDP_TMS_R
AR27
PWR MANAGEMENT

TMS
JTAG & BPM

AM34 AP30 XDP_TRST#_R


14 H_PM_SYNC PM_SYNC TRST#
AR28 XDP_TDI_R
TDI XDP_TDO_R
AP26
TDO
16 H_CPUPWRGD AP33
UNCOREPWRGOOD

RC58 AL35 XDP_DBRESET#


VDDPWRGOOD VDDPWRGOOD_R DBR#
V8
130_0402_1% SM_DRAMPWROK
AT28
BPM#[0]
BPM#[1] AR29
AR30
BUF_CPU_RST# BPM#[2]
AR33 AT30
RESET# BPM#[3]
BPM#[4] AP32
AR31
BPM#[5]
AT31
BPM#[6]
AR32
BPM#[7]

A A

TYCO_2013620-2_IVY BRIDGE
CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(2/6) PM,XDP,CLK
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 5 of 46
5 4 3 2 1
5 4 3 2 1

JCPU1C

JCPU1D

10 DDR_A_D[0..63] SA_CLK[0] AB6 DDRA_CLK0 10


AA6 DDRA_CLK0# 10
DDR_A_D0 SA_CLK#[0]
D C5 SA_DQ[0] SA_CKE[0] V9 DDRA_CKE0 10 11 DDR_B_D[0..63] SB_CLK[0] AE2 DDRB_CLK0 11 D
DDR_A_D1 D5 AD2
SA_DQ[1] SB_CLK#[0] DDRB_CLK0# 11
DDR_A_D2 D3 DDR_B_D0 C9 R9
SA_DQ[2] SB_DQ[0] SB_CKE[0] DDRB_CKE0 11
DDR_A_D3 D2 DDR_B_D1 A7
DDR_A_D4 SA_DQ[3] DDR_B_D2 SB_DQ[1]
D6 SA_DQ[4] SA_CLK[1] AA5 DDRA_CLK1 10 D10 SB_DQ[2]
DDR_A_D5 C6 AB5 DDR_B_D3 C8
SA_DQ[5] SA_CLK#[1] DDRA_CLK1# 10 SB_DQ[3]
DDR_A_D6 C2 V10 DDR_B_D4 A9 AE1
SA_DQ[6] SA_CKE[1] DDRA_CKE1 10 SB_DQ[4] SB_CLK[1] DDRB_CLK1 11
DDR_A_D7 C3 DDR_B_D5 A8 AD1
SA_DQ[7] SB_DQ[5] SB_CLK#[1] DDRB_CLK1# 11
DDR_A_D8 F10 DDR_B_D6 D9 R10
SA_DQ[8] SB_DQ[6] SB_CKE[1] DDRB_CKE1 11
DDR_A_D9 F8 DDR_B_D7 D8
DDR_A_D10 SA_DQ[9] DDR_B_D8 SB_DQ[7]
G10 AB4 G4
DDR_A_D11 SA_DQ[10] RSVD_TP[1] DDR_B_D9 SB_DQ[8]
G9 SA_DQ[11] RSVD_TP[2] AA4 F4 SB_DQ[9]
DDR_A_D12 F9 W9 DDR_B_D10 F1 AB2
DDR_A_D13 SA_DQ[12] RSVD_TP[3] DDR_B_D11 SB_DQ[10] RSVD_TP[11]
F7 SA_DQ[13] G1 SB_DQ[11] RSVD_TP[12] AA2
DDR_A_D14 G8 DDR_B_D12 G5 T9
DDR_A_D15 SA_DQ[14] DDR_B_D13 SB_DQ[12] RSVD_TP[13]
G7 F5
DDR_A_D16 SA_DQ[15] DDR_B_D14 SB_DQ[13]
K4 AB3 F2
DDR_A_D17 SA_DQ[16] RSVD_TP[4] DDR_B_D15 SB_DQ[14]
K5 AA3 G2
DDR_A_D18 SA_DQ[17] RSVD_TP[5] DDR_B_D16 SB_DQ[15]
K1 W10 J7 AA1
DDR_A_D19 SA_DQ[18] RSVD_TP[6] DDR_B_D17 SB_DQ[16] RSVD_TP[14]
J1 J8 AB1
DDR_A_D20 SA_DQ[19] DDR_B_D18 SB_DQ[17] RSVD_TP[15]
J5 K10 T10
DDR_A_D21 SA_DQ[20] DDR_B_D19 SB_DQ[18] RSVD_TP[16]
J4 K9
DDR_A_D22 SA_DQ[21] DDR_B_D20 SB_DQ[19]
J2 AK3 DDRA_SCS0# 10 J9
DDR_A_D23 SA_DQ[22] SA_CS#[0] DDR_B_D21 SB_DQ[20]
K2 AL3 DDRA_SCS1# 10 J10
DDR_A_D24 SA_DQ[23] SA_CS#[1] DDR_B_D22 SB_DQ[21]
M8 SA_DQ[24] RSVD_TP[7] AG1 K8 SB_DQ[22] SB_CS#[0] AD3 DDRB_SCS0# 11
DDR_A_D25 N10 AH1 DDR_B_D23 K7 AE3
SA_DQ[25] RSVD_TP[8] SB_DQ[23] SB_CS#[1] DDRB_SCS1# 11
DDR_A_D26 N8 DDR_B_D24 M5 AD6
DDR_A_D27 SA_DQ[26] DDR_B_D25 SB_DQ[24] RSVD_TP[17]
N7 N4 AE6
DDR_A_D28 SA_DQ[27] DDR_B_D26 SB_DQ[25] RSVD_TP[18]
M10 N2
DDR_A_D29 SA_DQ[28] DDR_B_D27 SB_DQ[26]
M9 AH3 DDRA_ODT0 10 N1
DDR_A_D30 SA_DQ[29] SA_ODT[0] DDR_B_D28 SB_DQ[27]
N9 AG3 DDRA_ODT1 10 M4
DDR_A_D31 SA_DQ[30] SA_ODT[1] DDR_B_D29 SB_DQ[28]
M7 AG2 N5 AE4
DDR SYSTEM MEMORY A

SA_DQ[31] RSVD_TP[9] SB_DQ[29] SB_ODT[0] DDRB_ODT0 11


DDR_A_D32 AG6 AH2 DDR_B_D30 M2 AD4
SA_DQ[32] RSVD_TP[10] SB_DQ[30] SB_ODT[1] DDRB_ODT1 11

DDR SYSTEM MEMORY B


DDR_A_D33 AG5 DDR_B_D31 M1 AD5
DDR_A_D34 SA_DQ[33] DDR_B_D32 SB_DQ[31] RSVD_TP[19]
AK6 AM5 AE5
C
DDR_A_D35 SA_DQ[34] DDR_B_D33 SB_DQ[32] RSVD_TP[20] C
AK5 AM6
DDR_A_D36 SA_DQ[35] DDR_B_D34 SB_DQ[33]
AH5 SA_DQ[36] DDR_A_DQS#[0..7] 10 AR3 SB_DQ[34]
DDR_A_D37 AH6 C4 DDR_A_DQS#0 DDR_B_D35 AP3
DDR_A_D38 SA_DQ[37] SA_DQS#[0] DDR_A_DQS#1 DDR_B_D36 SB_DQ[35]
AJ5 SA_DQ[38] SA_DQS#[1] G6 AN3 SB_DQ[36] DDR_B_DQS#[0..7] 11
DDR_A_D39 AJ6 J3 DDR_A_DQS#2 DDR_B_D37 AN2 D7 DDR_B_DQS#0
DDR_A_D40 SA_DQ[39] SA_DQS#[2] DDR_A_DQS#3 DDR_B_D38 SB_DQ[37] SB_DQS#[0] DDR_B_DQS#1
AJ8 M6 AN1 F3
DDR_A_D41 SA_DQ[40] SA_DQS#[3] DDR_A_DQS#4 DDR_B_D39 SB_DQ[38] SB_DQS#[1] DDR_B_DQS#2
AK8 AL6 AP2 K6
DDR_A_D42 SA_DQ[41] SA_DQS#[4] DDR_A_DQS#5 DDR_B_D40 SB_DQ[39] SB_DQS#[2] DDR_B_DQS#3
AJ9 AM8 AP5 N3
DDR_A_D43 SA_DQ[42] SA_DQS#[5] DDR_A_DQS#6 DDR_B_D41 SB_DQ[40] SB_DQS#[3] DDR_B_DQS#4
AK9 SA_DQ[43] SA_DQS#[6] AR12 AN9 SB_DQ[41] SB_DQS#[4] AN5
DDR_A_D44 AH8 AM15 DDR_A_DQS#7 DDR_B_D42 AT5 AP9 DDR_B_DQS#5
DDR_A_D45 SA_DQ[44] SA_DQS#[7] DDR_B_D43 SB_DQ[42] SB_DQS#[5] DDR_B_DQS#6
AH9 AT6 AK12
DDR_A_D46 SA_DQ[45] DDR_B_D44 SB_DQ[43] SB_DQS#[6] DDR_B_DQS#7
AL9 SA_DQ[46] AP6 SB_DQ[44] SB_DQS#[7] AP15
DDR_A_D47 AL8 DDR_B_D45 AN8
DDR_A_D48 SA_DQ[47] DDR_B_D46 SB_DQ[45]
AP11 DDR_A_DQS[0..7] 10 AR6
DDR_A_D49 SA_DQ[48] DDR_A_DQS0 DDR_B_D47 SB_DQ[46]
AN11 D4 AR5
DDR_A_D50 SA_DQ[49] SA_DQS[0] DDR_A_DQS1 DDR_B_D48 SB_DQ[47]
AL12 F6 AR9 DDR_B_DQS[0..7] 11
DDR_A_D51 SA_DQ[50] SA_DQS[1] DDR_A_DQS2 DDR_B_D49 SB_DQ[48] DDR_B_DQS0
AM12 K3 AJ11 C7
DDR_A_D52 SA_DQ[51] SA_DQS[2] DDR_A_DQS3 DDR_B_D50 SB_DQ[49] SB_DQS[0] DDR_B_DQS1
AM11 N6 AT8 G3
DDR_A_D53 SA_DQ[52] SA_DQS[3] DDR_A_DQS4 DDR_B_D51 SB_DQ[50] SB_DQS[1] DDR_B_DQS2
AL11 AL5 AT9 J6
DDR_A_D54 SA_DQ[53] SA_DQS[4] DDR_A_DQS5 DDR_B_D52 SB_DQ[51] SB_DQS[2] DDR_B_DQS3
AP12 AM9 AH11 M3
DDR_A_D55 SA_DQ[54] SA_DQS[5] DDR_A_DQS6 DDR_B_D53 SB_DQ[52] SB_DQS[3] DDR_B_DQS4
AN12 AR11 AR8 AN6
DDR_A_D56 SA_DQ[55] SA_DQS[6] DDR_A_DQS7 DDR_B_D54 SB_DQ[53] SB_DQS[4] DDR_B_DQS5
AJ14 AM14 AJ12 AP8
DDR_A_D57 SA_DQ[56] SA_DQS[7] DDR_B_D55 SB_DQ[54] SB_DQS[5] DDR_B_DQS6
AH14 AH12 AK11
DDR_A_D58 SA_DQ[57] DDR_B_D56 SB_DQ[55] SB_DQS[6] DDR_B_DQS7
AL15 AT11 AP14
DDR_A_D59 SA_DQ[58] DDR_B_D57 SB_DQ[56] SB_DQS[7]
AK15 AN14
DDR_A_D60 SA_DQ[59] DDR_B_D58 SB_DQ[57]
AL14 DDR_A_MA[0..15] 10 AR14
DDR_A_D61 SA_DQ[60] DDR_A_MA0 DDR_B_D59 SB_DQ[58]
AK14 AD10 AT14
DDR_A_D62 SA_DQ[61] SA_MA[0] DDR_A_MA1 DDR_B_D60 SB_DQ[59]
AJ15 W1 AT12 DDR_B_MA[0..15] 11
DDR_A_D63 SA_DQ[62] SA_MA[1] DDR_A_MA2 DDR_B_D61 SB_DQ[60] DDR_B_MA0
AH15 W2 AN15 AA8
SA_DQ[63] SA_MA[2] DDR_A_MA3 DDR_B_D62 SB_DQ[61] SB_MA[0] DDR_B_MA1
W7 AR15 T7
SA_MA[3] DDR_A_MA4 DDR_B_D63 SB_DQ[62] SB_MA[1] DDR_B_MA2
SA_MA[4] V3 AT15 SB_DQ[63] SB_MA[2] R7
V2 DDR_A_MA5 T6 DDR_B_MA3
SA_MA[5] DDR_A_MA6 SB_MA[3] DDR_B_MA4
SA_MA[6] W3 SB_MA[4] T2
AE10 W6 DDR_A_MA7 T4 DDR_B_MA5
10 DDR_A_BS0 SA_BS[0] SA_MA[7] SB_MA[5]
B AF10 V1 DDR_A_MA8 T3 DDR_B_MA6 B
10 DDR_A_BS1 SA_BS[1] SA_MA[8] SB_MA[6]
V6 W5 DDR_A_MA9 AA9 R2 DDR_B_MA7
10 DDR_A_BS2 SA_BS[2] SA_MA[9] 11 DDR_B_BS0 SB_BS[0] SB_MA[7]
AD8 DDR_A_MA10 AA7 T5 DDR_B_MA8
SA_MA[10] 11 DDR_B_BS1 SB_BS[1] SB_MA[8]
V4 DDR_A_MA11 R6 R3 DDR_B_MA9
SA_MA[11] 11 DDR_B_BS2 SB_BS[2] SB_MA[9]
W4 DDR_A_MA12 AB7 DDR_B_MA10
SA_MA[12] DDR_A_MA13 SB_MA[10] DDR_B_MA11
10 DDR_A_CAS# AE8 AF8 R1
SA_CAS# SA_MA[13] DDR_A_MA14 SB_MA[11] DDR_B_MA12
10 DDR_A_RAS# AD9 V5 T1
SA_RAS# SA_MA[14] DDR_A_MA15 SB_MA[12] DDR_B_MA13
10 DDR_A_WE# AF9 V7 11 DDR_B_CAS# AA10 AB10
SA_WE# SA_MA[15] SB_CAS# SB_MA[13] DDR_B_MA14
11 DDR_B_RAS# AB8 SB_RAS# SB_MA[14] R5
AB9 R4 DDR_B_MA15
11 DDR_B_WE# SB_WE# SB_MA[15]

TYCO_2013620-2_IVY BRIDGE

CONN@ TYCO_2013620-2_IVY BRIDGE

CONN@

+1.5V

@ RC76
RC75 0_0402_5% 1K_0402_5%

QC3
S

5 H_DRAMRST# H_DRAMRST# 3 1 DDR3_DRAMRST#_R


A SM_DRAMRST# 10,11 A
SSM3K7002FU_SC70-3 RC77 1K_0402_5%
G
2

RC78
4.99K_0402_1% DRAMRST_CNTRL DRAMRST_CNTRL_PCH 13
RC73 0_0402_5%

CC37
0.047U_0402_16V4Z
Security Classification
2011/05/23
Compal Secret Data
2012/12/31 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(3/6) DDRIII
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 6 of 46
5 4 3 2 1
5 4 3 2 1

CFG Straps for Processor


D D
CFG2

JCPU1E RC79
1K_0402_1%

AH27 @ T0749
T1 @ CFG0 VCC_DIE_SENSE @ T0750
AK28 CFG[0] VSS_DIE_SENSE AH26
T2 @ CFG1 AK29
T3 @ CFG2 CFG[1]
AL26 CFG[2]
T4 @ CFG3 AL27
T5 @ CFG4 CFG[3] @ T0704
AK26 CFG[4] RSVD28 L7
T6 @ CFG5 AL29 AG7 @ T0705 PEG Static Lane Reversal - CFG2 is for the 16x
T7 @ CFG6 CFG[5] RSVD29 @ T0701
AL30 AE7
T8 @ CFG7 CFG[6] RSVD30 @ T0702
AM31 AK2
T9 @ CFG8 CFG[7] RSVD31
AM32
CFG[8] 1:(Default) Normal Operation; Lane #
T10 @ CFG9 AM30 W8 @ T0706 CFG2

CFG
T11 @ CFG10 AM28
CFG[9] RSVD32 definition matches socket pin map definition
T12 @ CFG11 CFG[10]
AM26
CFG[11] 0:Lane Reversed
T13 @ CFG12 AN28 AT26 @ T0707
T14 @ CFG13 CFG[12] RSVD33 @ T0708
AN31 AM33
T15 @ CFG14 CFG[13] RSVD34 @ T0709
AN26 AJ27
T16 @ CFG15 CFG[14] RSVD35 CFG4
AM27 CFG[15]
T17 @ CFG16 AK31
T18 @ CFG17 CFG[16]
AN29
CFG[17] @RC82
@ RC82
1K_0402_1%
T8 @ T0710
RSVD37 @ T0711
J16
RSVD38 @ T0703
AJ31 VAXG_VAL_SENSE RSVD39 H16
AH31 G16 @ T0712
VSSAXG_VAL_SENSE RSVD40
AJ33 VCC_VAL_SENSE
AH33
C VSS_VAL_SENSE C

T0718 @ AJ26 AR35 @ T0713 Display Port Presence Strap


RSVD5 RSVD_NCTF1 @ T0714
RSVD_NCTF2 AT34

RESERVED
AT33 @ T0715
RSVD_NCTF3 @ T0716
RSVD_NCTF4
AP35 1 : Disabled; No Physical Display Port
AR34 @ T0717 CFG4
RSVD_NCTF5 attached to Embedded Display Port
T0724 @ F25 0 : Enabled; An external Display Port device is
T0725 @ RSVD8
F24 connected to the Embedded Display Port
T0726 @ RSVD9
F23 RSVD10
T0727 @ D24 B34 @ T0719
T0729 @ RSVD11 RSVD_NCTF6 @ T0720
G25 A33
T0731 @ RSVD12 RSVD_NCTF7 @ T0721
G24 A34
T0732 @ RSVD13 RSVD_NCTF8 @ T0722 CFG6
E23 B35
T0733 @ RSVD14 RSVD_NCTF9 @ T0723
D23 C35
T0734 @ RSVD15 RSVD_NCTF10 CFG5
C30
T0735 @ RSVD16
A31
T0736 @ RSVD17
B30
T0737 @ RSVD18 @ RC83 @ RC84
B29
T0738 @ RSVD19 @ T0728 1K_0402_1% 1K_0402_1%
D30 AJ32
T0739 @ RSVD20 RSVD51 @ T0730
B31 AK32
T0740 @ RSVD21 RSVD52
A30
T0741 @ RSVD22
C29
RSVD23
AN35 CLK_RES_ITP 13
T0742 @ BCLK_ITP
J20 AM35 CLK_RES_ITP# 13
T0743 @ RSVD24 BCLK_ITP#
B18
RSVD25

T0747 @ J15 AT2 @ T0744 PCIE Port Bifurcation Straps


RSVD27 RSVD_NCTF11 @ T0745
RSVD_NCTF12 AT1
B AR1 @ T0746 B
RSVD_NCTF13
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG[6:5] 10: x8, x8 - Device 1 function 1 enabled ; function 2
B1 @ T0748
KEY disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
TYCO_2013620-2_IVY BRIDGE

CONN@
CFG7

@RC85
@ RC85
1K_0402_1%

PEG DEFER TRAINING

1: (Default) PEG Train immediately


CFG7 following RESETB de assertion
0: PEG Wait for BIOS for training
A A

Security Classification
2011/05/23
Compal Secret Data
2012/12/31 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(4/6) RSVD,CFG
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 7 of 46
5 4 3 2 1
5 4 3 2 1

AT35
JCPU1H

AJ22
JCPU1F POWER
VSS1 VSS81
AT32 AJ19
VSS2 VSS82
AT29 VSS3 VSS83 AJ16
AT27 AJ13 +V1.05S_VCCP
VSS4 VSS84 +VCC_CORE
AT25 VSS5 VSS85 AJ10
D
AT22 VSS6 VSS86 AJ7 8.5A D
AT19
AT16
VSS7 VSS87 AJ4
AJ3
97AAG35
VSS8 VSS88 VCC1
AT13 AJ2 AG34 AH13
VSS9 VSS89 VCC2 VCCIO1
AT10 AJ1 AG33 AH10
VSS10 VSS90 VCC3 VCCIO2
AT7 VSS11 VSS91 AH35 AG32 VCC4 VCCIO3 AG10
AT4 AH34 AG31 AC10
VSS12 VSS92 VCC5 VCCIO4
AT3 VSS13 VSS93 AH32 AG30 VCC6 VCCIO5 Y10
AR25 VSS14 VSS94 AH30 AG29 VCC7 VCCIO6 U10
AR22 AH29 AG28 P10
VSS15 VSS95 VCC8 VCCIO7
AR19 VSS16 VSS96 AH28 AG27 VCC9 VCCIO8 L10
AR16 VSS17 VSS98 AH25 AG26 VCC10 VCCIO9 J14
AR13 VSS18 VSS99 AH22 AF35 VCC11 VCCIO10 J13
AR10 AH19 AF34 J12
VSS19 VSS100 VCC12 VCCIO11
AR7 VSS20 VSS101 AH16 AF33 VCC13 VCCIO12 J11
AR4 AH7 AF32 H14
VSS21 VSS102 VCC14 VCCIO13
AR2 AH4 AF31 H12
VSS22 VSS103 VCC15 VCCIO14
AP34 AG9 AF30 H11
VSS23 VSS104 VCC16 VCCIO15
AP31 AG8 AF29 G14
VSS24 VSS105 VCC17 VCCIO16
AP28 AG4 AF28 G13
VSS25 VSS106 VCC18 VCCIO17
AP25 AF6 AF27 G12

PEG AND DDR


VSS26 VSS107 VCC19 VCCIO18
AP22 AF5 AF26 F14
VSS27 VSS108 VCC20 VCCIO19
AP19 AF3 AD35 F13
VSS28 VSS109 VCC21 VCCIO20
AP16 VSS29 VSS110 AF2 AD34 VCC22 VCCIO21 F12
AP13 AE35 AD33 F11
VSS30 VSS111 VCC23 VCCIO22
AP10 VSS31 VSS112 AE34 AD32 VCC24 VCCIO23 E14
AP7 VSS32 VSS113 AE33 AD31 VCC25 VCCIO24 E12
AP4 VSS33 VSS114 AE32 AD30 VCC26
AP1 VSS34 VSS115 AE31 AD29 VCC27 VCCIO25 E11
AN30 VSS35 VSS116 AE30 AD28 VCC28 VCCIO26 D14
AN27 AE29 AD27 D13
VSS36 VSS117 VCC29 VCCIO27
AN25 AE28 AD26 D12
AN22
AN19
VSS37
VSS38
VSS39
VSS VSS118
VSS119
VSS120
AE27
AE26
AC35
AC34
VCC30
VCC31
VCC32
VCCIO28
VCCIO29
VCCIO30
D11
C14
AN16 AE9 AC33 C13
VSS40 VSS121 VCC33 VCCIO31
AN13 AD7 AC32 C12
VSS41 VSS122 VCC34 VCCIO32
C AN10 AC9 AC31 C11 C
VSS42 VSS123 VCC35 VCCIO33
AN7 AC8 AC30 B14
VSS43 VSS124 VCC36 VCCIO34
AN4 AC6 AC29 B12
VSS44 VSS125 VCC37 VCCIO35
AM29 AC5 AC28 A14
VSS45 VSS126 VCC38 VCCIO36
AM25 VSS46 VSS127 AC3 AC27 VCC39 VCCIO37 A13
AM22 AC2 AC26 A12
VSS47 VSS128 VCC40 VCCIO38
AM19 VSS48 VSS129 AB35 AA35 VCC41 VCCIO39 A11
AM16 VSS49 VSS130 AB34 AA34 VCC42
AM13 VSS50 VSS131 AB33 AA33 VCC43 VCCIO40 J23
AM10 AB32 AA32
VSS51 VSS132 VCC44
AM7 AB31 AA31
VSS52 VSS133 VCC45
AM4 AB30 AA30
VSS53 VSS134 VCC46
AM3 VSS54 VSS135 AB29 AA29 VCC47
AM2 AB28 AA28
VSS55 VSS136 VCC48
AM1 VSS56 VSS137 AB27 AA27 VCC49
AL34 VSS57 VSS138 AB26 AA26 VCC50
AL31 Y9 Y35

CORE SUPPLY
VSS58 VSS139 VCC51 +V1.05S_VCCP +V1.05S_VCCP
AL28 Y8 Y34
VSS59 VSS140 VCC52
AL25 Y6 Y33
VSS60 VSS141 VCC53
AL22
VSS61 VSS142
Y5 Y32
VCC54 Place the PU
AL19 Y3 Y31
AL16
VSS62 VSS143
Y2 Y30
VCC55 resistors close to CPU
VSS63 VSS144 VCC56 RC91 RC89
AL13 W35 Y29
VSS64 VSS145 VCC57
AL10 W34 Y28 130_0402_1% 75_0402_5%
VSS65 VSS146 VCC58
AL7 W33 Y27
VSS66 VSS147 VCC59
AL4 W32 Y26
VSS67 VSS148 VCC60
AL2 W31 V35
VSS68 VSS149 VCC61 H_CPU_SVIDALRT# RC90 43_0402_1%
AK33 W30 V34 AJ29

SVID
VSS69 VSS150 VCC62 VIDALERT# VR_SVID_ALRT# 42
AK30 W29 V33 AJ30 H_CPU_SVIDCLK RC88 0_0402_5%
VSS70 VSS151 VCC63 VIDSCLK VR_SVID_CLK 42
AK27 W28 V32 AJ28 H_CPU_SVIDDAT RC92 0_0402_5%
VSS71 VSS152 VCC64 VIDSOUT VR_SVID_DAT 42
AK25 VSS72 VSS153 W27 V31 VCC65
AK22 W26 V30
VSS73 VSS154 VCC66
AK19 U9 V29
VSS74 VSS155 VCC67
AK16 U8 V28
VSS75 VSS156 VCC68
AK13 U6 V27
VSS76 VSS157 VCC69
AK10 U5 V26
VSS77 VSS158 VCC70
B AK7 U3 U35 B
VSS78 VSS159 VCC71
AK4 U2 U34
VSS79 VSS160 VCC72
AJ25 U33
VSS80 VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
TYCO_2013620-2_IVY BRIDGE VCC77
U28
VCC78
U27 VCC79
CONN@ U26
VCC80 Place the PU +VCC_CORE
R35
R34
VCC81 resistors close to CPU
VCC82
R33
VCC83
R32
VCC84 RC93
R31
VCC85
R30 100_0402_1%
VCC86
R29
VCC87
R28
SENSE LINES

VCC88
R27 AJ35 VCCSENSE_R VCCSENSE 42
VCC89 VCC_SENSE
R26 AJ34 VSSSENSE_R RC94 0_0402_5%
VSSSENSE 42
VCC90 VSS_SENSE RC95 0_0402_5%
P35
VCC91
P34
VCC92
P33
VCC93 RC97
P32 VCC94 VCCIO_SENSE B10
P31 A10 100_0402_1%
VCC95 VSS_SENSE_VCCIO
P30 VCC96
P29
VCC97
P28 VCC98
P27 VCCIO_SENSE 39
VCC99
P26
VCC100
1

RC98
10_0402_1% Close to CPU +V1.05S_VCCP
A A
2

TYCO_2013620-2_IVY BRIDGE VCCIO_SENSE 1 R75 2

CONN@ 10_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(5/6) PWR,BYPASS
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 8 of 46
5 4 3 2 1
5 4 3 2 1

+1.5V_CPU_VDDQ
+1.5V QC4 +1.5V_CPU_VDDQ
+3VALW +VSBP MDU1512RH_PPAK56-8-5
1
2
5 3

2
RC99
D RC101 100K_0402_5% R5521 D

4
100K_0402_5% 470_0603_5%

RUN_ON_CPU1.5VS3

1
3

0.1U_0603_50V7K

1
D

330K_0402_1%
QC5B
RUN_ON_CPU1.5VS3# 5 2 RUN_ON_CPU1.5VS3# RUN_ON_CPU1.5VS3# 5,34

CC39
RC102
G
2N7002DW-7-F_SOT363-6 S Q5517

3
2N7002H 1N SOT23-3

6
QC5A
RC104 2N7002DW-7-F_SOT363-6
29 CPU1.5V_S3_GATE 2
0_0402_5%

1
@ RC100
100K_0402_5%

Close to CPU +GFX_CORE

VCC_AXG_SENSE R78 100_0402_1%

JCPU1G
POWER VSS_AXG_SENSE R79 100_0402_1%

33A AT24 AK35

SENSE
LINES
+GFX_CORE VAXG1 VAXG_SENSE VCC_AXG_SENSE 42 +1.5V_CPU_VDDQ
AT23 AK34 VSS_AXG_SENSE 42
VAXG2 VSSAXG_SENSE
AT21
C VAXG3 C
AT20
VAXG4
AT18
VAXG5 0_0402_5% RC107
AT17
VAXG6 RC108
AR24
VAXG7 1K_0402_1%
AR23
VAXG8 QC6
AR21
VAXG9
AR20
VAXG10
@ +V_SM_VREF should

D
AR18 AL1 +V_SM_VREF_CNT 3 1 +V_SM_VREF have 10 mil trace width
VAXG11 SM_VREF
AR17
VAXG12
AP24
VREF

VAXG13 PMV45EN_SOT23-3
AP23

G
2
VAXG14 RC110
AP21
VAXG15 1K_0402_1%
AP20 B4
VAXG16 SA_DIMM_VREFDQ
AP18 D1
VAXG17 SB_DIMM_VREFDQ RUN_ON_CPU1.5VS3
AP17
VAXG18
AN24
VAXG19
AN23
VAXG20
AN21
VAXG21 +1.5V_CPU_VDDQ
AN20
VAXG22 +1.5V
AN18
DDR3 -1.5V RAILS

VAXG23 @JP0901
@ JP0901
AN17
AM24
VAXG24
AF7
10A 1 2
GRAPHICS

VAXG25 VDDQ1
AM23 AF4
VAXG26 VDDQ2 PAD-OPEN 4x4m
AM21 AF1
VAXG27 VDDQ3

10U_0805_10VM

10U_0805_10VM

10U_0805_10VM

10U_0805_10VM

10U_0805_10VM

10U_0805_6.3V6M
AM20 AC7 1
VAXG28 VDDQ4

330U_D2_2V_Y
AM18
VAXG29 VDDQ5
AC4 Material Note (VDDQ)

CC56
AM17 AC1 +
VAXG30 VDDQ6 CC51

CC52

CC53

CC54

CC55

CC57
AL24
VAXG31 VDDQ7
Y7 Bottom Socket Edge
AL23 Y4
AL21
VAXG32 VDDQ8
Y1 2 1 x 330 µF
VAXG33 VDDQ9 10U 0805 *6
AL20 U7
VAXG34 VDDQ10
AL18 U4
VAXG35 VDDQ11
AL17 U1
VAXG36 VDDQ12
AK24 P7
VAXG37 VDDQ13
AK23 P4
VAXG38 VDDQ14
AK21 P1
VAXG39 VDDQ15
AK20
VAXG40
AK18
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
B VAXG44 B
AJ21
VAXG45
AJ20
VAXG46
AJ18
AJ17
VAXG47
M27
6A +VCCSA
VAXG48 VCCSA1
SA RAIL

AH24 M26
VAXG49 VCCSA2
10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

AH23 L26 1 1 2 +VCCSA_SENSE


VAXG50 VCCSA3
330U_D2_2V_Y

AH21 J26
VAXG51 VCCSA4 + RH235 100_0402_5%
AH20 J25
VAXG52 VCCSA5
CC40

CC41

CC42

CC44

AH18 J24 @ Material Note (VCCSA)


VAXG53 VCCSA6
AH17 H26
VAXG54 VCCSA7 2
VCCSA8
H25 1 x 330 µF
Bottom Socket Cavity 10U 0805 *2
+1.8VS Bottom Socket Edge 10U 0805 *1
1.8V RAIL

H23 +VCCSA_SENSE 41
RC119 VCCSA_SENSE
0_0805_5% 1.5A
+1.8VS_VCCPLL B6
VCCPLL1 @ RC111
A6 C22
MISC

VCCPLL2 VCCSA_VID[0] H_VCCSA_VID0 41


10U_0805_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 A2 C24 0_0402_5% +1.5V_CPU_VDDQ +1.5V


VCCPLL3 VCCSA_VID[1] H_VCCSA_VID1 41
330U_D2_2V_Y

@
CC58

CC59

CC60

+
CC61

CC45 0.1U_0402_10V7K
2 2 A19
2 VCCIO_SEL
CC46 0.1U_0402_10V7K
TYCO_2013620-2_IVY BRIDGE +3VS

Material Note (+1.8VS_VCCPLL) CONN@ CC47 0.1U_0402_10V7K

1 x 330 µF @RC112
@ RC112
10K_0402_5% CC48 0.1U_0402_10V7K
Bottom Socket Edge
1U 0402 *1
10U 0805 *1 H_VCCP_SEL VCCP_PWRCTRL
0_0402_5% @RC114
@ RC114

A A
IVY Bridge drives VCCIO_SEL low
VCCP_PWRCTRL:0

Sandy Bridge is NC for A19


VCCP_PWRCTRL:1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(6/6) PWR,VSS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 9 of 46
5 4 3 2 1
5 4 3 2 1

+1.5V
6 DDR_A_D[0..63]
+1.5V 3A@1.5V +1.5V
6 DDR_A_DQS[0..7]
RD1
1K_0402_1% DDR3 SO-DIMM A 6 DDR_A_DQS#[0..7]
@JDDRL
@ JDDRL
6 DDR_A_MA[0..15]
+V_DDR_REFA 1 2
VREF_DQ VSS1 DDR_A_D4
3 VSS2 DQ4 4

0.1U_0402_10V6K

0.1U_0402_10V6K

2.2U_0603_6.3V6K
DDR_A_D0 5 6 DDR_A_D5
DQ0 DQ5

CD50

CD1

CD2
DDR_A_D1 7 DQ1 8
VSS3 DDR_A_DQS#0
9 10
RD2 VSS4 DQS#0 DDR_A_DQS0
11 DM0 DQS0 12
D D
13 VSS5 VSS6 14
1K_0402_1% DDR_A_D2 15 DQ2 16 DDR_A_D6
DDR_A_D3 DQ6 DDR_A_D7
17 DQ3 DQ7 18
19 20
DDR_A_D8 VSS7 VSS8 DDR_A_D12
21 22
DDR_A_D9 DQ8 DQ12 DDR_A_D13
23 DQ9 DQ13 24
25 26
DDR_A_DQS#1 VSS9 VSS10
27 DQS#1 DM1 28
DDR_A_DQS1 29 DQS1 30 SM_DRAMRST#
RESET# SM_DRAMRST# 6,11
31 32
DDR_A_D10 VSS11 VSS12 DDR_A_D14
33 DQ10 DQ14 34
DDR_A_D11 35 DQ11 36 DDR_A_D15
DQ15
37 VSS13 VSS14 38
DDR_A_D16 39 DQ16 40 DDR_A_D20
DDR_A_D17 DQ20 DDR_A_D21
41 DQ17 42
DQ21
43 VSS15 44
DDR_A_DQS#2 VSS16
45 DQS#2 DM2 46
DDR_A_DQS2 47 48
DQS2 VSS17 DDR_A_D22
49 VSS18 DQ22 50
DDR_A_D18 51 DQ18 52 DDR_A_D23
DDR_A_D19 DQ23
53 DQ19 54
VSS19 DDR_A_D28
55 56
DDR_A_D24 VSS20 DQ28 DDR_A_D29
57 DQ24 DQ29 58
DDR_A_D25 59 DQ25 60
VSS21 DDR_A_DQS#3
61 62
VSS22 DQS#3 DDR_A_DQS3
63 DM3 DQS3 64
65 VSS23 66
DDR_A_D26 VSS24 DDR_A_D30
67 DQ26 68
DDR_A_D27 DQ30 DDR_A_D31
69 DQ27 DQ31 70
71 VSS25 VSS26 72
Layout Note:
C Place near JDDRL C
DDRA_CKE0 73 74 DDRA_CKE1 +1.5V
6 DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 6
75 76
VDD1 VDD2 DDR_A_MA15
77 NC1 A15 78

330U_B2_2.5VM_R15M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
DDR_A_BS2 79 80 DDR_A_MA14
6 DDR_A_BS2 BA2 A14

CD7
81 82 1
VDD3 VDD4

CD8

CD9

CD10

CD11

CD12

CD13

CD14
DDR_A_MA12 83 84 DDR_A_MA11 1 1 1 1 1 1 1
DDR_A_MA9 A12/BC# A11 DDR_A_MA7 + @
85 86
A9 A7
87 VDD5 VDD6 88
DDR_A_MA8 89 90 DDR_A_MA6 @
DDR_A_MA5 A8 A6 DDR_A_MA4 2 2 2 2 2 2 2 2
91 A5 A4 92
93 94
DDR_A_MA3 VDD7 VDD8 DDR_A_MA2
95 A3 A2 96
DDR_A_MA1 97 98 DDR_A_MA0
A1 A0
99 100
DDRA_CLK0 VDD9 VDD10 DDRA_CLK1
6 DDRA_CLK0 101 102 DDRA_CLK1 6
DDRA_CLK0# CK0 CK1 DDRA_CLK1#
6 DDRA_CLK0# 103 104 DDRA_CLK1# 6
CK0# CK1# +1.5V
105 106
DDR_A_MA10 VDD11 VDD12 DDR_A_BS1
107 108 DDR_A_BS1 6
DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
6 DDR_A_BS0 109 BA0 RAS# 110 DDR_A_RAS# 6
111 112
DDR_A_WE# VDD13 VDD14 DDRA_SCS0# RD6
6 DDR_A_WE# 113 114 DDRA_SCS0# 6
DDR_A_CAS# WE# S0# DDRA_ODT0 1K_0402_1%
6 DDR_A_CAS# 115
CAS# ODT0
116 DDRA_ODT0 6 Layout Note: Place these 4 Caps near
117 118 Command and Control signals of JDDRL
DDR_A_MA13 VDD15 VDD16 DDRA_ODT1
119 120 DDRA_ODT1 6
DDRA_SCS1# A13 ODT1
6 DDRA_SCS1# 121 122
S1# NC2 +1.5V
123 VDD17 VDD18 124
125 126 +VREF_CA
NCTEST VREF_CA
127 128
VSS27 VSS28

0.1U_0402_10V6K

2.2U_0603_6.3V6K
DDR_A_D32 129 130 DDR_A_D36
DQ32 DQ36

CD15

CD16

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
DDR_A_D33 131 132 DDR_A_D37
DQ33 DQ37

CD17

CD18

CD19

CD20
133 134
B DDR_A_DQS#4 VSS29 VSS30 RD7 B
135 DQS#4 DM4 136
DDR_A_DQS4 137 138 1K_0402_1%
DQS4 VSS31 DDR_A_D38
139 140
DDR_A_D34 VSS32 DQ38 DDR_A_D39
141 DQ34 DQ39 142
DDR_A_D35 143 144
DQ35 VSS33 DDR_A_D44
145 146
DDR_A_D40 VSS34 DQ44 DDR_A_D45
147 148
DDR_A_D41 DQ40 DQ45
149 150
DQ41 VSS35 DDR_A_DQS#5
151 152
VSS36 DQS#5 DDR_A_DQS5
153 DM5 DQS5 154
155 VSS37 VSS38 156
DDR_A_D42 157 158 DDR_A_D46
DDR_A_D43 DQ42 DQ46 DDR_A_D47
159 DQ43 DQ47 160
161 162
DDR_A_D48 VSS39 VSS40 DDR_A_D52
163 DQ48 DQ52 164 Layout Note:
DDR_A_D49 165 166 DDR_A_D53
167
DQ49 DQ53
168
Place near JDDRL.203,204
DDR_A_DQS#6 VSS41 VSS42
169 170
DDR_A_DQS6 DQS#6 DM6
171 172
DQS6 VSS43 DDR_A_D54
173 174
DDR_A_D50 VSS44 DQ54 DDR_A_D55 +0.75VS
175 176
DDR_A_D51 DQ50 DQ55
177 DQ51 VSS45 178
179 180 DDR_A_D60
DDR_A_D56 VSS46 DQ60 DDR_A_D61
181 DQ56 DQ61 182
DDR_A_D57 183 184
DQ57 VSS47

1U_0402_6.3V6K
CD21

1U_0402_6.3V6K
CD22

1U_0402_6.3V6K
CD23

1U_0402_6.3V6K
CD24
185 186 DDR_A_DQS#7
VSS48 DQS#7 DDR_A_DQS7
187 DM7 DQS7 188 1 1 1 1
189 190
DDR_A_D58 VSS49 VSS50 DDR_A_D62
191 192
DDR_A_D59 DQ58 DQ62 DDR_A_D63
193 194
DQ59 DQ63 2 2 2 2
195 196
VSS51 VSS52
197 SA0 EVENT# 198
A A
+3VS 199 200 PCH_SMBDATA 11,13,23
VDDSPD SDA
2.2U_0603_6.3V6K

0.1U_0402_10V6K

201 SA1 SCL 202 PCH_SMBCLK 11,13,23


CD25

CD26

203 VTT1 VTT2 204 +0.75VS


10K_0402_5%
RD8

10K_0402_5%
RD9

205 206 0.65A@0.75V


G1 G2
TYCO_2-2013022-2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-DDRL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 10 of 46
5 4 3 2 1
5 4 3 2 1

+1.5V
+1.5V +1.5V
Layout Note:
3A@1.5V Place near JDDRH
RD10
6 DDR_B_DQS#[0..7]
+V_DDR_REFB 1K_0402_1%
@ JDDRH +1.5V
6 DDR_B_D[0..63]
1 VREF_DQ VSS1 2

330U_B2_2.5VM_R15M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
3 VSS2 4 DDR_B_D4
DQ4 6 DDR_B_DQS[0..7]
2.2U_0603_6.3V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

CD31
DDR_B_D0 5 6 DDR_B_D5 1
DQ0 DQ5

CD34

CD35

CD36

CD37

CD38

CD39

CD40

CD41
DDR_B_D1 7 DQ1 8 1 1 1 1 1 1 1 1
VSS3 DDR_B_DQS#0 6 DDR_B_MA[0..15] +
RD11 9 10
VSS4 DQS#0
CD28

CD27

CD51
11 DM0 12 DDR_B_DQS0
DQS0

1K_0402_1%
13 14 @ @ @
DDR_B_D2 VSS5 VSS6 DDR_B_D6 2 2 2 2 2 2 2 2 2
15 DQ2 DQ6 16
D DDR_B_D3 DDR_B_D7 D
17 DQ3 DQ7 18
19 VSS7 VSS8 20
DDR_B_D8 21 DQ8 22 DDR_B_D12
DDR_B_D9 DQ12 DDR_B_D13
23 24
DQ9 DQ13
25 26
DDR_B_DQS#1 VSS9 VSS10
27 DQS#1 DM1 28
DDR_B_DQS1 29 30 SM_DRAMRST#
DQS1 RESET# SM_DRAMRST# 6,10
31 VSS11 VSS12 32
DDR_B_D10 33 DQ10 34 DDR_B_D14
DDR_B_D11 DQ14 DDR_B_D15
35 36
DQ11 DQ15
37 VSS13 VSS14 38 Layout Note: Place these 4 Caps near
DDR_B_D16 39 DQ16 40 DDR_B_D20
DDR_B_D17 DQ20 DDR_B_D21
Command and Control signals of JDDRH
41 DQ17 DQ21 42
43 VSS15 44
DDR_B_DQS#2 VSS16 +1.5V
45 DQS#2 46
DDR_B_DQS2 DM2
47 DQS2 48
VSS17 DDR_B_D22
49 VSS18 DQ22 50
DDR_B_D18 51 52 DDR_B_D23
DQ18 DQ23

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
DDR_B_D19 53 DQ19 54
VSS19

CD29

CD32

CD30

CD33
55 VSS20 56 DDR_B_D28
DDR_B_D24 DQ28 DDR_B_D29
57 DQ24 58
DDR_B_D25 DQ29
59 60
DQ25 VSS21 DDR_B_DQS#3
61 VSS22 DQS#3 62
63 DM3 64 DDR_B_DQS3
DQS3
65 66
DDR_B_D26 VSS23 VSS24 DDR_B_D30
67 DQ26 DQ30 68
DDR_B_D27 69 DQ27 70 DDR_B_D31
DQ31
71 VSS25 72
VSS26

DDRB_CKE0 73 74 DDRB_CKE1
C 6 DDRB_CKE0 CKE0 CKE1 DDRB_CKE1 6 C
75 VDD1 VDD2 76
77 78 DDR_B_MA15 Layout Note:
DDR_B_BS2 NC1 A15 DDR_B_MA14
6 DDR_B_BS2 79 80 Place near JDDRH.203 and 204
BA2 A14
81 VDD3 VDD4 82
DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA9 A12/BC# A11 DDR_B_MA7 +0.75VS
85 86
A9 A7
87 VDD5 VDD6 88
DDR_B_MA8 89 90 DDR_B_MA6
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
93 94
VDD7 VDD8

1U_0603_10V6K

1U_0603_10V6K

1U_0603_10V6K

1U_0603_10V6K
DDR_B_MA3 95 96 DDR_B_MA2
A3 A2

CD42

CD43

CD44

CD45
DDR_B_MA1 97 98 DDR_B_MA0
A1 A0
99 VDD9 VDD10 100
DDRB_CLK0 101 102 DDRB_CLK1
6 DDRB_CLK0 CK0 CK1 DDRB_CLK1 6
DDRB_CLK0# 103 104 DDRB_CLK1#
6 DDRB_CLK0# CK0# CK1# DDRB_CLK1# 6
105 106
DDR_B_MA10 VDD11 VDD12 DDR_B_BS1
107 108 DDR_B_BS1 6
DDR_B_BS0 A10/AP BA1 DDR_B_RAS# +1.5V
6 DDR_B_BS0 109 110 DDR_B_RAS# 6
BA0 RAS#
111 112
DDR_B_WE# VDD13 VDD14 DDRB_SCS0#
6 DDR_B_WE# 113 WE# S0# 114 DDRB_SCS0# 6
DDR_B_CAS# 115 116 DDRB_ODT0
6 DDR_B_CAS# CAS# ODT0 DDRB_ODT0 6
117 118 RD12
DDR_B_MA13 VDD15 VDD16 DDRB_ODT1 1K_0402_1%
119 120 DDRB_ODT1 6
DDRB_SCS1# A13 ODT1
6 DDRB_SCS1# 121 122
S1# NC2
123 124
VDD17 VDD18 +VREF_CB
125 126
NCTEST VREF_CA
0.1U_0402_10V6K

2.2U_0603_6.3V6K
127 VSS27 VSS28 128
DDR_B_D32 129 130 DDR_B_D36
DQ32 DQ36
CD46

CD47
DDR_B_D33 131 132 DDR_B_D37
DQ33 DQ37
133 134
DDR_B_DQS#4 VSS29 VSS30 RD13
135 136
DDR_B_DQS4 DQS#4 DM4
137 138
B DQS4 VSS31 DDR_B_D38 1K_0402_1% B
139 VSS32 DQ38 140
DDR_B_D34 141 142 DDR_B_D39
DDR_B_D35 DQ34 DQ39
143 144
DQ35 VSS33 DDR_B_D44
145 VSS34 DQ44 146
DDR_B_D40 147 148 DDR_B_D45
DDR_B_D41 DQ40 DQ45
149 150
DQ41 VSS35 DDR_B_DQS#5
151 152
VSS36 DQS#5 DDR_B_DQS5
153 154
DM5 DQS5
155 156
DDR_B_D42 VSS37 VSS38 DDR_B_D46
157 DQ42 DQ46 158
DDR_B_D43 159 160 DDR_B_D47
DQ43 DQ47
161 162
DDR_B_D48 VSS39 VSS40 DDR_B_D52
163 DQ48 DQ52 164
DDR_B_D49 165 166 DDR_B_D53
DQ49 DQ53
167 VSS41 VSS42 168
DDR_B_DQS#6 169 170
DDR_B_DQS6 DQS#6 DM6
171 172
DQS6 VSS43 DDR_B_D54
173 174
DDR_B_D50 VSS44 DQ54 DDR_B_D55
175 176
DDR_B_D51 DQ50 DQ55
177 178
DQ51 VSS45 DDR_B_D60
179 180
DDR_B_D56 VSS46 DQ60 DDR_B_D61
181 DQ56 DQ61 182
DDR_B_D57 183 184
DQ57 VSS47 DDR_B_DQS#7
185 VSS48 DQS#7 186
187 188 DDR_B_DQS7
DM7 DQS7
189 190
DDR_B_D58 VSS49 VSS50 DDR_B_D62
191 DQ58 DQ62 192
DDR_B_D59 193 194 DDR_B_D63
RD14 DQ59 DQ63
195 196
10K_0402_5% VSS51 VSS52
197 198
SA0 EVENT#
+3VS 199 200 PCH_SMBDATA 10,13,23
VDDSPD SDA
2.2U_0603_6.3V6K

0.1U_0402_10V6K

201 SA1 SCL 202 PCH_SMBCLK 10,13,23


CD48

CD49

A A
203 204 +0.75VS
RD15 10K_0402_5% VTT1 VTT2
205 206 0.65A@0.75V
G1 G2
TYCO 2-1932300-1 204P H8.0

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-DDRH
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 11 of 46
5 4 3 2 1
5 4 3 2 1

PCH_RTCX1

PCH_RTCX2
RH2 10M_0402_5%

1 2
YH1 32.768KHZ_12.5PF_CM31532768DZFT

CH2 CH3 +RTCVCC


12P_0402_50V8J 12P_0402_50V8J
D SM_INTRUDER# D
RH12 1M_0402_5%

UH1A
far away hot spot
+RTCVCC PCH_RTCX1 A20 C38 LPC_AD0
1 RTCX1 FWH0 / LAD0 LPC_AD0 28,29

1
CH4 CMOS A38 LPC_AD1
FWH1 / LAD1 LPC_AD1 28,29

LPC
1U_0402_6.3V4Z CLRP1 PCH_RTCX2 C20 B37 LPC_AD2
RTCX2 FWH2 / LAD2 LPC_AD2 28,29
SHORT PADS C37 LPC_AD3
LPC_AD3 28,29

2
2 PCH_RTCRST# FWH3 / LAD3
D20
RH23 20K_0402_5% RTCRST# LPC_FRAME#
D36 LPC_FRAME# 28,29
PCH_SRTCRST# FWH4 / LFRAME#
G22 SRTCRST#
RH24 20K_0402_5% 1 E36
LDRQ0#

1
SM_INTRUDER# LPC_LDRQ1#

RTC
K22 INTRUDER# LDRQ1# / GPIO23 K36
CH5 CLRP2 @ T1509 PAD
1U_0402_6.3V4Z SHORT PADS PCH_INTVRMEN C17 V5 SERIRQ SERIRQ 28,29

2
2 ME CMOS INTVRMEN SERIRQ
CLP1 & CLP2 place near DIMM
+RTCVCC AM3 SATA_PRX_C_DTX_N0
SATA0RXN SATA_PRX_C_DTX_N0 27
HDA_BIT_CLK N34 AM1 SATA_PRX_C_DTX_P0 HDD
HDA_BCLK SATA0RXP SATA_PRX_C_DTX_P0 27 +3VS
PCH_INTVRMEN RH33 330K_0402_5% SATA_PTX_DRX_N0

SATA 6G
AP7 SATA_PTX_DRX_N0 27
HDA_SYNC SATA0TXN SATA_PTX_DRX_P0
L34 AP5

::Integrated
HDA_SYNC SATA0TXP SATA_PTX_DRX_P0 27
H VRM enable PCH_SPKR SERIRQ RH28 10K_0402_5%
* L Integrated VRM disable 25 PCH_SPKR
T10
SPKR SATA1RXN
SATA1RXP
AM10
AM8
HDA_RST# K34 AP11 PCH_GPIO21 RH29 10K_0402_5%
HDA_RST# SATA1TXN
SATA1TXP AP10
PCH_SATALED# RH31 10K_0402_5%
ME_EN from EC. AZ_SDIN0_HD E34 AD7 SATA_PRX_C_DTX_N2
25 AZ_SDIN0_HD HDA_SDIN0 SATA2RXN SATA_PRX_C_DTX_N2 27
Please place close to RH32aviod the branch. AD5 SATA_PRX_C_DTX_P2
SATA2RXP SATA_PRX_C_DTX_P2 27
G34 AH5 SATA_PTX_DRX_N2 ODD
HDA_SDIN1 SATA2TXN SATA_PTX_DRX_N2 27
29 ME_EN HDA_SDOUT AH4 SATA_PTX_DRX_P2
SATA2TXP SATA_PTX_DRX_P2 27
RH25 LOCK@0_0402_5% C34
HDA_SDIN2

IHDA
C AB8 C
HDA_BIT_CLK SATA3RXN
25 AZ_BITCLK_HD 1 2 A34 AB10
RH27 33_0402_5% HDA_SDIN3 SATA3RXP +3VS
AF3
SATA3TXN
SATA3TXP AF1
HDA_SDOUT A36
HDA_RST# HDA_SDO PCH_SPKR RH36 @ 1K_0402_5%

SATA
25 AZ_RST_HD# 1 2 SATA4RXN Y7
RH30 33_0402_5% Y5
HDA_SDOUT SATA4RXP
25 AZ_SDOUT_HD 1 2 C36 HDA_DOCK_EN# / GPIO33 SATA4TXN AD3 LOW=Default
RH32 33_0402_5%
N32
HDA_DOCK_RST# / GPIO13
SATA4TXP
AD1
*HIGH=No Reboot
Y3
SATA5RXN
SATA5RXP Y1

HDA_SDO
AB3
+3V_PCH +3V_PCH +3V_PCH PCH_JTAG_TCK SATA5TXN
J3 AB1
JTAG_TCK SATA5TXP +3V_PCH
PCH_JTAG_TMS H7 Y11 +1.05VS_VCC_SATA ME debug mode , this signal has a weak internal PD
JTAG_TMS SATAICOMPO

JTAG
RH38 RH39 RH40
XDP@ XDP@ XDP@ PCH_JTAG_TDI K5 Y10 SATA_COMP HDA_SDOUT RH42 @ 1K_0402_5%
JTAG_TDI SATAICOMPI
200_0402_5% 200_0402_5% 200_0402_5% RH41 37.4_0402_1% L=>security measures defined in the Flash
PCH_JTAG_TDO H1
JTAG_TDO
SATA3RCOMPO
AB12 +1.05VS_SATA3 Descriptor will be in effect (default) *Low = Disabled
High = Enabled
PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI H=>Flash Descriptor Security will be overridden
AB13 SATA3_COMP
RH44 RH45 RH46 SATA3COMPI RH43 49.9_0402_1%
XDP@ XDP@ XDP@
100_0402_1% 100_0402_1% 100_0402_1% PCH_SPI_CLK T3 AH1 RBIAS_SATA3
30 PCH_SPI_CLK SPI_CLK SATA3RBIAS RH48 750_0402_1%
PCH_SPI_CS# Y14
30 PCH_SPI_CS# SPI_CS0#
PCH_SPI_CS1# T1 HDA_SYNC
30 PCH_SPI_CS1# SPI_CS1#
SPI

P3 PCH_SATALED#
SATALED# PCH_SATALED# 32
This signal has a weak internal pull-down
RH50 XDP@ PCH_JTAG_TCK PCH_SPI_MOSI V4 V14 PCH_GPIO21 On Die PLL VR is supplied by
30 PCH_SPI_MOSI SPI_MOSI SATA0GP / GPIO21
51_0402_5% 1.5V when smapled high
Intel DPDG Rev1.2 requirement. PCH_SPI_MISO U3 P1 BBS_BIT0_R 2 1 +3VS
+5VS 30 PCH_SPI_MISO SPI_MISO SATA1GP / GPIO19 1.8V when sampled low
RH34 10K_0402_5%
@ Needs to be pulled High for Chief River platfrom
B PANTHER-POINT_FCBGA989 B
+3V_PCH
2
G

2 AZ_SYNC_HD_R
SPI ROM FOR ME ( 4MByte )
1 3 1 HDA_SYNC HDA_SYNC RH55 1K_0402_5%
25 AZ_SYNC_HD
RH54 33_0402_5%
S

BSS138_SOT23
1

QH1
RH56
1M_0402_5%

Intel recommend
2

RTC Battery
+RTCBATT
MAX. 8000mil

RH62
CH7
RH65 1K_0402_5%
PCH_SPI_CLK
0_0402_5%
10P_0402_50V8J W=20mils

1
Reserve for EMI DH1

+RTCVCC +CHGRTC

2
A W=20mils W=20mils A
1 BAS40-04_SOT23-3
CH8
1U_0603_10V4Z
2

Remove JDBG1 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (1/8) SATA,HDA,SPI, LPC
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QAL30 LA-8061P MB
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 12 of 46
5 4 3 2 1
5 4 3 2 1

PCH_GPIO11
RH105 10K_0402_5%
SMBCLK +3V_PCH
RH70 2.2K_0402_5%
SMBDATA
UH1B RH72 2.2K_0402_5%
SML0CLK
D PCIE_PRX_GLANTX_N1 BG34 RH77 2.2K_0402_5% D
24 PCIE_PRX_GLANTX_N1 PERN1
24 PCIE_PRX_GLANTX_P1 PCIE_PRX_GLANTX_P1 BJ34 E12 PCH_GPIO11 SML0DATA
CH9 0.1U_0402_10V7K PCIE_PTX_GLANRX_N1_C PERP1 SMBALERT# / GPIO11 RH73 2.2K_0402_5%
10/100/1G LAN ---> 24 PCIE_PTX_GLANRX_N1 AV32 PETN1
CH12 0.1U_0402_10V7K PCIE_PTX_GLANRX_P1_C AU32 H14 SMBCLK SML1CLK
24 PCIE_PTX_GLANRX_P1 PETP1 SMBCLK
MEMORY RH74 2.2K_0402_5%
23 PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_N2 BE34 C9 SMBDATA SML1DATA
PCIE_PRX_WLANTX_P2 PERN2 SMBDATA RH78 2.2K_0402_5%
23 PCIE_PRX_WLANTX_P2 BF34 PERP2
MiniWLAN (Mini Card 1)---> CH13 0.1U_0402_10V7K PCIE_PTX_WLANRX_N2_C BB32
23 PCIE_PTX_WLANRX_N2 PETN2
CH14 0.1U_0402_10V7K PCIE_PTX_WLANRX_P2_C AY32 PCH_HOT#
23 PCIE_PTX_WLANRX_P2 PETP2

SMBUS
A12 DRAMRST_CNTRL_PCH RH75 10K_0402_5%
SML0ALERT# / GPIO60 DRAMRST_CNTRL_PCH 6
BG36 DRAMRST_CNTRL_PCH
PERN3 SML0CLK RH76 1K_0402_1%
BJ36 PERP3 SML0CLK C8
AV34 PETN3
AU34 G12 SML0DATA
PETP3 SML0DATA
BF36 PERN4
BE36 PERP4
AY34 C13 PCH_HOT# CLKIN_DMI2# RH79 10K_0402_5%
PETN4 SML1ALERT# / PCHHOT# / GPIO74 PCH_HOT# 29
BB34 CLKIN_DMI2 RH80 10K_0402_5%
PETP4 SML1CLK CLKIN_DMI# RH81 10K_0402_5%
SML1CLK / GPIO58 E14

PCI-E*
BG37 CLKIN_DMI RH82 10K_0402_5%
PERN5 SML1DATA CLKIN_DOT96# RH83 10K_0402_5%
BH37 PERP5 SML1DATA / GPIO75 M16
AY36 CLKIN_DOT96 RH84 10K_0402_5%
PETN5 CLKIN_SATA# RH85 10K_0402_5%
BB36 PETP5 CLKIN_SATA RH86 10K_0402_5%
BJ38 CLK_PCH_14M RH87 10K_0402_5%
PERN6
BG38 PERP6

Controller
AU36 PETN6 CL_CLK1 M7
AV36 If use extenal CLK gen, please place close to CLK gen
PETP6 else, please place close to PCH

Link
BG40 PERN7 CL_DATA1 T11
BJ40 PERP7
C AY40 C
PETN7
BB40 PETP7 CL_RST1# P10

BE38 PERN8
BC38 PERP8
AW38 PETN8
AY38 PETP8
M10 PCH_GPIO47 10K_0402_5% RH89 +3V_PCH
RH92 0_0402_5% PCIE_LAN# PEG_A_CLKRQ# / GPIO47
24 CLK_PCIE_LAN# Y40 CLKOUT_PCIE0N
10/100/1G LAN ---> RH93 0_0402_5% PCIE_LAN Y39
24 CLK_PCIE_LAN CLKOUT_PCIE0P
CLKOUT_PEG_A_N AB37
RH95 10K_0402_5% LANCLK_REQ# J2

CLOCKS
+3V_PCH PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P AB38
24 LANCLK_REQ#
RH97 0_0402_5% PCIE_WLAN# AB49 AV22 CLK_CPU_DMI#
23 CLK_PCIE_WLAN# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI# 5 +3VS +3VS
RH98 0_0402_5% PCIE_WLAN AB47 AU22 CLK_CPU_DMI
23 CLK_PCIE_WLAN CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI 5
MiniWLAN (Mini Card 1)--->
23 WLANCLK_REQ# WLANCLK_REQ# M1
RH99 10K_0402_5% PCIECLKRQ1# / GPIO18
+3VS CLKOUT_DP_N AM12
CLKOUT_DP_P AM13
AA48 CLKOUT_PCIE2N
AA47 RH102 RH103
CLKOUT_PCIE2P CLKIN_DMI#
CLKIN_DMI_N BF18 2.2K_0402_5% 2.2K_0402_5%
+3V_PCH RH104 10K_0402_5% PCH_GPIO20 V10 BE18 CLKIN_DMI
PCIECLKRQ2# / GPIO20 CLKIN_DMI_P

2
Y37 BJ30 CLKIN_DMI2#
CLKOUT_PCIE3N CLKIN_GND1_N CLKIN_DMI2 SMBCLK
Y36 CLKOUT_PCIE3P CLKIN_GND1_P BG30 6 1 PCH_SMBCLK 10,11,23

+3V_PCH RH107 10K_0402_5% PCH_GPIO25 A8 2N7002DW-T/R7_SOT363-6


PCIECLKRQ3# / GPIO25 CLKIN_DOT96#
CLKIN_DOT_96N G24 QH3A
B E24 CLKIN_DOT96 B
CLKIN_DOT_96P
Y43 CLKOUT_PCIE4N

5
Y45 CLKOUT_PCIE4P
AK7 CLKIN_SATA#
RH109 10K_0402_5% PCH_GPIO26 CLKIN_SATA_N CLKIN_SATA SMBDATA
+3V_PCH L12 PCIECLKRQ4# / GPIO26 CLKIN_SATA_P AK5 3 4 PCH_SMBDATA 10,11,23
2N7002DW-T/R7_SOT363-6
V45 K45 CLK_PCH_14M QH3B
CLKOUT_PCIE5N REFCLK14IN
V46 CLKOUT_PCIE5P

+3V_PCH RH112 10K_0402_5% PCH_GPIO44 L14 H45 CLK_PCI_LPBACK


PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LPBACK 15

AB42 V47 XTAL25_IN


CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT
AB40 CLKOUT_PEG_B_P XTAL25_OUT V49
@ @
RH113 CH25 +3V_PCH RH114 10K_0402_5% PCH_GPIO56 E6
CLK_PCI_LPBACK 2 PEG_B_CLKRQ# / GPIO56
1 1 2
33_0402_5% 22P_0402_50V8J Y47 XCLK_RCOMP +1.05VS_VCCDIFFCLKN
XCLK_RCOMP RH115 90.9_0402_1% +3VS
Reserve for EMI please close to V40 CLKOUT_PCIE6N
UH4 V42 CLKOUT_PCIE6P

+3V_PCH RH116 10K_0402_5% PCH_GPIO45 T13 PCIECLKRQ6# / GPIO45 +3VS

2
XTAL25_IN V38 K43
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64
FLEX CLOCKS

V37 CLKOUT_PCIE7P
XTAL25_OUT F47 RC50 SML1CLK 6 1 PCH_SMLCLK 29
1M_0402_5% RH117 RH119 10K_0402_5% PCH_GPIO46 CLKOUTFLEX1 / GPIO65
+3V_PCH K12 PCIECLKRQ7# / GPIO46 10K_0402_5%
H47 2N7002DW-T/R7_SOT363-6
YH2 CLKOUTFLEX2 / GPIO66
CLK_BCLK_ITP# AK14 QH4A PU AT EC SIDE, +3VS AND 2.2K
CLK_BCLK_ITP CLKOUT_ITPXDP_N
AK13 CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 K49

5
1 1 3 3
A A
GND GND RH122 @ 0_0402_5% PANTHER-POINT_FCBGA989 SML1DATA
7 CLK_RES_ITP# 3 4 PCH_SMLDATA 29
15P_0402_50V8J

15P_0402_50V8J

RH123 @ 0_0402_5%
2 4 7 CLK_RES_ITP 2N7002DW-T/R7_SOT363-6
1 1
CH26 CH27 QH4B
25MHZ_20PF_7V25000016
2 2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (2/8) PCIE, SMBUS, CLK
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 13 of 46
5 4 3 2 1
5 4 3 2 1

29 PCH_ENBKL

2
R398
100K_0402_5%

1
UH1C
UH1D
DMI_CTX_PRX_N0 FDI_CTX_PRX_N0
Pull high at LVDS conn side. PCH_ENBKL
4 DMI_CTX_PRX_N0 BC24 DMI0RXN FDI_RXN0 BJ14 FDI_CTX_PRX_N0 4 J47 L_BKLTEN SDVO_TVCLKINN AP43
4 DMI_CTX_PRX_N1 DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1 M45 AP45
DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1 4 20 PCH_ENVDD L_VDD_EN SDVO_TVCLKINP
4 DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2
DMI2RXN FDI_RXN2 FDI_CTX_PRX_N2 4
4 DMI_CTX_PRX_N3 DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3 P45 AM42
DMI3RXN FDI_RXN3 FDI_CTX_PRX_N3 4 20 PCH_BL_PWM L_BKLTCTL SDVO_STALLN
BC12 FDI_CTX_PRX_N4 AM40
FDI_RXN4 FDI_CTX_PRX_N4 4 SDVO_STALLP
4 DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 BE24 BJ12 FDI_CTX_PRX_N5 T40
DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5 4 20 LCD_EDID_CLK L_DDC_CLK
4 DMI_CTX_PRX_P1 DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6 K47 AP39
DMI1RXP FDI_RXN6 FDI_CTX_PRX_N6 4 20 LCD_EDID_DATA L_DDC_DATA SDVO_INTN
D 4 DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7 AP40 D
DMI2RXP FDI_RXN7 FDI_CTX_PRX_N7 4 SDVO_INTP
4 DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 BJ20 CTRL_CLK T45
DMI3RXP FDI_CTX_PRX_P0 CTRL_DATA L_CTRL_CLK
FDI_RXP0 BG14 FDI_CTX_PRX_P0 4 P39 L_CTRL_DATA
DMI_CRX_PTX_N0 AW24 BB14 FDI_CTX_PRX_P1
4 DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 4
DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2 2 1 LVDS_IBG AF37 P38
4 DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P2 4 LVD_IBG SDVO_CTRLCLK UMA_HDMI_CLK 22
DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3 RH245 2.37K_0402_1% AF36 M39
4 DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P3 4 LVD_VBG SDVO_CTRLDATA UMA_HDMI_DATA 22
DMI_CRX_PTX_N3 AV18 BE12 FDI_CTX_PRX_P4
4 DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4 4

DMI
FDI
BG12 FDI_CTX_PRX_P5 AE48 20K_0402_5%
FDI_RXP5 FDI_CTX_PRX_P5 4 LVD_VREFH
DMI_CRX_PTX_P0 AY24 BJ10 FDI_CTX_PRX_P6 AE47 AT49 1 2
4 DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6 4 LVD_VREFL DDPB_AUXN
DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7 AT47 RH142 @
4 DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 4 DDPB_AUXP
DMI_CRX_PTX_P2 AY18 AT40
4 DMI_CRX_PTX_P2 DMI2TXP DDPB_HPD UMA_HDMI_HPD 22
DMI_CRX_PTX_P3 AU18 LCD_TXCLK- AK39
4 DMI_CRX_PTX_P3 DMI3TXP 20 LCD_TXCLK- LVDSA_CLK#

LVDS
AW16 FDI_INT LCD_TXCLK+ AK40 AV42 UMA_HDMI_TX2-
FDI_INT FDI_INT 4 20 LCD_TXCLK+ LVDSA_CLK DDPB_0N UMA_HDMI_TX2- 22
AV40 UMA_HDMI_TX2+
+1.05VS_PCH DDPB_0P UMA_HDMI_TX2+ 22
BJ24 AV12 FDI_FSYNC0 LCD_TXOUT0- AN48 AV45 UMA_HDMI_TX1-
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4 20 LCD_TXOUT0- LVDSA_DATA#0 DDPB_1N UMA_HDMI_TX1- 22
LCD_TXOUT1- AM47 AV46 UMA_HDMI_TX1+
20 LCD_TXOUT1- LVDSA_DATA#1 DDPB_1P UMA_HDMI_TX1+ 22

Digital Display Interface


DMI_IRCOMP BG25 BC10 FDI_FSYNC1 LCD_TXOUT2- AK47 AU48 UMA_HDMI_TX0-
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 4 20 LCD_TXOUT2- LVDSA_DATA#2 DDPB_2N UMA_HDMI_TX0- 22
RH126 49.9_0402_1% AJ48 AU47 UMA_HDMI_TX0+
LVDSA_DATA#3 DDPB_2P UMA_HDMI_TX0+ 22
RBIAS_CPY BH21 AV14 FDI_LSYNC0 AV47 UMA_HDMI_TXC-
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 4 DDPB_3N UMA_HDMI_TXC- 22
RH127 750_0402_1% LCD_TXOUT0+ AN47 AV49 UMA_HDMI_TXC+
20 LCD_TXOUT0+ LVDSA_DATA0 DDPB_3P UMA_HDMI_TXC+ 22
4mil width and place BB10 FDI_LSYNC1 LCD_TXOUT1+ AM49
FDI_LSYNC1 FDI_LSYNC1 4 20 LCD_TXOUT1+ LVDSA_DATA1
LCD_TXOUT2+ AK49
within 500mil of the PCH 20 LCD_TXOUT2+
AJ47
LVDSA_DATA2
P46
LVDSA_DATA3 DDPC_CTRLCLK
DDPC_CTRLDATA P42
A18 DSWODVREN
DSWVRMEN
AF40 LVDSB_CLK#
AF39 AP47

System Power Management


PAD T1710 PCH_DPWROK RH128 0_0402_5% PCH_RSMRST# LVDSB_CLK DDPC_AUXN
C12 SUSACK# DPWROK E22 DDPC_AUXP AP49
AH45 LVDSB_DATA#0 DDPC_HPD AT38
AH47 LVDSB_DATA#1
XDP_DBRESET#_R K3 B9 PCIE_WAKE# PCIE_WAKE# 23,24 AF49 AY47
SYS_RESET# WAKE# LVDSB_DATA#2 DDPC_0N
AF45 LVDSB_DATA#3 DDPC_0P AY49
DDPC_1N AY43
SYSTEM_PWROK P12 N3 PM_CLKRUN# AH43 AY45
SYS_PWROK CLKRUN# / GPIO32 PM_CLKRUN# 28 LVDSB_DATA0 DDPC_1P
C
AH49 LVDSB_DATA1 DDPC_2N BA47 C
AF47 LVDSB_DATA2 DDPC_2P BA48
29 PCH_PWROK L22 G8 SUS_STAT# T1701 PAD AF43 BB47
PWROK SUS_STAT# / GPIO61 LVDSB_DATA3 DDPC_3N
DDPC_3P BB49

APWROK L10 N14


APWROK SUSCLK / GPIO62 SUS_CK 29
RH132 0_0402_5% PCH_CRT_B N48 M43
21 PCH_CRT_B CRT_BLUE DDPD_CTRLCLK
T1702 PAD PCH_CRT_G P49 M36
21 PCH_CRT_G CRT_GREEN DDPD_CTRLDATA
B13 D10 PM_SLP_S5# PCH_CRT_R T49
5 PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 PM_SLP_S5# 29 21 PCH_CRT_R CRT_RED
T1703 PAD AT45
DDPD_AUXN

CRT
29 PCH_RSMRST# C21 H4 PM_SLP_S4# PCH_CRT_CLK T39 AT43
RSMRST# SLP_S4# PM_SLP_S4# 29 21 PCH_CRT_CLK CRT_DDC_CLK DDPD_AUXP
PCH_CRT_DATA M40 BH41
21 PCH_CRT_DATA CRT_DDC_DATA DDPD_HPD
T1704 PAD
SUSWARN# K16 F4 PM_SLP_S3# 33_0402_5% BB43
SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# PM_SLP_S3# 29 DDPD_0N
21 PCH_CRT_HSYNC R286 2 1PCH_CRT_HSYNC_R M47 BB45
CRT_HSYNC DDPD_0P
21 PCH_CRT_VSYNC R288 2 1PCH_CRT_VSYNC_R M49 CRT_VSYNC DDPD_1N BF44
29 PBTN_OUT# PBTN_OUT#_R E20 G10 PM_SLP_A# T1724 PAD 33_0402_5% BE44
RH137 0_0402_5% PWRBTN# SLP_A# DDPD_1P
DDPD_2N BF42
DH2 CRT_IREF T43 BE42
DAC_IREF DDPD_2P
29,36 ACIN 1 2 AC_PRESENT_R H20 G16 PM_SLP_SUS# T1705 PAD Can be left NC when IAMT is T42 BJ42
ACPRESENT / GPIO31 SLP_SUS# CRT_IRTN DDPD_3N
not support on the platfrom DDPD_3P BG42
RB751V-40_SOD323-2 T1706 PAD
PCH_GPIO72 E10 AP14 H_PM_SYNC PANTHER-POINT_FCBGA989
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC 5
RH138
1K_0402_0.5%
RI# A10 K14 PCH_GPIO29
RI# SLP_LAN# / GPIO29

PANTHER-POINT_FCBGA989
Check EC for S3 S4 LED

B B

+3VS
+3VS
R368 1 2 2.2K_0402_5% CTRL_CLK
RH294 1 2 2.2K_0402_5% PCH_CRT_CLK
+3VS R369 1 2 2.2K_0402_5% CTRL_DATA
RH295 1 2 2.2K_0402_5% PCH_CRT_DATA
5

UH5 R394 1 2 2.2K_0402_5% LCD_EDID_CLK


2 +RTCVCC
P

29,42 VGATE B
4 SYSTEM_PWROK R393 1 2 2.2K_0402_5% LCD_EDID_DATA
Y SYSTEM_PWROK 5
PCH_PWROK 1 RH135 1 2 150_0402_1% PCH_CRT_B
A
G

DSWODVREN RH150 330K_0402_5% R395 1 2 2.2K_0402_5% UMA_HDMI_CLK


NC7SZ08P5X_NL_SC70-5 RH136 1 2 150_0402_1% PCH_CRT_G
3

DSWODVREN RH151 @ 330K_0402_5% R396 1 2 2.2K_0402_5% UMA_HDMI_DATA


RH139 1 2 150_0402_1% PCH_CRT_R

* ::
DSWODVREN - On Die DSW VR Enable
H Enable
L Disable
+3V_PCH

PCH_GPIO72 RH155 10K_0402_5%

RI# RH157 10K_0402_5%

PCIE_WAKE# RH159 10K_0402_5% +3VS

AC_PRESENT_R RH161 330K_0402_5%

SUSWARN# RH234 10K_0402_5%


RH256
PCH_GPIO29 @ RH162 10K_0402_5% 8.2K_0402_5%
A A
+3VS

XDP_DBRESET#_R RH156 1K_0402_5% PM_CLKRUN#

RH160
SYSTEM_PWROK RH168 10K_0402_5% 10K_0402_5%

PCH_RSMRST# RH163 10K_0402_5%


@ Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (3/8) DMI,FDI,PM,GFX,DP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 14 of 46
5 4 3 2 1
5 4 3 2 1

UH1E

RSVD1 AY7
RSVD2 AV7
BG26 TP1 RSVD3 AU3
BJ26 TP2 RSVD4 BG4
BH25
BJ16
TP3
AT10
GPIO19 => BBS_BIT0
TP4 RSVD5
BG16
AH38
TP5 RSVD6 BC8 GPIO51 => BBS_BIT1
TP6
AH37 TP7 RSVD7 AU2 Boot BIOS Strap
AK43 TP8 RSVD8 AT4
AK45 TP9 RSVD9 AT3 BBS_BIT0 BBS_BIT1 Boot BIOS
C18 TP10 RSVD10 AT1 Location
N30 TP11 RSVD11 AY3
D
H3 TP12 RSVD12 AT5 0 0 LPC D
AH12 TP13 RSVD13 AV3
AM4 TP14 RSVD14 AV1 0 1 Reserved(NAND)
AM5 TP15 RSVD15 BB1
Y13 TP16 RSVD16 BA3 1 0 Reserved
K24 TP17 RSVD17 BB5
L24 TP18 RSVD18 BB3 1 1 SPI *
AB46 TP19 RSVD19 BB7
AB45 TP20 RSVD20 BE8

RSVD
RSVD21 BD4
RSVD22 BF6

B21 AV5 NV_ALE


TP21 RSVD23
M20 TP22 RSVD24 AV10
AY16 TP23
Intel Anti-Theft Techonlogy
BG46 TP24 RSVD25 AT8
High=Endabled
RSVD26 AY5 NV_ALE
USB3.0 Port0 Low=Disable(floating)
33 USB3_RX0_N BE28 USB3Rn1
RSVD27 BA2
*
Port 0 : Left USB3.0 33 USB3_RX1_N BC30 USB3Rn2 RSVD28 AT12
+1.8VS
BE32 USB3Rn3 RSVD29 BF3
BJ32 USB3Rn4
USB3.0 Port1 33 USB3_RX0_P BC28 NV_ALE @ RH164 1K_0402_5%
USB3Rp1
BE30
Port 1 : Left USB3.0 with e-SATA
33 USB3_RX1_P
BF32
USB3Rp2
USB3Rp3 USB20_N0
Reserved for USB3.0
BG32 USB3Rp4 USBP0N C24 USB20_N0 33
AV26 A24 USB20_P0 USB3.0 Port0 for 2.0 Port 0 : Left USB3.0
33 USB3_TX0_N USB3Tn1 USBP0P USB20_P0 33
BB26 C25 USB20_N1
33 USB3_TX1_N USB3Tn2 USBP1N USB20_N1 33
AU28 B25 USB20_P1 USB3.0 Port1 for 2.0 Port 1 : Left USB3.0 with e-SATA
USB3Tn3 USBP1P USB20_P1 33
AY30 USB3Tn4 USBP2N C26
33 USB3_TX0_P AU26 USB3Tp1 USBP2P A26 USB3.0 Port2 for 2.0
33 USB3_TX1_P AY26 USB3Tp2 USBP3N K28
C C
AV28 USB3Tp3 USBP3P H28
USB20_N4
USB3.0 Port3 for 2.0
AW30 USB3Tp4 USBP4N E28 USB20_N4 26
D28 USB20_P4 Port 4 : RHS SB USB2.0
USBP4P USB20_P4 26
USBP5N C28
USBP5P A28
USBP6N C29
USBP6P B29
PCI_PIRQA# K40 N28 +3V_PCH
PCI_PIRQB# PIRQA# USBP7N
K38 PIRQB# USBP7P M28

PCI
PCI_PIRQC# H38 L30 RPH1
PCI_PIRQD# PIRQC# USBP8N USB_OC0#
G38 PIRQD# USBP8P K30 4 5
G30 USB20_N9 Port 9 : RHS SB USB2.0 3 6
USBP9N USB20_N9 26
PCH_GPIO50 C46 E30 USB20_P9 USB_OC7# 2 7
REQ1# / GPIO50 USBP9P USB20_P9 26

USB
PCH_GPIO52 C44 C30 USB20_N10 USB_OC5# 1 8
REQ2# / GPIO52 USBP10N USB20_N10 20
PCH_GPIO54 E40 A30 USB20_P10 Port 10 : Int. Carema
REQ3# / GPIO54 USBP10P USB20_P10 20
L32 USB20_N11 10K_1206_8P4R_5%
USBP11N USB20_N11 26
PCH_GPIO51 D47 K32 USB20_P11 Port 11 : Card Reader RPH2
GNT1# / GPIO51 USBP11P USB20_P11 26
PCH_GPIO53 E42 G32 USB_OC1# 4 5
PCH_GPIO55 GNT2# / GPIO53 USBP12N USB_OC4#
F46 GNT3# / GPIO55 USBP12P E32 3 6
C32 USB20_N13 USB_OC3# 2 7
USBP13N USB20_N13 23
A32 USB20_P13 Port 13 : BT USB_OC6# 1 8
USBP13P USB20_P13 23
PCH_GPIO2 G42
PCH_GPIO3 PIRQE# / GPIO2 10K_1206_8P4R_5%
PCH_GPIO4
G40 PIRQF# / GPIO3 USBRBIAS
Within 500 mils
C42 PIRQG# / GPIO4 USBRBIAS# C33
PCH_GPIO5 D44 RH165 22.6_0402_1%
PIRQH# / GPIO5
B33 USB_OC4#
PAD T1834 @ USBRBIAS RC18 0_0402_5%
K10 PME#
PCH_PLTRST# C6 A14 USB_OC0# (For USB Port0, 1) USB_OC2#
PLTRST# OC0# / GPIO59 USB_OC0# 29,33
K20 USB_OC1# RC9
OC1# / GPIO40 USB_OC2# 10K_0402_5%
OC2# / GPIO41 B17
B CLK_PCI_LPBACK RH166 22_0402_5% CLK_PCI0 H49 C16 USB_OC3# @ B
13 CLK_PCI_LPBACK CLKOUT_PCI0 OC3# / GPIO42
CLK_PCI_LPC RH167 22_0402_5% CLK_PCI1 H43 L16 USB_OC4#
29 CLK_PCI_LPC CLKOUT_PCI1 OC4# / GPIO43 USB_OC4# 26,29
CLK_PCI_TPM R285 22_0402_5% CLK_PCI2 J48 A16 USB_OC5#
28 CLK_PCI_TPM CLKOUT_PCI2 OC5# / GPIO9
PAD T1835 @ CLK_PCI3 K42 D14 USB_OC6#
PAD T1833 @ CLK_PCI4 CLKOUT_PCI3 OC6# / GPIO10 USB_OC7#
H40 CLKOUT_PCI4 OC7# / GPIO14 C14

PANTHER-POINT_FCBGA989

+3VS

RPH3 RH170 0_0402_5%


PCH_GPIO55 1 8 +3VS +3VS
PCI_PIRQB# 2 7
PCI_PIRQD# 3 6 @ CH30
PCI_PIRQC# 4 5 RH171 @
10K_0402_5% 0.1U_0402_16V4Z
5

8.2K_0804_8P4R_5% UH6
VCC

RPH4 1 PCH_PLTRST#
PCH_GPIO51 IN1
1 8 5,23,24,28,29 PLT_RST# 4 OUT
PCH_GPIO5 2 7 2
GND

PCH_GPIO52 IN2
3 6
PCH_GPIO2 4 5
@
3

8.2K_0804_8P4R_5% MC74VHC1G08DFT2G_SC70-5

RPH5
PCH_GPIO53 1 8
PCI_PIRQA# 2 7
PCH_GPIO4 3 6 RH173
A PCH_GPIO3 4 5 100K_0402_5% A

8.2K_0804_8P4R_5%

PCH_GPIO50 RH175 10K_0402_5%

PCH_GPIO54 RH176 10K_0402_5%


Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (4/8) PCI, USB, NVRAM
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 15 of 46
5 4 3 2 1
5 4 3 2 1

+3VS

10K_0402_5% PCH_GPIO0
RH177
10K_0402_5% @ PCH_GPIO36 UH1F
RH178
10K_0402_5% PCH_GPIO16 PCH_GPIO0 T7 C40 PCH_GPIO68
RH179 BMBUSY# / GPIO0 TACH4 / GPIO68
DMI Termination Voltage
10K_0402_5% PCH_GPIO34 PCH_GPIO1 A42 B41 PID0
RH180 TACH1 / GPIO1 TACH5 / GPIO69
Set to Vcc when HIGH
10K_0402_5% KB_RST# PCH_GPIO6 H36 C41 PID1 +3VS NV_CLE
RH184 TACH2 / GPIO6 TACH6 / GPIO70
Set to Vss when LOW
10K_0402_5% PCH_GPIO48 29 EC_SCI# EC_SCI# E38 A40 PID2
D TACH3 / GPIO7 TACH7 / GPIO71 D
RH181 Weak internal
10K_0402_5% PCH_GPIO22 29 PCH_SMI# PCH_SMI# C10 GPIO8
@ RH182 PU,Do not pull low+1.8VS
RH185 10K_0402_5%
10K_0402_5% PCH_GPIO68 PCH_GPIO12 C4
RH183 LAN_PHY_PWR_CTRL / GPIO12
10K_0402_5% PCH_GPIO17 EC_LID_OUT# G2 P4 A20M#
29 EC_LID_OUT# GPIO15 A20GATE
RH186 RH187
10K_0402_5% EC_SCI# AU16 PCH_PECI_R @ 2.2K_0402_5%
PECI H_PECI 5,29
RH208 PCH_GPIO16 U2 0_0402_5% RH188
SATA4GP / GPIO16 NV_CLE
RCIN# P5 KB_RST# 29 H_SNB_IVB# 5
1K_0402_5% RH189

GPIO
PCH_GPIO17 D40 AY11
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD 5
CLOSE TO THE BRANCHING POINT

CPU/MISC
PCH_GPIO1 PCH_GPIO22 T5 AY10 H_THERMTRIP#_C H_THERMTRIP# H_THERMTRIP# 5
10K_0402_5% RH190 SCLOCK / GPIO22 THRMTRIP# 390_0402_5% RH191
@ PCH_GPIO35 E8 T14
10K_0402_5% RH192 GPIO24 INIT3_3V#
PCH_GPIO38 PCH_GPIO27 E16 AY1 NV_CLE INIT3_3V
10K_0402_5% RH193 GPIO27 DF_TVS
PCH_GPIO39 PCH_GPIO28 P8 This signal has weak internal
10K_0402_5% RH194 GPIO28
TS_VSS1 AH8 PU, can't pull low
PCH_GPIO49 PCH_GPIO34 K1
10K_0402_5% RH195 STP_PCI# / GPIO34
TS_VSS2 AK11
PCH_GPIO6 PCH_GPIO35 K4
10K_0402_5% RH197 GPIO35
TS_VSS3 AH10
PCH_GPIO36 V8 SATA2GP / GPIO36
TS_VSS4 AK10
PCH_GPIO37 M5 SATA3GP / GPIO37
PCH_GPIO38 N2 P37
+3V_PCH SLOAD / GPIO38 NC_1
PCH_GPIO39 M3
C 10K_0402_5% PCH_GPIO28 SDATAOUT0 / GPIO39 C
RH202 PCH_GPIO48 V13 BG2
10K_0402_5% PCH_GPIO57 SDATAOUT1 / GPIO48 VSS_NCTF_15
RH203 PCH_GPIO49 V3 BG48
1K_0402_5% 2 EC_LID_OUT# SATA5GP / GPIO49 / TEMP_ALERT# VSS_NCTF_16 RH301 PID2
1
RH204 PCH_GPIO57 D6 BH3 10K_0402_5%
10K_0402_5% PCH_SMI# GPIO57 VSS_NCTF_17
RH205 BH47
10K_0402_5% PCH_GPIO12 VSS_NCTF_18 RH303 PID1
RH207 A4 BJ4 10K_0402_5%
VSS_NCTF_1 VSS_NCTF_19
A44 VSS_NCTF_2 VSS_NCTF_20 BJ44
@ PCH_GPIO27 RH305 PID0
RH199 10K_0402_5% A45 BJ45 10K_0402_5%
PCH_GPIO36 VSS_NCTF_3 VSS_NCTF_21

NCTF
RH200 10K_0402_5% A46 BJ46
PCH_GPIO37 VSS_NCTF_4 VSS_NCTF_22
RH198 100K_0402_5% A5 BJ5
VSS_NCTF_5 VSS_NCTF_23
A6 BJ6

GPIO36/37 B3
VSS_NCTF_6 VSS_NCTF_24
C2 PID : 210

*
VSS_NCTF_7 VSS_NCTF_25
When Unused as GPIO or SATA*GP -
Use 8.2K-10K pull-down to ground.
B47

BD1
VSS_NCTF_8 VSS_NCTF_26 C48

D1
QAL30 000 (UMA)
VSS_NCTF_9 VSS_NCTF_27
BD49 VSS_NCTF_10 VSS_NCTF_28 D49 QAL31 001 (DIS)
BE1 E1

B
GPIO28
On-Die PLL Voltage Regulator BE49
VSS_NCTF_11

VSS_NCTF_12
VSS_NCTF_29

VSS_NCTF_30 E49
QAL50 010 (UMA) B
This signal has a weak internal pull up

* H
L

:On-Die voltage regulator enable
On-Die PLL Voltage Regulator disable
BF1

BF49
VSS_NCTF_13 VSS_NCTF_31 F1

F49
QAL51 011 (DIS)
VSS_NCTF_14 VSS_NCTF_32
PCH_GPIO28
PANTHER-POINT_FCBGA989
KSPD
@ RH206 1K_0402_5%
Q0000 1XX
PCH_GPIO28 needs to be connected to XDP_FN8
PCH_GPIO35 needs to be connected to XDP_FN9
PCH_GPIO15 needs to be connected to XDP_FN16

Please refer to Huron River Debug Board DG 1.2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (5/8) GPIO, CPU, MISC
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 16 of 46
5 4 3 2 1
5 4 3 2 1

+3VS
To solve CRT issue
L13 PCH Power Rail Table
+VCCADAC 1 2 2 1
+V1.05S_VCCP +1.05VS_PCH 1 1 1 R103 BLM18PG181SN1D_2P Refer to CPU EDS R1.5

.01U_0402_16V7K
C287

0.1U_0402_10V7K
C294
2.2_0603_1%
UH1G POWER C289
10U_0603_6.3V6M
S0 Iccmax
Voltage Rail Voltage Current (A)
@ PJPH1 1300mA 2 2 2
1 2 AA23 1mA VCCADAC U48
1 2 VCCCORE[1]
AC23 VCCCORE[2]
V_PROC_IO 1.05 0.001

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
JUMP_43X118 1 AD21

CRT
VCCCORE[3]
AD23 VCCCORE[4] VSSADAC U47

CH31

CH33

CH34
CH32 AF21 V5REF 5 0.001

VCC CORE
10U_0805_6.3V6M VCCCORE[5]
AF23 VCCCORE[6]
D 2 AG21 R332 +3VS D
VCCCORE[7]
AG23 VCCCORE[8]
0_0603_5% V5REF_Sus 5 0.001
AG24 AK36 +VCCALVDS 1 2
VCCCORE[9] 1mAVCCALVDS
AG26
VCCCORE[10] +1.8VS
AG27
VCCCORE[11] VSSALVDS
AK37 Vcc3_3 3.3 0.228
AG29 L21
VCCCORE[12] 0.1UH_MLF1608DR10KT_10%_1608
AJ23
VCCCORE[13]

LVDS
AJ26 AM37 +VCCTX_LVDS 2 1 VccADAC 3.3 0.001
VCCCORE[14] VCCTX_LVDS[1]
AJ27 1 0.1uH inductor, 200mA
+1.05VS_PCH VCCCORE[15]
AJ29 AM38
VCCCORE[16] VCCTX_LVDS[2]
AJ31 VCCCORE[17]
C296 C297 C295 VccADPLLA 1.05 0.075
40mAVCCTX_LVDS[3] AP36 .01U_0402_16V7K .01U_0402_16V7K 22U_0805_6.3V6M
2

VCCTX_LVDS[4]
AP37 VccADPLLB 1.05 0.075
AN19
VCCIO[28]
VccCore 1.05 1.3
BJ22
VCCAPLLEXP RH211
V33 +3VS_VCC3_3_6 +3VS VccDMI 1.05 0.042
VCC3_3[6]

HVCMOS
AN16 0_0805_5%
VCCIO[15]
AN17 VCCIO[16]
VccIO 1.05 3.709
V34 CH42
VCC3_3[7]
0.1U_0402_10V7K
AN21 VCCIO[17]
VccASW 1.05 0.903
AN26
VCCIO[18]
VccSPI 3.3 0.01
AN27 VCCIO[19]
3709mA VCCVRM[3] AT16 +1.5VS
+1.05VS_PCH
160mil AP21 +VCCP_VCCDMI +V1.05S_VCCP VccDSW 3.3 0.001
C VCCIO[20] RH213 C
AP23 AT20 +VCCP_VCCDMI
VCCIO[21] VCCDMI[1]
VccDFTERM 1.8 0.002

DMI
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1 AP24 0_0805_5%
VCCIO[22] RH214

VCCIO
+1.05VS_PCH CH48
CH44

CH45

CH46

CH47

+3VS CH43 AP26 75mA VCCCLKDMI AB36 +1.05VS_VCC_DMI_CCI VccRTC 3.3 6 uA


10U_0805_6.3V6M VCCIO[23] 1U_0402_6.3V6K
2 AT24 0_0805_5%
VCCIO[24] CH49 VccSus3_3 3.3 0.065
1U_0402_6.3V6K
AN33 VCCIO[25]
RH215 VccSusHDA 3.3 / 1.5 0.01
0_0805_5% AN34 VCCIO[26] VCCDFTERM[1] AG16

VccVRM 1.8 / 1.5 0.167


+3VS_VCCA3GBG BH29 AG17
VCC3_3[3] 2mA VCCDFTERM[2] +1.8VS

DFT / SPI

0.1U_0402_10V7K
CH50 VccCLKDMI 1.05 0.075
AJ16
0.1U_0402_10V7K VCCDFTERM[3]

CH51
+1.5VS AP16
VCCVRM[2]
VccSSC 1.05 0.095
AJ17
VCCDFTERM[4]
BG6
VccAFDIPLL
VccDIFFCLKN 1.05 0.055

+1.05VS_PCH AP17 VCCIO[27]


@ VccALVDS 3.3 0.001
10mA VCCSPI V1 1 2
FDI

+3V_PCH
RH219 0_0805_5%
+VCCP_VCCDMI AU20
VCCDMI[2]
VccTX_LVDS 1.8 0.04
2 1 +3VS
CH53 RH220 0_0603_5%
B PANTHER-POINT_FCBGA989 1U_0402_6.3V6K B

Intel recommand
VCCVRM==>1.5V FOR MOBILE

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (6/8) PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, November 11, 2011 Sheet 17 of 46
5 4 3 2 1
5 4 3 2 1

+5VALW +5V_PCH
This pin can be left as no connect in
@ JPH1
On-Die VR enabled mode (default). 2 1

PAD T73 @ +VCCACLK PAD-OPEN 2x2m


R378
+3VALW 0_0603_5% UH1J POWER
1 2 QH6
AD49 N26 +1.05VS_PCH AO3413_SOT23
VCCACLK VCCIO[29]

D
3 1

0.1U_0402_10V7K~D
CH55 P26
VCCIO[30]

20K_0402_5%~D
0.1U_0402_10V7K +VCCPDSW T16 VCCDSW3_33mA

1
D CH56 D

G
P28 1

2
VCCIO[31]

RH228
@ 1U_0402_6.3V6K

CH57
2 1 +PCH_VCCDSW V12 T27
CH58 0.1U_0402_10V7K DCPSUSBYP VCCIO[32]
34 PCH_PWR_EN# 2
T29

2
+3VS_VCC_CLKF33 VCCIO[33]
This pin can be left as no connect in T38 VCC3_3[5]
On-Die VR enabled mode (default). T23 +3V_PCH
119mA VCCSUS3_3[7]

0.1U_0402_10V7K
PAD T76 @ +VCCAPLL_CPY_PCH BH23 VCCAPLLDMI2
T24 +3V_PCH
VCCSUS3_3[8] +5V_PCH +3V_PCH

0.1U_0402_10V7K
+1.05VS_PCH AL29 VCCIO[14]

CH60
V23
VCCSUS3_3[9]

USB

2
CH61
PAD T77 @ +VCCSUS1 AL24 V24
DCPSUS[3] VCCSUS3_3[10] RH232 DH3
+3VS RH239 0_0805_5% 100_0402_5%
+3VS_VCC_CLKF33
This pin can be left as no connect in VCCSUS3_3[6]
P24 RB751S40T1_SOD523-2
On-Die VR enabled mode (default).
10U_0805_10V4Z

1U_0402_6.3V6K

AA19

1
VCCASW[1] +PCH_V5REF_SUS
VCCIO[34] T26 +1.05VS_PCH
CH73

CH74

AA21
VCCASW[2]
903mA
AA24 M26 +PCH_V5REF_SUS CH63
VCCASW[3] 1mA V5REF_SUS .1U_0603_25V7K
1 1
AA26 This pin can be left as no connect in

Clock and Miscellaneous


CH64 CH65 VCCASW[4] +VCCA_USBSUS @ T78 PAD
AN23
22U_0805_6.3V6M 22U_0805_6.3V6M AA27
DCPSUS[4] On-Die VR enabled mode (default).
2 2 VCCASW[5] +3V_VCCPSUS
AN24
VCCSUS3_3[1] CH66
AA29
VCCASW[6] 0.1U_0402_10V7K
+1.05VS_PCH AA31 +5VS +3VS
VCCASW[7]
60mil +PCH_V5REF_RUN
AC26 P34
VCCASW[8] 1mA V5REF

2
C C

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
RH236
AC27 0_0603_5% RH237 DH4
VCCASW[9]
CH67

CH68

CH69
N20 +3V_VCCPSUS 100_0402_5% RB751S40T1_SOD523-2
VCCSUS3_3[2] +3V_PCH

PCI/GPIO/LPC
AC29 VCCASW[10]
N22

1
VCCSUS3_3[3] CH70 +PCH_V5REF_RUN
AC31
VCCASW[11] 1U_0402_6.3V6K +3VS
VCCSUS3_3[4] P20
AD29
VCCASW[12] +3VS_VCCPCORE CH71
VCCSUS3_3[5] P22
AD31 RH238 0_0805_5% 1U_0603_10V6K
LH7 VCCASW[13]
10UH_LBR2012T100M_20% W21 AA16 CH72
+1.05VS_VCCA_A_DPL VCCASW[14] VCC3_3[1] 0.1U_0402_10V7K
1 2
W23 W16 +3VS
VCCASW[15] VCC3_3[8]
220U_B2_2.5VM_R35

1 2 +1.05VS_VCCA_B_DPL W24 T34 +3VS_VCCPPCI


+1.05VS_PCH VCCASW[16] VCC3_3[4]
220U_B2_2.5VM_R35

LH8 RH240 0_0603_5%


1U_0402_6.3V6K

1U_0402_6.3V6K

10UH_LBR2012T100M_20% 1 1 W26
VCCASW[17] CH75
+ + +3VS
CH93

CH95

W29 0.1U_0402_10V7K
VCCASW[18]
CH94

CH96

RH241
W31 AJ2 +VCC3_3_2
2 2 VCCASW[19] VCC3_3[2] +1.05VS_SATA3
W33 0_0603_5% RH242
VCCASW[20] CH76
AF13 +1.05VS_PCH
VCCIO[5] 0.1U_0402_10V7K
+VCCRTCEXT N16 0_0805_5%
DCPRTC CH77
AH13
VCCIO[12] 1U_0402_6.3V6K
CH78 Y49 AH14 +1.05VS_SATA3
+1.5VS VCCVRM[4] VCCIO[13]
0.1U_0402_10V7K

B +1.05VS_PCH AF14 B
+1.05VS_VCCA_A_DPL VCCIO[6]
BD47 VCCADPLLA75mA

SATA
+VCCDIFFCLK AK1 This pin can be left as no connect in
RH244 0_0603_5% +1.05VS_VCCA_B_DPL VCCAPLLSATA @ T19
BF47 VCCADPLLB75mA
CH79 On-Die VR enabled mode (default).
AF11 +1.5VS
1U_0402_6.3V6K VCCVRM[1] +1.05VS_VCC_SATA
AF17
+1.05VS_PCH +1.05VS_VCCDIFFCLKN VCCIO[7] RH246
AF33
VCCDIFFCLKN[1] +1.05VS_VCC_SATA
AF34
VCCDIFFCLKN[2]
55mA VCCIO[2]
AC16 +1.05VS_PCH
+1.05VS_VCCDIFFCLKN AG34 VCCDIFFCLKN[3]

1U_0402_6.3V6K
RH247 0_0603_5% AC17 0_0805_5%
VCCIO[3]

CH82
CH81 AG33 AD17
1U_0402_6.3V6K VCCSSC95mA VCCIO[4]
+1.05VS_PCH CH85
+VCCSST V16 +1.05VS_PCH
0.1U_0402_10V7K DCPSST
PAD T74 @ +1.05VM_VCCSUS
This pin can be left as no connect in T17
DCPSUS[1] VCCASW[22]
T21
CH84 V19
1U_0402_6.3V6K On-Die VR enabled mode (default). DCPSUS[2]
MISC

+V1.05S_VCCP 40mil
VCCASW[23] V21
0.1U_0402_10V7K

0.1U_0402_10V7K

CPU

+V_CPU_IO BJ8 1mA


RH249 0_0603_5% V_PROC_IO
T19
VCCASW[21]
+RTCVCC
CH87

CH88

CH86
4.7U_0603_6.3V6K
A22 P32 +VCCSUSHDA
RTC

VCCRTC 10mA VCCSUSHDA +3V_PCH


0.1U_0402_10V7K

0.1U_0402_10V7K

1U_0402_6.3V6K

0.1U_0402_10V7K
HDA

RH250 0_0402_5%

PANTHER-POINT_FCBGA989
A A
CH89

CH90

CH91

CH92

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (7/8) PWR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 18 of 46
5 4 3 2 1
5 4 3 2 1

UH1I

AY4 H46
VSS[159] VSS[259]
AY42 VSS[160] VSS[260] K18
AY46 K26
UH1H VSS[161] VSS[261]
AY8 VSS[162] VSS[262] K39
D D
H5 VSS[0] B11 VSS[163] VSS[263] K46
B15 VSS[164] VSS[264] K7
AA17 VSS[1] VSS[80] AK38 B19 VSS[165] VSS[265] L18
AA2 AK4 B23 L2
VSS[2] VSS[81] VSS[166] VSS[266]
AA3 AK42 B27 L20
VSS[3] VSS[82] VSS[167] VSS[267]
AA33 VSS[4] VSS[83] AK46 B31 VSS[168] VSS[268] L26
AA34 AK8 B35 L28
VSS[5] VSS[84] VSS[169] VSS[269]
AB11 VSS[6] VSS[85] AL16 B39 VSS[170] VSS[270] L36
AB14 VSS[7] VSS[86] AL17 B7 VSS[171] VSS[271] L48
AB39 AL19 F45 M12
VSS[8] VSS[87] VSS[172] VSS[272]
AB4 VSS[9] VSS[88] AL2 BB12 VSS[173] VSS[273] P16
AB43 AL21 BB16 M18
VSS[10] VSS[89] VSS[174] VSS[274]
AB5 VSS[11] VSS[90] AL23 BB20 VSS[175] VSS[275] M22
AB7 AL26 BB22 M24
VSS[12] VSS[91] VSS[176] VSS[276]
AC19 AL27 BB24 M30
VSS[13] VSS[92] VSS[177] VSS[277]
AC2 AL31 BB28 M32
VSS[14] VSS[93] VSS[178] VSS[278]
AC21 VSS[15] VSS[94] AL33 BB30 VSS[179] VSS[279] M34
AC24 AL34 BB38 M38
VSS[16] VSS[95] VSS[180] VSS[280]
AC33 VSS[17] VSS[96] AL48 BB4 VSS[181] VSS[281] M4
AC34 AM11 BB46 M42
VSS[18] VSS[97] VSS[182] VSS[282]
AC48 AM14 BC14 M46
VSS[19] VSS[98] VSS[183] VSS[283]
AD10 AM36 BC18 M8
VSS[20] VSS[99] VSS[184] VSS[284]
AD11 VSS[21] VSS[100] AM39 BC2 VSS[185] VSS[285] N18
AD12 VSS[22] VSS[101] AM43 BC22 VSS[186] VSS[286] P30
AD13 AM45 BC26 N47
VSS[23] VSS[102] VSS[187] VSS[287]
AD19 VSS[24] VSS[103] AM46 BC32 VSS[188] VSS[288] P11
AD24 AM7 BC34 P18
VSS[25] VSS[104] VSS[189] VSS[289]
AD26 AN2 BC36 T33
VSS[26] VSS[105] VSS[190] VSS[290]
AD27 VSS[27] VSS[106] AN29 BC40 VSS[191] VSS[291] P40
AD33 VSS[28] VSS[107] AN3 BC42 VSS[192] VSS[292] P43
AD34 AN31 BC48 P47
VSS[29] VSS[108] VSS[193] VSS[293]
AD36 AP12 BD46 P7
C VSS[30] VSS[109] VSS[194] VSS[294] C
AD37 VSS[31] VSS[110] AP19 BD5 VSS[195] VSS[295] R2
AD38 AP28 BE22 R48
VSS[32] VSS[111] VSS[196] VSS[296]
AD39 AP30 BE26 T12
VSS[33] VSS[112] VSS[197] VSS[297]
AD4 VSS[34] VSS[113] AP32 BE40 VSS[198] VSS[298] T31
AD40 VSS[35] VSS[114] AP38 BF10 VSS[199] VSS[299] T37
AD42 AP4 BF12 T4
VSS[36] VSS[115] VSS[200] VSS[300]
AD43 VSS[37] VSS[116] AP42 BF16 VSS[201] VSS[301] W34
AD45 AP46 BF20 T46
VSS[38] VSS[117] VSS[202] VSS[302]
AD46 VSS[39] VSS[118] AP8 BF22 VSS[203] VSS[303] T47
AD8 AR2 BF24 T8
VSS[40] VSS[119] VSS[204] VSS[304]
AE2 VSS[41] VSS[120] AR48 BF26 VSS[205] VSS[305] V11
AE3 AT11 BF28 V17
VSS[42] VSS[121] VSS[206] VSS[306]
AF10 VSS[43] VSS[122] AT13 BD3 VSS[207] VSS[307] V26
AF12 AT18 BF30 V27
VSS[44] VSS[123] VSS[208] VSS[308]
AD14 AT22 BF38 V29
VSS[45] VSS[124] VSS[209] VSS[309]
AD16 AT26 BF40 V31
VSS[46] VSS[125] VSS[210] VSS[310]
AF16 AT28 BF8 V36
VSS[47] VSS[126] VSS[211] VSS[311]
AF19 AT30 BG17 V39
VSS[48] VSS[127] VSS[212] VSS[312]
AF24 AT32 BG21 V43
VSS[49] VSS[128] VSS[213] VSS[313]
AF26 VSS[50] VSS[129] AT34 BG33 VSS[214] VSS[314] V7
AF27 AT39 BG44 W17
VSS[51] VSS[130] VSS[215] VSS[315]
AF29 AT42 BG8 W19
VSS[52] VSS[131] VSS[216] VSS[316]
AF31 AT46 BH11 W2
VSS[53] VSS[132] VSS[217] VSS[317]
AF38 AT7 BH15 W27
VSS[54] VSS[133] VSS[218] VSS[318]
AF4 AU24 BH17 W48
VSS[55] VSS[134] VSS[219] VSS[319]
AF42 AU30 BH19 Y12
VSS[56] VSS[135] VSS[220] VSS[320]
AF46 VSS[57] VSS[136] AV16 H10 VSS[221] VSS[321] Y38
AF5 AV20 BH27 Y4
VSS[58] VSS[137] VSS[222] VSS[322]
AF7 AV24 BH31 Y42
VSS[59] VSS[138] VSS[223] VSS[323]
AF8 AV30 BH33 Y46
VSS[60] VSS[139] VSS[224] VSS[324]
AG19 AV38 BH35 Y8
VSS[61] VSS[140] VSS[225] VSS[325]
AG2 AV4 BH39 BG29
B VSS[62] VSS[141] VSS[226] VSS[328] B
AG31 VSS[63] VSS[142] AV43 BH43 VSS[227] VSS[329] N24
AG48 VSS[64] VSS[143] AV8 BH7 VSS[228] VSS[330] AJ3
AH11 AW14 D3 AD47
VSS[65] VSS[144] VSS[229] VSS[331]
AH3 VSS[66] VSS[145] AW18 D12 VSS[230] VSS[333] B43
AH36 AW2 D16 BE10
VSS[67] VSS[146] VSS[231] VSS[334]
AH39 AW22 D18 BG41
VSS[68] VSS[147] VSS[232] VSS[335]
AH40 AW26 D22 G14
VSS[69] VSS[148] VSS[233] VSS[337]
AH42 AW28 D24 H16
VSS[70] VSS[149] VSS[234] VSS[338]
AH46 AW32 D26 T36
VSS[71] VSS[150] VSS[235] VSS[340]
AH7 VSS[72] VSS[151] AW34 D30 VSS[236] VSS[342] BG22
AJ19 VSS[73] VSS[152] AW36 D32 VSS[237] VSS[343] BG24
AJ21 AW40 D34 C22
VSS[74] VSS[153] VSS[238] VSS[344]
AJ24 VSS[75] VSS[154] AW48 D38 VSS[239] VSS[345] AP13
AJ33 AV11 D42 M14
VSS[76] VSS[155] VSS[240] VSS[346]
AJ34 VSS[77] VSS[156] AY12 D8 VSS[241] VSS[347] AP3
AK12 AY22 E18 AP1
VSS[78] VSS[157] VSS[242] VSS[348]
AK3 AY28 E26 BE16
VSS[79] VSS[158] VSS[243] VSS[349]
G18 BC16
PANTHER-POINT_FCBGA989 VSS[244] VSS[350]
G20 BG28
VSS[245] VSS[351]
G26 BJ28
VSS[246] VSS[352]
G28
VSS[247]
G36 VSS[248]
G48
VSS[249]
H12 VSS[250]
H18
VSS[251]
H22
VSS[252]
H24 VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3 VSS[258]
A A

PANTHER-POINT_FCBGA989

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (8/8) VSS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, October 28, 2011 Sheet 19 of 46
5 4 3 2 1
5 4 3 2 1

2 1 +3VS
RV204 4.7K_0402_5% +LCD_VDD
LCD_BL_PWM
14 PCH_BL_PWM
RV211 33_0402_5%

1
CV249 RV206
180P_0402_50V8J 300_0603_5% +3VS
+3VS
Vds=-20V
Id=-3A

6 2

1
D
Rds=130m ohm D
BKOFF# 33_0402_5% BKOFF#_R
29 BKOFF#
RV207 QV5A RV208 Vgs=-4.5
2N7002DW-T/R7_SOT363-6 2 100K_0402_5% CV250 Vth=-1
RV209 .1U_0402_16V7K

3
S
10K_0402_5%

1
G
2 QV7

3
RV210 47K_0402_5% AO3413_SOT23
D

1
QV5B CV251
5 0.01U_0402_25V7K +LCD_VDD
14 PCH_ENVDD

1
2N7002DW-T/R7_SOT363-6 REMOVE LCD_VDDR
W=60mils

4
RV213
100K_0402_5%
@ CV254 CV255 CV252 CV253

2
4.7U_0805_10V4Z 0.1U_0402_16V4Z
4.7U_0805_10V4Z 0.1U_0402_16V4Z

Close to JLVDS1

W=20mils
C
+3VS Change to 30 pin. C

1 2
CV256
0.1U_0402_16V4Z
Single Channel LVDS
Close to JLVDS

RU21 USB20_P10_R
15 USB20_P10
0_0402_5%
WCM-2012-900T_0805
3 3 4 4

@
STARC_107K30-000001-G2 2 2 1 1
30 30 GND6 36
USB20_N10_R 29 35 LU7
USB20_P10_R 29 GND5 RU20 USB20_N10_R
28 28 GND4 34 15 USB20_N10
+3VS 27 33 0_0402_5%
27 GND3
26 26 GND2 32
25 25 GND1 31
W=120mils +LCD_VDD 24 24 USB20_P10_R
+3VS 23 23
B 1 1 14 LCD_EDID_CLK 22 22 B
1

21 USB20_N10_R
14 LCD_EDID_DATA 21
20 20
RV216 @ 19
14 LCD_TXOUT0- 19

2
100K_0402_5% 2 2
14 LCD_TXOUT0+ 18 18
17
2

17 @
14 LCD_TXOUT1- 16 16
15 D5003
14 LCD_TXOUT1+ 15
14 L30ESDL5V0C3-2_SOT23-3
CV258 CV257 14
14 LCD_TXOUT2- 13 13
0.1U_0402_16V4Z 1U_0603_10V6K 12
14 LCD_TXOUT2+ 12
11 11
14 LCD_TXCLK- 10

1
10
14 LCD_TXCLK+ 9 9
8 8
LCD_BL_PWM 7
BKOFF#_R 7
6 6
5 5
4 4
+LCD_INV 3 3
+LCD_INV 2 2
+LCD_INV 1 1
@ JLVDS
FBMA-L11-201209-221LMA30T_0805
LV30 1.5A W=60mils
B+ 1 2 +LCD_INV +LCD_INV
A A

CV261 @
1
CV260 CV259
LCD/PANEL BD. Conn.
680P_0402_50V7K 0.1U_0402_25V6 68P_0402_50V8J
2

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title
Rated Current MAX:3000mA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 20 of 46
5 4 3 2 1
5 4 3 2 1

AZC099-04S.R7G_SOT23-6
VGA_CRT_G_L2 1 4 VGA_CRT_R_L2
I/O1 I/O3

2 GND VDD 5 +5VS

D D
VGA_CRT_B_L2 3 6
I/O2 I/O4
@ DV1

LV19
1 2 VGA_CRT_R_L2
14 PCH_CRT_R
FBMA-10-100505-800T 0402

LV20
1 2 VGA_CRT_G_L2
14 PCH_CRT_G
FBMA-10-100505-800T 0402

LV21
1 2 VGA_CRT_B_L2
14 PCH_CRT_B
FBMA-10-100505-800T 0402

2.2P_0402_50V8C

2.2P_0402_50V8C

2.2P_0402_50V8C

2.2P_0402_50V8C

2.2P_0402_50V8C

2.2P_0402_50V8C
150_0402_1%

150_0402_1%

150_0402_1%
RV194 RV195 RV196
CV229 CV230 CV231 CV235 CV236 CV237

C +CRT_VCC C

+3VS

RV198
RV197
+5VS +CRT_VCC_R +CRT_VCC

4.7K_0402_5%

4.7K_0402_5%
DV2 FV1
2 SMD1812P075TF .75A 13.2V
1 1 2
2

3 40mil
QV4A RB491D_SOT23-3
14 PCH_CRT_DATA 1 6 CRT_DDC_DAT If=1A CV240
@ 0.1U_0402_16V4Z
5

2N7002DW-T/R7_SOT363-6
QV4B
14 PCH_CRT_CLK 4 3 CRT_DDC_CK

2N7002DW-T/R7_SOT363-6
@ CV241 @CV242
@ CV242
@ CV243 @ CV244 470P_0402_50V8J 470P_0402_50V8J
33P_0402_50V8K 33P_0402_50V8K
CRT CONNECTOR

40mil JCRT@
B B
+CRT_VCC 1 1
VGA_CRT_R_L2 2 2
3 3
+CRT_VCC VGA_CRT_G_L2 4
RV199 10K_0402_5% 4
5 5
1 2 VGA_CRT_B_L2 6
CV245 6
7 7
5
1

0.1U_0402_16V4Z VSYNC 8 8
9
P
OE#

D_VGA_CRT_HSYNC HSYNC HSYNC 9


14 PCH_CRT_HSYNC 2 A Y 4 10 10
RV200 10_0402_5% CRT_DDC_DAT 11 11
G

UV16 CRT_DDC_CK 12
SN74AHCT1G125GW_SOT353-5 12
13
3

+CRT_VCC G1
14 G2
E&T_3703-E12N-03R
1 2
CV246
5
1

0.1U_0402_16V4Z
P
OE#

2 4 D_VGA_CRT_VSYNC VSYNC
14 PCH_CRT_VSYNC A Y RV202 10_0402_5%
G

UV17
SN74AHCT1G125GW_SOT353-5
10P_0402_50V8J

10P_0402_50V8J
3

@ CV247 @ CV248

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 21 of 46
5 4 3 2 1
5 4 3 2 1

+3VS
+5VS_HDMI
D D

40mil

1
RB161M-20_SOD123-2 DV5 F2 RV220
+5VS 2 1 1 2 +HDMI_5V_OUT 1M_0402_5%

2
G
CV272 0.5A 15VDC_FUSE CV262

2
3 1 HDMI_HPD
14 UMA_HDMI_HPD
0.1U_0402_16V4Z 0.1U_0402_16V4Z

1
RV219
QV8
20K_0402_5%
SSM3K7002FU_SC70-3
ESD, near DV5.

2
CV320 .1U_0402_16V7K VGA_DVI_TXC-
14 UMA_HDMI_TXC-
CV318 .1U_0402_16V7K VGA_DVI_TXD0-
14 UMA_HDMI_TX0-
CV315 .1U_0402_16V7K VGA_DVI_TXD1-
14 UMA_HDMI_TX1-
CV321 .1U_0402_16V7K VGA_DVI_TXD2-
14 UMA_HDMI_TX2-
C C
CV319 .1U_0402_16V7K VGA_DVI_TXC+
14 UMA_HDMI_TXC+
CV317 .1U_0402_16V7K VGA_DVI_TXD0+
14 UMA_HDMI_TX0+
CV316 .1U_0402_16V7K VGA_DVI_TXD1+
14 UMA_HDMI_TX1+
CV322 .1U_0402_16V7K VGA_DVI_TXD2+
14 UMA_HDMI_TX2+

+HDMI_5V_OUT

(pin 19) plug in 5V

@ JHDMI
HDMI_HPD 19
HP_DET
18
+5V
17
VGA_DVI_TXC+ R164 HDMI_R_CK+ HDMI_SDATA DDC/CEC_GND
1 16
@ 0_0402_5% HDMI_SCLK SDA
15
WCM-2012-900T CV400 SCL
14
Reserved
4 3 4.7P_0402_50V8C 13
4 3 2 @ HDMI_R_CK- CEC
12
CK-
11
HDMI_R_CK+ CK_shield
1 2 2 10
1 2 HDMI_R_D0- CK+
9
L9 CV401 D0-
8
+HDMI_5V_OUT VGA_DVI_TXC- R168 HDMI_R_CK- HDMI_R_D0+ D0_shield
4.7P_0402_50V8C 7
@ 0_0402_5% 1 @ HDMI_R_D1- D0+
6
D1-
5
HDMI_R_D1+ D1_shield
4 23
+3VS VGA_DVI_TXD0+ R169 HDMI_R_D0+ HDMI_R_D2- D1+ GND
3 22
@ 0_0402_5% D2- GND
1 2 21
WCM-2012-900T HDMI_R_D2+ D2_shield GND
place near JHDMI connect 1 20
CV402 D2+ GND
4 3
4 3 SUYIN_100042GR019M23MZR
4P_0402_50V8B
1

2 @
R1329 R1328 1 2 2
2.2K_0402_5% 2.2K_0402_5% 1 2
L10 CV403
2

B B
VGA_DVI_TXD0- R172 HDMI_R_D0- 4P_0402_50V8B
2

1
G

@ 0_0402_5% @

3 1 HDMI_SCLK
14 UMA_HDMI_CLK
2
G

VGA_DVI_TXD1+ R173 HDMI_R_D1+ 1


@ 0_0402_5%
3 1 HDMI_SDATA WCM-2012-900T CV404
14 UMA_HDMI_DATA Q5527
4 3 4P_0402_50V8B
BSH111_SOT23-3 4 3 2
S

1 2 2
Q5526 1 2
BSH111_SOT23-3 L11 CV405
VGA_DVI_TXD1- R176 HDMI_R_D1- 4P_0402_50V8B
@ 0_0402_5% 1 @

UMA 680_0402_5% VGA_DVI_TXD2+ R177 HDMI_R_D2+ 1


DIS 499_0402_1% @ 0_0402_5%
WCM-2012-900T CV406
HDMI_R_CK+ 1 2 4 3 4P_0402_50V8B
R690 680_0402_5% 4 3 2 @
HDMI_R_CK- 1 2
R691 680_0402_5% 1 2 2
HDMI_R_D1- 1 2
1 2
R692 680_0402_5% L12 CV407
HDMI_R_D1+ 1 2 VGA_DVI_TXD2- R178 HDMI_R_D2- 4P_0402_50V8B
R693 680_0402_5% @ 0_0402_5% 1 @
HDMI_R_D0- 1 2
R694 680_0402_5%
HDMI_R_D0+ 1 2
R695 680_0402_5%
HDMI_R_D2+ 1 2
R696 680_0402_5%
HDMI_R_D2- 1 2
R697 680_0402_5%
1

A
D A
+5VS 2 QV12
G 2N7002_SOT23-3
S
3

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 22 of 46
5 4 3 2 1
A B C D E

WLAN/BT combo +3VS +1.5VS

0.1U_0402_16V4Z 0.1U_0402_16V4Z

1
CW27 CW28 CW23 CW25 CW24 CW26

2
@
JWLAN 47P_0402_50V8J 4.7U_0805_10V4Z 47P_0402_50V8J 4.7U_0805_10V4Z
PCIE_WAKE# R5103 @ 0_0402_5% 1 2 +3VS
14,24 PCIE_WAKE# 1 2
1 3 4 1
BT_ON R5141 0_0402_5% 3 4 For SED request
5 6 +1.5VS
5 6 For SED request
13 WLANCLK_REQ# 7 8
7 8
9 10
9 10
13 CLK_PCIE_WLAN# 11 12
11 12
13 CLK_PCIE_WLAN 13 14
13 14
15 16
15 16
17 18
17 18 WL_OFF#
19 20 WL_OFF# 29
19 20 PLT_RST#
21 22 PLT_RST# 5,15,24,28,29
21 22 R5111 0_0603_5%
13 PCIE_PRX_WLANTX_N2 23 24 +3VS
23 24
13 PCIE_PRX_WLANTX_P2 25 26
25 26
27 28
27 28 PCH_SMBCLK
29 30 PCH_SMBCLK 10,11,13
29 30 PCH_SMBDATA
13 PCIE_PTX_WLANRX_N2 31 32 PCH_SMBDATA 10,11,13
31 32
13 PCIE_PTX_WLANRX_P2 33 34
33 34
35 36 USB20_N13 15
35 36
37
37 38
38 USB20_P13 15 Bluetooth 3.0
+3VS 39 40
39 40
41 42
41 42
43 44
43 44
45 46
R5139 100K_0402_5% 45 46
47 48
R5122 0_0402_5% 47 48
29 E51_TXD 49 50
R5121 0_0402_5% 49 50
29 E51_RXD 51 52
51 52
53 54
BT_ON R5140 1K_0402_0.5% GND1 GND2
29 BT_ON
LOTES_AAA-PCI-049-P06-A
2 2

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 23 of 46
A B C D E
A B C D E

U4201

C4201 .1U_0402_16V7K PCIE_PRX_GLANTX_P1_C 22 31


13 PCIE_PRX_GLANTX_P1 HSOP LED3/EEDO
LED1/EESK 37
C4202 .1U_0402_16V7K PCIE_PRX_GLANTX_N1_C 23 40 Close to Pin 27,39,12,42,47,48
13 PCIE_PRX_GLANTX_N1 HSON LED0 +LAN_VDD10
13 PCIE_PTX_GLANRX_P1 17 HSIP EECS/SCL 30 R4201 10K_0402_5% CC4211,2,3,4,5 +3V_LAN
13 PCIE_PTX_GLANRX_N1 18 32 R4202 10K_0402_5% L4201 60mil
HSIN EEDI/SDA +LAN_REGOUT 1 2
Close to Pin 27,39,12,47,48
2.2UH +-5% NLC252018T-2R2J-N
R4203 0_0402_5% 16 1 LAN_MDI0+ 1
13 LANCLK_REQ# CLKREQB MDIP0 LAN_MDI0- Layout Note: LL1 must be
2 0.1U_0402_16V4Z C4211
PLT_RST# MDIN0 LAN_MDI1+ within 200mil to Pin36, C4205 C4206
5,15,23,28,29 PLT_RST# 25 PERSTB MDIP1 4
1 5 LAN_MDI1- CL13,CL9 must be within4.7U_0603_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z C4212 1
CLK_PCIE_LAN MDIN1 LAN_MDI2+ 200mil to LL1 2
13 CLK_PCIE_LAN 19 REFCLK_P NC/MDIP2 7
CLK_PCIE_LAN# 20 8 LAN_MDI2- 0.1U_0402_16V4Z C4213
+3V_LAN 13 CLK_PCIE_LAN# REFCLK_N NC/MDIN2
10 LAN_MDI3+
@ +3VS NC/MDIP3 LAN_MDI3- 0.1U_0402_16V4Z C4214
NC/MDIN3 11
PCIE_WAKE# LAN_X1 43
R4209 100K_0402_5% CKXTAL1 0.1U_0402_16V4Z C4215
LAN_X2 44 13
CKXTAL2 DVDD10 +LAN_VDD10
R4206 29 0.1U_0402_16V4Z C4216
1K_0402_1% DVDD10
DVDD10 41 8111E@
PCIE_WAKE# 28 +LAN_VDD10 +LAN_EVDD10
14,23 PCIE_WAKE# LANW AKEB
20 mils
ISOLATEB 26 27
ISOLATEB DVDD33 +3V_LAN
39 0_0603_5% R4210
DVDD33
14 NC/SMBCLK AVDD33 12 +3V_LAN C4207 C4208 Close to Pin 3,6,9,13,29,41,45
R4207 R4204 8111E@ 10K_0402_5% 15 42 1U_0402_6.3V4Z 0.1U_0402_16V4Z
NC/SMBDATA AVDD33
15K_0402_5% +3V_LAN R4205 8111E@ 1K_0402_5% 38 GPO/SMBALERT AVDD33 47 CC4217,8,9,4220 +LAN_VDD10
48
AVDD33
Close to Pin 21 Close to Pin 3,13,29,45
ENSWREG 33 ENSW REG 0.1U_0402_16V4Z C4217
EVDD10 21 +LAN_EVDD10
+LAN_VDDREG 34 VDDREG
35 3 +LAN_VDD10 0.1U_0402_16V4Z C4218
VDDREG AVDD10
AVDD10 6
9 0.1U_0402_16V4Z C4219
AVDD10
46 RSET AVDD10 45
R4208 2.49K_0402_1% +3V_LAN +LAN_VDDREG 0.1U_0402_16V4Z C4220
24 36 +LAN_REGOUT 40 mils 8111E@
GND REGOUT
2 49 PGND 60 mils 0.1U_0402_16V4Z C4221 2
0_0603_5% R4211 1 8111E@
0.1U_0402_16V4Z C4222
RTL8111E-VL_QFN48_6X6 C4209 C4210 8111E@
8111E@ 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z C4223
2

25MHZ_20PF_7V25000016
+3V_LAN
YL4201 @ D11

LAN_X1 1 3 LAN_X2 1
2 LANGND LAN Conn.
1 3 R4212 LANGND
3
GND GND
0_0402_5%
L30ESDL5V0C3-2_SOT23-3
2 4 Close to JLAN.9
C4203 C4204 ENSWREG

要>1ms and <100ms


27P_0402_50V8J 27P_0402_50V8J
JLAN
+3V_Lan Rise time(10%~90%) R4213
0_0402_5%
@
+3VALW TO +3V_LAN RJ45_MIDI3- 8 PR4-
3 RJ45_MIDI3+ 3
7 PR4+
+3VALW +3V_LAN RJ45_MIDI1- 6 PR2-
RJ45_MIDI2- 5 PR3-
RJ45_MIDI2+ 4
PJ4201 PR3+
U4202
2 1 RJ45_MIDI1+ 3
2 1 PR2+
1 TCT1 MCT1 24 1 8111E@ 2 RJ45_GND
@ JUMP_43X79 LAN_MDI3- 2 23 R4214 75_0402_1% RJ45_MIDI3- RJ45_MIDI0- 2
LAN_MDI3+ TD1+ MX1+ RJ45_MIDI3+ PR1- LANGND
Q5513
3 TD1- MX1- 22 SHLD2 10
RJ45_MIDI0+ 1 9
AO3413_SOT23 PR1+ SHLD1
4 TCT2 MCT2 21 1 8111E@ 2
LAN_MDI2- 5 20 R4215 75_0402_1% RJ45_MIDI2-
TD2+ MX2+
S

3 1 LAN_MDI2+ 6 19 RJ45_MIDI2+
TD2- MX2-
7 TCT3 MCT3 18 1 2
LAN_MDI1- 8 17 R4216 75_0402_1% RJ45_MIDI1- 2 @ 1 SANTA_130452-0E1
G
2

R4218 C4232 C4233 LAN_MDI1+ TD3+ MX3+ RJ45_MIDI1+ LL4 0_0603_5% CONN@
9 TD3- MX3- 16
LAN_PWR_EN# 0_0402_5% 4.7U_0805_10V4Z 1U_0402_6.3V6K
29 LAN_PWR_EN#
@ 10 15 1 2
LAN_MDI0- TCT4 MCT4 R4217 75_0402_1% RJ45_MIDI0-
1 11 TD4+ MX4+ 14 2 1
LAN_MDI0+ RJ45_MIDI0+ C4226
0.1U_0402_25V6

12 TD4- MX4- 13
C5531

4.7U_0603_6.3V6K
2 C4224 2 1
SUPERWORLD_SWG150401 1000P_1808_3KV7K C4225
C4227 8111E@ 0.1U_0402_16V4Z
4 4
Place C4227 colse 0.1U_0402_25V6
to LAN chip

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCIe-LAN-RTL8111E
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 24 of 46
A B C D E
5 4 3 2 1

RA2
+PVDD1 600 mA0.1U_0402_16V4Z 0.1U_0402_16V4Z +5VS
1 1 0_0603_5% 1 1
CA57 CA44
CA56 CA43

2
JA1 2 2 2 2

2
JUMP_43X39 10U_0805_10V4Z 10U_0805_10V4Z

1
+3VS_DVDD
@ place close to chip
0_0603_5% RA1 RA32 0_0603_5%

1
35 mA +DVDD_IO
+3VS +3VS
RA12
D 1 1 +PVDD2 0.1U_0402_16V4Z +5VS D
CA8 CA7 1 1 0_0603_1% 1 1
10U_0805_10V4Z 0.1U_0402_16V4Z CA1 CA2 0.1U_0402_16V4Z CA60 @ CA59 CA58
0.1U_0402_16V4Z 10U_0805_10V4Z CA61 @ @ @
2 2
2 2 2 2
place close to chip
place close to chip 10U_0805_10V4Z 10U_0805_10V4Z

RA39 @ 0_0402_5% +AVDD


68 mA RA3
RA34 @ 0_0402_5% 10U_0805_10V4Z 0.1U_0402_16V4Z +5VS
0_0603_5%
U143 placement near Audio Codec
1 1 1 1
MIC1_LINE1_R_R CA9 1 2 4.7U_0603_6.3V6K MIC1_C_R 22 1 CA3 CA4 CA5 CA6 RA13
MIC1_LINE1_R_L CA10 1 MIC1_R DVDD
2 4.7U_0603_6.3V6K MIC1_C_L 21
MIC1_L DVDD_IO 9 SPKL+ SPK_L1
0_0603_5%
INT_MIC MIC2R_R CA26 1U_0402_6.3V6K MIC2_R 2 2 2 2 CA19
1 2 17 MIC2_R AVDD1 25
RA25
1 21K_0402_5% MIC2R_L CA28 1U_0402_6.3V6K MIC2_L 16 38 10U_0805_10V4Z 0.1U_0402_16V4Z
RA26 1K_0402_5% MIC2_L AVDD2 @ 10U_0805_10V4Z
31 MIC1_VREFO_L PVDD1 39 +PVDD1 place close to chip CA42
+MIC1_VREFO_R 30 46 +PVDD2 1U_0402_6.3V4Z
MIC1_VREFO_R PVDD2 CA46 @
+MIC2_VREFO 29 MIC2_VREFO
C4228 C4229
1000P_0402_50V7K 1000P_0402_50V7K 15 45 SPKR+ @ 10U_0805_10V4Z
@ @ LINE2_R SPK_OUT_R+ SPKR- SPKL- SPK_L2
14 LINE2_L SPK_OUT_R- 44
RA14
0_0603_5%
20 40 SPKL+ SPKR+ SPK_R1
C MONO_OUT SPK_OUT_L+ SPKL- RA15 C
SPK_OUT_L- 41
MONO_IN 12 0_0603_5% CA51
CA12 100P_0402_50V8J PCBEEP_IN
AZ_SYNC_HD 10 33 RA4 75_0402_1% @ 10U_0805_10V4Z
12 AZ_SYNC_HD SYNC HPOUT_R HP_R 26
32 RA5 75_0402_1% CA45
HPOUT_L HP_L 26
11 1U_0402_6.3V4Z
12 AZ_RST_HD# RESET# CA39 @
5 AZ_SDOUT_HD AZ_SDOUT_HD 12
SDATA_OUT
place close to chip SDATA_IN 8 AZ_SDIN0_HD_R
AZ_SDIN0_HD 12
@ 10U_0805_10V4Z
20K_0402_1% RA10 AC_JDREF 19 RA6 33_0402_5% SPKR- SPK_R2
CA35 JDREF
2 110U_0805_10V4Z 28 LDO_CAP BITCLK 6 AZ_BITCLK_HD
AZ_BITCLK_HD 12
RA44
CA18 2 1 0.1U_0402_16V4Z AC_VREF 27 0_0603_5%
2.2U_0603_6.3V6K CA14 CPVEE VREF
34 CPVEE
CA17 2 110U_0805_10V4Z 35 24 @ @
CBN NC R1370 C692
CA16 2.2U_0603_6.3V6K 36 23 YSDA0502C_SOT23-3
CBP NC
NC 48
SPEAKER CONN 2
2 10_0402_5% 10P_0402_50V8J 1
GPIO0/DMIC_DATA
3 GPIO1/DMIC_CLK AVSS1 26 3
AVSS2 37
AGND Close to Audio Chip
RA18 20K_0402_1% 42 DA8
SENSE_A PVSS1
26 MIC_PLUG 1 2 13 SENSE_A PVSS2 43
SENSE_B 18 7 @ JSPK
26 HP_PLUG
RA16 39.2K_0402_1% SENSE_B DVSS DGND SPK_L2 1 1
EAPD 47 SPK_L1 2 2
29 EAPD EAPD
1 RA17 2 29 EC_MUTE#
EC_MUTE# 4 PD# THERMAL_PAD 49 SPK_R2 3 3
20K_0402_1% SPK_R1 4 4
YSDA0502C_SOT23-3 5 G1
ALC259-VB5-GR_QFN48_7X7 6 G1
B B
2
E&T_3802-E04N-01R
place close to chip 1
3

DA9
CA47 1 2 0.1U_0603_50V7K

CA48 1 2 0.1U_0603_50V7K EC Beep 2 RA51


29 EC_BEEP#
RA8
+AVDD 1 R215 2 EC_MUTE# 2 R4924 1
+MIC2_VREFO 1
4.7K_0402_5% Int. MIC
YSDA0502C_SOT23-3
CA49 1 2 0.1U_0603_50V7K 47K_0402_5% 1K_0402_5% 4.7K_0402_5% MIC2
@ 14@ INT_MIC
CA50 1
@ 1 1 2
2 0.1U_0603_50V7K 2 2 1
3
PCI Beep RA9
CA15
+3VS
W M-64PCY_2 @ C379
RA43 0_0603_5% MONO_IN DA10
12 PCH_SPKR 220P_0402_25V8J
47K_0402_5%
0.1U_0402_16V4Z
1

R126
1

@ 4.7K_0402_5%

RA11 CA20
Ext.MIC/LINE IN JACK
2

10K_0402_5% 0.1U_0402_16V4Z AZ_RST_HD#


1
2

RA37 2 RA48 1 +MIC1_VREFO_R


@ C202 1K_0402_5% 4.7K_0402_5%
0.1U_0402_16V4Z MIC1_LINE1_R_R 2 1
2 MIC1_R 26

A A
MIC1_LINE1_R_L 2 1 MIC1_L 26
1K_0402_5%
Sense Pin Impedance Codec Signals Function Realtek suggest use RA38 2 RA46 1 +MIC1_VREFO_R
the same reference power. 4.7K_0402_5%

39.2K PORT-I (PIN 32, 33) Headphone out Security Classification Compal Secret Data Compal Electronics, Inc.
SENSE A
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title
20K PORT-B (PIN 21, 22) Ext. MIC HD CODEC ALC259
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
SENSE B 20K PORT-F (PIN 16, 17) 0.1
Int. MIC DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QAL30 LA-8061P MB
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 25 of 46
5 4 3 2 1
5 4 3 2 1

HEADPHONE OUT JACK CONN@


SINGA_2SJ2285-112252_6P-T

4 SHLD1

25 HP_PLUG HP_PLUG 6

5
HP_R RA52 1 2 0_0603_5% HP_R_1 2
25 HP_R
HP_L RA53 1 2 0_0603_5% HP_L_1 1
D 25 HP_L D
3

2
@
DA12
1 1 YSDA0502C_SOT23-3 JHP

CA70 CA71
33P_0402_50V8J 33P_0402_50V8J
@ 2 2 @

1
MICROPHONE IN JACK
CONN@
SINGA_2SJ2285-112252_6P-T

4 SHLD1

MIC_PLUG 6
25 MIC_PLUG
5
MIC1_R R4 1 2 0_0603_5% MIC1_R_1 2
25 MIC1_R
MIC1_L R3 1 2 0_0603_5% MIC1_L_1 1
C 25 MIC1_L C
3

2
@
DA11 JMIC
1 1 YSDA0502C_SOT23-3

CA68 CA69
33P_0402_50V8J 33P_0402_50V8J
@ 2 2 @

1
Touch/B Connector USB + LID SB
+5VS
C5002

B TP_CLK LEFT_BTN# JUSB @ B

+5VALW 1
ACES_85201-0605N 0.1U_0402_16V4Z TP_DATA RIGHT_BTN# 1
2
2
8 GND W=200mils 3 3
3

7
GND 2 4
4
6 D5001 D5002 5
6 5
5 TP_CLK 29 AZ5125-02S.R7G_SOT23-3 AZ5125-02S.R7G_SOT23-3 6
5 USB20_N4 6
4 TP_DATA 29 15 USB20_N4 7
4 LEFT_BTN# USB20_P4 7
3 15 USB20_P4 8
3 RIGHT_BTN# @ @ 8
2 2 9 9
100P_0402_50V8J
C5003

100P_0402_50V8J
C5004

1 USB20_N9 10
1 15 USB20_N9 10
USB20_P9 11
@ JTP 15 USB20_P9 11
12
1

USB_OC4# 12
15,29 USB_OC4# 13
USB_EN# 13
29,33 USB_EN# 14 14
15
USB20_N11 15
15 USB20_N11 16
USB20_P11 16
15 USB20_P11 17
17
18
LEFT_BTN# RIGHT_BTN# 18
19
19
20
20
21 21
LID_SW_IN# 22
29 LID_SW_IN# 22
+3VL 23 23
+3VS 24
24

25
GND1
26
GND2
SMT1-05_4P SMT1-05_4P ACES_85208-24071
A A
1 3 1 3

2 4 2 4
6
5

6
5

SW5 SW6

Title
AUDIO CONN/TP/FUNB
Size Document Number Rev
QAL30 LA-8061P MB 0.1

Date: Friday, January 13, 2012 Sheet 26 of 46


5 4 3 2 1
5 4 3 2 1

SATA ODD Conn.

@
JODD

1
0.01U_0402_25V7K14@ C518 SATA_PTX_C_DRX_P2 GND
12 SATA_PTX_DRX_P2 2 A+
0.01U_0402_25V7K14@ C519 SATA_PTX_C_DRX_N2 3
12 SATA_PTX_DRX_N2 A-
4 GND
D 0.01U_0402_25V7K14@ C424 SATA_PRX_DTX_N2 D
12 SATA_PRX_C_DTX_N2 5 B-
0.01U_0402_25V7K14@ C425 SATA_PRX_DTX_P2 6
12 SATA_PRX_C_DTX_P2 B+
7 GND

8 DP
2A(80mil) 9
+5V
+5VS 10 +5V
JODD_T23 11
T23 MD
12 15
GND GND
13 GND GND 14

SANTA_206401-1_RV

Placea caps. near ODD CONN.


2A(80mil)
+5VS 0.1U_0402_16V4Z 10U_0805_10V4Z

1
C3601 C3602 C3603 C3604

1000P_0402_50V7K 1U_0603_10V6K

C C

SATA HDD Conn.

JHDD
1
B 0.01U_0402_25V7K C512 SATA_PTX_C_DRX_P0 GND B
12 SATA_PTX_DRX_P0 2 A+
0.01U_0402_25V7K C513 SATA_PTX_C_DRX_N0 3
12 SATA_PTX_DRX_N0 A-
4
0.01U_0402_25V7K C410 SATA_PRX_DTX_N0 GND
12 SATA_PRX_C_DTX_N0 5 B-
0.01U_0402_25V7K C412 SATA_PRX_DTX_P0 6
12 SATA_PRX_C_DTX_P0 B+
7
GND

8
V33
9 V33
10 V33
11
GND
12 GND
13
GND
+5VS 14 V5
15
V5
16
V5
1.5A(60mil) 17
GND
18
Reserved
19
GND
20
V12
21 V12 GND 24
22 23
V12 GND
SANTA_190501-1
CONN@

A A

+5VS 1.5A(60mil)
Place component's closely HDD CONN.

C387 C388 C389 C390


10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SATA HDD / ODD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 27 of 46
5 4 3 2 1
5 4 3 2 1

SPI ROM For Basic ME ROM size


(w/o Braidwood & system BIOS):
4MByte

D D

+3VS

TPM@ TPM@
C764 C765 +3VALW +3VL TPM 1.2
0.1U_0402_16V4Z 1U_0402_6.3V4Z
C764 close pin 24 C765 close pin 10 Base I/O Address
R12 @ R17
@R17
0_0603_5% 0_0603_5% 0 = 02Eh
C C
* 1 = 04Eh
+3VS

+TPM_VSB TPM@
R727
TPM@ 10K_0402_5%

24
19
10

5
U36 +3VS

VSB
VDD
VDD
VDD
LPC_AD0 26 28
12,29 LPC_AD0 LAD0 LPCPD#
LPC_AD1 23 9
12,29 LPC_AD1 LAD1 TESTB1/BADD +3VS
LPC_AD2 20 8 TPM_TEST1 R661 TPM@
12,29 LPC_AD2 LPC_AD3 LAD2 TEST1
17 0_0402_5% R659 TPM@
12,29 LPC_AD3 LAD3 TPM_XTALO
14 4.7K_0402_5%
XTALO TPM_XTALI @
13
TPM XTALI R662
CLK_PCI_TPM 21 SLB 9635 TT 1.1 4.7K_0402_5%
15 CLK_PCI_TPM LCLK
LPC_FRAME# 22 2
12,29 LPC_FRAME# PLT_RST# LFRAME# GPIO2
5,15,23,24,29 PLT_RST# 16 LRESET# GPIO 6
SERIRQ 27
12,29 SERIRQ SERIRQ
PM_CLKRUN# 15
14 PM_CLKRUN# CLKRUN#
7 1
PP NC
3
R665 TPM@ NC
12

GND
GND
GND
GND
+3VS NC
4.7K_0402_5%

+TPM_VSB @ R667 SLB-9635-TT-1.2_TSSOP28

4
11
18
25
4.7K_0402_5%
C766 TPM@
@ R772 15P_0402_50V8J
0_0402_5% TPM_XTALI
B B

10M_0402_5%

2
TPM@
CLK_PCI_TPM 2 1 Y4
@ C768 32.768KHZ_12.5PF_CM31532768DZFT

R668
@ R669 15P_0402_50V8J TPM@

1
10_0402_5%

TPM_XTALO

C767 TPM@
15P_0402_50V8J

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TPM
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 28 of 46
5 4 3 2 1
5 4 3 2 1

+EC_VCCA KSI[0..7]
+3VALW _EC KSI[0..7] 32
L4901
FBMA-L11-160808-800LMT_0603 C4907 KSO[0..15]
KSO[0..15] 32
Board ID
+3VL 0.1U_0402_16V4Z 0.1U_0402_16V4Z +3VALW _EC 1 2 +EC_VCCA ECAGND +3VL
R4901 0.1U_0402_16V4Z
0_0805_5% C4901 C4902 C4903 C4904 C4905 C4906

@ C381 KB_RST# 1000P_0402_50V7K R4902


820P_0402_25V +3VL Ra 100K_0402_5%
U4901 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K
@ C383 PLT_RST#
820P_0402_25V AD_BID0
D +EC_VCCA D

111
125
R4903 C4908

22
33
96

67
U4901

9
KB930 Rb 0_0402_5%
930@

EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC

EC_VDD/VCC

EC_VDD/AVCC
0.1U_0402_16V4Z

PAD T4911 @ 1 21
KB_RST# GATEA20/GPIO00 GPIO0F EC_BEEP#
16 KB_RST#
SERIRQ
2 KBRST#/GPIO01 BEEP#/GPIO10 23 EC_BEEP# 25 Analog Board ID definition,
12,28 SERIRQ 3 SERIRQ GPIO12 26
12,28 LPC_FRAME#
LPC_FRAME# 4 27 Please see page 3.
C4910 LPC_AD3 LPC_FRAME# ACOFF/GPIO13 ECAGND
12,28 LPC_AD3 5 LPC_AD3 2 1
@ 22P_0402_50V8J LPC_AD2 7 PWM Output C4909 100P_0402_50V8J
12,28 LPC_AD2 LPC_AD2
2 1 R4904 @ 33_0402_5% LPC_AD1 8 63 BATT_TEMPA
12,28 LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMPA 35
LPC_AD0 10 LPC & MISC 64 LAN_PW R_EN#
12,28 LPC_AD0 LPC_AD0 GPIO39 LAN_PW R_EN# 24
65 ADP_I
ADP_I/GPIO3A ADP_I 35,36
12 AD Input 66 AD_BID0
15 CLK_PCI_LPC CLK_PCI_EC GPIO3B
13 75 PCH_HOT#_R R4934 0_0402_5% PCH_HOT#
5,15,23,24,28 PLT_RST# PCIRST#/GPIO05 GPIO42 PCH_HOT# 13
+3VL R4905 47K_0402_5% EC_RST# 37 76
EC_SCI# EC_RST# IMON/GPIO43
16 EC_SCI# 20 EC_SCII#/GPIO0E
C4911 0.1U_0402_16V4Z PW R_SAVING_LED 38 +5VS
32 PW R_SAVING_LED GPIO1D
DAC_BRIG/GPIO3C 68
70 EN_DFAN1
EN_DFAN1/GPIO3D EN_DFAN1 31
DA Output 71 TP_CLK 2 1
KSI0 IREF/GPIO3E 4.7K_0402_5% R4908
55 KSI0/GPIO30 CHGVADJ/GPIO3F 72
+3VALW _EC KSI1 56 TP_DATA 2 1
KSI2 KSI1/GPIO31 4.7K_0402_5% R4910
57 KSI2/GPIO32
1 2 EC_SMB_CK1 KSI3 58 83 EC_MUTE_R R4907 0_0402_5% EC_MUTE#
KSI3/GPIO33 EC_MUTE#/GPIO4A EC_MUTE# 25
C R4906 2.2K_0402_5% KSI4 59 84 USB_EN# C
KSI4/GPIO34 USB_EN#/GPIO4B USB_EN# 26,33
1 2 EC_SMB_DA1 KSI5 60 85 CHG_MODE0 CHG_MODE0 33
R4909 2.2K_0402_5% @ KSI6 KSI5/GPIO35 CAP_INT#/GPIO4C EAPD
61 KSI6/GPIO36 PS2 Interface EAPD/GPIO4D 86 EAPD 25
AO3413_SOT23 KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK 26
Q4902 @ KSO0 39 88 TP_DATA
+3VS KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA 26
AO3413_SOT23 KSO1 40 R4945 330K_0402_5%
Q4901 KSO2 KSO1/GPIO21
1 3 41
D

KSO2/GPIO22 +3VALW _EC


1 2 PCH_SMLCLK KSO3 42 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 97 CPU1.5V_S3_GATE
CPU1.5V_S3_GATE 9
R4922 2.2K_0402_5% 1 3 KSO4 43 98 W L_OFF# D4901
D

KSO4/GPIO24 WOL_EN/GPXIOA01 W L_OFF# 23


1 2 PCH_SMLDATA KSO5 44 KSO5/GPIO25 Int. K/B 99 ME_EN ACIN_D 2 1
G

ME_EN 12 ACIN 14,36


2

R4923 2.2K_0402_5% KSO6 HDA_SDO/GPXIOA02 R4911 0_0402_5%


45 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 109 VCIN0_PH 35
KSO7 46 SPI Device Interface 9012@ RB751V-40_SOD323-2
G
2

+3VALW _EC PLT_RST# KSO8 KSO7/GPIO27


47 KSO8/GPIO28
KSO9 48 119 EC_SI_SPI_SO
D4902 KSO10 KSO9/GPIO29 SPIDI/GPIO5B EC_SO_SPI_SI PCH_PW ROK
49 KSO10/GPIO2A SPIDO/GPIO5C 120
@ EC_SMI# 1 2 KSO11 50 SPI Flash ROM 126 EC_SPICLK R4941 10K_0402_5%
PCH_SMI# 16 KSO11/GPIO2B SPICLK/GPIO58
R4920 1K_0402_1% KSO12 51 128 EC_SPICS# VR_ON
RB751V-40_SOD323-2 KSO13 KSO12/GPIO2C SPICS#/GPIO5A R4943 10K_0402_5%
52 KSO13/GPIO2D
KSO14 53 Please place R4930 close to EC with in 750mil
KSO15 KSO14/GPIO2E
54 KSO15/GPIO2F ENBKL/GPIO40 73 PCH_ENBKL 14
+3VALW _EC 81 74 PECI_KB930 R4930 930@ 43_0402_1%
KSO16/GPIO48 PECI_KB930/GPIO41 H_PECI 5,16
PCH_PW R_EN
82 KSO17/GPIO49 FSTCHG/GPIO50 89
90 BATT_FULL_LED#
PCH_PW R_EN 34 support Erp lot 6
BATT_CHG_LED#/GPIO52 BATT_FULL_LED# 32
CHG_MODE1 91 CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# 32
R4939 10K_0402_5% EC_SMB_CK1 77 GPIO 92 PW R_ON_LED
35,36 EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 PW R_ON_LED 32
EC_SMB_DA1 78 93 BATT_CHG_LOW _LED#
35,36 EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_CHG_LOW _LED# 32
CHG_MODE0 PCH_SMLCLK 79 SM Bus 95 SYSON
13 PCH_SMLCLK EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON 34,40
R4942 10K_0402_5% PCH_SMLDATA 80 121 VR_ON
13 PCH_SMLDATA EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON 42
127 PM_SLP_S4#
B PM_SLP_S4#/GPIO59 PM_SLP_S4# 14 B
R5013 @
VCIN1_PH 1 2 +3VALW _EC
6 100 PCH_RSMRST#
14 PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 PCH_RSMRST# 14
14 101 EC_LID_OUT# 47K_0402_5%
+3VS 14 PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# 16
EC_SMI# 15 102 R4913 VCIN1_PH
EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 VCIN1_PH 35
R4946 0_0402_5% 16 103 9012@ 0_0402_5%
36 GREEN_PW R3 GPIO0A H_PROCHOT#_EC/GPXIOA06 VCOUT1_PH 35
BT_ON 17 104 PCH_PW ROK_930 0_0402_5% R4912
23 BT_ON GPIO0B VCOUT0_PH/GPXIOA07 VCOUT0_PH 35,37
@ PCH_HOT# 18 GPO 105 BKOFF# 9012@
36 GREEN_PW R GPIO0C BKOFF#/GPXIOA08 BKOFF# 20
R4937 10K_0402_5% VGATE 19 GPIO 106 PBTN_OUT# R5015 1 2 +3VALW _EC
14,42 VGATE GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# 14
25 107 W L_BT_LED# 47K_0402_5%
15,26 USB_OC4# EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 W L_BT_LED# 32
FAN_SPEED 28 108 SA_PGOOD LID_SW _IN#
31 FAN_SPEED FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 SA_PGOOD 41
33 CHG_MODE1 CHG_MODE1 29 C5036 10P_0402_50V8J
EC_PME#/GPIO15
23 E51_TXD 30 EC_TX/GPIO16
VR_HOT# 31 110 ACIN_D
42 VR_HOT# 23 E51_RXD EC_RX/GPIO17 AC_IN/GPXIOD01
PCH_PW ROK_R 32 112 EC_ON_R R4938 0_0402_5%
PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON 31,37 C4918
Breathing_LED 34 114 ON/OFF_R R4940 0_0402_5%
+3VS 32 Breathing_LED SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFF 31
0.1U_0402_16V4Z

36 GPI 115 LID_SW _IN# SA_PGOOD 0.1U_0402_16V4Z


NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW _IN# 26
R4936 0_0402_5%

116 SUSP#
SUSP#/GPXIOD05 SUSP# 34,38,39
@ 117
GPXIOD06 USB_OC0# 15,33
C4917

118 PECI_KB9012 R4944 H_PECI


PECI_KB9012/GPXIOD07
AGND/AGND

122 9012@ 43_0402_1%


XCLKI/GPIO5D
GND/GND
GND/GND
GND/GND
GND/GND

SUS_CK 123 124 +V18R EC_MUTE#


14 SUS_CK XCLKO/GPIO5E V18R
GND0

R4931 @ 100K_0402_5% C4914 Co-lay KB930/KB9012 PECI R4935 10K_0402_5%


5

U4902 1 2 4.7U_0805_10V4Z Stuff


P

5,35 H_PROCHOT# H_PROCHOT# 4 2 VCOUT1_PH C4919 @ 20P_0402_50V8 KB9012QF-A2_LQFP128_14X14


11
24
35
94
113

69

Y A 9012@ KB930 R4930 C4915 100P_0402_50V8J


NC

20mil
G

A
L4902 ACIN 2 1 A
SN74LVC1G06DCKR_SC70-5
1 R4929 ECAGND 2 1 KB9012 R4944
1

100K_0402_5% FBMA-L11-160808-800LMT_0603
C4916
47P_0402_50V8J
2
930@ PCH_PW ROK_930
R4921 0_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

14 PCH_PW ROK
PCH_PW ROK 9012@ PCH_PW ROK_R
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB930/Co-lay 9012
R4918 0_0402_5% Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 29 of 46
5 4 3 2 1
5 4 3 2 1

BIOS Bus switch R401 R402 R403


0_0402_5% 0_0402_5% 0_0402_5%
NOW8@ NOW8@ NOW8@

When use single ROM, use 0 ohm.

BIOS SPI Flash (4MByte*1)


D D
U59
WIN8@ SBIOS_SI 5 2 PCH_SPI_MISO_R_R WIN8@
12 PCH_SPI_MOSI SI SO PCH_SPI_MISO 12
R401 33_0402_5% R403 33_0402_5%
WIN8@ SBIOS_CLK 6
12 PCH_SPI_CLK SCLK
R402 33_0402_5%
12 PCH_SPI_CS# 1
CS
7 HOLD
3 WP

+3VS 8 VCC GND 4 For EMI resuest.


20mils MX25L3205AZMC-20G_SON8 @ C361 @ R419
C405 SBIOS_CLK
0.1U_0402_16V4Z
6P_0402_25V 10_0402_5%
P/N: SA00003K800
C402 12P_0402_50V8J

C C

BIOS SPI Flash (2MByte*1) For Win8


+3VS
R407 20mils
WIN8@ U60 WIN8@
PCH_SPI_CS1# 33_0402_5% PCH_SPI_CS1_R# 1 8
12 PCH_SPI_CS1# PCH_SPI_MISO SBIOS_SO1 CS# VCC
2 7 WIN8@
R406 WIN8@ 33_0402_5% SO HOLD# SBIOS_CLK1 R405 33_0402_5% PCH_SPI_CLK
+3VS 3 6
WP# SCLK SBIOS_SI1 WIN8@ PCH_SPI_MOSI
4 5
B GND SI R404 33_0402_5% B
MX25L1606EM2I-12G_SO8

C406
0.1U_0402_16V4Z
P/N: SA000041N00 WIN8@ For EMI resuest.
@ C362 @ R420
SBIOS_CLK1

6P_0402_25V 10_0402_5%

WIN8@
C403 12P_0402_50V8J

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SBIOS & EC ROM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 30 of 46
5 4 3 2 1
A B C D E

Power Button

To POWER/B
ON/OFF switch
+3VL @ JPOWER
1 ZZZ 1
+5VALW 1 1
32 PWR_ON_LED# 2 2
32 Breathing_LED# 3 3
ON/OFFBTN# 4
R4803 4
5
5
6 6
100K_0402_5% 7 PCB-MB
TOP Side GND
GND 8
@ D4801
R4806
2 ACES_85201-0605N
ON/OFFBTN# ON/OFF 29
1
3
100K_0402_5% DAN202UT106_SC70-3

51_ON#

FD1 FD2 FD3 FD4

Bottom Side ON/OFFBTN# @ @ @ @

1
Breathing_LED#
R4805
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80

1
D

2
EC_ON 2 Q4801
100K_0402_5% 29,37 EC_ON
G 2N7002_SOT23-3 D4802
@ S AZ5125-02S.R7G_SOT23-3

3
R4802
2 2

Test Only 10K_0402_5%

1
Fan Control Circuit Screw Hole
MB Boss H1 H2 H3 H4 H5 H6 H7 H8 H9 H10

H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0N H_3P5X3P0N

1
@ @ @ @ @ @ @ @ @ @

+5VS

1A CPU H21 H22 H23

H_3P7X4P2 H_3P7X4P2 H_3P7

1
3 3
2 @ @ @
C14 20mil JFAN
10U_0805_10V4Z +FAN_VCC 1
1 1
1000P_0402_50V7K

2
2 WLAN H41
2 3
U6 3
1 8 C13 4
EN GND @ GND H_3P2
2 7 5

1
+FAN_VCC VIN GND 1 GND
3 VOUT GND 6
1 2 4 5 ACES_85205-03001 @
29 EN_DFAN1 VSET GND
R51 @
330_0402_5% G996P11U SOP 8P
1

C12 R54 10K_0402_5% THERMAL


0.047U_0402_16V7K 2 1 +3VS H42 H43
2

FAN_SPEED 29
1 H_3P7 H_3P7
1

1
C15 @ @ @
0.01U_0402_25V7K
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWRBTN/ FAN / Screws
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 31 of 46
A B C D E
INT_KBD Conn.
LED

R5006
820_0402_5% For EMC
1 2 2 1 LED2
SATA +5VS
HT-191NB_BLUE_0603
PCH_SATALED# 12
KSO10
C5017 100P_0402_50V8J
KSO11
C5018 100P_0402_50V8J
KSO12
C5019 100P_0402_50V8J
KSO15
C5021 100P_0402_50V8J KSI[0..7]
KSI7 KSI[0..7] 29
C5022 100P_0402_50V8J KSO[0..15]
KSO[0..15] 29
KSI2
R5008 LED3 C5024 100P_0402_50V8J
820_0402_5% Amber KSI3
Battery +5VALW 1 2 4 A 3 BATT_CHG_LOW_LED# 29
KSI4
C5025 100P_0402_50V8J

Blue C5026 100P_0402_50V8J


2 1 KSI0 JKB @
BATT_FULL_LED# 29
YG

C5027 100P_0402_50V8J
KSI5 26 28
18-225A_S2B6W-C01_3T 0603 ORG_BLU C5028 100P_0402_50V8J KSI0 KSO0 G2
25 KSO1 G1 27
KSI6 KSI1 24
C5029 100P_0402_50V8J KSO0 KSO2
23
KSI1 KSO1 KSO3
22 KSO4
C5030 100P_0402_50V8J KSI2 21
KSO2 KSI3 KSO5
20
C5008 100P_0402_50V8J KSI4 KSO6
19 KSO7
R5011 KSO1 KSI5 18
820_0402_5% LED6 C5005 100P_0402_50V8J KSO2 KSO8
Amber 17
Wireless +5VS 1 2 2 1 WL_BT_LED# 29
KSO0
C5006 100P_0402_50V8J
KSI6
KSI7
16
15
KSO9
KSO10
HT-191UD_Amber_0603 KSO4 KSO3 KSO11
14
C5007 100P_0402_50V8J KSO4 KSO12
13
KSO3 KSO5 KSO13
12
C5009 100P_0402_50V8J KSO6 KSO14
11 KSO15
KSO5 KSO7 10
C5010 100P_0402_50V8J KSO8 KSO16
9 KSO17
R5007 KSO14 KSO9 8
820_0402_5% LED4 C5011 100P_0402_50V8J KSO10 KSI0
7
Power +5VALW 1 2 2 1 PWR_ON_LED#
PWR_ON_LED# 31
KSO6 KSO11 6
KSI1
KSI2

1
D C5012 100P_0402_50V8J KSO12 5 KSI3
HT-191NB_BLUE_0603 Q4 2 KSO7 KSO13 4
PWR_ON_LED 29 KSI4
2N7002_SOT23-3 G C5013 100P_0402_50V8J KSO14 3
KSO13 KSO15 KSI5
S 2

3
C5014 100P_0402_50V8J KSO2 KSI6
1
KSO8 KSI7
Q3 C5015 100P_0402_50V8J
R5016 2N7002_SOT23-3 KSO9 ACES_88747-2601
820_0402_5% LED9 Amber C5016 100P_0402_50V8J
Power Saving 1 2 2 1 1 3
D

S
+5VALW
R5017 HT-191UD_Amber_0603 @
820_0402_5% RU19
G
2

VL 1 2 0_0402_5%
@

29 PWR_SAVING_LED
RC103
100K_0402_5%
@

R5012
200_0805_5% LED7
CAP Lock +5VS 1 2 2 1 CAPS_LED#
CAPS_LED# 29
G HT-110BP5_WHITE
3

12-23A-R6GHBHC-A01-2D_RGB

1
R5014
R

200_0805_5%
1 2 4 2 Breathing_LED#
Breathing +5VALW Breathing_LED# 31
G

PWR_ON_LED# D
3
Q2
B

2
G 2N7002_SOT23-3
LED8 S
3

29 Breathing_LED

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/EC ROM/TP/FUN/LED
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 32 of 46
A B C D E

@ JUSB31
USB3.0 Port 0 +5VALW 2.5A +USB30_VCCP0
+USB30_VCCP0 1 VBUS
UU2 W=80mils USB20_N0_U_L 2 D-
USB3.0 Port0 1 8 0.1U_0402_16V4Z USB20_P0_U_L 3 D+
GND VOUT
2 VIN VOUT 7 1 4 GND
Port 0 : Left USB3.0 3 6 U3RXDN0_R_L 5 StdA-SSRX-
BUS_EN#_R VIN VOUT CU4 + CU3 CU2 U3RXDP0_R_L USB30_GND
26,29 USB_EN# 4 EN FLG 5 6 StdA-SSRX+ GND 10
CU1 7 GND-DRAIN 11 USB30_GND
RU1 G547I2P81U_MSOP8 4.7U_0805_10V4Z 4.7U_0805_10V4Z U3TXDN0_L GND USB30_GND
8 12
0_0402_5% @ 2 U3TXDP0_L StdA-SSTX- GND USB30_GND
9 StdA-SSTX+ GND 13
CU5
2011-1228 1 150U_B2_6.3VM_R35M 1000P_0402_50V7K LOTES_AUSB0015-P001A 1
ESD Solution CU7 RU2
.1U_0402_16V7K CU6 0_0603_5%
1 Close to UU2 USB_OC0# .1U_0402_16V7K 1
2 USB_OC0# 15,29 2
RU3 0_0402_5%

DU1 HM76@
HM76@ U3RXDN0_R_L 10 U3RXDN0_R_L
CU11 USB3_TX0_P_C @ RU5 U3TXDP0_L
1 2011-1228
15 USB3_TX0_P
0_0402_5%
WCM-2012-121T_0805
U3RXDP0_R_L 2 9 U3RXDP0_R_L UU3 ESD Solution
0.01U_0402_25V7K
4 4 3 3
U3TXDN0_L 4 7 U3TXDN0_L 29 CHG_MODE0 CHG_MODE0 8 CB CEN# 1 Close to RU2
HM76@ U3TXDP0_L 5 6 U3TXDP0_L USB20_N0 7 2 USB20_N0_U
15 USB20_N0 TDM DM

SLG55566
1 2
1 2 USB20_P0 USB20_P0_U RU11 @
3 15 USB20_P0 6 3
HM76@ LU1 TDP DP 0_0402_5%
CU12 USB3_TX0_N_C RU4 U3TXDN0_L 8 5 4 20 mil CHG_MODE1
15 USB3_TX0_N +5VALW VDD GND CHG_MODE1 29
@ 0_0402_5% 1
0.01U_0402_25V7K AZ1045-04F_DFN2510 C892 9
.1U_0402_16V7K Thermal Pad RU10
SLG55566VTR_TDFN8_2X2 0_0402_5%
@ RU7 U3RXDP0_R_L 2
15 USB3_RX0_P DU2
0_0402_5%
WCM-2012-121T_0805 USB20_P0_U_L 2
4 3 1
4 3 USB20_N0_U_L 3
HM76@
1 2
1 2 L30ESDL5V0C3-2_SOT23-3
LU2 @
RU6 U3RXDN0_R_L
15 USB3_RX0_N
@ 0_0402_5%
2 2
SLG55566 (Pin4 to GND) SLG55584 (Symbol Pin4)
USB20_P0_U RU9 @ USB20_P0_U_L CB CB
SELCDP SELCDP
0_0402_5% CHG_MODE0 STATUS CHG_MODE0 STATUS
WCM-2012-900T_0805 CHG_MODE1 CHG_MODE1
3 3
4 4
0 AUTO MODE 0 X AUTO MODE
2 2 1 1 Pass-Through (USB) Mode: Pass-Through (USB) Mode:
1 Connect DP/DM to TDP/TDM 1 0 Connect DP/DM to TDP/TDM
LU3
USB20_N0_U RU8 USB20_N0_U_L S0 Charging with CDP or SDP only
0_0402_5% @ 1 1 (depending on external device)

USB3.0 Port 1
USB3.0 Port1
Port 1 : Left USB3.0

3 3

HM76@
CU13 USB3_TX1_P_C @ RU17 U3TXDP1_L
15 USB3_TX1_P
0_0402_5%
0.01U_0402_25V7K WCM-2012-121T_0805
4
4 3 3 DU3 HM76@
HM76@ U3RXDN1_R_L 1 10 U3RXDN1_R_L @ JUSB32
1 1 2 2 +USB30_VCCP0 1 VBUS
U3RXDP1_R_L 2 9 U3RXDP1_R_L U2DN1_L 2 D-
HM76@ LU4 U2DP1_L 3
CU14 USB3_TX1_N_C RU15 U3TXDN1_L U3TXDN1_L U3TXDN1_L D+
15 USB3_TX1_N 4 7 4 GND
@ 0_0402_5% U3RXDN1_R_L 5 StdA-SSRX-
0.01U_0402_25V7K U3TXDP1_L 5 6 U3TXDP1_L U3RXDP1_R_L 6 StdA-SSRX+ 10 USB30_GND
GND USB30_GND
7 GND-DRAIN 11
U3TXDN1_L GND USB30_GND
3 8 StdA-SSTX- 12
@ RU16 U3RXDP1_R_L U3TXDP1_L GND USB30_GND
15 USB3_RX1_P 9 StdA-SSTX+ 13
0_0402_5% 8 GND
WCM-2012-121T_0805 LOTES_AUSB0015-P001A
4 AZ1045-04F_DFN2510 RU18
4 3 3 0_0603_5%
HM76@
1 1 2 2 DU4
LU5 U2DN1_L 2
RU14 U3RXDN1_R_L 1
15 USB3_RX1_N
@ 0_0402_5% U2DP1_L 3

USB20_P1 RU13 @ U2DP1_L L30ESDL5V0C3-2_SOT23-3


15 USB20_P1 @
0_0402_5%
4 LU6 4
2 2 1 1

3 3 4 4

WCM-2012-900T_0805
USB20_N1 RU12 U2DN1_L
15 USB20_N1
0_0402_5% @ Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power share ENE3810
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Friday, January 13, 2012 Sheet 33 of 46
A B C D E
A B C D E

+5VALW to +5VS
+3VALW
+5VALW +5VS
Q5501
AO4478L 1N SO8
8 1
7 2 R5536

10U_0805_10V4Z

1U_0603_10V4Z
6 3 100K_0402_5%
5 C5503 C5504
C5501 C5502 R5501
10U_0805_10V4Z 10U_0805_10V4Z 470_0603_5%
40 0.75VR_EN#

+5VS_D

3
1 R5502 1
100K_0402_5% Q5520B
+VSBP

1
D

0.1U_0603_50V7K
Q5502 39,41 +V1.05S_VCCP_PWRGOOD 0.75VR_EN 5 2N7002DW-T/R7_SOT363-6
2 SUSP
1

D @ G R5535

4
C5505
SUSP 2 Q5503 R5522 S 2N7002_SOT23-3 100K_0402_5%

3
G 2N7002_SOT23-3 0_0402_5%

6
S Q5520A
3

2N7002DW-T/R7_SOT363-6

SUSP 2

1
+3VALW to +3VS
+3VALW +3VS +5VALW +5VALW
Q5504
AO4478L 1N SO8
8 1
7 2
6 3
5
C5506 C5507 C5508 C5509 R5507 R5506
10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 1U_0603_10V4Z 100K_0402_5% 100K_0402_5%
4

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6
SUSP SYSON#
5,40 SUSP

3
R5503
100K_0402_5% Q5511A Q5511B
2 +VSBP 2
0.1U_0603_50V7K

29,38,39 SUSP# 2 29,40 SYSON 5

0.1U_0603_50V7K
1

0.1U_0603_50V_X7R
@

4
C5510

SUSP 2 Q5506 R5523

C5520
G 2N7002_SOT23-3 0_0402_5% R5515 @ R5517

C5521
S 10K_0402_5% 10K_0402_5%
3

+1.5V To +1.5VS
AO3416_SOT23-3
+5VALW Q5525
+1.5V +1.5VS +3VALW to +3V_PCH
+5VALW
D

1 3
+3VALW
10U_0805_10V4Z

.1U_0402_16V7K

R5504 +3V_PCH
100K_0402_5%
JP5502

2
C5511

C5512
G
2

2 1 R5545
R5505 100K_0402_5%
@ PAD-OPEN 4x4m

1
Q5512
1

D
0.1U_0603_50V7K

47K_0402_5% @ 18 PCH_PWR_EN# PCH_PWR_EN#


SUSP 2 R5524 AO3413_SOT23
C5513

G Q5510 0_0402_5%

D
S SSM3K7002FU_SC70-3 3 1
3

1
D
2 Q5528

0.1U_0402_10V7K~D
29 PCH_PWR_EN

20K_0402_5%~D
G

G
2

1
1 S SB570020110

3
R5510
3 2N7002E-T1-E3_SOT23-3 3

C5528
PCH_PWR_EN# R5533 2 1 47K_0402_5% @ R5529
CHECK WITH CPU memory power 1
2
100K_0402_5%

2
0.1U_0402_25V6
C5529
2

support Erp lot 6


+V1.05S_VCCP +0.75VS
+1.5V +1.5VS +3VS +1.8VS

R5509
R5518 R5508 R5511 R5520
470_0402_5% R5525 22_0603_5%
470_0402_5% 470_0402_5% 470_0402_5% 22_0603_5%
+V1.05S_VCCP_D

+DDR_CHG
+1.5VS_D
+1.5V_D

+3VS_D

+1.8VS_D
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3
Q5514 Q5515 Q5518 Q5519 Q5521 @
1

1
D D D D D R5526 D

Q5516
SYSON# 2 SUSP 2 SUSP 2 SUSP 2 SUSP 2 2
5,9 RUN_ON_CPU1.5VS3#
G G G G G 0_0402_5% G
S S S S S R5527 S
3

3
SUSP
0_0402_5%
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC/DC Interface
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QAL30 LA-8061P MB
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 34 of 46
A B C D E
A B C D

PL1 For KB930 --> Keep PU1 circuit


DCIN jack P/N:DC301008L00, HCB2012KF-121T50_0805 PH1 under CPU botten side :
(Vth = 0.825V)
need doble confirm P/N with ME 1 2 VIN CPU thermal protection at 93 +-3 degree C
PL2 For KB9012 (Red square) --> Remove PU1 circuit, but keep PR56
HCB2012KF-121T50_0805 Recovery at 56 +-3 degree C
ADPIN 1 2
PH1, PR2, PQ1, PR7,PQ15,PR73,PR56
VL
@SINGA_4TRJW T-R2513
+3VALW_EC

1000P_0402_50V7K

1000P_0402_50V7K
100P_0402_50V8J

100P_0402_50V8J
1 1

1
29,36 ADP_I

@21.5K_0402_1%
2 2

1
PC1

PC2

PC3

PC5

@12K_0402_1%

13.7K_0402_1%
3 3

1
1 1

PR3
4

2
4

PR2

PR56
1
PJPDC1 PC4 +3VS

2
@0.1U_0603_16V7K PU1

2
1 VCC TMSNS1 8

2
OTP_N_002

@100K_0402_1%
2 GND RHYST1 7 2 1

PR5
PR4
3 6 @10K_0402_1%
5,29 H_PROCHOT# OT1 TMSNS2 PR6

100K_0402_1%
ADP_OCP_2 1

@SSM3K7002FU
4 5 2

1
OT2 RHYST2

PH1
PQ1

1
D

PC6
@G718TM1U_SOT23-8 @29.4K_0402_1%

PR7
2ADP_OCP_1

10K_0402_1%

@0.1U_0402_10V7K
OTP_N_003

29

29
VCIN1_PH

VCIN0_PH
G

2
S 2 1 EN0 37

2
1
PR73 PR10 @0_0402_5%
0_0402_5%
1 2 2 1 VCOUT0_PH 29,37
29 VCOUT1_PH
PR9 @0_0402_5%

PL3 B+
3 1
+VSBP
HCB2012KF-121T50_0805

100K_0402_1%

0.1U_0603_25V7K
0.22U_0603_25V7K
1
VMB 1 2

1
PC8

PC9
PR13
PL4
2
PJP1 HCB2012KF-121T50_0805 2

1 1 2 BATT+

2
1
2

2
2
3 3
4 BATT_B/I
VL PR14
PQ3
TP0610K-T1-E3_SOT23-3
4

1
5 22K_0402_1%
5 PC16 PC17 VSB_N_001
6 6 1 2

1VSB_N_003
7 1000P_0402_50V7K 0.01U_0402_25V7K

2
7
1

8 PR16
8 PR30 100K_0402_1%
9 9
10 1K_0402_1%
G1 PR18
11
EC_SMCA

EC_SMDA

TS_A

1
G2 0_0402_5% D
2

@SUYIN_200275MR009G180ZR
37 SPOK 1 2VSB_N_002 2 PQ4
G SSM3K7002FU_SC70-3

.1U_0402_16V7K
S

3
1

PC10
1

PD6 PD7
2

2
1
3

PJSOT24CW _SOT323-3 PJSOT24CW _SOT323-3 PR32


2

2 1 +3VL
6.49K_0402_1%
1

PR35
1K_0402_1%
2
2

3 3

PR36 PR37
BATT_TEMPA 29
100_0402_1% 100_0402_1%
1

EC_SMB_DA1 29,36

EC_SMB_CK1 29,36

RTC Battery

- PBJ1 + PR21
560_0603_5%
PR22
560_0603_5%
2 1 +RTCBATT1 1 2+RTCBATT2 1 2

+RTCBATT
@MAXEL_ML1220T10
Must close PBJ1
4 4

SP093MX0000
Change RTC For Cost Down

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title
PWR-DCIN / BATT CONN / OTP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS PBL22 LA-7391P M/B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 35 of 46
A B C D
A B C D

for reverse input protection

1
PQ106 D
BQ24725_PROT 2
G SI1304BDL-T1-E3_SC70-3
S

3
1 1
PR103 PR104
1 2 1 2
PQ103
1M_0402_5% 3M_0402_5% P2 P3 MDU1516URH_POWERDFN56-8-5

PL102 PR101 1
1UH_VMPI0703AR-1R0M-Z01_11A_20% 2
VIN P1 0.02_2512_1% 5 3
PQ101 PQ102

0.01U_0402_50V7K
TPCA8057-H 1N PPAK56-8 B+

@0_0402_5%
SI4128DY-T1-GE3

1
1 1 8 1 2 1 4

PR106
4
2 2 7

PC114
2200P_0402_25V7K

1
VIN

10U_0805_25V6K

10U_0805_25V6K

@10U_0805_25V6K
5 3 3 6 2 3

0.1U_0402_25V6

@820P_0402_25V7
10U_0805_25V6K

@10U_0805_25V6K
@0_0402_5%

0.1U_0402_25V6
5

PC101

PC120
1

1
PC111

PC105

PC104
2200P_0402_50V7K

10U_0805_25V6K
PR105

PC102

2
1

PC129

PC130

PC103
PC110
4

2
PC112 BQ24725_BATDRV 1 2 BQ24725_BATDRV_1

2
1

PD101

2
PR107

BQ24725_VCC1 1
BAS40CW_SOT323-3 4.12K_0603_1%
2

BQ24725_ACDRV_1

0.1U_0402_25V6
0.1U_0603_25V7K
PQ107

1
TP0610K-T1-E3_SOT23-3

PC115
1
PC113

PC117
BQ24725_VCC1 3 1BQ24725_VCC2

2
1 2

1BQ24725_VCC2
2

PR112 0.1U_0402_25V6
2

100K_0402_1% 0.047U_0402_25V7K

4.12K_0603_1%

4.12K_0603_1%
PC116
1

1
PC131 1 2BQ24725_BST1

PR108

PR109
1

PR113 0.22U_0603_25V7K

5
10_1206_1%

0_0603_5%
2 1 2 BQ24725_VCC_EN 2

PR110

PR111
PD102 PQ104
1BQ24725_VCC_EN1

RB751V-40_SOD323-2 AON7408L 1N DFN


2

22K_0402_1% 2
1
0_0402_5%

BQ24725_VCC 2

BQ24725_BST 2

BQ24725_REGN 2
PR124

DH_CHG 1 2DH_CHG1 4
PR125

BQ24725_LX
BQ24725_ACP
PL101 BATT+
0_0402_5%

DH_CHG
PC118
2

PC119 4.7U 20% VMPI0703AR-4R7M-Z01 5.5A PR102

BQ24725_ACN
1 2

3
2
1
D 0.02_1206_1%
1 2
GREEN_LATCH# 2 PQ108 BQ24725_LX 1 2CHG_OUT 1 4
G SSM3K7002FU_SC70-3 1U_0603_25V6K 1U_0603_25V6K

@4.7_1206_5%
20

19

18

17

16
S 2 3
3

CSOP1
PU101 PQ105

2200P_0402_50V7K

0.01U_0402_50V7K
CSON1
1
VCC

REGN
BTST
PHASE

HIDRV

PR114

10U_0805_25V6K

10U_0805_25V6K
@820P_0402_25V7
21
PAD

0.1U_0402_25V6

0.1U_0402_25V6

PC108

PC109
PC106

PC107
1

1
PC128
1 15 DL_CHG 4
ACN LODRV

PC121

PC122
2

2
Vin Dectector 2 14

1BQ24725_SNUB
ACP GND PR115 AON7406L_DFN8-5

3
2
1

2
BQ24735RGRR QFN 20P PWM 10_0603_1%
BQ24725_CMSRC SRP1
2 CSOP1
Min. Typ Max. 3
CMSRC SRP
13

1
PR116
H-->L 17.23V 6.8_0603_1%

@680P_0402_50V7K
BQ24725_ACDRV 4 12 SRN 1 2 CSON1

2
L--> H 17.63V ACDRV SRN

0.1U_0603_16V7K

PC123
PR117

PC124
+3VALW 1 2BQ24725_ACOK 5 11 BQ24725_BATDRV

2
ACOK BATDRV
ILIM and external DPM

ACDET
@10K_0402_1%

IOUT

SDA

SCL

ILIM
PR126
3.97A 1 2
+3VL +3VL

10
1M_0402_1%
PR118 PR119
BQ24725_ILIM
For KB930 --> Keep PR117 1 2 1 2
3 3

0.01U_0402_25V7K
14,29 ACIN

100K_0402_1%
10K_0402_1% 140K_0402_1%
For KB9012 (Red square) --> Remove PR117

1
VIN

PC125
PR121

1
Keep PR126 PR120

BQ24725_IOUT
BQ24725_ACDET

1 2BQ24725_PRECHG

2
154K_0402_1%

2
255K_0402_1%
1

PR122

29VIN GREEN_PWR3 +3VL

@0.1U_0402_10V6K
2

309K_0402_1%
2

1
PC135
0.1U_0402_25V6

PR144
66.5K_0402_1%

EC_SMB_CK1 29,35

2
1

PC126

5
PR128 PU104
PR123

5
PR127 10K_0402_5% PU106

VCC
2

5
100_0402_5% GREEN_PWR3 1 2 GREEN_PWR4 1 PU105 1

P
EC_SMB_DA1 29,35 IN1 INB
4GREEN_PWR1 1 4

P
OUT INB O

2
PR145 EC_SET1 2 4 GREEN_PWR2 2

GND
2

IN2 O INA

G
2 1 2

0.1U_0402_10V7K
ADP_I 29,35 INA

G
74LVC1G02_04_SOT353

47K_0402_1%

3
PC127 .1U_0402_16V7K MC74VHC1G08DFT2G_SC70-5 74LVC1G02_04_SOT353

3
1
PC136
1
+3VL

2
Please locate the RC GREEN_LATCH1

2
Near EC chip

2
PR129 PR142 @0_0402_5%
10K_0402_1% 1 2 PR139
29 GREEN_PWR 0_0402_5%

2
1
GREEN_LATCH#

1 2 PR143

1
GREEN_LATCH#
100K_0402_5%
PR130
4 0_0402_5% 4

1
1
D PR146
PQ109 2 GREEN_LATCH2 1 2
SSM3K7002FU_SC70-3 G
S @0_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CHARGER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS PBL22 LA-7391P M/B 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 36 of 46
A B C D
A B C D E

2VREF_51125

1
PC308
1U_0603_16V6K

2
1 1

PR301 PR305
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2

PR302 PR306
B+ B++
20K_0402_1% 20K_0402_1%
FB_3V FB_5V 1 B++
PL301 1 2 2
HCB2012KF-121T50_0805

1 2 +3VLP

ENTRIP2

ENTRIP1
PR303 PR307
2200P_0402_50V7K

2200P_0402_50V7K

10U_0805_25V6K
0.1U_0402_25V6

0.1U_0402_25V6
154K_0402_1% 154K_0402_1%
1

1
4.7U_0805_25V6-K

1 2 1 2
1

1
PC309

PC310

PC311

PC312
PC304

PC306
2

2
6

1
PU301
2

5
ENTRIP2

FB2

TONSEL

FB1

ENTRIP1
REF
1
PC313 PQ305
PQ303 4 10U_0805_6.3V6M 25
P PAD MDV1528URH 1N PDFN33-8

2
MDV1528URH 1N PDFN33-8
7 24 4
VO2 VO1

1
2
3

UG_3V_1
PC314 8 23 PR309 PC315
VREG3 PGOOD

UG_5V_1
0.1U_0402_10V7K PR308 2.2_0402_5% 0.1U_0402_10V7K
1 2 BST1_3V 1 2 BST_3V 9 22 BST_5V 1 2 BST1_5V 1 2

3
2
1
2 PR316 2.2_0402_5% BOOT2 BOOT1 PR318 2
PL303 1 2 UG_3V 10 21 UG_5V 1 2 PL305
4.7UH_FMJ-0630T-4R7 HF_5.5A_20% 0_0402_5% UGATE2 UGATE1 0_0402_5% 4.7UH_FMJ-0630T-4R7 HF_5.5A_20%
2 1 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
1

1
@4.7_1206_5%

@4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1
PR312

PQ304 PQ306

SKIPSEL

PR313
VREG5
1
150U_B_6.3VM_R35M

PR314 1

GND

VIN

150U_B_6.3VM_R35M
PC303

NC
499K_0402_1%

EN
2

PC305
4 1 2 4 +
51125_PWR SPOK 35
1 SNUB_3V

SNUB_5V
13

14

15

16

17

18
2 RT8205LZQW(2)_WQFN24_4X4
EN0 2
AON7406L_DFN8-5 35 EN0
1
2
3

3
2
1
@680P_0402_50V7K

@680P_0402_50V7K
VL DMS3014SFG-13 1N

1
PC316

PC317
PR315
95.3K_0402_1% PC320
2

1U_0603_10V6K

2
1
PC318
4.7U_0805_10V6K

2
1
51125_PWR
PC319

2
0.1U_0603_25V7K
ENTRIP1

ENTRIP2

2VREF_51125

3 PJP305 3

+5VALWP 1 2 +5VALW (5A,200mils ,Via NO.= 10)


6

D D
PQ307A 2N_3_5V_001 5 PQ307B
PAD-OPEN 4x4m
SSM6N7002FU_US6 G G SSM6N7002FU_US6
PJP303
S S 1 2 +3VALW (4A,120mils ,Via NO.= 8)
1

+3VALWP
B+ PR310 51125_PWR PAD-OPEN 4x4m
0_0603_5%
2 1 51125_PWR1 1 2
PR322 Vin PD302

1
2.2K_0402_1% PD301
1 2 PR317 2 1 1SS355_SOD323-2 PD303
29,31 EC_ON 1 2 VL GLZ27D_LL34-2
+3VLP +3VL
PR321 100K_0402_5%
1SS355_SOD323-2
51125_PWR2

1 2 PJP304
29,35 VCOUT0_PH

2
0_0402_5% 2 1
BATT+
1

D PR311 PAD-OPEN 2x2m


PD304
N_3_5V_002
2 PQ308 100_0805_5%
G SSM3K7002FU_SC70-3 2 1 1 2
1U_0805_25V7K

S
3

+3VLP +CHGRTC
1SS355_SOD323-2
1

PC321

PJP302
2 1
1
2

PC322 PAD-OPEN 2x2m


0.1U_0603_25V7K
2

VL
4 PJP301 4
2 1

PAD-OPEN 2x2m
For KB930 --> Keep PR319, Remove PR322
For KB9012 (Red square) --> Remove PR319
Keep PR322 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-3.3VALWP/5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom QAL30 LA-8061P MB 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 37 of 46
A B C D E
A B C D

1 1

PL402
PU401 PL401

4
+3VALW HCB1608KF-121T30_0603 PH041H-1R0MS 3.8A
1 2 VIN_1.8VSP 10 2 LX_1.8VSP 1 2

PG
PVIN LX +1.8VSP

68P_0402_50V8J
9 PVIN LX 3

1
4.7_1206_5%
1

1
PC404
PC403 8 SVIN

PR403
22U_0805_6.3VAM PR401
6 20K_0402_1%

2
FB

22U_0805_6.3VAM

22U_0805_6.3VAM
5

2
EN

1
NC

NC
TP

PC401

PC402
FB_1.8VSP
29,34,39 SUSP#

11

2
SNUB_1.8VSP
2
1 2 EN_1.8VSP 2

1
1
PR404 0_0402_5%

@0.1U_0402_10V7K
PC405
SY8033BDBC_DFN10_3X3 PR402

1
PR405 10K_0402_1%
@47K_0402_5%

2
2

680P_0402_50V7K
PC406
2
PJP401

+1.8VSP 1 2 +1.8VS (3A,120mils ,Via NO.= 6)


PAD-OPEN 4x4m

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-1.8VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS PBL22 LA-7391P M/B 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 38 of 46
A B C D
5 4 3 2 1

PL702
HCB1608KF-121T30_0603
+1.05VSP_B+ 2 1
B+

2200P_0402_50V7K

10U_0805_25V6K

4.7U_0805_25V6-K
0.1U_0402_25V6
D D

1
PC705
+3VS

PC704

PC702

PC703
2

2
5
2
PQ701
PR712
10K_0402_5%
PC706
0.22U_0402_10V6K 4
PR703

1
1 2 BST1_+1.05VSP 1 2
34,41 +V1.05S_VCCP_PW RGOOD 2.2_0402_5%
PU701
1 10 BST_+1.05VSP MDV1528URH 1N PDFN33-8

3
2
1
PGOOD VBST
PR704 PR711
1 2 TRIP_+1.05VSP 2 9 UG_+1.05VSP 1 2 UG_+1.05VSP1 PL701
TRIP DRVH 0.47U 20% FDVE0630-H-R47M
180K_0402_1% 0_0402_5%
EN_+1.05VSP 3 EN SW 8 SW _+1.05VSP 1 2 +1.05VSP

5
PR705 FB_+1.05VSP 4 7
0_0402_5% VFB V5IN
+5VALW

1
1 2 RF_+1.05VSP 5 6 LG_+1.05VSP 1
29,34,38 SUSP# TST DRVL PQ702

220U_6.3VM_R15
1
PR706 +

PC701
TP 11
1

PC707 4 DMS3014SFG-13 1N 4.7_1206_5%


1

TPS51212DSCR_SON10_3X3 1U_0603_10V6K

SNUB_+1.05VSP2
PC708 PR707 2
@0.1U_0402_16V7K 470K_0402_1%
2

3
2
1
C C

1
PC711

1
PC710 PC709 0.1U_0402_10V7K

2
@1000P_0402_50V7K
PR709 680P_0402_50V7K
1 2 +1.05VSP1 1 2 +1.05VSP

2
@1.2K_0402_1%
PR708
PR701 4.99K_0402_1% 100_0402_1%
2 1 VCCIO_SENSE1 2 1 VCCIO_SENSE 8
2

PR702
10K_0402_1%
1

PJP701
1 2

PAD-OPEN 4x4m
PJP702

+1.05VSP 1 2 +V1.05S_VCCP
B B
PAD-OPEN 4x4m (12A,480mils ,Via NO.= 24)

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/12/31 Title
2011/05/23 Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-V1.05SP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom PBL22 LA-7391P M/B 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 39 of 46
5 4 3 2 1
5 4 3 2 1

PL502
PL501

4
+5VALW HCB1608KF-121T30_0603 PU501 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2 1.5V_B+ 10 2 LX_+1.5VP 1 2

PG
PVIN LX +1.5V
9 PVIN LX 3

4.7_1206_5%
1
PC502 8
22U_0805_6.3VAM SVIN

PR502
D D
6 FB_+1.5VP

2
FB
5

22U_0805_6.3VAM

22U_0805_6.3VAM

22U_0805_6.3VAM

22U_0805_6.3VAM
2
EN

1
SS
TP

LX
SY8036LDBC DFN

PC501

PC503

PC504

PC505
11

2
SNUB_+1.5VP
1 2 EN_1.5V
29,34 SYSON

PC507
1

1
PR501 0_0402_5%

@0.1U_0402_10V7K
PC506
PR504

1
PR503

2
@47K_0402_5% 2 1

2
15.4K_0402_1%

680P_0603_50V7K
@0.1U_0402_10V7K

PC508
PC509

2
1
2 1

PR505
10K_0402_1% 68P_0402_50V8J

+1.5V
(6A,240mils ,Via NO.= 12)

C C

+1.5V
PU602
1 VIN NC 8 +3VALW
2 GND NC 7
1

1
PC602 3 6
VREF VCNTL

1
4.7U_0805_6.3V6K
2

PR603 PC610
4 VOUT NC 5
1K_0402_1% 1U_0603_10V6K

2
9

2
PR607 TP
0.75VR_EN# 2 1 APL5336KAI-TRL_SOP8P8
34 0.75VR_EN# VREF_5336
@0_0402_5%

0.1U_0402_16V7K
PQ605 1
+0.75VS
SSM3K7002FU_SC70-3
D
1

PR608 PR609

1
2 10.75VS_N_002 2 1K_0402_1%
B G PC609 B
2

10U_0805_6.3V6M

PC608
S
3

2
0_0402_5%
5,34 SUSP
1

PC607
2

@0.1U_0402_10V7K

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/12/31 Title
2011/05/23 Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-1.5VP / +0.75VSP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom PBL22 LA-7391P M/B 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 40 of 46
5 4 3 2 1
5 4 3 2 1

VID [0] VID[1] VCCSA Vout


0 0 0.9V
D D
The 1k PD on the VCCSA VIDs are empty. 0 1 0.8V
+3VS These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability. 1 0 0.725V
1 1 0.675V
PR802

100K_0402_5%
1K_0402_5%
output voltage adjustable network

1
2 1

PR803
H_VCCSA_VID1 9

2
+VCC_SAP
H_VCCSA_VID0 9
TDC 4.2A
29 SA_PGOOD
PR804 Peak Current 6A
1K_0402_5%
2 1 OCP current 7.2A

1U_0603_10V6K
+5VALW

2
PC807
+VCCSA_V5FILT1
PR805 PR806
10_0402_1% 0_0402_5%
2 1 +VCCSA_EN 1 2

@0.1U_0402_10V7K
+V1.05S_VCCP_PWRGOOD 34,39
PC808
2.2U_0603_10V7K

1
1 2

PC809
C C

2
18

17

16

15

14

13
PU801
PR807 PC810

VID1

VID0
PGOOD

EN
V5FILT
V5DRV
2.2_0603_5% 0.22U_0603_16V7K
12 +VCCSA_BT 1 2+VCCSA_BT_1 1 2
BST PL801
19
PGND 0.47UH_PCMB042T-R47MN_6A_20%
SW
11 +VCCSA_PHASE 1 2 +VCCSA
20
PGND

22U_0805_6.3V6M
1
10

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
SW
2200P_0402_50V7K

21 PR808
0.1U_0603_25V7K

PGND

2
4.7_1206_5%

PC801

PC802

PC803

PC804
10U_0805_10V6M

10U_0805_10V6M

TPS51461RGER_QFN24_4X4 9
SW
22
PC812

SNUB_VCCSA 2

1
VIN
2

2
PC805

PC806
PC811

8
SW
23
1

2 VIN
PL802
7
+5VALW 1 2 +VCCSA_PWR_SRC 24
VIN
SW

25
HCB1608KF-121T30_0603 TP

COMP

MODE

1
SLEW

VOUT
VREF
PC813
GND

1000P_0402_25V8J

2
1

6
PR809
+VCCSA_MODE 2 1

@33K_0402_5%
+VCCSA_COMP

+VCCSA_SLEW

PR810
100_0402_5%
PC814 +VCCSA_VOUT 2 1
2 1 +VCCSA_VREF
B B
0.22U_0402_10V6K
PR811
2 1+VCCSA_COMP1 2 1 0_0402_5%
2 1
0.01U_0402_25V7K

+VCCSA_SENSE 9
PC815 PR801
2

3300P_0402_50V7K 10K_0402_5%
PC816

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/12/31 Title
2011/05/23 Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-VCC_SAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C PBL22 LA-7391P M/B 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 41 of 46
5 4 3 2 1
5 4 3 2 1

+5VS 1 2 CSP1A DIS only:


PR272 @0_0402_5%
CSP1A, CSP2A to +5VS. All AXG components are @.
Except
PR272 and PR273 are 0ohm.
LGA, SWA, HGA, BSTA, DIFFA, TRBSTA#, ILIMA, PWMA are float.
PC223, PC226, PR202 are 0ohm.
VSPA, VSNA to GND (HW side). FBA and COMPA are short. PC220, PC215, PR206 are 0ohm.
CSREFA, TSNSA, IOUTA to GND. CSCOMPA, CSSUMA, DROOPA are short.

D D

@330P_0402_50V7K
PC214

1000P_0402_50V7K
<BOM Structure>
1 PR201 2 FBA3 1 2 PC213 1 2
PUT COLSE

75K_0402_1%
10_0402_1% 0.033U_0402_16V7K .1U_0402_16V7K
TO GT

1
PR204 1 PR202 2

PC215

PC216

PR205
TRBSTA# 1 PR203
2 FBA1 1 2 PH203 Inductor
2P: 24K 24.9K_0402_1% PR206 PC218

1
1
8.06K_0402_1% 806_0402_1% 220K_0402_5%_ERTJ0EV224J CSCOMPA 1 2 DROOPA 1 2 CSREFA
<BOM Structure> PC217 1P: 24.9K <BOM Structure>

2
PR207 PC219 PC220 2 PR208 1 NTC_PH203 1K_0402_1% 1000P_0402_50V7K

2
0.015U_0402_16V7K 1 2 FBA2 1 2 1 2 165K_0402_1%
10_0402_1% 2P: 1.65K
680P_0402_50V7K PR210 10P_0402_50V8J PC221
1 PR209 2 <BOM Structure> 1 2 COMPA1 1 2 1P: 1K
1K_0402_1% 5.11K_0402_1% 1500P_0402_50V7K CSREFA
PC222 TSENSEA

2
1 PR212 2 SW1A 0.047U_0402_16V7K

2P: 21.5K 113K +-1% 0603 PR213 5.49K_0402_1%

1
CSP1A 1 2 SW1A
1P: 15.8K

2
DROOPA 15.8K_0402_1%
PC223
9 VCC_AXG_SENSE

2
8.25K_0402_1%
1000P_0402_50V7K

1PR214

1
PC224 PH204
CSREFA 43

PR215
1000P_0402_50V7K

1
+5VS 100K_0402_1%_TSM0B104F4251RZ
9 VSS_AXG_SENSE
PC226

1
CSP1A
CSCOMPA
1 2

TRBSTA#

CSSUMA
CSREFA

TSENSEA
COMPA
IMONA
FBA
.1U_0402_16V7K

DIFFA

ILIMA
C C
PR218 2P: 36K
1 2
1P: 26.1K PUT COLSE
26.1K_0402_1%

61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
+5VS 1 PR219 2 PU201 TO V_GT
2_0603_5% HOT SPOT

VSNA
VSPA
DIFFA

FBA
COMPA
IOUTA
ILIMA
DROOPA
CSCOMPA
CSSUMA
CSREFA
CSP2A
CSP1A
TSNSA
PAD

TRBSTA#
+V1.05S_VCCP PC228
1 2 6132_VCC
.1U_0402_16V7K

.1U_0402_16V7K

1 45 PR223 PC227
2.2U_0603_10V7K VCC PWMA BSTA1
2 44 1 2 BSTA1_11 2
VDDBP BSTA
130_0402_1%

54.9_0402_1%

PR222 3 43 2.2_0603_5% 0.22U_0402_10V6K


VRDYA HGA HG1A 43
1

PR220 2

1 2VR_ON_CPU 4 42
29 VR_ON EN SWA SW1A 43
PR221

PC229 PC230 0_0402_5% VR_SVID_DAT1 5 41 PC231


SDIO LGA LG1A 43
VR_SVID_ALRT# 6 40 BST2 1 PR224 2 BST2_1 1 2
2

PR227 PR225 VR_SVID_CLK ALERT# BST2 2.2_0603_5% 0.22U_0402_10V6K


7 39 HG2 43
0_0402_5% 95.3K_0402_1% SCLK HG2
1 2 VBOOT 8 38 SW2 43
1

VBOOT SW2
8 VR_SVID_DAT 1 PR226 2VR_SVID_DAT1 1 2 10K_0402_1% ROSC_CPU 9 NCP6132AMNR2G_QFN60_7X7 37 LG2 43
PC232
ROSC LG2 PR228 2
8 VR_SVID_ALRT# CPU_B+ 1 2 VRMP 10
VRMP
<BOM Structure>
PVCC
36 6132P_VCCP 1 1 2
VR_HOT# 11 35 0_0402_5% 2.2U_0603_10V7K
8 VR_SVID_CLK VRHOT# PGND
0.01U_0402_25V7K

PR230 1K_0402_1% VGATE 12 34


VRDY LG1 LG1 43 +5VS
1

13 33 SW1 43
+V1.05S_VCCP PC233 14
VSN SW1
32 PC234
+3VS VSP HG1 HG1 43
DIFF_CPU 15 31 BST1 1 PR231 2 BST1_1 1 2

CSCOMP
2

DIFF BST1

TRBST#
2.2_0603_5% 0.22U_0402_10V6K

DROOP

CSSUM

DRVEN
CSREF
1

COMP

TSNS
CSP3
CSP2
CSP1

PWM
IOUT
ILIM
1

PR232
@75_0402_1% PR233 FB
10K_0402_5%
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
3P: 73.2K
2

1 PR234 2
29 VR_HOT# 2P: 41.2K
COMP_CPU
2

41.2K_0402_1%
FB_CPU
TRBST#

14,29 VGATE
DROOP

TSENSE
ILIM_CPU

8 VSSSENSE 3P: 22p


1

IMON

PC235 2P: 10p


B 1000P_0402_50V7K B
2

PC236
8 VCCSENSE
2
PR239 12.4K_0402_1%

1 2
.1U_0402_16V7K

PC238 CSP1 TSENSE


3P: 330p 1 PR240 2 2 1 CSP2 +5VS
1

1K_0402_1% CSP2 1 PR241 2 SW2


2P: 1000p

1
10P_0402_50V8J
PC239 5.49K_0402_1%
PR242 PC240 PR243 PC241 3P: 21K 0.047U_0402_16V7K

2
1 2FB_CPU1 1 2 2 1COMP_CPU1 2 1 CSREF
PR244 PC242 49.9_0402_1% 2P: 12.4K

8.25K_0402_1%
1 2FB_CPU3 1 2 560P_0402_50V7K 6.34K_0402_1% 1200P_0402_50V7K

PR246 1

2
10_0402_1% 3P: 6.04K CSP1 1 PR245 2 SW1
CSREF 43
CSCOMP

1
0.033U_0402_16V7K 5.49K_0402_1% PH202
PR247 PR248 2P: 4.32K PC243 PC244
TRBST# 1 2 FB_CPU2 1 2 1000P_0402_50V7K 3P: 1500p 0.047U_0402_16V7K 100K_0402_1%_TSM0B104F4251RZ
1

2
0.015U_0402_16V7K

CSREF
2P: 1200p

1
1

8.06K_0402_1% 806_0402_1%
<BOM Structure> PC245
CSSUM
2

PC246
1 2
1000P_0402_50V7K 1 PR249 2 SW1
24.9K_0402_1%

<BOM Structure> 191K +-1% 0603 PUT COLSE


2

.1U_0402_16V7K

TO VCORE
PC247

3P: 23.7K 1 2 PC248 1 PR251 2 SW2


330P_0402_50V7K
PR250

2P: 24.9K
191K +-1% 0603 HOT SPOT
1

1 PR252 2NTC_PH201 1 PR253 2


1

75K_0402_1%
PR255 PC249 165K_0402_1%
CSCOMP 1 2 DROOP 1 2 CSREF PH201
A PUT COLSE A
1K_0402_1% 1000P_0402_50V7K 2 1
3P: 806 TO VCORE
2P: 1K Phase 1 220K_0402_5%_ERTJ0EV224J
Inductor

Security Classification
2011/05/23
Compal Secret Data
2012/12/31 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CPU_CORE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom PBL22 LA-7391P M/B 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 42 of 46
5 4 3 2 1
5 4 3 2 1

CPU_B+ PL206 CPU_B+


HCB2012KF-121T50_0805
2 1

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
B+

2200P_0402_25V7K

2200P_0402_25V7K
0.1U_0402_25V6

0.1U_0402_25V6
5

5
100U_25V_M PL207

220P_0402_25V8J

220P_0402_25V8J
PC211 HCB2012KF-121T50_0805

1
PQ201 PQ203

PC262

PC201

PC202

PC250

PC251

PC264

PC203

PC204

PC252

PC253
2 1 CPU_B+
1 1
PR274 PC209 PR275
+VCC_CORE

2
1
10U_0805_25V6K
1 2 HG1_1 4 + + 1 2 HG2_1 4
D 42 HG1 42 HG2 D
0_0603_5% PC212 0_0603_5%
@100U_25V_M +VCC_CORE

2
2 2
S TR MDU1516URH 1N POWERDFN56-8 PL201 S TR MDU1516URH 1N POWERDFN56-8 PL202

3
2
1

3
2
1
0.36UH 20% FDUM0640J-H-R36M 0.36UH 20% FDUM0640J-H-R36M

42 SW1 1 2 42 SW2 1 2

1
5

5
PQ202 PR256 <BOM Structure> PQ204 PR257 <BOM Structure>
4.7_1206_5% 4.7_1206_5%

2
PR258 PR259
4 2 1 4 2 1CSREF

1SNUB_CPU1

SNUB_CPU2
42 LG1 CSREF 42 42 LG2
10_0402_1%
10_0402_1%

SK8603020L 1N SW1 SK8603020L 1N SW2

3
2
1

3
2
1
PC254
680P_0402_50V7K

1
PC255

2
680P_0402_50V7K

2
C C

CPU_B+
10U_0805_25V6K

10U_0805_25V6K

2200P_0402_25V7K
0.1U_0402_25V6

@220P_0402_25V8J
1

1
PC207

PC208

PC261

PC266

PC272
2

2
5

DC 35W CPU
VID1=1.05V
PR277
IccMax=53A
42 HG1A 1 2HG1A_1 4 PQ207 Icc_Dyn=43A
0_0603_5%
Icc_TDC=36A
R_LL=1.9m ohm
S TR MDU1516URH 1N POWERDFN56-8 PL204 +GFX_CORE OCP~65A
3
2
1

0.36UH 20% FDUM0640J-H-R36M

42 SW1A 1 2
1
5

B <BOM Structure> B
PR267
4.7_1206_5%
PQ208
2

42 LG1A 4
SK8603020L 1N
SNUB_GFX1

2 PR2711
CSREFA 42
3
2
1

10_0402_1%
1

PC271
SW1A
680P_0402_50V7K
2

DC 35W GT2
VID1=1.23V
IccMax=33A
Icc_Dyn=20.2A
A
Icc_TDC=21.5A A
R_LL=3.9m ohm
OCP~40A

Security Classification Compal Secret Data


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CPU_CORE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 13, 2012 Sheet 43 of 46
5 4 3 2 1

Compal Electronics, Inc.


5 4 3 2 1

+VCC_CORE Below is 458544_CRV_PDDG_0.5 Table 5-8.


+VCC_CORE +GFX_CORE
5 x 22 µF (0805)
1

1
PC1101 PC1102 PC1103 PC1104 PC1105
Socket Bottom 5 x (0805) no-stuff
10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M sites
2

2
D +GFX_CORE D

7 x 22 µF (0805)
Socket Top 2 x (0805) no-stuff
sites
1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1 1 1 1 1 1 1 1

PC1151

PC1152

PC1153

PC1154

PC1155

PC1156

PC1157

PC1158
PC1106 PC1107 PC1108 PC1109 PC1110
10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
2

2
2 2 2 2 2 2 2 2 +V1.05S_VCCP
+VCC_CORE +V1.05S_VCCP

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1

PC751

PC752

PC753

PC754

PC755

PC756

PC757

PC758

PC759

PC760

PC761
PC1111 PC1112 PC1113 PC1114 PC1115
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 2 2 2 2 2 2 2 2 2 2 2
2 2 2 2 2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1 1 1 1

PC1159

PC1160

PC1161

PC1162
2 2 2 2

22U_0805_6.3V6M
1 1

330U_D2_2V_Y

330U_D2_2V_Y
1 1 1 1 1

PC762

PC763

PC764
+ +
1
PC1116 PC1117 PC1118 PC1119 PC1120
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
C 2 2 2 2 2 2 2 C
2
1 1

330U_D2_2V_Y

330U_D2_2V_Y
PC1163

PC1164
+ +

2 2
1 1 1 1 1 1
PC1121 PC1122 PC1123 PC1124 PC1125 PC1126
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2

+VCC_CORE

1 1 1 1
+ PC1127 + PC1128 + PC1129 + PC1130
330U_D2_2V_Y 330U_D2_2V_Y 330U_D2_2V_Y 330U_D2_2V_Y

2 2 2 2

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR - PROCESSOR DECOUPLING
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QAL30 LA-8061P MB 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, January 12, 2012 Sheet 44 of 46
5 4 3 2 1
5 4 3 2 1

Power block
CPU OTP
Page 36
D Turn Off D

Input B+
DC IN +3VALWP
Switch Page 37 +5VALWP Always

RT8205LZQW(2) WQFN Page 38

CHARGER
CC:0A~3.64A +1.8VP SUSP#
CV:12.6V(6cell) SY8033BDBC
BQ24725RGRR Page 39

Page 57

C C
+VCCPP SUSP#

Battery APL5610CI Page 40

+V1.05SP SUSP#
TPS51212DSCR Page 41

+1.5VP SYSON
RT8207MZQW
Page 42

B B

+VCCSAP +V1.05S_VCCP_PWRGOOD
+VCC_CORE TPS51461RGER
VR_ON
ISL95832HRTZ-T Page 43

Page 44

+VCC_GFXCORE_AXG
VR_ON
A ISL95832HRTZ-T A

Page 44

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/23 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
POWER BLOCK DIAGRAM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QAL30 LA-8061P MB
Date: Thursday, January 12, 2012 Sheet 45 of 46
5 4 3 2 1
5 4 3 2 1

Version Change List ( P. I. R. List ) Page 1


Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
1 PR504 change from 15K to 15.4K

D D
2 charger IC change form bq24725A to bq24735

3 PQ104,PQ303,PQ305,PQ701 charge form SIS412DN to MDV1528URH

4 PQ306 charge from AON7702L to FDMC7692S

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2008/09/15 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR - PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QAL51, LA-7871P MB 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, January 12, 2012 Sheet 46 of 46
5 4 3 2 1
www.s-manuals.com

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