Compal La-6032p R1.0 Schematics

A B C D E
1 1
Compal confidential
2
Thin & Light 2
NDU01/NDU11 LA-6032P REV 1.0 Schematics Document

Mobile AMD ASB2/RS880M/SB820M
2010-03-22 Rev. 1.0
3 3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

2008/04/14 2009/04/14 Title
Issued Date Deciphered Date Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-6032P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 23, 2010 Sheet 1 of 45
A B C D E
A B C D E
Thermal Sensor Clock Generator

Compal Confidential Fan Control AMD ASB2 CPU
Memory BUS(DDRIII) ADM1032ARMZ page 7 SLG8SP626 page 16
page 5 Dual Channel
Model Name : NDU01(11.3)-S/NDU11(13.6)-M BGA-812 Package 1.5V DDRIII 800MHZ
200pin DDRIII-SO-DIMM X2
File Name : LA-6032P page 5,6,7,8
page 9,10
BANK 0, 1, 2, 3
1 Hyper Transport Link 2.6GHz 1
16X16
FUJIN OZ600FJ1
5IN1 5IN1
page 30
CRT
page 17
ATI PCIe port 1 page 30
PCIeMini Card
LCD Conn. WLAN (Slot 1)
page 18
RS880M PCIe 4x PCIe Port 2
1.5V 2.5GHz(250MB/s)
USB Port 8 page 26
HDMI Conn. RTL8105E RJ45

page 19 LAN 10/100M page 17
PCIe port 3 page 27
page 11,12,13,14,15
2 PCIeMini Card 2
A-Link Express II WWAN / 3G (Slot2)
4X PCI-E
USB Port 10 for 3G card
page 26
USB/B Right
USB port 0,1
page 29
SATA port 0 SATA HDD0
USB
5V 480MHz
ATI 5V 1.5GHz(150MB/s) page 25
BT conn Int. Camera

USB port 6 USB port 9
page 29 page 18 SB820M
SATA port 3
5V 1.5GHz(150MB/s)
eSATA
USB port 2 page 25
page 20,21,22,23,24 5V 480MHz
3
SPI ROM 3
page 34
HD Audio 3.3V 24.576MHz/48Mhz
LPC BUS
RTC CKT. Right USB&Audio/B 3.3V 33 MHz
HDA Codec
page 20
LS-6031P page 29 ALC259Q
Debug Port ENE KB926 D3 page 28
RJ45&VGA/B page 32 page 31
Power On/Off CKT. LS-6032P page 17
page 33
HD/B
SPI ROM GSENSOR Int.
DC/DC Interface CKT. LS-6033P page 25 Int.KBD MIC CONN MIC CONN HP CONN SPK CONN
page 32 page 32 page 32 page 18 page 29 page 29 page 29
page 34 LED/B
LS-6034P page 33
Power Circuit DC/DC Touch Pad BTN/B Touch Pad BTN/B EC G-Sensor Controller
4 4
page 37,38,39.40 SMBUS R5F211B4D34SP
41,42,43,44 LS-6035P(13.3) page 33 LS-6037P(11.6) page 33 page 32
PWR BTN
LS-6036P page 33
Security Classification
2008/04/14
Compal Secret Data
2009/04/14 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
Block Diagram
Custom LA-6032P 1.0
A B C D E
A B C D E
DESIGN CURRENT 0.1A +3VL

B+ DESIGN CURRENT 0.1A +5VL
DESIGN CURRENT 4.5A +5VALW
SUSP
N-CHANNEL DESIGN CURRENT 2A +5VS

SI4800BDY
+5VS
1 1
DESIGN CURRENT 300mA +3VS_HDP
LDO
G9191
SUSP#
DESIGN CURRENT 1.5A +1.8VS

MP2121DQ
TPS51125RGER
DESIGN CURRENT 1A +3VALW
SUSP
N-CHANNEL DESIGN CURRENT 4A +3VS

SI4800BDY
ENVDD
P-CHANNEL DESIGN CURRENT 1.0A +LCD_VDD

AO-3413
BT_PWR#
DESIGN CURRENT 180mA +BT_VCC
P-CHANNEL
AO-3413
2 2
WOL_EN#
DESIGN CURRENT 500mA +3V_LAN
P-CHANNEL
AO-3413
DESIGN CURRENT 300mA +2.5VS

LDO
APL5508
POK
DESIGN CURRENT 0.3A +1.1VALW

RT8209BGQW VGATE#
N-CHANNEL DESIGN CURRENT 6.5A +1.1VS

IRF8113PBF
VLDT_EN#
N-CHANNEL DESIGN CURRENT 7.6A +NB_CORE

IRF8113PBF
3 3
VR_ON
DESIGN CURRENT 15A +CPU_CORE0
ISL6265 DESIGN CURRENT 2A +VDDNB
SYSON
DESIGN CURRENT 7A +1.5V
RT8209BGQW SUSP
N-CHANNEL DESIGN CURRENT 1A +1.5VS

IRF8113PBF
SUSP
LDO DESIGN CURRENT 0.5A +0.75VS

G2992F1U
VR_ON#
LDO DESIGN CURRENT 1.5A +0.9V

G2992F1U
4 4

2008/04/14 2009/04/14 Title
Issued Date Deciphered Date Power Map
Custom LA-5381P 1.0
A B C D E
A B C D E
Symbol Note : For 11.6 and 13.3 DAZ

O MEANS ON X MEANS OFF ZZZ
Voltage Rails
: means Digital Ground : means Analog Ground
PCB-MB
@ : means just reserve , no build K125 mean 1.7G CPU K325 mean 1.3G CPU
+5VS K625R3@ : means just for 1.5G CPU
1 U1 K125R1@ U1 K325R1@ 1
+3VS K125R3@ : means just for 1.7G CPU
power K125 CPU K325 CPU
plane +2.5VS K325R3@ : means just for 1.3G CPU
+1.8VS K625R1@ : means just for 1.5G CPU K625 mean 1.7G CPU K125 mean 1.7G CPU K325 mean 1.3G CPU
+1.5VS K125R1@ : means just for 1.7G CPU U1 K625R3@ U1 K125R3@ U1 K325R3@
+1.1VS K125 CPU K125 CPU K325 CPU
B+ +5VALW +1.5V K325R1@ : means just for 1.3G CPU
+0.9VS M@ : means just reserve for 13.3 control
+3VL +3VALW
+0.75VS S@ : means just reserve for 11.6 control RS880M SB820M
+5VL +1.1VALW +NB_CORE
State GSENSOR@ : means just reserve for G sensor part
+RTCVCC +VDDNB U5 RS880MR3@ U7 SB820MR3@
RS880M SB820M
+CPU_CORE_0 1ST@ : means just reserve 1st G sensor IC
1STGSENSOR@ : means just reserve 1st G sensor IC
2ND@ : means just reserve 2nd G sensor IC
2NDGSENSOR@ : means just reserve 2nd G sensor IC
NOSIDE@ : means just reserve NOSIDE
S0 SIDE@ : means just reserve SIDE port
O O O O
RS880MR1@ : means just for RS880MR1
S1 RS880MR3@ : means just for RS880MR3
2
O O O O 2
SB820MR1@ : means just for SB820MR1
S3 SB820MR3@ : means just for SB820MR3
O O O X
S5 S4/AC
O O X X
S5 S4/ Battery only
O X X X
S5 S4/AC & Battery
don't exist X X X X
SB SM Bus1 Address SB SM Bus2 Address
Power Device HEX Address Power Device HEX Address

3 3
+3VS DDR SO-DIMM 0 A0 H 1010 0000 b +3VALW WLAN/WIMAX
+3VS DDR SO-DIMM 1 A4 H 1010 0100 b
+3VS Clock Generator D2 H 1101 0010 b
SMBUS Control Table
CPU
SOURCE BATT SODIMM CLK LCD HDMI
THERMAL GEN WLAN DDC DDC G-sensor
I / II
SENSOR ROM ROM
EC_SMB_CK1
KB926
EC_SMB_DA1 V
EC_SMB_CK2
KB926
EC SM Bus1 Address EC SM Bus2 Address EC_SMB_DA2 V V
I2C_CLK
RS880M
Power Device HEX Address Power Device HEX Address I2C_DATA V
DDC_CLK0
+3VL Smart Battery 16 H 0001 011X b +3VS CPU_ADM1032-1 98 H 1001 100X b RS880M
DDC_DATA0 V
+3VS G-Sensor SCL0
SB820
4
SDA0 V V 4
SCL1
SB820
SDA1 V
Issued Date 2008/04/14 Deciphered Date 2009/04/14 Title
Notes List
Custom LA-6032P 1.0
A B C D E
A B C D E
1 1
H_CADIP[0..15] H_CADOP[0..15]
11 H_CADIP[0..15] H_CADOP[0..15] 11
H_CADIN[0..15] H_CADON[0..15]
11 H_CADIN[0..15] H_CADON[0..15] 11
2 2
U1A
H_CADIP15 W7 AB6 H_CADOP15
H_CADIN15 L0_CADIN_H15 L0_CADOUT_H15 H_CADON15
W6 L0_CADIN_L15 L0_CADOUT_L15 AB5
H_CADIP14 U6 AB9 H_CADOP14
U5 AB8
H_CADIP13 L0_CADIN_L14 L0_CADOUT_L14 H_CADOP13
R7 L0_CADIN_H13 L0_CADOUT_H13 AC7
H_CADIN13 R6 AC6 H_CADON13
P6 AE6
P5 AE5
L6 AE9
L5 L0_CADIN_L11 L0_CADOUT_L11 AE8
H_CADIP10 J6 AH3 H_CADOP10
J5 AH4
H4 L0_CADIN_H9 L0_CADOUT_H9 AK3
H_CADIN9 H3 AK4 H_CADON9
G6 L0_CADIN_H8 L0_CADOUT_H8 AH1
H_CADIN8 G5 AH2 H_CADON8
L0_CADIN_L8 L0_CADOUT_L8
HT LINK
H_CADIP7 T3 Y1 H_CADOP7
T4 Y2
T2 Y4
T1 Y3
H_CADIP5
H_CADIN5
P3
P4
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
AB1
AB2
H_CADOP5
H_CADON5
FAN Control Circuit
H_CADIP4 P2 AB4 H_CADOP4
P1 AB3
H_CADIP3 L0_CADIN_L4 L0_CADOUT_L4 H_CADOP3 +5VS
M2 AD4
M1 AD3
K3 L0_CADIN_H2 L0_CADOUT_H2 AF1 1A
3 H_CADIN2 H_CADON2 3
K4 L0_CADIN_L2 L0_CADOUT_L2 AF2
H_CADIP1 K2 AF4 H_CADOP1
L0_CADIN_H1 L0_CADOUT_H1
1
H_CADIN1 K1 AF3 H_CADON1 @
H2 AK1
H_CADIN0 L0_CADIN_H0 L0_CADOUT_H0 H_CADON0 1SS355_SOD323-2
H1 L0_CADIN_L0 L0_CADOUT_L0 AK2 2
D1
H_CLKIP1 M8 AF6 H_CLKOP1 C1 JFAN1 @
2
11 H_CLKIP1 H_CLKIN1 L0_CLKIN_H1 L0_CLKOUT_H1 H_CLKOP1 11
11 H_CLKIN1 M7 AF5 H_CLKON1 H_CLKON1 11
10U_0805_10V6K +FAN1 1
L0_CLKIN_L1 L0_CLKOUT_L1 1 1
2
2
1
H_CLKIP0 M3 AD1 H_CLKOP0 2 3
11 H_CLKIP0 H_CLKIN0 L0_CLKIN_H0 L0_CLKOUT_H0 H_CLKOP0 11 3
11 H_CLKIN0 M4 AD2 H_CLKON0 H_CLKON0 11
U2 @ C2
L0_CLKIN_L0 L0_CLKOUT_L0 1000P_0402_50V7K
1 8 4
H_CTLIP1 H_CTLOP1 EN GND D2 @ GND
11 H_CTLIP1 Y6 L0_CTLIN_H1 L0_CTLOUT_H1 Y8 H_CTLOP1 11 2 VIN GND 7 5 GND
H_CTLIN1 Y5 Y9 H_CTLON1 +FAN1 3 6 1
1SS355_SOD323-2
2
11 H_CTLIN1 L0_CTLIN_L1 L0_CTLOUT_L1 H_CTLON1 11 VOUT GND
31 EN_DFAN1 4 5 ACES_88231-03041
H_CTLIP0 H_CTLOP0 VSET GND
11 H_CTLIP0 V2 V4 H_CTLOP0 11 1
H_CTLIN0 L0_CTLIN_H0 L0_CTLOUT_H0 H_CTLON0 APL5607KI-TRG_SO8
11 H_CTLIN0 V1 V3 H_CTLON0 11
L0_CTLIN_L0 L0_CTLOUT_L0 C3 R1
10U_0805_10V6K 2 1 +3VS
2 10K_0402_5%
TMK625DBV23GM_FCBGA812
K625@ FAN_SPEED1 31
2
@ C4
0.01U_0402_25V7K
1
4 4

AMD CPU S1G2 HT I/F
Custom LA-6032P 1.0
A B C D E
A B C D E
U1C U1B
10 DDR_B_MA[15..0] DDR_B_MA15 DDR_B_D63 DDR_B_D[63..0] 10 9 DDR_A_MA[15..0] DDR_A_MA15 DDR_A_D63 DDR_A_D[63..0] 9
P33 AN13 P30 AG11
DDR_B_MA14 MB_ADD15 MB_DATA63 DDR_B_D62 DDR_A_MA14 MA_ADD15 MA_DATA63 DDR_A_D62
P31 MB_ADD14 MB_DATA62 AL14 M29 MA_ADD14 MA_DATA62 AH11
DDR_B_MA13 AJ33 AL16 DDR_B_D61 DDR_A_MA13 AG28 AJ12 DDR_A_D61
T32 MB_ADD12 MB_DATA60 AN17 P28 MA_ADD12 MA_DATA60 AJ14
DDR_B_MA11 T31 AN12 DDR_B_D59 DDR_A_MA11 T30 AF11 DDR_A_D59
DDR_B_MA10 AD32 MB_ADD11 MB_DATA59 DDR_B_D58 DDR_A_MA10 MA_ADD11 MA_DATA59 DDR_A_D58
AM12 AC28 AF12
T33 MB_ADD9 MB_DATA57 AM16 P27 MA_ADD9 MA_DATA57 AG12
1 DDR_B_MA8 DDR_B_D56 DDR_A_MA8 DDR_A_D56 1
V32 AN16 R26 AH12
U33 MB_ADD7 MB_DATA55 AL18 R27 MA_ADD7 MA_DATA55 AK14
DDR_B_MA6 V33 AN19 DDR_B_D54 DDR_A_MA6 U28 AF15 DDR_A_D54
V31 MB_ADD5 MB_DATA53 AM24 V30 MA_ADD5 MA_DATA53 AH19
DDR_B_MA4 W33 AN24 DDR_B_D52 DDR_A_MA4 U27 AK20 DDR_A_D52
Y31 AM18 Y30 AF14
Y33 MB_ADD2 MB_DATA50 AN18 AB29 MA_ADD2 MA_DATA50 AG14
DDR_B_MA1 Y32 AL22 DDR_B_D49 DDR_A_MA1 W29 AF17 DDR_A_D49
AC33 AN23 AC26 AG19
DDR III: CHANNEL B
DDR III: CHANNEL A

MB_ADD0 MB_DATA48 DDR_B_D47 MA_ADD0 MA_DATA48 DDR_A_D47
MB_DATA47 AM25 MA_DATA47 AG20
DDR_B_BS#2 R33 AL26 DDR_B_D46 DDR_A_BS#2 R29 AJ20 DDR_A_D46
10 DDR_B_BS#2 DDR_B_BS#1 MB_BANK2 MB_DATA46 DDR_B_D45 9 DDR_A_BS#2 DDR_A_BS#1 MA_BANK2 MA_DATA46 DDR_A_D45
10 DDR_B_BS#1 AD33 AN28 9 DDR_A_BS#1 AC29 AF22
DDR_B_BS#0 MB_BANK1 MB_DATA45 DDR_B_D44 DDR_A_BS#0 MA_BANK1 MA_DATA45 DDR_A_D44
10 DDR_B_BS#0 AE33 AL28 9 DDR_A_BS#0 AE28 AK24
MB_BANK0 MB_DATA44 DDR_B_D43 MA_BANK0 MA_DATA44 DDR_A_D43
MB_DATA43 AL24 MA_DATA43 AF19
K33 AN25 DDR_B_D42 K30 AF20 DDR_A_D42
MB_CHECK7 MB_DATA42 DDR_B_D41 MA_CHECK7 MA_DATA42 DDR_A_D41
K31 MB_CHECK6 MB_DATA41 AN27 J29 MA_CHECK6 MA_DATA41 AJ23
G32 AM28 DDR_B_D40 G29 AG23 DDR_A_D40
F32 AM29 F29 AF23
L33 AL30 L28 AF25
K32 MB_CHECK2 MB_DATA37 AL32 L29 MA_CHECK2 MA_DATA37 AH27
H31 AL33 DDR_B_D36 H29 AK30 DDR_A_D36
G33 MB_CHECK0 MB_DATA35 AK28 H27 MA_CHECK0 MA_DATA35 AJ25
AN29 DDR_B_D34 AG25 DDR_A_D34
MB_DATA34 DDR_B_D33 MA_DATA34 DDR_A_D33
J33 AM31 J27 AJ26
MB_DQS_H8 MB_DATA33 DDR_B_D32 MA_DQS_H8 MA_DATA33 DDR_A_D32
H32 MB_DQS_L8 MB_DATA32 AM32 J26 MA_DQS_L8 MA_DATA32 AJ28
DDR_B_DQS7 AM14 E33 DDR_B_D31 DDR_A_DQS7 AJ11 D28 DDR_A_D31
10 DDR_B_DQS7 DDR_B_DQS#7 MB_DQS_H7 MB_DATA31 DDR_B_D30 9 DDR_A_DQS7 DDR_A_DQS#7 MA_DQS_H7 MA_DATA31 DDR_A_D30
10 DDR_B_DQS#7 AN14 MB_DQS_L7 MB_DATA30 D31 9 DDR_A_DQS#7 AK12 MA_DQS_L7 MA_DATA30 G28
DDR_B_DQS6 AL20 B31 DDR_B_D29 DDR_A_DQS6 AG15 D26 DDR_A_D29
10 DDR_B_DQS#6 AM20 A31 9 DDR_A_DQS#6 AH15 E26
DDR_B_DQS5 MB_DQS_L6 MB_DATA28 DDR_B_D27 DDR_A_DQS5 MA_DQS_L6 MA_DATA28 DDR_A_D27
10 DDR_B_DQS5 AN26 F33 9 DDR_A_DQS5 AH22 F30
DDR_B_DQS#5 MB_DQS_H5 MB_DATA27 DDR_B_D26 DDR_A_DQS#5 MA_DQS_H5 MA_DATA27 DDR_A_D26
10 DDR_B_DQS#5 AM26 MB_DQS_L5 MB_DATA26 F31 9 DDR_A_DQS#5 AG22 MA_DQS_L5 MA_DATA26 E29
DDR_B_DQS4 AN30 C32 DDR_B_D25 DDR_A_DQS4 AG26 F27 DDR_A_D25
2 10 DDR_B_DQS4 DDR_B_DQS#4 MB_DQS_H4 MB_DATA25 DDR_B_D24 9 DDR_A_DQS4 DDR_A_DQS#4 MA_DQS_H4 MA_DATA25 DDR_A_D24 2
10 DDR_B_DQS#4 AM30 MB_DQS_L4 MB_DATA24 B32 9 DDR_A_DQS#4 AH26 MA_DQS_L4 MA_DATA24 H26
DDR_B_DQS3 D33 C30 DDR_B_D23 DDR_A_DQS3 E28 H25 DDR_A_D23
10 DDR_B_DQS#3 D32 A29 9 DDR_A_DQS#3 F28 D24
DDR_B_DQS2 MB_DQS_L3 MB_DATA22 DDR_B_D21 DDR_A_DQS2 MA_DQS_L3 MA_DATA22 DDR_A_D21
10 DDR_B_DQS2 B28 MB_DQS_H2 MB_DATA21 B26 9 DDR_A_DQS2 E25 MA_DQS_H2 MA_DATA21 H22
DDR_B_DQS#2 A28 A26 DDR_B_D20 DDR_A_DQS#2 F25 E22 DDR_A_D20
10 DDR_B_DQS#2 DDR_B_DQS1 MB_DQS_L2 MB_DATA20 DDR_B_D19 9 DDR_A_DQS#2 DDR_A_DQS1 MA_DQS_L2 MA_DATA20 DDR_A_D19
10 DDR_B_DQS1 A21 MB_DQS_H1 MB_DATA19 B30 9 DDR_A_DQS1 G17 MA_DQS_H1 MA_DATA19 F26
DDR_B_DQS#1 B20 A30 DDR_B_D18 DDR_A_DQS#1 H17 G26 DDR_A_D18
10 DDR_B_DQS#1 DDR_B_DQS0 MB_DQS_L1 MB_DATA18 DDR_B_D17 9 DDR_A_DQS#1 DDR_A_DQS0 MA_DQS_L1 MA_DATA18 DDR_A_D17
10 DDR_B_DQS0 B16 A27 9 DDR_A_DQS0 E12 D22
DDR_B_DQS#0 MB_DQS_H0 MB_DATA17 DDR_B_D16 DDR_A_DQS#0 MA_DQS_H0 MA_DATA17 DDR_A_D16
10 DDR_B_DQS#0 A15 C26 9 DDR_A_DQS#0 F12 G23
MB_DQS_L0 MB_DATA16 DDR_B_D15 MA_DQS_L0 MA_DATA16 DDR_A_D15
MB_DATA15 A24 MA_DATA15 G22
AN22 B24 DDR_B_D14 AK18 G20 DDR_A_D14
MB_CLK_H7 MB_DATA14 DDR_B_D13 MA_CLK_H7 MA_DATA14 DDR_A_D13
AM22 C18 AJ17 G15
MB_CLK_L7 MB_DATA13 DDR_B_D12 MA_CLK_L7 MA_DATA13 DDR_A_D12
AN21 A18 AH17 F15
AM21 A25 AG17 D20
DDR_B_CLK0 MB_CLK_L6 MB_DATA11 DDR_B_D10 DDR_A_CLK0 MA_CLK_L6 MA_DATA11 DDR_A_D10
10 DDR_B_CLK0 AA32 MB_CLK_H5 MB_DATA10 C24 9 DDR_A_CLK0 Y28 MA_CLK_H5 MA_DATA10 F22
DDR_B_CLK#0 AA33 C20 DDR_B_D9 DDR_A_CLK#0 Y27 D16 DDR_A_D9
10 DDR_B_CLK#0 MB_CLK_L5 MB_DATA9 9 DDR_A_CLK#0 MA_CLK_L5 MA_DATA9
DDR_B_CLK1 AB33 A19 DDR_B_D8 DDR_A_CLK1 AB27 E17 DDR_A_D8
10 DDR_B_CLK1 DDR_B_CLK#1 MB_CLK_H4 MB_DATA8 DDR_B_D7 9 DDR_A_CLK1 DDR_A_CLK#1 MA_CLK_H4 MA_DATA8 DDR_A_D7
10 DDR_B_CLK#1 AB32 MB_CLK_L4 MB_DATA7 C16 9 DDR_A_CLK#1 AB26 MA_CLK_L4 MA_DATA7 H15
AB31 A16 DDR_B_D6 W27 H14 DDR_A_D6
AB30 MB_CLK_L3 MB_DATA5 B14 W26 MA_CLK_L3 MA_DATA5 G12
AD31 A13 DDR_B_D4 P26 H12 DDR_A_D4
AD30 B18 M26 E15
C22 A17 D18 E14
B22 C14 F19 E11
A22 A14 E20 F11
MB_CLK_H0 MB_DATA0 MA_CLK_H0 MA_DATA0
A23 E19
MB_CLK_L0 MA_CLK_L0
MB_DM8 H33 DDR_B_DM[7..0] 10 MA_DM8 H30 DDR_A_DM[7..0] 9
DDR_CKE1_DIMMB N33 AN15 DDR_B_DM7 DDR_CKE1_DIMMA M30 AL12 DDR_A_DM7
10 DDR_CKE1_DIMMB MB_CKE1 MB_DM7 9 DDR_CKE1_DIMMA MA_CKE1 MA_DM7
DDR_CKE0_DIMMB P32 AN20 DDR_B_DM6 DDR_CKE0_DIMMA M28 AK16 DDR_A_DM6
10 DDR_CKE0_DIMMB MB_CKE0 MB_DM6 DDR_B_DM5 9 DDR_CKE0_DIMMA MA_CKE0 MA_DM6 DDR_A_DM5
AK26 AK22
MB_DM5 DDR_B_DM4 MA_DM5 DDR_A_DM4
AK31 AN31 AJ29 AJ27
MB1_ODT1 MB_DM4 DDR_B_DM3 MA1_ODT1 MA_DM4 DDR_A_DM3
AH31 MB1_ODT0 MB_DM3 C33 AF27 MA1_ODT0 MA_DM3 E27
3 DDR_B_ODT1 AK32 DDR_B_DM2 DDR_A_ODT1 DDR_A_DM2 3
10 DDR_B_ODT1 MB0_ODT1 MB_DM2 C28 9 DDR_A_ODT1 AJ30 MA0_ODT1 MA_DM2 E23
DDR_B_ODT0 AH33 A20 DDR_B_DM1 DDR_A_ODT0 AG29 H19 DDR_A_DM1
10 DDR_B_ODT0 MB0_ODT0 MB_DM1 DDR_B_DM0 9 DDR_A_ODT0 MA0_ODT0 MA_DM1 DDR_A_DM0
D14 G14
MB_DM0 MA_DM0
AK33 AH29
MB1_CS_L1 MA1_CS_L1
AF33 MB1_CS_L0 AE29 MA1_CS_L0
DDR_CS1_DIMMB# AJ32 DDR_CS1_DIMMA# AH30
10 DDR_CS1_DIMMB# MB0_CS_L1 9 DDR_CS1_DIMMA# MA0_CS_L1
DDR_CS0_DIMMB# AF31 DDR_CS0_DIMMA# AF29
10 DDR_CS0_DIMMB# MB0_CS_L0 9 DDR_CS0_DIMMA# MA0_CS_L0
DDR_B_RAS# AF32 DDR_A_RAS# AC27
10 DDR_B_RAS# MB_RAS_L 9 DDR_A_RAS# MA_RAS_L
DDR_B_CAS# AH32 DDR_A_CAS# AF30
10 DDR_B_CAS# DDR_B_WE# AG33 MB_CAS_L 9 DDR_A_CAS# DDR_A_WE# MA_CAS_L
10 DDR_B_WE# 9 DDR_A_WE# AE27
MB_WE_L MA_WE_L
10 MEM_MB_RST# L32 MB_RESET_L 9 MEM_MA_RST# L27 MA_RESET_L

M33 K625@ M32
+1.5V FREE|MB_EVENT_L FREE|MA_EVENT_L K625@
+1.5V
1 2 MB_EVENT_L
R792 1K_0402_5% 1 2 MA_EVENT_L
TMK625DBV23GM_FCBGA812 R793 1K_0402_5% TMK625DBV23GM_FCBGA812
4 4

AMD CPU S1G2 DDRII I/F
Custom LA-6032P 1.0
A B C D E
A B C D E
+1.5V 1 2
R2 10K_0402_5%
+2.5VDDA 1 2
L1 R3 1K_0402_5%
+2.5VS 1 2 3300P_0402_50V7K +2.5VDDA@250mA
2
B
1 FBM_L11_201209_300L_0805 D4 CH751H-40PT_SOD323-2
1 1 1 Q1
E
@ + C5 CPU_THERMTRIP#_R 3 1 1 2 H_THERMTRIP# 21
C
4.7U_0805_10V4Z C6 C7 C8
100U_D2_10VM 0.22U_0603_16V4Z MMBT3904_NL_SOT23-3
2 2 2 2 1 2
+1.5V
R4 300_0402_5%
R5 @
1 U1D CPU_PROCHOT#_1.8 1
1 2 H_PROCHOT# 20
A8 0_0402_5%
VDDA_1
B8
VDDA_2
1 2 3900P_0402_50V7K CPU_CLKIN_SC_P A6
20 CLK_CPU_BCLK CLKIN_H
C10 CPU_CLKIN_SC_N A7 M31
CLKIN_L RSVD|CORE_TYPE
1
H_PWRGD D10
R8 LDT_STOP# PWROK +VDDNB
E9
169_0402_1% LDT_RST# LDTSTOP_L CPU_SVC
F9 RESET_L SVC C1
CPU_SVD CPU_SVC 42 R9 10_0402_5%
B2
2
SVD CPU_SVD 42 CPU_VDDNB_RUN_FB_H 1
20 CLK_CPU_BCLK# 1 2 2
C9 3900P_0402_50V7K
L R8 Close to CPU within 0.6"

+1.5V R7 1 2 1K_0402_5%CPU_SIC AN4 SIC THERMDC AL6 THERMDC_CPU
+1.5VS C9 C10 Close to CPU within 1.2" R10 1 2 1K_0402_5%CPU_SID AN5 AM5 THERMDA_CPU Close to CPU
SID THERMDA CPU_THERMTRIP#_R
AM2 RSVD_SA0 THERMTRIP_L AK6
MISC
AN3 AN6 CPU_PROCHOT#_1.8
ALERT_L PROCHOT_L
2
+1.1VALW
R11 CPU_TDI AM8 AN7 CPU_TDO
@ CPU_VLDT_SENSE CPU_TRST# TDI TDO
300_0402_5% AL8 TRST_L
R355 10_0402_5% CPU_TCK AK8 +1.5V
+1.5V CPU_TMS TCK
AN8
1
LDT_RST# TMS
20 LDT_RST#
@ CPU_VDDIO_SENSE CPU_DBREQ# G9 H9 CPU_DBRDY CPU_SVC R12 1 2 1K_0402_5%
R356 10_0402_5% DBREQ_L DBRDY
1
C11 CPU_VDD0_RUN_FB_L D2 CPU_SVD R13 1 2 1K_0402_5%
0.01U_0402_25V7K 42 CPU_VDD0_RUN_FB_L CPU_VLDT_SENSE VSS_SENSE T1 PAD @ +1.5V
E2 VLDT_SENSE RSVD3 AM6
@ CPU_VDD0_RUN_FB_H E1
2 +0.9V 42 CPU_VDD0_RUN_FB_H CPU_VDDNB_RUN_FB_HD1 VDD_SENSE CPU_PRESENT_L R801 1
42 CPU_VDDNB_RUN_FB_H AJ9 2 1K_0402_5%
CPU_VDDIO_SENSE VDDNB_SENSE CPU_PRESENT_L
D3 VDDIO_SENSE
@ CPU_VDDR_SENSE CPU_VDDR_SENSE C2 R14 R15 Close to CPU within 1.5"
2 R357 10_0402_5%
M_VREF
VDDR_SENSE
CPU_HTREF1
L 2
C12 @ A11 V10 R14 1 2 44.2_0402_1% +1.1VS
M_ZP M_VREF HTREF1 CPU_HTREF0 R15
1 2 AM9 V9 1 2 44.2_0402_1%
M_ZN M_ZN_H HTREF0
Close to CPU within 1 R16 2 AN9
L 1"
0.1U_0402_16V7K 39.2_0402_1~D M_ZN_L R18
80.6_0402_1% +1.5V
CPU_TEST25_H_BYPASSCLK_H A9 B10 CPU_TEST29_H_FBCLKOUT_P 1 2 CPU_TEST26_BURNIN_L
CPU_TEST25_L_BYPASSCLK_L BYPASSCLK_H FBCLKOUT_H CPU_TEST29_L_FBCLKOUT_N
B9 A10
+1.5VS CPU_TEST19_PLLTEST0 BYPASSCLK_L FBCLKOUT_L @
A5
CPU_TEST18_PLLTEST1 PLLTEST0 CPU_DBREQ# R19 1
B6 PLLTEST1 2 300_0402_5% R20 1 2 1K_0402_5%
AK7 CPU_TEST24_SCANCLK1 CPU_TEST27_SINGLECHAIN R21 1 2 1K_0402_5%
SCANCLK1
2
1 R22 2 CPU_TEST9_ANALOGIN G8 AG8 CPU_TEST23_TSTUPD R23 1 2 300_0402_5% @

ANALOGIN TSTUPD
R17 0_0402_5% AK9 CPU_TEST22_SCANSHIFTEN
@ PAD T22 CPU_TEST17_BP3 SCANSHIFTEN CPU_TEST21_SCANEN CPU_TEST21_SCANEN R24 1 1K_0402_5%
300_0402_5% F8 AH9 2
@ PAD T23 CPU_TEST16_BP2 BP3 SCANEN CPU_TEST20_SCANCLK2 CPU_TEST20_SCANCLK2 R25 1 1K_0402_5%
C8 BP2 SCANCLK2 AM7 2
CPU_TEST15_BP1 D9 CPU_TEST24_SCANCLK1 R26 1 2 1K_0402_5%
1
H_PWRGD CPU_TEST14_BP0 BP1 CPU_TEST28_H_PLLCHRZ_P T10 PAD @ CPU_TEST22_SCANSHIFTEN R27 1 1K_0402_5%

E8 G11 2
20,42 H_PWRGD BP0 PLLCHRZ_H CPU_TEST28_L_PLLCHRZ_N T11 PAD @
PLLCHRZ_L H11
1 @ CPU_TEST7_ANALOG_T C6 AJ8 CPU_TEST27_SINGLECHAIN CPU_TEST15_BP1 R28 1 2 300_0402_5% @
T12 PAD CPU_TEST6_DIECRACKMON ANALOG_T SINGLECHAIN CPU_TEST26_BURNIN_L CPU_TEST14_BP0
@ AH7 AM4 R29 1 2 300_0402_5% @
T14 PAD CPU_TEST3 DIECRACKMON BURNIN_L CPU_TEST10_ANALOGOUT
C13 @ AK5 D7 T16 PAD @
T15 PAD GATE0 ANALOGOUT
0.1U_0402_16V7K @ CPU_TEST2 AJ7 B5 CPU_TEST8_DIG_T T18 PAD @ CPU_TEST18_PLLTEST1 R30 1 2 1K_0402_5%
2 T17 PAD DRAIN0 DIG_T CPU_TEST19_PLLTEST0 R31 1 2 1K_0402_5%
CPU_TEST23_TSTUPD R32 1 2 1K_0402_5%
AG9 CPU_DBRDY R34 1 2 300_0402_5% @
M_TEST
+1.5VS
+1.5V
2
TMK625DBV23GM_FCBGA812 K625@
2
R33
300_0402_5% R802
3 1K_0402_1% 3
1
LDT_STOP#
1
12,20 LDT_STOP# M_VREF

+1.5V
1
2
0.01U_0402_25V7K
1000P_0402_25V8J
C14
0.01U_0402_25V7K R803
@ 1K_0402_1% 2 1
2 C654 C655 @ @ @ @
220_0402_5% R41
220_0402_5% R42
220_0402_5% R43
300_0402_5% R44
300_0402_5% R45
1
2
1 2
+1.5V
@ R35 R36 JP1
1
1 2 CPU_TEST25_H_BYPASSCLK_H 1 2
510_0402_5% 510_0402_5% 1 2
3 4
R38 R39 CPU_DBREQ# 5 6
7 8
1 2 CPU_TEST25_L_BYPASSCLK_L 1 2 CPU_DBRDY
510_0402_5% 510_0402_5% CPU_TCK R850 0_0402_5% CPU_TCK_R 9 10
1 2 11 12
@ CPU_TMS R851 1 2 0_0402_5% CPU_TMS_R
CPU_TDI R852 0_0402_5% CPU_TDI_R 13 14
1 2
+3VS
Thermal Sensor CPU_TRST# R853
CPU_TDO R854
1
1
2
2
0_0402_5%
0_0402_5%
CPU_TRST#_R
CPU_TDO_R
15
17
19
16
18
20
21 22
0.1U_0402_16V4Z
1 LDT_RST#
23 24
C16 26
2 CONN@ SAMTEC_ASP-68200-07
4 U4 4
1 VDD SCLK 8 EC_SMB_CK2 31,32
THERMDA_CPU 2 7
D+ SDATA EC_SMB_DA2 31,32
C17
1 2 THERMDC_CPU 3 6
2200P_0402_50V7K D- ALERT#
4 5
THERM# GND Security Classification Compal Secret Data Compal Electronics, Inc.
ADM1032ARM-1 ZREEL_MSOP8
AMD CPU S1G2 CTRL
Custom LA-6032P 1.0
A B C D E
A B C D E
U1G U1H
+CPU_CORE_0@15000mA +1.5V +1.1VS B1 W19 AM19 AK15
+CPU_CORE_0 +CPU_CORE_0 VSS_1 VSS_45 VSS_207 VSS_191
N2 VSS_28 VSS_44 W1 AF7 VSS_167 VSS_192 AK17
U1E U1F N22 V20 AF26 AK19
VSS_29 VSS_43 VSS_166 VSS_193
D4 VDD_1 VDD_85 AE12 N23 VSS_30 VSS_42 V18 AE7 VSS_165 VSS_194 AK21
D5 AD9 M27 F1 B13 M11 AF8 AA2
VDD_2 VDD_84 VDDIO_1 VLDT_A_1 VSS_2 VSS_26 VSS_168 VSS_126
D6 AE21 Y26 F2 B15 L8 AF9 AA22
E5
VDD_3 VDD_83
AD21 U26
VDDIO_2 VLDT_A_2
F3
+1.1VS@1500mA B17
VSS_3 VSS_25
V15 AG1
VSS_169 VSS_127
AA23
E6
VDD_4 VDD_82
AD18
3000mA N32
VDDIO_3 VLDT_A_3
F4 M21
VSS_4 VSS_41
L4 AG2
VSS_170 VSS_128
AK23
VDD_5 VDD_81 VDDIO_4 VLDT_A_4 VSS_27 VSS_24 VSS_171 VSS_195
E7 VDD_6 VDD_80 AD14 U32 VDDIO_5 B19 VSS_5 VSS_23 L30 AG27 VSS_172 VSS_129 AA4
F5 VDD_7 VDD_79 AD12 N30 VDDIO_6 VLDT_B_1 AL1 B21 VSS_6 VSS_22 L26 AG4 VSS_173 VSS_130 AA9
F6 VDD_8 VDD_78 AD11 P29 VDDIO_7 VLDT_B_2 AL2 B23 VSS_7 VSS_68 L24 AG5 VSS_174 VSS_131 AB10
F7 AC5 R28 AL3 B27 L23 AG6 AB12
VDD_9 VDD_77 VDDIO_8 VLDT_B_3 +0.9V VSS_8 VSS_69 VSS_175 VSS_132
H7 AE18 R30 AL4 B29 L22 AG7 AB21
VDD_10 VDD_76 VDDIO_9 VLDT_B_4 VSS_9 VSS_70 VSS_176 VSS_133
H8 VDD_11 VDD_75 AC24 R32 VDDIO_10 B33 VSS_10 VSS_71 L21 AE4 VSS_164 VSS_134 AB22
1 1
J8 AC12 U29 A12 C10 L2 AE25 AB23
VDD_12 VDD_74 VDDIO_11 VDDR_1 VSS_11 VSS_72 VSS_163 VSS_135
E4 VDD_13 VDD_73 AC10 U30 VDDIO_12 VDDR_2 B12 P10 VSS_31 VSS_73 L12 AE24 VSS_162 VSS_136 AB24
GND1
GND2
J10 AB13 W28 C12 P14 L10 AE22 AK25
J12 VDD_15 VDD_71 AB11 W30 VDDIO_14 VDDR_4 D12 P16 VSS_33 VSS_75 L1 AE20 VSS_160 VSS_197 AK27
J14 AE14 W32 P19 K9 AE2 AK29
VDD_16 VDD_70 VDDIO_15 +0.9V@1250mA VSS_34 VSS_76 VSS_159 VSS_198
POWER1
POWER2
J18 AA24 Y29 AK10 P7 M6 AE16 AJ5
J20 VDD_18 VDD_68 AA12 AA30 VDDIO_17 VDDR_6 AL10 C31 VSS_12 VSS_78 K24 AE13 VSS_157 VSS_200 AH6
J21 VDD_19 VDD_67 AA10 AB28 VDDIO_18 VDDR_7 AM10 D11 VSS_13 VSS_79 K22 AH14 VSS_177 VSS_201 AL31
J23 Y19 AE32 AN10 D13 K16 AE11 AM1
J9 VDD_21 VDD_65 Y16 AC30 VDDIO_20 D15 VSS_15 VSS_81 M22 AE10 VSS_155 VSS_203 AM13
K10 Y14 AC32 +VDDNB R1 K13 AE1 AB7
VDD_22 VDD_64 VDDIO_21 VSS_36 VSS_82 VSS_154 VSS_137
K12 W5 AE26 D17 M24 AD24 AC1
K14 W20 AE30 A3 D19 K11 AD23 AM15
VDD_24 VDD_62 VDDIO_23 VDDNB_1 VSS_17 VSS_84 VSS_152 VSS_205
K18 VDD_25 VDD_61 W18 AF28 VDDIO_24 VDDNB_2 A4 D21 VSS_18 VSS_85 M23 AD22 VSS_151 VSS_206 AM17
K20 VDD_26 VDD_60 W15 AG30 VDDIO_25 VDDNB_3 B3 D23 VSS_19 VSS_86 J7 AH20 VSS_178 VSS_139 AC11
K21 AE23 AG32 B4 D25 W16 AH23 AC13
K23
VDD_27 VDD_59
V24 AD25
VDDIO_26 VDDNB_4
C3
+VDDNB@2000mA D27
VSS_20 VSS_87
J4 AH25
VSS_179 VSS_140
AC2
N4 V19 AA25 C4 R15 W14 AH28 AC21
L11 V16 AC25 R18 J32 AD20 AC22
L13 VDD_31 VDD_55 V14 V25 VDDIO_30 R2 VSS_39 VSS_91 J30 AD16 VSS_149 VSS_208 AM23
L7 VDD_32 VDD_54 T20 P25 VDDIO_31 PROGEN_L B11 R20 VSS_40 VSS_92 M13 AD13 VSS_148 VSS_209 AM27
L9 VDD_33 VDD_53 T18 N25 VDDIO_32 D29 VSS_46 VSS_93 J28 AD10 VSS_147 VSS_210 AM33
M10 VDD_34 VDD_52 T15 M25 VDDIO_33 D30 VSS_47 VSS_94 U8 AC9 VSS_146 VSS_211 AN2
M12 T10 K25 G7 D8 J25 AC8 AN32
VDD_35 VDD_51 VDDIO_34 FREE_1 VSS_48 VSS_95 VSS_145 VSS_212
R4 VDD_36 VDD_50 R5 L25 VDDIO_35 FREE_2 B7 E30 VSS_49 VSS_96 U4 A2 VSS_214 VSS_215 AM11
M5 VDD_37 VDD_49 R19 T25 VDDIO_36 FREE_3 AH8 E32 VSS_50 VSS_97 J24 AC23 VSS_144
N11 VDD_38 VDD_48 R16 Y25 VDDIO_37 FREE_4 AJ6 F14 VSS_51 VSS_98 U7 AH5 VSS_182
N24 VDD_39 VDD_47 R14 AB25 VDDIO_38 FREE_5 B25 F17 VSS_52 VSS_99 U2 AJ1 VSS_183
W4 AC4 AM3 R8 J2 AJ15
VDD_40 VDD_46 FREE_6 VSS_53 VSS_100 VSS_184
N9 P24 AN11 T14 J16 W2
VDD_41 VDD_45 FREE_7 VSS_54 VSS_101 VSS_116
P15 VDD_42 VDD_44 P20 FREE_8 P9 T16 VSS_55 VSS_102 J13 A32 VSS_213
P18 VDD_43 FREE_9 P8 F20 VSS_56 VSS_103 J11 W8 VSS_117
2 2
T19 VSS_57 VSS_104 J1 Y10 VSS_118
T24 VSS_58 VSS_105 H6 Y15 VSS_119
T9 H5 Y18
TMK625DBV23GM_FCBGA812 VSS_59 VSS_106 VSS_120
U1 VSS_60 VSS_107 H28 AJ19 VSS_185
TMK625DBV23GM_FCBGA812 F23 H23 AJ2
VSS_61 VSS_108 VSS_186
K625@ K625@ N1 VSS_62 VSS_109 H20 AJ22 VSS_187
G1 J22 AJ4
VLDT_A&VLDT_B(+1.1VS) decoupling. G19
G2
VSS_63
VSS_64
VSS_110
VSS_111
M9
G4
Y20
Y24
VSS_188
VSS_121
G25 VSS_66 VSS_113 G30 AK11 VSS_189
+1.1VS G27 N12 AK13
N10 Y7
VSS_115 VSS_123
AA1
VSS_124
AA11
VSS_125
1 1 1 1 1 1 1
C18 C19 C20 C21 C22 C23 C24 TMK625DBV23GM_FCBGA812 K625@
4.7U_0805_10V4Z 4.7U_0805_10V4Z 22U_0805_6.3V6M 0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2 2 K625@ TMK625DBV23GM_FCBGA812
VDDR(+0.9V) decoupling. VDD(+CPU_CORE_0) decoupling.

+0.9V VDDNB(+VDDNB) decoupling.
+CPU_CORE_0
+VDDNB
1 1 1 1 1 1 1 1
1 1 1 1
C25 C26 C27 C28 C29 C30 C31 C32 1 1 1 1 1
4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z + C494 + C495 + C496 + C497
3 2 2 2 2 2 2 2 2 330U_SX_2VY~D 330U_SX_2VY~D 330U_SX_2VY~D 330U_SX_2VY~D C649 C650 C33 C34 C35 3
@ 4.7U_0805_10V4Z 4.7U_0805_10V4Z 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2 2 2 2
+0.9V
1
C36 C37
1
C38
1
C39 C40
1
C41
1
C42
1
C43
1 1
VDDIO(+1.5V) decoupling.
1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2 2 2
+1.5V
1
1 1 1 1 1 1 1 1 1 1
C526 +
VDD(+CPU_CORE_0) decoupling. 330U_2.5V_M C44
22U_0805_6.3V6M
C45
22U_0805_6.3V6M
C57
4.7U_0805_10V4Z
C58
4.7U_0805_10V4Z
C623
4.7U_0805_10V4Z
C624
4.7U_0805_10V4Z
C48
180P_0402_50V8J
C49
180P_0402_50V8J
C653
180P_0402_50V8J
C629
0.01U_0402_25V7K
2 2 2 2 2 2 2 2 2 2 2
+CPU_CORE_0
1 1 1 1 1 1 1 +1.5V
C50 C51 C52 C53 C54 C55 C56

22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 0.22U_0603_16V4Z 0.01U_0402_25V7K 180P_0402_50V8J
2 2 2 2 2 2 2
1 1 1 1 1 1 1 1 1 1
4 +CPU_CORE_0 C651 C652 C625 C626 C627 C628 C46 C47 C630 C631 4
0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.1U_0402_16V7K 0.1U_0402_16V7K
2 2 2 2 2 2 2 2 2 2
1 1 1 1 1 1 1
C59 C60 C61 C62 C63 C64 C65
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 0.22U_0603_16V4Z 0.01U_0402_25V7K 180P_0402_50V8J
2 2 2 2 2 2 2
CPU BOT site AMD CPU S1G2 PWR & GND

L THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Custom LA-6032P 1.0
A B C D E
A B C D E
+VREF_DQ +1.5V +1.5V
JDIMM1
1 2
VREF_DQ VSS1 DDR_A_D4
3 VSS2 DQ4 4
DDR_A_D0 5 6 DDR_A_D5
DDR_A_D1 DQ0 DQ5
7 8
DQ1 VSS3 DDR_A_DQS#0
9 VSS4 DQS#0 10 DDR_A_DQS#0 6
DDR_A_DM0 11 12 DDR_A_DQS0
DM0 DQS0 DDR_A_DQS0 6 DDR_A_D[0..63]
13 VSS5 VSS6 14
DDR_A_D2 DDR_A_D6 DDR_A_D[0..63] 6
15 16
DDR_A_D3 DQ2 DQ6 DDR_A_D7 DDR_A_DM[0..7]
17 18 DDR_A_DM[0..7] 6
DQ3 DQ7
19 VSS7 VSS8 20
1 DDR_A_D8 DDR_A_D12 1
21 22
DDR_A_D9 DQ8 DQ12 DDR_A_D13
23 DQ9 DQ13 24
25 26 DDR_A_MA[0..15]
VSS9 VSS10 DDR_A_MA[0..15] 6
DDR_A_DQS#1 27 28 DDR_A_DM1
6 DDR_A_DQS#1 DDR_A_DQS1 DQS#1 DM1 MEM_MA_RST#
6 DDR_A_DQS1 29 30 MEM_MA_RST# 6
DQS1 RESET#
31 32
DDR_A_D10 VSS11 VSS12 DDR_A_D14
33 DQ10 DQ14 34
DQ11 DQ15
37 38
39 DQ16 DQ20 40
DQ17 DQ21
43 44
DDR_A_DQS#2 VSS15 VSS16 DDR_A_DM2
6 DDR_A_DQS#2 45 46
DDR_A_DQS2 DQS#2 DM2
6 DDR_A_DQS2 47 DQS2 VSS17 48
49 50 DDR_A_D22
DDR_A_D18 VSS18 DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS19 DDR_A_D28
55 56
DDR_A_D24 VSS20 DQ28 DDR_A_D29 +VREF_CA +1.5V
57 58
DDR_A_D25 DQ24 DQ29 +VREF_DQ +1.5V
59 DQ25 VSS21 60
61 62 DDR_A_DQS#3
VSS22 DQS#3 DDR_A_DQS#3 6
2
DDR_A_DM3 63 64 DDR_A_DQS3
DM3 DQS3 DDR_A_DQS3 6
2
65 66 R282
DDR_A_D26 VSS23 VSS24 DDR_A_D30 R281 1K_0402_1%
67 68
DDR_A_D27 DQ26 DQ30 DDR_A_D31 1K_0402_1%
69 DQ27 DQ31 70
71 72
1
VSS25 VSS26 +VREF_CA
1
+VREF_DQ
0.01U_0402_25V7K
1000P_0402_25V8J
0.01U_0402_25V7K
1000P_0402_25V8J
4.7U_0805_10V4Z
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
6 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 6
4.7U_0805_10V4Z
75 VDD1 VDD2 76 1 2 1
2
77 78 DDR_A_MA15 1 2 1 C428 C429 C430
NC1 A15
2
2 DDR_A_BS#2 DDR_A_MA14 C425 C426 C427 @ R284 2
6 DDR_A_BS#2 79 BA2 A14 80
81 82 @ R283 1K_0402_1%
DDR_A_MA12 VDD3 VDD4 DDR_A_MA11 1K_0402_1% 2 1 2
83 84
DDR_A_MA9 A12/BC# A11 DDR_A_MA7 2 1 2
85 86
1
A9 A7
87 88
1
DDR_A_MA8 VDD5 VDD6 DDR_A_MA6
89 A8 A6 90
DDR_A_MA5 91 92 DDR_A_MA4
A5 A4
93 94
DDR_A_MA3 VDD7 VDD8 DDR_A_MA2
95 96
DDR_A_MA1 A3 A2 DDR_A_MA0
97 A1 A0 98
99 100
DDR_A_CLK0 VDD9 VDD10 DDR_A_CLK1
101 102 DDR_A_CLK1 6
6 DDR_A_CLK0 DDR_A_CLK#0 CK0 CK1 DDR_A_CLK#1
103 104 DDR_A_CLK#1 6
6 DDR_A_CLK#0 CK0# CK1#
105 106
DDR_A_MA10 VDD11 VDD12 DDR_A_BS#1
107 A10/AP BA1 108 DDR_A_BS#1 6
DDR_A_BS#0 109 110 DDR_A_RAS#
6 DDR_A_BS#0 BA0 RAS# DDR_A_RAS# 6
111 112
DDR_A_WE# VDD13 VDD14 DDR_CS0_DIMMA#
113 WE# S0# 114 DDR_CS0_DIMMA# 6
6 DDR_A_WE# DDR_A_CAS# DDR_A_ODT0
6 DDR_A_CAS# 115 116 DDR_A_ODT0 6
CAS# ODT0
117 VDD15 VDD16 118
DDR_A_MA13 119 120 DDR_A_ODT1
A13 ODT1 DDR_A_ODT1 6
DDR_CS1_DIMMA# 121 122 +1.5V
6 DDR_CS1_DIMMA# S1# NC2
123 124
VDD17 VDD18 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
125 126 +VREF_CA
NCTEST VREF_CA
127 128 2 2 2 2 2 2 2 2 2 2
VSS27 VSS28
1000P_0402_25V8J
DDR_A_D32 129 130 DDR_A_D36
DDR_A_D33 DQ32 DQ36 DDR_A_D37 C432 C433 C434 C435 C436 C437 C438 C439 C440 C441
131 DQ33 DQ37 132 1
C431
133 134
DDR_A_DQS#4 VSS29 VSS30 DDR_A_DM4 1 1 1 1 1 1 1 1 1 1
6 DDR_A_DQS#4 135 136
DDR_A_DQS4 DQS#4 DM4 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
6 DDR_A_DQS4 137 138
DQS4 VSS31 DDR_A_D38 2
139 140
141 DQ34 DQ39 142
3 DDR_A_D35 3
143 DQ35 VSS33 144
145 146 DDR_A_D44
147 148
DDR_A_D41 DQ40 DQ45 +0.75VS
149 150
151 VSS36 DQS#5 152 DDR_A_DQS#5 6
DDR_A_DM5 153 154 DDR_A_DQS5 0.1U_0402_16V4Z
DM5 DQS5 DDR_A_DQS5 6
155 156 2 2 1
157 158
DDR_A_D43 DQ42 DQ46 DDR_A_D47 C442 C443 C444
159 160
DQ43 DQ47
161 162
DDR_A_D48 VSS39 VSS40 DDR_A_D52 1 1 2
163 164
DDR_A_D49 DQ48 DQ52 DDR_A_D53 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
165
DQ49 DQ53
166 Place near DIMM1
167 VSS41 VSS42 168
DDR_A_DQS#6 169 170 DDR_A_DM6
6 DDR_A_DQS#6 DDR_A_DQS6 DQS#6 DM6
6 DDR_A_DQS6 171 172
DQS6 VSS43 DDR_A_D54
173 174
175 176
DDR_A_D51 DQ50 DQ55
177 178
DQ51 VSS45 DDR_A_D60
179 180
181 182
DDR_A_D57 DQ56 DQ61
183 184
185 186 DDR_A_DQS#7 6
DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7
187 DM7 DQS7 188 DDR_A_DQS7 6
189 190 +1.5V
191 192
DDR_A_D59 DQ58 DQ62 DDR_A_D63
193 194
R285 10K_0402_5% 195
DQ59 DQ63
196
12/25 Solve layout test point issue
VSS51 VSS52 EVENT#_A
1 2 197 198 1 1 1 1
SA0 EVENT#
+3VS 199 200 SMB_CK_DAT0 10,21
VDDSPD SDA C700 C701 C702 C703
201 202 SMB_CK_CLK0 10,21
SA1 SCL 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J
203 204 +0.75VS
VTT1 VTT2
1
2 2 2 2
4 R286 4
205 G1 G2 206
+3VS
10K_0402_5% FOX_AS0A626-U4RN-7F
CONN@
2
1 1
C445 C446
0.1U_0402_16V4Z Security Classification Compal Secret Data Compal Electronics, Inc.

2
2.2U_0805_10V6K 2
2008/10/06 2010/03/12 Title
DIMM_A STD H:4mm Issued Date Deciphered Date
DDRII SO-DIMM 1
<Address: 00> AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
LA-6032P
A B C D E
A B C D E
+VREF_DQ +1.5V +1.5V
JDIMM2
1 2
VREF_DQ VSS1 DDR_B_D4
3 VSS2 DQ4 4
DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 DQ0 DQ5
7 8
DQ1 VSS3 DDR_B_DQS#0
9 VSS4 DQS#0 10 DDR_B_DQS#0 6
DDR_B_DM0 11 12 DDR_B_DQS0
DM0 DQS0 DDR_B_DQS0 6 DDR_B_D[0..63]
13 VSS5 VSS6 14
DDR_B_D2 DDR_B_D6 DDR_B_D[0..63] 6
15 16
DDR_B_D3 DQ2 DQ6 DDR_B_D7 DDR_B_DM[0..7]
17 18 DDR_B_DM[0..7] 6
DQ3 DQ7
19 VSS7 VSS8 20
1 DDR_B_D8 DDR_B_D12 1
21 22
DDR_B_D9 DQ8 DQ12 DDR_B_D13
23 DQ9 DQ13 24 DDR_B_MA[0..15] 6
25 26 DDR_B_MA[0..15]
DDR_B_DQS#1 VSS9 VSS10 DDR_B_DM1
6 DDR_B_DQS#1 27 DQS#1 DM1 28
DDR_B_DQS1 29 30 MEM_MB_RST#
6 DDR_B_DQS1 DQS1 RESET# MEM_MB_RST# 6
31 32
DDR_B_D10 VSS11 VSS12 DDR_B_D14
33 DQ10 DQ14 34
DQ11 DQ15
37 38
DDR_B_D16 VSS13 VSS14 DDR_B_D20
39 DQ16 DQ20 40
DQ17 DQ21
43 44
6 DDR_B_DQS#2 45 46
DDR_B_DQS2 DQS#2 DM2
6 DDR_B_DQS2 47 DQS2 VSS17 48
49 50 DDR_B_D22
DDR_B_D18 VSS18 DQ22 DDR_B_D23
51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS19 DDR_B_D28
55 56
57 58
DDR_B_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDR_B_DQS#3
DDR_B_DM3 VSS22 DQS#3 DDR_B_DQS3 DDR_B_DQS#3 6
63 DM3 DQS3 64 DDR_B_DQS3 6
65 VSS23 VSS24 66
69 DQ27 DQ31 70
71 VSS25 VSS26 72
DDR_CKE0_DIMMB 73 74 DDR_CKE1_DIMMB
6 DDR_CKE0_DIMMB CKE0 CKE1 DDR_CKE1_DIMMB 6
75 VDD1 VDD2 76
77 78 DDR_B_MA15
2 DDR_B_BS#2 NC1 A15 DDR_B_MA14 2
6 DDR_B_BS#2 79 BA2 A14 80
81 VDD3 VDD4 82
DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 A9 A7 86
87 VDD5 VDD6 88
DDR_B_MA8 89 90 DDR_B_MA6 +VREF_DQ +VREF_CA
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
93 94
DDR_B_MA3 VDD7 VDD8 DDR_B_MA2 +VREF_DQ +VREF_CA
95 96
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
1000P_0402_25V8J
1000P_0402_25V8J
99 100
VDD9 VDD10
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
DDR_B_CLK0 101 102 DDR_B_CLK1
6 DDR_B_CLK0 DDR_B_CLK#0 CK0 CK1 DDR_B_CLK#1 DDR_B_CLK1 6
103 104 DDR_B_CLK#1 6 1 1 1 1 1 1
6 DDR_B_CLK#0 CK0# CK1# C447 C448 C449 C450 C451 C452
105 106
DDR_B_MA10 VDD11 VDD12 DDR_B_BS#1
107 A10/AP BA1 108 DDR_B_BS#1 6
DDR_B_BS#0 109 110 DDR_B_RAS#
6 DDR_B_BS#0 BA0 RAS# DDR_B_RAS# 6 2 2 2 2 2 2
111 112
DDR_B_WE# VDD13 VDD14 DDR_CS0_DIMMB#
113 WE# S0# 114 DDR_CS0_DIMMB# 6
6 DDR_B_WE# DDR_B_CAS# DDR_B_ODT0
6 DDR_B_CAS# 115 116 DDR_B_ODT0 6
CAS# ODT0
117 VDD15 VDD16 118
DDR_B_MA13 119 120 DDR_B_ODT1
A13 ODT1 DDR_B_ODT1 6
DDR_CS1_DIMMB# 121 122
6 DDR_CS1_DIMMB# S1# NC2
123 124
VDD17 VDD18
125 126 +VREF_CA
NCTEST VREF_CA
127 128
VSS27 VSS28
1000P_0402_25V8J
DDR_B_D32 129 130 DDR_B_D36
131 DQ33 DQ37 132 1
133 134 C453
6 DDR_B_DQS#4 135 136
DDR_B_DQS4 DQS#4 DM4
6 DDR_B_DQS4 137 138
DQS4 VSS31 DDR_B_D38 2
139 140
141 DQ34 DQ39 142
3 DDR_B_D35 3
143 DQ35 VSS33 144
145 146 DDR_B_D44
147 148
DDR_B_D41 DQ40 DQ45
149 150
DQ41 VSS35 DDR_B_DQS#5
151 VSS36 DQS#5 152 DDR_B_DQS#5 6
DDR_B_DM5 153 154 DDR_B_DQS5 +1.5V
DM5 DQS5 DDR_B_DQS5 6
155 156
DDR_B_D42 VSS37 VSS38 DDR_B_D46 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
157 158
159 160 2 2 2 2 2 2 2 2 2 2
DQ43 DQ47
161 162
DDR_B_D48 VSS39 VSS40 DDR_B_D52 C454 C455 C456 C457 C458 C459 C460 C461 C462 C463
163 164
165 166
DQ49 DQ53 1 1 1 1 1 1 1 1 1 1
167 VSS41 VSS42 168
DDR_B_DQS#6 169 170 DDR_B_DM6 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
6 DDR_B_DQS#6 DDR_B_DQS6 DQS#6 DM6
6 DDR_B_DQS6 171 172
DQS6 VSS43 DDR_B_D54
173 174
175 176
DDR_B_D51 DQ50 DQ55
177
DQ51 VSS45
178 C468 Co-layout with C467
179 180 DDR_B_D60
DDR_B_D56 VSS46 DQ60 DDR_B_D61 +0.75VS
181 182
DDR_B_D57 DQ56 DQ61 +1.5V
183 184
DQ57 VSS47 DDR_B_DQS#7 0.1U_0402_16V4Z
185 186 DDR_B_DQS#7 6
DDR_B_DM7 VSS48 DQS#7 DDR_B_DQS7
187 DM7 DQS7 188 DDR_B_DQS7 6 2 2 1 1
189 190
DDR_B_D58 VSS49 VSS50 DDR_B_D62 C464 C465 C466 + C468
191 192
DDR_B_D59 DQ58 DQ62 DDR_B_D63 330U_2.5V_M
193 DQ59 DQ63 194
R287 10K_0402_5% 195 196 1 1 2
1 2 197
VSS51 VSS52
198 EVENT#_B 12/25 Solve layout test point issue 0.1U_0402_16V4Z 4.7U_0603_6.3V6K 2
SA0 EVENT#
+3VS 199 200 SMB_CK_DAT0 9,21
VDDSPD SDA
201 202 SMB_CK_CLK0 9,21
SA1 SCL
203
VTT1 VTT2
204 +0.75VS Place near DIMM2
1
4 R288 4
205 G1 G2 206
10K_0402_5% FOX_AS0A626-U4SN-7F
CONN@
2

DIMM_B STD H:4mm THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII SO-DIMM 2
Size Document Number
Rev
Custom 1.0
<Address: 01> DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-6032P
A B C D E
A B C D E
U5B
D4 A5 HDMI_TXD2+
GFX_RX0P GFX_TX0P HDMI_TXD2+ 19
C4 PART 2 OF 6 B5 HDMI_TXD2-
GFX_RX0N GFX_TX0N HDMI_TXD2- 19
A3 A4 HDMI_TXD1+ HDMI_TXD1+ 19
GFX_RX1P GFX_TX1P HDMI_TXD1-
B3 GFX_RX1N GFX_TX1N B4 HDMI_TXD1- 19
C2 C3 HDMI_TXD0+ HDMI_TXD0+ 19 HDMI
GFX_RX2P GFX_TX2P HDMI_TXD0-
C1 GFX_RX2N GFX_TX2N B2 HDMI_TXD0- 19
E5 D1 HDMI_CLK0+
GFX_RX3P GFX_TX3P HDMI_CLK0+ 19
F5 D2 HDMI_CLK0- HDMI_CLK0- 19
GFX_RX3N GFX_TX3N
G5 GFX_RX4P GFX_TX4P E2
G6 GFX_RX4N GFX_TX4N E1
H5 GFX_RX5P GFX_TX5P F4
H6
GFX_RX5N GFX_TX5N
F3 < If integrated GFX is used, some PCIE pairs are used as HDMI signal pairs >
J6 F1
GFX_RX6P GFX_TX6P RS880M Display Port Support (muxed on GFX)
J5 GFX_RX6N GFX_TX6N F2
1 1
J7 H4
GFX_RX7P GFX_TX7P
J8 GFX_RX7N GFX_TX7N H3
L5 H1 GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0
GFX_RX8P GFX_TX8P
L6 GFX_RX8N GFX_TX8N H2
M8 J2
GFX_RX9P GFX_TX9P GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1
L8 J1
GFX_RX9N GFX_TX9N
PCIE I/F GFX

P7 GFX_RX10P GFX_TX10P K4
M7 GFX_RX10N GFX_TX10N K3
P5 K1
GFX_RX11P GFX_TX11P
M5 GFX_RX11N GFX_TX11N K2
R8 M4
GFX_RX12P GFX_TX12P
P8 M3
GFX_RX12N GFX_TX12N
R6 M1
GFX_RX13P GFX_TX13P
R5 GFX_RX13N GFX_TX13N M2
P4 GFX_RX14P GFX_TX14P N2
P3 GFX_RX14N GFX_TX14N N1
T4 GFX_RX15P GFX_TX15P P1
T3 P2
GFX_RX15N GFX_TX15N
AE3 GPP_RX0P GPP_TX0P AC1
AD4 GPP_RX0N GPP_TX0N AC2
< To Card crader > AE2 AB4 PCIE_ITX_PRX_P1 C122 1 2 0.1U_0402_16V7K
30 PCIE_PTX_C_IRX_P1 GPP_RX1P GPP_TX1P PCIE_ITX_PRX_N1 PCIE_ITX_C_PRX_P1 30
AD3 AB3 C123 1 2 0.1U_0402_16V7K < To Card crader >
30 PCIE_PTX_C_IRX_N1 GPP_RX1N GPP_TX1N PCIE_ITX_PRX_P2 PCIE_ITX_C_PRX_N1 30
< To WLAN > AD1 AA2 C124 1 2 0.1U_0402_16V7K
26 PCIE_PTX_C_IRX_P2 GPP_RX2P GPP_TX2P PCIE_ITX_C_PRX_P2 26
AD2 PCIE I/F GPP AA1 PCIE_ITX_PRX_N2 C125 1 2 0.1U_0402_16V7K < To WLAN >
26 PCIE_PTX_C_IRX_N2 GPP_RX2N GPP_TX2N PCIE_ITX_PRX_P3 PCIE_ITX_C_PRX_N2 26
< To LAN > V5 Y1 C126 1 2 0.1U_0402_16V7K
27 PCIE_PTX_C_IRX_P3 GPP_RX3P GPP_TX3P PCIE_ITX_PRX_N3 PCIE_ITX_C_PRX_P3 27
W6 Y2 C127 1 2 0.1U_0402_16V7K < To LAN >
27 PCIE_PTX_C_IRX_N3 GPP_RX3N GPP_TX3N PCIE_ITX_C_PRX_N3 27
U5 GPP_RX4P GPP_TX4P Y4
U6 Y3
GPP_RX4N GPP_TX4N
U8 V1
GPP_RX5P GPP_TX5P
U7 GPP_RX5N GPP_TX5N V2 < To WWAN >
2 SB_TX0P_C C130 0.1U_0402_16V7K 2
20 SB_RX0P AA8 SB_RX0P SB_TX0P AD7 1 2 SB_TX0P 20
20 SB_RX0N Y8 AE7 SB_TX0N_C C131 1 2 0.1U_0402_16V7K
SB_RX0N SB_TX0N SB_TX1P_C SB_TX0N 20
20 SB_RX1P AA7 AE6 C132 1 2 0.1U_0402_16V7K
SB_RX1P SB_TX1P SB_TX1N_C SB_TX1P 20
< From SB820 : x4 PCIE A-link > 20 SB_RX1N Y7 AD6 C133 1 2 0.1U_0402_16V7K < To SB820 : x4 PCEI A-link>
SB_RX1N SB_TX1N SB_TX2P_C SB_TX1N 20
20 SB_RX2P AA5 PCIE I/F SB AB6 C134 1 2 0.1U_0402_16V7K
SB_RX2P SB_TX2P SB_TX2N_C SB_TX2P 20
20 SB_RX2N AA6 AC6 C135 1 2 0.1U_0402_16V7K
SB_RX2N SB_TX2N SB_TX2N 20
20 SB_RX3P W5 AD5 SB_TX3P_C C136 1 2 0.1U_0402_16V7K < TX Impedance Calibration. Connect to GND >
SB_RX3P SB_TX3P SB_TX3N_C SB_TX3P 20 < RX Impedance Calibration. Connect to VDDPCIE >
20 SB_RX3N Y5 AE5 C137 1 2 0.1U_0402_16V7K
SB_RX3N SB_TX3N SB_TX3N 20
AC8 R51 1 2 1.27K_0402_1%
PCE_CALRP(PCE_BCALRP) R54 2K_0402_1%
AB8 1 2 +1.1VS
PCE_CALRN(PCE_BCALRN)
RS880M_FCBGA528 RS880MR1@ R51 within U5 1"
L R54 within U5 1"
U5A
H_CADOP0 Y25 D24 H_CADIP0
H_CADIP[0..15] H_CADON0 HT_RXCAD0P HT_TXCAD0P H_CADIN0
H_CADIP[0..15] 5 H_CADOP1
Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25
H_CADIP1 H_CADOP[0..15]
V22 E24 5 H_CADOP[0..15]
H_CADIN[0..15] H_CADON1 HT_RXCAD1P HT_TXCAD1P H_CADIN1
H_CADIN[0..15] 5 V23 E25
H_CADOP2 HT_RXCAD1N HT_TXCAD1N H_CADIP2 H_CADON[0..15]
V25 F24 5 H_CADON[0..15]
H_CADON2 HT_RXCAD2P HT_TXCAD2P H_CADIN2
V24 F25
H_CADOP3 HT_RXCAD2N HT_TXCAD2N H_CADIP3
U24 F23
U25 F22
T25 HT_RXCAD4P HT_TXCAD4P H23
H_CADON4 T24 H22 H_CADIN4
HYPER TRANSPORT CPU I/F
P22 J25
P23 J24
P25 K24
P24 HT_RXCAD6N HT_TXCAD6N K25
3 H_CADOP7 H_CADIP7 3
N24 HT_RXCAD7P HT_TXCAD7P K23
H_CADON7 N25 K22 H_CADIN7
HT_RXCAD7N HT_TXCAD7N
< From S1G4 CPU : x16 HT> < To S1G4 CPU : x16 HT>
H_CADOP8 AC24 F21 H_CADIP8
AC25 HT_RXCAD8N HT_TXCAD8N G21
H_CADOP9 AB25 G20 H_CADIP9
AB24 H21
AA24 J20
AA25 J21
Y22 J18
Y23 K17
W21 L19
W20 HT_RXCAD12N HT_TXCAD12N J19
H_CADOP13 V21 M19 H_CADIP13
V20 L18
U20 M21
U21 P21
U19 P18
U18 M18
HT_RXCAD15N HT_TXCAD15N
H_CLKOP0 T22 H24 H_CLKIP0
5 H_CLKOP0 HT_RXCLK0P HT_TXCLK0P H_CLKIP0 5
H_CLKON0 T23 H25 H_CLKIN0
5 H_CLKON0 H_CLKOP1 HT_RXCLK0N HT_TXCLK0N H_CLKIP1 H_CLKIN0 5
5 H_CLKOP1 AB23 HT_RXCLK1P HT_TXCLK1P L21 H_CLKIP1 5
H_CLKON1 AA22 L20 H_CLKIN1
5 H_CLKON1 HT_RXCLK1N HT_TXCLK1N H_CLKIN1 5
H_CTLOP0 M22 M24 H_CTLIP0
5 H_CTLOP0 H_CTLON0 HT_RXCTL0P HT_TXCTL0P H_CTLIN0 H_CTLIP0 5
5 H_CTLON0 M23 M25 H_CTLIN0 5
H_CTLOP1 HT_RXCTL0N HT_TXCTL0N H_CTLIP1
5 H_CTLOP1 R21 P19 H_CTLIP1 5
H_CTLON1 HT_RXCTL1P HT_TXCTL1P H_CTLIN1
5 H_CTLON1 R20 R18 H_CTLIN1 5
HT_RXCTL1N HT_TXCTL1N
R52 1 2 301_0402_1% C23 B24 R53 1 2 301_0402_1%
HT_RXCALP HT_TXCALP
A24 HT_RXCALN HT_TXCALN B25
4 4
RS880M_FCBGA528 RS880MR1@
L Place within 1" layout 1:2 L Place within 1" layout 1:2
/
RS880M HT/PCIE
Custom LA-6032P 1.0
A B C D E
A B C D E
+3VS
L3 +AVDD1@125mA U5C
1 2 +AVDD1 +AVDD1 F12 A22 LCD_TXOUT0+ 18
BLM18PG121SN1D_0603 AVDD1(NC) TXOUT_L0P(NC)
1 E12
AVDD2(NC) PART 3 OF 6 TXOUT_L0N(NC)
B22 LCD_TXOUT0- 18
+AVDD2 F14 A21 LCD_TXOUT1+ 18
C139 AVDDDI(NC) TXOUT_L1P(NC)
G15 AVSSDI(NC) TXOUT_L1N(NC) B21 LCD_TXOUT1- 18
2.2U_0603_6.3V6K +AVDDQ H15 B20 LCD_TXOUT2+ 18
2 AVDDQ(NC) TXOUT_L2P(NC)
H14 AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) A20 LCD_TXOUT2- 18
TXOUT_L3P(NC) A19
< LVDS dual channel : channel 1 >
+1.8VS
2/2 Fine tune pin define E17 C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2) B19
F17
CRT/TVOUT
L5 Y(DFT_GPIO2)
F15 B18
+AVDD2 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC)
TXOUT_U0N(NC) A18
1 0_0603_5% CRT_R_R 1
G18 A17
1 1
G17
RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3)
B17
+VDDLT18@220mA
C142 C143 CRT_G_R REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2)
E18 D20
2.2U_0603_6.3V6K 0.1U_0402_16V4Z GREEN(DFT_GPIO1) TXOUT_U2P(NC)
F18 GREENb(NC) TXOUT_U2N(NC) D21
2 2 CRT_B_R L2
E19 D18
BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) +VDDLTP18
F19 D19 1 2 +1.8VS
+1.8VS BLUEb(NC) TXOUT_U3N(NC)
1 BLM18PG121SN1D_0603
15,17 CRT_HSYNC A11 DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) B16 LCD_TXCLK+ 18
L6 B11 A16 LCD_TXCLK- 18
15,17 CRT_VSYNC DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3)
1 2 +AVDDQ UMA_CRT_CLK F8 D16 C138
17 UMA_CRT_CLK DAC_SCL(PCE_RCALRN) TXCLK_UP(PCIE_RESET_GPIO4) 2 2.2U_0603_6.3V6K
BLM18PG121SN1D_0603 1 UMA_CRT_DATA E8 D17
17 UMA_CRT_DATA DAC_SDA(PCE_TCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
C144 R58 1 2 715_0402_1% G14
2.2U_0603_6.3V6K DAC_RSET(PWM_GPIO1) +VDDLTP18
VDDLTP18(NC) A13
2 L4
+NB_PLLVDD A12 PLLVDD(NC) VSSLTP18(NC) B13
+NB_HTPVDD D14 +VDDLT18 1 2 +1.8VS
PLLVDD18(NC) +VDDLT18
B12 A15 1 1 BLM18PG121SN1D_0603
LVTM
PLLVSS(NC) VDDLT18_1(NC)
B15
Total +1.1VS_PLL@230mA
PLL PWR
VDDLT18_2(NC)
+VDDA18HTPLL H17 A14
VDDA18HTPLL VDDLT33_1(NC) C140 C141
VDDLT33_2(NC) B14
+1.1VS 0.1U_0402_16V4Z 2 2 4.7U_0805_10V4Z
+VDDA18PCIEPLL D7 VDDA18PCIEPLL1
L7 +NB_PLLVDD E7 C14
0_0402_5% VDDA18PCIEPLL2 VSSLT1(VSS)
1 2 D15
BLM18PG121SN1D_0603 R59 NB_RESET# D8 VSSLT2(VSS)
1 15,20,26,27,30,31,32 PLT_RST# 1 2 C16
NB_PWRGD SYSRESETb VSSLT3(VSS)
21 NB_PWRGD A10 POWERGOOD VSSLT4(VSS) C18
C145 NB_LDTSTOP# C10 C20
2.2U_0603_6.3V6K CPU_LDT_REQ# C12 LDTSTOPb VSSLT5(VSS)
12/07 Internal clock gen E20
PM
2 20 CPU_LDT_REQ# ALLOW_LDTSTOP VSSLT6(VSS)
VSSLT7(VSS) C22
CLK_NBHT C25 If support VB, R780 R777->SMT, R776->@
20 CLK_NBHT CLK_NBHT# HT_REFCLKP
20 CLK_NBHT# C24
HT_REFCLKN If no support VB, R776-->SMT, R780 R777->@
Total +1.8VS PLL@100mA CLK_NB_REFCLK E11
20 CLK_NB_REFCLK REFCLK_P/OSCIN(OSCIN)
CLOCKs
2 +1.8VS L8 +NB_HTPVDD CLK_NB_REFCLK# F11 E9 2
20 CLK_NB_REFCLK# REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) UMA_ENVDD 18
1 2 NBGFX_CLK F7 R776 1 2 0_0402_5% @
BLM18PG121SN1D_0603 NBGFX_CLK# NBGFX_CLK LVDS_BLON(PCE_RCALRP) VARY_ENBKL R780 1
1 T2 G12 2 0_0402_5% UMA_ENBKL 31
GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2)
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
NBGFX_CLK# T1 GFX_REFCLKN
1
C146
2.2U_0603_6.3V6K U1 R777 1 2 0_0402_5% GMCH_INVT_PWM 18
2 GPP_REFCLKP
4.7K_0402_5%
4.7K_0402_5%
U2 @ @ @
GPP_REFCLKN
1
CLK_SBLINK_BCLK V4
PS:Need to fine tune R783 and R784 on Page17
2
20 CLK_SBLINK_BCLK CLK_SBLINK_BCLK# V3 GPPSB_REFCLKP(SB_REFCLKP)
RS15 RS16
20 CLK_SBLINK_BCLK# GPPSB_REFCLKN(SB_REFCLKN) R778 R781 R779
LCD_EDID_CLK B9
2
18 LCD_EDID_CLK LCD_EDID_DATA I2C_CLK HPD

A9 D9
18 LCD_EDID_DATA
HDMIDAT_UMA B8
I2C_DATA MIS. TMDS_HPD(NC)
D10
HPD 19 < HDMI hot-plug detection >
+1.8VS +VDDA18HTPLL 19 HDMIDAT_UMA HDMICLK_UMA DDC_DATA0/AUX0N(NC) HPD(NC)
19 HDMICLK_UMA A8 DDC_CLK0/AUX0P(NC)
L9 B7 D12 SUS_STAT#
DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5) SUS_STAT# 15,21
1 2 A7 < Strap option pin or gate side-port memory IO >
BLM18PG121SN1D_0603 DDC_DATA1/AUX1N(NC)
1 THERMALDIODE_P AE8 Strap pin
+3VS 2 @ 1 B10 AD8
C147 R64 10K_0402_5% STRP_DATA THERMALDIODE_N
2.2U_0603_6.3V6K G11 D13 1 2
2 RSVD TESTMODE R65 1.8K_0402_5%
2 @ 1 AUX_CAL C8
R66 150_0402_1% AUX_CAL(NC)
+1.8VS +VDDA18PCIEPLL Strap pin
L10
1 2
BLM18PG121SN1D_0603 +1.8VS
1
C148 +1.8VS
1
2.2U_0603_6.3V6K
3 2 R805 3
2.2K_0402_5%
1
R806
2 2
B 2.2K_0402_5%
Q36
2
E
3 1 NB_LDTSTOP#
7,20 LDT_STOP#
C
+1.8VS MMBT3904_NL_SOT23-3
@
R804 2 1 CPU_LDT_REQ# R822 1 2 0_0402_5%
1K_0402_5%
1 2 NB_PWRGD
R63 300_0402_5% Contact with NB signal Contact to CRT conn signal
CPU_LDT_REQ# Pull +1.8VS on page 20 CRT_R_R L41 1 2 NBQ100505T-800Y-N_2P

CRT_R 17
CRT_G_R L42 1 2 NBQ100505T-800Y-N_2P
CRT_R_R CRT_G 17
1 2
R55 140_0402_1% CRT_B_R L43 1 2 NBQ100505T-800Y-N_2P
CRT_B 17
1 2 CRT_G_R
R56 150_0402_1%
1 2 CRT_B_R 1 1 1
R57 150_0402_1%
C913 C912 C911
2.2P_0402_50V8C 2.2P_0402_50V8C 2.2P_0402_50V8C
2 2 2
4 4
2/2 Add L41 L42 L43 C911 C912 C913 for EMI request
/
RS880M VEDIO/CLK GEN
Custom LA-6032P 1.0
A B C D E
2 1
U5D
PAR 4 OF 6
MEM_A0 AB12 AA18 MEM_DQ0
+1.5VS MEM_A1 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1
AE16 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) AA20
MEM_A2 V11 AA19 MEM_DQ2
MEM_A3 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) MEM_DQ3
AE15 Y19
MEM_A4 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) MEM_DQ4
AA12 MEM_A4(NC) MEM_DQ4(NC) V17
2 2 1 1 1 1 MEM_A5 AB16 AA17 MEM_DQ5
SIDE@ SIDE@ SIDE@ SIDE@ SIDE@ SIDE@ MEM_A6 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6
AB14 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) AA15
C600 C601 C602 C603 C614 C604 MEM_A7 AD14 Y15 MEM_DQ7
1U_0402_6.3V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0603_6.3V6M 10U_0603_6.3V6M MEM_A8 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8
AD13 AC20
1 1 2 2 2 2 MEM_A9 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9
AD15 MEM_A9(NC) MEM_DQ9/DVO_D5(NC) AD19
MEM_A10 MEM_DQ10
SBD_MEM/DVO_I/F
AC16 AE22
MEM_A11 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) MEM_DQ11
AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
MEM_A12 AC14 AB20 MEM_DQ12
MEM_A13 MEM_A12(NC) MEM_DQ12(NC) MEM_DQ13
Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
AC22 MEM_DQ14
MEM_BA0 MEM_DQ14/DVO_D10(NC) MEM_DQ15
AD16 AD21
MEM_BA1 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) R332
AE17 MEM_BA1(NC)
MEM_BA2 AD17 Y17 MEM_DQS_P0 1 2 0_0603_5%
MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) +1.8VS
W18 MEM_DQS_N0 1
MEM_RAS# MEM_DQS0N/DVO_IDCKN(NC) MEM_DQS_P1 SIDE@
W12 MEM_RASb(NC) MEM_DQS1P(NC) AD20
MEM_CAS# Y12 AE21 MEM_DQS_N1 C605
MEM_WE# MEM_CASb(NC) MEM_DQS1N(NC) 2.2U_0603_6.3V4Z
AD18
MEM_CS# MEM_WEb(NC) MEM_DM0 2
AB13 W17
MEM_CKE MEM_CSb(NC) MEM_DM0(NC) MEM_DM1
AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
MEM_ODT V14 MEM_ODT(NC) +1.8V_IOPLLVDD R333
IOPLLVDD18(NC) AE23
B +1.5VS MEM_CLKP V15 AE24 +NB_IOPLLVDD 1 2 0_0603_5% B
MEM_CKP(NC) IOPLLVDD(NC) +1.1VS
MEM_CLKN W14 1
SIDE@ R334 MEM_CKN(NC) SIDE@
AD23
MEM_COMP_P IOPLLVSS(NC)
2 1 40.2_0402_1% AE12 MEM_COMPP(NC)
C606
2
1 AD12 AE18 +MEM_VREF1 2.2U_0603_6.3V4Z

SIDE@ SIDE@ MEM_COMPN(NC) MEM_VREF(NC) 2
C608 R335
0.1U_0402_16V4Z 1K_0402_1% SIDE@ R336 RS880MR1@ RS880M_FCBGA528
2 MEM_COMP_N
+1.5VS 2 1 40.2_0402_1%
1
+MEM_VREF
2
1 U27
SIDE@ SIDE@ MEM_COMP_P and MEM_COMP_N trace
C609 R337 +MEM_VREF M9 E4 MEM_DQ0
0.1U_0402_16V4Z 1K_0402_1% width >=10mils and 10mils spacing from H2
VREFCA DQL0
F8 MEM_DQ6
2 VREFDQ DQL1
other Signals in X,Y,Z directions F3 MEM_DQ2
1
MEM_A0 DQL2 MEM_DQ5

N4 A0 DQL3 F9
MEM_A1 P8 H4 MEM_DQ3
MEM_A2 A1 DQL4 MEM_DQ7
P4 H9
MEM_A3 A2 DQL5 MEM_DQ1
N3 A3 DQL6 G3
MEM_A4 P9 H8 MEM_DQ4
MEM_A5 A4 DQL7
P3 A5
+1.5VS MEM_A6 R9
MEM_A7 A6 MEM_DQ11
R3 D8
MEM_A8 A7 DQU0 MEM_DQ15
T9 C4
MEM_A9 A8 DQU1 MEM_DQ9
R4 A9 DQU2 C9
2
1 MEM_A10 L8 C3 MEM_DQ10
SIDE@ SIDE@ MEM_A11 A10/AP DQU3 MEM_DQ12
R8 A8
C610 R338 MEM_A12 A11 DQU4 MEM_DQ14
N8 A3
0.1U_0402_16V4Z 1K_0402_1% MEM_A13 A12 DQU5 MEM_DQ8
T4 B9
2 A13 DQU6 MEM_DQ13
T8 A4
1
+MEM_VREF1 A14 DQU7

M8
A15/BA3
2
1
SIDE@ SIDE@ MEM_BA0 M3 B3
BA0 VDD +1.5VS
C611 R339 MEM_BA1 N9 D10
0.1U_0402_16V4Z 1K_0402_1% MEM_BA2 BA1 VDD
M4 G8
2 BA2 VDD
K3
1
VDD
K9
VDD
N2
@ MEM_CLKP VDD
2 1 J8 N10
R340 100_0402_1% MEM_CLKN CK VDD
K8 R2
MEM_CKE CK VDD
K10 CKE/CKE0 VDD R10
MEM_ODT K2 A2
MEM_CS# ODT/ODT0 VDDQ
L3 A9
MEM_RAS# CS/CS0 VDDQ
J4 RAS VDDQ C2
MEM_CAS# K4 C10
MEM_WE# CAS VDDQ
L4 D3
WE VDDQ
E10
VDDQ
F2
MEM_DQS_P0 VDDQ
F4 DQSL VDDQ H3
MEM_DQS_P1 C8 H10
DQSU VDDQ
MEM_DM0 E8 A10
MEM_DM1 DML VSS
D4 B4
DMU VSS
E2
VSS
G9
MEM_DQS_N0 VSS
G4 DQSL VSS J3
MEM_DQS_N1 B8 J9
DQSU VSS
M2
R341 2 SIDE@ 1 10K_0402_5% VSS
+1.5VS M10
A VSS A
P2
VSS
For Side port only 21 SP_DDR3_RST# T3
RESET VSS
P10
T2
VSS
L9 T10
ZQ/ZQ0 VSS
J2 NC/ODT1 VSSQ B2
L2 B10
NC/CS1 VSSQ
J10 D2
NC/CE1 VSSQ
2
L10 NC/ZQ1 VSSQ D9

R342 E3
243_0402_1% VSSQ
A1 E9
SIDE@ NC VSSQ
A11 F10
NC VSSQ
T1 G2
1
NC VSSQ
T11 G10
NC VSSQ
100-BALL
SDRAM DDR3
K4W1G1646D-EC15_FBGA100
SIDE@
/
RS880M SIDE PORT
Custom LA-6032P 1.0
2 1
A B C D E
U5F
A25 VSSAHT1 VSSAPCIE1 A2
D23 VSSAHT2 PART 6/6 VSSAPCIE2 B1
E22 VSSAHT3 VSSAPCIE3 D3
G22 D5
VSSAHT4 VSSAPCIE4
G24 E4
+VDDHT/+VDDHTRX@680mA G25
VSSAHT5 VSSAPCIE5
G1
1 L12 VSSAHT6 VSSAPCIE6 1
H19 G2
+VDDHT VSSAHT7 VSSAPCIE7
+1.1VS 2 1 J22 VSSAHT8 VSSAPCIE8 G4
0_0805_5% L17 H7
VSSAHT9 VSSAPCIE9
1 1 1 1 1 L22 VSSAHT10 VSSAPCIE10 J4
L11 L24 R7
C150 C151 C152 C153 C154 VSSAHT11 VSSAPCIE11
1 2 L25 L1
+VDDA11PCIE@2500mA FBMA-L11-201209-221LMA30T_0805
+1.1VS
M20
VSSAHT12 VSSAPCIE12
L2
2 2 2 2 2 U5E VSSAHT13 VSSAPCIE13
N22 VSSAHT14 VSSAPCIE14 L4
J17 A6 +VDDA11PCIE P20 L7
VDDHT_1 VDDPCIE_1 C159 10U_0805_10V6K VSSAHT15 VSSAPCIE15
K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6 R19 VSSAHT16 VSSAPCIE16 M6
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z L16 C6 R22 N4
VDDHT_3 VDDPCIE_3 10U_0805_10V6K VSSAHT17 VSSAPCIE17
L13 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2A M16
VDDHT_4 VDDPCIE_4
D6 C155 R24
VSSAHT18 VSSAPCIE18
P6
2 1 +VDDHTRX P16 E6 R25 R1
0_0805_5% VDDHT_5 VDDPCIE_5 C160 1U_0402_6.3V4Z VSSAHT19 VSSAPCIE19
R16 VDDHT_6 VDDPCIE_6 F6 1 2 H20 VSSAHT20 VSSAPCIE20 R2
1 1 1 1 T16 G7 C161 1 2 1U_0402_6.3V4Z U22 R4
VDDHT_7 VDDPCIE_7 C164 1U_0402_6.3V4Z VSSAHT21 VSSAPCIE21
VDDPCIE_8 H8 1 2 V19 VSSAHT22 VSSAPCIE22 V7
C156 C162 C157 C163 C158 C165 1U_0402_6.3V4Z
GROUND
H18 VDDHTRX_1 VDDPCIE_9 J9 1 2 W22 VSSAHT23 VSSAPCIE23 U4
G19 K9 C166 2 1 0.1U_0402_16V4Z W24 V8
2 2 2 2 VDDHTRX_2 VDDPCIE_10 C167 0.1U_0402_16V4Z VSSAHT24 VSSAPCIE24
F20 M9 2 1 W25 V6
10U_0805_10V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDHTRX_3 VDDPCIE_11 VSSAHT25 VSSAPCIE25
E21 VDDHTRX_4 VDDPCIE_12 L9 Y21 VSSAHT26 VSSAPCIE26 W1
D22 VDDHTRX_5 VDDPCIE_13 P9 AD25 VSSAHT27 VSSAPCIE27 W2
0.1U_0402_16V4Z 0.1U_0402_16V4Z B23 R9 W4
VDDHTRX_6 VDDPCIE_14 VSSAPCIE28
A23 VDDHTRX_7 VDDPCIE_15 T9 L12 VSS11 VSSAPCIE29 W7
L14 V9 M14 W8
+1.1VS 2 1
+VDDHTTX@680mA +VDDHTTX AE25
VDDPCIE_16
U9 N13
VSS12 VSSAPCIE30
Y6
0_0805_5% VDDHTTX_1 VDDPCIE_17 VSS13 VSSAPCIE31
AD24 VDDHTTX_2 P12 VSS14 VSSAPCIE32 AA4
1 1 1 1 1 AC23 VDDHTTX_3 VDDC_1 K12 P15 VSS15 VSSAPCIE33 AB5
AB22 VDDHTTX_4 VDDC_2 J14 R11 VSS16 VSSAPCIE34 AB1
C168 C169 C170 C171 C172 AA21 U16 R14 AB7
VDDHTTX_5 VDDC_3 VSS17 VSSAPCIE35
Y20 J11 T12 AC3
2 2 2 2 2 VDDHTTX_6 VDDC_4 +NB_CORE VSS18 VSSAPCIE36
W19 VDDHTTX_7 VDDC_5 K15 U14 VSS19 VSSAPCIE37 AC4
POWER
V18 VDDHTTX_8 VDDC_6 M12 U11 VSS20 VSSAPCIE38 AE1
2 2
U17 L14 U15 AE4
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z T17
VDDHTTX_9 VDDC_7
L11
+NB_CORE@7600mA V12
VSS21 VSSAPCIE39
AB2
0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDHTTX_10 VDDC_8 VSS22 VSSAPCIE40
R17 M13 W11
VDDHTTX_11 VDDC_9 VSS23
P17 VDDHTTX_12 VDDC_10 M15 W15 VSS24
M17 VDDHTTX_13 VDDC_11 N12 AC12 VSS25 VSS1 AE14
C181
C182
C183
C184
C177
C185
C186
C187
C178
C188
C189
L16 N14 AA14 D11
+1.8VS 2 1
+VDDA18PCIE@640mA +VDDA18PCIE J10
VDDC_12
P11 1 1 1 1 1 1 1 1 1 1 1 1 C191 Y18
VSS26 VSS2
G8
0_0805_5% VDDA18PCIE_1 VDDC_13 VSS27 VSS3
P10 P13 AB11 E14
VDDA18PCIE_2 VDDC_14 VSS28 VSS4
1 1 1 1 1 1 K10 P14 AB15 E15
10U_0805_10V6K
10U_0805_10V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
M10 VDDA18PCIE_4 VDDC_16 R12 AB17 VSS30 VSS6 J15
2 2 2 2 2 2 2 2 2 2 2 2
1000P_0402_50V7K
C173 C174 C175 C179 C180 C176 L10 R15 AB19 J12
4.7U_0805_10V4Z VDDA18PCIE_5 VDDC_17 VSS31 VSS7
W9 T11 AE20 K14
2 2 2 2 2 2 VDDA18PCIE_6 VDDC_18 VSS32 VSS8
H9 T15 AB21 M11
T10 U12 K11 L15
R10 VDDA18PCIE_9 VDDC_21 T14
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z Y9 J16 RS880M_FCBGA528 RS880MR1@
0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDA18PCIE_10 VDDC_22
AA9
VDDA18PCIE_11
AB9 VDDA18PCIE_12 VDD_MEM1(NC) AE10
AD9 AA11
VDDA18PCIE_13 VDD_MEM2(NC)
AE9 VDDA18PCIE_14 VDD_MEM3(NC) Y11
U10 AD10
VDDA18PCIE_15 VDD_MEM4(NC) L82 SIDE@
AB10
+1.8VS
5mA F9
VDD_MEM5(NC)
AC10 1 2 +1.8VS
VDD18_1 VDD_MEM6(NC)
G9
VDD18_2
C612SIDE@
C613SIDE@
C597SIDE@
C598SIDE@
C599SIDE@
+1.8VS 1 2 AE11 H11 0_0603_5%
L18 VDD18_MEM1(NC) VDD33_1(NC)
AD11 H12
0_0603_5% VDD18_MEM2(NC) VDD33_2(NC)
1 50mA 1
1
C192 SIDE@ +3VS
1 1 1 1 1
1U_0402_6.3V4Z C193 R67
1U_0402_6.3V4Z 1 2 0_0402_5%
2 2
4.7U_0805_10V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z C194
3 NOSIDE@ 2 2 2 2 2 3
1 2
2
0.1U_0402_16V4Z C200
60mA
4 4
/
RS880MPWR/GND
Custom LA-6032P 1.0
A B C D E
A B C D E
RS880 DFT_GPIO5 mux at CRT_VSYNC pull High to 3K DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
12,17 CRT_VSYNC 2 1 +3VS Enables the Test Debug Bus using GPIO.
R68 3K_0402_5% 1 : Disable (RS880)
2 1 0 : Enable (RS880)
1 R69 @ 3K_0402_5% 1
PIN: RS880-->VSYNC#
DFT_GPIO[4:2]: STRAP_PCIE_GPP_CFG[2:0]
These pin straps are used to configure PCI-E GPP mode.

000 : 00001
001 : 00010
RS780 use register to control PCI-E configure 010 : 01011
011 : 00100
100 : 01010
101 : 01100
111 : 01011
2 2
DFT_GPIO1: LOAD_EEPROM_STRAPS
Selects Loading of STRAPS from EPROM

1 : Bypass the loading of EEPROM straps and use Hardware Default Values
D5 @
2 1
0 : I2C Master can load strap values from EEPROM if connected, or use
12,21 SUS_STAT# PLT_RST# 12,20,26,27,30,31,32 default values if not connected
CH751H-40PT_SOD323-2 RS880:SUS_STAT#
DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb
3 3
RX881: Enables the Test Debug Bus using PCIE bus

1 : Disable ( Can still be enabled using nbcfg register access )
0 : Enable
RS880 use HSYNC to enable SIDE PORT (internal pull high)
RS880: Enables Side port memory ( RS780 use HSYNC#)
12,17 CRT_HSYNC 2 1 +3VS 1. Disable (RS880)

R70 3K_0402_5%
0 : Enable (RS880)
SIDE@
2 1
R71 3K_0402_5%
4 4
/
RS880M STRAPS
Custom LA-6032P 1.0
A B C D E
A B C D E
Use SB820M internal clock gen
1 1
2 2
3 3
4 4

Issued Date 2009-02-12 Deciphered Date 2009-02-12 Title
CLOCK GENERATOR
Custom LA-6051P 1.0
A B C D E
A B C D E
CRT+RJ45 FFC conn

Pin=20pin, pitch=0.5
1 1
1/28 Fine tune JP4 pin define
JP4
RJ45_GND 1
27 RJ45_GND RJ45_MIDI1+ 1
27 RJ45_MIDI1+ 2 2
RJ45_MIDI1- 3
27 RJ45_MIDI1- 3
4
RJ45_MIDI0+ 4
27 RJ45_MIDI0+ 5 5
3/23 switch noise soluation RJ45_MIDI0- 6
27 RJ45_MIDI0- 6
7 7
12 UMA_CRT_CLK 8 8
12 UMA_CRT_DATA 9
9
1 1 12,15 CRT_VSYNC 10 10
C914 C915 11
12,15 CRT_HSYNC 11
@ 12 12
10P_0402_25V8K
10P_0402_25V8K
@ 13
2 2 12 CRT_R 13
12 CRT_G 14
14
12 CRT_B 15
15
16 16
+3VS 17 17
2 2
+5VS 18 18
19 19 GND1 21
1 1 20 22
C909 C910 20 GND2
STARC_107K20-000000-G4
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2
CONN@
1/31 EMI request
3 3
4 4
/
CRT/TV-OUT Connector
Custom LA-6032P 1.0
A B C D E
A B C D E
LCD/PANEL BD. Conn.

+LCD_VDD +3VS
1
+3VS
R72 R73
150_0603_5% 100K_0402_5%
1
W= 60 mils 1
2
6 2
2
C201
0.1U_0402_16V7K
Q2A
3
1
S
2N7002DW-T/R7_SOT363-6 G
2 1 R74 2 2 Q3
2 AO3413_SOT23
3
47K_0402_5% D
1
C202 +LCD_VDD
0.01U_0402_25V7K
ENVDD Q2B 1
12 UMA_ENVDD 1 2 5 Inrush current = 0A W= 60 mils
R75 0_0402_5% 2N7002DW-T/R7_SOT363-6
1 1
4
1
C203 C204
@
R76 4.7U_0805_10V4Z 0.1U_0402_16V4Z
100K_0402_5% 2 2
2
< LVDS Connector >
2 +3VS 2
JLVDS1
+LCDVDD_R 1 1 2 LCD_EDID_CLK
1 R80 4.7K_0402_5%
2 2
+3VS 3 1 2 LCD_EDID_DATA
LCD_EDID_CLK 3 R81 4.7K_0402_5%
12 LCD_EDID_CLK 4
4
1000P_0402_50V7K
0.1U_0402_16V4Z
12 LCD_EDID_DATA LCD_EDID_DATA 5
LCD_TXOUT0- 5
12 LCD_TXOUT0- 6 6
1 1 LCD_TXOUT0+ 7
12 LCD_TXOUT0+ 7
@ 8
C208 C211 LCD_TXOUT1- 8
12 LCD_TXOUT1- 9
LCD_TXOUT1+ 9
12 LCD_TXOUT1+ 10
2 2 LCD_TXOUT2- 10
12 LCD_TXOUT2- 11 11
LCD_TXOUT2+ 12
12 LCD_TXOUT2+ 12
13
LCD_TXCLK- 13
12 LCD_TXCLK- 14 14
LCD_TXCLK+ 15
12 LCD_TXCLK+ 15
16 16
17 @
10K_0402_5%2 R79 17 EC_INVT_PWM INVT_PWM
1 18 31 EC_INVT_PWM 1 2
B+ R919 INVT_PWM 18 R782 0_0402_5%
19
BKOFF# BKOFF#_R 19
31 BKOFF# 1 2 20
L20 22_0402_5% 20
21
21
1
1 2 +LCD_INV 22 1/25 Pin24 +LCD_INV-->NC GMCH_INVT_PWM 1 2
22 12 GMCH_INVT_PWM
FBMA-L11-201209-221LMA30T_0805 23 R783 0_0402_5% R784
23
24 10K_0402_5%
R77 0_0603_5% +3VS_USB 24
1 1 1 +3VS 1 2 25 34
@ @ USB20_N9_R 25 MGND4
26 33
2
C215 C212 C214 USB20_P9_R 26 MGND3
27
27
28 28
3 2
0.1U_0402_16V4Z 68P_0402_50V8J2 0.1U_0402_25V4K 2 INT_MIC_CLK 3
29 29 MGND2 32
28 INT_MIC_CLK INT_MIC_DATA 30 31
28 INT_MIC_DATA 30 MGND1
1/19 R782-->@ and R783/R784-->SMT for VB function
I-PEX_20143-030E-20F~D
3
CONN@
D16
PACDN042Y3R_SOT23-3
1
@
R798 1 2 0_0402_5%
1.5A
+LCDVDD_R 2 L19 1 +LCD_VDD
L83 0_0805_5%
USB20_N9 4 3 USB20_N9_R 1 1
21 USB20_N9 4 3
C205 C206
USB20_P9 1 2 USB20_P9_R 0.1U_0402_16V4Z 4.7U_0805_10V4Z
21 USB20_P9 1 2 2 2
WCM-2012-900T_0805
R799 1 2 0_0402_5%
@
4 4

LCD CONN.
Custom LA-6032P 1.0
A B C D E
A B C D E
HDMI_CLK- @ 1 2 HDMI_R_CK-
R88 0_0402_5%
L21
1 1 2 2
D8 F1
+5VS 2 1 +5VS_HDMI 2 1 +HDMI_5V_OUT
4 3 1.1A_6V_MINISMDC110F-2
1
4 3 RB161M-20_SOD123-2 C216
WCM-2012-900T_0805
HDMI_CLK+ @ 1 2 HDMI_R_CK+ 0.1U_0402_16V4Z
R91 0_0402_5% 2
1 HDMI_TX0- @ HDMI_R_D0- 1
1 2
R92 0_0402_5%
L22
1
1 2
2 < HDMI Connector >
JHDMI1
4 3 HDMI_HPD 19
4 3 HP_DET
+HDMI_5V_OUT 18
C219 0.1U_0402_16V7K HDMI_TX0+ WCM-2012-900T_0805 +5V
11 HDMI_TXD0+ 1 2 17 DDC/CEC_GND
C220 1 2 0.1U_0402_16V7K HDMI_TX0- HDMI_TX0+ @ 1 2 HDMI_R_D0+ HDMI_SDATA 16
11 HDMI_TXD0- HDMI_TX1+ HDMI_SCLK SDA
C221 1 2 0.1U_0402_16V7K R95 0_0402_5% 15
11 HDMI_TXD1+ HDMI_TX1- HDMI_TX1- HDMI_R_D1- SCL
C222 1 2 0.1U_0402_16V7K @ 1 2 14
11 HDMI_TXD1- Reserved
R96 0_0402_5% 13
HDMI_R_CK- CEC
12 CK- GND 20
C223 1 2 0.1U_0402_16V7K HDMI_TX2+ L23 11 21
11 HDMI_TXD2+ HDMI_TX2- HDMI_R_CK+ CK_shield GND
C224 1 2 0.1U_0402_16V7K 1 2 10 22
11 HDMI_TXD2- HDMI_CLK+ 1 2 HDMI_R_D0- CK+ GND
C225 1 2 0.1U_0402_16V7K 9 23
11 HDMI_CLK0+ HDMI_CLK- D0- GND
C226 1 2 0.1U_0402_16V7K 8
11 HDMI_CLK0- HDMI_R_D0+ D0_shield
4 4 3 3 7 D0+
HDMI_R_D1- 6
WCM-2012-900T_0805 D1-
5 D1_shield
HDMI_TX1+ @ 1 2 HDMI_R_D1+ HDMI_R_D1+ 4
R99 0_0402_5% HDMI_R_D2- D1+
3
HDMI_TX2- @ HDMI_R_D2- D2-
1 2 2 D2_shield
R100 0_0402_5% HDMI_R_D2+ 1 D2+
L24 SUYIN_100042GR019M23BZR_19P-T
1 2 CONN@
1 2
4 4 3 3
2 2
WCM-2012-900T_0805
HDMI_TX2+ @ 1 2 HDMI_R_D2+
R103 0_0402_5% 1/28 Update JHDMI1 footprint
+3VS +3VS +HDMI_5V_OUT

1
R84 R85 R856 R855

4.7K_0402_5% 4.7K_0402_5% 2.2K_0402_5% 2.2K_0402_5%
2
2
1 6 HDMI_SDATA HDMI_CLK+ 1 2
12 HDMIDAT_UMA R89 715_0402_1%
2N7002DW-T/R7_SOT363-6 HDMI_CLK- 1 2
Q4A R90 715_0402_1%
5
HDMI_TX0- 1 2
4 3 HDMI_SCLK R93 715_0402_1%
3 12 HDMICLK_UMA HDMI_TX0+ 3
1 2
2N7002DW-T/R7_SOT363-6 R94 715_0402_1%
Q4B
HDMI_TX1- 1 2
R97 715_0402_1%
HDMI_TX1+ 1 2
R98 715_0402_1%
HDMI_TX2+ 1 2
R101 715_0402_1%
HDMI_TX2- 1 2
R102 715_0402_1%
1
D
+5VS 2
G
+5VS Q6 S
3
2N7002_SOT23-3
HDMI_HPD
2
R87 2 C218
+3VS 100K_0402_5% 0.1U_0402_16V4Z
C217 2
0.1U_0402_16V4Z
1
1
1
R83
1
2.2K_0402_5%
5
1
4 4
OE#
P
2 A Y 4 HPD 12
G
U6
2
SN74AHCT1G125GW_SOT353-5
3
R86
100K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
1
HDMI/CEC
Custom LA-6032P 1.0
A B C D E
A B C D E
C524 1 2 150P_0402_50V8J U7A
R326 33_0402_5% P1
SB800 Part 1 of 5
W2
A_RST# PCIE_RST# PCICLK0 PCI_CLK1
2 1 L1 W1 PCI_CLK1 24
A_RST# PCICLK1/GPO36 PCI_CLK2
PCI CLKS
PCICLK2/GPO37 W3 PCI_CLK2 24
C227 1 2 0.1U_0402_16V7K SB_RX0P_C AD26 W4 PCI_CLK3
11 SB_RX0P A_TX0P PCICLK3/GPO38 PCI_CLK3 24
C229 1 2 0.1U_0402_16V7K SB_RX0N_C AD27 Y1 PCI_CLK4
11 SB_RX0N A_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 24
C230 1 2 0.1U_0402_16V7K SB_RX1P_C AC28
11 SB_RX1P A_TX1P
C231 1 2 0.1U_0402_16V7K SB_RX1N_C AC29 V2
11 SB_RX1N A_TX1N PCIRST#
C232 1 2 0.1U_0402_16V7K SB_RX2P_C AB29
11 SB_RX2P A_TX2P
C228 1 2 0.1U_0402_16V7K SB_RX2N_C AB28
11 SB_RX2N A_TX2N
C233 1 2 0.1U_0402_16V7K SB_RX3P_C AB26 AA1
11 SB_RX3P A_TX3P AD0/GPIO0
C234 1 2 0.1U_0402_16V7K SB_RX3N_C AB27 AA4
11 SB_RX3N A_TX3N AD1/GPIO1
1 AA3 1
SB_TX0P AD2/GPIO2
11 SB_TX0P AE24 AB1
SB_TX0N A_RX0P AD3/GPIO3
11 SB_TX0N AE23 AA5
SB_TX1P A_RX0N AD4/GPIO4
11 SB_TX1P AD25 AB2
A_RX1P AD5/GPIO5
PCI EXPRESS INTERFACES

11 SB_TX1N SB_TX1N AD24 AB6
11 SB_TX2P AC24 AB5
11 SB_TX2N AC25 AA6
11 SB_TX3P AB25 AC2
11 SB_TX3N AB24 AC3
A_RX3N AD10/GPIO10
AC4
R104 AD11/GPIO11
2 1 590_0402_1% AD29 AC1
R105 PCIE_CALRP AD12/GPIO12
+PCIE_VDDR 2 1 2K_0402_1% AD28 PCIE_CALRN AD13/GPIO13 AD1
AD14/GPIO14 AD2
L Close to SB within 1" AA28 GPP_TX0P AD15/GPIO15 AC6

AA29 GPP_TX0N AD16/GPIO16 AE2
Y29 GPP_TX1P AD17/GPIO17 AE1
Y28 AF8
GPP_TX1N AD18/GPIO18
Y26 GPP_TX2P AD19/GPIO19 AE3
+3VALW Y27 AF1
C235 GPP_TX2N AD20/GPIO20
W28 AG1
GPP_TX3P AD21/GPIO21
2 1 W29 GPP_TX3N AD22/GPIO22 AF2
AE9 PCI_AD23
AD23/GPIO23 PCI_AD23 24
5
0.1U_0402_16V4Z U8 AA22 AD9 PCI_AD24

GPP_RX0P AD24/GPIO24 PCI_AD24 24
2 Y21 AC11 PCI_AD25
P
B GPP_RX0N AD25/GPIO25 PCI_AD25 24

4 PLT_RST# AA25 AF6 PCI_AD26
Y PLT_RST# 12,15,26,27,30,31,32 GPP_RX1P AD26/GPIO26 PCI_AD26 24
A_RST# 1 AA24 AF4 PCI_AD27
A GPP_RX1N AD27/GPIO27 PCI_AD27 24
G
NC7SZ08P5X_NL_SC70-5 W23 AF3 PCI_AD28

GPP_RX2P AD28/GPIO28 PCI_AD28 24
@ V24 AH2 PCI_AD29
PCI_AD29 24
3
GPP_RX2N AD29/GPIO29
2 1 W24 GPP_RX3P AD30/GPIO30 AG2
R106 8.2K_0402_5% W25 AH3
GPP_RX3N AD31/GPIO31
AA8
CBE0#
PCI INTERFACE
AD5
CBE1#
AD8
CBE2#
12/7 Add RS1~RS14 for internal clock gen CBE3#
AA10
2 FRAME# AE8 2
AB9
RS1 DEVSEL#
12 CLK_SBLINK_BCLK 2 1 0_0402_5% CLK_SBLINK_BCLK_R M23 AJ3
RS2 PCIE_RCLKP/NB_LNK_CLKP IRDY#
NB 12 CLK_SBLINK_BCLK# 2 1 0_0402_5% CLK_SBLINK_BCLK#_R P23 PCIE_RCLKN/NB_LNK_CLKN TRDY# AE7
PAR AC5
RS3 2 1 0_0402_5% CLK_NB_REFCLK_R U29 AF5
12 CLK_NB_REFCLK NB_DISP_CLKP STOP#
NB RS4 2 1 0_0402_5% CLK_NB_REFCLK#_R U28 AE6
12 CLK_NB_REFCLK# NB_DISP_CLKN PERR#
SERR# AE4
RS5 2 1 0_0402_5% CLK_NBHT_R T26 AE11
12 CLK_NBHT NB_HT_CLKP REQ0#
NB RS6 2 1 0_0402_5% CLK_NBHT#_R T27 AH5 2/8 GPIO35-->GPIO40 for 3G_OFF#
12 CLK_NBHT# NB_HT_CLKN REQ1#/GPIO40 3G_OFF# 26
AH4
RS7 REQ2#/CLK_REQ8#/GPIO41
7 CLK_CPU_BCLK 2 1 0_0402_5% CLK_CPU_BCLK_R V21 AC12 T31 PAD @
RS8 CPU_HT_CLKP REQ3#/CLK_REQ5#/GPIO42
CPU 7 CLK_CPU_BCLK# 2 1 0_0402_5% CLK_CPU_BCLK#_R T21 AD12
CPU_HT_CLKN GNT0#
AJ5
GNT1#/GPO44
V23 AH6
SLT_GFX_CLKP GNT2#/GPO45 T32 PAD @
T23 AB12
SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46
AB11
RS9 2 CLKRUN#
LAN 27 CLK_PCIE_LAN 1 0_0402_5% CLK_PCIE_LAN_R L29 AD7
RS10 2 GPP_CLK0P LOCK#
27 CLK_PCIE_LAN# 1 0_0402_5% CLK_PCIE_LAN#_R L28
GPP_CLK0N BT_PWR#
AJ6 BT_PWR# 26,29
RS11 2 INTE#/GPIO32
26 CLK_PCIE_MCARD2 1 0_0402_5% CLK_PCIE_MCARD2_R N29 GPP_CLK1P INTF#/GPIO33 AG6 BT_DET# BT_DET# 29
WLAN RS12 2 1 0_0402_5% CLK_PCIE_MCARD2#_R N28 AG4 BT_RST#
26 CLK_PCIE_MCARD2# GPP_CLK1N INTG#/GPIO34 BT_RST# 29
AJ4
RS13 2 INTH#/GPIO35
30 CLK_PCIE_MCARD0 1 0_0402_5% CLK_PCIE_MCARD0_R M29
RS14 2 GPP_CLK2P
Card reader 30 CLK_PCIE_MCARD0# 1 0_0402_5% CLK_PCIE_MCARD0#_R M28
GPP_CLK2N
T25
CLOCK GENERATOR
GPP_CLK3P CLK_PCI_EC1 R125 22_0402_5%
V25 H24 1 2 CLK_PCI_EC 24,31
GPP_CLK3N LPCCLK0
H25 LPC_CLK1 24,32 2
LPCCLK1 LPC_AD0 C640
L24 J27 LPC_AD0 31,32
GPP_CLK4P LAD0 LPC_AD1
L23 J26 LPC_AD1 31,32
+3VS GPP_CLK4N LAD1 LPC_AD2 22P_0402_50V8J
H29 LPC_AD2 31,32
LAD2 1
LPC
+1.8VS P25 H28 LPC_AD3
GPP_CLK5P LAD3 LPC_AD3 31,32
M25 G28 LPC_FRAME#
GPP_CLK5N LFRAME# LPC_FRAME# 31,32
2
LDRQ0# J25
3 R314 P29 AA18 3
GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 SERIRQ
4.7K_0402_5% P28 AB19 SERIRQ 31,32
GPP_CLK6N SERIRQ/GPIO48
2
G
N26
1
H_PWRGD GPP_CLK7P
3 1 H_PWRGD_L 42 N27
GPP_CLK7N CPU_LDT_REQ#
S
ALLOW_LDTSTP/DMA_ACTIVE# G21 CPU_LDT_REQ# 12

Q29 T29 H21 H_PROCHOT#
GPP_CLK8P PROCHOT# H_PROCHOT# 7
FDV301N_NL_SOT23-3 T28 K19 H_PWRGD
GPP_CLK8N LDT_PG H_PWRGD 7,42
CPU
G22 LDT_STOP# LDT_STOP# 7,12

LDT_STP# LDT_RST#
J24 LDT_RST# 7
@ T34 PAD LDT_RST#
level shift to ISL6265 L25
14M_25M_48M_OSC
ISL6265 PWROK input, TTL level: 0.8V~2.0V C1 SB_32KHI
32K_X1
When this pin is high, the SVI interface is 25M_CLK_X1 L26 C2 SB_32KHO
25M_X1 32K_X2 @
active and I2C protocol is running. While this D2 R920 1 2 0_0402_5% RTCCLK 3/22 add RTCCLK to KBC 32.768
RTC
RTCCLK RTCCLK 31
pin is low, the SVC, SVD, and VFIXEN input 25M_CLK_X2 INTRUDER_ALERT#
B2
L27 B1
states determine the pre-PWROK metal VID or 25M_X2 VDDBT_RTC_G
VFIX mode voltage. This pin must be low prior

SB820M_FCBGA605 SB820MR1@ W=20mils W=20mils W=20mils
to the ISL6265 PGOOD output going high
+RTCVCC_R +RTCVCC
+SB_VBAT +RTCBATT
2/2 C240 C244 22P-->18P for RTC fail issue
R129
R917 R918 W=20mils D9
C240 18P_0402_50V8J 1 2 1 2 1 2 3
C704 1 1 120_0402_5% 1K_0402_5%
0.1U_0402_16V4Z
22P_0402_50V8J 2 1 SB_32KHI 120_0402_5% 1
2
2 1 25M_CLK_X1 C241 C242 W=20mils 1
Y2 0.1U_0402_16V4Z J1 C243 2
2
1
3 4 2 2 JUMP_43X39
R829 NC OSC R132 1U_0402_6.3V4Z
4 Y6 2 BAS40-04_SOT23-3 4
1
1M_0402_5% 2 1 20M_0402_5% @
NC OSC
25MHZ_20PF_7A25000012 +CHGRTC
2
1
32.768KHZ_12.5PF_Q13MC14610002
2
2 1 25M_CLK_X2
C705 22P_0402_50V8J 2 1 SB_32KHO
18P_0402_50V8J
C244
Security Classification
2008/04/14
Compal Secret Data
2009/04/14 Title
Issued Date Deciphered Date
SB820-PCIE/PCI/ACPI/LPC/RTC
Custom LA-6032P 1.0
A B C D E
A B C D E
U7D
J2 A10 USBCLK T35 PAD @
PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
K1
RI#/GEVENT22# USB_RCOMP 1
PM_SLP_S3#
D3 SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP G19
11.8K_0402_1%
2
R133
1/31 R133 8.2K-->11.8K
31 PM_SLP_S3# F1 SLP_S3#
PM_SLP_S5# H1
31 PM_SLP_S5# PBTN_OUT# SLP_S5#
F2
ACPI / WAKE UP EVENTS

31 PBTN_OUT# SB_PWRGD PWR_BTN#
H5 SB800
USB 1.1 USB MISC

31
12,15
SB_PWRGD
SUS_STAT#
SUS_STAT# G6
PWR_GOOD
SUS_STAT# USB_FSD1P/GPIO186 J10 L
@ PAD T28 B3 Part 4 of 5 H11 Close to SB within 1"
+3VALW @ PAD T29 TEST0 USB_FSD1N
C4
TEST1/TMS OHCI4
@ PAD T30 F6 H9
1 GATEA20 TEST2 USB_FSD0P/GPIO185 1
31 GATEA20 AD21 J8
KB_RST# GA20IN/GEVENT0# USB_FSD0N
31 KB_RST# AE21 KBRST#/GEVENT1#
EC_SCI# K2 B12
31 EC_SCI# LPC_PME#/GEVENT3# USB_HSD13P
1 2 EC_SWI# EC_SMI# J29 A12
31 EC_SMI# LPC_SMI#/GEVENT23# USB_HSD13N
R797 10K_0402_5% H2
GEVENT5#
J1 F11
EC_SWI# SYS_RESET#/GEVENT19# USB_HSD12P
27 EC_SWI# H6 WAKE#/GEVENT8# USB_HSD12N E11 EHCI13 / OHCI3
F3 IR_RX1/GEVENT20#
H_THERMTRIP# J6 E14
7 H_THERMTRIP# THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD11P
NB_PWRGD AC19 E12
12 NB_PWRGD NB_PWRGD USB_HSD11N
2 1 EC_RSMRST# 31 EC_RSMRST#
EC_RSMRST# G1 J12
R140 100K_0402_5% RSMRST# USB_HSD10P
J14
USB_HSD10N
12/7 Internal clock gen AD19 CLK_REQ4#/SATA_IS0#/GPIO64 USB20_P9
AA16 CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD9P A13 USB20_P9 18
AB21 B13 USB20_N9 USB-9 Int Camera
SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD9N USB20_N9 18
LAN 27 CLKREQ_LAN AC18 CLK_REQ0#/SATA_IS3#/GPIO60 USB20_P8
AF20 D13 USB20_P8 26
SATA_IS4#/FANOUT3/GPIO55 USB_HSD8P USB20_N8
PCH_SPKR
AE19
SATA_IS5#/FANIN3/GPIO59 USB_HSD8N
C13 USB20_N8 26 USB-8 WLAN
28 PCH_SPKR AF19 SPKR/GPIO66 EHCI2 / OHCI2
SMB_CK_CLK0 AD22 G12
+3VS 9,10 SMB_CK_CLK0 SCL0/GPIO43 USB_HSD7P
SMB_CK_DAT0
USB 2.0
9,10 SMB_CK_DAT0 AE22 SDA0/GPIO47 USB_HSD7N G14
SMB_CK_CLK1 F5
26 SMB_CK_CLK1 SCL1/GPIO227
3/17 del CLKREQ_CR# 26 SMB_CK_DAT1 SMB_CK_DAT1 F4 G16 USB20_P6
SDA1/GPIO228 USB_HSD6P USB20_P6 29
R141 1 2 2.2K_0402_5% SMB_CK_CLK0 AH21 G18 USB20_N6 USB-6 Bluetooth
CLK_REQ2#/FANIN4/GPIO62 USB_HSD6N USB20_N6 29
26 CLKREQ_MCARD2# AB18 CLK_REQ1#/FANOUT4/GPIO61
R142 1 2 2.2K_0402_5% SMB_CK_DAT0 WLAN E1 D16 USB20_P5
GPIO
IR_LED#/LLB#/GPIO184 USB_HSD5P USB20_N5 USB20_P5 26
SUS_STAT# SP_DDR3_RST#_R
AJ21 SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD5N C16 USB20_N5 26 USB-5 WWAN
R134 1 2 4.7K_0402_5% 13 SP_DDR3_RST# 1 R343 2 H4
0_0402_5% DDR3_RST#/GEVENT7#
D5
GBE_LED0/GPIO183 USB_HSD4P
B14 1/21 Change USB port10 to USB port5 on WWAN
SIDE@ D7 GBE_LED1/GEVENT9# USB_HSD4N A14
G5 GBE_LED2/GEVENT10#
2 2
K3 GBE_STAT0/GEVENT11# USB_HSD3P E18
AA20 CLK_REQG#/GPIO65/OSCIN USB_HSD3N E16
EHCI1 / OHCI1
J16 USB20_P2
USB_HSD2P USB20_N2 USB20_P2 25
H3 BLINK/USB_OC7#/GEVENT18# USB_HSD2N J18 USB20_N2 25 USB-2 USB/eSATA <Wake Up support>
EC_LID_OUT# D1
31 EC_LID_OUT# USB_OC6#/IR_TX1/GEVENT6#
E4 B17 USB20_P1
USB_OC5#/IR_TX0/GEVENT17# USB_HSD1P USB20_P1 29
USB OC
D4 A17 USB20_N1 USB-1 Right side
USB_OC4#/IR_RX0/GEVENT16# USB_HSD1N USB20_N1 29
E8
USB_OC#2 USB_OC3#/AC_PRES/TDO/GEVENT15# USB20_P0
25,31 USB_OC#2 F7 USB_OC2#/TCK/GEVENT14# USB_HSD0P A16 USB20_P0 29
3/17 for JMB389 E7 B16 USB20_N0 USB-0 Right side
30 CR_CPPE#_SB USB_OC1#/TDI/GEVENT13# USB_HSD0N USB20_N0 29
USB_OC#0 F8
29,31 USB_OC#0 USB_OC0#/TRST#/GEVENT12# +3VALW
R306 1 2 33_0402_5%
28 AZ_BITCLK_HD
1 28 AZ_SDOUT_HD R307 1 2 33_0402_5% M3 D25
AZ_BITCLK SCL2/GPIO193
24 HDA_SDOUT N1 F23
C632 AZ_SDOUT SDA2/GPIO194 SB_SIC
28 AZ_SDIN0_HD L2 AZ_SDIN0/GPIO167 SCL3_LV/GPIO195 B26
1
33P_0402_50V8J M2 E26 SB_SID
HD AUDIO
2 AZ_SDIN1/GPIO168 SDA3_LV/GPIO196 R823 R824 R825
M1 AZ_SDIN2/GPIO169 EC_PWM0/EC_TIMER0/GPIO197 F25
M4 E22 10K_0402_5% 10K_0402_5% 10K_0402_5%
R310 33_0402_5% AZ_SDIN3/GPIO170 EC_PWM1/EC_TIMER1/GPIO198 S@
28 AZ_SYNC_HD 1 2 N2
AZ_SYNC EC_PWM2/EC_TIMER2/GPIO199
F22 GPIO199 24 STRAP PIN
R311 1 2 33_0402_5% P2 E21 STRAP PIN
2
28 AZ_RST_HD# AZ_RST# EC_PWM3/EC_TIMER3/GPIO200 GPIO200 24
G24 GPIO201 GPIO201
GBE_COL KSI_0/GPIO201 GPIO202 GPIO202
T1 G25
GBE_COL KSI_1/GPIO202
2
GBE_CRS T4 E28 GPIO203 GPIO203

R807 GBE_CRS KSI_2/GPIO203
L6 E29
10K_0402_5% @ GBE_MDIO GBE_MDCK KSI_3/GPIO204
L5 D29
GBE_MDIO KSI_4/GPIO205
T9 D28
GBE_RXCLK KSI_5/GPIO206
1
U1 C29
1
+3VALW GBE_RXD3 KSI_6/GPIO207 R826 R827 R828

U3 GBE_RXD2 KSI_7/GPIO208 C28
3 10K_0402_5% 10K_0402_5% 10K_0402_5% 3
T2 GBE_RXD1
GBE LAN
U2 B28 @ @ M@
GBE_MDIO GBE_RXD0 KSO_0/GPIO209
2 1 T5 A27
2
R151 10K_0402_5% GBE_RXERR GBE_RXCTL/RXDV KSO_1/GPIO210
V5 B27
EMBEDDED CTRL
GBE_RXERR KSO_2/GPIO211
P5 GBE_TXCLK KSO_3/GPIO212 D26
M5 GBE_TXD3 KSO_4/GPIO213 A26
P9 C26
GBE_TXD2 KSO_5/GPIO214
T7 A24
P7 B25
M7 A25
GBE_PHY_INTR GBE_TXCTL/TXEN KSO_8/GPIO217
2 1
+3VALW
P4
GBE_PHY_PD KSO_9/GPIO218
D24 GPIO201 GPIO202 GPIO203
R155 10K_0402_5% M9 B24
GBE_PHY_INTR GBE_PHY_RST# KSO_10/GPIO219
V7 GBE_PHY_INTR KSO_11/GPIO220 C24
KSO_12/GPIO221 B23 AMD-S 11.6 1 1 1
E23 A23
GBE_COL PS2_DAT/SDA4/GPIO187 KSO_13/GPIO222
2 1 2 1 CIR_EN# E24 D22
R152 10K_0402_5% R863 10K_0402_5% CIR_EN# PS2_CLK/SCL4/GPIO188 KSO_14/GPIO223
F21 C22 AMD-M 13.3 1 1 0
EMBEDDED CTRL
GBE_CRS SPI_CS2#/GBE_STAT2/GPIO166 KSO_15/GPIO224

2 1 G29 A22
R153 10K_0402_5% FC_RST#/GPO160 KSO_16/GPIO225
B22
GBE_RXERR KSO_17/GPIO226
2 1 D27
R154 10K_0402_5% PS2KB_DAT/GPIO189
F28
PS2KB_CLK/GPIO190
F29
PS2M_DAT/GPIO191
E27 PS2M_CLK/GPIO192
SB820M_FCBGA605 SB820MR1@
+3VALW
4 4
1 @ 2 EC_LID_OUT#
R315 100K_0402_5%
1 2 SB_SIC
R316 2.2K_0402_5%
1 2 SB_SID
R317 2.2K_0402_5% /
1
R318
2
10K_0402_5%
H_THERMTRIP# Security Classification Compal Secret Data Compal Electronics, Inc.
1 2 SMB_CK_CLK1
R319 2.2K_0402_5%
SB820 USB/HD Audio
1 2 SMB_CK_DAT1 Size Document Number Rev
R320 2.2K_0402_5% DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-6032P 1.0
A B C D E
A B C D E
U7B
SATA_TX0+ AH9
SB800 AH28
25 SATA_TX0+ SATA_TX0- SATA_TX0P FC_CLK
25 SATA_TX0- AJ9
SATA_TX0N Part 2 of 5 FC_FBCLKOUT
AG28
HDD SATA_RX0- FC_FBCLKIN AF26
25 SATA_RX0- AJ8 SATA_RX0N
SATA_RX0+ AH8 AF28
25 SATA_RX0+ SATA_RX0P FC_OE#/GPIOD145
AG29
FC_AVD#/GPIOD146
AH10 AG26
SATA_TX1P FC_WE#/GPIOD148
AJ10 SATA_TX1N FC_CE1#/GPIOD149 AF27
1 1
AE29
FC_CE2#/GPIOD150
AG10 SATA_RX1N FC_INT1/GPIOD144 AF29
AF10 AH27
SATA_RX1P FC_INT2/GPIOD147
AG12 AJ27
SATA_TX2P FC_ADQ0/GPIOD128
AF12 AJ26
SATA_TX2N FC_ADQ1/GPIOD129
FC_ADQ2/GPIOD130 AH25
AJ12 SATA_RX2N FC_ADQ3/GPIOD131 AH24
AH12 AG23
SATA_RX2P FC_ADQ4/GPIOD132
FC_ADQ5/GPIOD133 AH23
SATA_TX3+ AH14 AJ22
25 SATA_TX3+ SATA_TX3- SATA_TX3P FC_ADQ6/GPIOD134
25 SATA_TX3- AJ14 AG21
AF21
SATA_RX3- FC_ADQ8/GPIOD136
eSATA 25 SATA_RX3- SATA_RX3+
AG14 SATA_RX3N FC_ADQ9/GPIOD137 AH22
AF14 AJ23
FLASH
25 SATA_RX3+ SATA_RX3P FC_ADQ10/GPIOD138
FC_ADQ11/GPIOD139 AF23
AG17 SATA_TX4P FC_ADQ12/GPIOD140 AJ24
AF17 AJ25
AG25
FC_ADQ14/GPIOD142
AJ17 SATA_RX4N FC_ADQ15/GPIOD143 AH26
AH17 SATA_RX4P
SERIAL ATA
AJ18 SATA_TX5P
AH18 W5
SATA_TX5N FANOUT0/GPIO52
FANOUT1/GPIO53 W6
AH19 SATA_RX5N FANOUT2/GPIO54 Y9
L Close to SB within 1" AJ19 SATA_RX5P

FANIN0/GPIO56 W7
R321 1K_0402_1% V9 3/17 for JMB389
SATA_CALRP FANIN1/GPIO57
2 1 AB14 W8 CR_WAKE# 30
SATA_CALRN SATA_CALRP FANIN2/GPIO58
+1.1VS_SATA 2 1 AA14 SATA_CALRN 1 2 +3VALW
R322 931_0402_1% B6 R157 150K_0402_5%
2 TEMPIN0/GPIO171 2
TEMPIN1/GPIO172 A6
33 SATA_LED# AD11 SATA_ACT#/GPIO67 TEMPIN2/GPIO173 A5
B5 WLAN_PWR_EN#
TEMPIN3/TALERT#/GPIO174 WLAN_PWR_EN# 26
+3VS R156 1 2 10K_0402_5% C7 D10
TEMP_COMM
A3 ACIN_SB 2 1 ACIN 31,33,35
@ T36 PAD SATA_X1 AD16 VIN0/GPIO175 WWAN_PWR_EN#
B4
HW MONITOR
SATA_X1 VIN1/GPIO176 WWAN_PWR_EN# 26
A4 CH751H-40PT_SOD323-2
VIN2/GPIO177 SLP_CHG_M3_SB_NEW R916 1
C5 2 0_0402_5%
VIN3/GPIO178 SLP_CHG_M3_SB @ R865 1 SLP_CHG_M3
VIN4/GPIO179 A7 2 0_0402_5% SLP_CHG_M3 25,31
B7 SLP_CHG_M4_SB R866 1 2 0_0402_5% SLP_CHG_M4 1/20 Colay USB charger net
VIN5/GPIO180 SLP_CHG_M4 25,31
B8
@ T37 PAD SATA_X2 AC16 VIN6/GBE_STAT3/GPIO181
A8
SATA_X2 VIN7/GBE_LED3/GPIO182
DO J5 G27
DI SPI_DI/GPIO164 NC1 +3VALW
E2 Y2
SPI_DO/GPIO163 NC2
SPI ROM
CLK K4
CS# SPI_CLK/GPIO162
K9
SPI_CS1#/GPIO165
G2
ROM_RST#/GPIO161
ࡉ add TP36 TP37

SLP_CHG_M3 1 2
1/25 Del R164 Y3 C246 C247 R162 100K_0402_5%
SB820M_FCBGA605 SB820MR1@ SLP_CHG_M4 1 2
R163 100K_0402_5%
3 3
CLK
1
+3VALW
R859
@ 0_0402_5%
20mils U47
8 4
2
VCC VSS
1
C470 3 2
W C707
0.1U_0402_16V4Z 7 @
2 @ HOLD 22P_0402_50V8J
CS# 1
1
S
CLK 6 C
DI 5 2 DO
D Q
SST25LF080A_SO8-200mil
12/31 SMT memo control (256KB MX25L1605DM2I-12G SOP 8P)

4 4

SB820 SATA/IDE/SPI
Custom LA-6032P 1.0
A B C D E
A B C D E
U7C 510mA
131mA Part 3 of 5 +1.1VS_VDDC
AH1
SB800 N13 1 2
+3VS VDDIO_33_PCIGP_1 VDDCR_11_1 +1.1VS
V6 R15 R165 0_0805_5%
C248 2 VDDIO_33_PCIGP_2 VDDCR_11_2
1 22U_0805_6.3V6M Y19
VDDIO_33_PCIGP_3 VDDCR_11_3
N17 1 2
10U_0805_10V6K C249
CORE S0
AE5 VDDIO_33_PCIGP_4 VDDCR_11_4 U13
AC21 U17 1U_0402_6.3V4Z 2 1 C255 U7E
VDDIO_33_PCIGP_5 VDDCR_11_5 1U_0402_6.3V4Z C267
AA2 VDDIO_33_PCIGP_6 VDDCR_11_6 V12 2 1
C266 1 @ 2 1U_0402_6.3V4Z 0.1U_0402_16V4Z C258
PCI/GPIO I/O
C256 1 @ 2 1U_0402_6.3V4Z
AB4
AC8
VDDIO_33_PCIGP_7 VDDCR_11_7
V18
W12 0.1U_0402_16V4Z
2
2
1
1 C260 Y14
SB800 AJ2
C257 VDDIO_33_PCIGP_8 VDDCR_11_8 VSSIO_SATA_1 VSS_1
1 @ 2 1U_0402_6.3V4Z AA7 VDDIO_33_PCIGP_9 VDDCR_11_9 W18 Y16 VSSIO_SATA_2 VSS_2 A28
1 C259 0.1U_0402_16V4Z 1
1 2 AA9 AB16 A2
C261 0.1U_0402_16V4Z VDDIO_33_PCIGP_10 VSSIO_SATA_3 VSS_3
1 2 AF7 VDDIO_33_PCIGP_11 AC14 VSSIO_SATA_4 VSS_4 E5
C252 1 2 0.1U_0402_16V4Z AA19 K28 +1.1V_CKVDD +1.1VS AE12 D23
VDDIO_33_PCIGP_12 VDDAN_11_CLK_1 L25 VSSIO_SATA_5 VSS_5
K29 AE14 E25
VDDAN_11_CLK_2
J28
400mA 1 2 AF9
VSSIO_SATA_6 VSS_6
E6
VDDAN_11_CLK_3 FBMA-L11-201209-221LMA30T_0805 VSSIO_SATA_7 VSS_7
K26 AF11 F24
VDDAN_11_CLK_4 VSSIO_SATA_8 VSS_8
C262
C268
C253
C263
C254
J21 AF13 N15
CLKGEN I/O
VDDAN_11_CLK_5 VSSIO_SATA_9 VSS_9
AF22 VDDIO_18_FC_1 VDDAN_11_CLK_6 J20 1 1 2 2 2 AF16 VSSIO_SATA_10 VSS_10 R13
FLASH I/O
AE25 K21 AG8 R17
VDDIO_18_FC_2 VDDAN_11_CLK_7 VSSIO_SATA_11 VSS_11
AF24 VDDIO_18_FC_3 VDDAN_11_CLK_8 J22 AH7 VSSIO_SATA_12 VSS_12 T10
1 2 AC22 AH11 P10
R166 0_0402_5% VDDIO_18_FC_4 2 2 1 1 1 VSSIO_SATA_13 VSS_13
AH13 V11
VSSIO_SATA_14 VSS_14
22U_0805_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VDDPL_3.3V_PCIE V1 AH16 U15
VDDRF_GBE_S VSSIO_SATA_15 VSS_15
AJ7 M18
43mA POWER M10 AJ11
VSSIO_SATA_16 VSS_16
V19
+PCIE_VDDR VDDIO_33_GBE_S VSSIO_SATA_17 VSS_17
AJ13 VSSIO_SATA_18 VSS_18 M11
L26 AE28 AJ16 L12
VDDPL_33_PCIE VSSIO_SATA_19 VSS_19
GBE LAN
+1.1VS 2 1 L18
0_0805_5% VSS_20
A9 J7
600mA VSSIO_USB_1 VSS_21
PCI EXPRESS
2 1 U26 VDDAN_11_PCIE_1 VDDCR_11_GBE_S_1 L7 B10 VSSIO_USB_2 VSS_22 P3
C269 22U_0805_6.3V6M V22 L9 K11 V4
C270 1 VDDAN_11_PCIE_2 VDDCR_11_GBE_S_2 VSSIO_USB_3 VSS_23
2 1U_0402_6.3V4Z @ V26 VDDAN_11_PCIE_3 B9 VSSIO_USB_4 VSS_24 AD6
V27 VDDAN_11_PCIE_4 D10 VSSIO_USB_5 VSS_25 AD4
C272 1 2 1U_0402_6.3V4Z V28 M6 D12 AB7
C273 1U_0402_6.3V4Z VDDAN_11_PCIE_5 VDDIO_GBE_S_1 VSSIO_USB_6 VSS_26
1 2 V29 VDDAN_11_PCIE_6 VDDIO_GBE_S_2 P8 D14 VSSIO_USB_7 VSS_27 AC9
C274 1 2 0.1U_0402_16V4Z W22 D17 V8
C275 0.1U_0402_16V4Z VDDAN_11_PCIE_7 VSSIO_USB_8 VSS_28
1 2 W26 VDDAN_11_PCIE_8 E9 VSSIO_USB_9 VSS_29 W9
F9 VSSIO_USB_10 VSS_30 W10
F12 AJ28
VDDPL_3.3V_SATA 93mA +3VALW F14
VSSIO_USB_11 VSS_31
B29
+1.1VS_SATA VSSIO_USB_12 VSS_32
AD14 F16 U4
L27 VDDPL_33_SATA
A21
32mA C9
VSSIO_USB_13 VSS_33
Y18
2 VDDIO_33_S_1 VSSIO_USB_14 VSS_34 2
+1.1VS 2 1 AJ20 VDDAN_11_SATA_1 VDDIO_33_S_2 D21 G11 VSSIO_USB_15 VSS_35 Y10
0_0805_5%
GROUND
AF18 B21 1 2 F18 Y12
567mA VDDAN_11_SATA_4 VDDIO_33_S_3 VSSIO_USB_16 VSS_36
SERIAL ATA
AH20 K10 2.2U_0603_6.3V4Z C276 D9 Y11
VDDAN_11_SATA_2 VDDIO_33_S_4 VSSIO_USB_17 VSS_37
3.3V_S5 I/O
2 1 AG19 VDDAN_11_SATA_3 VDDIO_33_S_5 L10 1 2 H12 VSSIO_USB_18 VSS_38 AA11
C277 22U_0805_6.3V6M AE18 J9 2.2U_0603_6.3V4Z C278 H14 AA12
C279 1U_0402_6.3V4Z VDDAN_11_SATA_5 VDDIO_33_S_6 VSSIO_USB_19 VSS_39
1 2 AD18 VDDAN_11_SATA_6 VDDIO_33_S_7 T6 H16 VSSIO_USB_20 VSS_40 G4
C280 1 2 1U_0402_6.3V4Z AE16 T8 H18 J4
C281 0.1U_0402_16V4Z VDDAN_11_SATA_7 VDDIO_33_S_8 VSSIO_USB_21 VSS_41
1 2 J11 G8
C282 0.1U_0402_16V4Z +1.1VALW VSSIO_USB_22 VSS_42
1 2 J19 G9
VSSIO_USB_23 VSS_43
K12 M12
+3VALW L28 +AVDD_USB 113mA VSSIO_USB_24 VSS_44
CORE S5
F26 K14 AF25
VDDCR_11_S_1 VSSIO_USB_25 VSS_45
2 1 A18 G26 K16 H7
0_0805_5% VDDAN_33_USB_S_1 VDDCR_11_S_2 1U_0402_6.3V4Z VSSIO_USB_26 VSS_46
A19 2 1 C283 K18 AH29
658mA A20
VDDAN_33_USB_S_2
M8 TBDmA
+3VALW H19
VSSIO_USB_27 VSS_47
V10
C284 VDDAN_33_USB_S_3 VDDIO_AZ_S VSSIO_USB_28 VSS_48
1 2 10U_0805_10V6K B18 VDDAN_33_USB_S_4
1U_0402_6.3V4Z 2 1 C286 VSS_49 P6
C285 1 2 10U_0805_10V6K B19 A11 VDDCR_1.1V_USB N4
C287 VDDAN_33_USB_S_5 VDDCR_11_USB_S_1 +1.1VALW VSS_50
1 2 1U_0402_6.3V4Z B20 B11 Y4 L4
VDDAN_33_USB_S_6 VDDCR_11_USB_S_2 EFUSE VSS_51
USB I/O
C288 1 2 1U_0402_6.3V4Z C18 L29 L8

C289 1 2 0.1U_0402_16V4Z C20
VDDAN_33_USB_S_7 197mA 1 2 D8
VSS_52
@ VDDAN_33_USB_S_8 VDDPL_3.3V FBMA-L11-160808-221LMT_0603 VSSAN_HWM
D18 VDDAN_33_USB_S_9 VDDPL_33_SYS M21 1 2 2
D19 C292 C293 C294 M19 M20
VDDAN_33_USB_S_10 VDDPL_1.1V VSSXL VSSPL_SYS
D20 L22
+1.1VALW VDDAN_33_USB_S_11 VDDPL_11_SYS_S
E19
VDDAN_33_USB_S_12
PLL
+1.1V_USB VDDPL_3.3V_USB 2 1 1 0.1U_0402_10V6K

F19 P21 H23
L30 VDDPL_33_USB_S 0.1U_0402_10V6K +3VALW VSSIO_PCIECLK_1 VSSIO_PCIECLK_14
P20 H26
VDDAN_1.1V_USB 10U_0603_6.3V6M VSSIO_PCIECLK_2 VSSIO_PCIECLK_15
2 1 C11 D6 +3VALW M22 AA21
0_0805_5% VDDAN_11_USB_S_1 VDDAN_33_HWM_S L31 VSSIO_PCIECLK_3 VSSIO_PCIECLK_16
D11 VDDAN_11_USB_S_2 M24 VSSIO_PCIECLK_4 VSSIO_PCIECLK_17 AA23
C295
L20 VDDXL_3.3V 1 2 M26 AB23

TBDmA VDDXL_33_S VSSIO_PCIECLK_5 VSSIO_PCIECLK_18
C296
1 1 FBMA-L11-160808-221LMT_0603 P22 AD23

VSSIO_PCIECLK_6 VSSIO_PCIECLK_19
P24 AA26
C297
1 P26 AC26
2 2
SB820M_FCBGA605 SB820MR1@ T20 VSSIO_PCIECLK_9 VSSIO_PCIECLK_22 Y20
3 3
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
T22 VSSIO_PCIECLK_10 VSSIO_PCIECLK_23 W21

T24 W20
2 VSSIO_PCIECLK_11 VSSIO_PCIECLK_24
2.2U
V20 AE26
J23 L21
VSSIO_PCIECLK_27 K20
Part 5 of 5
+3VALW
+1.1VALW L34 SB820M_FCBGA605 SB820MR1@
L32 1 2 VDDPL_3.3V_USB
+3VS +3VS 1 2 VDDPL_1.1V FBMA-L11-160808-221LMT_0603
L35 L36 FBMA-L11-160808-221LMT_0603
62mA 17mA
C301
C302
1 2 VDDPL_3.3V_PCIE 1 2 VDDPL_3.3V
FBMA-L11-160808-221LMT_0603 FBMA-L11-160808-221LMT_0603 1 2 2
C300
1
C303
1
C304 47mA
2.2U_0603_6.3V4Z
2 1 1
2.2U
0.1U
2.2U_0603_6.3V4Z
2 2 2.2U_0603_6.3V4Z
+3VALW
+3VS
L33
1 2 VDDPL_3.3V_SATA
FBMA-L11-160808-221LMT_0603 1
C298
1
C299 L C298 near U7.M8
4 2.2U_0603_6.3V4Z 2 2.2U_0603_6.3V4Z 4
2
/
SB820 Power/GND
Custom LA-6032P 1.0
A B C D E
A B C D E
REQUIRED STRAPS Check Internal PU/PD

GPIO200 GPIO199
AZ_SDOUT PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LCP_CLK1 (EC_PWM3) (EC_PWM2)
PULL LOW POWER ALLOW PCIE WATCHDOG USE Inter CLK EC CLOCKGEN
HIGH MODE GEN2 TIMER DEBUG Gen Mode ENABLE ENABLE H,H = Reserved
1 1
ENABLE STRAP Enable
H,L = SPI ROM(Default)
DEFAULT DEFAULT
PULL Performance FORCE PCIE WATCHDOG IGNORE Inter CLK EC CLOCKGEN L,H = LPC ROM
LOW MODE GEN1 TIMER DEBUG Gen Mode DISABLE DISABLE L,L = FWH ROM
DISABLE STRAP Disable
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
+3VALW +3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW
L,H = LPC ROM(Default)
2.2K_0402_5%
Option 1:SPI Flash (2MB*1) for EC
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
2.2K_0402_5%
R175
R176
R200
R170
R167
R168
R169
R171
R349
2
2
@ @ @ @ @
21 HDA_SDOUT @
20 PCI_CLK1
20 PCI_CLK2 H,L = SPI ROM
20 PCI_CLK3
20 PCI_CLK4 Option 2:SPI Flash (256KB*1) for EC
2 20,31 CLK_PCI_EC 2
20,32 LPC_CLK1 SPI Flash (2MB*1) for SB (set up strap pin)
21 GPIO200
21 GPIO199
12/31 SMT memo control
2.2K_0402_5%
1
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
22P_0402_50V8J
2.2K_0402_5%
1
R185
R186
R209 @
R180
R177
R178
R179
R181
R221
C706
2
2
2
@ @
12/12 Add cC706 for EMI request

12/12 Fine tune SB820 int clock gen strap pin
+3VS +3VS
DEBUG STRAPS
10K_0402_5%
10K_0402_5%
SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
1
3 3
R244
R187
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
2
USE PCI DISABLE ILA USE FC PLL USE DEFAULT DISABLE PCI
PULL PLL AUTORUN PCIE STRAPS MEM BOOT
HIGH 20 PCI_AD29
20 PCI_AD28
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
20 PCI_AD27
20 PCI_AD26
20 PCI_AD25
PULL BYPASS ENABLE ILA BYPASS USE EEPROM ENABLE PCI 20 PCI_AD24
LOW PCI PLL AUTORUN FC PLL PCIE STRAPS MEM BOOT 20 PCI_AD23
1
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
R190
R188
R189
R191
R192
Check AD29,AD28 strap function
check default
2
@ @ @ @ @
4 4

SB820 STRAPS
Custom LA-6032P 1.0
A B C D E
A B C D E
SATA transfer board

+5VS Place closely JHDD SATA CONN
1.2A L
1 1 1 1
C305 C306 C307 C308
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

2 2 2 2 03/11 Del JHDD2
1 1
JHDD1
1 1 +5VS
2 2
3
3
4 4
5
5 SATA_C_TX0+ C309 1
6 2 0.01U_0402_25V7K SATA_TX0+ 22
6 SATA_C_TX0- C310 1
7 2 0.01U_0402_25V7K SATA_TX0- 22
7
8 8
9 SATA_C_RX0- C311 1 2 0.01U_0402_25V7K
9 SATA_RX0- 22
10 SATA_C_RX0+ C312 1 2 0.01U_0402_25V7K
10 SATA_RX0+ 22
13 GND 11 11
14 12
GND 12
2/2 Update JHDD1 10pin-->12pin
ACES_85201-1205N
CONN@
SATA FFC conn

2 2
E-SATA/USB
+3VALW
+USB_VCCB
U10 0.1U_0402_16V4Z
C316
0.1U_0402_16V4Z
USB20_P2_R_U +3VALW
1 1D+ VCC 10 1 2 1/19 Change net name SLP_CHG-->SLP_CHG#
USB20_N2_R_U 2 9
Active Low 1 1 1
1D- S SLP_CHG# 31
1
C522 +
USB20_P2 3 8 USB20_P2_R +5V_ALW 2A +USB_VCCB 10K_0402_5% C314 C315
21 USB20_P2 2D+ D+ 2 2
U9 150U_B2_6.3VM_R45M
USB20_N2 USB20_N2_R R858 2
21 USB20_N2 4 7 1 8
2D- D- GND VOUT 1000P_0402_50V7K
2 7
2
USB_CHG_EN# VIN VOUT
5 6 3 6
GND OE# USB_CHG_EN# VIN VOUT
31 USB_CHG_EN# 4 EN FLG 5 USB_OC#2 21,31
1
RT9715BGS_SO8 C317
TS3USB221RSER_QFN10_2x1P5 @
1/25 U9 pin1 +5VALW-->+5V_ALW for USB charger 4.7U_0805_10V4Z 1/20 update JSATA1 footprint
2
3 3
+USB_VCCB
+USB_VCCB W=60mils JSATA1

1 USB
USB20_N2_R_S VBUS
2 D-
USB20_P2_R_S 3
D+
4
GND
5
GND
1
C318 1 2 0.01U_0402_25V7K SATA_C_TX3+ 6

22 SATA_TX3+ SATA_C_TX3- A+ ESATA
U11 R194 R195 C319 1 2 0.01U_0402_25V7K 7
22 SATA_TX3- A-
1 75K_0402_1% 43K_0402_1% 8
22,31 SLP_CHG_M3 1OE# SATA_C_RX3- GND
4 C320 2 1 0.01U_0402_25V7K 9
2OE# 22 SATA_RX3- SATA_C_RX3+ B-
10 C321 2 1 0.01U_0402_25V7K 10
2
22,31 SLP_CHG_M4 3OE# 22 SATA_RX3+ B+

13 11
4OE# USB20_P2_S_O GND
USB20_P2_R_U 2 3 USB20_P2_S_O USB20_N2_S_O 12
USB20_N2_R_U 1A 1B USB20_N2_S_O GND
5 6 13
2A 2B GND
1
9 8 R198 1 2 100_0402_5% 14
3A 3B R196 R197 GND
12 11 15
4A 4B 51K_0402_1% 51K_0402_1% GND
+USB_VCCB 14 7 TAIWI_EU114-117CRL-TW_11P-T
VCC GND @
2 CONN@
2
SN74CBT3125PWRG4_TSSOP14 R199 1 2 0_0402_5%

C322
0.1U_0402_16V4Z +USB_VCCB
1 L37
D11 USB20_P2_R USB20_P2_R_S
1 2
USB20_N2_R_S 1 2
4 2
VIN IO1
USB20_P2_R_S 3 1 USB20_N2_R 4 3 USB20_N2_R_S
4 IO2 GND 4 3 4
CM1293A-02SR SOT143-4 WCM-2012-900T_0805
R201 1 2 0_0402_5%
@
SLP_CHG_M3 SLP_CHG_M4 SLP_CHG FUNCTION /

Mode 3 HIGH LOW LOW D=1D Issued Date 2008/04/14 Deciphered Date 2009/04/14 Title
SATA HDD/ODD
Mode 4 LOW HIGH HIGH D=2D AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom LA-6032P 1.0
A B C D E
PCIe Mini Card-3G/WWAN (Slot 2)
+3V_W W AN
JW W AN1 +3VS
1 2 +3VS
1 2
3 3 4 4
5 6 +3V_W W AN
5 6
2
7 8 +UIM_PW R 2
7 8 UIM_DATA @ RM5 CM17
9 9 10 10
11 12 UIM_CLK 0.1U_0402_16V4Z 100K_0402_5% 0.1U_0402_16V7K @
11 12
1
13 14 UIM_RESET 1 1 1 1
13 14
3
COMMON RM6 1 S
RM9
15 16
1
15 16 CM4 CM5 CM6 CM20
G
QM1
22 W W AN_PW R_EN# 1 2 2 0_0805_5%
1000P_0402_50V7K 47K_0402_5%
2 2 2 2 AO3413_SOT23
17 18 D
2
17 18 0.01U_0402_25V7K 4.7U_0805_10V4Z
19 19 20 20 3G_OFF# 20 @
21 22 PLT_RST# @
21 22
23 23 24 24
25 25 26 26
27 27 28 28
29 30 SMB_CK_CLK1
29 30 SMB_CK_DAT1
31 31 32 32
33 34 COMMON R203 1 2 0_0402_5%UIM_VPP
33 34
35 35 36 36 USB20_N5 21
37 37 38 38 USB20_P5 21 +3V_W W AN
+3V_W W AN 39 39 40 40
41 42 LED_W IMAX#
41 42
43 43 44 44
45 45 46 46
47 47 48 48
49 49 50 50 WLAN&BT Combo module circuits
51 51 52 52
53 G1 G3 55 BT BT
54 56 +UIM_PW R
G2 G4 on module on module
P-TW O_A54402-A0G16-N_52P Enable Disable
CONN@
1
RM1
4.7K_0402_5% BT_CRTL HI LO
@
J3G1
BT_PWR# LO HI
2
+UIM_PW R +UIM_PW R 1 4
UIM_RESET VCC GND UIM_VPP
2 RST VPP 5
1
1 UIM_CLK 3 6 UIM_DATA **If +3V_WLAN is +3VS, please

DM1 CLK I/O
CM7 RLZ20A_LL34 7 8 1
remove D17.
NC NC
1
1
0.1U_0402_16V4Z 1 1
2 MOLEX_47273-0001~D CM10 @
2
CM8 CM9 CONN@ 22P_0402_50V8J D17

10P_0402_50V8J 10P_0402_50V8J DM2 DM3 DM4 2 @ SUSP# BT_CTRL
28,31,34,37,41 SUSP# 1 2
2 2 DAN217_SC59 DAN217_SC59 DAN217_SC59
@ @ @ CH751H-40PT_SOD323-2
3
1
D
+UIM_PW R 20,29 BT_PW R# 2

G
Q38 S 2N7002_SOT23-3
3
+1.5V_W LAN +3V_W LAN
01/21 Add D17 and Q38 for BT control
PCIe Mini Card-WLAN(Slot 1) 1
0.1U_0402_16V4Z
1 1 1
0.1U_0402_16V4Z
1 1
+3V_W LAN CM11 CM12 CM13 CM14 CM15 CM16
+3VS +3VS
2 2 2 2 2 2
JW LAN1 +1.5V_W LAN 0.01U_0402_25V7K 4.7U_0805_10V4Z 0.01U_0402_25V7K 4.7U_0805_10V4Z
01/19 Update net name BT_CTRL-->BT_PWR#
1 1
2
3 3 2 2 2
BT_CTRL 5 4 @ RM7 @ CM18
5 4
1
7 6 100K_0402_5% 0.1U_0402_16V7K
21 CLKREQ_MCARD2# 7 6
9 8 RM10
9 8
3
RM8 1 S
20 CLK_PCIE_MCARD2# 11 10 0_0805_5%
1
11 10 W LAN_PW R_EN#_R
G
QM2
20 CLK_PCIE_MCARD2 13 13 12 12 22 W LAN_PW R_EN# 1 2 2
15 14 03/19 del LPC frame and LPC_AD1-LPC_AD3 trace 47K_0402_5%
2
15 14 AO3413_SOT23
16 D
1
16
@
@
17 17
19 19 18 18 +3V_W LAN
21 20 W L_OFF#
21 20 W L_OFF# 31
23 22 PLT_RST# PLT_RST# 12,15,20,27,30,31,32
11 PCIE_PTX_C_IRX_N2 23 22
11 PCIE_PTX_C_IRX_P2 25 25 24 24
27 26 +1.5VS
27 26
29 29 28 28
31 30 SMB_CK_CLK1 SMB_CK_CLK1 21
11 PCIE_ITX_C_PRX_N2 31 30
33 32 SMB_CK_DAT1 SMB_CK_DAT1 21
11 PCIE_ITX_C_PRX_P2 33 32
35 34 @ 2
35 34
1
37 36 USB20_N8 21 CM19
37 36 +3V_W LAN 0.1U_0402_16V7K RM11
+3V_W LAN 39 39 38 38 USB20_P8 21
41 40 @ 0_0603_5%
41 40
3
LED_W IMAX# 1 S
43 43 42 42 LED_W IMAX# 33 G
45 44 2 QM3
2
R205 0_0402_5% 45 44 LED_W IMAX#
47 47 46 46 2 1
1 2 49 48 D AO3413_SOT23
1
31 E51_TXD 49 48 100K_0402_5% RM3
31 E51_RXD 1 2 51 51 50 50
R206 0_0402_5% 52
52 +1.5V_W LAN
1
53 GND
RM4 54
100K_0402_5%
GND Security Classification Compal Secret Data Compal Electronics, Inc.
BELLW _80052-1021_52P Issued Date 2008/09/05 Deciphered Date 2009/09/05 Title
PCIe-WLAN/HDDVD/NAND/NEW
2
CONN@
1.0
LA-6032P
5 4 3 2 1
3/10 Change CL13 0805-->0603

UL1
Close to Pin 27,39,12,47,48 +3V_LAN
11 PCIE_PTX_C_IRX_P3 CL1 1 2 0.1U_0402_16V7K PCIE_PRX_LANTX_P3 22 31
HSOP LED3/EEDO +LAN_VDD10
LED1/EESK 37 Can change to 2.2uH&4.7uF
11 PCIE_PTX_C_IRX_N3 CL2 1 2 0.1U_0402_16V7K PCIE_PRX_LANTX_N3 23 HSON LED0 40 1 2
LL1 0.1U_0402_16V4Z CL10
17 30 RL2 2 1 10K_0402_5% +LAN_REGOUT 1 2 1 2
11 PCIE_ITX_C_PRX_P3 HSIP EECS/SCL
18 32 RL1 2 1 10K_0402_5% 2.2UH +-5% NLC252018T 0.1U_0402_16V4Z CL4
11 PCIE_ITX_C_PRX_N3 HSIN EEDI/SDA
1 2 1 2
Layout Note: LL1 must be 0.1U_0402_16V4Z CL5
RL19 0_0402_5% 16 1 LAN_MDI0+ within 200mil to Pin36 CL13 CL9 1 2
21 CLKREQ_LAN CLKREQB MDIP0 LAN_MDI0- CL8,CL9 must be within
2 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z CL6
D MDIN0 LAN_MDI1+ 200mil to LL1 2 1 D
12,15,20,26,30,31,32 PLT_RST# 25 4 1 2
PERSTB MDIP1 LAN_MDI1- +LAN_REGOUT: Width =60mil 0.1U_0402_16V4Z CL7
MDIN1 5
20 CLK_PCIE_LAN 19 7
REFCLK_P NC/MDIP2
20 CLK_PCIE_LAN# 20 REFCLK_N NC/MDIN2 8
10
NC/MDIP3
11
LAN_X1 NC/MDIN3
43 CKXTAL1
LAN_X2 44 13 Close to Pin 3,6,9,13,29,41,45
CKXTAL2 DVDD10 +LAN_VDD10 +LAN_VDD10 +LAN_EVDD10
DVDD10 29
41 +LAN_VDD10
EC_SWI# DVDD10
21 EC_SWI# 28 2 1
LANWAKEB 0_0603_5% LL2 1 2 1 2
ISOLATEB 26 27 +3V_LAN 0.1U_0402_16V4Z CL19
ISOLATEB DVDD33 CL18 CL17
DVDD33 39 1 2
1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z CL20
@ 1 RL20 2 1K_0402_5% 14 12 2 1 1 2
+3V_LAN NC/SMBCLK AVDD33 +3V_LAN
@ 1 RL21 2 1K_0402_5% 15 42 +3V_AVDDXTAL 0.1U_0402_16V4Z CL21
NC/SMBDATA AVDD33
1 RL22 2 1K_0402_5% 38 47 Close to Pin 21 1 2
GPO/SMBALERT AVDD33 0.1U_0402_16V4Z CL22
AVDD33 48
ENSWREG 33 ENSWREG
EVDD10 21 +LAN_EVDD10
+LAN_VDDREG 34
VDDREG
35 VDDREG AVDD10 3 +LAN_VDD10
AVDD10 6
9 +3V_LAN +LAN_VDDREG
AVDD10
1 2 46 RSET AVDD10 45
RL5 2.49K_0402_1% 2 1
+3VS 24 36 +LAN_REGOUT 0_0603_5% LL3
GND REGOUT 1 2
49 PGND CL28 CL29
1
C 4.7U_0603_6.3V6K 0.1U_0402_16V4Z C
RL6 RTL8105E-VB-GR_QFN48_6X6 2 1
1K_0402_1%
2
ISOLATEB
+3V_LAN
RL7 +3V_AVDDXTAL RL8 +3V_LAN
15K_0402_5% 0_0402_5%
+3VALW TO +3V_LAN
RL9 +LAN_VDD10 RL4
@ 0_0402_5% 0_0402_5% +3VALW
+3VALW
2 1
2
CL11@ 0.1U_0402_16V4Z ENSWREG Vgs=-4.5V,Id=3A,Rds<97mohm
RL25
Reserved For 1.05V Crystal 100K_0402_5% 2
RL23 CL12
YL1
1
0_0402_5% 0.1U_0402_16V7K QL1
3
S
LAN_X1 2 1 LAN_X2 PJ20
1
@ 1 G
31 WOL_EN# 1 2 2 JUMP_43X39
RL16 47K_0402_5% @
2
25MHZ_20PF_7A25000012
1 1 1
D
1
CL14 AO3413_SOT23
2
CL26 CL27 0.01U_0402_25V7K +3V_LAN
27P_0402_50V8J 27P_0402_50V8J
2 2 2
1 1
B CL15 CL8 1U_0402_6.3V4Z B
4.7U_0805_10V4Z
@ 2 2
UL2
LAN_MDI1+ 1 16 RJ45_MIDI1+
LAN_MDI1- TD+ TX+ RJ45_MIDI1- RJ45_MIDI1+ 17
2 15 RJ45_MIDI1- 17
TD- TX- RL26
2 1 3 CT CT 14
CL30 0.01U_0402_16V7K 4 13 CL31 1 2 1000P_0402_50V7K 1 2 75_0402_1%
NC NC RJ45_GND
5 12 1 2 1 2 RJ45_GND 17
NC NC CL32 1000P_0402_50V7K 75_0402_1%
6 11
LAN_MDI0+ CT CT RJ45_MIDI0+ RL27
7 10 RJ45_MIDI0+ 17
LAN_MDI0- RD+ RX+ RJ45_MIDI0-
8 9 RJ45_MIDI0- 17
RD- RX-
NS681680
A A

Issued Date 2009/10/06 Title
2008/10/06 Deciphered Date
RTL8103EL/RTL8111DL
Size
Document Number Rev
1.0
LA-6032P
5 4 3 2 1
A B C D E
RA2
+PVDD1 0.1U_0402_16V4Z 2 1 0.1U_0402_16V4Z +5VS
RA1 1 1 0_0603_5% 1 1
0.1U_0402_16V4Z CA57 CA44
+3VS 2 1
FBMH1608HM601-T_0603~D CA56 CA43
Sense Pin Impedance Codec Signals Function
2
1 1 2 2 2 2
CA2 CA1 JA1 39.2K PORT-I (PIN 32, 33) Headphone out
2
JUMP_43X39 10U_0805_10V4Z 10U_0805_10V4Z
10U_0805_10V4Z
2 2
1
@ place close to chip 20K PORT-B (PIN 21, 22) Ext. MIC
+3VS_DVDD
SENSE A
1
0.1U_0402_16V4Z
RA11
@ 10K PORT-C (PIN 23, 24)
1 1 +PVDD2 0.1U_0402_16V4Z 2 1 0.1U_0402_16V4Z
1 +5VS 1
1 1 1 1
place close to chip CA8 CA7 CA61 5.1K PORT-D (PIN 48)
10U_0805_10V4Z @ CA60 0_0603_5% CA59 @ CA58
2 2 @
+AVDD 2 2 2 2
39.2K PORT-E (PIN 14, 15)
10U_0805_10V4Z 10U_0805_10V4Z
RA3
10U_0805_10V4Z 0.1U_0402_16V4Z 2 1 +5VS SENSE B 20K PORT-F (PIN 16, 17)
0_0603_5%
Ext. Mic RA22 2.2K_0402_5%
10K PORT-H (PIN 20)
39
46
25
38
+MIC1_VREFO_R 1 2 1 1 1 1
9
UA1 CA3 CA4 CA5 CA6
RA23 1K_0402_5%
DVDD_IO
PVDD1
PVDD2
AVDD1
AVDD2
DVDD
MIC1_R 1 2 MIC1_R_R place close to chip
29 MIC1_R 2 2 2 2
10U_0805_10V4Z 0.1U_0402_16V4Z
MIC1_L 1 2 MIC1_R_L
place close to chip
29 MIC1_L
RA24 1K_0402_5% 23 40
LINE1_L SPK_OUT_L+ SPKL+ 29 SENSE_A
24 41 SPKL- 29 29 MIC_SENSE 2 1
LINE1_R SPK_OUT_L- RA10 20K_0402_1%
+MIC1_VREFO_L 1 2
2.2K_0402_5% RA25 14 45
LINE2_L SPK_OUT_R+ SPKR+ 29
15 LINE2_R SPK_OUT_R- 44 SPKR- 29
4.7U_0805_10V4Z CA21
MIC1_R_L 2 1 21 32
MIC1_L HP_OUT_L HP_L 29
MIC1_R_R
22 MIC1_R HP_OUT_R 33 HP_R 29 Ext. HP 29 NBA_PLUG
2 1 RA21 39.2K_0402_1%
16 MIC2_L
4.7U_0805_10V4Z CA22 17 MIC2_R
Digital Mic 12/18 RA26 0ohm-->Bead for EMI request SYNC
10 AZ_SYNC_HD 21
18 INT_MIC_DATA 2 GPIO0/DMIC_DATA BCLK 6 AZ_BITCLK_HD 21

2 2
RA26 1 2 INT_MIC_CLK_R 3
18 INT_MIC_CLK
FBMA-L10-160808-301LMT 0603 GPIO1/DMIC_CLK
SDATA_OUT 5 AZ_SDOUT_HD 21
Beep sound
EC_MUTE# 4 8 AZ_SDIN0_HD_R 2 1
31 EC_MUTE# PD# SDATA_IN AZ_SDIN0_HD 21
RA6 33_0402_5%
21 AZ_RST_HD#
AZ_RST_HD# 11 RESET# EAPD 47 EC Beep RA7
1
31 EC_BEEP 1 2
RA45 48 47K_0402_5%
4.7K_0402_5% MONO_IN SPDIFO
1 2 12 PCBEEP
CA12 100P_0402_50V8J 20
MONO_OUT
PCI Beep
2
SENSE_A 13 CA13
SENSE A RA8 MONO_IN
29 1 2 1 2
MIC2_VREFO 21 PCH_SPKR
3/17 Add RA45 18 SENSE B 47K_0402_5%
MIC1_VREFO_R
30 +MIC1_VREFO_R CA23 10U_0805_10V4Z 0.1U_0402_16V4Z
03/17 DGND-->AGND forAudio noise 1 2 36
CBP LDO_CAP
28 1 2
CA15
2.2U_0603_6.3V4Z 35 27 AC_VREF
+3VS CBN VREF
1
31 19 AC_JDREF2 RA9 1 20K_0402_1% 03/12 CA15 SMT-->@ for Audio noise 1
+MIC1_VREFO_L MIC1_VREFO_L JDREF
1 1 @
@ 43 34 1 2 RA12 CA18
PVSS2 CPVEE
1
42 CA14 2.2U_0603_6.3V4Z CA17 CA16 10K_0402_5% 0.1U_0402_16V4Z

RA27 PVSS1 10U_0805_10V4Z 2
49 26
2
DVSS2 AVSS1 2 2
4.7K_0402_5% 7 37
DVSS1 AVSS2 0.1U_0402_16V4Z
ALC259-VB5-GR_QFN48_7X7
2
AZ_RST_HD# place close to chip

DGND AGND 03/17 DGND-->AGND for Audio noise
2
3 CA62 3
0.1U_0402_16V7K
1
@
CA63
INT_MIC_CLK_R 1 2
22P_0402_50V8J
CA47 1 2 0.1U_0603_50V7K
CA48 1 2 0.1U_0603_50V7K (4.75V(4.56~4.94V))

CA49 1 2 0.1U_0603_50V7K 1/21 UA2 pin5 +PVDD1--->+AVDD
300mA
CA50 1 2 0.1U_0603_50V7K
+5VALW +AVDD
RA18 1
W=40Mil @ UA2
2
FBMH1608HM601-T_0603~D @ CA67 1 2 1
IN
2.2U_0805_16V4Z
3/17 Del R861 R910 0.1U_0402_16V4Z 5
OUT
CA68
2 1
GND
26,31,34,37,41 SUSP# 1 2 3 4
0_0402_5% SHDN BYP @
RA28 G9191-475T1U_SOT23-5 1 2
@ 1 @ CA69
0.1U_0402_16V4Z CA70 0.1U_0402_16V4Z

@ 2
2
4 4
/
HD Audio ALC272 Codec
Custom LA-6032P 1.0
A B C D E
A B C D E
USB+Audio FFC conn Speaker Connector

+USB_VCCA DA4
placement near Audio Codec PACDN042Y3R_SOT23-3
02/04 Update JP5 pin define 3
JP5 1
1 1 2
2 2
3
3 FBMA-L11-160808-800LMT_0603
4
4 SPKL+ LA2 1 SPK_L1
5 5 28 SPKL+ 2
1 1
6 1
USB20_P1 6 JSPK1
21 USB20_P1 7 7
USB20_N1 8 CA19 SPK_R1 1
21 USB20_N1 8 1
9 @ 10U_0805_10V4Z 2 SPK_R2 2
USB20_P0 9 2 CA24 SPK_L1 2
21 USB20_P0 10 3
USB20_N0 10 1U_0402_6.3V4Z SPK_L2 3
21 USB20_N0 11 1 4
11 @ 4
12 12
13 CA20 1 5
28 NBA_PLUG 13 GND1
14 @ 10U_0805_10V4Z 6
28 MIC_SENSE 14 2 GND2
15 SPKL- LA3 1 2 SPK_L2
15 28 SPKL- DA5
HP_R 16 FBMA-L11-160808-800LMT_0603 ACES_88231-04001
28 HP_R HP_L 16
28 HP_L 17 3 CONN@
MIC1_R 17
28 MIC1_R 18 1
MIC1_L 18
28 MIC1_L 19 19 2
20 FBMA-L11-160808-800LMT_0603
20 SPKR+ LA4 1 SPK_R1
21 GND 28 SPKR+ 2
PACDN042Y3R_SOT23-3
22 GND 1
ACES_87151-2005N CA25
CONN@ @ 10U_0805_10V4Z 2
2 CA27
1 1U_0402_6.3V4Z
@
JP6 CA26 1
1 @ 10U_0805_10V4Z
1 MIC1_L SPKR- LA5 1 2 SPK_R2
2 2 28 SPKR- 2
3 MIC1_R FBMA-L11-160808-800LMT_0603
3 HP_L
4 4
5 HP_R
5
6
6
GND 7
GND 8
2 2
CONN@
JST_SM06B-XSRK-ETB(HF)
+5VALW +3VALW
1/27 Add R907 for USB_EN# PH
+5VALW
BlueTooth Interface
1
1
R907 +USB_VCCA 10K_0402_5%
100K_0402_5%
U48 R857
1 8
2
2
GND OUT
2 IN OUT 7
3 6 +3VS
USB_EN# IN OUT +3VS
1
31 USB_EN# 4 5 USB_OC#0 21,31
C636 EN# OC#
APL3510BXI-TRG MSOP 8
2
4.7U_0805_10V4Z 2 C325
2 R211 C326 0.1U_0402_16V4Z
1/27 Update P/N 100K_0402_5% 0.1U_0402_16V7K
3
1
S
R212
1
G
FD1 FD2 FD3 FD4 H4 H5 H6 H7 20,26 BT_PWR# 1 2 2 Q17
47K_0402_5%
@ @ @ @ 2
D AO3413_SOT23
1
H_4P0 H_4P0 H_4P0 H_4P0 <>
1
@ @ @ @ C327
0.01U_0402_25V7K
Screw Hole CPU 1

+BT_VCC
3 3
H15 H3 H8 H10 H12 H13 H16 H18 H2 H17 H19

(MAX=200mA)
H_2P3 H_2P8 H_2P3 H_2P3 H_2P3 H_2P3 H_2P3 H_2P3 H_2P1N H_2P6X2P1N H_5P0N
1
@ @ @ @ @ @ @ @ @ @ @
+BT_VCC
1
+5VS +5VS +5VS +5VS +5VS +5VS +5VS
C329 C330
1 1 1 1 1 1 1 4.7U_0805_10V4Z 0.1U_0402_16V4Z
@ 2
C708 C642 C643 C644 C645 C647 C648 JBT1
1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1
2 2 2 2 2 2 2 1
2
2
21 USB20_P6 3
3
21 USB20_N6 4
4
20 BT_RST# 1 2 5 7
R214 0_0402_5% 5 G1
20 BT_DET# 1 2 6
6 G2
8
+3VS R213 0_0402_5%
C328 ACES_87213-0600G
1 0.1U_0402_16V4Z CONN@
C646
0.1U_0402_16V4Z
2
4 4
5
/
3 4
Q15B
2N7002DW-T/R7_SOT363-6
AMP/Audio Jack/HP/SPEAKER/VR
Custom LA-6032P 1.0
A B C D E
A B C D
D3E suport
+3VALW
+1.8VS_OUT
20mil place near pin 5 3/22 co-lay 0 ohm
1
10K_0402_5%
10K_0402_5%
place near pin 10
1
1000P_0402_50V7K
0.1U_0402_16V4Z
0.22U_0402_6.3V6K
1 1 1 1
CC1 RC128 RC124
CC2 CC3 CC4
10U_0603_6.3V6M
@
22
2 2 2 2
G
2
QC1
21 CR_CPPE#_SB R922 1 2 0_0402_5% 1 3 CPPE#
Power Circuit
S
1 1
+3VS place near pin 19,20 and 44. R921 1 2 0_0402_5% 2N7002_SOT23-3
+TVA33 31 CR_CPPE#_EC
UC1 @ 1 2
+TVA33 CC5 0.1U_0402_16V4Z RC126 @ 0_0402_5%
CLK_PCIE_MCARD0# 3 5 1 2 2
20 CLK_PCIE_MCARD0# CLK_PCIE_MCARD0 APCLKN APVDD RC125 JMB389@ CC6 0.1U_0402_16V4Z CC16 JMB389@
20 CLK_PCIE_MCARD0 4 APCLKP APV18 10
NC/TAV33 36 1 2 1 2
PCIE_ITX_C_PRX_N1 9 CC7 0.1U_0402_16V4Z 0.1U_0402_16V4Z
11 PCIE_ITX_C_PRX_N1 PCIE_ITX_C_PRX_P1 APRXN 1
11 PCIE_ITX_C_PRX_P1 8 APRXP DV33 19 40mil 0_0402_5% 1 2
DV33 20 place near pin 36
11 PCIE_PTX_C_IRX_N1 CC8 1 2 0.1U_0402_16V7K PCIE_PTX_IRX_N1 11 44
CC9 0.1U_0402_16V7K PCIE_PTX_IRX_P1 APTXN DV33 +1.8VS_OUT 3/19 co-lay 0 ohm
11 PCIE_PTX_C_IRX_P1 1 2 12 APTXP DV18 18
37 20mil CH751H-40PT_SOD323-2
DV18 DC1
2 1 12mil 7 APREXT
RC2 12K_0402_1% 48 XD_SD_MS_D0 2 1 1 2 SD_CD#
JMB389@ MDIO0 XD_SD_MS_D1 CC10 CC11 22 CR_W AKE#
MDIO1 47
RC2 JMB385@ SEL43 43 46 XD_SD_MS_D2
0.22U_0402_6.3V6K
9.1K_0402_1% SDDV/MDIO4 MDIO2 XD_SD_MS_D3 RC127
10U_0603_6.3V6M
39 TXIN/NC MDIO3 45
SEL41 1 2
MDIO6/4 41 1 2
3/17 JMB385 co-lay 42 SDCLK_MSCLK_XDCE# place near pin18 @ 0_0402_5%
MDIO5 SEL24
24
JMB389 G/MDIO6
MDIO7 40 XD_CLE
RC3 29 XD_SD_MMC_D4
MDIO8 XD_SD_MMC_D5
12,15,20,26,27,31,32 PLT_RST# 1 2 1 XRSTN MDIO9 28
1 2 27 XD_SD_MMC_D6
100_0402_5% XTEST MDIO10 XD_SD_MMC_D7
MDIO11 26 place near pin37
0.1U_0402_16V4Z CC13 25 XD_RE#
JMB389@ CPPE# MDIO12 XD_RB#
JMB389@ 13 CPPE_N MDIO13 23
2 XD_CD# XD_ALE
14 CR1_CD2N MDIO14 22 Strapping setting
RC3 JMB385@ 30 Description
0_0402_5% MS_CD# NC/SPI_SCK SEL33
15 CR1_CD1N NC/SPI_CSN 33 Pin name
2
SD_CD# 16 34 High low 2
CR1_CD0N NC/SPI_SO
Ϫ
NC/SPI_SI 35
3/23 JMB385 co-lay 40 mils
+VCC_OUT 17 CR1_PCTLN MDIO14 on board add-in card
APGND 6
NC/GND 31
CR_LED# 21 32
Ϫ
33 CR_LED# CR1_LEDN NC/GND
NC/GND 38 CR_LED CR_LED
MDIO14 high active low active
GND 49
JMB389-QGAZ0C_QFN48_7X7
JMB389@ +3VS
place 6 GND vias
UC1 JMB385@ XD_CLE 1 2
JMB385-QGAZ0C QFN 48P MDIO7 RC19 10K_0402_5%
@ RC14 @ CC19 XD_ALE 1 2 @

+3VS 3/23 JMB385 co-lay SD_CLK 1 2 1 2 MDIO14 RC17 10K_0402_5%
100_0402_5% 100P_0402_50V8J 1 2
JMB385@ 1 2 SD_CD# RC5 200K_0402_5%
RC22 4.7K_0402_5% @ RC15 @ CC20
JMB385@ 1 2 MS_CD# RC11 0_0402_5% MS_CLK 1 2 1 2 3/18 10K change to 200K
RC23 4.7K_0402_5% SDCLK_MSCLK_XDCE# 1 2 SD_CLK
JMB385@ 1 2 XD_CD# RC12 0_0402_5% 100_0402_5% 100P_0402_50V8J Place RC5, RC17, RC19 close to pin42
RC24 4.7K_0402_5% 1 2 MS_CLK
3/17 JMB385 co-lay RC13 0_0402_5% @ RC16 @ CC21
1 2 XD_CE# XD_CE# 1 2 1 2
3
100_0402_5% 100P_0402_50V8J 3
+VCC_OUT 3/19 remove 22P_0402 3/17 JMB385 co-lay
XDW P#_SDW P# 2 1
RC20 10K_0402_5% RC25 0_0402_5%
+VCC_OUT SEL33
3/18 22U change to 10U JREAD1
For EMI close to JREAD 1 2
JMB385@
XD_RB# 2 1 13 35 XD_SD_MS_D0
RC9 1K_0402_5% SD_VCC XD_D0 XD_SD_MS_D1 RC26 0_0402_5%
22 MS_VCC XD_D1 36
1 1 43 37 XD_SD_MS_D2 SEL24 1 2
CC17 CC18 XD_VCC XD_D2 XD_SD_MS_D3 JMB385@
XD_D3 38
SDCMD_MSBS_XDW E# 2 1 39 XD_SD_MMC_D4
RC21 10K_0402_5% SD_CLK XD_D4 XD_SD_MMC_D5 RC27 0_0402_5%
10U_0805_10V6K
10 40
0.1U_0402_16V4Z
JMB385@ 2 2 SDCMD_MSBS_XDW E# SD_CLK XD_D5 XD_SD_MMC_D6 XDW P#_SDW P#

19 SD_CMD XD_D6 41 1 2
3/17 JMB385 co-lay SD_CD# 1 42 XD_SD_MMC_D7 JMB389@
XDW P#_SDW P# SD_CD XD_D7
2 SD_WP
XD_SD_MS_D0 4 26 XD_CD# RC28 0_0402_5%
XD_SD_MS_D1 SD/MMC_DAT0 XD_CD XD_RB# SEL41
3 SD/MMC_DAT1 XD_R/B 27 1 2
XD_SD_MS_D2 25 28 XD_RE# JMB385@
XD_SD_MS_D3 SD/MMC_DAT2 XD_RE XD_CE#
23 SD/MMC_DAT3 XD_CE 29
XD_SD_MMC_D4 21 30 XD_CLE RC29 0_0402_5%
SD_CD# XD_CD# XD_SD_MMC_D5 MMC_DATA4 XD_CLE XD_ALE SDCMD_MSBS_XDW E#
17 MMC_DATA5 XD_ALE 31 1 2
XD_SD_MMC_D6 8 32 SDCMD_MSBS_XDW E# JMB389@
XD_SD_MMC_D7 MMC_DATA6 XD_WE XDW P#_SDW P#
5 MMC_DATA7 XD_WP 33
RC30 0_0402_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1
7 SEL43 1 2
@ CC14 CC15 @ XD_SD_MS_D0 SD_GND JMB385@
12 MS_DATA0 SD_GND 15
XD_SD_MS_D1 11 6
2 2 XD_SD_MS_D2 MS_DATA1 MS_GND
14 MS_DATA2 MS_GND 24 CC12
XD_SD_MS_D3 18 34
MS_CLK MS_DATA3 XD_GND
20 MS_SCLK XD_GND 44 2 1
4
MS_CD# 16 45 JMB389@ 4
SDCMD_MSBS_XDW E# MS_INS GND

9 MS_BS GND 46 2.2U_0603_6.3V6K
TAITW_R013-P12-HM_44P_NR-T CC12 close to pin43
CONN@ For internal LDO in SD3.0

Card Reader JMB389
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
A B C D
A B C D E
+3VL_EC
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K

KSI[0..7] 1 1 1 1 1
32 KSI[0..7]
KSO[0..17] +3VL +3VL_EC +EC_AVCC C331 C332 C333 C334 C335
32 KSO[0..17]
L38 2 2 2 2 2
2 1 0.1U_0402_16V4Z 1000P_0402_50V7K
0_0603_5%
111
125
1 1
22
33
96
67
9
U12
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
GATEA20 1 21 1/25 Add net PCH_OFF
21 GATEA20 KB_RST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F EC_BEEP PCH_OFF 34
2 KBRST#/GPIO01 BEEP#/PWM2/GPIO10 23 EC_BEEP 28
21 KB_RST# SERIRQ
20,32 SERIRQ 3 26
LPC_FRAME# SERIRQ# FANPWM1/GPIO12 ACOFF
20,32 LPC_FRAME# 4 LFRAME# ACOFF/FANPWM2/GPIO13 27 ACOFF 37
20,32 LPC_AD3 LPC_AD3 5 C336 1 20.01U_0402_25V7K ECAGND
LPC_AD2 LAD3
20,32 LPC_AD2 7
LAD2 PWM Output
20,32 LPC_AD1 LPC_AD1 8 63 BATT_TEMPA
LPC_AD0 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMPA 36
R323
+3VL
20,32 LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I/AD2/GPIO3A 65 1 2 100K_0402_5% ADP_I 37
CLK_PCI_EC 12 AD Input 66 ADP_V
20,24 CLK_PCI_EC PLT_RST# PCICLK AD3/GPIO3B ADP_V 37
12,15,20,26,27,30,32 PLT_RST# 13 PCIRST#/GPIO05 AD4/GPIO42 75 1 2 C469 0.22U_0603_16V4Z
1 2 R236 ECRST# 37 76 HDPACT
47K_0402_5% EC_SCI# ECRST# SELIO2#/AD5/GPIO43 HDPACT 32
21 EC_SCI# WL_BT_LED#
20
SCI#/GPIO0E G-Sensor
2 1 C337 38
0.1U_0402_16V4Z 33 WL_BT_LED# CLKRUN#/GPIO1D
DAC_BRIG/DA0/GPIO3C 68
70 EN_DFAN1
EN_DFAN1/DA1/GPIO3D IREF EN_DFAN1 5
DA Output IREF/DA2/GPIO3E 71 IREF 37
KSI0 55 72 CHGVADJ
KSI0/GPIO30 DA3/GPIO3F CHGVADJ 37
KSI1 56
KSI2 KSI1/GPIO31
KSI3
57 KSI2/GPIO32 EC_MUTE#
12/18 Add EC_MUTE#
58 KSI3/GPIO33 PSCLK1/GPIO4A 83 EC_MUTE# 28
KSI4 59 84 USB_EN# USB Charger
KSI5 KSI4/GPIO34 PSDAT1/GPIO4B USB_CHG_EN# USB_EN# 29
60 85 USB_CHG_EN# 25
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C HDPINT
61
KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D
86 HDPINT 32 G-Sensor
KSI7 62 87 TP_CLK
KSO0 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_DATA TP_CLK 33
39 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F 88 TP_DATA 33
2 KSO1 2
40 KSO1/GPIO21
KSO2 41
EC_SMB_DA2 R231 2 KSO3 KSO2/GPIO22 VGATE
1 2.2K_0402_5% +3VS 42 97 VGATE 34,42
KSO4 KSO3/GPIO23 SDICS#/GPXOA00 WOL_EN#
EC_SMB_CK2 KSO5
43 KSO4/GPIO24 SDICLK/GPXOA01 98
VLDT_EN
WOL_EN# 27 WOL_EN#
R229 2 1 2.2K_0402_5%
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
LID_SW# VLDT_EN 34,39
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW# 33
EC_SMB_DA1 R228 2 1 2.2K_0402_5% +3VL KSO7 46 SPI Device Interface
KSO8 KSO7/GPIO27
47
EC_SMB_CK1 R227 2 KSO9 KSO8/GPIO28 EC_SI_SPI_SO
1 2.2K_0402_5% 48 119 EC_SI_SPI_SO 32
KSO10 KSO9/GPIO29 SPIDI/RD# EC_SO_SPI_SI
49 KSO10/GPIO2A SPIDO/WR# 120 EC_SO_SPI_SI 32
KSO11 50 SPI Flash ROM 126 SPI_CLK
KSO11/GPIO2B SPICLK/GPIO58 SPI_CLK 32
TP_CLK R225 1 2 4.7K_0402_5% +5VS KSO12 51 128 SPI_CS#
KSO13 KSO12/GPIO2C SPICS# SPI_CS# 32
52
TP_DATA R226 KSO14 KSO13/GPIO2D +5VL
1 2 4.7K_0402_5% 53
KSO15 KSO14/GPIO2E R773 1
54 KSO15/GPIO2F CIR_RX/GPIO40 73 2 10K_0402_5%
KSO16 81 74 SLP_CHG_M4_EC R867 1 @ 2 0_0402_5% SLP_CHG_M4
KSO16/GPIO48 CIR_RLC_TX/GPIO41 SLP_CHG_M4 22,25
KSO17 82 89 FSTCHG 1/21 Add SLP_CHG_M4
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 BATT_FULL_LED# FSTCHG 37
BATT_CHGI_LED#/GPIO52 90 BATT_FULL_LED# 33
SYSON R224 1 2 10K_0402_5% 91 CAPS_LED#
EC_SMB_CK1 CAPS_LED#/GPIO53 BATT_LOW_LED# CAPS_LED# 32
36 EC_SMB_CK1 77 SCL1/GPIO44 GPIO BATT_LOW_LED#/GPIO54 92 BATT_LOW_LED# 33
EC_SMB_DA1 78 93 PWR_ON_LED# Add PWR_ON_LED#
36 EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PWR_ON_LED# 33
SUSP# R223 1 2 10K_0402_5% EC_SMB_CK2 79 SM Bus 95 SYSON
7,32 EC_SMB_CK2 EC_SMB_DA2 SCL2/GPIO46 SYSON/GPIO56 VR_ON SYSON 34,40
7,32 EC_SMB_DA2 80 121 VR_ON 34,42
SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 ACIN_D
1/27 +3VALW-->+3V_ALW AC_IN/GPIO59
127
2 1
R230 10K_0402_5%
LID_SW# R238 2 1 100K_0402_5% PM_SLP_S3# 6 100 EC_RSMRST#
+3V_ALW 21 PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# 21
PM_SLP_S5# 14 101 EC_LID_OUT#
21 PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# 21
EC_SMI# 15 102 EC_ON @
21 EC_SMI# ADAPTOR_SEL 16 EC_SMI#/GPIO08 EC_ON/GPXO05 SLP_CHG_M3_EC EC_ON 33,34
3/22 Add CPPE to KBC 103 R868 1 2 0_0402_5% SLP_CHG_M3 SLP_CHG_M3 22,25 1/21 Add SLP_CHG_M3
LID_SW#/GPIO0A EC_SWI#/GPXO06 SB_PWRGD
30 CR_CPPE#_EC 17 104 SB_PWRGD 21
ON/OFFBTN# R232 2 SUSP#/GPIO0B ICH_PWROK/GPXO06 BKOFF#
1 100K_0402_5% +3VL 18 PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08 105 BKOFF# 18 CURS_LED#
3 WL_OFF# 3
19 EC_PME#/GPIO0D GPIO WL_OFF#/GPXO09 106 WL_OFF# 26
KSO1 R234 2 1 47K_0402_5% EC_INVT_PWM 25 107 CURS_LED#
18 EC_INVT_PWM FAN_SPEED1 EC_THERM#/GPIO11 GPXO10 EC_SEL CURS_LED# 32
5 FAN_SPEED1 28 108
KSO2 R235 2 HDPLOCK FAN_SPEED1/FANFB1/GPIO14 GPXO11 SLP_CHG#
1 47K_0402_5% 32 HDPLOCK 29 1 2 +3VALW
E51_TXD FANFB2/GPIO15 R862 100K_0402_5%
G-Sensor 26 E51_TXD E51_RXD
30 EC_TX/GPIO16
31 EC_RX/GPIO17 PM_SLP_S4#/GPXID1 110
26 E51_RXD ON/OFFBTN# UMA_ENBKL
33 ON/OFFBTN# 32 112 UMA_ENBKL 12
PWR_SUSP_LED# 34 ON_OFF/GPIO18 ENBKL/GPXID2 USB_OC#2
E51_TXD PL on Page 26 33 PWR_SUSP_LED# NUM_LED# PWR_LED#/GPIO19 GPXID3
114
SLP_CHG# USB_OC#2 21,25
32 NUM_LED# 36
NUMLED#/GPIO1A GPI GPXID4
115 SLP_CHG# 25 1/19 Change net name SLP_CHG-->SLP_CHG#
R775 1 2 100K_0402_5% PLT_RST# @
GPXID5
116 SUSP#
SUSP# 26,28,34,37,41
R923 1 2 0_0402_5% 117 PBTN_OUT# +3VL
20 RTCCLK GPXID6 USB_OC#0 PBTN_OUT# 21
118 USB_OC#0 21,29
@ CRY1 122 GPXID7
2 1 3/22 Add CPPE to KBC 2 1 C342 XCLK1
C641 0.1U_0402_16V4Z CRY2 123 124 2 1
Y4 XCLK0 V18R
15P_0402_50V8J C340 4.7U_0805_10V4Z EC_SEL EC_VERSION
1
1
AGND
2 1
GND
GND
GND
GND
GND
NC OSC R785
1 2 +3VL 3 4 R240 @ 100K_0402_5%
R233 150K_0402_5% NC OSC 20M_0402_5% KB926QFE0_LQFP128_14X14 HIGH KB926D3
11
24
35
94
113
69
D12 32.768KHZ_12.5PF_Q13MC14610002
2
2
ACIN_D 2 1 @
ACIN 22,33,35
2 1 EC_SEL LOW KB926E0
CH751H-40PT_SOD323-2 C343 +3VL_EC
15P_0402_50V8J
1
2 1
ECAGND
1
C339 100P_0402_50V8J R786

L39 100K_0402_5%
+3VL +EC_AVCC 0_0603_5%
2
2
L40
1
1 2 2 1
4 R909 C341 0.1U_0402_16V4Z 0_0603_5% 4
@ 100K_0402_5%
2
ADAPTOR_SEL
1
/
R910
100K_0402_5% Issued Date 2008/04/14 Deciphered Date 2009/04/14 Title
ENE KB926C
2
Custom LA-6032P 1.0
A B C D E
A B C D E
Option 1:SPI Flash (2MB*1) for EC KSI[0..7]

KSI[0..7] 31 KSO16 1 2
KSO[0..17] C344 100P_0402_50V8J
Option 2:SPI Flash (256KB*1) for EC KSO[0..17] 31 KSO17 1
C346
2
100P_0402_50V8J
SPI Flash (2MB*1) for SB (set up strap pin) KSO2 1
C347
2
100P_0402_50V8J
13.3 KEYBOARD CONN. KSO1 1 2
C348 100P_0402_50V8J
11.6 KEYBOARD CONN. KSO0 1 2
JKB1 C349 100P_0402_50V8J
SPI Socket: SP07000F500 & SP07000H900 JKB2 +3VS_MUM 2 1 +3VS
KSO4 1 2
+3VS_MUM 34 R247 300_0402_5% C350 100P_0402_50V8J
2MB P/N:MXIC SA00002TO00 S IC FL 16M MX25L1605DM2I-12G SOP 8P ROM 34 33 KSO3 1 2
1 33 32 1
256KB P/N:MXIC SA00003GK00 S IC FL 2M MX25L2005CMI-12G SOP 8P 32 31 KSO5
C351
1
100P_0402_50V8J
2
31 30 +3VS_CURS C352 100P_0402_50V8J
2 1 +3VS
30 +3VS_CURS 29 KSO2 R344 300_0402_5% KSO14
29 28 1 2
KSO2 KSO1 C353 100P_0402_50V8J
+3VL 28 KSO1 27 KSO0 KSO6
12/31 SMT memo control 27 KSO0 26 KSO4
1 2
C354 100P_0402_50V8J
U13 26 KSO4 25 KSO3 KSO7
20mil 25 KSO3 24 KSO5
1 2
8 4 C355 100P_0402_50V8J
VCC VSS 24 KSO5 23 KSO14 KSO13
23 22 1 2
3 KSO14 KSO6 C356 100P_0402_50V8J
W 22 KSO6 21 KSO7 KSO8
1 1 2
C345 21 KSO7 20 KSO13 C357 100P_0402_50V8J
7
HOLD 20 KSO13 19 KSO8 KSO9
19 18 1 2
0.1U_0402_16V4Z SPI_CS# 1 KSO8 KSO9 C358 100P_0402_50V8J
2 31 SPI_CS# S 18 17
KSO9 KSO10 KSO10 1 2
SPI_CLK 17 KSO10 16 KSO11 C359 100P_0402_50V8J
31 SPI_CLK 6 C 16 15
KSO11 KSO12 KSO11 1 2
EC_SO_SPI_SI EC_SI_SPI_SO 15 KSO12 14 KSO15 C360 100P_0402_50V8J
31 EC_SO_SPI_SI 5 2 EC_SI_SPI_SO 31
D Q 14 KSO15 13 KSI7 KSO12
13 12 1 2
MX25L2005CMI-12G SO8 KSI7 KSI2 C361 100P_0402_50V8J
12 KSI2 11 KSI3 KSO15
11 10 1 2
SPI_CLK 1 2 C634 1 2 100P_0402_50V8J KSI3 KSI4 C362 100P_0402_50V8J
R788 100_0402_5% 10 KSI4 9 KSI0 KSI7 1 2
9 KSI0 8 KSI5 C363 100P_0402_50V8J
8 KSI5 7 KSI6 KSI2
7 6 1 2
12/18 <BOM>R788 @-->100ohm and C634 @-->100P for RF request KSI6 KSI1 C364 100P_0402_50V8J
6 KSI1 5 +3VS_CAPS R245 2 KSI3
5 4 1 300_0402_5% +3VS 1 2
+3VS_CAPS CAPS_LED# C365 100P_0402_50V8J
4 CAPS_LED# 3 CURS_LED# CAPS_LED# 31 KSI4 1 2
LPC Debug Port (Please place the PAD under DDR DIMM)
3
2
CURS_LED#
NUM_LED#
2
1
NUM_LED# CURS_LED# 31
NUM_LED# 31 KSI0
C366
1
100P_0402_50V8J
2
2 1 C367 100P_0402_50V8J 2
+3VS
10/10 New CURS_LED## for 11.3&13.6 KSI5
H1 @ ACES_88170-3400 1 2
ACES_88170-3400 C368 100P_0402_50V8J
6 5 CONN@ CONN@ KSI6 1 2
1/27 Del R246 C369 100P_0402_50V8J
KSI1 1 2
7 4 PLT_RST# C370 100P_0402_50V8J
20,31 SERIRQ PLT_RST# 12,15,20,26,27,30,31
New keyboard CAPS_LED# 1
C372
2
100P_0402_50V8J
LPC_AD3 8 3 LPC_AD2 NUM_LED# 1 2
20,31 LPC_AD3 LPC_AD2 20,31
C373 100P_0402_50V8J
LPC_AD1 9 2 LPC_AD0
20,31 LPC_AD1 LPC_AD0 20,31 CURS_LED# 1 2
10/10 New CURS_LED# cap for 11.3&13.6 C615 100P_0402_50V8J
LPC_FRAME# 10 1
20,31 LPC_FRAME# LPC_CLK1 20,24
2
DEBUG_PAD @ R248
22_0402_5%
1
2
@ C371
22P_0402_50V8J
1
3
G-Sensor UG6 3
7,31 EC_SMB_CK2 1 11 HDPACT 31

P3_5/SSCK/SCL/CMP1_2 P1_6/CLK0/SSI01
2
RG2 @
+3VS 2 1 +3VS_HDP SELF_TEST 2 12 RG9
P3_7/CNTR0#/SSO/TXD1 P1_5/RXD0/CNTR01/INT11#
47K_0402_5%
0_0603_5% GSENSOR@
+5VS +3VS_HDP +3VS_HDP RG3 2 1 3 13
1
GSENSOR@ DG1 CH751H-40PT_SOD323-2 GSENSOR@ 4.7K_0402_5% RESET# P1_4/TXD0
1 2
2 2 RG4 2 1GXOUT 4 14 HDPLOCK 31
CG12 UG3 GSENSOR@ GSENSOR@ 4.7K_0402_5% XOUT/P4_7 P1_3/KI3#/AN11/TZOUT
1U_0402_6.3V4Z CG13 RG10 47K_0402_5%
GSENSOR@ 1 5 1U_0402_6.3V4Z 5 15 VOUTZ 2 1
1 VIN VOUT 1
GSENSOR@ VSS/AVSS P1_2/KI2#/AN10/CMP0_2 GSENSOR@
2
GND CG14 RG5 2 1GXIN 6 16 +3VS_HDP
GSENSOR@ 4.7K_0402_5% XIN/P4_6 P4_2/VREF
3 4 2 1
SHDN# BP
GSENSOR@ Reserve Freescale 7
VCC/AVCC P1_1/KI1#/AN9/CMP0_1
17 VOUTX
1
CG6
G9191-330T1U_SOT23-5 0.22U_0402_10V4Z 0.1U_0402_16V4Z
+3VS_HDP GSENSOR@
CG9 0.1U_0402_16V4Z UG4 2ND@ RG6 2 VOUTY 2
Change U55 to G9191-330T1U 1 8
MODE P1_0/KI0#/AN8/CMP0_0
18
2ND@ 2 1VOUTX2 6 GSENSOR@
CG10 0.1U_0402_16V4Z XOUT VDD 4.7K_0402_5%
2ND@ 2 1VOUTY3 RG7 2 1 9 19
UG1 1ST@ CG11 0.1U_0402_16V4ZYOUT 1
31 HDPINT GSENSOR@ P4_5/INT0#/RXD1 P3_3/TCIN/INT3#/SSI00/CMP1_0
VOUTXCG1 NC
+3VS_HDP 2 3 1 2 1ST@ 0.033U_0402_16V7K 2ND@ 2 1VOUTZ4 ZOUT 8 1K_0402_5%
Vdd1 Voutx VOUTYCG2 NC
12 5 1 2 1ST@ 0.033U_0402_16V7K 11 1 1 10 20 EC_SMB_DA2 7,31
Vdd2 Vouty VOUTZCG3 NC P1_7/CNTR00/INT10# P3_4/SCS#/SDA/CMP1_1
7 1 2 1ST@ 0.033U_0402_16V7K 9 12 CG8
Voutz 0G-DET NC CG7 GSENSOR@
NC 14
4 SELF_TEST 0.1U_0402_16V4Z 0.1U_0402_16V4Z R5F211B4D34SP_LSSOP20 4
4 ST NC1 10 +3VS_HDP 7 SLEEP#
6 11 10 GSENSOR@ 2 2 1STGSENSOR@
PD NC2 SELF_TEST G-SELECT
8 FS NC3 14 13 ST VSS 5
NC4 15 03/11 update G-sensor P/N
16 MMA7360LR2_LGA14
NC5
+3VS_HDP 9 Rev GND1 1

13
TSH35TR_LGA16
GND2 Security Classification Compal Secret Data Compal Electronics, Inc.
SPI/LPC/PS2/MDC/FM/CIR
Custom LA-6032P 1.0
A B C D E
A B C D E
Power Button & Lid switch

JPB1
1
+5V_ALW
LED/B Connector
ON/OFFBTN# 2
31 ON/OFFBTN# 3
4
1 5 +5VS
C386 6
1 0.1U_0402_16V4Z P-TWO_161011-04021_4P-T JLED1 @ 1
2 CONN@ 03/10 Fine tune R813 R815 120ohm-->220ohm 1 1
2
DC_IN R812 120_0402_5% DC_IN_R 2
1 2 3 3
PWR_ON_LED# R813 1 2 220_0402_5% PWR_ON_LED#_R 4
31 PWR_ON_LED# 4
12/15<BOM> C386 @-->0.1u 1/27 Update footprint PWR_SUSP_LED# R814 1 2 120_0402_5% PWR_SUSP_LED#_R 5
31 PWR_SUSP_LED# BATT_FULL_LED# BATT_FULL_LED#_R 5
R815 1 2 220_0402_5% 6
31 BATT_FULL_LED# BATT_LOW_LED# R816 120_0402_5% BATT_LOW_LED#_R 6
51_ON# 35 1 2 7 7
31 BATT_LOW_LED# HDD_LED R817 120_0402_5% HDD_LED_R
1 2 8
WIMAX_LED R818 120_0402_5% WIMAX_LED_R 8
1 2 9 9
WL_BT_LED# R819 1 2 120_0402_5% WL_BT_LED#_R 10
31 WL_BT_LED# 10
3
MEDIA_LED R820 1 2 120_0402_5% MEDIA_LED_R 11
Q14B 11
12
12
5 2N7002DW-T/R7_SOT363-6
31,34 EC_ON
13 GND1
2
14
4
R257 GND2
10K_0402_5% ACES_87213-1200G
1
1/27 Del R808 R809 R810 R811 DC-IN LED

ACIN 22,31,35
2
2
1/27 +3VALW-->+3V_ALW and +5VALW-->+5V_ALW DC_IN 2
6 1
Touch/B Connector Q14A

2N7002DW-T/R7_SOT363-6
1/27 +3VALW-->+3V_ALW 03/11 Update JTP1 footprint

+3V_ALW
JTP1 HDD LED
1
1
+5VS 2 SATA_LED# 22
TP_CLK 2
31 TP_CLK 3
TP_DATA 3
31 TP_DATA 4
4
5 5
LID_SW# 1 2 LID_SW#_R 6
31 LID_SW# R864 0_0402_5% 6
7
GND
8 GND R790
3
P-TWO_161021-06021_6P-T HDD_LED 1 2
12/24 Add R864 D15 CONN@ 0_0402_5%
PACDN042Y3R_SOT23-3
1
12/17 Q8 Q9 R258 R259-->@, R790 R791-->SMT

LED_WIMAX# 26
3 3
WIMAX_LED
R791
1 2
0_0402_5%
03/10 Q15-->@ and R260 @-->SMT (memo)

Check control pin?
R260
1 2 CR_LED# 30
0_0402_5%
2
4 MEDIA_LED RC4 4
6 1
4.7K_0402_5%
Q15A @
@ 2N7002DW-T/R7_SOT363-6
1
LED/LID/PB/FB/SCREW HOLE
Custom LA-6032P 1.0
A B C D E
A B C D E
< +5VALW TO +5VS > < +1.5V TO +1.5VS >

+1.5V +1.5VS
+5VALW
Q21
Inrush current = 0A
+5VS 8 1
7 2 1 2
Q18 6 3 C402 C403
2
8 D S 1 5
4.7U_0805_10V4Z
7 2 1 1 1 10U_0805_10V6K R279
D S C387 C388 IRF8113PBF_SO8 2 1
6 3 470_0805_5%
4
D S RUNON C407
5 4
D G 1U_0402_6.3V4Z 4.7U_0805_10V4Z 1U_0402_6.3V4Z
1
1
SI4800BDY_SO8 2 2 2 R267
1 C394 1.5VS_ENABLE 1
1 2 +VSB
4.7U_0805_10V4Z 1
3
2 1M_0402_5%
R269 C410
10M_0402_5% 0.1U_0603_25V7M Q11B
2 2 SUSP 5 2N7002DW-T/R7_SOT363-6
Q11A
2
2N7002DW-T/R7_SOT363-6
4
+1.1VS
< +3VALW TO +3VS > < +1.1VALW TO +1.1VS > +1.1VALW Inrush current = 0A
1 1
Q22 C405 C406 1
+3VALW +3VS Inrush current = 0A 8 1
Q19 7 2 1U_0402_6.3V4Z 4.7U_0805_10V4Z + C622
2
2 2
1U_0402_6.3V4Z
8 D 1 6 3 330U_2.5V_M
S
7 D S 2 1 1 C392 5
2
R272
6 D 3 C390 4.7U_0805_10V4Z 470_0805_5%
S IRF8113PBF_SO8
5 D 4
4
G
4.7U_0805_10V4Z
1
1
SI4800BDY_SO8 2 2
4.7U_0805_10V4Z
1 C408
C395 2 2 R266 1 +VSB
0.01U_0402_25V7K
1 330K_0402_5%
1
2 RUNON 2 R261 1 C409
+VSB
3
0.01U_0402_25V7K
1 750K_0402_1% R268
1
@ 10M_0402_5%
2 Q13A 2 2
C396 R262 2 5 Q12B
2
2 10M_0402_5% 2 SUSP Q12A 2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2
4
2N7002DW-T/R7_SOT363-6
1
R795 1 2 0_0402_5% VGATE#
+5V_ALW to +5VALW Transfer +3V_ALW to +3VALW Transfer

+3V_ALW +3VALW < Inversion of SYSON, SUSP#, VLDT_EN, EC_ON >
+5V_ALW +5VALW J3 JUMP_43X118
J2 JUMP_43X118 2 1 +5VL +5VL
2 1
2 2 1 1
@ @
1
SI7326DN-T1-E3_PAK1212-8
SI7326DN-T1-E3_PAK1212-8 U50 R274 R275
U49 1
1 +VSB 2 100K_0402_5% 100K_0402_5%
+VSB 2 5 3
2
0.1U_0402_16V4Z
5 3 SYSON# SUSP
SUSP 41
470_0805_5%
470_0805_5%
10U_0805_10V4Z
0.1U_0402_16V4Z
@
2
6
10U_0805_10V4Z
10U_0805_10V4Z
@ 1 1
4
1
C906
C907
10U_0805_10V4Z
@ 1 1 R904 1 Q10B Q10A

4
C901
C902
R905
R900 1 C905 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
R901
@ C900 @ 330K_0402_5% 5 2
3/23 install C901 3/23 install C906 2 2 31,40 SYSON SUSP# 26,28,31,37,41
330K_0402_5% @ @
1
1
@ 2 2 2
2
1
2 @
@
3
1
3 @ @ +5VL +5VL 3
@ @ @ R906
6
R903 470_0402_5% PCH_OFF_R 5
1
2N7002DW-7-F_SOT363-6
@ 470_0402_5% PCH_OFF_R 5 PCH_OFF_R 2 2

@ R902 Q41B
2
4
2 1PCH_OFF_R 2 Q40B Q41A 1 @ 2N7002DW-7-F_SOT363-6 R276 R329
4
31 PCH_OFF
10K_0402_5% 1 @ 2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6 C908 100K_0402_5% 100K_0402_5%
1 Q40A C904 4700P_0402_25V7K
1
2
4700P_0402_25V7K VLDT_EN# EC_ON#
2
C903 (5A,200mils ,Via NO.= 10)
3
0.1U_0402_16V4Z @ 2
2
(OCP min=7.9A) Q25A Q25B
2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
VLDT_EN 2 5
31,39 VLDT_EN EC_ON 31,33
1/25 Add +5V_ALW to +5VALW Transfer
4
+3V_ALW to +3VALW Transfer
+NB_CORE +5VS +3VS +1.8VS +1.5V +1.1VALW +0.75VS
< Discharge circuit >

2
2
2
R270 R277 R271 R280 R330 R278

R331 470_0805_5% 470_0805_5% 470_0805_5% 470_0805_5% @ 470_0805_5% 470_0805_5%
+5VL +5VL 470_0805_5%
@
1
3 1
1
1
1
1
R796 R800 D D D D D
3
SUSP 2 Q13B 2 SUSP SYSON# 2 EC_ON# 2 SUSP 2

100K_0402_5% 100K_0402_5% G SUSP 5 G G G @ G
4 @ Q23 Q27 Q28 Q31 Q26 4
S S S S S
2
3
VLDT_EN# 5 2N7002_SOT23-3 2N7002_SOT23-3 2N7002_SOT23-3 2N7002_SOT23-3 2N7002_SOT23-3
4
VGATE# VR_ON# Q32B 2N7002DW-T/R7_SOT363-6

VR_ON# 41
2N7002DW-T/R7_SOT363-6
4
3
Q35B 12/18 SYSON#-->SUSP

6
Q35A
31,42 VGATE 5 2N7002DW-T/R7_SOT363-6
2 VR_ON 31,42 Issued Date 2008/04/14 Deciphered Date 2009/04/14 Title
DC/DC Circuits
4
2N7002DW-T/R7_SOT363-6
1
Custom LA-6032P 1.0
A B C D E
A B C D
VIN
PL1 VS
PF1 SMB3025500YA_2P PR1
DC30100A900 DC_IN_S1 1 2 DC_IN_S2 1 2 VIN 1M_0402_1%
1 2
PJP1 7A_24VDC_429007.W RML
1
680P_0402_50V7K
1
680P_0402_50V7K
1000P_0402_50V7K
+
1000P_0402_50V7K
1
N1 PR2
1
2 PR3 5.6K_0402_5% PR4
@ PC18
+
@ PC19
PC1
PC2
PC3 PC4 84.5K_0402_1% 10K_0402_1%
3 100P_0402_50V8J 100P_0402_50V8J 1 2 ACIN 22,31,33
2
1
- PR5 1
8
4 22K_0402_1% PU1A
-
1 2 3
P
@ SINGA_2DW -0005-B03 +
1 PACIN PACIN 37
O
2 -
G
1
1
1
PR6 LM393DG_SO8
4
PC5 20K_0402_1% PC6 PD1 PR7
0.068U_0402_10V6K .1U_0402_16V7K GLZ4.3B_LL34-2 10K_0402_1%
2
2
2
VIN
2 1 +CHGRTC
PR8
2
10K_0402_1%
3.3V
PD2
RLS4148_LL34-2
Vin Detector
1
BATT+ 2 1
1
PD3
RLS4148_LL34-2 PQ1
PR9
68_1206_5%
PR10
68_1206_5%
High 18.384 17.901 17.430
PR11
TP0610K-T1-E3_SOT23-3 Low 17.728 17.257 16.976
2
200_0603_5%
CHGRTCP 1 2 N1 3 1 VS
2 2
1
1 2
1
1
PC8
PR12 PC7 0.1U_0603_25V7K PR13
100K_0402_1% 0.22U_0603_25V7K 1K_1206_5%
2
2
PD4
2
2 1 N3 1 2
33 51_ON# 1 2
VIN B+
PR14 RLS4148_LL34-2 PR15
22K_0402_1% 1K_1206_5%
RTC Battery 1 2
PR16
1
1K_1206_5%
PR17
- +
1
200_0603_5% PBJ1 PR18 PR19
PU2 G920AT24U_SOT89-3 560_0603_5% 560_0603_5% PR21 PR22
3.3V 2 1 1 2 1 2 +RTCBATT 100K_0402_1% 2.2M_0402_5% PR20
2
3 2 N2 1 2 2 1 499K_0402_1%
+CHGRTC OUT IN VL
2
1
GND @ MAXEL_ML1220T10
PC9 PC10 PD5 LM393DG_SO8
8
10U_0805_10V4Z 1 RB715F_SOT323-3 PU1B
2
1U_0805_25V4Z 2 5
P
38 EN0 1 7
+
X7999651L01 3
O
6 2 1 +CHGRTC
37 ACON -
1
PR23 PR24 PC13
1000P_0402_50V7K
3 3
4
1
1
PC11
10K_0402_1% 499K_0402_1% 1000P_0402_50V7K
1000P_0402_50V7K
1
PR26
2
PC12
@ PR25 191K_0402_1%
2
PJ1 PJ2 PJ3 66.5K_0402_1%
2
+3VALW P 2 1 +3V_ALW +1.1VALW P 2 1 +1.1VALW +NB_COREP 2 1 +NB_CORE
2
2 1 2 1 2 1
2
@ JUMP_43X118 @ JUMP_43X118 @ JUMP_43X118
(5A,200mils ,Via NO.= 10) (4.6A,180mils ,Via NO.= 9) (7.6A,300mils ,Via NO.= 15)
OCP(min)=7.9A OCP(min)=5.26A OCP(min)=9.38A PR27
1
D 47K_0402_1%
PJ4 PJ5 PJ12 PACIN
2 2 1
+5VALW P 2 1 +5V_ALW +1.5VP 2 1 +1.5V 2 1 +5VL G
2 1 2 1 VL 2 1 S PQ2
3
@ JUMP_43X118 @ JUMP_43X118 @ JUMP_43X39 SSM3K7002FU_SC70-3
(5A,200mils ,Via NO.= 10) (8A,320mils ,Via NO.= 16)
1
(100mA,40mils ,Via NO.= 2)
OCP(min)=8.1A OCP(min)=8.55A Precharge detector
15.97V/14.84V FOR
PJ6 PJ7 PJ17
2 1 +2.5VSP 2 1 +2.5VS 2 1 +3VL
ADAPTOR 2 +5VALW P
+VSBP 2 1 +VSB 2 1 +3VLP 2 1
@ JUMP_43X39 @ JUMP_43X39 @ JUMP_43X39 PQ3
(0.25A,10mils ,Via NO.=1) DTC115EUA_SC70-3
3
(120mA,40mils ,Via NO.= 1) (100mA,40mils ,Via NO.= 2)
4 PJ8 PJ9 PJ15 4
+VDDNBP 2 1 +VDDNB +1.8VSP 2 1 +1.8VS +0.75VSP 2 1 +0.75VS

2 1 2 1 2 1
@ JUMP_43X118 @ JUMP_43X79 @ JUMP_43X79
(0.5A,20mils ,Via NO.= 1)
(2A,80mils ,Via NO.= 4) (1.3A,52mils ,Via NO.= 3)
OCP(min)=3A
PJ10
OCP(min)=3A Security Classification Compal Secret Data Compal Electronics, Inc.
2 1
+0.9VP 2 1 +0.9V
DCIN/DECTOR
@ JUMP_43X79 Size Document Number Rev
(1.3A,52mils ,Via NO.= 3) DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA6032P 1.0
A B C D
A B C D
PH1 under CPU botten side :

CPU thermal protection at 92 degree C
For 11.6" VMB
PF2
PL2
Recovery at 56 degree C
PJP2 10A_125V_451010MRL SMB3025500YA_2P
1 BATT_S1 1 2 1 2
1 BATT+
2 2
3 BATT_P3 1 2 1 2
3 +3VLP
0.01U_0402_25V7K
0.1U_0402_25V6
BATT_P4 PR28 PR29
4 4 PH2 near main Battery CONN:
1
5 BATT_P5 1K_0402_1% 47K_0402_1%
5
PC14
PC16
1
EC_SMDA PC15 1
10
11
GND 6
6
7 EC_SMCA 1000P_0402_50V7K
BAT thermal protection at 78 degree C
2
GND 7
12 8 Recovery at 42 degree C
2
GND 8
1
13 9 @
GND 9 PR30
@ SUYIN_200045MR009G171ZR 1K_0402_1%
Rset = 3*Rtmh
2
Rhyst = (Rset* Rtml) / (3*Rtml - Rset)
For 13.3" @ PD16
1 PJSOT24C_SOT23-3
PJP3 2
1 BATT_S1 @ PD17 1 VL
1
2 2 PJSOT24C_SOT23-3 3
3 BATT_P3
3 BATT_P4 PR36
4 4
1
5 BATT_P5 6.49K_0402_1%
2
1
10 6 EC_SMDA 2 1 PR37
GND 6 EC_SMCA +3VLP
11 7 PC17 22K_0402_1%
GND 7 1
0.1U_0603_25V7K
12 8
2
GND 8
2
13 9 PR39 PR31
2
GND 9 1K_0402_1% 34.8K_0402_1%
@ SUYIN_200045MR009G171ZR
2
2
2
PR34 PR38
1
100_0402_1% 10.2K_0402_1%
BATT_TEMPA 31
PR35 PU3
100_0402_1% 1 8
1
1
VCC TMSNS1
1
2 GND RHYST1 7
2 2
EC_SMB_DA1 31
3 6 PH1
OT1 TMSNS2 100K_0402_1%_NCP15WF104F03RC
EC_SMB_CK1 31
1
4 5
2
38 VS_ON OT2 RHYST2 PR32
G718TM1U_SOT23-8 15.4K_0402_1%
1
PH2
100K_0402_1%_NCP15WF104F03RC
2
Rtmh at 92C = 7.71K,Rtml at 56C = 26.1K
Rset = 3* 7.31 = 21.9K ==> PR37 = 22K
PQ5 Rhyst = ( 22K* 26.1K ) / ( 3* 26.1K - 22K) = 10.199K ==> PR38 = 10.2K
TP0610K-T1-E3_SOT23-3
B+ 3 1 +VSBP
3 3
100K_0402_1%
0.22U_0603_25V7K
0.1U_0603_25V7K
Rtmh at 78C = 11.635.K,Rtml at 42C = 46.38K

1
1
PR45
@ PC21
PC22
Rset = 3* 11.635 = 34.91K ==> PR31 = 34.8K

2
@
2
VL PR46
Rhyst = ( 34.8K* 46.38K ) / ( 3* 46.38K - 34.8K) = 15.468K ==> PR32 = 15.4K
22K_0402_1%
1 2
2
PR47
100K_0402_1%
PR48
1
0_0402_5% D
1 2 2 PQ6
38,39 POK
G SSM3K7002FU_SC70-3
.1U_0402_16V7K
S
3
1
PC23
2
4 4

BATTERY CONN / OTP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA6032P 1.0
A B C D
A B C D
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
B+
1
PC69
PC127
PC47
PC68
PQ7 PR49 B+ PL3
2
AO4435_SO8 P2 PQ8 P3 0.033_1206_1% HCB2012KF-121T50_0805 CHG_B+ PQ9 AO4435_SO8
AO4407A_SO8 1 8
VIN 8 1 1 8 1 4 2 1 2 7
7 2 2 7 3 6
6 3 3 6 2 3 CSIN 5
5 5
4
CSIP
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4
4
1
1 1
1
PQ10 TP0610K-T1-E3_SOT23-3 PR51
PC24
PC25
PC26
PR50 10_0603_5%
200K_0402_1% 3 1 1 2 DCIN
2
P3 PR54
2
1
1
PQ11 47K_0402_1%
2
DTA144EUA_SC70-3 PC27 PR53 PQ12 1 2
1
PR52 0.1U_0603_25V7K PC28 100K_0402_1% DTC115EUA_SC70-3 VIN
2
47K_0402_1% 2 5600P_0402_25V7K
1
PR55 PD8
2
2
100K_0402_1% 2FSTCHG PD9
2
PD10 2 1 2 1 1 2 ACOFF
1SS355_SOD323-2 3 PR56
1 2 6251VDD SUSP# 26,28,31,34,41 10K_0402_1% 1SS355_SOD323-2
1
RB715F_SOT323-3
2.2U_0603_6.3V6K
1
PC29
PR57
1
1
10K_0402_1% PR60
2 1 PU5 PC30 200K_0402_1%
31 FSTCHG
1
0.1U_0603_25V7K 1 2
2
VIN
DCIN
100K_0402_1%
2 1 2 1 VDD DCIN 24 2 1
1
1
PQ13
PR59
DTC115EUA_SC70-3 PC31 PQ14 PD11
PR58 .1U_0402_16V7K 2 23 DTC115EUA_SC70-3 2 1 2
ACSET ACPRN
1
D 150K_0402_1% PR61
3
2 PQ15 20_0603_5% 1SS355_SOD323-2

2
2
G SSM3K7002FU_SC70-3 6251_EN 3 22 1 2 CSON
EN CSON
2
S @ PC34 PC32
3
3
5
6
7
8
1
680P_0402_50V7K 0.047U_0603_16V7K D
1
CSON 1 2 4 21 1 2 CSOP PC33 2 PACIN
1
CELLS CSOP PR62 PQ16 0.1U_0603_25V7K G
PC35 6800P_0402_25V7K 20_0603_5% AO4466_SO8 S PQ17
3
2
1 2 5 20 2 1 SSM3K7002FU_SC70-3 2
ICOMP CSIN
1
2
D PR63 4
2 PQ18 PC36 PR64 6.81K_0402_1% PC37 20_0603_5%
G SSM3K7002FU_SC70-3 1 2 1 2 6 19 0.1U_0603_25V7K1 2 PR67
1
PR66 VCOMP CSIP PL4 0.02_1206_1%
S
3
0.01U_0402_25V7K 1 2 47K_0402_1% PR65 10U_LF919AS-100M-P3_4.5A_20% BATT+
3
2
1
PR68 @ PC38 1 2 7 18 LX_CHG 2.2_0603_5% 1 2CHG 1 4
22K_0402_5% 100P_0402_50V8J ICM PHASE
5
6
7
8
PACIN 1 2 1 2 2 3
35 PACIN
1
6251VREF DH_CHG
680P_0603_50V7K 4.7_1206_5%
10U_1206_25V6M
10U_1206_25V6M
8 VREF UGATE 17
@ PR69
PC39 PR70 PC40
35 ACON
PR71 .1U_0402_16V7K 0_0603_5% 0.1U_0603_25V7K
31 ADP_I
1
PC41
PC42
174K_0402_1% 9 16 BST_CHG 1 2 BST_CHGA 2 1
CHLIM BOOT
1
1
PQ20 2 1 4 PQ19
2
DTC115EUA_SC70-3 31 IREF PD12 AO4466_SO8
2
PR73 6251aclim 6251VDDP RB751V-40TE17_SOD323-2
0.01U_0402_25V7K
10 ACLIM VDDP 15
1
@ PC44
26.7K_0402_1%
1
PC43
ACOFF 2 PR72 6251VREF

1 2 1 26251VDD
31 ACOFF
3
2
1
100K_0402_1% 11 14 DL_CHG
2
VADJ LGATE
1
2
PR74
2
PR75 4.7_0603_5%
2
20K_0402_1% 12 13 PC45
3
1
GND PGND 4.7U_0805_6.3V6K
2
ISL6251AHAZ-T_QSOP24
PR76
15.4K_0402_1%
1 2
31 CHGVADJ
1
3
PR77 3
31.6K_0402_1%
2
Iadapter=0~2.368A(45W) CP=Iadapter*0.92 CP=2.178A VIN
1
CC=0.25A~3A CHGVADJ=(Vcell-4)*9.445 PR78
309K_0402_1%
IREF=1.096*Icharge Vcell CHGVADJ 2
PR79
IREF=0.254V~3.048V 4V 0V 10K_0402_1%
1 2 ADP_V 31
VCHLIM need over 95mV 4.2V 1.882V
1
4.35V 3.2935V 1
PR80
47K_0402_1% PC46
.1U_0402_16V7K
2
2
CP mode
Vaclim=2.39*(20K//152K/(20K//152K+26.7K//152K))=1.04596V
Iinput=(1/0.02)((0.05*Vaclm)/2.39+0.05)
where Vaclm=1.04596V, Iinput=2.178A
4 4

CHARGER
Custom 1.0
LA6032P
A B C D
5 4 3 2 1
2VREF_51125
1U_0603_10V6K
1
PC48
2
D D
PR86 PR87
13K_0402_1% 30K_0402_1%
1 2 1 2
PR88 PR89
B++
PL5 20K_0402_1% 19.6K_0402_1%
B++
1 2 1 2
HCB4532KF-800T90_1812
B+ 1 2 +3VLP
ENTRIP2
ENTRIP1
PR90 PR91
1U_0603_25V6K
2200P_0402_50V7K
121K_0402_1% 121K_0402_1%
10U_1206_25V6M
10U_1206_25V6M
1
1
@ PC56
PC49
1 2 1 2
2200P_0402_50V7K
.1U_0402_16V7K
1
PC50
PC52
PC51
4.7U_0805_10V6K
2
1
PU6
5
PC65
TONSEL
ENTRIP2
FB2
FB1
ENTRIP1
REF
5
1
PC53
PQ22
PQ21 25 P PAD
1
AON7408L_DFN8-5
2
AON7408L_DFN8-5
7 24 POK 36,39 4
2
VO2 VO1
4
C 8 23 PR93 PC55 C
PR92 VREG3 PGOOD 2.2_0603_1% .1U_0402_16V7K
1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2
3
2
1
2.2_0603_1% BOOT2 BOOT1
1
2
3
PL6 PC54 UG_3V 10 21 UG_5V PL7 +5VALWP
4.7UH_PCMC063T-4R7MN_5.5A_20% .1U_0402_16V7K UGATE2 UGATE1 4.7UH_PCMC063T-4R7MN_5.5A_20%
1 2 LX_3V 11 20 LX_5V 1 2
+3VALWP PHASE2 PHASE1
1
1
LG_3V LG_5V
4.7_1206_5%
4.7_1206_5%
12 LGATE2 LGATE1 19
PR84
PR82
PQ23
SKIPSEL
PQ24
VREG5
AON7702L_DFN8-5
GND
VIN
35 EN0
NC
RT8205EGQW _W QFN24_4X4 AON7702L_DFN8-5
EN
1 1
2
2
PC58 4 4 PC64
+ PR94 +
13
14
15
16
17
18
1
1
499K_0402_1% 150U_V_6.3VM_R18
680P_0603_50V8J
680P_0603_50V8J
PC63
PC62
150U_V_6.3VM_R18 1 2
2 B+ 2
Ipeak = 5A
1U_0402_6.3V6K
2
1
2
3
3
2
1
2
1
100K_0402_5%
1
PR95
PC67
Imax = 3.5A 1 2 VL
PC60
PR96
4.7U_0805_10V6K
2
F = 305kHz @ 0_0402_5%
.1U_0402_16V7K
2
Total Capacitor = 150 uF ENTRIP1 ENTRIP2 B++
PC66
1
B Ipeak = 5A B
ESR = 18m Ohm
0.1U_0603_25V7K
2
2
PC61
Imax = 3.5A
1
D D
2VREF_51125
PQ36 2 2 PQ37
SSM3K7002FU_SC70-3 G G SSM3K7002FU_SC70-3 F = 245kHz
S S
3
Total Capacitor = 150 uF
ESR = 18m Ohm

VL 2 1
PR81
100K_0402_1%
36 VS_ON
1
VS 1 2 2 PQ38
G SSM3K7002FU_SC70-3
PR83 S
42.2K_0402_1%
0.01U_0402_16V7K
3
1
100K_0402_1%
1
PR85
@ PC59
2
2
A A

+5VALWP/+3VALWP
1.0
LA-6032P
5 4 3 2 1
5 4 3 2 1
PL8
HCB2012KF-121T50_0805
1.1V_B+ 2 1 B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
1
PC70
PC71
5
6
7
8
2
AO4466_SO8
D D
PQ26
PR102
255K_0402_1% 4
1 2
PR103 PR104
0_0402_5% 2.2_0603_5%
1 2 1 2
3
2
1
36,38 POK
1
PL9
15
14
PC73
1
PC72 PU7 1.8UH_1164AY-1R8N=P3_9.5A_30%
@.1U_0402_16V7K BST_1.1V 1 2 1 2
EN/DEM
BOOT
NC
+1.1VALWP
2
2 13 DH_1.1V 0.1U_0603_25V7K
TON UGATE
4.7_1206_5%
PR106 3 12 LX_1.1V
VOUT PHASE
5
6
7
8
PR105
100_0603_1% 1 Ipeak = 4.6A
220U_6.3V_M
+5V_ALW 1 2 4 11 1 2 +5V_ALW
VDD CS
AO4712_SO8
PC74
PR107 +
2
5 10 9.1K_0402_1% Imax = 3.22A
FB VDDP
PQ27
1
1
6 9 DL_1.1V 4 2
PGOOD LGATE
PGND
680P_0603_50V7K
PC75 F = 314kHz
GND
PC77
4.7U_0603_6.3V6K
2
2
PC76
RT8209BGQW_WQFN14_3P5X3P5 4.7U_0805_10V6K Total Capacitor = 550 uF
3
2
1
PR108
ESR = 8.5m Ohm
4.7K_0402_1%
C C
1 2
1
PR109
10K_0402_1%
2
PL16
HCB2012KF-121T50_0805
NB_CORE_B+ 2 1 B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
1
PC93
PC95
5
2
AON7408L_DFN8-5
PQ39
PR165
255K_0402_1% 4
1 2
PR123 PR120
0_0402_5% 2.2_0603_5%
B B
1 2 1 2
3
2
1
31,34 VLDT_EN
1
PL15
15
14
PC90
1
PC125 PU14 2.2UH_FMJ-0630T-2R2 HF_8A_20%

@.1U_0402_16V7K BST_NB_CORE1 2 1 2
EN/DEM
BOOT
NC
+NB_COREP
2
2 13 DH_NB_CORE 0.1U_0603_25V7K
TON UGATE
4.7_1206_5%
PR142 3 12 LX_NB_CORE
VOUT PHASE
5
PR161
100_0603_1% 1 Ipeak = 7.6A
220U_D2_4VM
AON7702L_DFN8-5
+5V_ALW 1 2 4 11 1 2 +5V_ALW
VDD CS
PC94
PR122 +
2
5 10 13.7K_0402_1% Imax = 5.32A
FB VDDP
PQ40
1
1
6 9 DL_NB_CORE 4 2
PGOOD LGATE
PGND
680P_0603_50V7K
PC89 F = 315kHz
GND
PC85
4.7U_0603_6.3V6K
2
2
PC124
RT8209BGQW_WQFN14_3P5X3P5 4.7U_0805_10V6K Total Capacitor = 550 uF
7
3
2
1
PR166
ESR = 5.63m Ohm
2.7K_0402_1%
1 2
1
PR119
10K_0402_1%
A A
2

+1.1VALWP/+NB_COREP
Size
Document Number Rev
5 4 3 2 1
5 4 3 2 1
PL10
HCB2012KF-121T50_0805
1.5V_B+ 2 1 B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1U_0603_25V6K
D D
1
47U_25V_M
PC78
PC79
@ PC57
1
5
6
7
8
PC128
+
2
PQ28
AO4466_SO8
2
PR110
255K_0402_1% 4
1 2
PR111 PR112
0_0402_5% 2.2_0603_5%
1 2 1 2
3
2
1
31,34 SYSON
1
PL11
15
14
PC81
1
PC80 PU8 1.8UH_1164AY-1R8N=P3_9.5A_30%
@.1U_0402_16V7K BST_1.5VP 1 2 1 2
EN/DEM
BOOT
NC
+1.5VP
2
2 13 DH_1.5VP 0.1U_0603_25V7K
TON UGATE
4.7_1206_5%
PR114 3 12 LX_1.5VP
VOUT PHASE
5
6
7
8
PR113
100_0603_1% 1
220U_6.3V_M
+5V_ALW 1 2 4 11 1 2 +5V_ALW PQ29
VDD CS
PC82
PR115 AO4712_SO8 +
Ipeak = 8A
2
5 10 15.4K_0402_1%
FB VDDP
1
2
680P_0603_50V7K
6 9 DL_1.5VP 4 Imax = 5.6A
PGOOD LGATE
PGND
PC84
PC83
GND
4.7U_0603_6.3V6K
2
1
RT8209BGQW_WQFN14_3P5X3P5 PC86 F = 313kHz
3
2
1
C 4.7U_0805_10V6K C
2
PR116
10K_0402_1% ESR = 5.67m Ohm
1 2
1 PR117
10K_0402_1%
2
B B
PU9
APL5508-25DC-TRL_SOT89-3
PJ11
+3VS
1 2 2 3 +2.5VSP
1 2 IN OUT
@ JUMP_43X39
GND
1
PC87 1 PC88
1U_0603_10V6K 4.7U_0805_6.3V6K
2
A A

1.5VP/2.5VSP
Size
Document Number Rev
5 4 3 2 1
5 4 3 2 1
+1.5V
D D
1
PJ13
1
@ JUMP_43X79
+1.5V
2
2
PU10
1
1 6 +5V_ALW
VIN VCNTL
4.7U_0805_6.3V6K
PJ14
1
2 5 @ JUMP_43X79
GND NC
2
3 VREF NC 7
1
PC91
PU12
2
PR118 4 8 PC92 1 6 +3V_ALW
2
1K_0402_1% VOUT NC 1U_0603_10V6K VIN VCNTL
2
9 2 5
2
TP GND NC
1
PC99
1
G2992F1U_SO8 4.7U_0805_6.3V6K 3 7 PC100
PR125 VREF NC 1U_0603_6.3V6M
2
PR121 1K_0402_1% 4 8
VOUT NC
0.1U_0402_10V7K
+0.75VSP
1
1
300K_0402_1% D
9
2
PR124 TP
2
34 SUSP G 1K_0402_1% G2992F1U_SO8
1
S
3
1
.1U_0402_16V7K
PC98 PR126 +0.9VP
2
1
D
PC97
PC101
PC96 10U_0805_6.3V6M 0_0402_5% PR127
2
0.22U_0402_10V4Z PQ30 1 2 2 1.5K_0402_1%
2
34 VR_ON#
1
G
2
1
C PC103 C
S
2
SSM3K7002FU_SC70-3 @ PC102 10U_0805_6.3V6M
2
.1U_0402_16V7K PQ31
2
SSM3K7002FU_SC70-3
PR178
200K_0402_1%
1 2
SUSP# 26,28,31,34,37
B B
2
PR179
316K_0402_1% PC138
0.22U_0402_10V4Z
2
PR180
402K_0402_1% PU11
1
+1.8VSP 2 1 1 10
FB EN/SYNC
PC139 2 9 PL17
.1U_0402_16V7K GND GND 2.2UH_SILM320A-2R2_1.6A_30%
PJ16 1 2 3 8 1 2 +1.8VSP
SW SW
Ipeak = 1.3A
+5V_ALW 1 1 2 2 4 IN IN 7
1
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_25V6
JUMP_43X79
1 2 5
BS POK
6 Imax = 0.91A
1
B340A_SMA2
PR181 PR182
1
@ 1
PC140
PC141
PC142
@ PD15
PC144
PC145
0_0402_5% 11 4.7_1206_5%
TP
2
MP2121DQ-LF-Z_QFN10_3X3
2
2
2
PC143
680P_0603_50V7K
2
ESR = 2.5m Ohm
A A

0.75VSP/0.9VP/1.8VSP
Size
Document Number Rev
5 4 3 2 1
A B C D E
PL12
CPU_B+ HCB2012KF-121T50_0805
PC104 2 1 B+
33P_0402_50V8J
10U_1206_25V6M
47U_25V_M
47U_25V_M
2 1 1 1
5
6
7
8
PC107
@ PC123
+ +
1
PC106
2 1 2 1
PR128 PC105 2 2
2
44.2K_0402_1% 1000P_0402_50V7K UGATE_NB 4 PQ32
PR129 AO4466_SO8
1 2_0603_5% 1
+5VS 1 2 PC108 PL13

1000P_0402_50V7K 4.7UH_SIQB74B-4R7PF_4A_20%
3
2
1
2 1 PHASE_NB 1 2 +VDDNBP
PR131
5
6
7
8
1
PC109 PR130 2.2_0603_1%
0.1U_0603_16V7K 22K_0402_1% BOOT_NB 1 2 1 2 PR132
2 1 4.7_1206_5% 1
2
@ PR133 PC110
10_0402_5% 0.22U_0603_10V7K PQ33 + PC111
1 2
1 2 +VDDNBP LGATE_NB 4 AO4712_SO8 220U_D2_4VM
CPU_B+ 1 2 PR135 PC112
0_0402_5% 680P_0603_50V7K 2
PR134 2 1
2
CPU_VDDNB_RUN_FB_H 7
2_0603_5% PR139
3
2
1
+5VS +3VS 0_0402_5%
2 1
PR136
1
PC113 5.49K_0402_1% CPU_B+
0.1U_0603_25V7K 2 1 PHASE_NB
1
2
PR137 @ PR138 LGATE_NB
10U_1206_25V6M
10U_1206_25V6M
0_0402_5% 105K_0402_1%
TPCA8030-H_SOP-ADV8-5
PHASE_NB
PQ34
2
2
1
1
PC114
PC115
UGATE_NB
@ PR141
PR140 10K_0402_1%
2
105K_0402_1% UGATE0 4
1
48
47
46
45
44
43
42
41
40
39
38
37
2
@ PR143 PU13
2 105K_0402_1% PHASE0 PL14 2
FSET_NB
VSEN_NB
UGATE_NB
VIN
VCC
COMP_NB
PGND_NB
LGATE_NB
PHASE_NB
FB_NB
RTN_NB
OCSET_NB
PR145 0.36UH_PCMC104T-R36MN1R17_30A_20%
3
2
1
2.2_0603_1%
2
1 36 BOOT_NB BOOT0 1 2 1 2 1 4
31,34 VGATE OFS/VFIXEN BOOT_NB +CPU_CORE_0
1 2
7,20 H_PWRGD @ PR146 100K_0402_5% 2 35 BOOT0 PC116 2 3
PGOOD BOOT0
5
1 2 0.22U_0603_10V7K
TPCA8028-H_SOP-ADVANCE8-5
1
20 H_PWRGD_L PR144 100K_0402_5% ISL6265_PWROK 3 34 UGATE0
PWROK UGATE0
2
PQ35
PR148
7 CPU_SVD 2 1 4 33 PHASE0 4.7_1206_5% PR149
7 CPU_SVC PR147 SVD PHASE0 12.7K_0402_1%
0_0402_5%2 1 5 32 4
1 2
31,34 VR_ON PR150 SVC PGND0 +5VS
1
PR151 PR152 0_0402_5% 6 31 LGATE0 PC117 PC118
21.5K_0402_1% 95.3K_0402_1% ENABLE ISL6265AHRTZ-T_TQFN48_6X6 LGATE0 680P_0603_50V7K 2 1
2 1 2 1 7 30
3
2
1
2
RBIAS PVCC 0.1U_0603_16V7K
8 OCSET LGATE1 29
1
PC119 2 1
9 28 1U_0603_16V6K LGATE0
VDIFF0 PGND1 PR153
ISN0
ISP0
10 27 4.53K_0402_1%
FB0 PHASE1
11 26
COMP0 UGATE1
12 25
VW0 BOOT1
COMP1
VDIFF1
VSEN0
VSEN1
2 VSEN1
RTN0
RTN1
ISN0
ISN1
ISP0
VW1
ISP1
FB1
TP
PR154
+CPU_CORE_0 2 1
13
14
15
16
17
18
19
20
21
22
23
24
49
10_0402_5% PR155
3 0_0402_5% ISP0 3
VSEN1
ISN0
7 CPU_VDD0_RUN_FB_H PR156
1
ISN0
ISP0
2 1 VSEN0
0_0402_5%
0_0402_5%
2 1 RTN0
7 CPU_VDD0_RUN_FB_L PR157
2
10_0402_5%
+1.5V 2 1
PR158
@ PR159
1K_0402_5%
1
DIFF_0 VW0
PR160 PC120
255_0402_1% 4700P_0402_25V7K
2 1 2 1 FB_0 2 1 COMP0 2 1
PC121 PC122
180P_0402_50V8J 1000P_0402_50V7K
4 PR162 PR164 4
1K_0402_5% PR163 PC126 6.81K_0402_1%
2 1 2 1 2 1 2 1
54.9K_0402_1% 1200P_0402_50V7K
1
@ PR168
36.5K_0402_1%
+CPU_CORE
2
Custom LA6032P 1.0
A B C D E
V ersion Change L ist ( P. I. R . L ist ) for Pow er Circuit
R equest
P age# T itle D ate Issue D escription Solution D escription
O w ner
2009/11/10 POWER Release
P38 BATTERY CONN / OTP 2009/12/03 POWER PR31 change to 34.8k DVT
P38 BATTERY CONN / OTP 2009/12/03 POWER PR37 change to 22k DVT
P39 CHARGER 2009/12/03 POWER PC24,25,26 size change to 4.7uf 0805 DVT
P43 0.75VSP/0.9VP/1.8VSP 2009/12/03 POWER PR121 change to 300k DVT
P43 0.75VSP/0.9VP/1.8VSP 2009/12/03 POWER PC96 change to 0.22uf DVT
P43 0.75VSP/0.9VP/1.8VSP 2009/12/03 POWER PR125 change to 1k DVT
P43 0.75VSP/0.9VP/1.8VSP 2009/12/03 POWER PR127 change to 1.5k DVT
P44 +CPU_CORE 2009/12/03 POWER Delete PR142 DVT
P44 +CPU_CORE 2009/12/03 POWER PR131, PR145 change to 2.2 ohm DVT
P44 +CPU_CORE 2009/12/03 POWER PR132 change to 4.7_1206_5% DVT
P44 +CPU_CORE 2009/12/03 POWER PC112 change to 680P_0603_50V7K DVT
P39 CHARGER 2010/01/29 POWER Add PC47,68,69,127 10U_1206_25V6M PVT
P41 +1.1VALWP/+NB_COREP 2010/02/03 POWER Add PC70 4.7U_0805_25V6-K PVT
P41 +1.1VALWP/+NB_COREP 2010/02/03 POWER PL9 change to 1.8UH_9.5A_30% PVT
P44 +CPU_CORE 2009/12/03 POWER PL13 change to 4.7UH_4A_20% PVT
P37 CHARGER 2009/02/08 POWER Move PR18,PR19 to connect PBJ1 PVT2
Security Classification Compal Secret Data

Title
Issued Date 2009/10/02 Deciphered Date 2010/10/02
Power PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA6032P 1.0
5 4 3 2 1
EVT to DVT Version change list (P.I.R. List) Page 1 of 2
Item Reason for change PG# Modify List Date Phase

1 Update JSATA1, JHDMI1 and JREAD1 footprint ME request 2009/12 EVT->DVT
2 Update DDR_CS0_DIMMB#, DDR_CS1_DIMMB# net P06 Net contact error on DIMMB 2009/12 EVT->DVT
3 Update DDR_CKE0_DIMMA, DDR_CKE1_DIMMA net P06 Net contact error on DIMMA 2009/12 EVT->DVT
4 R41~R44 SMT-->@ P07 Fine tune HDT debug pull high R 2009/12 EVT->DVT
D 5 Del R46 and add R850~R854 P07 For ESD request 2009/12 EVT->DVT D
6 Add RS15 RS16 for NBGFX_CLK,NBGFX_CLK# P12 For internal clock gen 2009/12 EVT->DVT
7 Fine tune RS880M clock P12 For internal clock gen 2009/12 EVT->DVT
8 Del external clock gen P16 For internal clock gen 2009/12 EVT->DVT
9 Fine tune pin define JP4 Pin1 Pin2 Pin8-->GND P17 Add more GND pin 2009/12 EVT->DVT
10 Add R855 R856 for HDMI_SDATA,HDMI_SCLK pull high R P19 Solve HDMI can not detect 2009/12 EVT->DVT
11 U6 pin5 +5VL-->+5VS and HDMI Dual NMOSx2(Q6 Q7)->Single NMOS (Q6) P19 Cost down plan 2009/12 EVT->DVT
12 Add RS1~RS14 near SB820M and TP34 TP35 P20 For internal clock gen 2009/12 EVT->DVT
13 C640 @-->22P on CLK_PCI_EC P20 EMI request 2009/12 EVT->DVT
14 C705 C705 @-->SMT on Y6 P20 2009/12 EVT->DVT
15 R152 R153 R154 pull +3VALW-->pull GND P21 Follow AMD check list 1.03 2009/12 EVT->DVT
16 Add device clock request pin on SB820M P21 For internal clock gen 2009/12 EVT->DVT
17 C632 @-->33P on AZ_BITCLK_HD P21 EMI request 2009/12 EVT->DVT
18 Add WLAN_PWR_EN# and WWAN_PWR_EN# net on SB820M P22 Power saving request 2009/12 EVT->DVT
19 U47 +3VL-->+3VALW and Y3 R164 C246 C247 SMT->@ P22 25MHz by default 2009/12 EVT->DVT
20 Reaserved R859 C707 on CLK net P22 EMI request 2009/12 EVT->DVT
21 Fine tune SB820M strap pin P24 For internal clock gen 2009/12 EVT->DVT
22 Add C706 0.1u on CLK_PCI_EC P24 EMI request 2009/12 EVT->DVT
C C
23 Del R193 and Add R858 PH on USB_OC#2 P25 Solve the USB hang up issue 2009/12 EVT->DVT
24 Reserved RM5 RM6 CM17 QM1 RM9 for +3V_WWAN power saving P26 Power saving request 2009/12 EVT->DVT
25 Reserved RM7 RM8 CM18 QM2 RM10 for +3V_WLAN power saving P26 Power saving request 2009/12 EVT->DVT
26 Reserved CM19 QM3 RM11 for +1.5V_WLAN power saving P26 Power saving request 2009/12 EVT->DVT
27 RL21 pin2 +3V_LAN-->GND P27 LAN vender request 2009/12 EVT->DVT
28 Del RA4 RA5 P28 Fine tune Audio HP out voltage 2009/12 EVT->DVT
29 Reserved RA27 CA26 on AZ_RST_HD# P28 ESD request 2009/12 EVT->DVT
30 Add Q37 R860 R861 and PD# net P28 Solve Audio PD# control issue 2009/12 EVT->DVT
31 Fine tune JP5 pin define P29 Solve the USB hnag up issue 2009/12 EVT->DVT
32 Fine tune SPK_L1,SPK_L2,SPK_R1 and SPK_R2 for SPK P29 Solve SPK pin issue 2009/12 EVT->DVT
33 Add R857 PH USB_OC#0 net P29 Solve the USB hnag up issue 2009/12 EVT->DVT
34 Add C708 on +5VS P29 ESD request 2009/12 EVT->DVT
35 Fine tune card reader pin define P30 ME use new card reader connector 2009/12 EVT->DVT
36 Add EC_MUTE# on KBC926 (U12) 83pin P31 Solve Audio PD# control issue 2009/12 EVT->DVT
37 Q8 Q9 R258 R259-->@, R790 R791-->SMT P33 Cost down plan 2009/12 EVT->DVT
38 C386 @-->0.1u on ON/OFFBTN# P33 EMI request 2009/12 EVT->DVT
39 C410 0.01u_0402_16V-->0.1u_0603_25V and R267 330k->1M P34 SMT memo 2009/12 EVT->DVT
B 40 SYSON#-->SUSP on Q26 Pin2 P34 +0.75VS discharge control pin 2009/12 EVT->DVT B
41 RA26 0ohm-->Bead (SM010017710) on INT_MIC_CLK P28 EMI request 2009/12/18 EVT->DVT

42 C632 @-->33P on AZ_BITCLK_HD P21 EMI request 2009/12/18 EVT->DVT
43 R788 @-->100ohm and C634 @-->100P on SPI_CLK P32 RF request 2009/12/18 EVT->DVT
44 R789 @-->100ohm and C635 @-->100P on AZ_BITCLK_HD P28 RF request 2009/12/18 EVT->DVT
45 Add CA63 on INT_MIC_CLK_R P28 RF request 2009/12/18 EVT->DVT
46 RA1 0ohm-->Bead on Audio power P28 RF request 2009/12/18 EVT->DVT
47 Add CM20 1000P on +3V_WWAN P26 RF request 2009/12/18 EVT->DVT
49 Add C709 on 27M_SEL P16 RF request (EXT only) 2009/12/19 EVT->DVT
49 Fine tune R133 R value 11.8K-->8.2K P21 Fine tune USB signal 2009/12/22 EVT->DVT
50 <BOM>RA22 RA25 4.7K-->2.2K and CA16 10u-->@ P28 Audio vender request 2009/12/22 EVT->DVT
51 Add BT_PWR# net contact to JWLAN1 pin5 P26 Follow common design 2009/12/23 EVT->DVT
52 Del R161 and SLP_CHG on SB P22 Follow common design 2009/12/23 EVT->DVT
53 Add SLP_CHG on pin115 and add R862 P31 Follow common design 2009/12/23 EVT->DVT
54 Add UA2 CA67 CA68 CA69 P28 Audio power reserved 2009/12/23 EVT->DVT
55 Add F2 for card reader proetct P30 H/W request 2009/12/24 EVT->DVT
56 Reserved RA28 CA70 P28 Reserved for fin tune aduio power control 2009/12/24 EVT->DVT
57 Add R863 PH on CIR_EN# P21 Follow common design 2009/12/24 EVT->DVT
A A
58 Add R864 on LID_SW# P33 Reserved for ESD protect 2009/12/24 EVT->DVT
59 Modify TP26 TP27-->EVENT#_A and EVENT#_B P09 P10 Solve layout test point issue 2009/12/25 EVT->DVT
60 C497 SMT-->@ P08 Fine tune CPU_CORE cap 2009/12/25 EVT->DVT

EE change list-1
Custom
5 4 3 2 1
5 4 3 2 1
DVT to PVT Version change list (P.I.R. List) Page 2 of 2
Item Reason for change PG# Modify List Date Phase

1 Add D17 and Q38 for BT power control P26 Follow common design 2010/1/20 DVT->PVT
2 Change net name SLP_CHG-->SLP_CHG# P25 P31 Follow net rule 2010/1/20 DVT->PVT
3 Need to fine tune R783 and R784 P18 VB function 2010/1/20 DVT->PVT
4 <BOM> SB use 2MB SPI ROM SA00002TO00 P22 Non share ROM 2010/1/20 DVT->PVT
D 5 <BOM> Update LAN P/N for LAN VB P/N P27 Vender update P/N 2010/1/20 DVT->PVT D
6 <BOM> EC SPI use 256KB SPI ROM SA00003GK00 P32 Non share ROM 2010/1/20 DVT->PVT
7 BT part SMT-->@ P29 IUR no BT device 2010/1/20 DVT->PVT
8 Update JREAD1 footprint (Same as EVT)t P30 ME request 2010/1/20 DVT->PVT
9 Update JSATA1 footprint TAIWI_EU114-117CRL-TW_11P-T P25 ME request 2010/1/20 DVT->PVT
10 Update JHDD1 pin4 +5VS-->GND P25 HW request 2010/1/20 DVT->PVT
11 Del DC to DC +NB_CORE part P34 HW request 2010/1/20 DVT->PVT
12 Change USB port10 to USB port5 on WWAN P21 Follow common design 2010/1/20 DVT->PVT
13 Add R865 R866 for SLP_CHGX_M3/M4 on SB P21 Follow common design 2010/1/20 DVT->PVT
14 Add R867 R868 for SLP_CHGM3/M4 on EC P31 Follow common design 2010/1/21 DVT->PVT
15 UA2 pin5 +PVDD1--->+AVDD P28 Reserved for Audio analog power 2010/1/21 DVT->PVT
16 <BOM> U48 SA000008G00-->SA00003DR00 (Same as intel) P29 HW request 2010/1/21 DVT->PVT
17 Del R164 Y3 C246 C247 and add TP36 TP37 P22 HW request 2010/1/22 DVT->PVT
18 JLVDS1 pin24 +LCD_INV-->NG P18 Follow common design 2010/1/22 DVT->PVT
19 U9 pin1 +5VALW-->+5V_ALW for USB charge P25 Follow common design 2010/1/22 DVT->PVT
20 Add C900~C908,R900~R906 Q40 Q41 U49 U50 for power save P34 Follow common design 2010/1/22 DVT->PVT
21 Update JTP1 footprint--> E-T_6916-Q06N-00R_6P P33 ME request 2010/1/25 DVT->PVT
22 Update USB20_P10-->USB20_P5 ,USB20_N10-->USB20_N5 P21 P26 Follow common design 2010/1/25 DVT->PVT
C C
23 Update JHDMI1footprint-->SUYIN_100042GR019M23BZR_19P-T P19 ME request 2010/1/25 DVT->PVT
24 R900 pin 1 and R904 pin1 +B-->+VSB P34 HW request 2010/1/27 DVT->PVT
25 Add J2 J3 for +3V_ALW and +5V_ALW P34 HW request 2010/1/27 DVT->PVT
26 R808 pin 1,R809 pin2 +3VALW-->+3V_ALW and +5VALW-->+5V_ALW P33 HW request 2010/1/27 DVT->PVT
27 Add R907 for USB_EN# PH P29 HW request 2010/1/27 DVT->PVT
28 Del R808 R809 R811 R810 R258 Q8 R259 Q9 P33 HW request 2010/1/27 DVT->PVT
29 R238 pin1 +3VALW-->+3V_ALW P31 HW request 2010/1/29 DVT->PVT
30 JTP1 pin1 +3VALW-->+3V_ALW P33 Follow common design 2010/1/29 DVT->PVT
31 Del R246 P32 HW request 2010/1/29 DVT->PVT
32 Add LPC_FRAME#, LPC_AD, LPC_AD1,LPC_AD2,LPC_AD3 JWAN1 P26 HW request 2010/1/29 DVT->PVT
33 Update JPB1 footprint P-TWO_161011-04021_4P-T P33 ME request 2010/1/29 DVT->PVT
34 Add JHDD2 ACES_87036-1001-CP_10P P25 HW request 2010/1/29 DVT->PVT
35 Fine tune JP4 pin define for EMI request P17 EMI request 2010/1/29 DVT->PVT
36 <BOM> Update UA1 P/N for Audio VB version P28 Vender update P/N 2010/1/29 DVT->PVT
37 Update JP5 pin define and 20pin-->22pin P29 HW request 2010/1/30 DVT->PVT
38 <BOM> R133 8.2K-->11.8K same as EVT P21 HW request 2010/1/31 DVT->PVT
39 Add C909 C910 P17 EMI request 2010/1/31 DVT->PVT
B 40 Add D18 and R908 on RTC circuit P20 Follow common design 2010/1/31 DVT->PVT B
41 JHDD1 10pin-->12pin P29 Add more power and GND pin on HDD conn 2010/1/31 DVT->PVT
42 Add R909 R910 for ADAPTOR_SEL P31 Follow common design 2010/1/31 DVT->PVT
43 Add L41 L42 L43 C911 C912 C913 for EMI request P12 EMI request 2010/2/2 DVT->PVT
44 C240 C244 22P to 18P P20 Solve RTC fial issue 2010/2/2 DVT->PVT
45
46
47
49
49
50
51
52
53
54
55
56
57
A A
58
59
60

EE change list-2
Custom
5 4 3 2 1
www.s-manuals.com

Compal La-6032p R1.0 Schematics

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Compal La-6032p R1.0 Schematics

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Thin & Light 2

NDU01/NDU11 LA-6032P REV 1.0 Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

Thermal Sensor Clock Generator

HDMI Conn. RTL8105E RJ45

BT conn Int. Camera

HD Audio 3.3V 24.576MHz/48Mhz

DESIGN CURRENT 0.1A +3VL

N-CHANNEL DESIGN CURRENT 2A +5VS

DESIGN CURRENT 1.5A +1.8VS

N-CHANNEL DESIGN CURRENT 4A +3VS

P-CHANNEL DESIGN CURRENT 1.0A +LCD_VDD

DESIGN CURRENT 300mA +2.5VS

DESIGN CURRENT 0.3A +1.1VALW

N-CHANNEL DESIGN CURRENT 6.5A +1.1VS

N-CHANNEL DESIGN CURRENT 7.6A +NB_CORE

N-CHANNEL DESIGN CURRENT 1A +1.5VS

LDO DESIGN CURRENT 0.5A +0.75VS

LDO DESIGN CURRENT 1.5A +0.9V

Security Classification Compal Secret Data Compal Electronics, Inc.

Symbol Note : For 11.6 and 13.3 DAZ

SB SM Bus1 Address SB SM Bus2 Address

Power Device HEX Address Power Device HEX Address

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR III: CHANNEL B

DDR III: CHANNEL A

10 MEM_MB_RST# L32 MB_RESET_L 9 MEM_MA_RST# L27 MA_RESET_L

Security Classification Compal Secret Data Compal Electronics, Inc.

L R8 Close to CPU within 0.6"

1 R22 2 CPU_TEST9_ANALOGIN G8 AG8 CPU_TEST23_TSTUPD R23 1 2 300_0402_5% @

H_PWRGD CPU_TEST14_BP0 BP1 CPU_TEST28_H_PLLCHRZ_P T10 PAD @ CPU_TEST22_SCANSHIFTEN R27 1 1K_0402_5%

12,20 LDT_STOP# M_VREF

@ R35 R36 JP1

VDDR(+0.9V) decoupling. VDD(+CPU_CORE_0) decoupling.

C50 C51 C52 C53 C54 C55 C56

CPU BOT site AMD CPU S1G2 PWR & GND

+VREF_DQ +1.5V +1.5V

0.1U_0402_16V4Z Security Classification Compal Secret Data Compal Electronics, Inc.

+VREF_DQ +1.5V +1.5V

Security Classification Compal Secret Data Compal Electronics, Inc.

PCIE I/F GFX

18 LCD_EDID_CLK LCD_EDID_DATA I2C_CLK HPD

CPU_LDT_REQ# Pull +1.8VS on page 20 CRT_R_R L41 1 2 NBQ100505T-800Y-N_2P

1 AD12 AE18 +MEM_VREF1 2.2U_0603_6.3V4Z

MEM_A0 DQL2 MEM_DQ5

+MEM_VREF1 A14 DQU7

L10 NC/ZQ1 VSSQ D9

RS880 DFT_GPIO5 mux at CRT_VSYNC pull High to 3K DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb

These pin straps are used to configure PCI-E GPP mode.

Selects Loading of STRAPS from EPROM

RX881: Enables the Test Debug Bus using PCIE bus

12,17 CRT_HSYNC 2 1 +3VS 1. Disable (RS880)

Use SB820M internal clock gen

Security Classification Compal Secret Data Compal Electronics, Inc.

CRT+RJ45 FFC conn

1/28 Fine tune JP4 pin define

LCD/PANEL BD. Conn.

Security Classification Compal Secret Data Compal Electronics, Inc.

+3VS +3VS +HDMI_5V_OUT

R84 R85 R856 R855

C524 1 2 150P_0402_50V8J U7A

PCI EXPRESS INTERFACES