You are on page 1of 100

A B C D E

1 1

Compal Confidential
2
A350 2

UMA M/B Schematic Document


AMD Renoir Processor with DDR4 2DIMM

3 2020-01-09 3

LA-J751P
R E V :1 . 0

4 4

Security Classification
2019/07/26
Compal Secret Data
2020/05/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 1 of 100
A B C D E
5 4 3 2 1

Block Diagram

D
LCD PANEL DDR_CHA DDR4-SO-DIMM D

LVDS Converter eDP DDR_CHB DDR4-SO-DIMM


LVDS conn AMD APU
RTD2136N
Renoir FP6
BGA 1140
HDMI OUT
HDMI Out 25W USB3.1 Gen2 USB3.1 Gen2 USB2.0
Connector 35mm x 25mm
Side port x 1 Rear port x1 Rear port x2 Touch Screen WebCAM

C C
HDA
USB2.0 USB2.0 USB2.0 x2
USB2.0 USB2.0

USB2.0
HP X8
Audio
Combo Jack Audio Codec
MIC USB3.1 x2
Realtek PCIE x 6
DMIC ALC233 SATA x 2
DMIC P.5~10 USB2.0
PCIEx4
Analog SATA3.0 SATA2.0
LPC
SPI Card Reader
Amplifier PCIEx1 Realtek
SATA SATA
B Anpec APA2621 2.5" HDD ODD RTS5140 B

SPI LAN
Realtek PCIE1x1 USB2.0
RTL8111G
SPK Conn.
SPI ROM
3W x2 W25Q128FVSIQ
(16MB) 3 in 1 Slot
(1.8V) EC M.2 Slot RJ45 M.2 Slot
NCT6685D
PCIE SSD Conn
WLAN/BT
SPI TPM/TCM
Nuvoton NPCT750LAAYX
/Infineon SLB9670VQ2.0FW7.63
EC FW /ST ST33HTPH2E32AHB4
W25Q80DVSSIG (Option) P.36
A
(256KB) A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/12/15 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Black Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 2 of 100
5 4 3 2 1
1 2 3 4 5

Voltage Rails BOM Structure Table USB 2.0 Port Table DDI Port Table
Power Plane Description S0 S3 S4/S5 Item BOM Structure
+DC20V AC or battery power rail for power circuit. N/A N/A N/A
Port External USB Port Port Lane
Modern standby MS@
+RTC_APU_S5 1.5V RTC power ON ON ON* Non Modern standby NON_MS@ 0 eDP to Convertor
0 USB2.0 port(REAR PORT1)
+3V3_DSW 3.3V DSW on power rail ON ON ON* HDT Debug HDT@ USB3.1(REAR PORT) 1 HDMI
1
+3VALW_S5 3.3V always on power rail ON ON ON Wake on Voice WOV@ Camera 2
2
+5VALW_S5 5V always on power rail ON ON ON Non Wake on Voice NONWOV@ Touch Screen 3
3
+12VALW_S5 12V always on power rail ON ON ON TPM TPM@ USB2.0 port(REAR PORT2)
4
+1.8VALW_S5 1.8V always on power rail ON ON ON Infineon TPM Infineon@ USB3.1(SIDE PORT)
A
5 A
+0.75VALW_S5 0.75V always on power rail ON ON ON Nuvton TPM Nuvton@ CARD READER
6
+1.2V_VDDQ_S3 1.2V power rail for DDR4 ON ON OFF ST TPM ST@ NGFF WLAN+BT
7
+2.5V_S3 2.5V power rail for DDR4 ON ON OFF SMART power on SMART@
+0.6VS_VTT_S0 0.6V switched power rail for DDR4 terminator ON OFF OFF LAN 8111H 8111H@
+5VS_S0 5V switched power rail ON OFF OFF LAN 8111G 8111G@
+3VS_S0 3.3V switched power rail ON OFF OFF EMI parts EMI@
OFF OFF USB 3.0 Port Table GPP Port Table
+12VS_S0 12V switched power rail ON EMI reserve parts @EMI@
+1.8VS_S0 1.8V switched power rail ON OFF OFF AMP EMI parts AMP_EMI@ Port Port Lane
+0.75VS_S0 0.75V switched power rail ON OFF OFF AMP EMI reserve parts @AMP_EMI@ 0 0 0
+APU_VDDCORE Core voltage for processor core current ON OFF OFF ESD parts ESD@ 1 1 1
USB3.1(REAR PORT)
+APU_VDDSOC Voltage for processor Northbridge (NB) current ON OFF OFF SSD1
ESD reserve parts @ESD@ 4 2 2
+1.5VS_CODEC_S0 1.5V for Audio Codec AVDD2 ON OFF OFF RF parts RF@ 5 3 3
USB3.1(SIDE PORT)
RF reserve parts @RF@ 4 4 NGFF WLAN+BT
LPC Debug LPC@ 5 5 LAN
ME parts CONN@ 6
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. R3@ 7
CPU select R5@ 8
R7@ 9
10
11
B B

EC SM Bus0 Address EC SM Bus2 Address PCH SM Bus Address

Device Address HEX Device Address HEX Device Address HEX

Converter
APU 1001-1000xb 98H RTD-2136N 1001-0100xb 94H DDR(JDIMM1) WRITE:0xA0 READ: 0xA1

LCD Backlight 0110-0010xb 62H

C C

CPU P/N
UC1 UC1 UC1

S IC RYZEN3 100-000000085-40 2.4G QSAPUS S IC RYZEN5 100-000000084-40 2.1G QS S S IC RYZEN7 100-000000083-40 1.8G QS S
SA0000D3V50 SA0000D4A50 SA0000D4950
R3@ R5@ R7@

PCB PN
ZZZ

PCB 2WR LA-J751P REV0 M 2 S


DA60029D000

SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

Full ON HIGH HIGH HIGH HIGH ON ON ON ON X4E


S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW ZZZ X4E@

S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF


D D

S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF SMT EMC 8111H EE AJ751 FOC60
X4EALE38L01

S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 3 of 100
1 2 3 4 5
5 4 3 2 1

+3V3_DSW

+3V3_DSW
APL3526QB 4
1d ON/OFF# ON/OFF#_R
+3VALW
+3VLP
D

1 LV6576D LDO3 1a PSIN#


D

EN2
GPEN17
3 EC_RSMRST#
RSMRST_L
+DC20V 3VCC/3VSB
+3V3_DSW 4a PBTN_OUT#
EC_5V_EN 1c GPEN03 PWR_BTN_L
PJP1 EN1 GPIO94 5a SLP_S3_S0A3#
1d +5VALW 1e SLP_S3# SLP_S3_L
3V5V_PG GPIO53
PG 5 PM_SLP_S5#
SLP_S5# SLP_S5_L
+5VALW_S5 GPIO52
GPIO55 EC KBRST#
8 KB_RST#
KBRST_L
LV5768
+1.8VALW EN
3V5V_PG
2b
NCT6685D
2 AMD_PSON#
FP6
11 SYS_PWRGD_EC
PWROK0 PWR_GOOD

GPIO33
GPIO50
EC_VCCP_EN
C LV8237 EN PWROK C

+0.75VALW_S5 GPIO56
+5VALW_S5 VCCP_PG
PGOOD
LV9509 2a
+2.5V_S3 10
SYSON
6
VGATE
6 SYSON
LV8231 EN 9
+1.2V_VDDQ_S3 LV3662
6a EN PGOOD
VR_ON
+0.6VS_VTT_S0 APU_PWRGD
PWROK
7a SUSP# 7 12
+DC20V +APU_VDDCORE 9a
+APU_VDDSOC
B B
LV8296
+12VS_S0 SUSP# 7
EN
7a
7 APL3526QB
SUSP# 7a
+3V3_DSW GATE
RT9740 SUSP# 7 +1.8VALW_S5
VIN1 +3VS_S0
+5VALW_S5 VIN +1.8VS_S0
7a
VIN2 +5VS_S0
TPS2296 7a
GATE
+0.75VALW

VIN +0.75VS_S0

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2012/09/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Map
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 4 of 100
5 4 3 2 1
5 4 3 2 1

Platform Power Sequence


PCB NAME:
REVISION: Power Sequence_AMD Renoir FP6
DATE:
D D

G3->S5->S0

+RTC_APU_S5

+3VL_S5
G3
+3V3_DSW

GROUP A EC_5V_EN

+3VALW_S5 / +5VALW_S5

3V5V_PG

EC_1.8V_EN(From EC)
C C

+1.8VALW_S5 / +0.75VALW_S5

EC_RSMRST# (RSMRST_L)

PBTN_OUT# (PWR_BTN_L)

PM_SLP_S5# (SLP_S5_L)

PM_SLP_S3# (SLP_S3_L)

RTC_CLK (RTCCLK)

SYSON(From EC)

+2.5V_S3 / 1.2V_VDDQ_S3

SUSP#(From EC)
POWER RAIL WHICH IS RED ARE NOT USED BY APU
B B
DON'T NEED SEQUENCE CONTROL FOR THEM
+5VS_S0 / +3VS_S0 / +1.8VS_S0

+0.6VS_VTT_S0 / +12VS_S0

+0.75VS_S0

VR_ON

+APU_CORE_S0

+APU_CORE_NB_S0

APU_FCH_PWRGD_R (PWR_GOOD)

GPP_CLK[0-3]N/GPP_CLK[0-3]P

APU_PCIE0_RST# (PCIE_RST_L)

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Sequence
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 5 of 100
5 4 3 2 1
5 4 3 2 1

Main Func = CPU

D D

@ UC1A UC1I
@
MEMORY A
[23] DDR_A_MA[13..0]
DDR_A_DQ[63..0] [23] MEMORY B
DDR_A_MA0 [24] DDR_B_MA[13..0]
AK26 MA_ADD0/RSVD
DDR_A_MA1 DDR_A_DQ0 DDR_B_MA0 DDR_B_DQ[63..0] [24]
AG24 MA_ADD1/RSVD MA_DATA0/MAA_DATA8 K27 AM29 MB_ADD0/RSVD
DDR_A_MA2 AG23 MA_ADD2/MAB_CA0 MA_DATA1/MAA_DATA9 L26 DDR_A_DQ1 DDR_B_MA1 AH31 MB_ADD1/RSVD MB_DATA0/MBA_DATA8 C27 DDR_B_DQ0
DDR_A_MA3 AG26 MA_ADD3/MAA_CA4 MA_DATA2/MAA_DATA13 N26 DDR_A_DQ2 DDR_B_MA2 AJ30 MB_ADD2/MBB_CA0 MB_DATA1/MBA_DATA9 A28 DDR_B_DQ1
DDR_A_MA4 AG27 MA_ADD4/MAA_CA5 MA_DATA3/MAA_DATA12 N27 DDR_A_DQ3 DDR_B_MA3 AH29 MB_ADD3/MBA_CA4 MB_DATA2/MBA_DATA13 F29 DDR_B_DQ2
DDR_A_MA5 AF21 MA_ADD5/MAA_CA3 MA_DATA4/MAA_DATA11 G27 DDR_A_DQ4 DDR_B_MA4 AG32 MB_ADD4/MBA_CA5 MB_DATA3/MBA_DATA12 F31 DDR_B_DQ3
DDR_A_MA6 AF22 MA_ADD6/MAA_CA2 MA_DATA5/MAA_DATA10 H27 DDR_A_DQ5 DDR_B_MA5 AG30 MB_ADD5/MBA_CA3 MB_DATA4/MBA_DATA11 B27 DDR_B_DQ4
DDR_A_MA7 AF25 MA_ADD7/RSVD MA_DATA6/MAA_DATA15 M27 DDR_A_DQ6 DDR_B_MA6 AG31 MB_ADD6/MBA_CA2 MB_DATA5/MBA_DATA10 D27 DDR_B_DQ5
DDR_A_MA8 AF24 MA_ADD8/RSVD MA_DATA7/MAA_DATA14 N24 DDR_A_DQ7 DDR_B_MA7 AF30 MB_ADD7/RSVD MB_DATA6/MBA_DATA15 E32 DDR_B_DQ6
DDR_A_MA9 AE21 MA_ADD9/RSVD
DDR_B_MA8 AG29 MB_ADD8/RSVD MB_DATA7/MBA_DATA14 F30 DDR_B_DQ7
DDR_A_MA10 AL21 MA_ADD10/MAB_CS_L1 MA_DATA8/MAA_DATA0 L23 DDR_A_DQ8 DDR_B_MA9 AF29 MB_ADD9/RSVD
DDR_A_MA11 AF27 MA_ADD11/MAA_CKE1 MA_DATA9/MAA_DATA1 N21 DDR_A_DQ9 DDR_B_MA10 AM30 MB_ADD10/MBB_CS_L1 MB_DATA8/MBA_DATA0 H31 DDR_B_DQ8
DDR_A_MA12 AE23 MA_ADD12/MAA_CKE0 MA_DATA10/MAA_DATA5 T21 DDR_A_DQ10 DDR_B_MA11 AF31 MB_ADD11/MBA_CKE1 MB_DATA9/MBA_DATA1 H30 DDR_B_DQ9
DDR_A_MA13 AM23 MA_ADD13_BANK2/RSVD MA_DATA11/MAA_DATA4 T22 DDR_A_DQ11 DDR_B_MA12 AE32 MB_ADD12/MBA_CKE0 MB_DATA10/MBA_DATA5 K31 DDR_B_DQ10
AM21 MA_WE_L_ADD14/MAB_CKE1 MA_DATA12/MAA_DATA7 M22 DDR_A_DQ12 DDR_B_MA13 AP30 MB_ADD13_BANK2/RSVD MB_DATA11/MBA_DATA4 L30 DDR_B_DQ11
[23] DDR_A_WE# DDR_A_DQ13 DDR_B_DQ12
AL27 MA_CAS_L_ADD15/RSVD MA_DATA13/MAA_DATA6 L24 AP31 MB_WE_L_ADD14/MBB_CKE1 MB_DATA12/MBA_DATA7 G30
[23] DDR_A_CAS# DDR_A_DQ14 [24] DDR_B_WE# DDR_B_DQ13
AL24 MA_RAS_L_ADD16/MAB_CKE0 MA_DATA14/MAA_DATA2 R21 AP29 MB_CAS_L_ADD15/RSVD MB_DATA13/MBA_DATA6 H29
[23] DDR_A_RAS# DDR_A_DQ15 [24] DDR_B_CAS# DDR_B_DQ14
MA_DATA15/MAA_DATA3 R23 AN29 MB_RAS_L_ADD16/MBB_CKE0 MB_DATA14/MBA_DATA2 K30
[24] DDR_B_RAS# K29 DDR_B_DQ15
MB_DATA15/MBA_DATA3

AL22 MA_BANK0/MAB_CS_L0 MA_DATA16/MAA_DATA17 P24 DDR_A_DQ16


[23] DDR_A_BA0 DDR_A_DQ17 DDR_B_DQ16
AK27 MA_BANK1/MAB_CA1 MA_DATA17/MAA_DATA16 R26 AN31 MB_BANK0/MBB_CS_L0 MB_DATA16/MBA_DATA21 N32
[23] DDR_A_BA1 DDR_A_DQ18 [24] DDR_B_BA0 DDR_B_DQ17
MA_DATA18/MAA_DATA21 T27 AM32 MB_BANK1/MBB_CA1 MB_DATA17/MBA_DATA22 N29
DDR_A_BG0 DDR_A_DQ19 [24] DDR_B_BA1 DDR_B_DQ18
AE27 MA_BG0/MAA_CS_L1 MA_DATA19/MAA_DATA20 V27 MB_DATA18/MBA_DATA20 P30
[23] DDR_A_BG0 DDR_A_BG1 AE26 P25 DDR_A_DQ20 DDR_B_BG0 AD29 L32 DDR_B_DQ19
MA_BG1/MAA_CS_L0 MA_DATA20/MAA_DATA19 MB_BG0/MBA_CS_L1 MB_DATA19/MBA_DATA19
[23] DDR_A_BG1 DDR_A_DQ21 [24] DDR_B_BG0 DDR_B_BG1 DDR_B_DQ20
MA_DATA21/MAA_DATA18 P27 AD31 MB_BG1/MBA_CS_L0 MB_DATA20/MBA_DATA17 L31
DDR_A_ACT# DDR_A_DQ22 [24] DDR_B_BG1 DDR_B_DQ21
AD22 MA_ACT_L/RSVD MA_DATA22/MAA_DATA23 V23 MB_DATA21/MBA_DATA16 M30
[23] DDR_A_ACT# DDR_A_DQ23 DDR_B_ACT# DDR_B_DQ22
MA_DATA23/MAA_DATA22 T25 AD30 MB_ACT_L/RSVD MB_DATA22/MBA_DATA18 L29
[23] DDR_A_DM[7..0] DDR_A_DM0 [24] DDR_B_ACT# DDR_B_DQ23
L27 MA_DM0/MAA_DM1 MB_DATA23/MBA_DATA23 N31
DDR_A_DM1 [24] DDR_B_DM[7..0]
N23 MA_DM1/MAA_DM0 MA_DATA24/MAA_DATA30 W22 DDR_A_DQ24 DDR_B_DM0 C30 MB_DM0/MBA_DM1
DDR_A_DM2 R27 MA_DM2/MAA_DM2 MA_DATA25/MAA_DATA31 Y23 DDR_A_DQ25 DDR_B_DM1 H32 MB_DM1/MBA_DM0 MB_DATA24/MBA_DATA30 R30 DDR_B_DQ24
DDR_A_DM3 Y24 MA_DM3/MAA_DM3 MA_DATA26/MAA_DATA26 AC24 DDR_A_DQ26 DDR_B_DM2 M29 MB_DM2/MBA_DM2 MB_DATA25/MBA_DATA31 R32 DDR_B_DQ25
DDR_A_DM4 AP27 MA_DM4/MAB_DM2 MA_DATA27/MAA_DATA27 AC23 DDR_A_DQ27 DDR_B_DM3 T29 MB_DM3/MBA_DM3 MB_DATA26/MBA_DATA26 V30 DDR_B_DQ26
C C
DDR_A_DM5 AW23 MA_DM5/MAB_DM3 MA_DATA28/MAA_DATA28 V21 DDR_A_DQ28 DDR_B_DM4 AU30 MB_DM4/MBB_DM2 MB_DATA27/MBA_DATA27 V32 DDR_B_DQ27
DDR_A_DM6 AT21 MA_DM6/MAB_DM1 MA_DATA29/MAA_DATA29 W21 DDR_A_DQ29 DDR_B_DM5 BD28 MB_DM5/MBB_DM3 MB_DATA28/MBA_DATA28 P29 DDR_B_DQ28
DDR_A_DM7 AV18 MA_DM7/MAB_DM0 MA_DATA30/MAA_DATA24 AA24 DDR_A_DQ30 DDR_B_DM6 BB23 MB_DM6/MBB_DM1 MB_DATA29/MBA_DATA29 P31 DDR_B_DQ29
W24 RSVD_52 MA_DATA31/MAA_DATA25 AA22 DDR_A_DQ31 DDR_B_DM7 BD20 MB_DM7/MBB_DM0 MB_DATA30/MBA_DATA25 U31 DDR_B_DQ30
W31 RSVD_57 MB_DATA31/MBA_DATA24 U29 DDR_B_DQ31
M25 MA_DQS_H0/MAA_DQS_H1 MA_DATA32/MAB_DATA17 AP26 DDR_A_DQ32
[23] DDR_A_DQS0
M24 MA_DQS_L0/MAA_DQS_L1 MA_DATA33/MAB_DATA16 AN24 DDR_A_DQ33 E29 MB_DQS_H0/MBA_DQS_H1 MB_DATA32/MBB_DATA16 AT29 DDR_B_DQ32
[23] DDR_A_DQS0# [24] DDR_B_DQS0
P22 MA_DQS_H1/MAA_DQS_H0 MA_DATA34/MAB_DATA21 AR25 DDR_A_DQ34 D28 MB_DQS_L0/MBA_DQS_L1 MB_DATA33/MBB_DATA17 AU32 DDR_B_DQ33
[23] DDR_A_DQS1 [24] DDR_B_DQS0#
P21 MA_DQS_L1/MAA_DQS_L0 MA_DATA35/MAB_DATA20 AU26 DDR_A_DQ35 J31 MB_DQS_H1/MBA_DQS_H0 MB_DATA34/MBB_DATA21 AW31DDR_B_DQ34
[23] DDR_A_DQS1# [24] DDR_B_DQS1
T24 MA_DQS_H2/MAA_DQS_H2 MA_DATA36/MAB_DATA19 AN25 DDR_A_DQ36 J29 MB_DQS_L1/MBA_DQS_L0 MB_DATA35/MBB_DATA20 AW30DDR_B_DQ35
[23] DDR_A_DQS2 [24] DDR_B_DQS1#
R24 MA_DQS_L2/MAA_DQS_L2 MA_DATA37/MAB_DATA18 AN27 DDR_A_DQ37 N30 MB_DQS_H2/MBA_DQS_H2 MB_DATA36/MBB_DATA19 AR30 DDR_B_DQ36
[23] DDR_A_DQS2# AA21 AR27 DDR_A_DQ38 [24] DDR_B_DQS2 M31 AT31 DDR_B_DQ37
MA_DQS_H3/MAA_DQS_H3 MA_DATA38/MAB_DATA23 MB_DQS_L2/MBA_DQS_L2 MB_DATA37/MBB_DATA18
[23] DDR_A_DQS3 [24] DDR_B_DQS2#
Y21 MA_DQS_L3/MAA_DQS_L3 MA_DATA39/MAB_DATA22 AU27 DDR_A_DQ39 T30 MB_DQS_H3/MBA_DQS_H3 MB_DATA38/MBB_DATA23 AV30 DDR_B_DQ38
[23] DDR_A_DQS3# [24] DDR_B_DQS3
AP23 MA_DQS_H4/MAB_DQS_H2 T31 MB_DQS_L3/MBA_DQS_L3 MB_DATA39/MBB_DATA22 AW29DDR_B_DQ39
[23] DDR_A_DQS4 [24] DDR_B_DQS3#
AP24 MA_DQS_L4/MAB_DQS_L2 MA_DATA40/MAB_DATA30 AV25 DDR_A_DQ40 AU29 MB_DQS_H4/MBB_DQS_H2
[23] DDR_A_DQS4# [24] DDR_B_DQS4
AW22 MA_DQS_H5/MAB_DQS_H3 MA_DATA41/MAB_DATA31 AW25DDR_A_DQ41 AU31 MB_DQS_L4/MBB_DQS_L2 MB_DATA40/MBB_DATA29 AY29 DDR_B_DQ40
[23] DDR_A_DQS5 [24] DDR_B_DQS4#
AV22 MA_DQS_L5/MAB_DQS_L3 MA_DATA42/MAB_DATA26 AV20 DDR_A_DQ42 BA27 MB_DQS_H5/MBB_DQS_H3 MB_DATA41/MBB_DATA28 AY32 DDR_B_DQ41
[23] DDR_A_DQS5# [24] DDR_B_DQS5
AT20 MA_DQS_H6/MAB_DQS_H1 MA_DATA43/MAB_DATA27 AW20DDR_A_DQ43 BB27 MB_DQS_L5/MBB_DQS_L3 MB_DATA42/MBB_DATA24 BC27 DDR_B_DQ42
[23] DDR_A_DQS6 [24] DDR_B_DQS5#
AR20 MA_DQS_L6/MAB_DQS_L1 MA_DATA44/MAB_DATA28 AV27 DDR_A_DQ44 BC23 MB_DQS_H6/MBB_DQS_H1 MB_DATA43/MBB_DATA25 BB26 DDR_B_DQ43
[23] DDR_A_DQS6# [24] DDR_B_DQS6
AR18 MA_DQS_H7/MAB_DQS_H0 MA_DATA45/MAB_DATA29 AW26DDR_A_DQ45 BA23 MB_DQS_L6/MBB_DQS_L1 MB_DATA44/MBB_DATA27 BC25 DDR_B_DQ44
[23] DDR_A_DQS7 [24] DDR_B_DQS6#
AT18 MA_DQS_L7/MAB_DQS_L0 MA_DATA46/MAB_DATA24 AU21 DDR_A_DQ46 BC20 MB_DQS_H7/MBB_DQS_H0 MB_DATA45/MBB_DATA26 BA25 DDR_B_DQ45
[23] DDR_A_DQS7# [24] DDR_B_DQS7
Y26 RSVD_58 MA_DATA47/MAB_DATA25 AW21DDR_A_DQ47 BA20 MB_DQS_L7/MBB_DQS_L0 MB_DATA46/MBB_DATA30 BB30 DDR_B_DQ46
Y27 [24] DDR_B_DQS7# Y32 BA28 DDR_B_DQ47
RSVD_59 RSVD_61 MB_DATA47/MBB_DATA31

MA_DATA48/MAB_DATA11 AT22 DDR_A_DQ48 Y30 RSVD_60

AJ25 MA_CLK_H0/MAA_CKT MA_DATA49/MAB_DATA10 AP21 DDR_A_DQ49 MB_DATA48/MBB_DATA11 BA24 DDR_B_DQ48


[23] DDR_A_CLK0
AJ24 MA_CLK_L0/MAA_CKC MA_DATA50/MAB_DATA14 AN19 DDR_A_DQ50 AJ31 MB_CLK_H0/MBA_CKT MB_DATA49/MBB_DATA10 BC24 DDR_B_DQ49
[23] DDR_A_CLK0# [24] DDR_B_CLK0
AJ22 MA_CLK_H1/MAB_CKT MA_DATA51/MAB_DATA15 AN18 DDR_A_DQ51 AK30 MB_CLK_L0/MBA_CKC MB_DATA50/MBB_DATA14 BC22 DDR_B_DQ50
[23] DDR_A_CLK1 [24] DDR_B_CLK0#
AJ21 MA_CLK_L1/MAB_CKC MA_DATA52/MAB_DATA12 AU23 DDR_A_DQ52 AK32 MB_CLK_H1/MBB_CKT MB_DATA51/MBB_DATA15 BA22 DDR_B_DQ51
[23] DDR_A_CLK1# [24] DDR_B_CLK1
MA_DATA53/MAB_DATA13 AR22 DDR_A_DQ53 AL31 MB_CLK_L1/MBB_CKC MB_DATA52/MBB_DATA12 BB25 DDR_B_DQ52
[24] DDR_B_CLK1#
MA_DATA54/MAB_DATA9 AN20 DDR_A_DQ54 MB_DATA53/MBB_DATA13 BD25 DDR_B_DQ53
MA_DATA55/MAB_DATA8 AP19 DDR_A_DQ55 MB_DATA54/MBB_DATA9 BB22 DDR_B_DQ54
MB_DATA55/MBB_DATA8 BD22 DDR_B_DQ55
MA_DATA56/MAB_DATA6 AT19 DDR_A_DQ56
AL25 MA_CS_L0/MAB_CA2 MA_DATA57/MAB_DATA7 AW18DDR_A_DQ57 MB_DATA56/MBB_DATA4 BA21 DDR_B_DQ56
[23] DDR_A_CS0#
AM26 MA_CS_L1/MAB_CA5 MA_DATA58/MAB_DATA2 AU16 DDR_A_DQ58 AN30 MB_CS_L0/MBB_CA2 MB_DATA57/MBB_DATA5 BC21 DDR_B_DQ57
[23] DDR_A_CS1# [24] DDR_B_CS0#
MA_DATA59/MAB_DATA3 AW16DDR_A_DQ59 AR31 MB_CS_L1/MBB_CA5 MB_DATA58/MBB_DATA2 BC18 DDR_B_DQ58
AW19DDR_A_DQ60 [24] DDR_B_CS1# BB18 DDR_B_DQ59
MA_DATA60/MAB_DATA4 MB_DATA59/MBB_DATA3
B B
MA_DATA61/MAB_DATA5 AU19 DDR_A_DQ61 MB_DATA60/MBB_DATA6 BB20 DDR_B_DQ60
MA_DATA62/MAB_DATA1 AP16 DDR_A_DQ62 MB_DATA61/MBB_DATA7 BB21 DDR_B_DQ61
MA_DATA63/MAB_DATA0 AT16 DDR_A_DQ63 MB_DATA62/MBB_DATA1 BB19 DDR_B_DQ62
AD24 MA_CKE0/MAA_CA1 MB_DATA63/MBB_DATA0 BA18 DDR_B_DQ63
[23] DDR_A_CKE0
AD25 MA_CKE1/MAA_CA0 RSVD_54 W27 AC31 MB_CKE0/MBA_CA1
[23] DDR_A_CKE1 [24] DDR_B_CKE0
RSVD_53 W25 AC29 MB_CKE1/MBA_CA0 RSVD_56 W30
[24] DDR_B_CKE1
RSVD_68 AC26 RSVD_55 W29
RSVD_69 AC27 RSVD_65 AA30
AM24 MA_ODT0/MAB_CA3 RSVD_49 V26 RSVD_67 AB29
[23] DDR_A_ODT0 AM27 V24 AP32 V29
MA_ODT1/MAB_CA4 RSVD_48 MB_ODT0/MBB_CA3 RSVD_50
[23] DDR_A_ODT1 AA27 [24] DDR_B_ODT0 AR29 V31
RSVD_63 MB_ODT1/MBB_CA4 RSVD_51
+1.2V_VDDQ_S3 [24] DDR_B_ODT1
RSVD_62 AA25 RSVD_64 AA29
RSVD_66 AA31
AE24 MA_ALERT_L/TEST31A
[23] DDR_A_ALERT#
MA_PAROUT/RSVD AK24 DDR_A_PAR DDR_A_PAR [23]
AE30 MB_ALERT_L/TEST31B
DDR_A_EVENT# [24] DDR_B_ALERT#
AK23 MA_EVENT_L MB_PAROUT/RSVD AM31 DDR_B_PAR
[23] DDR_A_EVENT# DDR_A_RST# DDR_B_EVENT# DDR_B_PAR [24]
AD27 MA_RESET_L M_DDR4 AN21 AL30 MB_EVENT_L
[23] DDR_A_RST# [24] DDR_B_EVENT# DDR_B_RST#
FP6 REV 0.92 M_LPDDR4 AN22 AC32 MB_RESET_L
[24] DDR_B_RST#
PART 1 OF 13 FP6 REV 0.92
PART 9 OF 13

FP6_BGA1140 FP6_BGA1140

CC186 1 2 100P_0201_50V8J DDR_A_RST#


www.teknisi-indonesia.com
DDR_B_RST# CC97 1 2 100P_0201_50V8J
ESD@
A @ESD@ A

ESD ESD
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP6 DDR4 MEMORY I/F
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 6 of 100
5 4 3 2 1
5 4 3 2 1

Main Func = CPU

@ UC1B
PCIE

D D
G13 P_GFX_RXP0 P_GFX_TXP0 F4
F13 P_GFX_RXN0 P_GFX_TXN0 F2

J14 P_GFX_RXP1 P_GFX_TXP1 F3


H14 P_GFX_RXN1 P_GFX_TXN1 E4
PCIE_ATX_C_DRX_P[0..3]
PCIE_ARX_DTX_P[0..3] PCIE_ATX_C_DRX_P[0..3] [68]
[68] PCIE_ARX_DTX_P[0..3] G15 P_GFX_RXP2 P_GFX_TXP2 E1 Main_SSD
F15 C1 PCIE_ATX_C_DRX_N[0..3]
Main_SSD PCIE_ARX_DTX_N[0..3] P_GFX_RXN2 P_GFX_TXN2 PCIE_ATX_C_DRX_N[0..3] [68]
[68] PCIE_ARX_DTX_N[0..3]
J15 P_GFX_RXP3 P_GFX_TXP3 D5
K15 P_GFX_RXN3 P_GFX_TXN3 E6

H16 P_GFX_RXP4 P_GFX_TXP4 C6


J16 P_GFX_RXN4 P_GFX_TXN4 D6

F18 P_GFX_RXP5 P_GFX_TXP5 B6


G18 P_GFX_RXN5 P_GFX_TXN5 C7

J18 P_GFX_RXP6 P_GFX_TXP6 D8


K18 P_GFX_RXN6 P_GFX_TXN6 B8

H19 P_GFX_RXP7 P_GFX_TXP7 C8


G19 P_GFX_RXN7 P_GFX_TXN7 A8
C C

PCIE_ARX_DTX_P0 G11 P_GPP_RXP0 P_GPP_TXP0 L3 PCIE_ATX_DRX_P0 CC1 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P0


PCIE_ARX_DTX_N0 F11 P_GPP_RXN0 P_GPP_TXN0 L1 PCIE_ATX_DRX_N0 CC2 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N0

PCIE_ARX_DTX_P1 J10 P_GPP_RXP1 P_GPP_TXP1 L4 PCIE_ATX_DRX_P1 CC3 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P1


PCIE_ARX_DTX_N1 H10 P_GPP_RXN1 P_GPP_TXN1 L2 PCIE_ATX_DRX_N1 CC4 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N1

PCIE_ARX_DTX_P2 G8 P_GPP_RXP2/SATA0_RXP P_GPP_TXP2/SATA0_TXP M4


PCIE_ATX_DRX_P2 CC5 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P2
PCIE_ARX_DTX_N2 F8 P_GPP_RXN2/SATA0_RXN P_GPP_TXN2/SATA0_TXNM2
PCIE_ATX_DRX_N2 CC6 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N2

PCIE_ARX_DTX_P3 G6 P_GPP_RXP3/SATA1_RXP P_GPP_TXP3/SATA1_TXP N3


PCIE_ATX_DRX_P3 CC7 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P3
PCIE_ARX_DTX_N3 F7 P_GPP_RXN3/SATA1_RXN P_GPP_TXN3/SATA1_TXNN1
PCIE_ATX_DRX_N3 CC8 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N3

PCIE_ARX_DTX_P4 M9 P_GPP_RXP4 P_GPP_TXP4 T2 PCIE_ATX_DRX_P4 CC9 1 2 0.1U_0201_10V6K


[52] PCIE_ARX_DTX_P4 PCIE_ARX_DTX_N4 PCIE_ATX_DRX_N4 PCIE_ATX_C_DRX_P4 [52]
WLAN M8 P_GPP_RXN4 P_GPP_TXN4 T4 CC10 1 2 0.1U_0201_10V6K PCIE_ATX_C_DRX_N4 [52] WLAN
[52] PCIE_ARX_DTX_N4
PCIE_ARX_DTX_P5 L7 P_GPP_RXP5 P_GPP_TXP5 R1 PCIE_ATX_DRX_P5 CC11 1 2 0.1U_0201_10V6K
[51] PCIE_ARX_DTX_P5 PCIE_ARX_DTX_N5 PCIE_ATX_DRX_N5 PCIE_ATX_C_DRX_P5 [51]
LAN L6 P_GPP_RXN5 P_GPP_TXN5 R3 CC12 1 2 0.1U_0201_10V6K PCIE_ATX_C_DRX_N5 [51] LAN
[51] PCIE_ARX_DTX_N5
K7 P_GPP_RXP6 P_GPP_TXP6 P2
K8 P_GPP_RXN6 P_GPP_TXN6 P4
B B
H6 P_GPP_RXP7 P_GPP_TXP7 N2
H7 P_GPP_RXN7 P_GPP_TXN7 N4

L9 P_GPP_RXP8/SATA2_RXP P_GPP_TXP8/SATA2_TXP K2 SATA_ATX_DRX_P0 [67]


[67] SATA_ARX_DTX_P0
HDD L10 P_GPP_RXN8/SATA2_RXN P_GPP_TXN8/SATA2_TXNK4 SATA_ATX_DRX_N0 [67] HDD
[67] SATA_ARX_DTX_N0
K11 P_GPP_RXP9/SATA3_RXP P_GPP_TXP9/SATA3_TXP J4 SATA_ATX_DRX_P1 [67]
[67] SATA_ARX_DTX_P1
ODD J11 P_GPP_RXN9/SATA3_RXN P_GPP_TXN9/SATA3_TXNJ2 SATA_ATX_DRX_N1 [67] ODD
[67] SATA_ARX_DTX_N1
J12 P_GPP_RXP10 P_GPP_TXP10 H3
H12 P_GPP_RXN10 P_GPP_TXN10 H1

J13 P_GPP_RXP11 P_GPP_TXP11 H4


K13 P_GPP_RXN11 P_GPP_TXN11 H2

FP6 REV 0.92


PART 2 OF 13

FP6_BGA1140
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP6 PCIE/UMI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 7 of 100
5 4 3 2 1
A B C D E

Main Func = CPU


+1.8VS_S0
DP0: eDP
DP1: HDMI
DP2: N/A
DP3: N/A

5
UC3
@ 1

P
UC1C NC +3VS_S0
4
ENBKL_R 2 Y ENBKL [38]
DISPLAY/SVI2/JTAG/TEST

G
D11 A22 ENBKL_R A
[38] EDP_TXP0 DP0_TXP0 DP_BLON
B11 D23 ENVDD_R NL17SZ07DFT2G_SC70-5
[38] EDP_TXN0 DP0_TXN0 DP_DIGON T2415

3
C23 INVTPWM_R SA0000BIO00
to LVDS DP_VARY_BL

[38] EDP_TXP1 C11 DP0_TXP1 INVTPWM RC4 1 2 4.7K_0402_5%


1 [38] EDP_TXN1 A11 DP0_TXN1 DP0_AUXP D12 EDP_AUXP [38] ENBKL RC5 1 2 2.2K_0402_5% 1
DP0_AUXN B12 LVDS
EDP_AUXN [38]
D10 DP0_TXP2 DP0_HPD C12
EDP_HPD [38] +1.8VS_S0
B10 DP0_TXN2
DP1_AUXP J20 APU_DP1_CTRL_CLK [40]
D9 DP0_TXP3 DP1_AUXN K20 HDMI
APU_DP1_CTRL_DAT [40]

5
B9 L21 UC6 ENBKL_R RC6 1 2 100K_0402_5%
DP0_TXN3 DP1_HPD
APU_DP1_HPD [40]
1

P
G23 L19 NC 4 INVTPWM_R RC9 1 2 100K_0402_5%
[40] APU_DP1_P0 DP1_TXP0 DP2_AUXP
INVTPWM_R Y INVTPWM [38] EDP_HPD
[40] APU_DP1_N0
H23 DP1_TXN0 DP2_AUXN M19 2 RC10 1 2 100K_0402_5%

G
M20 A
DP2_HPD

[40] APU_DP1_P1 F22 DP1_TXP1 NL17SZ07DFT2G_SC70-5

3
[40] APU_DP1_N1
G22 DP1_TXN1 DP3_AUXP M14 SA0000BIO00
DP3_AUXN L14
HDMI [40] APU_DP1_P2
G21 DP1_TXP2 DP3_HPD L16
[40] APU_DP1_N2
H21 DP1_TXN2
B23 DP_STEREOSYNC
DP_STEREOSYNC

[40] APU_DP1_P3 F20 DP1_TXP3

[40] APU_DP1_N3
G20 DP1_TXN3

BB6 APU_TEST4
TEST4 T1
BD5 APU_TEST5
TEST5 T2
TEST6 AG12
+1.8VS_S0
G25 APU_TEST14
TEST14 T4
K25 APU_TEST15
TEST15 T5
F25 APU_TEST16 APU_TEST14 RC11 1 @ 2 10K_0402_5%
2 TEST16 T6 2
F26 APU_TEST17 APU_TEST15 RC12 1 @ 2 10K_0402_5%
TEST17 T7 APU_TEST16 RC13 1 @ 2 10K_0402_5%
H26 APU_TEST31 APU_TEST17 RC14 1 @ 2 10K_0402_5%
TEST31 T8

AK9 APU_TEST41 +1.8VS_S0


TEST41 T9
APU_TDI AP3 AK21 APU_TEST470
TDI ANALOGIO_0 T10
APU_TDO AU1 AG21 APU_TEST471 APU_TEST31 RC15 1 @ 2 1K_0402_5%
TDO ANALOGIO_1 T11
APU_TCK AR2 RC16 1 @ 2 1K_0402_5%
TCK
APU_TMS AU3 TMS
APU_TRST# AR4 TRST_L
APU_DBREQ# AT2 DBREQ_L

+1.8VS_S0
APU_RST# AW3 P3 SMU_ZVDDP
RESET_L SMU_ZVDD
APU_PWRGD AW4
[88] APU_PWRGD PWROK
DP_STEREOSYNC RC17 1 2 1K_0402_5%
T2414
B22 SIC T13 RC18 1 2 1K_0402_5%
[58] EC_SMB_CK0
D22 SID T14 @
[58] EC_SMB_DA0 APU_ALERT#C22
ALERT_L VDDP_S5_SENSE AK7 VDDP_S5_SENSE [87]
RC617 1 @ 2 0_0402_5% THERMTRIP# AN9 AK12 APU_VDDP_RUN_FB_H
[58] EC_THERMTRIP# THERMTRIP_L VDDP_SENSE T2416
H_PROCHOT# B25 T16
PROCHOT_L VDDCR_SOC_SENSE J23 VCC_SENSE_NB [88]
[58] H_PROCHOT#
VDDCR_SENSE K22 VCC_SENSE_APU [88]
VDDIO_MEM_S3_SENSE J21 T2413
T15
[88] APU_SVC
D25 SVC0 +0.75VS_S0
C25 J22 VSS_SENSE_A
[88] APU_SVD SVD0 VSS_SENSE_A
A25 AJ12 VSS_SENSE_B RC594 1 @ 2 0_0402_5%
[88] APU_SVT SVT0 FP6 REV 0.92 VSS_SENSE_B VSS_SENSE_APU [88]
PART 3 OF 13 SMU_ZVDDP RC22 1 2 196_0402_1%

RC597 1 @ 2 0_0402_5% APU_VDDP_RUN_FB_L


FP6_BGA1140 T2417
1
CC193

.1U_0402_16V7K
Add 0.1u for decade +0.75VS power noise. 2
3 20203225 3

+1.8VALW_S5

RC25 1 2 300_0402_5% APU_PWRGD

RC24 1 2 300_0402_5% APU_RST# HDT+ (debug + HDT@)


+1.8VALW_S5 +1.8VALW_S5

+3VS_S0 JHDT1
1 2 APU_TCK APU_TRST# RHDT1 1 HDT@ 2 1K_0402_5%
1 2 APU_TCK RHDT2 1 HDT@ 2 1K_0402_5%
RC31 1 2 1K_0402_5% APU_ALERT# 3 4 APU_TMS APU_TMS RHDT3 1 HDT@ 2 1K_0402_5%
RC28 1 2 1K_0402_5% H_PROCHOT# 3 4 APU_TDI RHDT4 1 HDT@ 2 1K_0402_5%
RC29 1 2 1K_0402_5% THERMTRIP# 5 6 APU_TDI APU_DBREQ# RHDT5 1 HDT@ 2 1K_0402_5%
5 6
7 8 APU_TDO
7 8
APU_TRST# RHDT61 HDT@ 2 33_0402_5% APU_TRST#_R 9 10 APU_PWRGD
9 10
RC30 1 @ 2 220_0402_5% APU_PWRGD RHDT71 HDT@ 2 10K_0402_5% 11 12 APU_RST# @
11 12 APU_TDI CHDT1 1 2 0.01U_0402_16V7K
RHDT81 HDT@ 2 10K_0402_5% 13 14
13 14 HDT@
RHDT91 HDT@ 2 10K_0402_5% 15 16 APU_DBREQ# APU_DBREQ# CHDT2 1 2 0.01U_0402_16V7K
15 16
17 18 HDT@
17 18 APU_TRST# CHDT3 1 2 0.01U_0402_16V7K
19 20
19 20

ESD SAMTE_ASP-136446-07-B
4 ME@ 4
ESD@ CC17 1 2 100P_0201_50V8J H_PROCHOT#

ESD@ CC18 1 2 100P_0201_50V8J APU_PWRGD

ESD@ CC19 1 2 100P_0201_50V8J APU_RST#

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP6 DISP/MISC/HDT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 8 of 100
A B C D E
A B C D E

Main Func = CPU

+1.8VALW_S5 +1.8VALW_S5

1
RC36 @ UC1D
22K_0402_5%
SFH_IPIO271 AM3

2
QC5 AT4

G
SFH_IPIO272

2
ACPI/AUDIO/I2C/GPIO/MISC SFH_IPIO273 AM1
EC_RSMRST# 1 3 EC_RSMRST#_R SFH_IPIO274 AJ8 Not Implemented Need Pull down by SW
[58] EC_RSMRST#
1 AW7 1

S
1 SFH_IPIO39
@ SFH_IPIO41 AU2
L2N7002WT1G_SC-70-3 CC22 RC34 1 2 33_0402_5% APU_PCIE0_RST# AP6 PCIE_RST0_L/EGPIO26
SB00001GE00 10U_0402_6.3V6M APU_PCIE_RST#_R RC35 1 @ 2 33_0402_5% APU_PCIE1_RST# AT13 PCIE_RST1_L/EGPIO27 I2C0_SCL/EGPIO145 AP14
2 EC_RSMRST#_R AR8 AN14Not Implemented Need Pull down by SW
RSMRST_L I2C0_SDA/EGPIO146

CC21 PBTN_OUT# AT12 AP2


1 2 CC20 [58] PBTN_OUT# APU_FCH_PWRGD_R AW2
PWR_BTN_L/AGPIO0 I2C1_SCL/EGPIO147

PWR_GOOD I2C1_SDA/EGPIO148 AN3 Not Implemented Need Pull down by SW


SYS_RESET#

150P_0402_50V8J

150P_0402_50V8J
@ AL2 SYS_RESET_L/AGPIO1
APU_PCIE_WAKE# AW12 AN12 I2C_2_SCL_R RC585 1 @ 2 0_0402_5% I2C_2_SCL
2 1 [68] APU_PCIE_WAKE# WAKE_L/AGPIO2 I2C2_SCL/EGPIO113/SMBUS0_I2C_SCL
AP12 I2C_2_SDA_R RC586 1 @ 2 0_0402_5% I2C_2_SDA
I2C_2_SCL [10,23,24] SO-DIMM
I2C2_SDA/EGPIO114/SMBUS0_I2C_SDA
PM_SLP_S3#_R I2C_2_SDA [10,23,24]
AT11 SLP_S3_L
PM_SLP_S5# AV11 AM9
SLP_S5_L I2C3_SCL/AGPIO19/SMBUS1_I2C_SCL
[10,58,78] PM_SLP_S5#
I2C3_SDA/AGPIO20/SMBUS1_I2C_SDA AM10Not Implemented Need Pull down by SW
ESD S0A3_GPIO

SMART_PWR_SEL
AW13 S0A3_GPIO/AGPIO10

SFH1_SCL D24
BA8 AC_PRES/AGPIO23 SFH1_SDA B24
[72] KDBG_MUX_SEL RC111 1 @ 2 0_0402_5% AV6 LLB_L/AGPIO12
ESD@ CC23 1 2 100P_0201_50V8J EC_RSMRST#
Not Implemented Need Pull down by SW AGPIO3 BB7 TPM MODE
AW8 BA6 MIC_SELECT
EGPIO42 AGPIO4/SATAE_IFDET
ESD@ CC24 1 2 100P_0201_50V8J SYS_RESET#
AGPIO5/DEVSLP0 AK10 DEVSLP0 DEVSLP0 [67]
3.3VALW input AGPIO6/DEVSLP1 BC6 DEVSLP1 DEVSLP1 [68]
SATA_ACT_L/AGPIO130 AW15
@ EMI@
CC117 1 2 1U_0402_6.3V6K DMIC_CLK0_APU LC1 1 2 BLM15BD221SN1D DMIC_CLK0_APU_R AG6 ACP_WOV_CLK/ACP_IPIO28 3.3VALW input AGPIO9 AU4 PCIE_DET1
DMIC_DAT0_APU RMIC6 1 DMIC_DAT0_APU_R AUX_RESET# PCIE_DET1 [68]
2 0_0402_5% AG7 ACP_WOV_MIC0_MIC1_DATA/ACP_IPIO29 3.3VALW input AGPIO40 AP7 AUX_RESET# [68]
EMI@ T17 APU_WOV_MIC2_MIC3_DATA AJ6 ACP_WOV_MIC2_MIC3_DATA/ACP_IPIO30 3.3VALW input AGPIO69 AV13
3.3VS input BB12 +1.8VALW_S5 +3VALW_S5
Reserver for Check list Add for AMD check list_0916A HDA_BIT_CLK AN6 AZ_BITCLK/TDM_BCLK_MIC
AGPIO86/SPI_CLK2

HDA_SDIN0 AL6 AZ_SDIN0/CODEC_GPI


[56] HDA_SDIN0
AM7 AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT AU7
T18 APU_WOV_MIC4_MIC5_DATA AJ9 AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK/ACP_WOV_MIC4_MIC5_DATA 3.3VS Output SPKR/AGPIO91 AR11 HDA_SPKR
HDA_RST# HDA_SPKR [56]

2
AM6 AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11 AW11
+3VALW_S5 HDA_SYNC AN8 RC59 RC60
AZ_SYNC/TDM_FRM_MIC
HDA_SDOUT T2418
AK6 AZ_SDOUT/TDM_FRM_PLAYBACK 3.3VS input GENINT1_L/AGPIO89 AV15 10K_0402_5% 10K_0402_5%
RC45 1 2 10K_0402_5% PCIE_DET1 3.3VS input AU14 AGPIO90_S0
GENINT2_L/AGPIO90
RC47 1 2 10K_0402_5% PBTN_OUT# AM4 SW_MCLK/TDM_BCLK_BT

1
RC48 1 2 10K_0402_5% APU_PCIE_WAKE# AL3 SW_DATA0/TDM_DOUT_BT
S0A3_GPIO [10,66] APU_SPI_CLK_R
RC610 1 2 2.2K_0402_5% AM2 AGPIO7/FCH_ACP_I2S_SDIN_BT FANIN0/AGPIO84 AT10
AL4 AU10 SYS_RESET#
AGPIO8/FCH_ACP_I2S_LRCLK_BT FANOUT0/AGPIO85
2 RC50 1 2 1K_0402_5% HDA_RST# 2
FP6 REV 0.92
RC53 1 @ 2 10K_0402_5% HDA_SDIN0 PART 4 OF 13
HDA_BIT_CLK

1
RC54 1 @ 2 10K_0402_5% FP6_BGA1140
RC601 1 2 10K_0402_5% AUX_RESET# RC65 RC66
2K_0402_5% 2K_0402_5%
@ @

2
+3VS_S0

RC56
RC57
1
1
2 2.2K_0402_5%
2 2.2K_0402_5%
I2C_2_SCL
I2C_2_SDA
+3VALW_S5 +3VALW_S5
STRAPS
+1.8VALW_S5

1
RC606 1 2 1K_0402_5% DMIC_CLK0_APU STRAPS DEFINITION
DMIC_DAT0_APU RC55
RC607 1 2 1K_0402_5%
8.2K_0402_5%
1 : Use 48MHZ Crystal Clock and Generate both internal

5
UC7 @

2
1 and external clocks (Default)
SPI_CLK

P
+3VALW_S5 NC 4 APU_FCH_PWRGD_R
SYS_PWRGD_EC 2 Y
[58] SYS_PWRGD_EC 0 : Use 100MHZ PCIE clock as reference clock

G
A
RC122 1 2 2.2K_0402_5% SOC_DMIC_CLK0 NL17SZ07EDFT2G SC70
and generate internal clocks only
1

3
RC123 1 2 2.2K_0402_5% SOC_DMIC_DAT0 SA0000BIO00
CC96

2
.1U_0402_16V7K
ESD@
1 : Normal reset mode (Default)
SYS_RST# 0 : short reset mode
RC64 1 @ 2 0_0402_5%

RC67 1 EMI@ 2 33_0402_5% HDA_BIT_CLK


[56] HDA_BITCLK_AUDIO HDA_SDOUT
RC68 1 2 33_0402_5%
[56] HDA_SDOUT_AUDIO HDA_SYNC
RC69 1 2 33_0402_5%
[56] HDA_SYNC_AUDIO HDA_RST#
RC88 1 2 33_0402_5%
[56] HDA_RST_AUDIO#

+3VALW_S5 +3VS_S0
RC70 1 2 1K_0402_5%
3 RC71 1 2 1K_0402_5%
EMI MIC_SELECT
MULTI_MIC@
3

RC622 1 2 10K_0402_5%
1
@ SINGLE_MIC@
CC26 RC623 1 2 10K_0402_5%
+1.8VALW_S5 0.1U_0201_10V6K
2

D
IC
S
L
C
T
M

EO
E
F
n
tiI L
o
_

A
P
uM
cL
n

4
G
I1 0
( )

M
C
5

U S

I
@

@M
T
APU_PCIE_RST#_R 2 _
P

C
I
4

@
G
I

E
Y APU_PCIE_RST# [51,52,66,68]
_
2
G

1
A
G
1

UC8
DMIC_CLK0_APU 3 1 SOC_DMIC_CLK0 MC74VHC1G08DFT2G SC70 5P
SOC_DMIC_CLK0 [39]
3

RC72 SA0000BIP00
S

MIC STRAPS
2
G

Q206 BSS138W_SOT-323-3-X 10K_0402_5%


2

DMIC_DAT0_APU 3 1 SOC_DMIC_DAT0
SOC_DMIC_DAT0 [39]
S

Q207 BSS138W_SOT-323-3-X RC73 1 @ 2 0_0402_5%

+3VALW_S5

SMART@
SMART_PWR_SEL RC624 1 2 10K_0402_5% +3VALW_S5

0
+3VALW_S5 NSMART@
RC625 1 2 10K_0402_5% TPM@
TPM MODE RC620 1 2 10K_0402_5%

SW_TPM@
RC621 1 2 10K_0402_5%
1
@

T
MA
S
L
C
S
A
TP
P
WE
R
O

S
L
C
N

T
T

EO
M
R

P
E

E
CC114
_ _

F
n
ti
o

F
n
ti T
o
A

O
3

P
2
uS

uT

3
cA
nT

cM
n
G
I

G
I1 0
0.1U_0201_10V6K
2 ( ) ( )

@
MN
RM
@R

PS
4 4

M
A

@
T
S

P
5

S0A3_GPIO 2
@ _
P

B 4
PM_SLP_S3#_R Y PM_SLP_S3# [58]
1
A
G

UC23
MC74VHC1G08DFT2G SC70 5P SMRT POWER STRAPS TPM STRAPS
3

SA0000BIP00

RC598 1 @ 2 0_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
2019/07/26 2020/05/15 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP6 GPIO/AZ/MISC/STRAPS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 9 of 100
A B C D E
A B C D E

Main Func = CPU

48MHz CRYSTAL @ UC1E

CLK/LPC/EMMC/SD/SPI/eSPI/UART

AR13 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
CLKREQ_SSD1# AP10 CLK_REQ1_L/AGPIO115
48M_X2_R 48M_X2 [68] CLKREQ_SSD1# CLKREQ_WLAN# AR15
1 RC74 1 EMI@ 2 33_0402_5% [52] CLKREQ_WLAN# CLK_REQ2_L/AGPIO116 TPM@ 1
CLKREQ_LAN# AT14 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
APU_SPI_TPMCS# CC192 1 2 22PF_0402_50V9
48M_X1_R 48M_X1 [51] CLKREQ_LAN#
2 1 RC76 1 EMI@ 2 33_0402_5% AN11 CLK_REQ4_L/OSCIN/EGPIO132
RC75 1M_0402_5% Not Implemented Need Pull down by SW AN13 CLK_REQ5_L/EGPIO120
APU_BT_OFF# AN15 ESD@
CLK_REQ6_L/EGPIO121
[52] APU_BT_OFF# LPC_RST# CC98 1 2 .1U_0402_16V7K
2
2 1
1
EMI AF11 GPP_CLK0P
EGPIO70

LPC_PD_L/AGPIO21

LAD0/ESPI1_DATA0/EGPIO104
AW14S0IX_SELECT
BB13 LPCPD#
BA16 LPC_AD0_R
Not Implemented Need Pull down by SW
RC77 2 1 10_0402_5% LPC_CLK0_EC
@EMI@
CC99 1 2 10P_0201_50V8J
LPC_AD0 [58]
AF12 GPP_CLK0N LAD1/ESPI1_DATA1/EGPIO105 BA15 LPC_AD1_R RC78 2 1 10_0402_5% LPC_AD1 [58]
LAD2/ESPI1_DATA2/EGPIO106 BC13 LPC_AD2_R RC79 2 1 10_0402_5% LPC_AD2 [58]
YC1 CLK_PCIE_SSD1 RC100 1 @ 2 0_0402_5% GPP_CLK1 AG4 GPP_CLK1P LAD3/ESPI1_DATA3/EGPIO107 BB14 LPC_AD3_R RC80 2 1 10_0402_5%
[68] CLK_PCIE_SSD1 CLK_PCIE_SSD1# LPC_AD3 [58]
48MHZ_8PF_7V48000010 SSD [68] CLK_PCIE_SSD1# RC101 1 @ 2 0_0402_5% GPP_CLK1# AG2 GPP_CLK1N LPCCLK0/EGPIO74 BB15 LPC_CLK0 RC81 2 1 22_0402_5% LPC_CLK0_EC [58]
SJ10000JP00 LPC_CLKRUN_L/AGPIO88 BD13 PM_CLKRUN# PM_CLKRUN# [58]
CLK_PCIE_WLAN RC102 1 @ 2 0_0402_5% GPP_CLK2 AG3 GPP_CLK2P LPCCLK1/EGPIO75 BA12 LPC_RST#_R RC83 2 @ 1 100K_0402_5%
[52] CLK_PCIE_WLAN CLK_PCIE_WLAN#
WLAN [52] CLK_PCIE_WLAN# RC103 1 @ 2 0_0402_5% GPP_CLK2# AG1 GPP_CLK2N SERIRQ/AGPIO87 BC15 SERIRQ [58]
3 4 LFRAME_L/EGPIO109 BA13 LPC_FRAME# [58] CC29 2 1 150P_0402_50V8J
3 4 CLK_PCIE_LAN RC104 1 @ 2 0_0402_5% GPP_CLK3 AF2
1 1 [51] CLK_PCIE_LAN CLK_PCIE_LAN#
GPP_CLK3P

LAN [51] CLK_PCIE_LAN# RC105 1 @ 2 0_0402_5% GPP_CLK3# AF4 GPP_CLK3N LPC_RST_L/AGPIO32 BC12 LPC_RST# RC82 2 1 33_0402_5% LPC_RST#_R [58]
CC27 CC28 AGPIO68 AU12
2.2P_0402_50V8C 2.2P_0402_50V8C AH2 GPP_CLK4P LPC_PME_L/AGPIO22 AP4 EC_SCI# [58]
2 SE07122AC80 2 SE07122AC80 Follow Check list AH4 GPP_CLK4N
+3VS_S0
Shift for layout_0905A AJ2 GPP_CLK5P ESPI_ALERT_L RC616 2 1 10K_0402_5%
AJ4 GPP_CLK5N SPI_ROM_REQ/EGPIO67 BA11
BB11 KB_RST# RC85 2 1 10K_0402_5%
SPI_ROM_GNT/EGPIO76
AF8 GPP_CLK6P/WIFIBT_CLKP
AF9 AT15
EMI
GPP_CLK6N/WIFIBT_CLKN ESPI_RESET_L/KBRST_L/AGPIO129
KB_RST# [58]
ESPI_ALERT_L/LDRQ0_L/EGPIO108 BC11 ESPI_ALERT_L LPCPD# RC106 2 1 10K_0402_5%
AK1 X48M_OSC
PM_CLKRUN# RC107 2 1 10K_0402_5%
SPI_CLK/ESPI_CLK BC10 APU_SPI_CLK RC84 2 EMI@ 1 10_0402_1% APU_SPI_CLK_R [9,66] LPC@
BA10 APU_SPI_MISO
32.768KHz CRYSTAL 48M_X1 BB3 X48M_X1
SPI_DI/ESPI_DATA

SPI_DO

SPI_WP_L/ESPI_DAT2
BB8 APU_SPI_MOSI
BA9 APU_SPI_WP#
APU_SPI_MISO
APU_SPI_MOSI
[66]
[66]
SPI_HOLD_L/ESPI_DAT3 BC8 APU_SPI_HOLD#
32K_X1 BD11 APU_SPI_CS1#
SPI_CS1_L
48M_X2 BA5 X48M_X2 SPI_CS2_L/ESPI_CS_L/AGPIO30 BC9 APU_SPI_TPMCS2#
32K_X2 APU_SPI_TPMCS2# [66]
2 1 SPI_CS3_L/AGPIO31 BB10 TPM_STSIRQ# [66]
RC86 20M_0402_5% SPI_TPM_CS_L/AGPIO29 BD8 APU_SPI_TPMCS# APU_SPI_TPMCS# [66]
+3VALW_S5
AG10 RSVD_71
2 1 2 AG9 RSVD_70
2
YC2
32.768KHZ_9PF_X1A000141000200 S0IX_SELECT RC618 1 MS@ 2 10K_0402_5%
SJ10000Q600 RC87 2 @ 1 22 +-5% 0402 RTC_CLK AW10
RTCCLK
[52,68] RTC_CLK_R
1 1
RC619 1 NON_MS@
2 10K_0402_5%
CC30 CC31 32K_X1 AY1 X32K_X1 EGPIO141/UART0_RXD BA17 UART_0_ARXD_DTXD
UART_0_ATXD_DRXD UART_0_ARXD_DTXD [52]

S
IX
S
L
C
8.2P_0201_50V8B 8.2P_0201_50V8B BC16

T
0

EO
E
EGPIO143/UART0_TXD
UART_0_ATXD_DRXD [52]

F
n
ti
o
2 2 BD15 _

A
P
uM
c@ N
n

5
G
I1 0
EGPIO142/UART0_RTS_L/UART1_RXD

32K_X2
EGPIO140/UART0_CTS_L/UART1_TXD BC17
APU_WL_OFF# ( )

S N
AY4 X32K_X2 AGPIO144/SHUTDOWN_L/UART0_INTR BB16
APU_WL_OFF# [52]

M
@
S
O
FP6 REV 0.92 _
PART 5 OF 13
+3VALW_S5 +3VS_S0
FP6_BGA1140
Modern Standby STRAPS
+3VS_S0

RC89 2 1 10K_0402_5% CLKREQ_SSD1#


RC90 2 1 10K_0402_5% CLKREQ_WLAN#
RC91 2 1 10K_0402_5% CLKREQ_LAN# JLPC1
LPC_CLK0_EC 1 2
1 2
LPC_FRAME# 3 4
UC1J 3 4
@
LPC_RST#_R 5 6 RC191 1 @ 2 0_0603_5%
5 6 PM_SLP_S5# [9,58,78]
USB
LPC_AD3 7 8 LPC_AD2
USB20_P0 AC6 USBC0_DP/USB0_DP USBC0_TX1P/USB0_TXP/DP2_TXP2 AA1 7 8
Rear USB2.0 port1 [73] USB20_P0 USB20_N0 LPC_AD1
[73] USB20_N0 AC7 USBC0_DN/USB0_DN USBC0_TX1N/USB0_TXN/DP2_TXN2 AA3 9 10
9 10
USB20_P1 AA8 AA2 LPC_AD0 11 12
USB1_DP USBC0_RX1P/USB0_RXP/DP2_TXP3
USB3.1 Type-A Port 1 [71] USB20_P1 USB20_N1 11 12
[71] USB20_N1 AA9 USB1_DN USBC0_RX1N/USB0_RXN/DP2_TXN3 AA4
[9,23,24] I2C_2_SCL 13 14 I2C_2_SDA [9,23,24]
USB20_P2 Y10 AC2 13 14
USB2_DP USBC0_TX2P/DP2_TXP1
Camera [39] USB20_P2 USB20_N2
[39] USB20_N2 Y9 USB2_DN USBC0_TX2N/DP2_TXN1 AC4 15 16 SERIRQ
15 16
USB20_P3 Y7 USB3_DP USBC0_RX2P/DP2_TXP0 AC1 17 18 PM_CLKRUN#
Touch Screen [39] USB20_P3 USB20_N3 17 18
3 Y6 USB3_DN USBC0_RX2N/DP2_TXN0 AC3 3
[39] USB20_N3
LPCPD# 19 20 RC192 1 2 0_0603_5% ESPI_ALERT_L
USB1_TXP AE1 USB3_ATX_DRX_P1 19 20 LPC@
USB3_ATX_DRX_P1 [71]
USB1_TXN AE3 USB3_ATX_DRX_N1 USB3_ATX_DRX_N1 [71]
USB20_P4 AC9 CVILU_CH81202M101-0P
Rear USB2.0 port2 [73] USB20_P4 USB20_N4
USBC4_DP/USB4_DP Type-A left port1
[73] USB20_N4 AC10 USBC4_DN/USB4_DN USB1_RXP AD8 USB3_ARX_DTX_P1 USB3_ARX_DTX_P1 [71] 1 1 CONN@
USB1_RXN AD9 USB3_ARX_DTX_N1 USB3_ARX_DTX_N1 [71] LPC@ LPC@
USB20_P5 AA11 CC191 CC190
USB5_DP
USB3.1 Type-A Port 2 [72] USB20_P5 USB20_N5
[72] USB20_N5 AA12 USB5_DN 0.1U_0402_25V6 0.1U_0402_25V6
2 2
USB20_P6 W8 USB6_DP
Card Reader [70] USB20_P6 USB20_N6
[70] USB20_N6 W9 USB6_DN USBC4_TX1P/USB4_TXP/DP3_TXP2 V3
USBC4_TX1N/USB4_TXN/DP3_TXN2 V1
USB20_P7 W11 USB7_DP
NGFF_BT [52] USB20_P7 USB20_N7
[52] USB20_N7 W12 USB7_DN USBC4_RX1P/USB4_RXP/DP3_TXP3 U4
USBC4_RX1N/USB4_RXN/DP3_TXN3 U2

+3VALW_S5 AL9 USBC_I2C_SCL USBC4_TX2P/DP3_TXP1 W2


USBC4_TX2N/DP3_TXN1 W4
AL8 USBC_I2C_SDA
USB_OC0#
RC98 1
RC99 1
2
2
100K_0402_5%
100K_0402_5% USB_OC1#
APU_WLAN_WAKE# USB_OC0#
USBC4_RX2P/DP3_TXP0

USBC4_RX2N/DP3_TXN0
W1
W3 SPI ROM (Winbond)
RC109 1 2 100K_0402_5% [73] USB_OC0# AE9 USB_OC0_L/AGPIO16
RC110 1 2 100K_0402_5% APU_LAN_WAKE# USB_OC1# AE10 AD2 USB3_ATX_DRX_P2
USB_OC1_L/AGPIO17 USB5_TXP
[71,72] USB_OC1# APU_WLAN_WAKE# USB3_ATX_DRX_N2 USB3_ATX_DRX_P2 [72]
[52] APU_WLAN_WAKE# AE6 USB_OC2_L/AGPIO18 USB5_TXN AD4 USB3_ATX_DRX_N2 [72]
APU_LAN_WAKE# AE7 +1.8VALW_S5
[51] APU_LAN_WAKE# USB_OC3_L/AGPIO24 Type-A left port2
USB5_RXP AD12 USB3_ARX_DTX_P2 USB3_ARX_DTX_P2 [72]
+1.8VALW_S5
USB5_RXN AD11 USB3_ARX_DTX_N2 USB3_ARX_DTX_N2 [72] UC2
RC92 2 @ 1 10K_0402_5% APU_SPI_MOSI APU_SPI_CS1# 1 8
RC93 2 1 10K_0402_5% APU_SPI_MISO APU_SPI_MISO 2 CS VCC 7 APU_SPI_HOLD#
RC94 2 @ 1 10K_0402_5% APU_SPI_WP# APU_SPI_WP# 3 DO(IO1) HOLD/RESET(IO3) 6 APU_SPI_CLK_R
APU_SPI_HOLD# WP(IO2) CLK APU_SPI_MOSI 1
FP6 REV 0.92 RC96 2 @ 1 10K_0402_5% 4 5 CC32
PART 10 OF 13 RC95 2 1 10K_0402_5% APU_SPI_CS1# GND DI(IO0) 0.1U_0201_10V6K
@
W25Q128FWSIQ_SO8 2
FP6_BGA1140
SA00009KY30
45@

RC97 2 @EMI@ 1 10_0402_5% APU_SPI_CLK +1.8VALW_S5


JROM1
APU_SPI_CS1# 1 8
1 APU_SPI_WP# CS# VCC 6 APU_SPI_CLK_R
4 3 4
CC33 APU_SPI_HOLD# 7 WP# SCLK 5 APU_SPI_MOSI
10P_0201_50V8J 4 HOLD# SI/SIO0 2 APU_SPI_MISO
2 @EMI@ GND SO/SIO1

EMI ACES_91960-0084N-X
CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.


2019/07/26 2020/05/15 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP6 SATA/CLK/USB/SPI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 10 of 100
A B C D E
A B C D E

Main Func = CPU


+1.2V_VDDQ_S3

All BU(on bottom side under SOC) Across VDDIO & VSS split.
+APU_VDDCORE
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 UC1F
+APU_VDDSOC
22U_0603_6.3V6M
CC35

22U_0603_6.3V6M
CC36

22U_0603_6.3V6M
CC37

22U_0603_6.3V6M
CC38

22U_0603_6.3V6M
CC52

22U_0603_6.3V6M
CC39

22U_0603_6.3V6M
CC40

22U_0603_6.3V6M
CC188

22U_0603_6.3V6M
CC187

1U_0201_6.3V6M
CC43

1U_0201_6.3V6M
CC44

180P_0402_50V8J
CC45

180P_0402_50V8J
CC46

180P_0402_50V8J
CC47

.22U 6.3V K X5R 0402


CC48

.22U 6.3V K X5R 0402


CC49

.22U 6.3V K X5R 0402


CC50

.22U 6.3V K X5R 0402


CC51
@
1 1
TDC :13A POWER TDC: 44A
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 EDC: 17A N16 VDDCR_SOC_1 VDDCR_1 G7 EDC: 70A
N18 VDDCR_SOC_2 VDDCR_2 G10
N20 VDDCR_SOC_3 VDDCR_3 G12
P17 VDDCR_SOC_4 VDDCR_4 G14
P19 VDDCR_SOC_5 VDDCR_5 H8
R18 VDDCR_SOC_6 VDDCR_6 H11
R20 VDDCR_SOC_7 VDDCR_7 H15
T19 VDDCR_SOC_8 VDDCR_8 K6
U18 VDDCR_SOC_9 VDDCR_9 K12
U20 VDDCR_SOC_10 VDDCR_10 K14
V19 VDDCR_SOC_11 VDDCR_11 L8
W18 VDDCR_SOC_12 VDDCR_12 M7
W20 VDDCR_SOC_13 VDDCR_13 M10
Y19 VDDCR_SOC_14 VDDCR_14 N14
+0.75VS_S0 +0.75VALW_S5 VDDCR_15 P7
+1.2V_VDDQ_S3 VDDCR_16 P10
P13
+VDDP_ALW VDDCR_17

VDDCR_18 P15
TDC :6A AC20 VDDIO_MEM_S3_1 VDDCR_19 R8
+1.8VS_S0 AC28 VDDIO_MEM_S3_2 VDDCR_20 R14
AD23 VDDIO_MEM_S3_3 VDDCR_21 R16
RC605 2 1 0_0402_5% VDDIO_AUDIO AD26 VDDIO_MEM_S3_4 VDDCR_22 T7
@
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AD28 VDDIO_MEM_S3_5 VDDCR_23 T10
22U_0603_6.3V6M
CC53

22U_0603_6.3V6M
CC54

1U_0201_6.3V6M
CC55

1U_0201_6.3V6M
CC56

1U_0201_6.3V6M
CC57

1U_0201_6.3V6M
CC58

1U_0201_6.3V6M
CC59

1U_0201_6.3V6M
CC60

1U_0201_6.3V6M
CC61

1U_0201_6.3V6M
CC62

180P_0402_50V8J
CC63

22U_0603_6.3V6M
CC64

1U_0201_6.3V6M
CC65

1U_0201_6.3V6M
CC66

1U_0201_6.3V6M
CC67
+1.8VALW_S5 1 1 AD32 VDDIO_MEM_S3_6 VDDCR_24 T13
CC68 CC69 AE20 VDDIO_MEM_S3_7 VDDCR_25 T15
RC604 2 1 0_0402_5% AE22 VDDIO_MEM_S3_8 VDDCR_26 T17
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

22U_0603_6.3V6M

1U_0201_6.3V6M
AE25 VDDIO_MEM_S3_9 VDDCR_27 U14
2 2 AE28 VDDIO_MEM_S3_10 VDDCR_28 U16
AF23 VDDIO_MEM_S3_11 VDDCR_29 V13
AF26 VDDIO_MEM_S3_12 VDDCR_30 V15
AF28 VDDIO_MEM_S3_13 VDDCR_31 V17
AF32 VDDIO_MEM_S3_14 VDDCR_32 W7
AG20 VDDIO_MEM_S3_15 VDDCR_33 W10
2 2
AG22 VDDIO_MEM_S3_16 VDDCR_34 W14
AG25 W16
BO BU AG28
VDDIO_MEM_S3_17 VDDCR_35

Y8
BO BU AJ20
VDDIO_MEM_S3_18

VDDIO_MEM_S3_19
VDDCR_36

VDDCR_37 Y13
AJ23 VDDIO_MEM_S3_20 VDDCR_38 Y15
AJ26 VDDIO_MEM_S3_21 VDDCR_39 Y17
AJ28 VDDIO_MEM_S3_22 VDDCR_40 AA7
+1.8VALW_S5 +1.8VS_S0 AJ32 VDDIO_MEM_S3_23 VDDCR_41 AA10
+3VALW_S5 AK22 VDDIO_MEM_S3_24 VDDCR_42 AA14
+3VS_S0 AK25 VDDIO_MEM_S3_25 VDDCR_43 AA16
AK28 VDDIO_MEM_S3_26 VDDCR_44 AA18
AL23 VDDIO_MEM_S3_27 VDDCR_45 AB13
AL26 VDDIO_MEM_S3_28 VDDCR_46 AB15
AL28 VDDIO_MEM_S3_29 VDDCR_47 AB17
AL32 VDDIO_MEM_S3_30 VDDCR_48 AB19
1 1 1 1 1 1 AM22 VDDIO_MEM_S3_31 VDDCR_49 AC14
22U_0603_6.3V6M
CC70

1U_0201_6.3V6M
CC71

1U_0201_6.3V6M
CC72

22U_0603_6.3V6M
CC73

1U_0201_6.3V6M
C1

1U_0201_6.3V6M
CC74

1 1 1 1 1 1 AM25 VDDIO_MEM_S3_32 VDDCR_50 AC16


22U_0603_6.3V6M
CC75

1U_0201_6.3V6M
CC76

1U_0201_6.3V6M
CC77

22U_0603_6.3V6M
CC78

1U_0201_6.3V6M
CC79

1U_0201_6.3V6M
CC80
AM28 VDDIO_MEM_S3_33 VDDCR_51 AC18
AN28 VDDIO_MEM_S3_34 VDDCR_52 AD7
2 2 2 2 2 2 AN32 VDDIO_MEM_S3_35 VDDCR_53 AD10
2 2 2 2 2 2 AP28 VDDIO_MEM_S3_36 VDDCR_54 AD13
AR32 VDDIO_MEM_S3_37 VDDCR_55 AD15
VDDCR_56 AD17
AC21 VDDIO_VPH_1 VDDCR_57 AD19
AD21 VDDIO_VPH_2 VDDCR_58 AE8
VDDCR_59 AE14
+3VS_S0 VDDIO_AUDIO TDC :0.2A AP9 VDDIO_AUDIO VDDCR_60 AE16
AE18
BO BU BO BU TDC :0.25A AL18 VDD_33_1
VDDCR_61

VDDCR_62 AF7
AM17 VDD_33_2 VDDCR_63 AF10
+1.8VS_S0 VDDCR_64 AF13
TDC :2.A AL20 VDD_18_1 VDDCR_65 AF15
+1.8VALW_S5 AM19 VDD_18_2 VDDCR_66 AF17
VDDCR_67 AF19
3 TDC :1A AL19 VDD_18_S5_1 VDDCR_68 AG14 3
+3VALW_S5 AM18 AG16
Note : Cap placemet need to close APU +0.75VALW_S5
VDD_18_S5_2 VDDCR_69

VDDCR_70 AG18
TDC :0.25A AL17 VDD_33_S5_1 VDDCR_71 AH13
AM16 VDD_33_S5_2 VDDCR_72 AH15
VDDCR_73 AH17
TDC :2A AL11 VDDP_S5_1 VDDCR_74 AH19
AL12 VDDP_S5_2 VDDCR_75 AJ7
+0.75VS_S0 AM12 VDDP_S5_3 VDDCR_76 AJ10
AJ14
RTC OF APU +CHGRTC_S5 +3VL_RTC_S5 TDC :2A M15
M16
VDDP_1

VDDP_2
VDDCR_77

VDDCR_78

VDDCR_79
AJ16
AJ18
+RTCVCC_S5 RC112 +RTCBATT_G3 M18 VDDP_3 VDDCR_80 AK13
DC3 1.5K_0603_5% VDDCR_81 AK15
2 1 2 +RTC_APU_S5 VDDCR_82 AK17
20mils VDDCR_83 AK19
1 20mils TDC :4.5uA AJ11 VDDBT_RTC_G

1 +RTCBATT_R_S5
3 RC113 1 2 FP6 REV 0.92
CC83 1K_0402_5% PART 6 OF 13
1U_0201_6.3V6M BAT54CW-L SOT-323 FP6_BGA1140
2 @

+RTC_APU_S5
3.3V
+RTC_APU_R_S5 +RTCVCC_S5
20 mils
RC114 1 2 1 2

www.teknisi-indonesia.com
1K_0402_5% RC626 0_0603_5%
1U_0201_6.3V6M
0.22U_0402_6.3V6K

1U_0201_6.3V6M
CC116

2 2
2

CC115

@ 2
QC3 RC115
1

D 0_0805_5%
CC86

1 2 1
[58] EC_RTCRST 1
G
1

4 4
L2N7002WT1G_SC-70-3 S
3

SB00001GE00 For clear CMOS


Close to AR17 Pin

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title
FP6 PWR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 11 of 100
A B C D E
5 4 3 2 1

@ UC1M
@ UC1L
CAMERAS
D D
D21 CAM0_CSI2_CLOCKP CAM0_CLK A18 WiFi
A20 CAM0_CSI2_CLOCKN

CAM0_I2C_SCL C18 N7 AGPIO256/WIFIBT_BT_DATA EGPIO267/RFIC_SPI_CLK P8


D18 CAM0_CSI2_DATAP0 CAM0_I2C_SDA B17 R7 AGPIO257/WIFIBT_BT_VALID EGPIO268/RFIC_SPI_SS R9
B18 CAM0_CSI2_DATAN0 N6 AGPIO258/WIFIBT_BT_SYNC AGPIO269/RFIC_SPI_DATA R6
CAM0_SHUTDOWN D17 T6 AGPIO259/WIFIBT_BT_CLK
C19 CAM0_CSI2_DATAP1
D20 CAM0_CSI2_DATAN1

C21 CAM0_CSI2_DATAP2 R10 AGPIO260/WIFIBT_QSPI_DATA0 AGPIO270/WIFIBT_RFIC_WAKEUP P9


B21 CAM0_CSI2_DATAN2 T12 AGPIO261/WIFIBT_QSPI_DATA1 EGPIO271/WIFIBT_BUCKEN T9
P12 AGPIO262/WIFIBT_QSPI_DATA2 EGPIO266/WIFIBT_FLOW T8
C20 CAM0_CSI2_DATAP3 P11 AGPIO263/WIFIBT_QSPI_DATA3
B20 CAM0_CSI2_DATAN3 T11 AGPIO264/WIFIBT_QSPI_CLK
P6 AGPIO265/WIFIBT_QSPI_SS
C15 CAM1_CSI2_CLOCKP CAM1_CLK A13 WIFIBT_DATA_RXP V7
A15 CAM1_CSI2_CLOCKN WIFIBT_DATA_RXN V6
CAM1_I2C_SCL B13
D16 CAM1_CSI2_DATAP0 CAM1_I2C_SDA D13 WIFIBT_DATA_TXP V9
B16 CAM1_CSI2_DATAN0 WIFIBT_DATA_TXN V10
CAM1_SHUTDOWN C14
D15 CAM1_CSI2_DATAP1
B15 CAM1_CSI2_DATAN1 CAM_PRIV_LED C16 FP6 REV 0.92
CAM_IR_ILLU C13 PART 12 OF 13
FP6 REV 0.92
PART 13 OF 13
FP6_BGA1140

FP6_BGA1140
C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP6 GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 12 of 100
5 4 3 2 1
5 4 3 2 1

Main Func = CPU

@ UC1G UC1H UC1K


@ @
D D
GND GND GND/RSVD
AM20 VSS VSS K28 V5 VSS VSS AE13 AR14 VSS_246 VSS_305 BD19
A3 VSS VSS K32 V8 VSS VSS AE15 AR16 VSS_247 VSS_306 BD21
A5 VSS VSS L5 V11 VSS VSS AE17 AR19 VSS_248 VSS_307 BD23
A7 VSS VSS L13 V14 VSS VSS AE19 AR21 VSS_249 VSS_308 BD26
A10 VSS VSS L15 V16 VSS VSS AF1 AR26 VSS_250 VSS_309 BD30
A12 VSS VSS L18 V18 VSS VSS AF3 AR28 VSS_251
A14 VSS VSS L20 V20 VSS VSS AF5 AT23 VSS_252
A16 VSS VSS L25 V22 VSS VSS AF14 AU5 VSS_253
A19 VSS VSS L28 V25 VSS VSS AF16 AU8 VSS_254
A21 VSS VSS M1 V28 VSS VSS AF18 AU11 VSS_255
A23 VSS VSS M3 W5 VSS VSS AF20 AU13 VSS_256
A26 VSS VSS M5 W13 VSS VSS AG5 AU15 VSS_257
A30 VSS VSS M21 W15 VSS VSS AG8 AU18 VSS_258 RSVD_46 AV8
C3 VSS VSS M23 W17 VSS VSS AG11 AU20 VSS_259 RSVD_47 BD18
C10 VSS VSS M26 W19 VSS VSS AG13 AU22 VSS_260 RSVD_45 AV3
C32 VSS VSS M28 W23 VSS VSS AG15 AU25 VSS_261 RSVD_44 AU6
E7 VSS VSS M32 W26 VSS VSS AG17 AU28 VSS_262 RSVD_43 AR6
E8 VSS VSS N5 W28 VSS VSS AG19 AV1 VSS_263 RSVD_42 AR3
E10 VSS VSS N8 W32 VSS VSS AH14 AV5 VSS_264 RSVD_41 AP1
E11 VSS VSS N11 Y1 VSS VSS AH16 AV7 VSS_265 RSVD_40 AN16
E12 VSS VSS N13 Y3 VSS VSS AH18 AV10 VSS_266 RSVD_39 AN4
E13 VSS VSS N15 Y5 VSS VSS AH20 AV12 VSS_267 RSVD_38 AN2
E14 VSS VSS N17 Y11 VSS VSS AJ1 AV14 VSS_268 RSVD_37 AM14
C C
E15 VSS VSS N22 Y14 VSS VSS AJ3 AV16 VSS_269 RSVD_36 AM13
E16 VSS VSS N25 Y16 VSS VSS AJ5 AV19 VSS_270 RSVD_35 AL29
E18 VSS VSS N28 Y18 VSS VSS AJ13 AV21 VSS_271 RSVD_34 AL15
E19 VSS VSS P1 Y20 VSS VSS AJ15 AV23 VSS_272 RSVD_33 AL14
E20 VSS VSS P5 Y22 VSS VSS AJ17 AV26 VSS_273 RSVD_32 AL13
E21 VSS VSS P14 Y25 VSS VSS AJ19 AV28 VSS_274 RSVD_31 AK3
E22 VSS VSS P16 Y28 VSS VSS AK5 AV32 VSS_275 RSVD_30 AJ29
E23 VSS VSS P18 AA5 VSS VSS AK8 AW5 VSS_276 RSVD_29 AJ27
E25 VSS VSS P20 AA13 VSS VSS AK11 AW28 VSS_277 RSVD_28 AF6
E26 VSS VSS P23 AA15 VSS VSS AK14 AY6 VSS_278 RSVD_27 AE12
E27 VSS VSS P26 AA17 VSS VSS AK16 AY7 VSS_279 RSVD_26 AD6
F5 VSS VSS P28 AA19 VSS VSS AK18 AY8 VSS_280 RSVD_25 AD3
F19 VSS VSS P32 AA23 VSS VSS AK20 AY10 VSS_281 RSVD_24 AC30
F21 VSS VSS R5 AA26 VSS VSS AL1 AY11 VSS_282 RSVD_23 AC12
F23 VSS VSS R11 AA28 VSS VSS AL5 AY12 VSS_283 RSVD_22 AB31
F28 VSS VSS R13 AA32 VSS VSS AL7 AY13 VSS_284 RSVD_21 AA20
G1 VSS VSS R15 AB2 VSS VSS AL10 AY14 VSS_285 RSVD_20 AA6
G3 VSS VSS R17 AB4 VSS VSS AL16 AY15 VSS_286 RSVD_19 Y12
G5 VSS VSS R19 AB14 VSS VSS AM5 AY16 VSS_287 RSVD_18 W6
G16 VSS VSS R22 AB16 VSS VSS AM8 AY18 VSS_288 RSVD_17 V12
G26 VSS VSS R25 AB18 VSS VSS AM11 AY19 VSS_289 RSVD_16 R12
G28 VSS VSS R28 AB20 VSS VSS AM15 AY20 VSS_290 RSVD_15 N19
G32 VSS VSS T1 AC5 VSS VSS AN1 AY21 VSS_291 RSVD_14 N12
H5 VSS VSS T3 AC8 VSS VSS AN5 AY22 VSS_292 RSVD_13 N10
B H13 VSS VSS T5 AC11 VSS VSS AN7 AY23 VSS_293 RSVD_12 N9 B
H18 VSS VSS T14 AC13 VSS VSS AN10 AY25 VSS_294 RSVD_11 M13
H20 VSS VSS T16 AC15 VSS VSS AN23 AY26 VSS_295 RSVD_10 M12
H22 VSS VSS T18 AC17 VSS VSS AN26 AY27 VSS_296 RSVD_9 M11
H25 VSS VSS T20 AC19 VSS VSS AP5 BB1 VSS_297 RSVD_8 M6
H28 VSS VSS T23 AC22 VSS VSS AP8 BB32 VSS_298 RSVD_7 L12
J19 VSS VSS T26 AC25 VSS VSS AP13 BD3 VSS_299 RSVD_6 K19
K1 VSS VSS T28 AD1 VSS VSS AP15 BD7 VSS_300 RSVD_5 F16
K3 VSS VSS T32 AD5 VSS VSS AP18 BD10 VSS_301 RSVD_4 F14
K5 VSS VSS U13 AD14 VSS VSS AP20 BD12 VSS_302 RSVD_3 F12
K16 VSS VSS U15 AD16 VSS VSS AP25 BD14 VSS_303 RSVD_2 F10
K21 VSS VSS U17 AD18 VSS VSS AR1 BD16 VSS_304 RSVD_1 C26
K26 VSS VSS U19 AD20 VSS VSS AR5
VSS V2 AE5 VSS VSS AR7
VSS V4 AE11 VSS VSS AR12
FP6 REV 0.92 FP6 REV 0.92 FP6 REV 0.92
PART 7 OF 13 PART 8 OF 13 PART 11 OF 13

FP6_BGA1140 FP6_BGA1140
FP6_BGA1140

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP6 GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 13 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 14 of 100
5 4 3 2 1
5 4 3 2 1

D D

teknisi-indonesia.com
C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 15 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 16 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 17 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 18 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 19 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 20 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 21 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 22 of 100
5 4 3 2 1
A B C D E

CHANNEL-A Layout Note:


Place near JDIMM2
SPD ADDRESS FOR CHANNEL A :
+3VS_S0 +3VS_S0 +3VS_S0
WRITE ADDRESS:
10uF*8
READ ADDRESS: +1.2V_VDDQ_S3 1uF*8 +1.2V_VDDQ_S3
1 SA0 = 0; SA1 = 0; SA2 = 0.

1
1 330uF*1 +1.2V_VDDQ_S3 1
RD1 RD2 RD3
@ 0_0402_5% @ 0_0402_5% @ 0_0402_5% DDR4 POR OPERATING SPEED: 1867 MT/S

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
1
STRETCH GOAL IS 2133 MT/S

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M
1 1 1 1 1 1 1 1
2

1
SA2_CHA_DIM1 SA1_CHA_DIM1 SA0_CHA_DIM1

CD1

CD2

CD3

CD4

CD5

CD6

CD7

CD8
@ + CD17

CD9

CD10

CD11

CD12

CD13

CD14

CD15

CD16
330U_6.3V_M

2
1

1
2 2 2 2 2 2 2 2 2
RD4 RD5 RD6
@ 0_0402_5% @ 0_0402_5% @ 0_0402_5%
2

2
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM

Layout Note:

(4.0 mm) STD PLACE THE CAP WITHIN 200 MILS


FROM THE JDIMM2
+1.2V_VDDQ_S3 JDIMM1B
STD
+1.2V_VDDQ_S3
Layout Note:
Place near JDIMM2

111 141
112 VDD1 VDD11 142
+0.6V_DDRA_VREFCA_S3 117 VDD2 VDD12 147 +0.6VS_VTT_S0
2.2uF*1 VDD3 VDD13 10uF*1
118 148
JDIMM1A
0.1uF*1 123 VDD4 VDD14 153 1uF*2
DDR_A_DQ10 DDR_A_DQ[8..15] [6] VDD5 VDD15 +0.6VS_VTT_S0
137 STD 8 2 2 124 154
[6] DDR_A_CLK0 CK0(T) DQ0 DDR_A_DQ11 VDD6 VDD16

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M
139 7 CD24 129 159 1 1
[6] DDR_A_CLK0# CK0#(C) DQ1 VDD7 VDD17

1
138 20 DDR_A_DQ12 .1U_0402_16V7K CD18 +3VS_S0 130 160 @
[6] DDR_A_CLK1 CK1(T) DQ2 DDR_A_DQ8 VDD8 VDD18

CD19

CD25

CD20

CD21
140 21 2.2U_0402_6.3V6M 135 163
[6] DDR_A_CLK1# CK1#(C) DQ3 DDR_A_DQ15 1 1 VDD9 VDD19 +2.5V_S3
4 136

2
109 DQ4 3 DDR_A_DQ14 RD7 1 @ 2 0_0603_5% VDD10 2 2
[6] DDR_A_CKE0 CKE0 DQ5 DDR_A_DQ9
110 16 255 258
[6] DDR_A_CKE1 CKE1 DQ6 DDR_A_DQ13 VDDSPD VTT
17
149 DQ7 13 +0.6V_DDRA_VREFCA_S3 164 257

2.2U_0402_6.3V6M
2 [6] DDR_A_CS0# S0# DQS0(T) DDR_A_DQS1 [6] VREFCA VPP1 2
157 11 2 2 259
[6] DDR_A_CS1# S1# DQS0#(C) DDR_A_DQS1# [6] VPP2
162 CD22
S2#/C0 DDR_A_DQ4 DDR_A_DQ[0..7] [6]

CD23
TD1 @ 165 28 .1U_0402_16V7K 1 99
TD2 @ S3#/C1 DQ8 29 DDR_A_DQ5 2 VSS VSS 102
155 DQ9 41 DDR_A_DQ6 1 1 5 VSS VSS 103
[6] DDR_A_ODT0 ODT0 DQ10 DDR_A_DQ3 VSS VSS
161 42 6 106
[6] DDR_A_ODT1 ODT1 DQ11 DDR_A_DQ1 VSS VSS
24 9 107
115 DQ12 25 DDR_A_DQ0 10 VSS VSS 167
[6] DDR_A_BG0 BG0 DQ13 DDR_A_DQ7 VSS VSS
113 38 14 168
[6] DDR_A_BG1 BG1 DQ14 DDR_A_DQ2 VSS VSS
150 37 15 171
[6] DDR_A_BA0 BA0 DQ15 VSS VSS
145 34 18 172
[6] DDR_A_BA1 BA1 DQS1(T) DDR_A_DQS0 [6] VSS VSS
32 19 175
[6] DDR_A_MA[13..0] DDR_A_MA0 DQS1#(C) DDR_A_DQS0# [6] VSS VSS
144 22 176
DDR_A_MA1 133 A0 50 DDR_A_DQ16 DDR_A_DQ[16..23] [6] PLACE NEAR TO PIN 23 VSS VSS 180
DDR_A_MA2 132 A1 DQ16 49 DDR_A_DQ17 26 VSS VSS 181
DDR_A_MA3 131 A2 DQ17 62 DDR_A_DQ18 27 VSS VSS 184
DDR_A_MA4 A3 DQ18 DDR_A_DQ19 VSS VSS Layout Note:
128 63 30 185
+1.2V_VDDQ_S3 DDR_A_MA5 126 A4 DQ19 46 DDR_A_DQ20 31 VSS VSS 188 Place near JDIMM2
DDR_A_MA6 127 A5 DQ20 45 DDR_A_DQ21 35 VSS VSS 189
@ DDR_A_MA7 122 A6 DQ21 58 DDR_A_DQ22 36 VSS VSS 192
RD9 1 2 1K_0402_5% DDR_A_ALERT# DDR_A_MA8 125 A7 DQ22 59 DDR_A_DQ23 39 VSS VSS 193
DDR_A_MA9 121 A8 DQ23 55 40 VSS VSS 196
DDR_A_EVENT# DDR_A_MA10 A9 DQS2(T) DDR_A_DQS2 [6] VSS VSS +2.5V_S3
RD25 1 2 1K_0402_5% 146 53 43 197 10uF*1
DDR_A_MA11 A10_AP DQS2#(C) DDR_A_DQS2# [6] VSS VSS
120 44 201
DDR_A_MA12 119 A11 70 DDR_A_DQ24 DDR_A_DQ[24..31] [6]
47 VSS VSS 202 1uF*1
DDR_A_MA13 158 A12 DQ24 71 DDR_A_DQ25 48 VSS VSS 205
A13 DQ25 DDR_A_DQ26 VSS VSS

10U_0603_6.3V6M

1U_0201_6.3V6M
151 83 51 206 1
[6] DDR_A_WE# A14_WE# DQ26 VSS VSS

1
156 84 DDR_A_DQ27 52 209
[6] DDR_A_CAS# A15_CAS# DQ27 DDR_A_DQ28 VSS VSS

CD26

CD27
152 66 56 210
[6] DDR_A_RAS# A16_RAS# DQ28 DDR_A_DQ29 VSS VSS
67 57 213

2
114 DQ29 79 DDR_A_DQ30 60 VSS VSS 214 2
Remove RD29_0822A [6] DDR_A_ACT# ACT# DQ30 80 DDR_A_DQ31 61 VSS VSS 217
143 DQ31 76 64 VSS VSS 218
[6]
DDR_A_PAR DDR_A_ALERT# PARITY DQS3(T) DDR_A_DQS3 [6] VSS VSS
116 74 65 222
[6]
DDR_A_ALERT# ALERT# DQS3#(C) DDR_A_DQS3# [6] VSS VSS
134 68 223
[6] DDR_A_EVENT# EVENT# DDR_A_DQ32 DDR_A_DQ[32..39] [6] +1.2V_VDDQ_S3 VSS VSS
108 174 69 226
[6] DDR_A_RST# RESET# DQ32 DDR_A_DQ33 VSS VSS
173 72 227
DQ33 187 DDR_A_DQ34 73 VSS VSS 230
RD26 1 @ 2 0_0402_5% 254 DQ34 186 DDR_A_DQ35 77 VSS VSS 231
[9,10,24] I2C_2_SDA SDA DQ35 DDR_A_DQ36 VSS VSS
RD27 1 @ 2 0_0402_5% 253 170 78 234
[9,10,24] I2C_2_SCL SCL DQ36 DDR_A_DQ37 VSS VSS
169 81 235
SA2_CHA_DIM1 166 DQ37 183 DDR_A_DQ38 82 VSS VSS 238
SA1_CHA_DIM1 260 SA2 DQ38 182 DDR_A_DQ39 85 VSS VSS 239
SA0_CHA_DIM1 256 SA1 DQ39 179 86 VSS VSS 243
2
3
SA0 DQS4(T)
DQS4#(C)
177
DDR_A_DQS4
DDR_A_DQS4#
[6]
[6]
CD28
DIMM Side 89 VSS
VSS
VSS
VSS
244 3

2
.1U_0402_16V7K 90 247
DDR_A_DQ53 DDR_A_DQ[48..55] [6] VSS VSS
92 195 RD11 93 248
91 CB0_NC DQ40 194 DDR_A_DQ52 1 94 VSS VSS 251
CB1_NC DQ41 DDR_A_DQ54 1K_0402_1% VSS VSS
101 207 +0.6V_DDRA_VREFCA_S3 +0.6V_DDRB_VREFCA_S3 98 252
105 CB2_NC DQ42 208 DDR_A_DQ51 VSS VSS
88 CB3_NC DQ43 191 DDR_A_DQ49 1 262 261
87 CB4_NC DQ44 190 DDR_A_DQ48 GND GND
100 CB5_NC DQ45 203 DDR_A_DQ50 RD76 1 @ 2 0_0603_5%
104 CB6_NC DQ46 204 DDR_A_DQ55 CONN@
97 CB7_NC DQ47 200 FOX_ASAA821-E8SB0-7H~D
DQS8(T) DQS5(T) DDR_A_DQS6 [6]
95 198 2 2
DQS8#(C) DQS5#(C) DDR_A_DQS6# [6]
2

2 @ CD30 @ CD61
DDR_A_DQ41 DDR_A_DQ[40..47] [6]
216 CD29 RD12 .1U_0402_16V7K .1U_0402_16V7K
[6] DDR_A_DM[7..0] DDR_A_DM1 DQ48 DDR_A_DQ45
12 215 .1U_0402_16V7K 1K_0402_1% Swap Cannel_0829A
DDR_A_DM0 33 DM0#/DBI0# DQ49 228 DDR_A_DQ43 1 1
DDR_A_DM2 54 DM1#/DBI1# DQ50 229 DDR_A_DQ42 1
1

DDR_A_DM3 75 DM2#/DBI2# DQ51 211 DDR_A_DQ44


DDR_A_DM4 178 DM3#/DBI3# DQ52 212 DDR_A_DQ40
DDR_A_DM6 199 DM4#/DBI4# DQ53 224 DDR_A_DQ46
DDR_A_DM5 220 DM5#/DBI5# DQ54 225 DDR_A_DQ47
DDR_A_DM7 241 DM6#/DBI6# DQ55 221
DM7#/DBI7# DQS6(T) DDR_A_DQS5 [6]
96 219
DM8#/DBI8# DQS6#(C) DDR_A_DQS5# [6] 1.5K for ES DDR issue / 1K for QS sample
DDR_A_DQ56 DDR_A_DQ[56..63] [6]
VREF traces should be at least 20mils wide
237
DQ56 236 DDR_A_DQ57 20mils spacing to other signals
DQ57 249 DDR_A_DQ58
DQ58 250 DDR_A_DQ59
DQ59 232 DDR_A_DQ60
DQ60 233 DDR_A_DQ61
DQ61 245 DDR_A_DQ62
DQ62 246 DDR_A_DQ63
DQ63 242
DQS7(T) DDR_A_DQS7 [6]
240
DQS7#(C) DDR_A_DQS7# [6]

CONN@
FOX_ASAA821-E8SB0-7H~D

SP07001G90L
Swap Dtat_0831A
4 4
Swap Cannel_0829A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/08/01 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4_DIMMA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 23 of 100
A B C D E
A B C D E

CHANNEL-B Layout Note:


Place near JDIMM2
SPD ADDRESS FOR CHANNEL B :
+3VS_S0 +3VS_S0 +3VS_S0
WRITE ADDRESS:
10uF*8
READ ADDRESS: +1.2V_VDDQ_S3 1uF*8 +1.2V_VDDQ_S3
1 SA0 = 1; SA1 = 0; SA2 = 0.

1
1 330uF*1 +1.2V_VDDQ_S3 1
RD13 RD14 RD15
@ 0_0402_5% @ 0_0402_5% @ 0_0402_5% DDR4 POR OPERATING SPEED: 1867 MT/S

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
1
STRETCH GOAL IS 2133 MT/S

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M
1 1 1 1 1 1 1 1
2

1
SA2_CHB_DIM1 SA1_CHB_DIM1 SA0_CHB_DIM1

CD31

CD32

CD33

CD34

CD35

CD36

CD37

CD38
@ + CD47

CD39

CD40

CD41

CD42

CD43

CD44

CD45

CD46
330U_6.3V_M

2
1

1
2 2 2 2 2 2 2 2 2
RD16 RD17 RD18
@ 0_0402_5% @ 0_0402_5% @ 0_0402_5%
2

2
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM

Layout Note:

(8.0 mm) STD PLACE THE CAP WITHIN 200 MILS


FROM THE JDIMM2
+1.2V_VDDQ_S3 JDIMM2B
STD
+1.2V_VDDQ_S3
Layout Note:
Place near JDIMM2

111 141
112 VDD1 VDD11 142
+0.6V_DDRB_VREFCA_S3 117 VDD2 VDD12 147 +0.6VS_VTT_S0
2.2uF*1 VDD3 VDD13 10uF*1
118 148
JDIMM2A
0.1uF*1 123 VDD4 VDD14 153 1uF*2
DDR_B_DQ5 DDR_B_DQ[0..7] [6] VDD5 VDD15 +0.6VS_VTT_S0
137 STD 8 2 2 124 154
[6] DDR_B_CLK0 CK0(T) DQ0 DDR_B_DQ1 VDD6 VDD16

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M
139 7 CD48 129 159 1 1
[6] DDR_B_CLK0# CK0#(C) DQ1 VDD7 VDD17

1
138 20 DDR_B_DQ2 .1U_0402_16V7K CD49 +3VS_S0 130 160 @
[6] DDR_B_CLK1 CK1(T) DQ2 DDR_B_DQ7 VDD8 VDD18

CD53

CD50

CD51

CD52
140 21 2.2U_0402_6.3V6M 135 163
[6] DDR_B_CLK1# CK1#(C) DQ3 DDR_B_DQ0 1 1 VDD9 VDD19 +2.5V_S3
4 136

2
109 DQ4 3 DDR_B_DQ4 RD77 1 @ 2 0_0603_5% VDD10 2 2
[6] DDR_B_CKE0 CKE0 DQ5 DDR_B_DQ3
110 16 255 258
[6] DDR_B_CKE1 CKE1 DQ6 DDR_B_DQ6 VDDSPD VTT
17
149 DQ7 13 +0.6V_DDRB_VREFCA_S3 164 257

2.2U_0402_6.3V6M
2 [6] DDR_B_CS0# S0# DQS0(T) DDR_B_DQS0 [6] VREFCA VPP1 2
157 11 2 2 259
[6] DDR_B_CS1# S1# DQS0#(C) DDR_B_DQS0# [6] VPP2
162 CD54
S2#/C0 DDR_B_DQ13 DDR_B_DQ[8..15] [6]

CD55
TD4 @ 165 28 .1U_0402_16V7K 1 99
TD3 @ S3#/C1 DQ8 29 DDR_B_DQ9 2 VSS VSS 102
155 DQ9 41 DDR_B_DQ10 1 1 5 VSS VSS 103
[6] DDR_B_ODT0 ODT0 DQ10 DDR_B_DQ15 VSS VSS
161 42 6 106
[6] DDR_B_ODT1 ODT1 DQ11 DDR_B_DQ12 VSS VSS
24 9 107
115 DQ12 25 DDR_B_DQ8 10 VSS VSS 167
[6] DDR_B_BG0 BG0 DQ13 DDR_B_DQ14 VSS VSS
113 38 14 168
[6] DDR_B_BG1 BG1 DQ14 DDR_B_DQ11 VSS VSS
150 37 15 171
[6] DDR_B_BA0 BA0 DQ15 VSS VSS
145 34 18 172
[6] DDR_B_BA1 BA1 DQS1(T) DDR_B_DQS1 [6] VSS VSS
32 19 175

teknisi-indonesia.com
[6] DDR_B_MA[13..0] DDR_B_MA0 DQS1#(C) DDR_B_DQS1# [6] VSS VSS
144 22 176
DDR_B_MA1 133 A0 50 DDR_B_DQ21 DDR_B_DQ[16..23] [6] PLACE NEAR TO PIN 23 VSS VSS 180
DDR_B_MA2 132 A1 DQ16 49 DDR_B_DQ17 26 VSS VSS 181
+1.2V_VDDQ_S3 DDR_B_MA3 131 A2 DQ17 62 DDR_B_DQ20 27 VSS VSS 184
DDR_B_MA4 A3 DQ18 DDR_B_DQ23 VSS VSS Layout Note:
128 63 30 185
@ DDR_B_MA5 126 A4 DQ19 46 DDR_B_DQ19 31 VSS VSS 188 Place near JDIMM2
1K_0402_5% 2 1 RD21 DDR_B_ALERT# DDR_B_MA6 127 A5 DQ20 45 DDR_B_DQ18 35 VSS VSS 189
DDR_B_MA7 122 A6 DQ21 58 DDR_B_DQ22 36 VSS VSS 192
1K_0402_5% 2 1 RD28 DDR_B_EVENT# DDR_B_MA8 125 A7 DQ22 59 DDR_B_DQ16 39 VSS VSS 193
DDR_B_MA9 121 A8 DQ23 55 40 VSS VSS 196
DDR_B_MA10 A9 DQS2(T) DDR_B_DQS2 [6] VSS VSS +2.5V_S3
146 53 43 197 10uF*1
DDR_B_MA11 A10_AP DQS2#(C) DDR_B_DQS2# [6] VSS VSS
120 44 201
DDR_B_MA12 119 A11 70 DDR_B_DQ24 DDR_B_DQ[24..31] [6]
47 VSS VSS 202 1uF*1
DDR_B_MA13 158 A12 DQ24 71 DDR_B_DQ28 48 VSS VSS 205
A13 DQ25 DDR_B_DQ31 VSS VSS

10U_0603_6.3V6M

1U_0201_6.3V6M
151 83 51 206 1
[6] DDR_B_WE# A14_WE# DQ26 VSS VSS

1
156 84 DDR_B_DQ27 52 209
[6] DDR_B_CAS# A15_CAS# DQ27 DDR_B_DQ25 VSS VSS

CD56

CD57
152 66 56 210
[6] DDR_B_RAS# A16_RAS# DQ28 DDR_B_DQ29 VSS VSS
67 57 213

2
114 DQ29 79 DDR_B_DQ30 60 VSS VSS 214 2
[6] DDR_B_ACT# ACT# DQ30 DDR_B_DQ26 VSS VSS
80 61 217
143 DQ31 76 64 VSS VSS 218
[6] DDR_B_PAR DDR_B_ALERT# PARITY DQS3(T) DDR_B_DQS3 [6] VSS VSS
116 74 65 222
[6] DDR_B_ALERT# ALERT# DQS3#(C) DDR_B_DQS3# [6] VSS VSS
134 68 223
[6] DDR_B_EVENT# EVENT# DDR_B_DQ32 DDR_B_DQ[32..39] [6] VSS VSS
108 174 69 226
[6] DDR_B_RST# RESET# DQ32 DDR_B_DQ33 VSS VSS
173 72 227
DQ33 187 DDR_B_DQ34 +1.2V_VDDQ_S3 73 VSS VSS 230
254 DQ34 186 DDR_B_DQ35 77 VSS VSS 231
[9,10,23] I2C_2_SDA SDA DQ35 DDR_B_DQ36 VSS VSS
253 170 78 234
[9,10,23] I2C_2_SCL SCL DQ36 DDR_B_DQ37 VSS VSS
169 81 235
SA2_CHB_DIM1 166 DQ37 183 DDR_B_DQ38 82 VSS VSS 238
SA1_CHB_DIM1 260 SA2 DQ38 182 DDR_B_DQ39 85 VSS VSS 239
SA0_CHB_DIM1 256 SA1 DQ39 179 86 VSS VSS 243
SA0 DQS4(T) DDR_B_DQS4 [6] VSS VSS
3 177 89 244 3
DQS4#(C) DDR_B_DQS4# [6] VSS VSS
2 90 247
92
CB0_NC DQ40
195 DDR_B_DQ47 DDR_B_DQ[40..47] [6]
CD58
DIMM Side 93 VSS
VSS
VSS
VSS
248

2
91 194 DDR_B_DQ44 .1U_0402_16V7K 94 251
101 CB1_NC DQ41 207 DDR_B_DQ42 RD23 98 VSS VSS 252
105 CB2_NC DQ42 208 DDR_B_DQ43 1 VSS VSS
CB3_NC DQ43 DDR_B_DQ41 @ 1K_0402_1%
88 191 +0.6V_DDRB_VREFCA_S3 262 261
87 CB4_NC DQ44 190 DDR_B_DQ45 GND GND

1
100 CB5_NC DQ45 203 DDR_B_DQ46
CB6_NC DQ46 DDR_B_DQ40 @
104 204 CONN@
97 CB7_NC DQ47 200 FOX_ASAA821-H4SB5-7H~D
DQS8(T) DQS5(T) DDR_B_DQS5 [6]
95 198
DQS8#(C) DQS5#(C) DDR_B_DQS5# [6]
DDR_B_DQ48 DDR_B_DQ[48..55] [6]
216 2
[6] DDR_B_DM[7..0] DQ48
2

DDR_B_DM0 12 215 DDR_B_DQ49 CD60


DDR_B_DM1 DM0#/DBI0# DQ49 DDR_B_DQ51 2
33 228 CD59 RD24 .1U_0402_16V7K
DDR_B_DM2 54 DM1#/DBI1# DQ50 229 DDR_B_DQ55 .1U_0402_16V7K
DM2#/DBI2# DQ51 1K_0402_1%
DDR_B_DM3 75 211 DDR_B_DQ52 1
DDR_B_DM4 DM3#/DBI3# DQ52 DDR_B_DQ53 1 @
178 212
@
1

DDR_B_DM5 199 DM4#/DBI4# DQ53 224 DDR_B_DQ54


DDR_B_DM6 DM5#/DBI5# DQ54 DDR_B_DQ50 @
220 225
DDR_B_DM7 241 DM6#/DBI6# DQ55 221
DM7#/DBI7# DQS6(T) DDR_B_DQS6 [6]
96 219
DM8#/DBI8# DQS6#(C) DDR_B_DQS6# [6]

DDR_B_DQ56 DDR_B_DQ[56..63] [6]


237
DQ56 236 DDR_B_DQ57
DQ57 249 DDR_B_DQ59
DQ58 250 DDR_B_DQ58
DQ59 232 DDR_B_DQ60
DQ60 233 DDR_B_DQ61
DQ61 245 DDR_B_DQ63
DQ62 246 DDR_B_DQ62
DQ63 242
DQS7(T) DDR_B_DQS7 [6]
240
DQS7#(C) DDR_B_DQS7# [6]

CONN@
FOX_ASAA821-H4SB5-7H~D

SP07001OK0L
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/08/01 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4_DIMMB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 24 of 100
A B C D E
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 25 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 26 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 27 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 28 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 29 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 30 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 31 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 32 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 33 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

www.teknisi-indonesia.com

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 34 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 35 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 36 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 37 of 100
5 4 3 2 1
5 4 3 2 1

External EEPROM Mode


+3VS_S0 +3VS_DVCCTL_S0 Close to Pin18 Close to Pin22 +3VS_S0 +3VS_AVCCTL_S0 +1.2VS_SW R_S0 +3VS_DVCCTL_S0
Close to Pin5 Close to Pin17
LCV1 LCV2
1 2 1 2
HCB2012KF-221T30_2P @ HCB2012KF-221T30_2P CCV6 CCV7 CCV8 CCV9
1 CCV1 1 CCV2 1 CCV3 1 CCV4 1 CCV5 1 CCV10 1 CCV11 1 CCV12 1 1 1 1

10U_0603_6.3V6M

0.1U_0402_25V6

0.1U_0402_25V6

0.1U_0402_25V6
UCV2

10U_0603_6.3V6M

10U_0603_6.3V6M
0.1U_0402_25V6

0.1U_0402_25V6

0.1U_0402_25V6

10U_0603_6.3V6M

0.1U_0402_25V6

0.1U_0402_25V6
8 1
7 VCC A0 2
2 2 2 2 2 2 2 2 2 2 2 2 EESCL 6 WP A1 3
D SCL A2 D
EESDA 5 4
SDA GND
M24C64-W MN6TP
SA00007NE00
Close to Addr:A8 (1010 100x)
Close to L1 Pin43

Note:
Pin 45,46,47 & 48 Pull-High
+3VS_S0 when External EEPROM Mode.
UCV3

1
35
TXOC+ LVDS_TXOC+ [39]
@ RCV49 60mil 22 36
+3VS_DVCCTL_S0 PVCC TXOC- LVDS_TXOC- [39]
100K_0402_5%
18 41
LVDS_TXO0+ [39]
2
EDP_AUXN_C SWR_VDD TXO0+ 42
EDP_AUXP_C TXO0- LVDS_TXO0- [39]

PWR
40mil 5
+3VS_AVCCTL_S0 DP_V33 39
TXO1+ LVDS_TXO1+ [39]
1

60mil 17 40
+1.2VS_SW R_S0 SWR_LX TXO1- LVDS_TXO1- [39]
@ RCV50 15 37
SWR_VCCK TXO2+ LVDS_TXO2+ [39]
100K_0402_5% 38
TXO2- LVDS_TXO2- [39]
43
2

VCCK 33
TXO3+ LVDS_TXO3+ [39]
11 34
DP_V12 TXO3- LVDS_TXO3- [39]

C 25 C
LVDS_TXEC+ [39]

LVDS
CCV141 2 0.1U_0402_25V6 EDP_TXP0_C 7 TXEC+ 26
[8] EDP_TXP0 EDP_TXN0_C LANE0P TXEC- LVDS_TXEC- [39]
CCV151 2 0.1U_0402_25V6 8
[8] EDP_TXN0 LANE0N 31
EDP_TXP1_C TXE0+ LVDS_TXE0+ [39]
CCV161 2 0.1U_0402_25V6 9 32
From CPU [8] EDP_TXP1
CCV171 2 0.1U_0402_25V6 EDP_TXN1_C 10 LANE1P TXE0- LVDS_TXE0- [39]
[8] EDP_TXN1 LANE1N +3VS_DVCCTL_S0 +3VS_DVCCTL_S0

DP
29
EDP_AUXP_C TXE1+ LVDS_TXE1+ [39]
CCV181 2 0.1U_0402_25V6 4 30
LVDS_TXE1- [39]
[8] EDP_AUXP EDP_AUXN_C AUX-CH_P TXE1-
CCV191 2 0.1U_0402_25V6 3
[8] EDP_AUXN AUX-CH_N

1
27
TXE2+ LVDS_TXE2+ [39]
+3VS_DVCCTL_S0 RCV161 @ 2 1K_0402_5% 1 28
LVDS_TXE2- [39]
DP_HPD_R DP_HPD TXE2- RCV21 RCV22
RCV191 2 1K_0402_5%
[8] EDP_HPD 23 4.7K_0402_5% 4.7K_0402_5%
TXE3+ LVDS_TXE3+ [39]
RCV231 @ 2 100K_0402_5% 24
LVDS_TXE3- [39]

2
TXE3- EESDA EESCL
RCV26 1 @ 2 0_0402_5% PW MIN 21
[8] INVTPW M PWM_IN

1
2 46 EESCL
1 2 UCV3_DP_REXT 12 TESTMODE MIICSCL 45 EESDA
PIN45 @
PIN46
DP_REXT MIICSDA

OTHERS
RCV27 12K_0402_1% RCV28
20 S_ENVDD 4.7K_0402_5%
PANEL_VCC 19 S_INVT_PW M S_ENVDD [39]
S_INVT_PW M [99]

2
MODE_CFG1 48 PWMOUT 44 SC_BKOFF#
MODE_CFG0 47 MODE_CFG1 BL_EN
MODE_CFG0
+3VS_S0
6
DP_GND

0.1U_0402_25V6
RCV30 1 @ 2 0_0402_5% CIISCL 13
To EC [58] EC_SMB_CK2 CIICSCL

GND
RCV31 1 @ 2 0_0402_5% CIISDA 14 16 1
[58] EC_SMB_DA2 CIICSDA SWR_GND CCV13
49 @ +3VS_DVCCTL_S0 +3VS_DVCCTL_S0
PAD
B 2 B

1
RTD2136N-CGT_QFN48_6X6
SA00007A400

VCC
1 RCV32 RCV33
IN1 4 4.7K_0402_5% 4.7K_0402_5%
2 OUT EC_BKOFF# [58,99]

GND
[8] ENBKL

2
IN2

1
UCV4 MODE_CFG0 MODE_CFG1
RCV34 MC74VHC1G08DFT2G_SC70-5

1
SA0000BIP00
100K_0402_5% PIN47 PIN48

3
@
RCV35

2
4.7K_0402_5%

2
Pin 45 Pin 47

0 1 0 1

0 X 0 X EP Mode
A A
Pin 46 Pin 48
1 EP Mode EEPROM 1 ROM EEPROM

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS Converter RTD2136N
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 38 of 100
5 4 3 2 1
5 4 3 2 1

CAMERA
+3VALW_S5 +3VS_S0 +3VS_MIC_S0

0.75A PTC FCA4


1 @ 2
+3VS_S0 +3VS_CAM_S0
FCA1 0.75A_6V_0805L075ULYR
1 2
FCA5
0.75A_6V_0805L075ULYR 1 1 1 2
+3VS_MIC_S0 +3VS_CAM_S0
@ CCA2 CCA7 @EMI@ 0.75A_6V_0805L075ULYR
10U_0603_6.3V6M 0.1U_0402_25V6
2 2
D D

JCAM1
LCA1
1 2 8 10
1 2 USB20_N2_R 7 8 GND
DMIC_DATA [10] USB20_N2 USB20_P2_R 7
RMIC1 1 2 0_0402_5% NONWOV@ [10] USB20_P2
6
[56] INT_DMIC_DATA 4 3 5 6
RMIC2 1 2 0_0402_5% WOV@ 4 3 4 5
[9] SOC_DMIC_DAT0 DMIC_DATA 3 4
DLM0NSN900HY2D_4P
DMIC_CLK 2 3
DMIC_CLK EMI@ 2
RMIC3 1 2 0_0402_5% NONWOV@ 1 9
[56] INT_DMIC_CLK 1 GND
RMIC5 1 2 0_0402_5% WOV@ ACES_87213-0800G
[9] SOC_DMIC_CLK0
CONN@

USB20_N2_R
RMIC4
USB20_P2_R DMIC1 10_0402_1%
3 DMIC_CLK 2 EMI@ 1 DMIC_CLK_EMI
1 3
1 2 DMIC_DATA
2

2
DCA1 ESD@ PESD5V0U2BT_SOT23-3 1 1

2
PESD5V0U2BT_SOT23-3 SCA00000T00 ESD@
SCA00000T00 CMIC1 CMIC2

1
10P_0201_50V8J 10P_0201_50V8J
EMI@ 2 2 EMI@

1
C C

Touch
LVDS

+5VS_S0
0.75A PTC
+5VS_TOUCH_S0
@ FTO1
1 2

0.75A_6V_0805L075ULYR

+LCDVDD_F_S5
FTO2
1 2

0.75A_6V_0805L075ULYR
JLVDS1 1
1
[38] LVDS_TXO0- 1
2 CTO2
[38] LVDS_TXO0+ 2
3 0.1U_0402_25V6
[38] LVDS_TXO1- 3 2
+LCDVDD Current Rating: Max=1500mA 4
[38] LVDS_TXO1+ 4
5
[38] LVDS_TXO2- 5
6
+5VALW_S5 +LCDVDD_F_S5 [38] LVDS_TXO2+ 6
+LCDVDD_S5 LVDS_TXOC-
7
7
8 +5VS_TOUCH_S0
[38] LVDS_TXOC- LVDS_TXOC+ 8
1.5A_PTC 80mil 9
[38] LVDS_TXOC+ 9
UCV5 80mil 10
[38] LVDS_TXO3- 10
B
80mil 1 FCV1 1 2 1.5A_8V_1206L150THWR 11 JTO1 B
VOUT [38] LVDS_TXO3+ 12 11 1
5 [38] LVDS_TXE0- 13 12 1 2 0_0402_5% USB20_N3_R 2 1
1 1 [10] USB20_N3 RTO1 @
VIN [38] LVDS_TXE0+ 13 USB20_P3_R 2
2 14 RTO2 1 @ 2 0_0402_5% 3
GND 14 [10] USB20_P3 3
CCV24 CCV25 15 4 6
[38] LVDS_TXE1- 15 4 6
4 4.7U_0402_6V3M 0.1U_0402_25V6 16 5 7
EN UCV1_FLG 2 2 [38] LVDS_TXE1+ 16 5 7
1 3 17
CCV23 OCB 18 17 ACES_50273-0050N-001
[38] LVDS_TXE2- 19 18
1U_0201_6.3V6M 1 CONN@
[38] LVDS_TXE2+ 19

2
RT9742CGJ5 SOT23-5 CCV26 LVDS_TXEC- 20
2 [38] LVDS_TXEC- LVDS_TXEC+ 20
SA00009SV00 0.1U_0402_25V6 21 DTO1

2
[38] LVDS_TXEC+ 21
2A_Active High @ 22 AZC199-02SPR7G_SOT23-3
2 [38] LVDS_TXE3- 22
23 SC600001600
[38] LVDS_TXE3+ 23

1
24 @ESD@
25 24

1
26 25 31
Main: SA00009SV00 RT9742CGJ5 TSOT23 5P 26 G1
Second: SA00009RN00 UP7549UMA5-20 SOT23 5P 27 32
27 G2
S_ENVDD [38] +LCDVDD_S5 28
28
29
30 29
30
1

1
CCV28 1 1
RCV48 0.1U_0402_25V6 CCV22 CVILU_CF31301D0R4-10-NH
100K_0402_5% @ 680P_0402_50V7K CCV29 @RF@ ME@
2 @ 10P_0201_50V8J
2

2 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS/DMIC/CAM/Touch
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 39 of 100
5 4 3 2 1
A B C D E

LH5

1
CHO3 1 2 0.1U_0402_25V6 HDMIOUT_CLK-_C 4 3 HDMIOUT_R_CK-
[8] APU_DP1_N3 4 3 +5VS_S0 +5VS_HDMI_S0
RHO41 @EMI@
820_0402_1% UHO1 W=40mils
CHO4 1 2 0.1U_0402_25V6 HDMIOUT_CLK+_C 1 2 HDMIOUT_R_CK+
W=40mils 1
[8] APU_DP1_P3 1 2 VOUT
CHO10 1 2 1U_0201_6.3V6M 5

2
DLM0NSN900HY2D_4P VIN 2
SM070005U00 GND
+5VS_HDMI_S0 1 1
EMI@ 2 HO_DI 4 3 +5VS_S0 CHO11
RHO20 100K_0402_5% DIS EN 10U_0603_6.3V6M
1
APL3522_SOT23-5 1
SA00009Y500 2

LH6

1
[8] APU_DP1_N2 CHO7 1 2 0.1U_0402_25V6 HDMIOUT_TX0-_C 1 2 HDMIOUT_R_D0-
1 2 RHO42 @EMI@
820_0402_1%
[8] APU_DP1_P2 CHO6 1 2 0.1U_0402_25V6 HDMIOUT_TX0+_C 4 3 HDMIOUT_R_D0+
4 3

2
+5VS_HDMI_S0

HDMI-OUT Connector
DLM0NSN900HY2D_4P
SM070005U00
EMI@
JHO1
HDMIOUT_R_D2+ 1
2 D2+
HDMIOUT_R_D2- 3 D2_shield
LH7 HDMIOUT_R_D1+ 4 D2-
D1+

1
CHO2 1 2 0.1U_0402_25V6 HDMIOUT_TX1-_C 4 3 HDMIOUT_R_D1- 5
[8] APU_DP1_N1 4 3 HDMIOUT_R_D1- 6 D1_shield
RHO43 @EMI@
820_0402_1% HDMIOUT_R_D0+ 7 D1-
CHO1 1 2 0.1U_0402_25V6 HDMIOUT_TX1+_C 1 2 HDMIOUT_R_D1+ 8 D0+
[8] APU_DP1_P1 1 2 HDMIOUT_R_D0- 9 D0_shield 23

2
DLM0NSN900HY2D_4P HDMIOUT_R_CK+ 10 D0- GND4 22
SM070005U00 11 CK+ GND3 21
EMI@ HDMIOUT_R_CK- 12 CK_shield GND2 20
13 CK- GND1
14 CEC
HDMIOUT_SCLK 15 Reserved
HDMIOUT_SDAT 16 SCL
LH8 17 SDA
DDC/CEC_GND

1
CHO8 1 2 0.1U_0402_25V6 HDMIOUT_TX2-_C 4 3 HDMIOUT_R_D2- 18
[8] APU_DP1_N0 4 3 HDMIOUT_HPD 19 +5V
RHO44 @EMI@
2 820_0402_1% HP_DET 2
CHO9 1 2 0.1U_0402_25V6 HDMIOUT_TX2+_C 1 2 HDMIOUT_R_D2+ LOTES_AHDM0018-P001A
[8] APU_DP1_P0 1 2

3
CONN@

2
DLM0NSN900HY2D_4P DHO2 DHO1

3
SM070005U00 PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3 1
EMI@ SCA00000T00 SCA00000T00

1
ESD@ CHO13 @RF@
ESD@
10P_0201_50V8J

1
2

teknisi-indonesia.com
HDMIOUT_TX1+_C RHO21 1 2 499_0402_1%
HDMIOUT_TX1-_C RHO22 1 2 499_0402_1%

HDMI_Term_CON
HDMIOUT_CLK+_C RHO23 1 2 499_0402_1% +3VS_S0
HDMIOUT_CLK-_C RHO24 1 2 499_0402_1% Close to JHO1

1
HDMIOUT_TX2-_C RHO25 1 2 499_0402_1% QHO3 C RHO32
HDMIOUT_TX2+_C RHO26 1 2 499_0402_1% MMBT3904_NL_SOT23-3 2 HDMI_OUT_DET 1 2 HDMIOUT_HPD
HDMIOUT_TX0+_C RHO27 1 2 499_0402_1% B
HDMIOUT_TX0-_C RHO28 1 2 499_0402_1% E 10K_0402_5%

3
APU_DP1_HPD
[8] APU_DP1_HPD
1

1
D
2
2 RHO45 ESD@
+3VS_S0

1
G QHO1 200K_0402_5% CHO14
S RHO31 .1U_0402_16V7K
3

100K_0402_5% 1
L2N7002W T1G_SC-70-3

2
3 SB00001GE00 3

2
Close to JHO1,<1000mils Length

+3VS_S0 +3VS_S0 +5VS_HDMI_S0 DHO3 DHO4


HDMIOUT_R_D1+ 1 10 HDMIOUT_R_D1+ HDMIOUT_R_D2- 1 10 HDMIOUT_R_D2-
2

HDMIOUT_R_D1- 2 9 HDMIOUT_R_D1- HDMIOUT_R_D2+ 2 9 HDMIOUT_R_D2+


DHO5
HDMIOUT_R_CK+ 4 7 HDMIOUT_R_CK+ HDMIOUT_R_D0+ 4 7 HDMIOUT_R_D0+
RB751V-40_SOD323-2
Pull-High close JHO1 HDMIOUT_R_CK- 5 6 HDMIOUT_R_CK- HDMIOUT_R_D0- 5 6 HDMIOUT_R_D0-
1

+5VS_HDMI_R
3 3
1

1
2

RHO30 RHO29 RHO14 RHO13 8 8


G

2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5%


AZ1043-04F AZ1043-04F
Part Number = SC300001Y00 Part Number = SC300001Y00
2

1 6 HDMIOUT_SDAT ESD@ ESD@


[8] APU_DP1_CTRL_DAT
S

QHO2A
L2N7002SDW 1T1G_SC88-6
5
G

4 4

Close to JHO1 HDMIOUT_SCLK


4 3
[8] APU_DP1_CTRL_CLK
S

QHO2B
L2N7002SDW 1T1G_SC88-6
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI OUT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 40 of 100
A B C D E
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 41 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 42 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 43 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 44 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 45 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 46 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 47 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 48 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

www.teknisi-indonesia.com

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 49 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 50 of 100
5 4 3 2 1
5 4 3 2 1

LED Status
WOL circuit (Connect +3V_LAN to +3VALW) Power ( Decoupling Cap. )

40 mils 60 mils
+3VALW_S5 +3.3V_LAN_S5 +3.3V_LAN_S5
Close to Pin 11,23 +LAN_VDDREG

60mil @ CL1 1 2 .1U_0402_16V7K


RL25 1 2 0_0805_5%
60mil CL2 1 2 .1U_0402_16V7K CL4 1 2 .1U_0402_16V7K

300mA,120ohm @EMI@ CL5 1 2 4.7U_0402_6.3V6M CL6 1 2 .1U_0402_16V7K

UL2 @EMI@ CL8 1 2 4.7U_0402_6.3V6M CL7 1 2 .1U_0402_16V7K


1 RL20 1 2 0_0805_5%
VOUT CL3 1 2 .1U_0402_16V7K CL9 1 2 .1U_0402_16V7K
5 +3VALW_S5
VIN 2
D GND Close to Pin 32 Close to pin 3,8,30,24 D
RL19 1 @ 2 0_0402_5% 4
[58] LAN_PWR_EN# EN# 3 1 2 @EMI@ CL10 1 2 .1U_0402_16V7K
OCB RL18 10K_0402_5%
@EMI@ CL11 1 2 .1U_0402_16V7K
RT9742DGJ5 _SOT23-5
@EMI@ CL21 1 2 .1U_0402_16V7K

Close to Pin 32 on TOP side


+3.3V_LAN rising time (10%~90%) need > 0.5ms and <100ms.
8111G resistor/8111H capacitor
CRL1 CRL4 CRL7
+3.3V_LAN_S5 8111G@ 8111G@ 8111G@
Close to pin 22
+LAN_VDDREG
+LAN_VDDREG

@
CL12 1 2 1U_0201_6.3V6M S RES 1/16W 0 +-5% 0402 S RES 1/16W 0 +-5% 0402 S RES 1/16W 0 +-5% 0402

CL20 1 2 .1U_0402_16V7K CRL2 CRL5 CRL8


8111G@ 8111G@ 8111G@

30

11
32

22
UL1

3
8
CAP close to UL1
S RES 1/16W 0 +-5% 0402 S RES 1/16W 0 +-5% 0402 S RES 1/16W 0 +-5% 0402

AVDD10
AVDD10
AVDD10

AVDD33
AVDD33

DVDD10
CL13 1 2 .1U_0402_16V7K PCIE_ARX_C_DTX_P5 17 1 LAN_MIDI0+ CRL1 1 2 8111H@ 0.1U_0402_25V6 LAN_MIDI0+_C
[7] PCIE_ARX_DTX_P5 PCIE_ARX_C_DTX_N5 HSOP MDIP0 LAN_MIDI0- LAN_MIDI0-_C
[7] PCIE_ARX_DTX_N5 CL14 1 2 .1U_0402_16V7K 18 2 CRL2 1 2 8111H@ 0.1U_0402_25V6 CRL3 CRL6
HSON MDIN0 4 LAN_MIDI1+ CRL3 1 2 8111H@ 0.1U_0402_25V6 LAN_MIDI1+_C 8111G@ 8111G@
PCIE_ATX_C_DRX_P5 13 MDIP1 5 LAN_MIDI1- CRL4 1 2 8111H@ 0.1U_0402_25V6 LAN_MIDI1-_C
[7] PCIE_ATX_C_DRX_P5 PCIE_ATX_C_DRX_N5 HSIP MDIN1 LAN_MIDI2+ LAN_MIDI2+_C
14 6 CRL5 1 2 8111H@ 0.1U_0402_25V6
[7] PCIE_ATX_C_DRX_N5 HSIN MDIP2 LAN_MIDI2- LAN_MIDI2-_C
7 CRL6 1 2 8111H@ 0.1U_0402_25V6 S RES 1/16W 0 +-5% 0402 S RES 1/16W 0 +-5% 0402
CLK_PCIE_LAN 15 MDIN2 9 LAN_MIDI3+ CRL7 1 2 8111H@ 0.1U_0402_25V6 LAN_MIDI3+_C
[10] CLK_PCIE_LAN CLK_PCIE_LAN# REFCLK_P MDIP3 LAN_MIDI3- LAN_MIDI3-_C
Change power source_0828A 16 10 CRL8 1 2 8111H@ 0.1U_0402_25V6
[10] CLK_PCIE_LAN# REFCLK_N MDIN3

+3VS_S0
LAN_CLKREQ#_R 12
CLKREQB
8111G/8111H LAN chip
RL26 1 2 0_0201_5%
[10] APU_LAN_WAKE# LAN_WAKE# LAN_LED_ORG# JRJ1
RL27 1 2 0_0201_5% 21 25 TP@ TL1
[52,58] PCIE_WAKE# LANWAKEB LED2 LAN_PHY_DIS#
26 UL1
LED1/GPIO LAN_LED_YEL# LAN_PHY_DIS# [58]
1 2 ISOLATE# 20 27 TP@ TL2 8111G@
RL3 1K_0402_5% ISOLATEB LED0
C LAN_RST# 19 C
PERSTB +LAN_VDDREG RTL8111G-CG
23 TP@ +3.3V_LAN_S5
+3.3V_LAN_S5 VDDREG
1 2 UL1_RSET_P31 31 24
RL5 2.49K_0402_1% RSET REGOUT TL3

10K_0402_5%
RL6
LAN_RST#

RL13
15K_0402_5%
LAN_X2 29 @ LAN_MIDI0+_C 1
LAN_X1 28 CKXTAL2 33 TD1+ R1
CKXTAL1 GND LAN_MIDI0-_C 2
2

2
@ESD@ LAN_PHY_DIS# TD1- R2
CL22 LAN_MIDI1+_C 3
TD2+ R3
.1U_0402_16V7K RTL8111H-CG_QFN32_4X4
1 8111H@ LAN_MIDI1-_C 4
TD2- R4

1
JRJ1_CT_R5R6 5
1 CT R5
CL17
RL4 @ .1U_0402_16V7K 6
+3.3V_LAN_S5 0_0402_5% EMI@ CT R6
2 LAN_MIDI2+_C 7

2
TD3+ R7
LAN_MIDI2-_C 8
TD3- R8
USD3 LAN_MIDI3+_C 9
5

TD4+ R9
1 LAN_MIDI3-_C 10
P

[9,52,66,68] APU_PCIE_RST# IN1 LAN_RST# TD4- R10


4 DL1
2 O LAN_MIDI0-_C 3 6 LAN_MIDI1-_C
[58] PLT_RST#_LAN
G

IN2 I/O2 I/O4


MS@
3

SA0000BIP00 RL16
MC74VHC1G08DFT2G_SC70-5 2 5 DL1_PWR 1 @ 2 LAN_LED_YEL# 1 2 LAN_LED_YEL#_R 11
GND VDD +3.3V_LAN_S5 L1
Yellow RL7 20mils
0_0402_5% 510_0402_5%
RL33 1 2 0_0402_5% +3.3V_LAN_S5
LAN_MIDI1+_C 1 4 LAN_MIDI0+_C + 13
Non_MS@ I/O1 I/O3 12 GND 14
ESD@ SC300001G00 LAN_LED_YEL# L2 GND
AZC199-04S.R7G SOT23-6 +3.3V_LAN_S5
CONN@

+3VS_S0 +3.3V_LAN_S5 DL2


DC23400BMC0
B LAN_MIDI2-_C 3 6 LAN_MIDI3-_C LAN_GND B

2
I/O2 I/O4
DL3
1

PCH Side pull RL17 PESD5V0U2BT_SOT23-3 RL11 1 2 0_0805_5%


RL10 2 5 DL2_PWR 1 @ 2
high at page 14 LAN_X1 LAN_X2 GND VDD +3.3V_LAN_S5 SCA00000T00
RL8 RL12 1 2 0_0805_5%
10K_0402_5% 0_0402_5% ESD@

1
2
G

QL1 1M_0402_5%
2

LAN_MIDI3+_C 1 4 LAN_MIDI2+_C
3 1 LAN_CLKREQ#_R YL1 I/O1 I/O3
[10] CLKREQ_LAN#
1 2 ESD@ SC300001G00 LAN_GND
S

XTAL0NC AZC199-04S.R7G SOT23-6


L2N7002WT1G_SC-70-3 4 3
SB00001GE00 NC XTAL1
25MHZ_10PF_7V25000014
1 SJ10000E800 1
CL18 CL19
10P_0201_50V8J 10P_0201_50V8J

2 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8111G
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 51 of 100
5 4 3 2 1
A B C D E

WLAN (WIFI/BT Combo)


+3VALW_S5
+3VS_WLAN_S0 +3VALW_S5
CWL3 2 1 1U_0201_6.3V6M
UMS2

1 @ 2 WLAN_PWR_EN_R 3
[58] WLAN_PWR_EN ON
RMS31 0_0402_5% @
1 7 RWL19 1 2 0_0603_5% RWL20 1 2 0_0603_5%
VIN VOUT

CWL2

CWL1
2 8
+3VALW_S5 VIN VOUT
1 1 1 1

4
VBIAS 5
1 GND 2 2
6 9
CT GND

4.7U_0402_6V3M

1U_0201_6.3V6M
CWL57
1U_0201_6.3V6M 1
2 APL3526QBI-TRG_TDFN 8P
CWL60 SA00006R100
2200P_0402_50V7K
2

WLAN Conn.
+3VS_WLAN_S0
NGFF E-KEY +3VS_WLAN_S0

JWLAN1 BT_ON_R 10K_0402_5% 2 @ 1 RWL3


1 2 @RF@ WL_ON_R 10K_0402_5% 2 @ 1 RWL2
RWL1 1 @ 2 0_0402_5% USB20_P7_R 3 GND 3.3VAUX 4 CWL23 1 2 10P_0201_50V8J
[10] USB20_P7 USB20_N7_R USB_D+ 3.3VAUX
[10] USB20_N7 RWL4 1 @ 2 0_0402_5% 5 6
7 USB_D- LED1# 8
9 GND PCM_CLK 10
11 SIDO_CLK PCM_SYNC 12
13 SDIO_CMD PCM_IN 14
15 SDO_DAT0 PCM_OUT 16
2
17 SDO_DAT1 LED2# 18 2
19 SDO_DAT2 GND 20
21 SDO_DAT3 UART_WAKE# 22 UART_0_ARXD_DTXD_R RWL16 1 @ 2 0_0402_5%
SDIO_WAKE# UART_RX UART_0_ARXD_DTXD [10]
23
SDIO_RESET#

24 UART_0_ATXD_DRXD_R RWL15 1 @ 2 0_0402_5%


UART_TX UART_0_ATXD_DRXD [10]
25 26
27 GND UART_CTS 28 Add for EMC_0820D
[7] PCIE_ATX_C_DRX_P4 PETP0 UART_RTS E51_TXD
29 30 E51_TXD [58,72]
[7] PCIE_ATX_C_DRX_N4 PETN0 RESERVED E51_CLK
31 32 E51_CLK [58]
33 GND RESERVED 34 PLT_RST#_WL CWL5 1 2 0.1U_0402_25V6K
[7] PCIE_ARX_DTX_P4 PERP0 RESERVED
[7] PCIE_ARX_DTX_N4 35 36
37 PERN0 COEX3 38 @ESD@
39 GND COEX2 40
[10] CLK_PCIE_WLAN REFCLKP0 COEX1 SUSCLK_WLAN
41 42 RWL9 1 @ 2 0_0402_5% RTC_CLK_R [10,68]
[10] CLK_PCIE_WLAN# REFCLKN0 SUSCLK PLT_RST#_WL
43 44
[10] CLKREQ_WLAN# WLAN_PCIE_WAKE#
45 GND
CLKEQ0#
PERST0#
W_DISABLE2#
46 BT_ON_R
WL_ON_R
RWL10 1 @ 2 0_0402_5% APU_BT_OFF# [10]
ESD
47 48 RWL12 1 @ 2 0_0402_5% APU_WL_OFF# [10]
49 PEWAKE0# W_DISABLE1# 50
RWL17 1 @ 2 0_0402_5% 51 GND I2C_DATA 52
[51,58] PCIE_WAKE# RSRVD/PETP1 I2C_CLK
53 54
RWL18 1 2 0_0402_5% 55 RSRVD/PETN1 ALERT 56
[10] APU_WLAN_WAKE# GND RESERVED
57 58
59 RSRVD/PERP1 RESERVED 60 +3VS_WLAN_S0
61 RSRVD/PERN1 RESERVED 62
63 GND RESERVED 64
65 RESERVED 3.3VAUX 66
67 RESERVED 3.3VAUX
GND USD2
MC74VHC1G08DFT2G_SC70-5
69 68 SA0000BIP00
MTG77 MTG76

5
3 1 3

P
PLT_RST#_WL IN1 APU_PCIE_RST# [9,51,66,68]
CONN@ 4
SP070011H00 O 2 PLT_RST#_WLAN [58]
IN2

G
LOTES_APCI0019-P009A
MS@

3
1
CWL8
0.1U_0402_25V6K
2 RWL21 1 2 0_0402_5%
@ESD@
Non_MS@
8/17 ESD required change to 0.1u

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN (NGFF)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 52 of 100
A B C D E
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 53 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 54 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 55 of 100
5 4 3 2 1
5 4 3 2 1

Codec DVDD FOR MSB


Codec PVDD +3VS_S0 +3VDD_CODEC_S0
Codec DVDD+3VALW_S5 +3VDD_CODEC_S0
Codec AVDD2
NON_MS@
UMS7 MS@
+5VALW_S5 RAC7 1 2 0_0603_5% 1 1 2 +3VALW_S5 +3VS_S0
VOUT

1U_0201_6.3V6M
RAC105 0_0603_5%
+5VS_S0 +5VS_PVDD 5
1

)A
VIN

ro

do
1

.1
V5

04
m0
ce
+3VDD_CODEC_S0

CAC14
2 +1.5VS_CODEC_S0

(
F
C
GND

1
CAC13
.1U_0402_16V7K [58] CODEC_PWR_EN#
1 MS@ 2 4 MS@ RAC111 RAC112

2
NON_MS@ 2 RMS27 0_0402_5% EN# 3 2 1 0_0402_5% 0_0402_5%
RAC13 1 2 0_0805_5% OCB 10K_0402_5% RL24 MS@ NON_MS@

1
MS@ Place near Pin1 RT9742DGJ5 _SOT23-5
RAC110 1 2 0_0805_5% MS@ UAC3
D D
1 RAC14
IN 5 14K_0402_1%
1 OUT
2 1

2
CAC17 GND
1U_0402_6.3V6K 3 4 UAC3_BP CAC18
2 SHDN BP 4.7U_0402_10V6M

1
RT9053AGB_SOT23_5P 2
Codec DVDD-IO Codec CPVDD 1 2
+5VALW_S5 Codec AVDD1 +5VDDA_CODEC_S0 +IOVDD_CODEC_S0 +1.8VALW_S5
+3VDD_CODEC_S0 +3VS_CPVDD
[58,78,86,87,96] SUSP#
RAC108 0_0402_5% RAC18
+3VS_S0 16K_0402_1%
LAC1 CODEC_PWR_EN# 1 @ 2
20mil

2
1 2 +1.8VS_S0 RAC109 0_0402_5%
1 1 FCM1608KF-800T07_0603 RAC8 1 2 0_0402_5%

10U_0402_6.3V6M
1 1 NON_MS@
CAC5 @ 1 1 RAC77 1 @ 2 0_0402_5% RAC114 1 2 0_0603_5%

CAC15
.1U_0402_16V7K CAC7 CAC9
2 2 4.7U_0402_10V6M .1U_0402_16V7K CAC16 +1.5VS_CODEC_S0
2 2
Vout =0.8*[1+(14K/16K)]= 1.50V
CAC4 .1U_0402_16V7K MS@
1U_0402_6.3V6K 2 @ 2 RAC113 1 2 0_0603_5% 1
IQ(typ)=47uA,IQ(max)=57uA
PD =(Vin-Vout)*Iout + Vin*IQ =(5-4.8)*0.005+5*57/1000000 CAC51 @ESD@
Place near Pin9 =0.001+0.000285=0.001285 2
0.1U_0402_25V6K
θ JA= 250° C/W
GNDA PD*θ JA =0.00123*250=0.3075° C

C C

+5VS_PVDD
+5VDDA_CODEC_S0

+MIC2_VREFO_S0
Place near Pin26
Combo JACK

10U_0402_6.3V6M
.1U_0402_16V7K
Place near Pin25 +5VS_PVDD +1.5VS_CODEC_S0
1 1 DAC1

CAC26

CAC27
3
+1.5VS_CODEC_S0_AVDD2
4.7U_0402_6.3V6M

.1U_0402_16V7K

.1U_0402_16V7K

RAC16 1 @ 2 0_0402_5% 1

1
2 1 1 GNDA EMI@ 2 1 CAC11 2
2 2
CAC23

CAC24

CAC25

RAC5 RAC6 1000P_0402_50V7K


CAC28 1 2 10U_0402_6.3V6M GNDA 2.2K_0402_5% 2.2K_0402_5% EMI@ 2 1 CAC12 AZ5125-02S.R7G 3P C/A SOT23
1000P_0402_50V7K ESD@
1 2 2 +IOVDD_CODEC_S0

2
Place near Pin40
GNDA JHP1 CONN@
MIC2-L RAC17 1 EMI@ 2 HCB1608KF-221T25 0603 MIC_L 3
+3VDD_CODEC_S0 +3V3_DSW HP_OUTL 40Mils 1 2 HP_OUTL_R LAC5 1 EMI@ 2 MURATA BLM15BD601SN1D 0402 HPL 1
RAC10 47_0402_5% SM01000LP00
+3VALW_S5_VDD33 STB RAC19 1 @ 2 0_0402_5% GNDA 5
SM01000LP00 HP_DET# 6
+RTCVCC_S5 HP_OUTR 1 2 HP_OUTR_R LAC4 1 EMI@ 2 MURATA BLM15BD601SN1D 0402 HPR 2
MIC2-R RAC9 47_0402_5% RAC15 1 EMI@ 2 HCB1608KF-221T25 0603 MIC_R 4 G 7
41

46

26

40

20
1

UAC1 RAC20 1 2 0_0402_5% 40Mils


DVDD-IO
DVDD

PVDD1

PVDD2

AVDD1

AVDD2

VDD33 STB

SINGA_2SJ3080-056111F

CA
lC
so

680P_0402_50V7K

680P_0402_50V7K
o
Need 600 Ohm 500 mA

1
e
t

.1U_0402_16V7K

.1U_0402_16V7K
1K_0402_5% 1 1 1 1 GNDA
HP_OUTL LINE1_LEFT_R 2 4.7U_0402_10V6M LINE1_LEFT

2
CAC19 EMI@

CAC20 EMI@

CAC22 EMI@

AZ5125-02S.R7G 3P C/A SOT23

CAC52 EMI@
RAC27 1 2 CAC29 1 22 @ @
HP_OUTR RAC34 1 2 LINE1_RIGHT_R CAC30 1 2 4.7U_0402_10V6M LINE1_RIGHT 21 LINE1-L(PORT-C-L) 43
LINE1-R(PORT-C-R) SPK-OUT-L-

DAC3 ESD@
1K_0402_5% 42 @EMI@ @EMI@ RAC11 RAC12
CAC1 1 2 1U_0402_16V6K LINE2_LEFT 24 SPK-OUT-L+ HDA_BITCLK_AUDIO 1 2 HDA_BITCLK_AUDIO_R 1 2 20K_0402_5% 20K_0402_5% 2 2 2 2

2
[57] AMP_FRONT_LEFT CAC2 1 2 1U_0402_16V6K LINE2_RIGHT 23 LINE2-L(PORT-E-L) 45 RAC104 0_0402_5% CAC50 6.8P_0402_50V8C
[57] AMP_FRONT_RIGHT LINE2-R(PORT-E-R) SPK-OUT-R+ 44 DAC2
B
MIC2-L 17 SPK-OUT-R- GNDA GNDA AZ5125-02S.R7G 3P C/A SOT23 B
MIC2-R 18 MIC2-L(PORT-F-L) /RING2 ESD@
MIC2-R(PORT-F-R) /SLEEVE 32 HP_OUTL

1
HP_OUTL_R RAC32 1 2 4.7K_0402_5% LINE1_VREFO-L 31 HPOUT-L(PORT-I-L) 33 HP_OUTR
HP_OUTR_R LINE1_VREFO-R LINE1-VREFO-L HPOUT-R(PORT-I-R)

uq
on
1 2 4.7K_0402_5% 30

se

se
RAC33

oF

ov

e
e

1
LINE1-VREFO-R HDA_SYNC_AUDIO

r
l

t
r

t
10 HDA_SYNC_AUDIO [9]
RAC51 1 EMI@ 2 0_0402_5% INT_DMIC_DATA_R 2 SYNC 6 HDA_BITCLK_AUDIO
[39] INT_DMIC_DATA HDA_BITCLK_AUDIO [9]
LAC6 1 2 BLM15BD221SN1D INT_DMIC_CLK_R 3 GPIO0/DMIC-DATA BCLK GNDA
[39] INT_DMIC_CLK EMI@ GPIO1/DMIC-CLK RAC115 1 2 0_0402_5%

47 5 HDA_SDOUT_AUDIO RAC116 1 2 0_0402_5%


[9] HDA_RST_AUDIO#
HDA_RST_AUDIO# 11 PDB
RESETB
ALC233-VB2-CG SDATA-OUT
SDATA-IN
8 HDA_SDIN0_AUDIO 1 2
HDA_SDOUT_AUDIO
HDA_SDIN0 [9]
[9]
CAC49 1 2 .1U_0402_16V7K 4 RAC23 33_0402_5%
DC DET 15
INT_DMIC_DATA_R @ESD@ PC_BEEP 12 SPDIFO/FRONT JD(JD3)/GPIO3 48 DE_POP RAC24 1 @ 2 0_0402_5%
INT_DMIC_CLK_R PCBEEP SPDIF-OUT/GPIO2 +3VDD_CODEC_S0
1 1 HP_DET# 1 2 SENSEA
14
13 MIC2/LINE2 JD(JD2) MONO-OUT
16 RAC29 1 @ 2 0_0402_5% PC Beep
CAC47 @EMI@ CAC33 EMI@ RAC26 200K_0402_1% HP/LINE1 JD(JD1) 29 RAC30 1 @ 2 0_0402_5%
MIC2-VREFO +MIC2_VREFO_S0
8.2P_0402_50V8D 220P_0402_50V8J CBP 37
2 2 CAC35 1 21U_0402_6.3V6M CBN 35 CBP 7 LDO3 CAC36 1 210U_0402_6.3V6M RAC31 1 @ 2 0_0402_5% 1 RAC60 2 CODEC_EAPD CAC48
CBN LDO3-CAP CODEC_EAPD [58] RAC49 PCH_SPKR_C PC_BEEP
39 LDO2 CAC37 1 210U_0402_6.3V6M [9] HDA_SPKR 1 2 1 2
LDO2-CAP 27 LDO1 CAC38 1 210U_0402_6.3V6M 10K_0402_5%
LDO1-CAP 1K_0402_5%

1
D
+3VS_CPVDD 36 RAC28 1 2 100K_0402_5% @EMI@ 1 2 .1U_0402_16V7K
CPVDD DE_POP

1
CAC39 1 210U_0402_6.3V6M CAC43 .1U_0402_16V7K 2 1
+3VDD_CODEC_S0 28 UAC1_VREF 1 2 @EMI@ 1 2 G QDA2 @
VREF

1
100K_0402_5%
CAC40 2.2U_0402_16V6K GNDA CAC44 .1U_0402_16V7K S RAC50 CAC31

3
RAC64
EMI@ 1 2 L2N7002WT1G_SC-70-3 10K_0402_5% 100P_0201_50V8J
2 1 SENSEA CAC41 1 2 MICCAP_P19 19 34 CPVEE CAC45 .1U_0402_16V7K SB00001GE00 2 @

2
RAC25 100K_0402_1% MIC-CAP CPVEE EMI@ 1 2
10U_0402_6.3V6M CAC46 .1U_0402_16V7K

2
2

49 25 CAC42
Thermal PAD AVSS1 38 1U_0201_6.3V6M
1

AVSS2
ALC233-VB2-CG_MQFN48_6X6
GND GNDA
GNDA
A GNDA A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec_ALC233
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 56 of 100
5 4 3 2 1
1 2 3 4 5

LAA1
OUTPL 1 2 SPKL+
1 FCM1608KF-300T07_2P
1
AMP_EMI@
@AMP_EMI@ CAA1 CAA2
680P_0402_50V7K 1500P_0402_50V7K
2 2 AMP_EMI@
A OUTPL_EMI A
+12VS_S0

1
+12V_AMP_S5
RAA1
@AMP_EMI@ 10_0603_5%
40 mil LAA2 40 mil
1 2

2
HCB1608KF-121T30_0603 1

220U_16V_M
CAA5
+

teknisi-indonesia.com
+12V_AMP_S5 +12V_AMP_S5

2
LAA4
OUTNL 1 2 SPKL-
1 1 1 1 1 FCM1608KF-300T07_2P
1
CAA10 CAA11 CAA28 CAA21 AMP_EMI@
0.1U_0402_25V6 10U_0805_25V6K 0.1U_0402_25V6 10U_0805_25V6K @AMP_EMI@ CAA12 CAA13
680P_0402_50V7K 1500P_0402_50V7K
2 2 2 2 2 2 AMP_EMI@
OUTNL_EMI

1
APA6003 for Speaker (CRB) RAA2
@AMP_EMI@ 10_0603_5%

15
16

27
28
Change to 32dB UAA1
+12V_AMP_S5 in INV 14 26 BSPL 1 2 CAA32 0.22U_0402_25V6K

RPVDD
RPVDD

LPVDD
LPVDD

2
MONO LBSP
1
[58] AMP_PD# 1 2 100K_0402_5% SD#
RAA20
2

@ @ 2
RAA12 RAA13 FAULT# 25 OUTPL LAA5
B 100K_0402_5% 100K_0402_5% RAA27 1 2 10K_0402_1% AMP_FRONT_LEFT_R_C 1 2 0.1U_0402_25V6 AMP_FRONT_LEFT_R 3 LOUTP OUTPR 1 2 SPKR+ B
[56] AMP_FRONT_LEFT LINP
CAA30 1 FCM1608KF-300T07_2P
1
RAA29 1 2 3.74K_0402_1% 1 2 AMP_L_C_N_1 1 2 AMP_L_C_N 4 23 OUTNL AMP_EMI@
GNDA GNDA
2 1

2 1

AMP_GAIN0 AMP_GAIN1 RAA28 2.8K_0402_1% CAA31 0.1U_0402_25V6 LINN LOUTN @AMP_EMI@ CAA19 CAA20
APA2621RI-TRG 680P_0402_50V7K 1500P_0402_50V7K
RAA18 RAA19 RAA34 1 2 10K_0402_1% AMP_FRONT_RIGHT_R_C1 2 0.1U_0402_25V6 AMP_FRONT_RIGHT_R 12 2 2 AMP_EMI@
[56] AMP_FRONT_RIGHT RINP OUTPR_EMI
100K_0402_5% 100K_0402_5% CAA41
RAA35 1 2 3.74K_0402_1% 1 2 AMP_R_C_N_1 1 2 AMP_R_C_N 11 22 BSNL 1 2 CAA34 0.22U_0402_25V6K
GNDA GNDA RINN LBSN

1
RAA33 2.8K_0402_1% CAA39 0.1U_0402_25V6
1

RAA30 1 2 10_0603_5% +APA_AVDD 7 21 BSNR 1 2 CAA37 0.22U_0402_25V6K RAA7


+12V_AMP_S5 AVDD RBSN @AMP_EMI@ 10_0603_5%
CAA36 1 @ 2 1U_0402_25V6K
GNDA

2
INPUT 8 20 OUTNR
GNDA AGND ROUTN
GAIN1 GAIN0 AV(inv) IMPEDANCE
GNDA CAA351 2 1U_0402_10V6K 18 OUTPR
ROUTP
0 0 20dB 60Kohm
CAA381 2 1U_0402_10V6K +VCLAMP 9 LAA6
1 2 88.7K_0402_1% VCLAMP OUTNR 1 2 SPKR-
0 1 26dB 30Kohm GNDA RAA321 2 RAA31 PLIMIT 10 1 FCM1608KF-300T07_2P
1
20K_0402_1% PLIMIT 17 BSPR 1 2 CAA40 0.22U_0402_25V6K AMP_EMI@
AMP_GAIN0 5 RBSP @AMP_EMI@ CAA25 CAA27
GAIN0

PGND
PGND
1 0 32dB 15Kohm 13 680P_0402_50V7K 1500P_0402_50V7K

GND
AMP_GAIN1 6 FREQ 2 2 AMP_EMI@
GAIN1
SA00008YH00 APA2621RI-TRG_TSSOP28 OUTNR_EMI
1 1 36dB 9Kohm

19
24
29

1
RAA14
C @AMP_EMI@ 10_0603_5% C
CAA441 2 0.1U_0402_25V6
EMI@

2
GND GNDA

JSPK1
SPKR- 1
SPKR+ 2 1
SPKL- 3 2
SPKL+ 4 3 Speaker Conn.
4
3Wx2 4ohm Speaker
5
6 GND
GND
CONN@
SP02000ZS00

2
DAA2 DAA1
PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3
@ESD@ @ESD@

1
D D

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Amp APA6003
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 57 of 100
1 2 3 4 5
A B C D E

Place closely UEC1


LPC_CLK0_EC EC_SPI_CLK 2Mb SPI ROM +3V3_EC_DSW

1
@EMI@ @EMI@ EC_SPI_HOLD# REC7 1 2 4.7K_0402_5%
REC2 REC15 EC_SPI_WP# REC8 1 2 4.7K_0402_5%
10_0402_5% 10_0402_5%

2
REC2_CEC13 REC15_CEC8 +3V3_EC_DSW CEC1
1 1 .1U_0402_16V7K
@EMI@ EMI@ UEC2 1 2
CEC13 CEC8 +3V3_EC_DSW +EC_AVCC EC_SPI_CS# 1 8
6.8P_0402_50V8C 33P_0402_50V8J +3V3_DSW +3V3_EC_DSW EC_SPI_DO 2 CS# VCC 7 EC_SPI_HOLD#
2 2 EC_SPI_WP# 3 DO HOLD# 6 EC_SPI_CLK
V1.0 update +EC_AVCC WP# CLK EC_SPI_DI
REC1 1 @ 2 0_0603_5% 1 2 4 5
GND DI

CEC2 .1U_0402_16V7K

CEC3 .1U_0402_16V7K

CEC6 .1U_0402_16V7K
1 1 1 1 1 1 LEC1 FCM1608KF-800T07_0603
EC_RSMRST#

CEC7 .1U_0402_16V7K
1 2 +RTCVCC_S5
1
ESD@ +3VS_S0 REC5 1 @ 2 0_0603_5% W25X20CLSNIG_SO8
1
CEC14 5P_0402_50V8C CEC5 CEC4 @ SA00003GM30
@ESD@ 1 2 VR_ON 10U_0603_6.3V6M REC3 1 @ 2 0_0603_5%+RTC_EC_S5 10U_0603_6.3V6M

EC_3VCC_P1
2 2 2 2 2 2

.1U_0402_16V7K
CEC17 .1U_0402_16V7K 1 1
PWR_ON_LED# +3V3_DSW

CEC10
ESD@ 2 1
CEC18 100P_0201_50V8J 1 @ 2 @ EC_SPI_CLK_R REC61 1 EMI@ 2 22_0402_5% EC_SPI_CLK
ESD@ 2 1 ON/OFF# REC6 0_0603_5% CEC9 EC_SPI_DO_R REC62 1 @ 2 0_0402_5% EC_SPI_DO
CEC15 100P_0201_50V8J 10U_0603_6.3V6M 2 2 EC_SPI_DI_R REC63 1 @ 2 0_0402_5% EC_SPI_DI
@ESD@ 2 1 LPC_RST#_R ECAGND EC_SPI_CS#_R REC64 1 @ 2 0_0402_5% EC_SPI_CS#

108
119
CEC16 0.1U_0402_25V6K

99

24
46
85
1
UEC1

3VCC
VBAT

VTT
3VSB
3VSB
3VSB

AVSB
126 EC_THERMTRIP#
GPIO81 / PWMOUT / TACHIN / USB_LED PCIE_WAKE# EC_THERMTRIP# [8]
27 127
KB_RST# 28 GA20 / SPI_WP# / GPIO11 KBC Interface PWM GPIO82 / PWMOUT / TACHIN / TACHPWM 3 FAN_SPEED PCIE_WAKE# [51,52]
[10] KB_RST# LPC_FRAME# KBRST# / SPI_HOLD# / GPIO12 PWMOUT / TACHIN / GPIO00 / TACHPWM FAN_PWM FAN_SPEED [77]
[10] LPC_FRAME# 25 4
LPC_AD3 LFRAME# PWMOUT / TACHIN / GPIO01 / TACHPWM FAN_PWM [77]
[10] LPC_AD3 20
LPC_AD2 21 LAD3 96 AMDPWR_EN REC9 1 2 4.7K_0402_5%
[10] LPC_AD2 LAD2 CIRTX1/(AMDPWR_EN) / CIRTX1 / GPIO05
AD Voltage Range:
LPC_AD1 22 Strapping 103 PANEL_ID2
[10] LPC_AD1 LPC_AD0 LAD1 TACHIN / PWMOUT / GPIO83 PANEL_ID3 PANEL_ID2 [99] 0 to 2.048 V
+3VS_S0 23 LPC & MISC 104
[10] LPC_AD0 LAD0 TACHIN / PWMOUT / GPIO84 PANEL_ID3 [99]
SERIRQ 19
[10] SERIRQ SERIRQ#
18
EC_SCI# 65 LDRQ# / GPIO10 105 EC_AD_BID REC10 1 2 10K_0402_5% AD_BID
[10] EC_SCI# PME# / GPEN02 V_COMP0 / THR0 / VIN0
1

LPC_CLK0_EC 17 114
[10] LPC_CLK0_EC LPC_RST#_R PCICLK V_COMP1 / THR1 / VIN1 CUST_TEMP1 [77]
REC13 26 115
[10] LPC_RST#_R LRESET# V_COMP2 / THR2 / VIN2 CUST_TEMP2 [77]
4.7K_0402_5% 116 CUST_TEMP3 [77]
AD Input V_COMP3 / THR3 / VIN3 111
29 THR16 / VIN16 / TD2P 112 Add for THM requirement_0822A
LPC Address Select:
2

EC_SIO_SEL 30 CTSA# / CIRRX / GPIO20 THR15 / VIN15 / TD1P 113


0: 2Eh/2Fh EC_SIO_SEL DSRA# / CIRWB / GPIO21 THR14 / VIN14 / TD0P
1: 4Eh/4Fh 31
RTSA# / CIRTX1 / GPIO22 (2E_4E_SEL) Strapping
1

HWACPI_DIS 32
E51_RXD DTRA# / CIRTX2 / GPIO23 (DIS_HWACPI) Strapping PANEL_ID0
REC16 @ 33 2
[72] E51_RXD E51_TXD 34 SINA / GPIO24 SMI# / OVT# / GPIO85 55 LAN_PHY_DIS# PANEL_ID0 [99]
4.7K_0402_5% [52,72] E51_TXD SOUTA_P80 / SOUTA / GPIO25 STB# / GPIO13 / GRN_LED LAN_PHY_DIS# [51]
35 100 SD_PWR_EN#
36 DCDA# / GPIO26 GPIO67 / CASEOPEN# 15 SD_PWR_EN# [70]
2

RIA# / GPIO27 Serial Port Interface GPIO80


5
7 USB_D+ 6 EC_USBDP [71]
VGATE USB
[88] VGATE PANEL_ID1 CTSB# / TACHIN / PWMOUT / GPIO50 USB_D- EC_USBDN [71]
2 8 2
[99] PANEL_ID1 EC_1.8V_EN 9 DSRB# / TACHIN / PWMOUT / GPIO51 56 EC_DB_SO 1 2 USB_BIOS_MISO
REC51 33_0402_5% USB_BIOS_MISO [73]
[97] EC_1.8V_EN 3V5V_PG RTSB# / TACHIN / PWMOUT / GPIO52 MCLK / MCU_TDI / DB_SO / USB_MISO EC_DB_SI USB_BIOS_CS#
10 KBC Interface 57 REC52 1 2 33_0402_5% USB_BIOS_CS# [73]
[78,85] 3V5V_PG USB2_VCCA_EN# DTRB# / TACHIN / PWMOUT / GPIO53 MDAT / MCU_TDO / DB_SI / DB_TX / USB_CS# EC_DB_SCK USB_BIOS_CLK
11 58 REC53 1 2 33_0402_5%
+3VS_S0 [73] USB2_VCCA_EN# IRRX / SINB / TACHIN / PWMOUT / GPIO54 MCU_TCK / DB_SCK / KCLK / USB_SCK EC_DB_SCE# USB_BIOS_MOSI USB_BIOS_CLK [73]
SYSON 12 59 REC54 1 2 33_0402_5%
[78,86] SYSON VR_ON IRTX / SOUTB / TACHIN / PWMOUT / GPIO55 DB_RX / MCU_TMS / DB_SCE# / KDAT / USB_MOSI USB_BIOS_MOSI [73]
13
[88] VR_ON 14 DCDB# / TACHIN / PWMOUT / GPIO56 122
EC_SMB_DA0 [72] USB_KDBG_DET EC_SPI_DI_R RIB# / TACHIN / PWMOUT / GPIO57 TACHIN / PWMOUT / TACHPWM / GPIO03 LATCH_INA300 RESET_APL3573_EC [82]
REC71 1 2 1K_0402_5% 67 123
EC_SPI_DO_R 68 SO1<MOSI> MSDA1 / VCORE_EN / GPIO76 (s) 121 H_PROCHOT#_EC LATCH_INA300 [82]
REC70 1 2 1K_0402_5% EC_SMB_CK0 EC_SPI_CLK_R 69 SI1<MISO> SPI Flash ROM TACHIN / PWMOUT / TACHPWM / GPIO02 128 USB3_VCCA_EN#
EC_SPI_CS#_R SCK1 MSCL1 / VLDT_EN / GPIO75 (s) USB3_VCCA_EN# [71]
66
REC36 1 2 2.2K_0402_5% EC_SMB_DA2 95 SCE1# 38
98 GPIO70 / TACHIN / PWMOUT / CIRRX SLCT / GPIO30 / YLW_LED 39 SUSP
TACHIN / PWMOUT / CIRWB / GPIO71 P2_DGL# / PE / GPIO31 SUSP [78]
REC37 1 2 2.2K_0402_5% EC_SMB_CK2 124 40
[52] WLAN_PWR_EN 125 GPIO72 / TACHIN / PWMOUT / CIRTX1 / TACHPWM P2_DGL# / BUSY / GPIO32 41 EC_0.75V_EN [87]
GPIO73 SUSP#
TEC2 TP@ E51_CLK GPIO73 / TACHIN / PWMOUT / CIRTX2 / TACHPWM P2_DGH# / ACK# / GPIO33 EC_BKOFF# SUSP# [56,78,86,87,96]
REC57 1 @ 2 10K_0402_5% SERIRQ 37 42 EC_BKOFF# [38,99]
[52] E51_CLK EC_RTCRST 102 GPIO74 / TACHIN / PWMOUT / TACHPWM P2_DGH# / PD7 / GPIO34 43 PWR_ON_LED#
[11] EC_RTCRST GPIO77 / SKTOCC# LED_A / PD6 / GPIO35 PWR_ON_LED# [77]
44
LED_B / PD5 / GPIO36 45 AMP_PD#
+3VALW_S5 118 Intel PECI/PWR Fault GPIO LED_C / PD4 / GPIO37 AMP_PD# [57]
120 AMDSIC / PWR_FAULT# & 47
AMDSID / PECI AMD SB-TSI Int LED_D / PD3 / GPIO40 / CSOUT# 48 PM_CLKRUN#_R 1 2 0_0402_5% PLT_RST#_LAN [51] +3V3_EC_DSW
REC48 @ PM_CLKRUN# [10]
REC72 1 2 10K_0402_5% EC_RSMRST# LED_E / PD2 / GPIO41 / CHPST_MOSI 49 ALERT#_APL3573
LED_F / PD1 / GPIO42 ALERT#_APL3573 [82]
REC56 1 2 10K_0402_5% EC_SCI# 50

1
REC76 1 2 10K_0402_5% PCIE_WAKE# EC_SMB_DA0 76 LED_G / PD0 / GPIO43 / CHPST_SCK 51 CODEC_EAPD
[8] EC_SMB_DA0 EC_SMB_CK0 GPIO62 / MSDA0 P1_DGL# / SLIN# / GPIO44 CODEC_EAPD [56]
@ 75 SM Bus 52 Ra
[8] EC_SMB_CK0 GPIO63 / MSCL0 P1_DGL# / INIT# / GPIO45 / CHPST_MISO 53 1.8VS_PWR_EN [78]
REC11
P1_DGH# / ERR# / GPIO46 54 PANEL_ID4 HW_12V_EN [96] (100K) 100K_0402_5%
P1_DGH# / AFD# / GPIO47 / CHPST_CS# PANEL_ID4 [99]
ON/OFF# 61
[77] ON/OFF#

2
PBTN_OUT# 60 PSIN# / GPEN04 97 EC_PCHVSB 1 REC28 2 4.7K_0402_5%
+3V3_EC_DSW [9] PBTN_OUT# EC_RSMRST# PSOUT# / GPEN03 PCHVSB +3V3_EC_DSW AD_BID
[9] EC_RSMRST# 101 93
PM_SLP_S3# 64 RSMRST# / GPEN17 GPIO90 / SUSWARN# 92 SMART_PWRON# [71]
[9] PM_SLP_S3# SLP_S3# / GPEN01 5VDUAL

1
PM_SLP_S5# 84 DSW 90 EC_CRISIS
[9,10,78] PM_SLP_S5# SLP_S5# / GPEN06 GPIO91 / SUSWARN_5VDUAL EC_CRISIS_KSO0
REC27 1 2 SUSP 80 ACPI 91 Rb REC14
[68] SSD1_PWR_EN 73 ATXPGD / GPEN10 GPIO92 / SUSACK# 89 LAN_PWR_EN#
10K_0402_5% 150K_0402_5%
83 GPEN16 / DPWROK SLP_SUS# / GPIO93 / 3VSBSW# 88 EC_5V_EN LAN_PWR_EN# [51] (Max:150k)
1 2 HWACPI_DIS [56] CODEC_PWR_EN# 74 RESETCON# / GPEN05 GPIO94 / SLP_SUS_FET EC_5V_EN [78,85]
REC22
[52] PLT_RST#_WLAN

2
4.7K_0402_5% USB3_VCCB_EN# 79 GPIO95 / BKFD_CUT 109
3 [72] USB3_VCCB_EN# EC_SMB_DA2 RSTOUT0# / GPEN11 VCORE / THR5 / VIN5 IADMON_APL3573 3
78 106
EC_CRISIS [38] EC_SMB_DA2 EC_SMB_CK2 GPEN12 / RSTOUT1# / MSDA2 VLDT / THR6 / VIN6 IADMON_APL3573 [82]
REC23 1 2 77 107
[38] EC_SMB_CK2 GPEN13 / RSTOUT2# / MSCL2 VDIMM / THR7 / VIN7 PWR_0.75V_PG
4.7K_0402_5% AMD Power-On 63 PWR_0.75V_PG [87]
Sequence PSON# / AMD_PSON# / GPEN00 SYS_PWRGD_EC
EC_XIN PWROK0 / AMD_PWROK0 / GPEN14
81
SYS_PWRGD_EC [9] EVT(v0.1) : 30K Ohm : 0.76V
REC25 1 2 SYSON 87 82
4.7K_0402_5% EC_XOUT 86 XIN PWROK1 / AMD_PWROK1 / GPEN15 0.75VS_PWR_EN [78] DVT(v0.2) : 56K Ohm : 1.18V
XOUT PVT(v0.4) : 150K Ohm : 1.98V
REC26 1 2 VR_ON 70 MP(v1.0) : 100K Ohm : 1.67V
10K_0402_5% 71 DEEP_S5_0 / 3VSBSW / LATCH_BKFD_CUT / GPIO66 110
3VSBSW# / LATCH_BKFD_CUT# / GPEN07 VREF EC_PAD_CAP +EC_VREF
72 62
DEEPS5_1 / CASEOPEN1# PAD_CAP
AGND

REC29 1 2 SUSP# 1 1
VSS

VSS

10K_0402_5%
CEC19 CEC20 ESD required
NCT6685D_LQFP128_14X14 4.7U_0402_6.3V6M 4.7U_0402_6.3V6M
16

94

117

2 2 EC_BKOFF# 1 2 @ESD@
LEC2 CEC32 100P_0201_50V8J
1 2
FCM1608KF-800T07_0603 IADMON_APL3573 1 2 @ESD@
CEC31 0.1U_0402_25V6K
EC_SMB_CK2 REC39 1 @ 2 0_0402_5% EC_SMLCLK_BL [99]
Will impact AD function_0919A
EC_SMB_DA2 REC40 1 @ 2 0_0402_5%
EC_SMLDAT_BL [99]
ECAGND +3VS_S0 1 2 @ESD@
1 1 CEC35 0.1U_0402_25V6K
1 2 @ESD@
CEC26 CEC27 CEC36 0.1U_0402_25V6K
100P_0201_50V8J 100P_0201_50V8J +3VALW_S5
1 2 @ESD@
2 2 CEC37 0.1U_0402_25V6K
SUSP# 1 2 @ESD@
CEC38 0.1U_0402_25V6K

EC_XOUT 1 2 EC_XIN
REC38 1M_0402_5%
Move Panel ID pull high REC74 1 @ 2 0_0402_5%
[82,88] VR_HOT# H_PROCHOT# [8]
YEC1
resister from scaler to EC +3V3_DSW
4 1 4

1
1 2 D
@
OSC NC PANEL_ID0 REC65 1 2 10K_0402_5% H_PROCHOT#_EC 2 QEC1 CEC28
4 3 PANEL_ID1 REC66 1 2 10K_0402_5% G 47P_0402_50V8J
AC in-->One touch -->Power button--> Clear CMOS NC OSC PANEL_ID2 REC67 1 2 10K_0402_5% 2N7002BKW_SOT323-3 2
EC DEBUG port S

3
Always short-->AC in-->Power button--> Crisis 14.31818MHZ_12PF_X3G01431ADC1H PANEL_ID3 REC68 1 2 10K_0402_5% Add for ID4_0823A
JCRIS1 Reserve REC34 for EC debug. PANEL_ID4 REC75 1 2 10K_0402_5%
EC_CRISIS_KSO0 1 1
1
EC_CRISIS 2 1 REC34 CEC29 CEC30
2 1 2 E51_TXD 15P_0201_50V8J 15P_0201_50V8J
2 2
CVI_CH31022M107-0P
100K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
CONN@ 2019/07/26 2018/10/01 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC NCT6685
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 58 of 100
A B C D E
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 59 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 60 of 100
5 4 3 2 1
5 4 3 2 1

SMBus Block Diagram


2.2K

2.2K +3VS_S0 253 JDIMM1


SMBUS Address [ 0xA0 ]
I2C2_SCL APU_SCLK0 254
AN12
AP12 I2C2_SDA APU_SDATA0 253 JDIMM1
D SMBUS Address [ 0xA0 ] D
254
+3VS_S0

1K

1K
APU
EC
B22 EC_SMB_CK0 EC_SMB_CK0 75 NCT6685D
D22 EC_SMB_DA0 EC_SMB_DA0 76

2.2K

+3VS_S0 2.2K
0R EC_SMB_CK2 EC_SMB_CK2 77
13 CIISCL
SMBUS Address [ 0x94 ] UCV3 RTD2136N
0R EC_SMB_DA2 EC_SMB_DA2 78
14 CIISDA
DP to VGA

C C

14 EC_SMLCLK_BL 0R
PCU1
SMBUS Address [ 0x62 ] RT8549GQW 15 EC_SMLDAT_BL 0R

System clock and Reset map


PLT_RST#

EC LPC_CLK0_EC

B B
APU_PCIE_RST#/TPM_SPI_RST#

TPM APU_SPI_CLK/TPM_SPI_CLK
AMD
Renoir CLK_PCIE_LAN/#
FP6 LAN
APU_PCIE_RST#

CLK_WLAN/#
APU_PCIE_RST#/PLT_RST#_WLAN
Wire LAN
CLK_SSD/#
APU_PCIE_RST#/AUX_RESET#
SSD

32.768K MHz
A A

48M MHz

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SMBus block diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 61 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 62 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 63 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 64 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 65 of 100
5 4 3 2 1
5 4 3 2 1

TPM 2.0 Co-lay

1.Nuvton_NPCT750LAAYX
2.ST_ST33HTPH2E32AAE8
3.Infineon_SLB 9670 NEW PART: Nuvoton NPCT650LBAYX ( Default )
D Infineon SLB 9670 D

ST ST33HTPH2E32AAE8
+1.8VS_TPM_S0

1 TPM@ 2 TPM_SPI_CS2#
RTP2 10K_0402_5%
1 TPM@ 2 TPM_SIRQ#
RTP3 4.7K_0402_5%
+1.8VS_TPM_S0 +1.8VS_S0
RTP13 1 TPM@ 2 33_0402_5% TPM_MISO
[10] APU_SPI_MISO
RTP14 1 TPM@ 2 33_0402_5% TPM_MOSI
[10] APU_SPI_MOSI
RTP16 1 TPM@ 2 33_0402_5% TPM_SPI_CLK +1.8VS_TPM_S0 UTP1 Nuvton@
[9,10]
[10]
APU_SPI_CLK_R
APU_SPI_TPMCS2# RTP32 1 @ 2 33_0402_5% TPM_SPI_CS2# 1 RTP23 1 @ 2 0_0402_5% 20 mils RTP7 1 2 0_0402_5%
29 VSB TPM@
30 SDA/GPIO0 8 RTP24 1 @ 2 0_0402_5%
GPIO1/SCL VHIO 1 1 1 1
+1.8VALW _S5

CTP3
10U_0402_6.3V6M

TPM@
CTP2
.1U_0402_16V7K

TPM@
CTP1
.1U_0402_16V7K

TPM@
CTP6
.1U_0402_16V7K

Infineon@
Close to Pin14
Infineon@ 22
1 2 6 VHIO
RTP31 4.7K_0402_5% GPIO3 2 RTP27 1 @ 2 0_0402_5%
NC
1

@ TPM_MISO 24 3 2 2 2 2
RC176 TPM_MOSI 21 MISO NC 5 Infineon@
TPM@ 1 2 TPM@ TPM_SIRQ# 18 MOSI/GPIO7 NC 7 RTP22 1 2 0_0402_5% UTP1_PP
10K_0402_5% [10] TPM_STSIRQ# SPI_IRQ#/GPIO2 NC
RTP20 1 2 0_0402_5% RTP4 0_0402_5% 9 RTP28 1 2 0_0402_5%
NC 10 Infineon@
2

TPM_SPI_CLK 19 NC 11
1 3 TPM_SPI_CS2# 20 SCLK NC 12
D

[10] APU_SPI_TPMCS# SCS#/GPIO5 NC


C QTP1 TPM_SPI_RST# 17 14 RTP30 1 2 0_0402_5% C
BSS138PW 1N SOT323-3 @ 27 RESET# NC 15 Infineon@
13 NC NC 26 RTP23
G
2

GPIO4/SINT# NC 25 Infineon@ RTP24


NC 28 Infineon@
+1.8VS_TPM_S0 NC SD028000080
4 31 SD028000080
PP/GPIO6 NC 32 RTP29 1 Infineon@2 0_0402_5%
NC 0_0402_5%
0_0402_5%
16 RTP26 1 @ 2 0_0402_5%
GND 23 RTP25 1 @ 2 0_0402_5% RTP23
GND 33 Nuvton@ RTP24
PGND Nuvton@
SD028000080
NPCT750JAAYX_QFN32_5X5 SD028000080
0_0402_5%
0_0402_5%

TPM_SPI_CLK RTP25 RTP27


+1.8VS_TPM_S0 Infineon@ Infineon@
SD028000080 SD028000080
2

RTP26
2

RTP5 Infineon@ 0_0402_5% 0_0402_5%


@ 10_0402_5% SD028000080
RTP11 @EMI@ RTP27
10K_0402_5% 0_0402_5% RTP25 ST@
TPM_SPICLK 1

Nuvton@ SD028000080
1

UTP1_PP
SD028000080
RTP26 0_0402_5%
2

Infineon@ Modify to Correct co-lay SCH_0830A Nuvton@ 0_0402_5%


B RTP12 B
SD028000080
4.7K_0402_5% 2
CTP4
10P_0201_50V8J
0_0402_5% TPM/TCM IC
1

@EMI@
1
UTP1 UTP1
ST@ Infineon@
SA00009SO40 SA00009N260
ST_ST33HTPH2E32AHB4(SPI) Infineon_SLB 9670(SPI)
+1.8VS_TPM_S0
(Default)
1

UTP2 TPM@
Pop / Un-pop For Co-lay RTP22 RTP23 RTP24 RTP25 RTP26 RTP27 RTP28 RTP29 BOM Config
1 5 RTP18 TPM@
NC VCC 10K_0402_5%
APU_PCIE_RST# 2
Nuvton_NPCT650LBAYX(SPI) X V V V V X X X Nuvton@+TPM@
[9,51,52,68] APU_PCIE_RST#
2

IN A 4 TPM_SPI_RST#
3 OUT Y
GND ST_ST33HTPH2E32AAE8(SPI) V X X X X V X X ST@+TPM@
1
NL17SZ07DFT2G_SC70-5 CTP5
SA0000BIO00 .1U_0402_16V7K Infineon_SLB 9670(SPI) V V V V V V V V Infineon@+TPM@
@ESD@
2
RTP19 1 @ 2 0_0402_5%
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN (NGFF)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 66 of 100
5 4 3 2 1
A B C D E

SATA HDD Conn. SATA ODD FFC Conn

1 +5VS_S0 +5VS_S0_SATA 1
JPDC6
@
1 2
1 2
JUMP_43X39

Place CAP close to


JODD <100mil
JODD1
JHDD1 1
14 COD7 1 2 0.01U_0402_50V7K SATA_ATX_C_DRX_P1 2 1
Place CAP close to 13 GND [7] SATA_ATX_DRX_P1
COD6 1 2 0.01U_0402_50V7K SATA_ATX_C_DRX_N1 3 2
GND [7] SATA_ATX_DRX_N1 3
JHDD1 <100mil SATA_ARX_C_DTX_N1
4
4
12 [7] SATA_ARX_DTX_N1 COD8 1 2 0.01U_0402_50V7K 5
CHD10 1 2 0.01U_0402_50V7K SATA_ATX_C_DRX_P0 11 12 COD9 1 2 0.01U_0402_50V7K SATA_ARX_C_DTX_P1 6 5
[7] SATA_ATX_DRX_P0 SATA_ATX_C_DRX_N0 11 [7] SATA_ARX_DTX_P1 6
[7] SATA_ATX_DRX_N0 CHD9 1 2 0.01U_0402_50V7K 10 7
2 10 7 2
9 8
CHD12 1 2 0.01U_0402_50V7K SATA_ARX_C_DTX_N0 8 9 9 8
[7] SATA_ARX_DTX_N0 CHD11 1 2 0.01U_0402_50V7K SATA_ARX_C_DTX_P0 7 8 +5VS_S0_SATA 10 9
[7] SATA_ARX_DTX_P0 6 7 11 10
SATA_DEVSLP 5 6 2.5A 100mil 12 11
4 5 13 12
+5VS_S0_SATA 3 4 14 13
2 3 15 14
2 1 1 15

@EMI@
33P_0402_50V8J
COD4

10U_0603_6.3V6M
COD1
1 16
1 17 16
1 1 1 1 17
10U_0603_6.3V6M
CHD1

0.1U_0402_25V6
CHD2

@EMI@ @EMI@ CVILU_CF5012FD0R0-05-NH 18


2 2 18
0.1U_0402_25V6
CHD3

33P_0402_50V8J
CHD7 19
CONN@
20 GND
2 2 2 2 GND
ACES_50506-01841-P01
ME@

3 3

+5VS_S0
2

BSS138PW 1N SOT323-3
www.teknisi-indonesia.com
G

@
QHD3 1 3 SATA_DEVSLP
[9] DEVSLP0
D

RHD19
33K_0402_1%

@
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 67 of 100
A B C D E
D

1.0
Re v

100
of
67
Compal Electronics, Inc.

Sheet
1

1
Friday, March 27, 2020
LA-J561P
Document Number
PIR-HW
Custom

Date:
Title

Size
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
2020/7/31

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 62 62 62 62 62 62
/3 /3 /3 /3 /3 /3 /3 /3 /3 /3 /3 /3 /3 /3 /3 /3 /3 /3 /3 /3 /3
Date

0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/ 0/
02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02
02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02 02

Deciphered Date
Compal Secret Data
2

2
2020/7/31
t
Reason for change

tr tr tr tr tr tr tr tr tr tr tr tr tr tr tr tr tr tr tr mh
oh oh oh oh oh oh oh oh oh oh oh oh oh oh oh oh oh oh oh o0
s- s- s- s- s- s- s- s- s- s- s- s- s- s- s- s- s- s- s- t
R R R R R R R R R R R R R R R R R R R uo

Security Classification
MP for HW

ot ot ot ot ot ot ot ot ot ot ot ot ot ot ot ot ot ot ot ba
m m m m m m m m m m m m m m m m m m m k

Issued Date
ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ca
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 b mh
eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg o0
na na na na na na na na na na na na na na na na na na na na d
hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC dA
3

3
t
ro t
t
4

4
t t ro
ro hs
ro ro hs
hs -R
hs hs -R
-R o o
-R t -R
o o o t
t t 50 t 47 t
Note Color Version change list (P.I.R. List)

13 89 1C t 13 CE ro t
5C R
, R
, hs ro
CA ro CA
R
, 40 hs t 46 -R hs
R t R
,0 68 1C -R ro ,0 CE o -R
5C R
, hs ro R
, t o
3C o tr 3C t .m
R
, 30 t -R tr h s 36 73 tr
AR oh AR 82 ho
oh -R oh
Modify List

, 58 1C 72 s- o , CE SU
R
, t t s- o R
, CD s- 0
92 5C DR R ro t 92 R
, tr o
R
, 20 ,6 13 R 63 R
, R t
CA ot CA 26
11 1C 7 VC
hs ot 13 t t 31 oh ot t 25 .m
R 2D -R R CE SU s- 5
R
, R
, 9 SM R
, ro ro tr ro
,4 1C R
, 1D o ,4 R
, CD R CE SU ho
R
, 10 R
, 03 t 1L R, 23 hs hs R
, oh hs
2C 6D R
, 4L 2C 04 ot s- R
, R 0
37 1C R
, 61 -R -R 2C 6 -R t
AR VC 2O 71 AR CE SU o o R 3C o dn
, R
, R
, , R
, R
, t t t a
CR 5D DR TR LR WR DR 7D ot ER uo
61 ,4 00 R
, ,5 62 ,1 ,6 ,1 61 93 95 13 25 ,1 R
, 7 ,1 37 13 ba
CA 6C 1C 4D 1D VC OT 1L L W CA CE SU SU SU CD 7D 7D CE SU SU 2
R R R R R R R R R R R R R R R R R R R R 7S
eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg eg UR
na na na na na na na na na na na na na na na na na na na na d
hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC hC dA

72,73
5

5
Page

08
09
10
23
24
38
39
51
52
56
58
71
72
73
78
23
24
58
72

72
72
72
Item

10
11
12
13
14
15
16
17
18
19
20
21
22
23
1
2
3
4
5
6
7
8
9
D

A
5 4 3 2 1

SSD (TYPE M)
+3VALW_S5
MS@ FOR MSB
D 1U_0201_6.3V6M 2 1 CSSD9 D
UMS3 +3VS_SSD1 +3VS_S0 +3VS_SSD1
MS@
RSSD12 2 1 0_0402_5% 3
[58] SSD1_PWR_EN ON USSD1
1 7 RSSD10 2 1 0_0805_5% MC74VHC1G08DFT2G_SC70-5
VIN VOUT SA0000BIP00

5
2 8 NON_MS@ MS@
+3VALW_S5 VIN VOUT 1

P
[9] AUX_RESET# IN1 PLT_RST_SSD1#
4
2 O
[9,51,52,66] APU_PCIE_RST# IN2

G
4

0.1U_0402_25V6
VBIAS 1 1

1
5

3
GND

CSSD55
6 9 CSSD56 @
CT GND 10U_0603_6.3V6M RSSD3
2 2 100K_0402_5%
1 1
CSSD10 APL3526QBI-TRG_TDFN 8P

2
1U_0201_6.3V6M CSSD54 SA00006R100
MS@ 2200P_0402_50V7KMS@ RSSD8 2 1 0_0402_5%
2 2 MS@
NON_MS@

+3VS_SSD1

C C

JSSD1 CONN@
1 2
3 GND1 3.3VAUX_2 4
PCIE_ARX_DTX_N0 GND3 3.3VAUX_4

0.01U_0402_16V7K

0.1U_0201_10V6K

10U_0402_6.3V6M

10U_0402_6.3V6M
5 6
[7] PCIE_ARX_DTX_N0 PCIE_ARX_DTX_P0 7 PERn3 N/C6 8 1 1 1 1
[7] PCIE_ARX_DTX_P0 PERp3 N/C8

CSSD1

CSSD2

CSSD3

CSSD4@
9 10
PCIE_ATX_C_DRX_N0 11 GND9 DAS/DSS# 12
[7] PCIE_ATX_C_DRX_N0 PCIE_ATX_C_DRX_P0 13 PETn3 3.3VAUX_12 14
[7] PCIE_ATX_C_DRX_P0 PETp3 3.3VAUX_14 2 2 2 2
15 16
PCIE_ARX_DTX_N1 17 GND15 3.3VAUX_16 18
[7] PCIE_ARX_DTX_N1 PCIE_ARX_DTX_P1 19 PERn2 3.3VAUX_18 20
[7] PCIE_ARX_DTX_P1 21 PERp2 N/C20 22
PCIE_ATX_C_DRX_N1 23 GND21 N/C22 24
SSD PCIE [7] PCIE_ATX_C_DRX_N1 PCIE_ATX_C_DRX_P1 25 PETn2 N/C24 26
[7] PCIE_ATX_C_DRX_P1 27 PETp2 N/C26 28
PCIE_ARX_DTX_N2 29 GND27 N/C28 30
[7] PCIE_ARX_DTX_N2 PCIE_ARX_DTX_P2 PERn1 N/C30
31 32
[7] PCIE_ARX_DTX_P2 PERp1 N/C32
33 34
PCIE_ATX_C_DRX_N2 35 GND33 N/C34 36
[7] PCIE_ATX_C_DRX_N2 PCIE_ATX_C_DRX_P2 PETn1 N/C36
37 38 DEVSLP1
[7] PCIE_ATX_C_DRX_P2 PETp1 DEVSLP DEVSLP1 [9]
39 40
PCIE_ARX_DTX_P3 41 GND39 N/C40 42
[7] PCIE_ARX_DTX_P3 PCIE_ARX_DTX_N3 43 PERn0/SATA B+ N/C42 44
[7] PCIE_ARX_DTX_N3 PERp0/SATA B- N/C44
45 46
SSD SATA PCIE_ATX_C_DRX_N3 47 GND45 N/C46 48
[7] PCIE_ATX_C_DRX_N3 PCIE_ATX_C_DRX_P3 PETn0/SATA A- N/C48 PLT_RST_SSD1#
B
[7] PCIE_ATX_C_DRX_P3 49 50 B
51 PETp0/SATA A+ PERST# 52
53 GND51 CLKREQ# 54 CLKREQ_SSD1# [10]
RSSD14 2 @ 1 0_0402_5%
[10] CLK_PCIE_SSD1# REFCLKn PEW ake# APU_PCIE_WAKE# [9]
55 56
[10] CLK_PCIE_SSD1 57 REFCLKp N/C56 58
GND57 N/C58

67 68 RSSD13 2 @ 1 0_0402_5%
PCIE_DET 69 N/C67 SUSCLK 70 RTC_CLK_R [10,52]
PEDET (PCIE_DET) 71 PEDET 3.3VAUX_70 72
+3VS_SSD1 73 GND71 3.3VAUX_72 74
SATA Device GND 75 GND73 3.3VAUX_74
GND75
PCIe Device Open 77 76
MTG77 MTG76
79 78
NPTH79 NPTH78
2

PCIE_DET1 LOTES_APCI0107-P001A +3VS_SSD1


PCIE_DET1 [9]
RSSD2
delet net for NPTH pin_0903B RSSD15
10K_0402_5%
PEDET (SATA_CP0) DEVSLP1 1 2
L : PCIE
1

10K_0402_5%
H : SATA
1

D
PCIE_DET 2
G S TR L2N7002SWT1G 1N SC-70-3
QSSD1
S
3

SB00001GE00
A A

Security Classification
2019/07/26
Compal Secret Data
2020/05/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NGFF SSD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 68 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 69 of 100
5 4 3 2 1
5 4 3 2 1

FOR MSB +3VALW_S5 +3VS_CR


+3VS_S0 +3VS_CR
@
1 2 NON_MS@ +3V_CR
RCR10 0_0603_5% RCR1 1 2 0_0402_5%
Close to JCR1
D UCR2 1 1 1 D

4.7U_0402_6.3V6M
CCR2

0.1U_0402_16V4Z
CCR3
1 CCR4 CCR5
VOUT SD_CLK
+3VALW_S5 CCR1 @ESD@ 1 1

4.7U_0402_6.3V6M

0.1U_0402_16V4Z
5 0.1U_0402_25V6K
VIN

1
2 2 2 2
MS@ GND RCR5
1 2 4 MS@
8/17 ESD required 2 2
[58] SD_PWR_EN# EN# 10_0402_5%
RCR6 0_0402_5% 3 2 1 @EMI@
OCB 10K_0402_5% RCR7

2
RT9742DGJ5 _SOT23-5 CCR10_EMI
MS@ 1
CCR4,CCR5 place close to JCR1.6 CCR10
6.8P_0402_50V8C
@EMI@ 2

C C

@EMI@ +3V_CR
RCR8 1 2 0_0402_5% +3V_CR +1.8V_CR JCR1 CONN@
40mil 6
LCR1 EMI@ SD_CMD 4 VDD
1 2 UCR1 SD_CLK 7 CMD
[10] USB20_N6 1 2 USB20_N6_R CLK
3 1 5
USB20_P6_R DM AV18 VSS

1U_0201_6.3V6M
4 7 8
4 3 DP CARD_3V3 CCR6 1U_0201_6.3V6M VSS
[10] USB20_P6 4 3 1
SD_CD# 10 16 SDREG 1 2 SD_D0 9

CCR7
DLM0NSN900HY2D_4P 15 SD_CD# SDREG SD_D1 10 DAT0
MS_INS# 11 SD_WP_R 1 EMI@ 2 SD_WP SD_D2 2 DAT1
RCR9 1 2 0_0402_5% 9 SP1 13 SD_D0 RCR2 33_0402_5% 2 SD_D3 3 DAT2
@EMI@ SD_D1 12 GPIO SP2 14 CD/DAT3
SD_DAT1 SP3 17
CR_RREF 2 SP4 18 SD_CLK_R 1 EMI@ 2 SD_CLK SD_WP 11 12
RREF SP5 1 WP_SW GND
B 5 19 RCR4 33_0402_5% SD_CD# 1 13 B
+3VS_CR 3V3_IN1 SP6 SD_CMD CD_SW GND
6 20 1 CCR8 EMI@
3V3_IN2 SP7
2

8 21 6.8P_0402_50V8C
RCR3 3V3_IN3 SP8 22 SD_D3 CCR9 EMI@ 2 T-SOL_156-2001902600
24 SP9 23 SD_D2 6.8P_0402_50V8C DC021512091
6.2K_0402_1% 48MHz_In SP10 2
25
1

GND
RTS5140-GR QFN 24P

A A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CardReader RTS5140
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 70 of 100
5 4 3 2 1
5 4 3 2 1

Rear USB3.1 Gen2


SMART_PWON
For SMART Power on
H D = D2
D
L D = D1 +3V3_DSW
D

USB20_N1 RUS61 1 @ 2 0_0402_5% USB20_N1_R


1
USB20_P1 RUS60 1 @ 2 0_0402_5% USB20_P1_R
CUS34
0.1U_0402_16V7K
2
UUH4 change selet pin to SMART_PWRON# for EC control 0209
EC_USBDP RUS59 1 @ 2 0_0402_5% EC_USBDP_R UUH4 SMART@
[58] EC_USBDP
1 10
EC_USBDN RUS32 1 @ 2 0_0402_5% EC_USBDN_R 2 1D+ VCC 9
[58] EC_USBDN 1D- S USB20_P1_R SMART_PW RON# [58]
[10] USB20_P1 3 8
4 2D+ D+ 7 USB20_N1_R
[10] USB20_N1 2D- D-
5 6
CUH12 CUH13 GND OE#
1 1 NX3DV221GM_XQFN10U10_2X1P55

1
RUH7 RUH8 SMART@
@ @

0.1U_0402_16V7K

0.1U_0402_16V7K
SMART@ 2 2 SMART@ @SMART@
USB20_P1_R RUS62 1 2 100K_0402_5%

15K_0402_5%

15K_0402_5%
2

2
@SMART@
USB20_N1_R RUS63 1 2 100K_0402_5%

C C

@EMI@
RUS64 1 2 0_0402_5%

+USB3_VCCA_S5
LUS1 EMI@
USB20_N1_R 3 4 USB20_N1_L @RF@
3 4 1 2
USB2.0 USB20_P1_R 2 1 USB20_P1_L
CUS24 10P_0201_50V8J

+USB3_VCCA_S5 2 1
DLM0NSN900HY2D_4P W=80mil
Add for AMD suggestion_0904B RUS65 1 2 0_0402_5% JUSB4
2

@EMI@ 1
DUS1 2 VBUS
2

@ESD@ 3 D-
AZC199-02SPR7G_SOT23-3 4 D+
2 0.33U_0402_10V6K USB3_ARX_R_DTX_N1 GND
1

CUS30 1 5
[10] USB3_ARX_DTX_N1 CUS31 1 2 0.33U_0402_10V6K USB3_ARX_R_DTX_P1 6 SSRX-
1

[10] USB3_ARX_DTX_P1 7 SSRX+


8 GND_DRAIN
9 SSTX-
USB3.1 10
SSTX+

11 GND
B 12 GND B
13 GND
+USB3_VCCA_S5 1 2 USB3_ATX_C_DRX_N1 RUS36 1 @ USB3_ATX_L_DRX_N1
2 0_0402_5% GND
[10] USB3_ATX_DRX_N1 CUS26 0.22U_0402_6.3V6K CONN@
W=80mils
1 2 USB3_ATX_C_DRX_P1 RUS37 1 @ USB3_ATX_L_DRX_P1
2 0_0402_5%
SP011412192
@ [10] USB3_ATX_DRX_P1 CUS27 0.22U_0402_6.3V6K
100U_1206_6.3V6M

47U_0805_6.3V6M

47U_0805_6.3V6M

0.1U_0402_25V6

1 1
1

1
CUS11

CUS12

CUS13

CUS14

+5VALW _S5
2.0A
2

2 2
UUS1 DUS2 ESD@ DUS3 ESD@
1 1 10 USB3_ARX_R_DTX_N1 1 10 USB3_ARX_R_DTX_N1
VOUT
CUS101 2 0.1U_0402_25V6
W=80mils 5 2 9 USB3_ARX_R_DTX_P1 2 9 USB3_ARX_R_DTX_P1
VIN 2
GND USB20_N1_L 4 7 USB20_N1_L USB3_ATX_L_DRX_N1 4 7 USB3_ATX_L_DRX_N1
USB3_VCCA_EN# 4
[58] USB3_VCCA_EN# EN# 3 RUS72 2 1 0_0402_5% USB20_P1_L 5 6 USB20_P1_L USB3_ATX_L_DRX_P1 5 6 USB3_ATX_L_DRX_P1
OCB USB_OC1# [10,72]
3 3
RT9742DGJ5 _SOT23-5
Main: SA00009R300 RT9742DGJ5 TSOT23 5P 8 8
Second: SA00009RN00 UP7549UMA5-20 SOT23 5P
AZ1023-04F AZ1023-04F
Part Number = SC300001Y00 Part Number = SC300005D00

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
REAR USB3.1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 71 of 100
5 4 3 2 1
5 4 3 2 1

Side USB3.1 Gen2


BYPASS R USB MUX Selection
KDBG_MUX_SEL Output
+USB3_VCCB_S5 USB20_P5 USB20_P5_R
+3VALW_S5 +3VALW_S5 H D = D2
RUS44 1 @ 2 0_0402_5%
USB20_N5 RUS45 1 @ 2 0_0402_5% USB20_N5_R
W=80mils L D = D1

1
1
@ RUS58

100U_1206_6.3V6M

47U_0805_6.3V6M

47U_0805_6.3V6M

0.1U_0402_25V6
CUS7 10K_0402_5%
1 1
For WIN 7 Debug

1
CUS21

CUS20

CUS19

CUS23
0.1U_0402_25V6
D +5VALW_S5 2 D

2
2.0A

2
2 2 UUS3
1 2 0_0402_5% UART_0_CTXD_R1_DRXD 1 10 KDBG_MUX_SEL [9]
UUS2 [52,58] E51_TXD RUS9 @
1 RUS12 1 @ 2 0_0402_5% UART_0_CRXD_R1_DTXD 2 1D+ VCC 9
[58] E51_RXD

1
VOUT 3 1D- S 8 USB20_P5_R D
CUS22 1 2 0.1U_0402_25V6
W=80mils 5 [10] USB20_P5 4 2D+ D+ 7 USB20_N5_R 2 USB_KDBG_DET
VIN [10] USB20_N5 2D- D- USB_KDBG_DET [58]
2 5 6 QUS2 G

1
GND GND OE#
S 1

3
USB3_VCCB_EN# 4 NX3DV221GM_XQFN10U10_2X1P55 L2N7002WT1G_SC-70-3 RUS110
[58] USB3_VCCB_EN# EN# 3 USB_OC1#_R2 RUS31 2 1 0_0402_5% SB00001GE00 100K_0402_5% CUS51
OCB USB_OC1# [10,71]
0.1U_0402_25V6
2 @ESD@

2
RT9742DGJ5 _SOT23-5
Main: SA00009R300 RT9742DGJ5 TSOT23 5P
Second: SA00009RN00 UP7549UMA5-20 SOT23 5P

@EMI@
RUS66 1 2 0_0402_5%

LUS4 EMI@ +USB3_VCCB_S5


USB20_N5_R 2 1 USB20_N5_L
2 1 @RF@
USB2.0 USB20_P5_R 3 4 USB20_P5_L CUS25
1 2
10P_0201_50V8J
3 4
DLM0NSN900HY2D_4P W=80mil
RUS67 1 2 0_0402_5%
+3VS_S0 +3VS_U3RD JUSB3 CONN@
@EMI@ 1
2 VBUS
+3VS_U3RD +3VS_U3RD +3VS_U3RD +3VS_U3RD +3VS_U3RD +3VS_U3RD 3 D-
23mA D+
RUS73 1 @ 2 0_0603_5% 4
USB3_ARX_DTX_N2_CONN 5 GND
C C
1

1
USB3_ARX_DTX_P2_CONN SSRX-

CUS49

CUS41
6 10
USB_KDBG_DET SSRX+ GND

CUS50
4.7K_0402_5% 4.7K_0402_5% @ 4.7K_0402_5% @ 4.7K_0402_5% @ 4.7K_0402_5% @ 4.7K_0402_5% 7 11
@ RUS92 @ RUS93 RUS94 RUS96 RUS97 RUS95 USB3_ATX_DRX_N2_CONN 8 GND GND 12
1
USB3.1

1
USB3_ATX_DRX_P2_CONN 9 SSTX- GND 13
LS@ LS@ LS@ SSTX+ GND
2

2
U3RD_EQA U3RD_FGA U3RD_SWA U3RD_EQB U3RD_FGB U3RD_SWB

0.01U_0402_16V7K

1U_0402_6.3V6K

1U_0402_6.3V6K
LOTES_ABA-USB-249-P02

2
2
1

1
4.7K_0402_5% 4.7K_0402_5% @ 4.7K_0402_5% @ 4.7K_0402_5% @ 4.7K_0402_5% @ 4.7K_0402_5%
LS@ @
RUS98 RUS99 RUS100 RUS102 RUS103 RUS101
2

+3VS_U3RD teknisi-indonesia.com
10
16
25
1

UUS4
VDD
VDD
VDD
VDD

LS@ LS@
USB3_ATX_DRX_P2 CUS43 1 2 0.22U_0402_6.3V6K USB3_ATX_C_RD_DRX_P2 2 23 USB3_ATX_RD_C_DRX_N2 CUS28 1 2 0.22U_0402_6.3V6K USB3_ATX_DRX_N2_CONN
[10] USB3_ATX_DRX_P2 USB3_ATX_DRX_N2 CUS44 1 2 0.22U_0402_6.3V6K USB3_ATX_C_RD_DRX_N2 3 AIP AON 24 USB3_ATX_RD_C_DRX_P2 CUS29 1 2 0.22U_0402_6.3V6K USB3_ATX_DRX_P2_CONN
[10] USB3_ATX_DRX_N2 LS@ AIN AOP LS@ +3VS_U3RD +3VS_U3RD
LS@ LS@
USB3_ARX_DTX_P2 CUS45 1 2 0.22U_0402_6.3V6K USB3_ARX_C_RD_DTX_P2 8 17 USB3_ARX_RD_R_DTX_N2 CUS33 1 2 0.33U_0402_10V6K USB3_ARX_DTX_N2_CONN
B [10] USB3_ARX_DTX_P2 USB3_ARX_DTX_N2 CUS46 1 2 0.22U_0402_6.3V6K USB3_ARX_C_RD_DTX_N2 9 BON BIP 18 USB3_ARX_RD_R_DTX_P2 CUS32 1 2 0.33U_0402_10V6K USB3_ARX_DTX_P2_CONN B
[10] USB3_ARX_DTX_N2 LS@ BOP BIN LS@

2
1
RUS104 RUS105
U3RD_FGA 27 26 U3RD_EQA RUS108 LS@ LS@
1K_0402_1% 1K_0402_1%

1
FGA EQA 220K_0402_5%
U3RD_FGB 14 15 U3RD_EQB LS@

1
FGB EQB RUS109 U3RD_EN U3RD_RXDET_EN

2
U3RD_SWA 29 11 U3RD_RXDET_EN 220K_0402_5%
SWA RXDET_EN LS@

2
U3RD_SWB 12 30 U3RD_EN
SWB EN RUS106 RUS107
@ 1K_0402_1% @ 1K_0402_1%
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

PI3EQX1002BZLEX_TQFN30_2P5X4P5
LS@

1
SA00009TP00
4
5
6
7
13
19
20
21
22
28
31

+USB3_VCCB_S5 DUS5 DUS6


USB20_N5_L 1 10 USB20_N5_L USB3_ARX_DTX_N2_CONN 1 10 USB3_ARX_DTX_N2_CONN

USB20_P5_L 2 9 USB20_P5_L USB3_ARX_DTX_P2_CONN 2 9 USB3_ARX_DTX_P2_CONN


2

DUS4 4 7 USB3_ATX_DRX_N2_CONN 4 7 USB3_ATX_DRX_N2_CONN


2

@ESD@
AZC199-02SPR7G_SOT23-3 5 6 USB3_ATX_DRX_P2_CONN 5 6 USB3_ATX_DRX_P2_CONN
1

3 3
1

8 8
A A
AZ1023-04F AZ1023-04F
Part Number = SC300001Y00 Part Number = SC300005D00
ESD@ ESD@

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SIDE USB3.1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 72 of 100
5 4 3 2 1
A B C D E

1 1

+USB2_VCCA_S3

RUS68
@EMI@
1 2 0_0402_5%
USB2.0 Conn.
LUH1 EMI@ JUSB1
USB20_N0 4 3 1
[10] USB20_N0 4 3 USB20_N0_L VBUS
2
2 USB20_P0_L 3 D- 2
USB20_P0 1 2 4 D+
[10] USB20_P0 1 2 GND
5
[58] USB_BIOS_CLK SSRX-
SM070005U00 6
DLM0NSN900HY2D_4P
[58] USB_BIOS_MOSI
7 SSRX+ For EC Tool
8 GND_DRAIN
[58] USB_BIOS_MISO SSTX-
RUS69 1 2 0_0402_5% [58] USB_BIOS_CS# 9
@EMI@ SSTX+
10
+USB2_VCCA_S3 11 GND
12 GND
13 GND
GND
+5VALW_S5 CONN@

0.1U_0402_25V6

0.1U_0402_25V6

220U_6.3V_ESR15M_6.3X6
1 SP011412192

CUH10

CUH11

CUH9
1 1
+
W=40mils
2 2 2
1
CUS18 UUH1 W=40mils
0.1U_0402_25V6 1
2 VOUT
5
VIN 2
GND
4
[58] USB2_VCCA_EN# EN# UUH1_OC#
3 RUS52 2 1 0_0402_5% USB_OC0# [10]
OCB

RT9742DGJ5 _SOT23-5
+USB2_VCCA_S3

3 @EMI@ 3

RUS71 1 2 0_0402_5% JUSB2


1 5
LUH2 EMI@ VCC GND
3 4 USB20_N4_L 2 6
[10] USB20_N4 3 4 D- GND
USB20_P4_L 3 7
2 1 D+ GND
[10] USB20_P4 2 1 4 8
SM070005U00 GND GND
DLM0NSN900HY2D_4P
ATOB_061-UA1D-D001
RUS70 1 2 0_0402_5% CONN@
@EMI@

+USB2_VCCA_S3 DUH2
USB20_P0_L 1 10 USB20_P0_L

USB20_N0_L 2 9 USB20_N0_L

3
DUH1 USB20_N4_L 4 7 USB20_N4_L

3
@ESD@
USB20_P4_L 5 6 USB20_P4_L

1
1 3
AZC199-02SPR7G_SOT23-3
8
4 4
AZ1043-04F
Part Number = SC300001Y00
ESD@

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Rear USB2.0 x 2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 73 of 100
A B C D E
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 74 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 75 of 100
5 4 3 2 1
5 4 3 2 1

Screw Hole

D D

FD3 & FD4 in bottom side


H7 FD2 H10

@
H8 MB Hole @ @
@

1
1
H_4P0-G H_4P0-G
GND_POW ER H_4P0-G
SSD Hole FD4

H5 @

1
@

1
H1 H2
H_6P2 @ @

1
H9
H_3P8 H_3P8
@

1
C C
H6 H_4P0-G
H3 H15
@
@ @

1
H14

1
@ H_6P2

WIFI Hole H_3P8 H_3P8


1

H12
H_4P0X4P4-G
@ CPU Hole
1

FD3 FD1

@ @ H_4P2 3.8mm x 4 H11


1

@
H4 H13

1
@ @
H_4P0-G
1

H_4P0-G H_4P0-G

B
FD3 & FD4 in bottom side B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCREW HOLE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 76 of 100
5 4 3 2 1
A B C D E

THERMAL SENSOR

+5VALW _S5

CPW R2 EMI@ MB AMB CPU VR SSD


1 2
1
JPW R1 0.1U_0402_25V6 1
1 +EC_VREF +EC_VREF +EC_VREF
1 2 ON/OFF#_R
2 3 PW R_ON_LED#
3 PW R_ON_LED# [58]

1
4
4 5 RTS1 RTS2 RTS3
G1 6
G2 1 10K_0402_1% 10K_0402_1% 10K_0402_1%
CONN@ CPW R3 EMI@
DPW R1

2
SP01000H300 2
0.1U_0402_25V6
3 ON/OFF#_R
1 [58] CUST_TEMP1 [58] CUST_TEMP2 [58] CUST_TEMP3
2 PW R_ON_LED#

1
ESD@
SCA00000T00 RTS4 RTS5 RTS6

10K_0402_1% TSM0A103F34D1RZ 10K_0402_1% TSM0A103F34D1RZ 10K_0402_1% TSM0A103F34D1RZ


PESD5V0U2BT_SOT23-3

2
ON/OFF switch Power Button
2 TOP Side 2
SW 1
NTC017-DA1J-D160T_4P
2 1

4 3 +3V3_DSW
G
G
5
6

RPW R2
10K_0402_5%
Bottom Side
2

RPW R3
@ 33_0402_5%
1 R17 2 ON/OFF#_R 1 2 ON/OFF#
ON/OFF# [58]
0_0805_5% 1
CPW R1 ESD@
0.1U_0402_25V6
2
Test Only
MP will un-pop

3 3

+5VS_FAN_S0
FAN +5VS_S0 +5VS_FAN_S0
+3VS_S0

DAZ BARCODE RFA7 1 2 0_0805_5%


DFA1
CFA1 1 2 10U_0805_25V6K

BAV70W _SOT323-3
ZZZ2 @ ZZZ3 @

1
2
RFA1
ZZZ PCB@ 10K_0402_5%
JFAN1
BARCODE_8X8 BARCODE_12X4 1

2
2 1

1
RFA2 1 2 1K_0402_5% FAN_CPU_SPEED_R 3 2
[58] FAN_SPEED FAN_CPU_PW M_R 3
[58] FAN_PW M RFA3 1 2 100_0402_1% 4
PCB FOC60 LA-J751P LS-H671P/H032P 4
DAZ2WR00101 ZZZ4 @ ZZZ5 @ 5
6 GND
2 1 GND
CFA2 EMI@
1000P_0402_50V7K CFA7 EMI@ CONN@
330P_0402_50V8J
1 2 SP02000ZS00
BARCODE_20X4 BARCODE_10X10

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR Conn./FAN/Thermel/SCREW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 77 of 100
A B C D E
A B C D E

+1.8VALW_S5

VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=15mohm


+3VS_S0
change +3VS_S0 source to +3V3_DSW UDC1 JPDC1 1
1 14 +3VS_LS_S0 CDC36
+3V3_DSW VIN1 VOUT1
1 2 2 13 @ 2 1 10U_0603_6.3V6M
CDC1 VIN1 VOUT1 JUMP_43X118 CDC2
RDC1 1 @ 2 0_0402_5% 3VS_ON 1U_0402_6.3V6K 3 12 +3VS_CT1 1 2 0.1U_0402_25V6 CDC40 @RF@ 2
1 [56,58,86,87,96] SUSP#
@
4
ON1 CT1
11
CDC3 4700P_0402_50V7K
1
@
2
10P_0201_50V8J Max:4.0A 1

+VL VBIAS GND UDC4


RDC2 1 @ 2 0_0402_5% 5VS_ON 5 10 +5VS_CT2 1 2
ON2 CT2 CDC5 470P_0402_50V7K +5VS_S0 SUSP# RDC3 1 2 0_0402_5% 3
6 9 JPDC2 ON
+5VALW_S5 VIN2 VOUT2 +5VS_LS_S0 1.8VS_PWR_EN +1.8VS_R
1 1 1 2 7 8 RDC4 1 @ 2 0_0402_5% 1 7 +1.8VS_S0
VIN2 VOUT2 [58] 1.8VS_PWR_EN VIN VOUT
CDC11 CDC13 CDC10 2 1 JPDC3
0.1U_0402_25V6 0.1U_0402_25V6 1U_0402_6.3V6K 15 JUMP_43X118 CDC12 .1U_0402_16V7K 1 2 CDC35 2 8 1 2
@ @ @ GPAD @ 0.1U_0402_25V6 CDC41 @RF@ +3VALW_S5 VIN VOUT
2 2

10U_0603_6.3V6M

1U_0402_6.3V6K
RT9740AGQW WDFN-14TL @ 10P_0201_50V8J JUMP_43X79 1 1
1 2

CDC38

CDC39
1st source : RT9740AGQW (SA00007VD00) @
4
2nd source :APL3523AQBI-TRG (SA00006P400) VBIAS 5
1 UDC2_CT_P6 GND 2 2
6 9
CDC46 CT GND
VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=15mohm
1U_0201_6.3V6M 1
2 APL3526QBI-TRG_TDFN 8P
CDC42 SA00006R100
330P_0402_50V7K
2
+3VDSW_S5 to +3VALW_S5 Transfer
1st source : APL3526 (SA00006R100)
2nd source : TPS22965 (SA00005X500)
+3V3_DSW
+3VALW_S5 6A MAX Continuous Currenct

2 1
CDC30 1U_0201_6.3V6M UDC5

2 RDC221 @ 2 0_0402_5% UDC5_EN 3 2


[58,85] EC_5V_EN ON
1 7
VIN VOUT

[58,85] 3V5V_PG
RDC23 1 2 0_0402_5% 2
VIN VOUT
8 Max:2.0A
+3V3_DSW 4 1
1
+0.75VALW TO +0.75VS

0.1U_0402_25V6
VBIAS 5 CDC32 +0.75VALW_S5
UDC5_CT_P6 6 GND 9 10U_0603_6.3V6M @

CDC31
CT GND 2 UDC2
2 1
1 1 1 VIN1
APL3526QBI-TRG_TDFN 8P C221 2 +0.75VS_S0
CDC33 CDC34 SA00006R100 4.7U_0402_6.3V6K VIN2 JPDC5
0.01U_0402_50V7K +5VALW_S5 7 6 +0.75VS_R 1 2
1U_0201_6.3V6M VIN thermal VOUT
2 2 SE074103K80 2

4.7U_0402_6.3V6K
CDC44

1U_0402_6.3V6K
CDC45
3 JUMP_43X79 1 1
VBIAS @
1st source : APL3526 (SA00006R100) SUSP# RDC6 1 2 0_0402_5% 4 5 @
ON GND
2nd source : TPS22965 (SA00005X500) 0.75VS_PWR_EN RDC7 1 @ 2 0_0402_5% 2 2
[58] 0.75VS_PWR_EN
TPS22961DNYR_WSON8
6A MAX Continuous Currenct .1U_0402_16V7K 1 2 CDC37 SA00008A800

VIN 0.75 (VBIAS=5V),IMAX=6A,Rds=4.4mohm

3 3

+1.2V Discharge circuit VTT Discharge circuit


+3VALW_S5 +1.2V_VDDQ_S3
+0.6VS_VTT_S0
DDR power control
2

RDC19 RDC25 +3VALW_S5


10K_0402_5%
RDC24
100_0603_5% 470_0603_5%
1

+1.2VDDQ_DISCHR UDC3
2

5
MC74VHC1G08DFT2G_SC70-5
+0.6VS_DISCHRG_S0

SA0000BIP00

VCC
PM_SLP_S5# 1
[9,10,58] PM_SLP_S5#
3

QDC11B D IN1 4
+1.2VDDQ_DISCHR_G OUT 1.2V_EN_HW [86]
5 SYSON RDC28 1 @ 2 0_0402_5% SYSON_R 2

GND
[58,86] SYSON IN2
G

4 SL2N7002SDW1T1G_SC88-6 1 @ 4
4

3
6

QDC11A D CDC18
SYSON 2 .1U_0402_16V7K
G @ 2
1

D RDC13 1 @ 2 0_0402_5%
L2N7002SDW1T1G_SC88-6
S SUSP 2
[58] SUSP
1

G QDC10
S
3

L2N7002WT1G_SC-70-3
SB00001GE00
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2019/07/26 Deciphered Date 2018/10/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 78 of 100
A B C D E
5 4 3 2 1

D D

C C

B B

www.teknisi-indonesia.com

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2019/07/26 Deciphered Date 2020/05/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RESERVE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Friday, March 27, 2020 Sheet 80 of 100
5 4 3 2 1
5 4 3 2 1

Codec, Audio AMP, USB Charger


B+ 5V Touch, LVDS, HDD, ODD
LV6576D +5VALW USB ports
7.8A

D D

CPU, GPU, EC, Codec, Card Reader,


LAN, WLAN, ROM, BT, TV tuner,
Camera

3.3V
+3VALWP
4.43A

3V +2.5V
LV9059 +2.5VP RAM
1.192A

B+ 1.2V
LV8231A +1.2VP CPU, RAM
10.12A
Adaptor(20V)
C C
0.6V
+0.6VSP RAM
1A

B+ 12V
LV8296A +12V AMP
0.833A

B+ 0.75V
LV5768A +0.75VALW_S5 VDDP_S5
2A

B+ 0.75V
LV5768A +0.75VS_S0 VDDP_S0
2A

B B

B+ 1.8V
LV8237E +1.8V VDD
3.5A

B+ 0.65V-TBD
LV3662A +APU_CORE
70A(2phase)

0.65V-TBD
+APU_CORE_NB
17A

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/12/18 Deciphered Date 2013/12/18 Title
Power Rail
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 81 of 100
5 4 3 2 1
5 4 3 2 1

+3VL_S5 @0@ PR11 +3VL_RTC_S5


0_0402_5%
1 2

Main source: PZ0703EK


+RTCBATT_G3 PJP2 PD =I^2*Rds(on)=4.5^2*7m ohm=0.14175W
θ JA= 50° C/W*0.14175W=7.0875°C

1
+ -
2 Second source: SM4309
PD =I^2*Rds(on)=4.5^2*3.6m ohm=0.0729W
W/O INA300 : PL13,PL14 pop θ JA= 55° C/W*0.0729W=4.0095°C
RTC BATT CONNECTER W/ INA300: PR1 pop
LOTES_AAA-BAT-054-K01 PL13 INA300_BEAD@ Soft start : 1ms
CONN@ HCB2012KF-800T50_2P
1 2
D D
PL14 INA300_BEAD@
+20V_VIN HCB2012KF-800T50_2P
1 2
PQ1 DCIN_PMOS@
+20V_ADPIN PZ0703EK_P_DFN56-8-5 +20V_VIN_B2B
PL11 EMI@ PR1 INA300_SENSE_R@ 1
HCB2012KF-800T50_2P 2 @JUMP@ PJ1
1 2 1 4 +20V_VIN_B2B+ 3 5 1 2
CONN@ 1 2 +20VB
PJP1 PL12 EMI@ VIN+ 2 3 VIN- JUMP_43X118

PR3 200K_0402_1%

DCIN_PMOS@
1
7 HCB2012KF-800T50_2P 1

4
DCIN_PMOS@
1

1
GND

3300P_0402_25V7K

0.1U_0402_25V7K

68U_25V_M_R0.36
6 1 2
soldering open

2.2_1206_5%

PC1 DCIN_PMOS@

1
GND 0.01_1206_1%

0.033U_0402_25V7K
5 +

@ PC3

@ PC4
GROUND 4

PR2

2
POWER

1000P_0402_50V7K

100P_0201_50V8J

1000P_0402_50V7K
3

PC5 EMI@

EMI@

EMI@

PC8 EMI@
P=I^2* R(max)=0.2045W

2
DETECT

100P_0201_50V8J
2 2

2
1

1
POWER 1
GROUND

+20V_VIN_SNB

PC2
LOTES_AJAK0031-P002A

PC6

PC7
2

2
+20V_VIN_B2B+_R

2.2U_1206_25V7K
P=I^2* R(max)=0.2045W

1
PC9

150K_0402_1%
PRB12

DCIN_PMOS@
PR4
1 4
main source : LOTES AJAK0031-P002A VIN+_APL3573
2 3 VIN-_APL3573

2
second srouce:Drapho PJSS0056-C011H
0.01_1206_1%
APL3573_SENSE_R@

W/APL3573: PRB12 pop/ PR1 & PL13/PL14 unpop

soldering short
PJ2 +20VB
VDRP_APL3573 1 2
1 2
+3VS_S0

10U_0603_25V6M

10U_0603_25V6M

10U_0603_25V6M

10U_0603_25V6M
JUMP_43X118
+3V3_DSW

1
@APL3573@ PCB5

@APL3573@ PCB6

APL3573@ PCB9

APL3573@ PCB10
JUMP@

Current Limit Function

2
INA300@ PR8 @0@ PRB6

48.7K_0402_1%

48.7K_0402_1%
100K_0402_1% 0_0402_5% APL3573@

PR9

@APL3573@ PRB1

APL3573@ PRB2
VIN+_APL3573 ISENP_APL3573

1
1 2 PUB1

10K_0402_1%
1
APL3573AQBI-TRG_TQFN16_4X4

1
C @0@ PR5 PCB7 @APL3573@ C

INA300@
0_0402_5% INA300@ PU1 @0@ PRB7 100P_0201_50V8J 1 7
1 2 IN+_INA300 ISENP VDRP
VIN+ 0_0402_5%
2

2
VIN-_APL3573
1 2 ISENN_APL3573 2
INA300AIDSQR_SON10_2X2

2
EN_NA300
1

INA300@ 4 ISENN
@0@ PR6 PC11 1 ENABLE VIN_APL3573 15 5 IADMON_APL3573

10U_0603_25V6M

10U_0603_25V6M
0_0402_5% 100P_0201_50V8J IN+ 6 VIN IADMON
2

ACOK_APL3573

1
VIN- 1 2 2 LATCH LATCH_INA300 11

APL3573@ PCB8

APL3573@ PCB12
IN-_INA300 ALERT#_INA300 ALERT#_APL3573 VINUVP_APL3573 16

1
IN- 5 1 2 ACOK APL3573_ALERT@ PRB8 0_0402_5%
ALERT# VINOVP 12 /ALERT_APL3573 1 2
0_0402_5% PRB4 ALERT#_APL3573

2
140K_0402_1% /ALERT
DRPEN_APL3573 9 13 CAP_APL3573
PR10 INA300_ALERT@ APL3573@
LIMIT_INA300 3 7 DRPEN CAP @ PRB13 0_0402_5%

2
LIMIT DELAY RESET_APL3573 14 3 SS_APL3573 1 2 VR_HOT#
1

10 9 RESET SS
GND

+5VS_S0
3.4K_0402_1%

HYS VS ALSET_APL35734 8 TIMER_APL3573


PR7

TP

APL3573@ PRB10 ALSET TIMER


DELAY_APL3573
1

1
INA300@ 576K_0402_1% 10
11

0.1U_0402_25V6
DELAY

0.01U_0402_16V7K
PR7 PR7 PC12 PCB2

APL3573@ PCB4

APL3573@ PCB3

APL3573@ PCB1
GND
2

VIN_APL3573

0.1U_0402_25V6
1.96K_0402_1% 2.7K_0402_1% 1 2

PRB5
.1U_0402_16V7K 1000P_0402_50V8-J
2

APL3573@ 2
95.3K_0402_1%
PRB3

1
RESET_APL3573_EC
10K_0402_1%

6
65W_INA300@ 90W_INA300@ 120W_INA300@ APL3573@ APL3573@ 1 2
VDRP_APL3573

2
65W LIMIT 90W LIMIT 120W LIMIT PRB11

2
49.9K_0402_1% @0@ PRB9
0_0402_5%

2
65W_APL3573@

65W ALSET
65W: 90W: 120W:
Full Load =65W Full Load =90W Full Load =120W
Peak Power =78W Peak Power =108W Peak Power =135W PRB5 PRB5
Trigger->3.9A (@78W) Trigger->5.4A (@108W) Trigger->6.75A (@135W) 124K_0402_1% 150K_0402_1%

Vtrip=3.9*10m=39mV Vtrip=5.4*10m=54mV Vtrip=6.75*10m=67.5mV 90W_APL3573@ 120W_APL3573@


Rlimit=(39mV+0.5mV)/20uA=1.975K Rlimit=(54mV+0.5mV)/20uA=2.725K Rlimit=(67.5mV+0.5mV)/20uA=3.4K 90W ALSET 120W ALSET
Select Rlimit=1.96K Select Rlimit=2.7K Select Rlimit=3.4K
I_Trigger-->3.87A@77.4W I_Trigger-->5.35A@107W I_Trigger-->6.75A@135W

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/12/18 Deciphered Date 2013/12/18 Title
DCIN / CONN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date : Friday, March 27, 2020 Sheet 82 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/09/12 Deciphered Date 2012/09/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 83 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/09/12 Deciphered Date 2012/09/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 84 of 100
5 4 3 2 1
5 4 3 2 1

Vfb=2V Typ: 175mA Vfb=2V


Min: 100mA
PR301 PR317
13.3K_0402_1% +3VLP 30K_0402_1%
1 2 1 2

PR302
+20VB_3/5V

EC_5V_EN
20K_0402_1% PR311
PL3011 EMI@ 1 2 20K_0402_1%
+20VB HCB2012KF-800T50_2P 1 2
1 2
+3VLP

4.7U_0402_6.3V6M
+20VB_3/5V

@EMI@

@RF@
0.1U_0402_25V6

2200P_0402_25V7K
EMI@
10U_0603_25V6M

10U_0603_25V6M

68P_0402_50V8J

1
D D

1
PC312

PC301

PC302
124K_0402_1%

137K_0402_1%
1

1
PC305

1
PR303

PC303

PC304

PR304

PR312
2

2
100K_0402_1% PR313

10U_0603_25V6M

10U_0603_25V6M
0_0402_5%

1
PC306

PC313

PC319
2

2
CS2_3V

CS1_5V
FB2_3V

FB1_5V
0.47U_0402_6.3V6K @0@

2
1 2

2
PQ301

5
+3VLP

5
PU301

PE606BA_PDFN8-5

1
PR305 LV6576DGQW(2)_WQFN20_3X3 PQ303
100K_0402_1% 21 PE606BA_PDFN8-5

CS2

FB2

LDO3

FB1

CS1
GND

EN_3V
1 2 PC320
7X7X3 4 0.047U_0402_25V7K 7X7X3
6 20 EN_5V 1 2 4
Isat: 14A EN2 EN1 Isat: 14A
DCR: 40mΩ (Max) 3V5V_PG @ DCR: 40mΩ (Max)
PL301 7 19 PL302

1
2
3
4.7UH +-20% WSRPG0603-4R7M-AG 7A PGOOD VCLK 4.7UH +-20% WSRPG0603-4R7M-AG 7A

3
2
1
LX_3V 8 18 LX_5V
+3VALWP PC307 PR306 PHASE2 PHASE1 PR314 PC314 +5VALWP
0.1U_0402_25V7K 2.2_0805_1% 2.2_0805_1% 0.1U_0402_25V7K
1 2 BST_3V_R 1 2 BST_3V 9 17 BST_5V 1 2 BST_5V_R 1 2

PR315 @EMI@
1

1
BOOT2 BOOT1

PR307 @EMI@
4.7_1206_5%

4.7_1206_5%
330U_6.3V_M

1 1
10U_0603_25V6M

10U_0603_25V6M
330U_6.3V_M
1

1
+ PQ302 UG_3V_R 1 2 UG_3V 10 16 UG_5V 1 2 UG_5V_R +
PC308

PC309

PC315

PC316
UGATE2 UGATE1

LGATE2

LGATE1
5

LDO5

BYP1
PR308 PR316 PQ304
2

2
5
2 2

VIN
LX_3V_SNB

LX_5V_SNB
0_0805_5% 0_0805_5%

PE600BA_PDFN8-5

PE600BA_PDFN8-5
11

12

13

14

15
@ @
PC310 @EMI@

1 4 LG_3V

PC317 @EMI@
680P_0402_50V7K

1
VCC_3/5V
LG_5V 4
Fsw=300KHz

680P_0402_50V7K
C C
2

PR309
ESR=17mΩ

2
1 2 Rds(on):10.2mΩ ~14mΩ
Fsw=355KHz +20VB_3/5V +5VALWP
1
2
3

3
2
1
ESR=17mΩ 0_0603_5%

0.1U_0402_25V7K
Rds(on):10.2mΩ ~14mΩ

PC311
1
1st source:LV6576D +VL

2
Typ: 175mA
2nd source:TPS51275B-1 Min: 100mA

4.7U_0402_6.3V6M
3rd source:GS7225B

1
PC318
2
PJP303
JUMP@
1 2
+5VALWP 1 2 +5VALW_S5
JUMP_43X118

+3VALWP +5VALWP
soldering short
PJP301
Vin = 20V Vin = 20V JUMP@
1 2
Iin = 3.3*4.43/0.85/20 Iin = 5*7.76/0.85/20 +3VALWP 1 2 +3V3_DSW

2
= 0.86A = 2.28A JUMP_43X118

0_0603_5%
PR310
soldering short
PJP302
JUMP@ @

1
1 2
Vout = Vfb*[1+(Rt/Rb)] Vout = Vfb*[1+(Rt/Rb)] +3VLP 1 2
+3VL_S5
JUMP_43X39
B
= 2*[1+(13.3K/20K)] = 2*[1+(30K/20K)] soldering short B
= 3.3V = 5V

+3VALWP +5VALWP
Imax=3.1 ; Ipeak=4.43 ;Fsw=355KHz Imax=5.43A,Ipeak=7.6A ;Fsw=300KHz
Iocp=(Rcs1*Itrip)/(8*Rdson) Iocp=(Rcs1*Itrip)/(8*Rdson)
Rds : L/S --> typ:10.2mohm ; max: 14mohm Rds : L/S --> typ:10.2ohm ; max: 14mohm
Itrip=9~11 uA Itrip=9~11 uA
Iocp(set)=10A~14A Iocp(set)=11.6A~15.5A
Iin_ripple=1.15A Iin_ripple=2.35A
Output Cap. ESR=17mohm Output Cap. ESR=17mohm
Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=1.651A Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=2.660A
LIR=Delta IL/Ipeak=0.372 LIR=Delta IL/Ipeak=0.343
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2] Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
=164.98uF =212.62uF
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.6uF CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=1.7uF

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/08/15 Deciphered Date 2013/08/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+3VALWP / +5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 85 of 100
5 4 3 2 1
A B C D E

main 2nd
+0.6VSP Vo 0.6 0.6 V
1st source: LV8231AGQW TDC=0.7A
Ipeak=1A Vin 1.2 1.2 V
2nd source: GS7272DQ3-RLV
+20VB PLM11 EMI@
+20VB_DDR Io 1 1 A
1 2 PRM1
2.2_0805_1%
BST_DDR_R BST_DDR

2200P_0402_25V7K
HCB1608KF-121T30_0603 1 2

EMI@
PCM6 @EMI@

PCM15 @RF@
+1.2VP PD 3.33 3.33 W

68P_0402_50V8J

10U_0603_25V6M

10U_0603_25V6M
0.1U_0402_25V6
1

1
PRM9

PCM3

PCM1
UG_DDR_R 1 2 UG_DDR
θ JA 30 60 ° C/W
+0.6VSP

PCM7
2

2
0_0805_5%
PQM1
LX_DDR

0.1U_0402_25V7K
PE606BA_PDFN8-5

10U_0402_6.3V6M

10U_0402_6.3V6M
1 1

1
PCM2

1
PCM5

PCM8
PUM1

16

17

18

19

20
LV8231:

2
7X7X3 4 Quiescent Current (GND Current)

VLDOIN
PHASE

UGATE

BOOT

VTT
21
1.5uH PAD IQ(typ)=0.135mA
Isat: 18A LG_DDR 15 1 PD(MAX) = (TJ(MAX) - TA) / θ JA=3.33W
DCR:15mΩ (Max) LGATE VTTGND
θ JA= 30° C/

1
2
3
Rds(on):19mΩ ~27mΩ W
PLM1 14 2
1.5UH +-20% WSRPG0603-1R5M-AG PRM2 PGND VTTSNS
392K_0402_1%
1 2 CS_DDR 13 3
+1.2VP CS LV8231AGQW_WQFN20_3X3 GND
GS7272:

5
PRM3 @EMI@
VDD_DDR VTTREF_DDR
1 PQM2 1 2 12 4 Quiescent Current (GND Current)
10U_0603_25V6M

VDD VTTREF

1
PCM4
IQ(typ)=0.4mA

4.7_1206_5%
1

0.033U_0402_16V7K
+
PCM9

PCM10 1U_0402_6.3V6K
390U_2.5V_M 11 5 PD(MAX) = (TJ(MAX) - TA) / θ JA=1.667W
VID VDDQ +1.2VP

1
PGOOD
4

PCM11
θ JA= 60° C/
2

Mode Level +0.6VSP VTTREF_1.2V 2 1 2 W

1LX_DDR_SNB
+5VALW_S5

TON
2

FB
S5

S3
S5 L off off

2
PRM4
S3 L off on @ PE600BA_PDFN8-5 2.2_0603_5%

1
2
3

10

6
S0 H on on PCM16 @
@ PRM11 0.1U_0402_10V7K

PCM12 @EMI@
Rds(on):10.2mΩ ~14mΩ
100K_0402_1% 1 2

FB_DDR
Note: S3 - sleep ; S5 - power off

EN_DDR
2 PG_DDR

680P_0402_50V7K

TON_DDR
1

EN_0.6VSP
+3VALW_S5
+1.2VP

2
1 2
+20VB_DDR 1 2 PRM5
6.04K_0402_1%

0.1U_0402_10V7K
750K_0402_1%

10K_0402_1%

1
PRM6 @

PRM7

PCM17

2
1.2V_EN_HW 1 2
+1.2VP +1.2VP

2
0.1U_0402_10V7K
Vin = 20V Imax=7.09A ; Ipeak=10.12A ;Fsw=350KHz PRM8

1
56K_0402_1%
Iin = 1.2*10.12/0.85/20 Iocp=(Rcs1*Itrip)/(8*Rdson)
= 0.714A Rds : L/S --> typ:12.1mohm ; max: 14mohm

PCM13

2
Itrip=9~11 uA soldering short
Iocp(set)=15.18~18A PJM1
Iin_ripple=1.68A SUSP# 1 2 JUMP@
2 +1.2VP 1 2 +1.2V_VDDQ_S3 2
Output Cap. ESR=10mohm @0@ 1 2
Vout = Vfb*[1+(Rt/Rb)] Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=2.149A PRM10 JUMP_43X118

0.1U_0402_10V7K
= 0.75*[1+(6.04K/10K)] LIR=Delta IL/Ipeak=0.212
0_0402_5%
= 1.203V Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]

1
PCM14
=1716.7uF PJM2
JUMP@
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.57uF

2
1 2
@ +0.6VSP 1 2 +0.6VS_VTT_S0
JUMP_43X39

soldering short

PJ2502
JUMP@
JUMP_43X39
+5VALW_S5 1 2
+2.5VP_LDO 1 2 +2.5V_S3
1

PC2503
1U_0402_6.3V6K soldering short
PU2501
soldering short
2

LV9059GSP_SO8
JUMP_43X39 4 5
1 2 VIN_2.5V_LDO 3 VDD NC 6 +2.5VP
+3VALW_S5 1 2 2 VIN
EN
VOUT
ADJ
7 +2.5VP_LDO Imax=0.8344,Ipeak=1.192A ;
JUMP@ 1 8
EP

PGOOD GND Current Limit=3.6A(Typ)~4.2A(Max)


1

PJ2501
3 3
1

1
PC2501

22U_0603_6.3V6M

PG_2.5V_LDO
4.7U_0402_6.3V6M

PR2503 @ PC2504
1

34K_0402_1% 0.01U_0402_25V7K
PC2502
2

LV9059:
2
1

ADJ_2.5V_LDO
@ PR2504 Quiescent Current (GND Current)
100K_0402_1%
@0@ PR2501 IQ(typ)=0.6mA
1

0_0402_5% PD(MAX) = (TJ(MAX) - TA) / θ JA =2.96W


2

SYSON 1 2 EN_2.5V_LDO
SYSON
+3VALW_S5 PR2502 θ JA= 33.7° C/ W
16K_0402_1%
2
1

@
Vout = Vfb*[1+(Rt/Rb)] APL5933CKAI:
PC2505
0.1U_0402_16V7K = 0.8*[1+(34K/16K)] Quiescent Current (GND Current)
2

= 2.5V IQ(typ)=1mA
PD(MAX) = (TJ(MAX) - TA) / θ JA =2W
θ JA= 50° C/W
1st source: LV9059GSP
2nd source: APL5933CKAI GS7166:
3rd source: GS7166 Quiescent Current (GND Current)
IQ(typ)=1mA
PD(MAX) = (TJ(MAX) - TA) / θ JA =1.33W
θ JA= 75° C/W

4 4

Security Classification Compal Secret Data


Title
Compal Electronics, Inc.
Issued Date 2015/07/27 Deciphered Date 2016/07/27

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.2VP/+0.6VSP/+2.5VP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 86 of 100
A B C D E
5 4 3 2 1

1st source: LV5768A


2nd srouce: UP1727P
3rd srouce: GS7302ADTD-R 7x7x3
Isat: 18A
PUH101 DCR: 20mΩ (Max)
EMI@ PLH111 LV5768AGQW_WDFN10_3X3
HCB1608KF-121T30_0603 11 PLH101
1 2 VIN_VDDP_S5 10 TP 1 S COIL 1.5UH +-20% WSRPG0603-1R5M-AG
+5VALW_S5 PVIN2 LX1

@RF@ PCH101

@EMI@ PCH102

2200P_0402_25V7K

22U_0603_6.3V6M
9 2 LX_VDDP_S5

EMI@ PCH103
68P_0402_50V8J

0.1U_0402_25V6K
PVIN1 LX2 +VDDP_0.75VALWP

PCH104

@EMI@ PRH101
1

1
8 3

4.7_1206_5%
SVIN LX3
7 4

2
NC PGOOD
6 5

22U_0603_6.3V6M

22U_0603_6.3V6M
PWR_0.75V_PG

2
D FB EN D

1
PCH106

PCH107
@0@ PRH104 LX_VDDP_S5_SNB
0_0402_5% PRH103

2
1
1 2 EN_VDDP_S5

@EMI@ PCH108
680P_0402_50V7K
100K_0402_1%

1
<58,78,85> EC_0.75V_EN PRH106

2
10_0402_5%

2
+3VALW_S5

1
@ PCH109
0.1U_0402_25V6K

2
PRH107 @
0_0402_5%
FB_VDDP_S5 1 2 FB_VDDP_S5_1 1 2
VDDP_S5_SENSE
PRH102 3K_0402_1%

1
1 2

PRH105 PCH105 22P_0402_50V8J


12K_0402_1%

2
+VDDP_0.75VALWP Vout = Vfb*[1+(Rt/Rb)]
Vin = 5V = 0.6*[1+(3K/12K)]
Iin = 0..75*2/0.85/5 = 0.75V
= 0.35A JUMP@ PJH101
JUMP_43X79

1 2
+VDDP_0.75VALWP +VDDP_0.75VALWP 1 2 +0.75VALW_S5
Imax=1.4A, Ipeak=2A; Fsw=1MHz soldering short
C C
Current Limit=4A
Iin_ripple=0.27A
Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=0.48A
LIR=Delta IL/Ipeak=0.24
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+DeltaV)^2-Vout^2]
=117uF
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.03uF

1st source: LV5768A


2nd srouce: UP1727P
3rd srouce: GS7302ADTD-R 7x7x3
Isat: 18A
PUH201 DCR: 20mΩ (Max)
EMI@ PLH211 LV5768AGQW_WDFN10_3X3
HCB1608KF-121T30_0603 11 PLH201
1 2 VIN_VDDP_S0 10 TP 1 S COIL 1.5UH +-20% WSRPG0603-1R5M-AG
+5VALW_S5 PVIN2 LX1
@RF@ PCH201

@EMI@ PCH202

2200P_0402_25V7K

22U_0603_6.3V6M

LX_VDDP_S0
EMI@ PCH203

9 2
68P_0402_50V8J

0.1U_0402_25V6K

PVIN1 LX2 +VDDP_0.75VSP


PCH204

@EMI@ PRH201
1

1
8 3

4.7_1206_5%
SVIN LX3
7 4 PGOOD_VDDP_S0
2

NC PGOOD
1

6 5

22U_0603_6.3V6M

22U_0603_6.3V6M
2

FB EN

1
PCH206

PCH207
@ PRH203
@0@ PRH204 100K_0402_1% LX_VDDP_S0_SNB
0_0402_5%
2

2
1
1 2 EN_VDDP_S0
@EMI@ PCH208
680P_0402_50V7K
1

<58,78,85> SUSP#
PRH206
B B
10_0402_5%
+3VALW_S5
2

2
1

@ PCH209
0.1U_0402_25V6K
2

PRH207 @
0_0402_5%
FB_VDDP_S0 1 2 FB_VDDP_S0_1 1 2
+0.75VS_S0
PRH202 3K_0402_1%
1

1 2

PRH205 PCH205 22P_0402_50V8J


12K_0402_1%
2

+VDDP_0.75VSP Vout = Vfb*[1+(Rt/Rb)]


Vin = 5V = 0.6*[1+(3K/12K)]
Iin = 0..75*2/0.85/5 = 0.75V
= 0.35A

+VDDP_0.75VSP
Imax=1.4A, Ipeak=2A; Fsw=1MHz JUMP@ PJH102
JUMP_43X79
Current Limit=4A
Iin_ripple=0.27A +VDDP_0.75VSP
1 2

Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=0.48A
1 2 +0.75VS_S0
A A
LIR=Delta IL/Ipeak=0.24 soldering short
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+DeltaV)^2-Vout^2]
=117uF
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.03uF

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2014/12/26 Deciphered Date 2017/10/19 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P087-PWR-0.75V(LV5768AGQW)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 87 of 100
5 4 3 2 1
5 4 3 2 1

PR1002 and PR1003 are for debug only. +20VB_APU +20VB


1 2
Close IC APU_VDD_RUN_FB_L APU_VDDCR_SEN need other resistor at HW side.
EMI@ PLZ11
VCC_SENSE_APU VSS_SENSE_APU HCB2012KF-800T50_2P
+APU_VDDCORE
1 2

2200P_0402_50V7K

1000P_0402_50V7K
VREF_APU

1000P_0402_50V7K
10U_0603_25V6M

10U_0603_25V6M

100P_0201_50V8J

100P_0201_50V8J
0.1U_0402_25V6
EMI@ PLZ12

@EMI@ PCZ6
HCB2012KF-800T50_2P
Module model information 1

100U_25V_M
1 2

EMI@ PCZ7

@ PCZ5

EMI@ PCZ4

EMI@ PCZ3

EMI@ PCZ2

EMI@ PCZ1
PQZ1 PQZ3

1
+

PCZ9

PCZ8
PK616BA_PDFN8-5 PK616BA_PDFN8-5
RT3662A_V2A.mdd for IC portion @ PCZ22

1
0.1U_0402_25V6

10_0402_5%

2
1
RT3662A_V2B.mdd for SW portion 2

10_0402_5%
PRZ19 PRZ16

PRZ17
@ PRZ18
0_0402_5% 0_0402_5% UG1_APU PRZ58 UG1_APU_R UG1_APU_R
1

1
1 2 4 4
34K_0402_1%

D D
PRZ40

PRZ44 PRZ48 @0@ @0@

2
0_0402_5% 0_0402_5% 0_0805_5%

@
2
@0@ @0@ BST1_APU BST1_APU_R
2

3
2
1

3
2
1
1 2 1 2
TSEN_NB_R_1
TSEN_APU_R_1
SET1_APU_R_1

PRZ1 PCZ10 PLZ1


2.2_0805_1% 0.22U_0402_25V6K S COIL 0.22UH WSRPG1004-R22M-AG-R82 40A
LX1_APU

ISEN1P_APU_R
+APU_VDDCORE
LL(Rdroop)=0.7m 1 2

4.7_1206_5%
261K_0402_1%
3.92K_0402_1%

66.5K_0402_1%
1

@EMI@ PRZ2
@ PCZ21 PQZ2 PQZ4

5
PRZ41

PRZ45

PRZ49

0.1U_0402_25V6 PK632BA_PDFN8-5 PK632BA_PDFN8-5


ISEN1P_APU_R1
1 2 1 2 1 2 1 2 1 2

LX1_APU_SNB
2

2
0.1U_0402_25V6

0.1U_0402_25V6
PRZ21 PRZ20 LG1_APU LG1_APU PRZ3 PRZ4 PCZ12
43K_0402_1% 10K_0402_1% 4 4 3.24K_0603_1% 3.24K_0603_1% 0.1U_0402_25V6

1
@ PCZ23

@ PCZ20
SET1_APU
1 2 1 2

680P_0402_50V7K
@EMI@ PCZ11
2

2
PCZ25 PCZ24
+APU_VDDCORE

3
2
1

3
2
1

1
TSEN_APU_R TSEN_APU 68P_0402_50V8J 270P_0402_50V7K
1 2 TDC 44A(2H2L2P)
Near +APU_VDDCORE MOS Peak current 70A

2
PRZ38
60.4K_0402_1% VSEN_APU ISEN1P_APU
1 2
OCP current > 98A
1 2

PHZ1
RGND_APU @ PRZ5
1.1K_0402_1%
FSW=400kHz
100K_0402_1%_B25/50 4250K ISEN1N_APU ISEN1N_APU_R
DCR 0.82mohm +/-5%
1 2
TSEN_NB_R TSEN_NB
1 2
VGATE
PRZ6
PRZ39 1_0402_1%
60.4K_0402_1% Near +APU_VDDSOC MOS 1 2
+3VALW_S5 ISEN2P_APU
1 2
1 2 1 2 1 2 PRZ15 100K_0402_5%
+3VALW_S5
24K_0402_1%
6.65K_0402_1%

33.2K_0402_1%

PRZ7
1

PHZ2 @ PRZ22 PCZ26 1 2 +3VS_S0 6.49K_0402_1%


PRZ42

PRZ46

PRZ50

100K_0402_1%_B25/50 4250K 4.7K_0402_1% 0.1U_0402_25V6


@ PRZ61 100K_0402_5%
VR_HOT#
2

2
TSEN_APU_R_2
SET1_APU_R_2

ISEN1N_APU

ISEN1P_APU

ISEN2P_APU
TSEN_NB_R_2

COMP_APU

BST2_APU

UG2_APU
FB_APU
VREF_APU

PUZ1 +20VB_APU

10
VREF_APU_R
1

1
1 2 1 2 LV3662AMGQW_WQFN40_5X5
PRZ43 PRZ47 PRZ51

ISEN1N

VSEN

RGND

PGOOD

BOOT2

UGATE2
ISEN1P

ISEN2P

FB

COMP
0_0402_5% 0_0402_5% 0_0402_5% PCZ27 PRZ23
0.47U_0402_6.3V6K 3.9_0402_1%
C @0@ @0@ @0@ 41 C
2

1 2 11 GND
+5VALW_S5 VRHOT_L LX2_APU
40
TSEN_APU PHASE2

2200P_0402_50V7K
PRZ24 12
TSEN LG2_APU
39

EMI@ PCZ14

@EMI@ PCZ13
0.1U_0402_25V6
4.7_0603_5%

10U_0603_25V6M

10U_0603_25V6M
SET1_APU LGATE2
13 PQZ5 PQZ7
BST1_APU

1
1 2 SET1 38

PCZ16

PCZ15
IMON_APU PK616BA_PDFN8-5 PK616BA_PDFN8-5
14 BOOT1
IMON UG1_APU
PCZ28 37

2
2.2U_0603_10V6K 15 UGATE1
VREF_PINSET LX1_APU
36 PRZ59
IMON_NB PHASE1 UG2_APU UG2_APU_R UG2_APU_R
1 2 16 1 2 4 4
+1.8VALW_S5 IMON_NB LG1_APU
35
VCC_APU LGATE1
@ PRZ25 17 0_0805_5%
VCC PVCC_APU
4.7K_0402_1% 34 1 2
PVCC +5VALW_S5
18
LG_NB BST2_APU BST2_APU_R

3
2
1

3
2
1
APU_PWRGD PWROK 33 PRZ37 1 2 1 2
SVC_PWR_APU LGATE_NB
1 2 19 0_0603_5%
APU_SVC SVC LX_NB
32 PRZ8 PCZ17 PLZ2
SVD_PWR_APU PHASE_NB
PRZ26 20 1 2 2.2_0805_1% 0.22U_0402_25V6K SS COIL 0.22UH WSRPG1004-R22M-AG-R82 40A
SVD UG_NB
31

ISENN_NB

ISENP_NB

COMP_NB
0_0402_5%

BOOT_NB
TSEN_NB
UGATE_NB LX2_APU
1 2 PCZ40

FB_NB
+APU_VDDCORE

VDDIO
2.2U_0603_10V6K ISEN2P_APU_R

SVT

VIN
@ PCZ29

EN

@EMI@ PRZ9
10P_0402_50V8J

4.7_1206_5%
PQZ6 PQZ8

21

22

23

24

25

26

27

28

29

30

5
1 2 PK632BA_PDFN8-5 PK632BA_PDFN8-5
APU_SVD
ISEN2P_APU_R1
PRZ27 1 2 1 2 1 2

ISENA1N_NB

ISENA1P_NB
BST_NB

VDDIO_APU
0_0402_5%

COMP_NB

LX2_APU_SNB
TSEN_NB

2
VIN_APU
1 2

EN_APU
LG2_APU LG2_APU PRZ10 PRZ11 PCZ19

FB_NB
4 4 3.24K_0603_1% 3.24K_0603_1% 0.1U_0402_25V6
@ PCZ30
10P_0402_50V8J

680P_0402_50V7K
@EMI@ PCZ18
SVT_PWR_APU PRZ36
APU_SVT 1 2 1 2

3
2
1

3
2
1

1
VR_ON
APU_SVD and APU_SVC RC filter put CPU side. PRZ28 @0@
APU_SVT RC filter put controller side. 0_0402_5% 0_0402_5%

2
1 2 1 2 1 2
+1.8VALW_S5 +20VB_APU 1 2
ISEN2P_APU
@ PCZ31 PRZ29 PRZ35 1 2
10P_0402_50V8J 2.2_0402_5% 4.7_0603_5%
@ PCZ39 @ PRZ12
1 2 1 2 0.1U_0402_25V6 1.1K_0402_1%
IMON_APU_R
1 2
VREF_APU ISEN1N_APU ISEN2N_APU_R
Near +APU_VDDCORE CHOKE PCZ32 PCZ38 1 2
PRZ53 1U_0201_6.3V6M 0.1U_0402_25V6
10.7K_0402_1% PRZ13
IMON_APU_R_PH IMON_APU 1_0402_1%
1 2 1 2 1 2
ISEN1P_APU
1 2
PRZ54 PHZ3 PRZ52 PRZ31 FB_NB_R
15.8K_0402_1% 100K_0402_1%_B25/50 4250K 1.27K_0402_1% 1 2 1 2 1 2 PRZ14
VCC_SENSE_NB
6.49K_0402_1%
@0@ PRZ30 PRZ34
0_0402_5% 10K_0402_1% 82K_0402_1%
IMON_NB_R
1 2 1 2 1 2 1 2
+APU_VDDSOC
330P_0402_50V7K

B B
0.1U_0402_25V6

0.1U_0402_25V6

PRZ56 Near +APU_VDDSOC CHOKE @ PRZ32 PCZ33 PCZ37 LL_NB(Rdroop)=2.1m


20K_0402_1% 10_0402_5% 270P_0402_50V7K 68P_0402_50V8J
IMON_NB_R_PH IMON_NB
1

1 2 1 2 1 2
@ PCZ36

@ PCZ35

@ PCZ34

PRZ57 PHZ4 PRZ55


+20VB_APU
2

6.49K_0402_1% 100K_0402_1%_B25/50 4250K 20.5K_0402_1%

PRZ33 RGND_APU
1 2

@0@
0_0402_5%

2200P_0402_50V7K
10U_0603_25V6M

10U_0603_25V6M

@EMI@ PCA1
0.1U_0402_25V6
PR1050 is for debug only.

EMI@ PCA2
PQA1

1
APU_VDDSOC_SEN needs other resistor at HW side.

PCA4

PCA3
PK616BA_PDFN8-5

2
UG_NB PRZ60 UG_NB_R
1 2 4

0_0805_5%

BST_NB BST_NB_R

3
2
1
1 2 1 2

PRA1 PCA5 PLA1


2.2_0805_1% 0.22U_0402_25V6K S COIL .22UH 20% WSRPG0604-R22M-AG-R98
LX_NB

ISENA1P_NB_R
+APU_VDDSOC

PRA2
PQA2

4.7_1206_5%
PK632BA_PDFN8-5
ISENA1P_NB_R1
1 2 1 2 1 2

@EMI@
LG_NB PRA3 PRA4 PCA7

LX_NB_SNB
2
4 2.61K_0603_1% 2.61K_0603_1% 0.1U_0402_25V6
+APU_VDDSOC

0.1U_0402_25V6
1
TDC 13A(1H1L)

PCA8
680P_0402_50V7K
PCA6
Peak current 17A

3
2
1

2
1
OCP current > 24A

@EMI@
2
FSW=400kHz
ISENA1P_NB DCR 0.98mohm +/-5%
1 2

PRA5
5.23K_0402_1%

ISENA1N_NB

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2017/03/11 Deciphered Date 2019/03/11 Title
PWR_APU_CORE/APU_CORE_NB
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 88 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/09/12 Deciphered Date 2012/09/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 89 of 100
5 4 3 2 1
A
B
C
D

5
5

2 1 2 1 2 1 2 1 2 1 2 1

2
1
+
PCZ401 PCZ301 PCZ201 PCZ131 PCZ121 PCZ111 PCZ101
560U_2.5V_M 180P_0402_50V8J 0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
+APU_VDDCORE

2 1 2 1 2 1 2 1 2 1

2
1
+
PCZ402 PCZ202 PCZ132 PCZ122 PCZ112 PCZ102
560U_2.5V_M 0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1

2
1
+
PCZ403 PCZ203 PCZ133 PCZ123 PCZ113 PCZ103
560U_2.5V_M 0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1

2
1
+
PCZ404 PCZ204 PCZ134 PCZ124 PCZ114 PCZ104
560U_2.5V_M 0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1

PCZ205 PCZ135 PCZ125 PCZ115 PCZ105


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2
1
+
2 1 2 1 2 1 2 1
PCZ411
330U_D2_2.5VY_R9M PCZ206 PCZ126 PCZ116 PCZ106
0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

4
4

2 1 2 1 2 1 2 1

PCZ207 PCZ127 PCZ117 PCZ107


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
+APU_VDDCORE

2 1 2 1 2 1 2 1

PCZ208 PCZ128 PCZ118 PCZ108


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1

PCZ129 PCZ119 PCZ109


22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1

CPU back side


PCZ130 PCZ120 PCZ110
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

330uF_9m
22uF_0603

560uF_10m
APU_CORE

180pF_0402
0.22uF_0402
8
1
4
1

3
3

35

pcs
pcs
pcs

pcs
pcs

Issued Date
Security Classification
2016/12/05
22uF_0603

560uF_10m
180pF_0402
0.22uF_0402

2 1 2 1 2 1 2 1
2
1
+

8
1
2

PCA401 PCA301 PCA201 PCA111 PCA101


18

560U_2.5V_M 180P_0402_50V8J 0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M


APU_CORE_SOC
+APU_VDDSOC

2 1 2 1 2 1
2
1
+

pcs
pcs
pcs

pcs

PCA402 PCA202 PCA112 PCA102

2
2

560U_2.5V_M 0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M


Compal Secret Data 2 1 2 1 2 1
Deciphered Date PCA203 PCA113 PCA103
0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1

PCA204 PCA114 PCA104


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2 1 2 1 2 1
2017/12/05

PCA205 PCA115 PCA105


DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
+APU_VDDSOC

0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M


AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

2 1 2 1 2 1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

PCA206 PCA116 PCA106


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1

PCA207 PCA117 PCA107


C

0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M


Size
Title

Date:

2 1 2 1 2 1

PCA208 PCA118 PCA108


0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1

PCA109
Document Number

22U_0603_6.3V6M
Friday, March 27, 2020

2 1
teknisi-indonesia.com

PCA110
1
1

22U_0603_6.3V6M
Sheet
APU_CORE CAP

90
Compal Electronics, Inc.

of
100
Rev
0.1
A
B
C
D
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/09/12 Deciphered Date 2012/09/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 91 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/09/12 Deciphered Date 2012/09/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 92 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/09/12 Deciphered Date 2012/09/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 93 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/09/12 Deciphered Date 2012/09/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 94 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/09/12 Deciphered Date 2012/09/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 95 of 100
5 4 3 2 1
5 4 3 2 1

+12VSP
Vin = 20V 1st source : LV8296A
Iin = 12*1.83/0.85/20
D
= 1.29A 2nd source : GS7317HSO-R D

7X7X3
Isat: 13.5A
DCR: 40mΩ (Max)
EMI@ PLK11 PLK1
HCB2012KF-800T50_2P +20VB_12V PUK1
PCK10
0.1U_0402_25V7K 4.7UH +-20% WSRPG0603-4R7M-AG 7A
LV8296AHGSP_SO8
1 2 2 1 BST_12V 1 2
+20VB HW_12V_EN EN_12V
VIN BOOT
SW_12V
+12VSP
1 2 7 3 @ PCK9

PRK6 @EMI@
1

10U_0603_25V6M

10U_0603_25V6M

10U_0603_25V6M

10U_0603_25V6M
1
0_0402_5% EN SW 120P_0402_50V8

100U_16V_M
4.7_1206_5%
0.01UF_0402_25V7K

1
@ PRK1 SS_12V 8 6 COMP_12V 1 2 +

PCK12

PCK13

@ PCK14

@ PCK15
2200P_0402_25V7K
SS COMP

PCK16
10U_0603_25V6M

10U_0603_25V6M
68P_0402_50V8K~N

1
PRK2 4 5 FB_12V
PCK2

PCK3

PCK6

TP
0.1U_0402_25V6

SUSP#

2
GND FB
1

1
1 2 2 PRK3
@RF@ PCK1

PCK4

PCK5

2
PCK7 1 2 COMP_12V_R 1 2 LX_12V_SNB
140K_0402_1%

9
@0@ 0.047U_0402_25V7K
2

2
@
EMI@
@EMI@

0_0402_5% PCK8 PRK5

2
@

PCK11 @EMI@
3300P_0402_25V7K 33K_0402_1%

1
680P_0402_50V7K
2

1
PRK4
10K_0402_1%
Vout = Vfb*[1+(Rt/Rb)]

2
= 0.8*[1+(140K/10K)]
C C
= 12V
JUMP@
PJK1
1 2
+12VSP +12VSP 1 2 +12VS_S0
Imax=0.583A,Ipeak=0.833A ; Fsw=340KHz JUMP_43X79

Current Limit=5.1A(Typ)~6.4A(Max) Soldering Short


in_ripple=0.29A
Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=3.004A
LIR=Delta IL/Ipeak=3.6
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
=3.51uF
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.21uF

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/08/29 Deciphered Date 2017/10/19 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+12VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 96 of 100
5 4 3 2 1
5 4 3 2 1

+1.8VP
Imax=2.45A,Ipeak=3.5A ;Fsw=290KHz
Iocp=(Rcs1*Itrip)/(8*Rdson)
D D
Rds : L/S --> typ:10.2ohm ; max: 14mohm
Itrip=9~11 uA
Iocp(set)=10A~14A
Iin_ripple=0.7A
Output Cap. ESR=10mohm
Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=1.202A
LIR=Delta IL/Ipeak=0.343 +1.8VP
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2] Vin = 20V
=334.21uF Iin = 1.816*3.5/0.85/20
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.35uF = 0.406A

EMI@ PL1811
+20VB_1.8V 1 2
+20VB
HCB1608KF-121T30_0603

2200P_0402_25V7K

68P_0402_50V8J
0.1U_0402_25V6

EMI@
PC1810 @EMI@

PC1805 @RF@
1

10U_0603_25V6M

10U_0603_25V6M
1

1
PC1808

PC1802

@ PC1801
1st source: LV8237EZQW

2
C PQ1801 C
+3VALW_S5

5
2nd source: TPS51218DSCR PE606BA_PDFN8-5

2
3rd source: GS7212TD-R

1
@ PR1810 4
100K_0402_1% FB=0.7v 7X7X3
PR1803 PC1803
4.7uH
PU1801

2
2.2_0805_1% 0.22U_0402_25V6K Isat: 10A

3
2
1
PR1808 PG_1.8V 1 10 BST_1.8V 1 2 BST_1.8V_R 1 2 DCR: 40mΩ (Max)
121K_0402_1% PGOOD BOOT PR1801 PL1801
@0@ PR1809 1 2 TRIP_1.8V 2 9 UG_1.8V 1 2 UG_1.8V_R 4.7UH +-20% WSRPG0603-4R7M-AG 7A
0_0402_5% CS UGATE 0_0805_5%
EC_1.8V_EN 1 2 EN_1.8V 3 8 LX_1.8V
EN PHASE PR1806 +1.8VP

1
FB_1.8V 4 7 VCC_1.8V 1 2

@EMI@ PR1805
4.7_1206_5%
1U_0402_6.3V6K
FB VCC
+5VALW_S5
.1U_0402_16V7K

5
TST_1.8V 5 6 LG_1.8V 0_0603_5%

PC1809

10U_0603_25V6M
RF LGATE 1
1
@ PC1811

390U_2.5V_M
1

1
11 +

PC1807

@ PC1806
470K_0402_5%

LX_1.8V_SNB 2
TP
2

PR1802

2
LV8237EGQW(2)_WDFN10_3X3 4 2

2 PQ1802

680P_0402_50V7K
PE600BA_PDFN8-5

@EMI@ PC1804
3
2
1

1
B B
Rds(on):10.2mΩ ~14mΩ

2
PR1804
15.8K_0402_1%
1 2
1

PR1807 JUMP@ PJ1801


10K_0402_1% Vout = Vfb*[1+(Rt/Rb)] 1 2
= 0.704*[1+(15.8K/10K)] +1.8VP 1 2
+1.8VALW_S5
2

= 1.816V JUMP_43X118

soldering short

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2013/08/29 Deciphered Date 2017/10/19 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.8VP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 97 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/09/12 Deciphered Date 2012/09/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Reserve for PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 98 of 100
5 4 3 2 1
5 4 3 2 1

D D

@ PRC10 @ PCC20
10_1206_1% 100P_0603_100V8J
Main : NIKOS / P06P03LVG 1st source:Magic/WQPCRH1005R-470M-N 2A 1 2 LX_BL_R 1 2
2nd : AOS/ AO4459
2nd source:Topsun/SCDH105R-470M-HF 2A
soldering short PQC1
P06P03LVG_SO8 PLC1 PDC1
47UH +-20% WQPCRH1005R-470M-N 2A BX310_SMA2
PJC1 VL_BL LX_BL VOUT_BL
1 8 1 2 2 1
+20VB_BL

10U_0603_25V6M

10U_0603_25V6M
0.1U_0402_25V6
1 2 2 7

47U_100V_M_EKY-101ETD470MJC51
10K_0402_1%
+20VB 1 2

1
10_1206_1%
10U_0603_25V6M

10U_0603_25V6M
3 6 10X10X5

100P_0603_100V8J
1U_1206_100V7K

1U_1206_100V7K
1U_0402_25V6K

1U_0402_25V6K

0.1U_0402_25V6

0.1U_0402_25V6

1st : PANJIT / BX310

PCC1

PCC2

@PCC18

PCC4

PCC3

PRC9
5 1
Isat: 2A

@PRC7
JUMP_43X79 2nd : LRC / SM3100AF
1
DCR:130mΩ (MAX)
1

1
JUMP@ +
PCC23

EMI@ PCC24

EMI@ PCC25

EMI@ PCC26

DIP@ PCC5

PCC6

PCC7

@ PCC8
2

2
2

2
LX_BL_SNB
2

2
FAULT_BL_R 2 2
1
+20VB_BL
EMI@

100P_0603_100V8J
PCC19
1

1
PRC3 @0@
10K_0402_1% PRC8 PRC5 2
1 2 PWM_BL 0_0603_5% 10_0603_1%
C S_INVT_PWM PUC1 JCVT1 C
PCC14
100P_0201_50V8J 1U_0402_25V6K Main : LELON/ RZW470M1JSA-0611 14

2
G2
100K_0402_1%
1

FAULT_BL 1 2 VIN_BL 11 13 2nd : TBD 13


VIN LX G1
1
PRC4

CS1_BL
PCC10

12
ENA_BL 10 12 CS2_BL 11 12

teknisi-indonesia.com
EN LX 10 11
2

PWM_BL 9 16 9 10
2

PWM VOUT CS3_BL 8 9


5 8 VDC_BL CS4_BL 7 8
GND VDC 7

1U_0402_6.3V6K
PCC16 6
PRC1 0.047U_0402_25V7K PRC6 FAULT_BL 6 1 CS1_BL PANEL_ID0 5 6
FAULT CS1 PANEL_ID1 5

PCC15
10K_0402_1% 33K_0402_1% 4
EC_BKOFF#
1 2 ENA_BL 1 2COMP_BL_R
1 2 COMP_BL 7 2 CS2_BL PANEL_ID2 3 4
COMP CS2 PANEL_ID3 2 3

2
CS3_BL PANEL_ID4 2
100P_0201_50V8J

100P_0201_50V8J

100P_0201_50V8J

100P_0201_50V8J

100P_0201_50V8J

100P_0201_50V8J
15 3 1
EC_SMLDAT_BL SMBDAT CS3 1
1
1M_0402_1%

1
CS4_BL
PCC9

PCC27

PCC11

PCC12

PCC13

PCC28
1 2 14 4
PRC2

EC_SMLCLK_BL SMBCLK CS4 CI1112M1HR0-NH


@ PCC17 17
2

2
0.1U_0402_25V6 PGND
2

LV8549DGQW_WDFN16_5X5
B
Main : Richtek / LV8549D B
2nd :UPI / UP6037P
@0@
PRC11
@0@ PRC14
0_0805_5% 0_1206_5%
1 2 1 2 main source : CVILUX_ CI1112M1HR0-NH
@0@
PRC12 second srouce: Highstar_WS23120-S0291-HF
0_0805_5%
1 2
PRC13
@0@
0_0805_5%
1 2

EMI@ PCC21
1U_0201_6.3V6M
1 2

EMI@ PCC22
1U_0201_6.3V6M
1 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2015/11/25 2015/11/25 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CONVERTER/B
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-J751PR01
Date: Sheet 99 of 100
5 4 3 2 1
5 4 3 2 1

NO DATE PAGE MODIFICATION LIST


PURPOSE
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

1 2019/10/09 P088-PWR-APU_CORE(LV3662A) PRA1,PRZ1,PRZ8 to SD008220B80 (S RES 1/8W 2.2 +-1% 0805) Lenovo design check list

P082-PWR-DC Conn PCB2 to SE00000H180 (S CER CAP 1000P 50V J NPO 0402) Sourcer suggestion

All PQ302,PQ304,PQ1802,PQH2,PQZ7 to SB000010S00 (S TR PE600BA 1N PDFN3X3-8) Sourcer suggestion

P088-PWR-APU_CORE(LV3662A) PQA1,PQZ1,PQZ3,PQZ5,PQZ7 to SB000016D00 (S TR PK616BA 1N PDFN) Sourcer suggestion

PQA2,PQZ2,PQZ4,PQZ6,PQZ8 to SB000016E00 (S TR PK632BA 1N PDFN) Sourcer suggestion

P082-PWR-DC Conn PC6,PC7,PC11,PCB7,PCC9,PCC10,PCC11,PCC12,PCC13,PCC27,PCC28, Sourcer suggestion


PCZ2,PCZ3 to SE00000SE00 (S CER CAP 100P 50V J NPO 0201)
D D
P088-PWR-APU_CORE(LV3662A) Reserve PRZ61 for Vgate pull high to +3VS_S0 HW request
2019/11/26 P088-PWR-APU_CORE(LV3662A) PRZ21 =43K , PRZ34 =68K tune load line
2019/11/27 P086-PWR-DDR(LV8231/LV9059) PRM8= 56K ,PCM13 pop 0.1U_0402_25V6 tune load line
2019/12/04 P086-PWR-DDR(LV8231/LV9059) PCM13 change to SE102104K00 cost saving
2019/12/20 P088-PWR-APU_CORE(LV3662A) PCZ24,PCZ33=270PF, PRZ34=82Kohm tune load line and transient
P087-PWR-0.75V(LV5768AGQW) Change VDDP solution to LV5768*2 to meet AMD VDDP SDLE test
2019/12/24 P087-PWR-0.75V(LV5768AGQW) Add VDDP_S5_SENSE for VDDP_S5 remote sense to meet AMD VDDP SDLE test
P082-PWR-DC Conn Modify DC_IN PMOS/INA300/APL3573 BOM structure DC-IN BOM struecture control

2019/3/12 P082-PWR-DC Conn Remove Pmos (PQ1,PC1,PC2,PR3,PR4) and INA300 (PC11,PC12,PR8,PR9,PU1,PR7) design change
Chnage short pad 17pcs design change
PR313,PR1809,PR2501,PRH104,PRH204,
PRK2,PRM10,PRZ16,PRZ19,PRZ31,PRZ33,
PRZ36,PRZ43,PRZ44,PRZ47,PRZ48,PRZ51

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/09/12 Deciphered Date 2012/09/12 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 27, 2020 Sheet 100 of 100
5 4 3 2 1

You might also like