LENOVO FLEX 14 - EL4C1-EL451 LA-H081P r03 20181022

A B C D E
1 1
Compal Confidential
EL4C1 & EL451 (C340/S540-14)
2 2
DIS M/B Schematic Document

Intel Whiskey Lake Processor with DDR4
MX110 (23x23mm)
3
2018-10-18 3
LA-H081P
R E V ：0 . 3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

2018/04/09 2019/04/09 Title
Issued Date Deciphered Date Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-H081P
Date: Monday, October 22, 2018 Sheet 1 of 53
A B C D E
A B C D E
NVIDIA N17S-G0
NVIDIA N17S-G2
DDR4 3200MHz CH-A SO-DIMM X1
TDP:18W PCIe x4 , Gen3 8Gb/s
1
CH-B memory down x4 1
VRAM(GDDR5) X2
2GB
USB2.0 x1, 480Mb/s USB Charger USB2.0 x1, 480Mb/s

NGFF (Key M) PCIe x4 , Gen3 8Gb/s
PCIE/SATA SSD SATA , Gen3 6Gb/s TI SN1702001
USB Conn.
2242/2280 conn. with AOU
USB3.1 x1, Gen1 5Gb/s USB3 redriver USB3.1 x1, Gen1 5Gb/s
Parade PS8713B
NGFF (Key M) PCIe x2 , Gen3 8Gb/s
SATA , Gen3 6Gb/s USB3.1 x1, Gen1 5Gb/s USB3.1 x1, Gen1 5Gb/s
PCIE/SATA SSD USB3 redriver
2242/2280 conn. Parade PS8713B USB Conn.
S540-14 Only USB2.0 x1, 480Mb/s
NGFF (Key E) PCIe x1 , Gen1 2.5Gb/s Intel WHL/CML-U On Sub Board

2
WLAN/BT 2
2230 conn.
USB2.0 x1, 480Mb/s 15W
USB2.0 x1, 480Mb/s
1528pin BGA FingerPrint
eDP Panel eDP x2 , HBR 2.7Gb/s USB2.0 x1, 480Mb/s

FHD LCD Int. Camera
S540-14 Only , use on-cell module
USB2.0 x1, 480Mb/s
I2C Touch Panel
HDMI Conn. Parade DDI x4 , 2.9GT/s C340-14 Only , use T-S module On Sub Board
PS8407A
PCIe x1 , Gen1 2.5Gb/s Card Reader SDIO

Realtek RTS5232S
SD Card Conn.
VBus
3
5V Switch 3
USB2.0 x1, 480Mb/s HDA HP

Combo Jack
Type-C Conn. Audio Codec
USB3.1 Gen1 USB3.1x1, Gen1 USB3 redriver USB3.1x1, Gen1 SPK
USB3.1 Gen1
Mux/CC Int. Speaker
Parade PS8713B CX11880
CC/Vconn I2C_3VLP DMIC
EC Int. Array Mic *2
RTS5448
I2C (C340)
On Sub Board
USB2.0 (S540) TouchPad
SPI SPI ROM

16MB
LPC
4 4
Int. KBD
KBC
Hall Sensor ENE KB9022
LED Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date Deciphered Date
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A B C D E
WWW.AliSaler.Com
1 2 3 4 5
Voltage Rails BOM Structure Table USB 2.0 Port Table

Item BOM Structure Item BOM Structure
Port External USB Port
DIS Only Components DIS@ X4ES540@
X4E
+5VS
UMA Only Components UMA@ X4EC340@ 1 USB2/3 Port (IO - 1)
power HDMI Logo 45@ On Board RAM MD@ 2 USB2/3 Port (IO - 2)
plane +3VS
Touch Screen TS@ no On Board RAM NO_MD@ 3 USB2/3 Port (Type-C)
+5VALW +1.2V +1.05VS_VCCSTG
Memory Down - SDP Package SDP@ On Board RAM X76 Resistors X76RAM@ 4 Touch Screen
B+ +3VALW +2.5V +VCC_CORE
Memory Down - DDP Package DDP@ DRAM (Hynix 4GB) H4G_S540@ 5
+1.8VALW +VCC_GT
GPU GC6 Components GC6@ DRAM (Micron 4GB) M4G_S540@ 6 Camera
A A
+1.05VALW +VCC_SA
Un-Mount GPU GC6 Components NOGC6@ DRAM (Samsung 4GB) S4G_S540@ 7 Fingrt Print
State
Colay SATA/PCIE on M2 SSD_DET@ 8
+1.05VS_VCCIO
EMI Category EMI@ H4G_VRAM@ 9
+1.8VS
ESD Category ESD@ H4G@ 10 NGFF WLAN+BT
VRAM (Hynix 4GB)
+0.6VS
RF Category RF@ H4G_R1@
Test Point TP@ H4G_R3@ USB 3.0 Port Table PCIE Port Table
KBL@ S4G_VRAM@
Keyboard BackLight
NOKBL@ S4G@ Port Port Lane
VRAM (Samsung 4GB)
S0
S540@ S4G_R1@ 1 USB2/3 Port (IO - 1) 1
O O O O Project select S340@ S4G_R3@ 2 USB2/3 Port (IO - 2) 2
C340@ M4G_VRAM@ 3 USB2/3 Port (Type-C) 3
S3
ONEKEY@ M4G@ 4 4 0
O O O X OneKeyBattery VRAM (Micron 4GB)
NON_ONEKEY@ M4G_R1@ 5 5 0
S5 S4/AC
CNVi@ M4G_R3@ 6 6 1
O O X X Intel CNVi DGPU
NONCNVi@ 7 2
S5 S4/ Battery only
N17S_G0@ SATA Port Table 8 3
O X X X N17S_G2@ 9 3
GPU select
S5 S4/AC & Battery
N16S@ Port 10 2
X X X X SSD1
don't exist N17S@ 0 11 1
Connectors ME@ 1A SSD1 12 0
13 0 CardReader
B B
14 0 NGFF WLAN+BT
1B 15 1
SSD2
2 SSD2 16 0
EC SM Bus1 address EC SM Bus2 address

Device Address Device Address
Smart Battery 0001 011x 16h NCT7718W 1001 100x 98h
thermal sensor 1001 101xb 21h CPU PCB X4E X4E_S540_14 X4E_C340_14
ZZZ PCB@ ZZZ X4ES540@ ZZZ X4EC340@
UC1 I3_8145U@ UC1 I5_8265U@ UC1 I7_8565U@
PCH SM Bus address GPU SM Bus address

Device Address Device Address X4E_S540_14 X4E_C340_14
QQK9 W0 2.1G BGA QQTG W0 1.6G BGA QQK6 W0 1.8G BGA PCB 2GA LA-H081P REV0 M/B 4 X4EAF638L51 X4EAF638L01
DDR_JDIMM1 1010 000x A0h Internal thermal sensor 1001 111x 9Eh SA0000C6R20 SA0000C6Q20 SA0000C6P20 DA8001H4000
Touch Pad
UC1 I3_8145U_R3@ UC1 I5_8265U_R3@ UC1 I7_8565U_R3@ GPU
SMBUS Control Table

UV1 N17S_G0@ UV1 N17S_G2@
SRD1V W0 2.1G SREJQ W0 1.6G SREJP W0 1.8G

SA0000C6R30 SA0000C6Q30 SA0000C6P30
G- THM
SOURCE DGPU BATT CHARGER NECP388 SODIMM TP PCH SENSOR sensor N17S-G0-A1
SA0000CC900
N17S-G2-A1
SA0000CCB00
EC_SMB_CK1
X V V X X X X X X
C C
NECP388
EC_SMB_DA1 +3VL +3VALW +19V_VIN DRAM S540 VRAM S540
EC_SMB_CK2
V X X V X X V X V
ZZZ S4G_S540@ ZZZ H4G_S540@ ZZZ M4G_S540@
NECP388 ZZZ VH4G_S540@ ZZZ VM4G_S540@
EC_SMB_DA2 +3VS +3VS +3VS +3VS +3VS
EC_SMB_CK4
EC_SMB_DA4
NECP388
+3VS
X X X X X X X V
+3VS
X K4A8G165WC-BCTD H5AN8G6NCJR-VKC MT40A512M16LY-075:E
X7680638L05 X7680638L04 X7680638L06 H5GC8H24AJR-R2C MT51J256M32HF-80:B
SOC_SMBCLK
X X X X V V X X X
X7680638L01 X7680638L03
PCH
SOC_SMBDATA +3VALW +3VS +3VS
SOC_SML0CLK
SOC_SML0DATA
PCH
+3VALW
X X X X X X X X X DRAM C340 VRAM C340
ZZZ3 S4G_C340@ ZZZ2 H4G_C340@ ZZZ1 M4G_C340@ ZZZ VH4G_C340@ ZZZ VM4G_C340@
EC_SMB_CK2
EC_SMB_DA2
PCH
+3VS
V
+3VS
X X V
+3VS
X X X X X
K4A8G165WC-BCTD H5AN8G6NCJR-VKC MT40A512M16LY-075:E H5GC8H24AJR-R2C MT51J256M32HF-80:B
X7680538L06 X7680538L04 X7680538L05 X7680538L01 X7680538L03
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF

D D
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW LOW OFF OFF OFF OFF
Security Classification Compal Secret Data

Title
Issued Date 2018/04/09 Deciphered Date 2019/04/09
Size
Notes List
Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LA-H081P
Monday, October 22, 2018 Sheet 3 of 53
1 2 3 4 5
5 4 3 2 1
-PowerMap_KBL_DDR4_Volume_NON CS]
B+
D D
C C
B B
A A
WWW.AliSaler.Com
Issued Date 2018/04/09 Deciphered Date 2019/04/09 Title
Power MAP
Size Document Number Rev
LA-C071P 0.2
5 4 3 2 1
5 4 3 2 1
G3->S0 S0->S3/DS3 S0/ DS3 ->S0 S0->S5

+3VL_RTC +3VL_RTC
tPCH01_Min : 9 ms
SOC_RTCRST# SOC_RTCRST#
B+ B+
D D
+3VLP/+5VLP +3VLP/+5VLP
EC_ON EC_ON
tPCH04_Min : 9 ms
+5VALW/+3VALW/+3VALW_DSW +5VALW/+3VALW/+3VALW_DSW
Pull-up to DSW well if not implemented.
PM_BATLOW# PM_BATLOW#
PCH_PWR_EN (SLP_SUS#) PCH_PWR_EN (SLP_SUS#)
+3V_PRIM +3V_PRIM
+1.8V_PRIM +1.8V_PRIM
EXT_PWR_GATE# If EXT_PWR_GATE# Toffmin is too small, Pwr EXT_PWR_GATE#

gate may choose to completely ignore it
+1.0V_MPHYPLL +1.0V_MPHYPLL
+1.0V_PRIM_CORE +1.0V_PRIM_CORE
tPCH34_Max : 20 ms
+1.0V_PRIM tPCH06_Min : 200 us +1.0V_PRIM
SUSACK# SUSACK#
tPCH02_Min : 10 ms
PCH_DPWROK PCH_DPWROK
tPCH03_Min : 10 ms
EC_RSMRST# EC_RSMRST#
tPLT02_Min : 0 ms Max : 90 ms
C C
AC_PRESENT AC_PRESENT
ON/OFF ON/OFF
tPCH43_Min : 95 ms
PBTN_OUT# PBTN_OUT#
Minimum duration of PWRBTN# assertion = 16mS. PWRBTN# can assert before or after RSMRST#
PM_SLP_S5# PM_SLP_S5#
tPCH18_Min : 90 us
ESPI_RST# ESPI_RST#
SYSON SYSON
+1.0V_VCCST/+1.0V_VCCSFR +1.0V_VCCST/+1.0V_VCCSFR
+1.35V_VDDQ/+1.35V_VCCSFR_OC +1.35V_VDDQ/+1.35V_VCCSFR_OC
SUSP# SUSP#
tCPU04 Min : 100 ns
+1.0VS_VCCSTG +1.0VS_VCCSTG
tCPU10 Min : 1 ms
B
+1.0VS_VCCIO +1.0VS_VCCIO B
T <=10msec
+5VS/+3VS/+1.5VS/+1.05VS
+5VS/+3VS/+1.5VS/+1.05VS
T = 10msec
EC_VCCST_PG EC_VCCST_PG
VR_ON VR_ON
tCPU19 Max : 100 ns
SM_PG_CTRL
tCPU18 Max : 35 us
+0.675VS_VTT
tCPU09 Min : 1 ms
+VCC_SA +VCC_SA
+VCC_CORE +VCC_CORE
+VCC_GT +VCC_GT
VR_PWRGD VR_PWRGD
tCPU16 Min : 0 ns
PCH_PWROK PCH_PWROK
H_CPUPWRGD H_CPUPWRGD
SYS_PWROK SYS_PWROK
A A
SUS_STAT# SUS_STAT#
SOC_PLTRST#
SOC_PLTRST#

2018/04/09 2019/04/09 Title
Power Sequence
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.2
Date:
LA-H081P Sheet
Monday, October 22, 2018 5 of 53
5 4 3 2 1
A B C D E
UC1A
AL5 AG4
AL6 DDI1_TXN_0 EDP_TXN_0 AG3 EDP_TXN0 [28]
DDI1_TXP_0 EDP_TXP_0 EDP_TXP0 [28]
AJ5 AG2 <eDP>
DDI1_TXN_1 EDP_TXN_1 EDP_TXN1 [28]
AJ6 AG1
AF6 DDI1_TXP_1 EDP_TXP_1 AJ4 EDP_TXP1 [28]
AF5 DDI1_TXN_2 EDP_TXN_2 AJ3 EDP_TXN2 [28]
AE5 DDI1_TXP_2 EDP_TXP_2 AJ2 EDP_TXP2 [28]
DDI1_TXN_3 EDP_TXN_3 EDP_TXN3 [28]
AE6 AJ1
DDI1_TXP_3 EDP_TXP_3 EDP_TXP3 [28]
AC4
[29] CPU_DP2_N0 AC3 DDI2_TXN_0 AH4
[29] CPU_DP2_P0 DDI2_TXP_0 EDP_AUX_N EDP_AUXN [28]
AC1 AH3
[29] CPU_DP2_N1 DDI2_TXN_1 EDP_AUX_P EDP_AUXP [28]
1
AC2 1
[29] CPU_DP2_P1 DDI2_TXP_1
<HDMI> [29] CPU_DP2_N2
AE4 AM7
AE3 DDI2_TXN_2 DISP_UTILS
[29] CPU_DP2_P2 AE1 DDI2_TXP_2 AC7 +3VS
[29] CPU_DP2_N3 AE2 DDI2_TXN_3 DDI1_AUX_N AC6
[29] CPU_DP2_P3 DDI2_TXP_3 DDI1_AUX_P AD4
DDI2_AUX_N AD3 EC_SCI# RC1 1 2 10K_0201_5%
DDI2_AUX_P AG7
DDI3_AUX_N AG6
DDI3_AUX_P
CN6
GPP_E13/DDPB_HPD0/DISP_MISC0 CM6
GPP_E14/DDPC_HPD1/DISP_MISC1 CP7
CPU_DP2_HPD [29] From HDMI
GPP_E15/DPPD_HPD2/DISP_MISC2 CP6
GPP_E16/DPPE_HPD3/DISP_MISC3 EC_SCI# [33]
CM7 EDP_HPD [28] From eDP
GPP_E17/EDP_HPD/DISP_MISC4
CK11
EDP_BKLTEN ENBKL [33]
CG11
EDP_VDDEN PCH_ENVDD [28]
CH11
EDP_BKLTCTL INVPWM [28]
EDP_COMP AM6
DISP_RCOMP
CC8
CC9 GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE#
GPP_E19/DPPB_CTRLDATA
CH4
[29] CPU_DP2_CTRL_CLK GPP_E20/DPPC_CTRLCLK
< Compensation PU For eDP > HDMI DDC (Port 2) [29] CPU_DP2_CTRL_DATA
CH3
GPP_E21/DPPC_CTRLDATA
CP4
+1.05VS_VCCIO CN4 GPP_E22/DPPD_CTRLCLK
[28] TS_I2C_RST# GPP_E23/DPPD_CTRLDATA
CR26
2
RC2 1 2 EDP_COMP CP26 GPP_H16/DDPF_CTRLCLK 2
24.9_0201_1% GPP_H17/DDPF_CTRLDATA
Trace width=20 mils, Spacing=25mil, Max length=600mils

CFLU-43E_BGA1528
@
1 of 20
+1.05VS_VCCIO < Test Point for CMC Debug >

1
If routed MS, PECI requires 18 mils spacing to other signals

RC3
1K_0201_5% UC1D
CATERR# AA4 T6 CPU_XDP_TCK0
H_PECI CATERR# PROC_TCK SOC_XDP_TDI TP@ T2408
AR1 U6
[33] H_PECI TP@ T2409
2
1 2 H_PROCHOT#_R Y4 PECI PROC_TDI Y5 SOC_XDP_TDO

+1.05V_VCCST [33] H_PROCHOT# H_THERMTRIP# PROCHOT# PROC_TDO SOC_XDP_TMS TP@ T2410
RC4 499_0402_1% BJ1 T5 TP@ T2411
THRMTRIP# PROC_TMS AB6 SOC_XDP_TRST#
PROC_TRST# TP@ T2412
U1
U2 BPM#_0
1 2 H_THERMTRIP# U3 BPM#_1 W6 PCH_JTAG_TCK1
BPM#_2 PCH_TCK SOC_XDP_TDI TP@ T2413
3 RC8 1K_0201_5% U4 U5 3
BPM#_3 PCH_TDI W5 SOC_XDP_TDO
PCH_TDO P5 SOC_XDP_TMS
@ CE9 PCH_TMS Y6 SOC_XDP_TRST#
2 1 CATERR# CN3 GPP_E3/CPU_GP0 PCH_TRST# P6 CPU_XDP_TCK0
RC10 49.9_0402_1% CB34 GPP_E7/CPU_GP1 PCH_JTAGX
CC35 GPP_B3/CPU_GP2
GPP_B4/CPU_GP3 W2
PROC_PREQ# TP@ T1
W1
PROC_PRDY# TP@ T2
RC11 2 1 49.9_0402_1% CPU_POPIRCOMP BP27
RC12 2 1 49.9_0402_1% PCH_OPIRCOMP BW25 PROC_POPIRCOMP
RC14 2 @ 1 49.9_0402_1% EDRAM_OPIO_RCOMP L5 PCH_OPIRCOMP
OPCE_RCOMP
RC15 2 @ 1 49.9_0402_1% EOPIO_RCOMP N5

OPC_RCOMP
CFLU-43E_BGA1528
@
4 of 20
4 4

WHL-U(1/12)DDI,EDP,MISC,CMC
WWW.AliSaler.Com
A B C D E
5 4 3 2 1
Non-Interleaved Memory
D D
UC1C
[18] DDR_A_D[16..31] DDR_A_D16 DDR_B_CLK#0
UC1B J22 AF28 DDR_B_CLK#0 [19]
[18] DDR_A_D[0..15] DDR_A_D0 DDR_A_D17 DDR1_DQ_0/DDR0_DQ_16
DDR1_CKN_0/DDR1_CKN_0 DDR_B_CLK0
A26 H25 AF29 DDR_B_CLK0 [19]
DDR_A_D1 D26 DDR0_DQ_0/DDR0_DQ_0 V32 DDR_A_CLK#0 DDR_A_D18 G22 DDR1_DQ_1/DDR0_DQ_17DDR1_CKP_0/DDR1_CKP_0 AE28 DDR_B_CLK#1
DDR_A_D2 DDR0_DQ_1/DDR0_DQ_1 DDR0_CKN_0/DDR0_CKN_0 DDR_A_CLK0 DDR_A_CLK#0 [18] DDR_A_D19 DDR1_DQ_2/DDR0_DQ_18
DDR1_CKN_1/DDR1_CKN_1 DDR_B_CLK1 DDR_B_CLK#1 [19]
D28 V31 DDR_A_CLK0 [18]
H22 AE29 DDR_B_CLK1 [19]
DDR_A_D3 C28 DDR0_DQ_2/DDR0_DQ_2 DDR0_CKP_0/DDR0_CKP_0 T32 DDR_A_CLK#1 DDR_A_D20 F25 DDR1_DQ_3/DDR0_DQ_19DDR1_CKP_1/DDR1_CKP_1
DDR_A_D4 DDR0_DQ_3/DDR0_DQ_3 DDR0_CKN_1/DDR0_CKN_1 DDR_A_CLK1 TP@ T3 DDR_A_D21 DDR1_DQ_4/DDR0_DQ_20 DDR_B_CKE0
B26 T31 TP@ T4 J25 T28 DDR_B_CKE0 [19]
DDR_A_D5 C26 DDR0_DQ_4/DDR0_DQ_4 DDR0_CKP_1/DDR0_CKP_1 DDR_A_D22 G25 DDR1_DQ_5/DDR0_DQ_21DDR1_CKE_0/DDR1_CKE_0 T29 DDR_B_CKE1
DDR_A_D6 DDR0_DQ_5/DDR0_DQ_5 DDR_A_CKE0 DDR_A_D23 DDR1_DQ_6/DDR0_DQ_22DDR1_CKE_1/DDR1_CKE_1 DDR_B_CKE1 [19]
B28 U36 DDR_A_CKE0 [18,20] F22 V28
DDR_A_D7 A28 DDR0_DQ_6/DDR0_DQ_6 DDR0_CKE_0/DDR0_CKE_0 U37 DDR_A_CKE1 DDR_A_D24 D22 DDR1_DQ_7/DDR0_DQ_23 DDR1_CKE_2/NC V29
DDR_A_D8 DDR0_DQ_7/DDR0_DQ_7 DDR0_CKE_1/DDR0_CKE_1 TP@ T6 DDR_A_D25 DDR1_DQ_8/DDR0_DQ_24 DDR1_CKE_3/NC
B30 U34 C22
DDR_A_D9 D30 DDR0_DQ_8/DDR0_DQ_8 DDR0_CKE_2/NC U35 DDR_A_D26 C24 DDR1_DQ_9/DDR0_DQ_25 AL37 DDR_B_CS#0
DDR_A_D10 DDR0_DQ_9/DDR0_DQ_9 DDR0_CKE_3/NC DDR_A_D27 DDR1_DQ_10/DDR0_DQ_26
DDR1_CS#_0/DDR1_CS#_0 DDR_B_CS#1 DDR_B_CS#0 [19]
B33 D24 AL35 DDR_B_CS#1 [19]
DDR_A_D11 D32 DDR0_DQ_10/DDR0_DQ_10 AE32 DDR_A_CS#0 DDR_A_D28 A22 DDR1_DQ_11/DDR0_DQ_27
DDR1_CS#_1/DDR1_CS#_1 AL36 DDR_B_ODT0
DDR_A_D12 DDR0_DQ_11/DDR0_DQ_11 DDR0_CS#_0/DDR0_CS#_0 DDR_A_CS#1 DDR_A_CS#0 [18,20] DDR_A_D29 DDR1_DQ_12/DDR0_DQ_28
DDR1_ODT_0/DDR1_ODT_0 DDR_B_ODT1 DDR_B_ODT0 [19]
A30 AF32 TP@ T5 B22 AL34 DDR_B_ODT1 [19]
DDR_A_D13 C30 DDR0_DQ_12/DDR0_DQ_12 DDR0_CS#_1/DDR0_CS#_1 AE31 DDR_A_ODT0 DDR_A_D30 A24 DDR1_DQ_13/DDR0_DQ_29 NC/DDR1_ODT_1 AG36 DDR_B_MA0
DDR_A_D14 DDR0_DQ_13/DDR0_DQ_13 DDR0_ODT_0/DDR0_ODT_0 DDR_A_ODT1 DDR_A_ODT0 [18,20] DDR_A_D31 DDR1_DQ_14/DDR0_DQ_30DDR1_CAB_9/DDR1_MA_0 DDR_B_MA1 DDR_B_MA0 [19]
B32 AF31 TP@ T7 B24 AG35 DDR_B_MA1 [19]
DDR_A_D15 DDR0_DQ_14/DDR0_DQ_14 NC/DDR0_ODT_1 [18] DDR_A_D[48..63] DDR_A_D48 DDR1_DQ_15/DDR0_DQ_31DDR1_CAB_8/DDR1_MA_1 DDR_B_MA2
C32 G31 AF34 DDR_B_MA2 [19]
[18] DDR_A_D[32..47] DDR_A_D32 DDR0_DQ_15/DDR0_DQ_15 DDR_A_MA0 DDR_A_D49 DDR1_DQ_16/DDR0_DQ_48DDR1_CAB_5/DDR1_MA_2 DDR_B_MA3
H37 AC37 DDR_A_MA0 [18,20] G32 AG37 DDR_B_MA3 [19]
DDR_A_D33 H34 DDR0_DQ_16/DDR0_DQ_32 DDR0_CAB_9/DDR0_MA_0 AC36 DDR_A_MA1 DDR_A_D50 H29 DDR1_DQ_17/DDR0_DQ_49 NC/DDR1_MA_3 AE35 DDR_B_MA4
DDR_A_D34 DDR0_DQ_17/DDR0_DQ_33 DDR0_CAB_8/DDR0_MA_1 DDR_A_MA2 DDR_A_MA1 [18,20] DDR_A_D51 DDR1_DQ_18/DDR0_DQ_50 NC/DDR1_MA_4 DDR_B_MA5 DDR_B_MA4 [19]
K34 AC34 DDR_A_MA2 [18,20] H28 AF35 DDR_B_MA5 [19]
DDR_A_D35 K35 DDR0_DQ_18/DDR0_DQ_34 DDR0_CAB_5/DDR0_MA_2 AC35 DDR_A_MA3 DDR_A_D52 G28 DDR1_DQ_19/DDR0_DQ_51DDR1_CAA_0/DDR1_MA_5 AE37 DDR_B_MA6
DDR_A_D36 DDR0_DQ_19/DDR0_DQ_35 NC/DDR0_MA_3 DDR_A_MA4 DDR_A_MA3 [18,20] DDR_A_D53 DDR1_DQ_20/DDR0_DQ_52DDR1_CAA_2/DDR1_MA_6 DDR_B_MA7 DDR_B_MA6 [19]
H36 AA35 DDR_A_MA4 [18,20] G29 AC29 DDR_B_MA7 [19]
DDR_A_D37 H35 DDR0_DQ_20/DDR0_DQ_36 NC/DDR0_MA_4 AB35 DDR_A_MA5 DDR_A_D54 H31 DDR1_DQ_21/DDR0_DQ_53DDR1_CAA_4/DDR1_MA_7 AE36 DDR_B_MA8
DDR_A_D38 DDR0_DQ_21/DDR0_DQ_37 DDR0_CAA_0/DDR0_MA_5 DDR_A_MA6 DDR_A_MA5 [18,20] DDR_A_D55 DDR1_DQ_22/DDR0_DQ_54DDR1_CAA_3/DDR1_MA_8 DDR_B_MA9 DDR_B_MA8 [19]
K36 AA37 DDR_A_MA6 [18,20] H32 AB29 DDR_B_MA9 [19]
DDR_A_D39 K37 DDR0_DQ_22/DDR0_DQ_38 DDR0_CAA_2/DDR0_MA_6 AA36 DDR_A_MA7 DDR_A_D56 L31 DDR1_DQ_23/DDR0_DQ_55DDR1_CAA_1/DDR1_MA_9 AG34 DDR_B_MA10
DDR_A_D40 DDR0_DQ_23/DDR0_DQ_39 DDR0_CAA_4/DDR0_MA_7 DDR_A_MA8 DDR_A_MA7 [18,20] DDR_A_D57 DDR1_DQ_24/DDR0_DQ_56
DDR1_CAB_7/DDR1_MA_10 DDR_B_MA11 DDR_B_MA10 [19]
N36 AB34 DDR_A_MA8 [18,20] L32 AC28 DDR_B_MA11 [19]
DDR_A_D41 N34 DDR0_DQ_24/DDR0_DQ_40 DDR0_CAA_3/DDR0_MA_8 W36 DDR_A_MA9 DDR_A_D58 N29 DDR1_DQ_25/DDR0_DQ_57
DDR1_CAA_7/DDR1_MA_11 AB28 DDR_B_MA12
DDR_A_D42 DDR0_DQ_25/DDR0_DQ_41 DDR0_CAA_1/DDR0_MA_9 DDR_A_MA10 DDR_A_MA9 [18,20] DDR_A_D59 DDR1_DQ_26/DDR0_DQ_58
DDR1_CAA_6/DDR1_MA_12 DDR_B_MA13 DDR_B_MA12 [19]
R37 Y31 DDR_A_MA10 [18,20] N28 AK35 DDR_B_MA13 [19]
C DDR_A_D43 R34 DDR0_DQ_26/DDR0_DQ_42 DDR0_CAB_7/DDR0_MA_10 W34 DDR_A_MA11 DDR_A_D60 L28 DDR1_DQ_27/DDR0_DQ_59
DDR1_CAB_0/DDR1_MA_13 C
DDR_A_D44 DDR0_DQ_27/DDR0_DQ_43 DDR0_CAA_7/DDR0_MA_11 DDR_A_MA12 DDR_A_MA11 [18,20] DDR_A_D61 DDR1_DQ_28/DDR0_DQ_60 DDR_B_MA14
N37 AA34 DDR_A_MA12 [18,20] L29 AJ35 DDR_B_MA14 [19]
DDR_A_D45 N35 DDR0_DQ_28/DDR0_DQ_44 DDR0_CAA_6/DDR0_MA_12 AC32 DDR_A_MA13 DDR_A_D62 N31 DDR1_DQ_29/DDR0_DQ_61
DDR1_CAB_2/DDR1_MA_14 AK34 DDR_B_MA15
DDR_A_D46 DDR0_DQ_29/DDR0_DQ_45 DDR0_CAB_0/DDR0_MA_13 DDR_A_MA13 [18,20] DDR_A_D63 DDR1_DQ_30/DDR0_DQ_62
DDR1_CAB_1/DDR1_MA_15 DDR_B_MA16 DDR_B_MA15 [19]
R36 N32 AJ34 DDR_B_MA16 [19]
DDR_A_D47 DDR0_DQ_30/DDR0_DQ_46 DDR_A_MA14 [19] DDR_B_D[16..31] DDR_B_D16 DDR1_DQ_31/DDR0_DQ_63
DDR1_CAB_3/DDR1_MA_16
R35 AC31 DDR_A_MA14 [18,20] AJ29
[19] DDR_B_D[0..15] DDR_B_D0 DDR0_DQ_31/DDR0_DQ_47 DDR0_CAB_2/DDR0_MA_14 DDR_A_MA15 DDR_B_D17 DDR1_DQ_32/DDR1_DQ_16 DDR_B_BA0
AN35 AB32 DDR_A_MA15 [18,20]
AJ30 AJ37 DDR_B_BA0 [19]
DDR_B_D1 AN34 DDR0_DQ_32/DDR1_DQ_0 DDR0_CAB_1/DDR0_MA_15 Y32 DDR_A_MA16 DDR_B_D18 AM32 DDR1_DQ_33/DDR1_DQ_17DDR1_CAB_4/DDR1_BA_0 AJ36 DDR_B_BA1
DDR_B_D2 DDR0_DQ_33/DDR1_DQ_1 DDR0_CAB_3/DDR0_MA_16 DDR_A_MA16 [18,20] DDR_B_D19 DDR1_DQ_34/DDR1_DQ_18DDR1_CAB_6/DDR1_BA_1 DDR_B_BG0 DDR_B_BA1 [19]
AR35 AM31 W29 DDR_B_BG0 [19]
DDR_B_D3 AR34 DDR0_DQ_34/DDR1_DQ_2 W32 DDR_A_BA0 DDR_B_D20 AM30 DDR1_DQ_35/DDR1_DQ_19DDR1_CAA_5/DDR1_BG_0
DDR_B_D4 DDR0_DQ_35/DDR1_DQ_3 DDR0_CAB_4/DDR0_BA_0 DDR_A_BA1 DDR_A_BA0 [18,20] DDR_B_D21 DDR1_DQ_36/DDR1_DQ_20 DDR_B_BG1
AN37 AB31 DDR_A_BA1 [18,20] AM29 Y28 DDR_B_BG1 [19]
DDR_B_D5 AN36 DDR0_DQ_36/DDR1_DQ_4 DDR0_CAB_6/DDR0_BA_1 V34 DDR_A_BG0 DDR_B_D22 AJ31 DDR1_DQ_37/DDR1_DQ_21DDR1_CAA_9/DDR1_BG_1 W28 DDR_B_ACT#
DDR_B_D6 DDR0_DQ_37/DDR1_DQ_5 DDR0_CAA_5/DDR0_BG_0 DDR_A_BG0 [18,20] DDR_B_D23 DDR1_DQ_38/DDR1_DQ_22DDR1_CAA_8/DDR1_ACT# DDR_B_ACT# [19]
AR36 AJ32
DDR_B_D7 AR37 DDR0_DQ_38/DDR1_DQ_6 V35 DDR_A_ACT# DDR_B_D24 AR31 DDR1_DQ_39/DDR1_DQ_23 H24 DDR_A_DQS#2
DDR_B_D8 DDR0_DQ_39/DDR1_DQ_7 DDR0_CAA_8/DDR0_ACT# DDR_A_BG1 DDR_A_ACT# [18,20] DDR_B_D25 DDR1_DQ_40/DDR1_DQ_24
DDR1_DQSN_0/DDR0_DQSN_2 DDR_A_DQS2 DDR_A_DQS#2 [18]
AU35 W35 DDR_A_BG1 [18] AR32 G24 DDR_A_DQS2 [18]
DDR_B_D9 AU34 DDR0_DQ_40/DDR1_DQ_8 DDR0_CAA_9/DDR0_BG_1 DDR_B_D26 AV30 DDR1_DQ_41/DDR1_DQ_25
DDR1_DQSP_0/DDR0_DQSP_2 C23 DDR_A_DQS#3
DDR_B_D10 DDR0_DQ_41/DDR1_DQ_9 DDR_A_DQS#0 DDR_B_D27 DDR1_DQ_42/DDR1_DQ_26
AW35 C27 DDR_A_DQS#0 [18] AV29 D23 DDR_A_DQS3 [18]
DDR_B_D11 AW34 DDR0_DQ_42/DDR1_DQ_10
DDR0_DQSN_0/DDR0_DQSN_0 D27 DDR_A_DQS0 DDR_B_D28 AR30 DDR1_DQ_43/DDR1_DQ_27
DDR1_DQSP_1/DDR0_DQSP_3 G30 DDR_A_DQS#6
DDR_B_D12 DDR0_DQ_43/DDR1_DQ_11
DDR0_DQSP_0/DDR0_DQSP_0 DDR_A_DQS#1 DDR_A_DQS0 [18] DDR_B_D29 DDR1_DQ_44/DDR1_DQ_28
AU37 D31 DDR_A_DQS#1 [18] AR29 H30 DDR_A_DQS6 [18]
DDR_B_D13 AU36 DDR0_DQ_44/DDR1_DQ_12
DDR0_DQSN_1/DDR0_DQSN_1 C31 DDR_A_DQS1 DDR_B_D30 AV32 DDR1_DQ_45/DDR1_DQ_29
DDR1_DQSP_2/DDR0_DQSP_6 L30 DDR_A_DQS#7
DDR0_DQSP_1/DDR0_DQSP_1 DDR_A_DQS#4 DDR_A_DQS1 [18] DDR_B_D31 DDR1_DQ_46/DDR1_DQ_30
AW36 J35 DDR_A_DQS#4 [18] AV31 N30 DDR_A_DQS7 [18]
DDR0_DQSN_2/DDR0_DQSN_4 DDR_A_DQS4 [19] DDR_B_D[48..63] DDR_B_D48 DDR1_DQ_47/DDR1_DQ_31
DDR1_DQSP_3/DDR0_DQSP_7 DDR_B_DQS#2
AW37 J34 DDR_A_DQS4 [18] BA32 AL31 DDR_B_DQS#2 [19]
[19] DDR_B_D[32..47] DDR_B_D32 DDR0_DQ_47/DDR1_DQ_15
DDR0_DQSP_2/DDR0_DQSP_4 DDR_A_DQS#5 DDR_B_D49 DDR1_DQ_48/DDR1_DQ_48
DDR1_DQSN_4/DDR1_DQSN_2 DDR_B_DQS2
BA35 P34 DDR_A_DQS#5 [18] BA31 AL30 DDR_B_DQS2 [19]
DDR_B_D33 BA34 DDR0_DQ_48/DDR1_DQ_32
DDR0_DQSN_3/DDR0_DQSN_5 P35 DDR_A_DQS5 DDR_B_D50 BD31 DDR1_DQ_49/DDR1_DQ_49
DDR1_DQSP_4/DDR1_DQSP_2 AU31 DDR_B_DQS#3
DDR0_DQSP_3/DDR0_DQSP_5 DDR_B_DQS#0 DDR_A_DQS5 [18] DDR_B_D51 DDR1_DQ_50/DDR1_DQ_50
DDR1_DQSN_5/DDR1_DQSN_3 DDR_B_DQS3 DDR_B_DQS#3 [19]
BC35 AP35 DDR_B_DQS#0 [19] BD32 AU30 DDR_B_DQS3 [19]
DDR_B_D35 BC34 DDR0_DQ_50/DDR1_DQ_34
DDR0_DQSN_4/DDR1_DQSN_0 AP34 DDR_B_DQS0 DDR_B_D52 BA30 DDR1_DQ_51/DDR1_DQ_51
DDR1_DQSP_5/DDR1_DQSP_3 BC31 DDR_B_DQS#6
DDR0_DQSP_4/DDR1_DQSP_0 DDR_B_DQS#1 DDR_B_DQS0 [19] DDR_B_D53 DDR1_DQ_52/DDR1_DQ_52
BA37 AV34 DDR_B_DQS#1 [19] BA29 BC30 DDR_B_DQS6 [19]
DDR_B_D37 BA36 DDR0_DQ_52/DDR1_DQ_36
DDR0_DQSN_5/DDR1_DQSN_1 AV35 DDR_B_DQS1 DDR_B_D54 BD29 DDR1_DQ_53/DDR1_DQ_53
DDR1_DQSP_6/DDR1_DQSP_6 BH31 DDR_B_DQS#7
DDR0_DQSP_5/DDR1_DQSP_1 DDR_B_DQS#4 DDR_B_DQS1 [19] DDR_B_D55 DDR1_DQ_54/DDR1_DQ_54
BC36 BB35 DDR_B_DQS#4 [19] BD30 BH30 DDR_B_DQS7 [19]
DDR_B_D39 BC37 DDR0_DQ_54/DDR1_DQ_38
DDR0_DQSN_6/DDR1_DQSN_4 BB34 DDR_B_DQS4 DDR_B_D56 BG31 DDR1_DQ_55/DDR1_DQ_55
DDR1_DQSP_7/DDR1_DQSP_7
DDR0_DQSP_6/DDR1_DQSP_4 DDR_B_DQS#5 DDR_B_DQS4 [19] DDR_B_D57 DDR1_DQ_56/DDR1_DQ_56 DDR_B_ALERT#
BE35 BF34 DDR_B_DQS#5 [19] BG32 Y29
DDR0_DQSN_7/DDR1_DQSN_5 DDR_B_DQS5 DDR_B_D58 DDR1_DQ_57/DDR1_DQ_57 NC/DDR1_ALERT# DDR_B_PARITY DDR_B_ALERT# [19]
BE34 BF35 DDR_B_DQS5 [19] BK32 AE34 DDR_B_PARITY [19]
DDR_B_D42 BG35 DDR0_DQ_57/DDR1_DQ_41
DDR0_DQSP_7/DDR1_DQSP_5 DDR_B_D59 BK31 DDR1_DQ_58/DDR1_DQ_58 NC/DDR1_PAR BU31 DDR_DRAMRST#
DDR_B_D43 DDR0_DQ_58/DDR1_DQ_42 DDR_A_ALERT# DDR_B_D60 DDR1_DQ_59/DDR1_DQ_59 DRAM_RESET# DDR_DRAMRST# [18,19]
BG34 W37 BG29
DDR_B_D44 DDR0_DQ_59/DDR1_DQ_43 NC/DDR0_ALERT# DDR_A_PARITY DDR_A_ALERT# [18] DDR_B_D61 DDR1_DQ_60/DDR1_DQ_60 SM_RCOMP0
BE37 W31 DDR_A_PARITY [18,20] BG30 BN28 RC17 1 2 121_0402_1%
DDR_B_D45 BE36 DDR0_DQ_60/DDR1_DQ_44 NC/DDR0_PAR F36 +0.6V_A_VREFCA DDR_B_D62 BK30 DDR1_DQ_61/DDR1_DQ_61 DDR_COMP_0 BN27 SM_RCOMP1 RC18 1 2 80.6_0402_1%
DDR_B_D46 DDR0_DQ_61/DDR1_DQ_45 DDR_VREF_CA +0.6V_A_VREFCA [18] DDR_B_D63 DDR1_DQ_62/DDR1_DQ_62 DDR_COMP_1 SM_RCOMP2
B BG36 D35 BK29 BN29 RC19 1 2 100_0402_1% B
DDR_B_D47 BG37 DDR0_DQ_62/DDR1_DQ_46 DDR0_VREF_DQ_0 D37 DDR1_DQ_63/DDR1_DQ_63 DDR_COMP_2
DDR0_DQ_63/DDR1_DQ_47 DDR0_VREF_DQ_1 +0.6V_B_VREFDQ
Trace width/Spacing >= 20mils #543016 PDG1.5 P.168
E36 +0.6V_B_VREFDQ [19] W=12-15 Space= 20/25 L=500mil
DDR1_VREF_DQ C35 DDR_PG_CTRL CFLU-43E_BGA1528
DDR_VTT_CNTL
@
3 of 20
CFLU-43E_BGA1528
@
2 of 20
R
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d
e
d
B
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I
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M
a
x
+1.2V
+1.2V +3VS
< For ODT & VTT Power Control >
1
DDR_VTT_CNTL to DDR Remove RC17 for SDP/DDP BOM selection by PDG
VTT supplied ramped RC20
1
<35uS 1 470_0402_5%
(tCPU18) CC1 @
0.1U_0201_10V6K RC21
2
@ 100K_0201_5%
UC11 2 DDR_DRAMRST#
2
1 5
NC VCC
DDR_PG_CTRL 1
2 CC2
A 4 100P_0402_50V8J
Y DDR_VTT_PG_CTRL [44]
3 ESD@
GND 2
74AUP1G07GW_TSSOP5 Close to CPU
SA00005U600
A A

WHL-U(2/12)DDR4
5 4 3 2 1
5 4 3 2 1
+3VALW
SML0ALERT# (Internal Pull Down):
RC23 1 2 100K_0201_5% SOC_SPI_0_SI
RC24 1 2 100K_0201_5% SOC_SPI_0_IO2 eSPI or LPC
RC25 1 2 100K_0201_5% SOC_SPI_0_IO3
0 = LPC is selected for EC ==> Default
1 = eSPI is selected for EC

D D
UC1E
SOC_SPI_0_CLK CH37 CK14 SOC_SMBCLK
SOC_SPI_0_SO CF37 SPI0_CLK GPP_C0/SMBCLK CH15 SOC_SMBDATA SOC_SMBCLK [19] SMB
SOC_SPI_0_SI SPI0_MISO GPP_C1/SMBDATA SOC_SMBALERT# SOC_SMBDATA [19]
CF36 CJ15 (Link to DDR)
SPI ROM SOC_SPI_0_IO2 CF34 SPI0_MOSI GPP_C2/SMBALERT# TP@ T8
SOC_SPI_0_IO3 CG34 SPI0_IO2 CH14 SOC_SML0CLK
SOC_SPI_0_CS#0 CG36 SPI0_IO3 GPP_C3/SML0CLK CF15 SOC_SML0DATA
CG35 SPI0_CS0# GPP_C4/SML0DATA CG15 SOC_SML0ALERT#
SPI0_CS1# GPP_C5/SML0ALERT# TP@ T9
CH34
SPI0_CS2# CN15
GPP_C6/SML1CLK CM15
EC_SMB_CK2 [24,33,35] SML1
GPP_C7/SML1DATA EC_SMB_DA2 [24,33,35]
CF20 CC34 SOC_SML1ALERT# (Link to EC,DGPU,Thermal Sensor)
CG22 GPP_D1/SPI1_CLK/BK1/SBK1 GPP_B23/SML1ALERT#/PCHHOT#
CF22 GPP_D2/SPI1_MISO_IO1/BK2/SBK2
CG23 GPP_D3/SPI1_MOSI_IO0/BK3/SBK3 CA29 LPC_AD0
GPP_D21/SPI1_IO2 GPP_A1/LAD0/ESPI_IO0 LPC_AD1 LPC_AD0 [33]
CH23 BY29
GPP_D22/SPI1_IO3 GPP_A2/LAD1/ESPI_IO1 LPC_AD2 LPC_AD1 [33]
CG20 BY27
+3VS GPP_D0/SPI1_CS0#/BK0/SBK0 GPP_A3/LAD2/ESPI_IO2 LPC_AD3 LPC_AD2 [33]
BV27
GPP_A4/LAD3/ESPI_IO3 LPC_FRAME# LPC_AD3 [33]
CA28
GPP_A5/LFRAME#/ESPI_CS# LPC_FRAME# [33]
CA27
RC26 1 2 10K_0201_5% KB_RST# CH7 GPP_A14/SUS_STAT#/ESPI_RESET#
CH8 CL_CLK
CH9 CL_DATA BV32 LPC_CLK0 RC27 1 EMI@ 2 22_0402_5%
CL_RST# GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_LPC_EC [33]
BV30
KB_RST# BV29 GPP_A10/CLKOUT_LPC1 BY30 PM_CLKRUN#
GPP_A0/RCIN#/TIME_SYNC1 GPP_A8/CLKRUN# PM_CLKRUN# [33]
+3VS SERIRQ BV28
[33] SERIRQ GPP_A6/SERIRQ
C C
RC28 1 2 8.2K_0402_5% SERIRQ CFLU-43E_BGA1528
@
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+3VS
RPC1, RPC3 and RC30 are close to UC3
SOC_SPI_0_SO RC29 1 2 33_0402_5% SOC_SPI_0_SO_R EC_SMB_CK2 RC30 1 2 1K_0201_5%

SOC_SPI_0_CLK RC31 1 EMI@ 2 33_0402_5% SOC_SPI_0_CLK_R
SOC_SPI_0_SI RC32 1 2 33_0402_5% SOC_SPI_0_SI_R EC_SMB_DA2 RC33 1 2 1K_0201_5%
SOC_SPI_0_IO3 RC34 1 2 33_0402_5% SOC_SPI_0_IO3_R
From SOC SOC_SML1ALERT# 1 @ 2
RC35 150K_0402_5%
SOC_SPI_0_IO2 RC36 1 2 33_0402_5% SOC_SPI_0_IO2_R
SOC_SMBCLK RC37 1 2 1K_0201_5%
SOC_SMBDATA RC38 1 2 1K_0201_5%
SOC_SML0CLK RC39 1 2 1K_0201_5%
SOC_SML0DATA RC40 1 2 1K_0201_5%
B EC_SPI_CLK RC41 1 EMI@ 2 33_0402_5% SOC_SPI_0_CLK_R B

[33] EC_SPI_CLK EC_SPI_MOSI SOC_SPI_0_SI_R
RC42 1 2 33_0402_5% +3VS
[33] EC_SPI_MOSI EC_SPI_CS0# SOC_SPI_0_CS#0
From EC RC43 1 2 33_0402_5%
[33] EC_SPI_CS0# EC_SPI_MISO SOC_SPI_0_SO_R
RC44 1 2 33_0402_5%
[33] EC_SPI_MISO
PM_CLKRUN# 1 2
RC45 8.2K_0402_5%
< SPI ROM - 16M >

+3VALW
@
UC12 CC3 1 2 0.1U_0201_10V K X5R
SOC_SPI_0_CS#0 1 8
SOC_SPI_0_SO_R 2 CS# VCC 7 SOC_SPI_0_IO3_R
SOC_SPI_0_IO2_R 3 DO(IO1) IO 6 SOC_SPI_0_CLK_R
4 IO2 CLK 5 SOC_SPI_0_SI_R
GND DI(IO0)
W 25Q128JVSIQ SOIC8P
SA00005VV20
A A

WHL-U(3/12)SPI,SMB,LPC,ESPI
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
< HD AUDIO > RC163 1 2 33_0201_5% HDA_RST#

[32] HDA_RST#_R
D D
RC46 1 EMI@ 2 33_0201_5% HDA_BIT_CLK UC1G

[32] HDA_BIT_CLK_R HDA_SYNC BN34
RC48 1 2 33_0201_5% HDA_SYNC HDA_BIT_CLK BN37 HDA_SYNC/I2S0_SFRM CH36
[32] HDA_SYNC_R HDA_SDOUT HDA_BCLK/I2S0_SCLK GPP_G0/SD_CMD
BN36 CL35
RC47 1 2 33_0201_5% HDA_SDOUT BN35 HDA_SDO/I2S0_TXD GPP_G1/SD3_DATA0 CL36
[32] HDA_SDOUT_R [32] HDA_SDIN0 HDA_SDI0/I2S0_RXD GPP_G2/SD3_DATA1
BL36 CM35
HDA_SDI1/I2S1_RXD/SNDW1_DATA GPP_G3/SD3_DATA2
1
HDA_RST# BL35 CN35
RC49 CK23 HDA_RST#/I2S1_SCLK/SNDW1_CLK GPP_G4/SD_DATA3 CH35
@ GPP_D23/I2S_MCLK GPP_G5/SD_CD# CK36
499_0402_1% GPP_G6/SD_CLK
BL37 CK34
BL34 I2S1_SFRM/SNDW2_CLK GPP_G7/SD_WP
2
I2S1_TXD/SNDW2_DATA
CNV_RF_RESET# CJ32
[30] CNV_RF_RESET# GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET#
CH32
CLKREQ_CNV# CH29 GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK
[30] CLKREQ_CNV# GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ
CH30 BW36
GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7 BY31
< To Enable ME Override > CP24 GPP_A16/SD_1P8_SEL
CN24 GPP_D19/DMIC_CLK0/SNDW4_CLK
GPP_D20/DMIC_DATA0/SNDW4_DATA CK33
CK25 SD_1P8_RCOMP CM34 SOC_SD_RCOMP RC50 1 2 200_0402_1%
CJ25 GPP_D17/DMIC_CLK1/SNDW3_CLK SD_3P3_RCOMP
GPP_D18/DMIC_DATA1/SNDW3_DATA
RC51 1 @ 2 0_0402_5% HDA_SDOUT HDA_SPKR CF35
[33] ME_EN [32] HDA_SPKR GPP_B14/SPKR
CFLU-43E_BGA1528
C C
@
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GPP_H21 XTAL frequency select.

0: 38.4 / 19.2 MHz
75K_0402_5% 1 CNVi@ 2 RC52 CNV_RF_RESET# 1: 24MHz XTAL select.
UC1I
+3VALW
CNV_CRX_DTX_N0 CR30 CN27 SOC_C10_GATE#
[30] CNV_CRX_DTX_N0 CNV_CRX_DTX_P0 CNV_WR_D0N GPP_H18/CPU_C10_GATE# TP@ T10
[30] CNV_CRX_DTX_P0 CP30
CNV_WR_D0P CM27
CNV_CRX_DTX_N1 CM30 GPP_H19/TIMESYNC_0
Follow Jefferson Peak schematic check list. [30] CNV_CRX_DTX_N1 CNV_CRX_DTX_P1 CNV_WR_D1N SOC_GPP_H21
[30] CNV_CRX_DTX_P1 CN30 CF25 RC53 1 2 4.7K_0201_5%
CNV_CTX_DRX_N0 CN32 CNV_WR_D1P GPP_H21 CN26
[30] CNV_CTX_DRX_N0 CNV_CTX_DRX_P0 CNV_WT_D0N GPP_H22
CM32 CM26
[30] CNV_CTX_DRX_P0 CNV_WT_D0P GPP_H23 CK17
CNV_CTX_DRX_N1 CP33 GPP_F10
[30] CNV_CTX_DRX_N1 CNV_CTX_DRX_P1 CNV_WT_D1N SOC_GPD7
CN33 BV35 RC54 1 2 100K_0201_5%
+3VS [30] CNV_CTX_DRX_P1 CNV_WT_D1P GPD7 CN20
CLK_CNV_CRX_DTX_N CN31 GPP_F3
B [30] CLK_CNV_CRX_DTX_N CLK_CNV_CRX_DTX_P CNV_WR_CLKN B
CP31 CG25 XTAL INPUT MODE (HVM ONLY)
HDA_SPKR [30] CLK_CNV_CRX_DTX_P CLK_CNV_CTX_DRX_N CNV_WR_CLKP GPP_D4/IMGCLKOUT0/BK4/SBK4
RC55 1 @ 2 2.2K_0402_5% CP34 CH25
[30] CLK_CNV_CTX_DRX_N CLK_CNV_CTX_DRX_P CN34 CNV_WT_CLKN GPP_H20/IMGCLKOUT_1 LOW: XTAL INPUT IS SINGLE ENDED
[30] CLK_CNV_CTX_DRX_P CNV_WT_CLKP
GPP_F12/EMMC_DATA0
CR20 HIGH: XTAL IS ATTACHED
1 CNVi@ 2 CNV_W T_RCOMP CP32 CM20
SPKR (Internal Pull Down): RC56 150_0402_1% CR32 CNV_WT_RCOMP_0 GPP_F13/EMMC_DATA1 CN19
CP20 CNV_WT_RCOMP_1 GPP_F14/EMMC_DATA2 CM19
GPP_F0/CNV_PA_BLANKING GPP_F15/EMMC_DATA3
TOP Swap Override GPP_F16/EMMC_DATA4
CN18
For MX150 GC6_FB_EN1V8 CK19 CR18
[11] GC6_FB_EN1V8 GPP_F1 GPP_F17/EMMC_DATA5
CG17 CP18
0 = Disable TOP Swap mode. ==> Default GPP_F2 GPP_F18/EMMC_DATA6 CM18
CR14 GPP_F19/EMMC_DATA7
[34] TP_INT# GPP_C8/UART0_RXD
1 = Enable TOP Swap Mode. CP14
SOC_GPIO_C10 CN14 GPP_C9/UART0_TXD CM16
CM14 GPP_C10/UART0_RTS# GPP_F20/EMMC_RCLK CP16
[30] W LBT_OFF# GPP_C11/UART0_CTS# GPP_F21/EMMC_CLK CR16
+3VALW +3VS CJ17 GPP_F11/EMMC_CMD CN16
CH17 GPP_F8/CNV_MFUART2_RXD GPP_F22/EMMC_RESET#
GPP_F9/CNV_MFUART2_TXD CK15 SOC_SD_RCOMP
RC57 1 2 SOC_A4W P_PRESENT CF17 EMMC_RCOMP
GPP_F23/A4WP_PRESENT
RC58 1 @ 2 10K_0201_5% W LBT_OFF# 10K_0201_5%
CFLU-43E_BGA1528
@
RC164 1 @ 2 10K_0201_5% 9 of 20
SOC_GPIO_C10 RC59 1 @ 2 0_0402_5% GPU_EVENT#

A TO DGPU GPU_EVENT# [24] A

WHL-U(4/12)HDA,EMMC,SDIO,CSI2
5 4 3 2 1
5 4 3 2 1
+3VS
UC1J XCLK_BIASREF RC60 1 2 60.4_0402_1%
AW2 AU1 CLKIN_XTAL RC65 1 2 10K_0201_5%

CLKREQ_PEG#0 [21] CLK_PEG_N0 CLKOUT_PCIE_N_0 CLKOUT_ITPXDP_N
RC66 1 2 10K_0201_5% DGPU AY3 AU2
1 2 CLKREQ_PCIE#1 [21] CLK_PEG_P0 CLKREQ_PEG#0 CF32 CLKOUT_PCIE_P_0 CLKOUT_ITPXDP_P
RC61 10K_0201_5% [21] CLKREQ_PEG#0
RC62 1 2 10K_0201_5% CLKREQ_PCIE#2 GPP_B5/SRCCLKREQ0# BT32 SUSCLK
1 2 CLKREQ_PCIE#3 BC1 GPD8/SUSCLK SUSCLK [30]
RC63 10K_0201_5%
CLKREQ_PCIE#4 [31] CLK_PCIE_N1 CLKOUT_PCIE_N_1 33E_SOC_XTAL24_IN_R
D
RC64 1 2 10K_0201_5% SSD1 BC2 CK3 D
[31] CLK_PCIE_P1 CLKREQ_PCIE#1 CLKOUT_PCIE_P_1 XTAL_IN 33E_SOC_XTAL24_OUT_R
[31] CLKREQ_PCIE#1 CE32 CK2
GPP_B6/SRCCLKREQ1# XTAL_OUT
BD3 CJ1 XCLK_BIASREF
1 2 10K_0201_5% CLKREQ_PEG#0 [31] CLK_PCIE_N2 BC3 CLKOUT_PCIE_N_2 CLK_BIASREF CM3 CLKIN_XTAL
RC67 @ SSD2
CLKREQ_PCIE#4 [31] CLK_PCIE_P2 CLKREQ_PCIE#2 CLKOUT_PCIE_P_2 CLKIN_XTAL CLKIN_XTAL [30]
RC68 1 @ 2 10K_0201_5% [31] CLKREQ_PCIE#2 CF30
GPP_B7/SRCCLKREQ2# BN31 SOC_RTCX1
RTCX1 SOC_RTCX2 Follow CFL-U PDG_Rev_0.7
BH3 BN32
[30] CLK_PCIE_N3
BH4 CLKOUT_PCIE_N_3 RTCX2 Stuff 60.4 ohm(RC110) PD for CNL-U/ WHL-U and CFL-U
WLAN [30] CLK_PCIE_P3 CLKREQ_PCIE#3 CLKOUT_PCIE_P_3 SOC_SRTCRST#
CE31 BR37
[30] CLKREQ_PCIE#3 GPP_B8/SRCCLKREQ3# SRTCRST# EC_CLEAR_CMOS#
BR34
BA1 RTCRST# 33E_SOC_XTAL24_IN_R 1 2 33E_SOC_XTAL24_IN
+3VL_RTC [36] CLK_PCIE_N4 CLKOUT_PCIE_N_4
Card Reader BA2 RC69 EMI@ 33_0201_5%
[36] CLK_PCIE_P4 CLKREQ_PCIE#4 CLKOUT_PCIE_P_4
CE30
[36] CLKREQ_PCIE#4 GPP_B9/SRCCLKREQ4#
BE1 LC1 @EMI@
RC70 1 2 20K_0402_5% SOC_SRTCRST# BE2 CLKOUT_PCIE_N_5 1 2
CF31 CLKOUT_PCIE_P_5 1 2
CC5 1 2 1U_0201_6.3V6M GPP_B10/SRCCLKREQ5#
SE00000UC00 CFLU-43E_BGA1528 4 3
4 3
@
10 of 20 DLM0NSN900HY2D_4P
RC71 1 2 20K_0402_5% 33E_SOC_XTAL24_OUT_R 1 2 33E_SOC_XTAL24_OUT

EC_CLEAR_CMOS# [33]
RC73 EMI@ 33_0201_5%
CC6 1 2 1U_0201_6.3V6M
SE00000UC00 1 2
CLRP1 1 2 SHORT PADS CLR CMOS RC74 200K_0402_1%
RC75 1 2 1M_0402_5% SM_INTRUDER# < PCH PLTRST Buffer > YC1

24MHZ_18PF_XRCGB24M000F2P51R0
SJ10000UJ00
3 1
3 1
C NC NC C
27P_0402_50V8J
CC7
27P_0402_50V8J
CC8
1 4 2 1
+3VALW
SOC_PLTRST# RC76 1 2 0_0402_5% 2 2
PCI_RST# [21,30,31,33,36]
RC77 1 2 10K_0201_5% SYS_RESET#
RC78 1 2 10K_0201_5% PCH_PWROK
RC79 1 2 10K_0201_5% EC_RSMRST#
1
SOC_RTCX2
1
RC80 CC9 ESD@
100K_0201_5% 100P_0402_50V8J
2
SOC_RTCX1
2
RC81 1 2 10M_0402_5%
YC2
ESD@ 1 2 SYS_RESET# 1 2
CC10 100P_0402_50V8J
ESD@ 1 2 EC_RSMRST# 32.768KHZ_9PF_X1A000141000200
CC11 100P_0402_50V8J SJ10000PW00
ESD@ 1 2 SYS_PWROK
1 1
CC12 100P_0402_50V8J Common part
CC13 CC14
6.8P_0402_50V8C 6.8P_0402_50V8C
UC1K 2 2
BJ37 PM_SLP_S0#
SOC_PLTRST# GPP_B12/SLP_S0# PM_SLP_S3# TP@T12
BJ35 BU36
SYS_RESET# GPP_B13/PLTRST# GPD4/SLP_S3# PM_SLP_S4# PM_SLP_S3# [33]
B CN10 BU27 B
EC_RSMRST# SYS_RESET# GPD5/SLP_S4# PM_SLP_S5# PM_SLP_S4# [33,42,45]
[33] EC_RSMRST# BR36 BT29 TP@T13
RSMRST# GPD10/SLP_S5#
+3VALW T11 TP@ H_CPUPWRGD AR2 BU29
EC_VCCST_PG BJ2 PROCPWRGD SLP_SUS# BT31
RC82 1 2 1K_0201_5% WAKE# VCCST_PWRGOOD SLP_LAN# BT30 SLP_WLAN#
SYS_PWROK GPD9/SLP_WLAN# PM_SLP_A# TP@T14
[33] SYS_PWROK CR10 BU37 TP@T15
PCH_PWROK BP31 SYS_PWROK GPD6/SLP_A# +3VALW
[33] PCH_PWROK EC_RSMRST# PCH_PWROK PBTN_OUT#
BP30 BU28
DSW_PWROK GPD3/PWRBTN# PBTN_OUT# [33]
BU35 AC_PRESENT [24,33]
BV34 GPD1/ACPRESENT BV36 PM_BATLOW# PM_BATLOW# 1 2
BY32 GPP_A13/SUSWARN#/SUSPWRDACK GPD0/BATLOW# RC84 8.2K_0402_5%
GPP_A15/SUSACK# AC_PRESENT 1 @ 2
WAKE# BU30 BR35 SM_INTRUDER# RC85 10K_0201_5%
BU32 WAKE# INTRUDER# SOC_VRALERT# 1 @ 2
BU34 GPD2/LAN_WAKE# CC37 RC86 10K_0201_5%
GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# CC36 SOC_VRALERT# SOC_INPUT3VSEL 1 @ 2
GPP_B2/VRALERT# RC87 4.7K_0402_5%
BT27 SOC_INPUT3VSEL 1 2
From EC (Open-Drain) +1.05V_VCCST INPUT3VSEL RC88 4.7K_0402_5%
1
CFLU-43E_BGA1528
RC89 @
11 of 20
1K_0201_5%
2
RC90 1 2 60.4_0402_1% EC_VCCST_PG

[33] VCCST_PWRGD
1
CC15
100P_0402_50V8J
ESD@
2
A A

WHL-U(5/12)CLK,PM,GPIO
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
GSPI0_MOSI (Internal Pull Down):
G O
P B
P R
B M
1
9 I
G O
P B
P R
B M
2
0 I
G O
P B
P R
B M
2
1 I
_ _ _
C
a
p
a
c
i
t
y
D
e
s
c
r
i
p
t
i
o
n
X
7
6
P
A
R
T
N
U
M
B
E
R
R
1
( )
A 0
D
0
A 0
D
1
A 0
D
2
No Reboot
_ _ _
N 6
A 0
/
N 0
A 0
/
W
I
T
H
O
U
T
O
N
-
B
O
A
R
D
R
A
M
0 = Disable No Reboot mode. ==> Default
S
A
M
S
U
N
G
2
6
6
6
M
H
z
K
4
A
8
G
1
6
5
W
C
-
B
C
T
D
E
L
4
5
1
X X X
7 7 7
8 8 8
6 5 6
3 3 3
8 8 8
L L L
0 0 0
5 6 4
S S S
A A A
0 0 0
0 0 0
B B B
6 6 M
F F N
0 0 0
0 0 0
( )
1
S
A
M
S
U
N
G
2
6
6
6
M
H
z
K
4
A
8
G
1
6
5
W
C
-
B
C
T
D
E
L
4
C
1
6 6
0 0
0 0
0 0
1 = Enable No Reboot Mode. (PCH will disable the TCO
Timer system reboot feature). This funct i oni s us ef ul ( )
H
Y
N
I
X
2
6
6
6
M
H
z
H
5
A
N
8
G
6
N
C
J
R
-
V
K
C
E
L L :
4 4
5 C
1 1 E
( )
4
G
B
0
when running ITP/XDP.
H
Y
N
I
X
2
6
6
6
M
H
z
H
5
A
N
8
G
6
N
C
J
R
-
V
K
C
E
X
7
6
8
0
5
3
8
L
0
4
S
A
0
0
0
0
B
M
N
0
0
( )
M
I
C
R
O
N
2
6
6
6
M
H
z
M
T
4
0
A
5
1
2
M
1
6
L
Y
-
0
7
5
E
L
4
5
1
X
7
6
8
0
6
3
8
L
0
6
S
A
0
0
0
0
A
R
D
2
0
D D
( )
1
M
I
C
R
O
N
2 N
6 /
6 A
6
M
H
z
M
T
4
0
A
5
1
2
M
1
6
L
Y
-
0
7
5
:
E
E
L
4
C
1
X
7
6 N
8
0 /
5 A
3
8
L
0
5
S
A
0
0 N
0
0 /
A A
R
D
2
0
GSPI1_MOSI (Internal Pull Down): ( )
+3VS
Boot BIOS Strap Bit
RTOUCH5
1 2 TS_INT#
0 = SPI Mode ==> Default RC94 NO_MD@
10K_0201_5%
RC95 NO_MD@
10K_0201_5%
RC96 NO_MD@
10K_0201_5%
+3VS +3VS +3VS
4.7K_0402_5%
1 = LPC Mode
F
u
n
c
t
i
o
n
M
OG
DP
EP
L
SD
E1
T
T
I
N
G
1
M
OG
DP
EP
L
SD
E1
T
T
I
N
G
0
RC91 RC92 RC93
_ _
2 0 0 1
1
+3VS 10K_0201_5% 10K_0201_5% 10K_0201_5%
( _ ) ( _ )
C
3
4
0
0 1 0
X76RAM@ X76RAM@ X76RAM@
S
3
4
0
RC97 1 @ 2 4.7K_0402_5% GSPI0_MOSI OBRAM_ID0 OBRAM_ID1 OBRAM_ID2
S
5
4
0
RC94 RC95 RC96
RC98 1 @ 2 150K_0402_5% GSPI1_MOSI
10K_0201_5% 10K_0201_5% 10K_0201_5%
X76RAM@ X76RAM@ X76RAM@
+3VS
2
+3VS RC99 1 S540@ 2 10K_0201_5% MODEL_SETTING1
RC100 1 C340@ 2 10K_0201_5%
RC101 1 2 10K_0201_5% DGPU_PWR_EN
RC102 1 2 10K_0201_5% SOC_GPIO_A7

+3VS
RC167 1 2 2.2K_0402_5% I2C_1_SDA
RC168 1 2 2.2K_0402_5% I2C_1_SCL RC107 1 S340@ 2 10K_0201_5% MODEL_SETTING0
C 1 C340@ 2 10K_0201_5% C
RC104
RC103 1 2 49.9K_0402_1% UART0_RX

RC108 1 2 49.9K_0402_1% UART0_TX RC100 S340@ RC104 S540@
RC109 1 2 2.2K_0402_5% I2C_0_SDA 10K_0201_5% 10K_0201_5%
RC105 1 2 2.2K_0402_5% I2C_0_SCL
RC106 1 @ 2 10K_0201_5% DGPU_HOLD_RST#
RC112 1 DIS@ 2 10K_0201_5%
UC1F
D
GG
PP
UP 0 1
PC
R1
S5
N
T
CC27
GPP_B15/GSPI0_CS0#
F D U
u I
n S M
c
t
i
o
n
SOC_GPIO_A7
SOC_GPIO_B16
CC32
GPP_A7/PIRQA#/GSPI0_CS1# GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
CN22 _
+1.8VALW SENSOR_EC_INT
CE28
CE27 GPP_B16/GSPI0_CLK GPP_D10/ISH_SPI_CLK/GSPI2_CLK
CR22
CM22 MODEL_SETTING0 ( _ )
[33] SENSOR_EC_INT GSPI0_MOSI GPP_B17/GSPI0_MISO GPP_D11/ISH_SPI_MISO/GSPI2_MISO MODEL_SETTING1
CE29 CP22
GPP_B18/GSPI0_MOSI GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI
A
O
n
l
y
OBRAM_ID0 CA31 CK22
RC113 1 @ 2 20K_0201_5% CNV_RGI_CRX_DTX CA32 GPP_B19/GSPI1_CS0# GPP_D5/ISH_I2C0_SDA CH20
RC114 1 @ 2 20K_0201_5% CNV_BRI_CRX_DTX OBRAM_ID1 CC29 GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN# GPP_D6/ISH_I2C0_SCL
OBRAM_ID2 CC30 GPP_B20/GSPI1_CLK CH22
GSPI1_MOSI CA30 GPP_B21/GSPI1_MISO GPP_D7/ISH_I2C1_SDA CJ22 +3VS
GPP_B22/GSPI1_MOSI GPP_D8/ISH_I2C1_SCL
CNV_BRI_CRX_DTX CK20 RC115 1 UMA@ 2 10K_0201_5% DGPU_PRSNT
[30] CNV_BRI_CRX_DTX CNV_RGI_CTX_DRX GPP_F5/CNV_BRI_RSP
CG19 CJ27
I2C_0_SDA [30] CNV_RGI_CTX_DRX CNV_BRI_CTX_DRX GPP_F6/CNV_RGI_DT GPP_H10/I2C5_SDA/ISH_I2C2_SDA
CC182 1 2 100P_0402_50V8J CJ20 CJ29 RC116 1 DIS@ 2 10K_0201_5%
[30] CNV_BRI_CTX_DRX CNV_RGI_CRX_DTX GPP_F4/CNV_BRI_DT GPP_H11/I2C5_SCL/ISH_I2C2_SCL
CH19
CC185 1 2 100P_0402_50V8J I2C_0_SCL [30] CNV_RGI_CRX_DTX GPP_F7/CNV_RGI_RSP CM24
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA CN23
CR12 GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL CM23
[30] UART0_RX GPP_C20/UART2_RXD GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#
CP12 CR24
1 2 100P_0402_50V8J I2C_1_SDA [30] UART0_TX GPP_C21/UART2_TXD GPP_D16/ISH_UART0_CTS#/SML0BALERT#
CC183 CN12
CM12 GPP_C22/UART2_RTS# CG12 DGPU_PWR_EN
I2C_1_SCL GPP_C23/UART2_CTS# GPP_C12/UART1_RXD/ISH_UART1_RXD DGPU_HOLD_RST# DGPU_PWR_EN [26,33]
CC186 1 2 100P_0402_50V8J CH12
GPP_C13/UART1_TXD/ISH_UART1_TXD GPU_ALL_PGOOD DGPU_HOLD_RST# [21]
CM11 CF12
[34] I2C_0_SDA GPP_C16/I2C0_SDA GPP_C14/UART1_RTS#/ISH_UART1_RTS# DGPU_PRSNT GPU_ALL_PGOOD [26]
Touch PAD CN11 CG14
[34] I2C_0_SCL GPP_C17/I2C0_SCL GPP_C15/UART1_CTS#/ISH_UART1_CTS#
F
u
n
c
t
i
o
n
M
OG
DP
EP
L
S2
E0 1 0
T
T
I
N
G
2
B B
1 2 100P_0402_50V8J I2C_2_SDA CK12 BW35 TS_INT#
_
A
CC184 TS_INT# [28]
[28] I2C_1_SDA GPP_C18/I2C1_SDA GPP_A18/ISH_GP0 DGPU_SEL0
I2C_2_SCL Touch Screen [28] I2C_1_SCL
CJ12
GPP_C19/I2C1_SCL GPP_A19/ISH_GP1
BW34 ( _ )
A
r
r
a
r
y
M
I
C
CC187 1 2 100P_0402_50V8J CA37 DGPU_SEL1
CF27 GPP_A20/ISH_GP2 CA36
[33] I2C_2_SDA GPP_H4/I2C2_SDA GPP_A21/ISH_GP3
S
i
n
g
l
e
M
I
C
EC sensor Hub CF29 CA35
[33] I2C_2_SCL GPP_H5/I2C2_SCL GPP_A22/ISH_GP4 CA34
CH27 GPP_A23/ISH_GP5 BW37
CH28 GPP_H6/I2C3_SDA GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF#
GPP_H7/I2C3_SCL
CJ30 +3VS @
CJ31 GPP_H8/I2C4_SDA
PCH EDS : M.2 CNV Mode Select GPP_H9/I2C4_SCL RC119 1 2 10K_0201_5% DGPU_SEL1
CFLU-43E_BGA1528
GPP_F6/CNV_RGI_DT @
RC120 1 2 10K_0201_5%
6 of 20
0 = Integrated CNVi enable. @
1 = Integrated CNVi disable.

+1.8VALW +3VS
RC160 1 @ 2 10K_0201_5% DGPU_SEL0
RC162 2 1 20K_0201_5% CNV_RGI_CTX_DRX

NONCNVi@ RC159 1 @ 2 10K_0201_5%
CNVi RGI_DT pin gets the pull-down resistor (1K ohm) from the internal CRF module when CNVi is enabled.
There must not be any pull-down resistor connected on the board.
A A
SOC_GPIO_B16 RC121 1 2 0_0201_5% GC6_FB_EN

N16S@
GC6_FB_EN [24,25] TO DGPU
GC6_FB_EN1V8 RC122 1 2 0_0201_5%
[9] GC6_FB_EN1V8
N17S@
WHL-U(6/12)GPIO,I2C,GSPI
5 4 3 2 1
5 4 3 2 1
D UC1H D
CB5 USB3_CRX_DTX_N1 [36]
BW9 PCIE1_RXN/USB31_1_RXN CB6
[21] PCIE_CRX_DTX_N5 PCIE5_RXN/USB31_5_RXN PCIE1_RXP/USB31_1_RXP USB3_CRX_DTX_P1 [36]
BW8 CA4 USB2.0 / 3.0 Port (IO - 1)
[21] PCIE_CRX_DTX_P5 PCIE5_RXP/USB31_5_RXP PCIE1_TXN/USB31_1_TXN USB3_CTX_DRX_N1 [36]
CC17 DIS@ 1 2 0.22U_0201_6.3V6M PCIE_CTX_DRX_N5 BW4 CA3
[21] PCIE_CTX_C_DRX_N5 PCIE5_TXN/USB31_5_TXN PCIE1_TXP/USB31_1_TXP USB3_CTX_DRX_P1 [36]
CC18 DIS@ 1 2 0.22U_0201_6.3V6M PCIE_CTX_DRX_P5 BW3
[21] PCIE_CTX_C_DRX_P5 PCIE5_TXP/USB31_5_TXP BY8
PCIE2_RXN/USB31_2_RXN/SSIC_1_RXN USB3_CRX_DTX_N2 [36]
BU6 BY9 USB3_CRX_DTX_P2 [36]
[21] PCIE_CRX_DTX_N6 BU5 PCIE6_RXN/USB31_6_RXN PCIE2_RXP/USB31_2_RXP/SSIC_1_RXP CA2
[21] PCIE_CRX_DTX_P6 PCIE6_RXP/USB31_6_RXP PCIE2_TXN/USB31_2_TXN/SSIC_1_TXN USB3_CTX_DRX_N2 [36] USB2.0 / 3.0 Port (IO - 2)
CC19 DIS@ 1 2 0.22U_0201_6.3V6M PCIE_CTX_DRX_N6 BU4 CA1
[21] PCIE_CTX_C_DRX_N6 PCIE6_TXN/USB31_6_TXN PCIE2_TXP/USB31_2_TXP/SSIC_1_TXP USB3_CTX_DRX_P2 [36]
CC20 DIS@ 1 2 0.22U_0201_6.3V6M PCIE_CTX_DRX_P6 BU3
[21] PCIE_CTX_C_DRX_P6 PCIE6_TXP/USB31_6_TXP BY7
dGPU PCIE3_RXN/USB31_3_RXN USB3_CRX_DTX_N3 [37]
BT7 BY6 USB3_CRX_DTX_P3 [37]
[21] PCIE_CRX_DTX_N7 BT6 PCIE7_RXN PCIE3_RXP/USB31_3_RXP BY4
[21] PCIE_CRX_DTX_P7 PCIE7_RXP PCIE3_TXN/USB31_3_TXN USB3_CTX_DRX_N3 [37] USB2.0 / 3.0 Port (Type-C)
CC16 DIS@ 1 2 0.22U_0201_6.3V6M PCIE_CTX_DRX_N7 BU2 BY3
[21] PCIE_CTX_C_DRX_N7 PCIE7_TXN PCIE3_TXP/USB31_3_TXP USB3_CTX_DRX_P3 [37]
CC21 DIS@ 1 2 0.22U_0201_6.3V6M PCIE_CTX_DRX_P7 BU1
[21] PCIE_CTX_C_DRX_P7 PCIE7_TXP BW6
BU9 PCIE4_RXN/USB31_4_RXN BW5
[21] PCIE_CRX_DTX_N8 BU8 PCIE8_RXN PCIE4_RXP/USB31_4_RXP BW2
[21] PCIE_CRX_DTX_P8 CC22 DIS@ 1 2 0.22U_0201_6.3V6M PCIE_CTX_DRX_N8 BT4 PCIE8_RXP PCIE4_TXN/USB31_4_TXN BW1
[21] PCIE_CTX_C_DRX_N8 PCIE8_TXN PCIE4_TXP/USB31_4_TXP
CC23 DIS@ 1 2 0.22U_0201_6.3V6M PCIE_CTX_DRX_P8 BT3
[21] PCIE_CTX_C_DRX_P8 PCIE8_TXP CE3 USB20_N1
USB2_1N USB20_P1 USB20_N1 [36]
[31] PCIE_CRX_DTX_N9 BP5 CE4 USB2.0 / 3.0 Port (MB - 1)
PCIE9_RXN USB2_1P USB20_P1 [36]
[31] PCIE_CRX_DTX_P9 BP6
BR2 PCIE9_RXP CE1 USB20_N2
[31] PCIE_CTX_DRX_N9 PCIE9_TXN USB2_2N USB20_P2 USB20_N2 [36]
BR1 CE2 USB2.0 / 3.0 Port (MB - 2)
[31] PCIE_CTX_DRX_P9 PCIE9_TXP USB2_2P USB20_P2 [36]
BN6 CG3 USB20_N3
[31] PCIE_CRX_DTX_N10 PCIE10_RXN USB2_3N USB20_P3 USB20_N3 [38]
[31] PCIE_CRX_DTX_P10 BN5 CG4 USB2.0 / 3.0 Port (Type-C)
PCIE10_RXP USB2_3P USB20_P3 [38]
C BR4 C
[31] PCIE_CTX_DRX_N10 PCIE10_TXN USB20_N4
BR3 CD3
[31] PCIE_CTX_DRX_P10 PCIE10_TXP USB2_4N USB20_P4 USB20_N4 [28]
SSD1 CD4 Touch Screen
USB2_4P USB20_P4 [28]
[31] PCIE_CRX_DTX_N11 BN10
BN8 PCIE11_RXN/SATA0_RXN CG5
[31] PCIE_CRX_DTX_P11 PCIE11_RXP/SATA0_RXP USB2_5N
BN4 CG6
[31] PCIE_CTX_DRX_N11 PCIE11_TXN/SATA0_TXN USB2_5P
BN3
[31] PCIE_CTX_DRX_P11 PCIE11_TXP/SATA0_TXP
CC1 USB20_N6
[31] SATA_CRX_DTX_N1 BL6 USB2_6N USB20_P6 USB20_N6 [28] Camera
PCIE12_RXN/SATA1A_RXN CC2
[31] SATA_CRX_DTX_P1 BL5 USB2_6P USB20_P6 [28]
BN2 PCIE12_RXP/SATA1A_RXP CG8 USB20_N7
[31] SATA_CTX_DRX_N1 PCIE12_TXN/SATA1A_TXN USB2_7N USB20_P7 USB20_N7 [34]
BN1 CG9 Finger Print
[31] SATA_CTX_DRX_P1 PCIE12_TXP/SATA1A_TXP USB2_7P USB20_P7 [34]
[36] PCIE_CRX_DTX_N13 BK6 CB8

BK5 PCIE13_RXN USB2_8N CB9
[36] PCIE_CRX_DTX_P13 PCIE13_RXP USB2_8P
Card Reader BM4
[36] PCIE_CTX_DRX_N13 PCIE13_TXN
BM3 CH5
[36] PCIE_CTX_DRX_P13 PCIE13_TXP USB2_9N CH6
BJ6 USB2_9P
[30] PCIE_CRX_DTX_N14 PCIE14_RXN USB20_N10
[30] PCIE_CRX_DTX_P14 BJ5 CC3
PCIE14_RXP USB2_10N USB20_P10 USB20_N10 [30]
NGFF WLAN+BT BL2 CC4 NGFF WLAN+BT
[30] PCIE_CTX_DRX_N14 PCIE14_TXN USB2_10P USB20_P10 [30]
BL1
[30] PCIE_CTX_DRX_P14 PCIE14_TXP USB2_COMP
CC5 RC123 1 2 113_0402_1%
BG5 USB2_COMP CE8 USB2_ID RC124 1 @ 2 1K_0201_5%
[31] PCIE_CRX_DTX_N15 PCIE15_RXN/SATA1B_RXN USB2_ID USB2_SENSE
[31] PCIE_CRX_DTX_P15 BG6 CC6 RC125 1 @ 2 1K_0201_5% Trace length max: 450mils
BL4 PCIE15_RXP/SATA1B_RXP USB2_VBUSSENSE
[31] PCIE_CTX_DRX_N15 PCIE15_TXN/SATA1B_TXN USB_OC0#
BL3 CK6 USB_OC0# [36]
[31] PCIE_CTX_DRX_P15 PCIE15_TXP/SATA1B_TXP GPP_E9/USB2_OC0#/GP_BSSB_CLK USB_OC1#
SSD2 CK5 USB_OC1# [36]
BE5 GPP_E10/USB2_OC1#/GP_BSSB_DI CK8 USB_OC2#
B [31] SATA_CRX_DTX_N2 PCIE16_RXN/SATA2_RXN GPP_E11/USB2_OC2# USB_OC3# B
[31] SATA_CRX_DTX_P2 BE6 CK9
BJ4 PCIE16_RXP/SATA2_RXP GPP_E12/USB2_OC3#
[31] SATA_CTX_DRX_N2 PCIE16_TXN/SATA2_TXN WL_OFF#
BJ3 CP8
[31] SATA_CTX_DRX_P2 PCIE16_TXP/SATA2_TXP GPP_E4/DEVSLP0 WL_OFF# [30]
CR8 DEVSLP1
PCIE_RCOMPN GPP_E5/DEVSLP1 DEVSLP1 [31]
RC126 1 2 100_0402_1% CE6 CM8 DEVSLP2
PCIE_RCOMPP PCIE_RCOMP_N GPP_E6/DEVSLP2 DEVSLP2 [31]
CE5
PCIE_RCOMP_P CN8 +3VALW
CR28 GPP_E0/SATAXPCIE0/SATAGP0 CM10 NGFF_SSD_PEDET
GPP_H12/M2_SKT2/CFG_0 GPP_E1/SATAXPCIE1/SATAGP1 NGFF_SSD2_PEDET NGFF_SSD_PEDET [31]
CP28 CP10 NGFF_SSD2_PEDET [31]
CN28 GPP_H13/M2_SKT2/CFG_1 GPP_E2/SATAXPCIE2/SATAGP2 USB_OC0# RC127 2 1 10K_0201_5%
CM28 GPP_H14/M2_SKT2/CFG_2 CN7 USB_OC1# RC128 2 1 10K_0201_5%
GPP_H15/M2_SKT2/CFG_3 GPP_E8/SATALED#/SPI1_CS1# USB_OC2# RC129 2 1 10K_0201_5%
AR3 USB_OC3# RC130 2 1 10K_0201_5%
UFS_RESET#
CFLU-43E_BGA1528
@
8 of 20
+3VS +3VALW
When PCIE16/SATA2 is used as SATA Port 1 (ODD), then
PCIE15/SATA1B (M.2 SSD) cannot be used as SATA Port 1. NGFF_SSD_PEDET RC166 1 2 10K_0201_5%
NGFF_SSD2_PEDET RC131 1 2 10K_0201_5%

WL_OFF# RC132 1 @ 2 10K_0201_5%
RC165 1 @ 2 10K_0201_5%
A A

WHL-U(7/12)PCIE,USB,SATA
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
+1.2V
+VL +1.05VS_VCCIO
+1.05VALW TO +1.05V_VCCST UC1N
AK24 3.679A
+1.05V_VCCST AD36 VCCIO1 AK26
3.3A VDDQ1 VCCIO2
I(Max) : 0.16 A(+1.05V_VCCST) AH32 AL24
VDDQ2 VCCIO3
1U_0201_6.3V6M
1 RON(Max) : 25 mohm AH36 AL25
RC133 1 2 0_0402_5% AM36 VDDQ3 VCCIO4 AL26
V drop : 0.004 V VDDQ4 VCCIO5
CC24
AN32 AL27
VDDQ5 VCCIO6
0.1U_0201_10V6K
CC25 @
1 AW32 AM25
2 UC14 AY36 VDDQ6 VCCIO7 AM27
1 14 BE32 VDDQ7 VCCIO8 BH24
+1.05VALW VIN1 VOUT1 VDDQ8 VCCIO9
2 13 BH36 BH25
VIN1 VOUT1 2 R32 VDDQ9 VCCIO10 BH26
D D
RC134 1 @ 2 0_0402_5% EN_1.0V_VCCSTU 3 12 1 2 Y36 VDDQ10 VCCIO11 BH27
[33,44] SYSON ON1 CT1 CC26 +1.05V_VCCST VDDQ11 VCCIO12 BJ24
4 11 8200P_0402_25V7K VCCIO13 BJ26
VBIAS GND VCCIO14 BP16
RC135 1 @ 2 0_0402_5% EN_1.8VS 5 10 1 2 +1.2V +1.05VS_VCCIO BC28 VCCIO15 BP18 +VCCSA
[33,39,44] SUSP# ON2 CT2 RSVD1 VCCIO16
CC27 Follow 543977_SKL_PDDG_Rev0_91
6 9 1000P_0402_50V7K CC24 10PF ->22us(Spec:<= 65us) BP11 BG8 6A
7 VIN2 VOUT2 8 BP2 VCCST1 VCCSA2 BG10
+1.8VALW VIN2 VOUT2 VCCST2 VCCSA1 BH9
15 +1.8VS VCCSA3 BJ8
GPAD BG1 VCCSA5 BJ9
0.02A VCCSTG1 VCCSA6
+1.8VALW TO +1.8VS
AOZ1331 DFN 14P BG2 BJ10
RC136 1 @ 2 0_0603_5% VCCSTG2 VCCSA4 BK8
SA0000BKC00 VCCSA9
I(Max) : 0.2 A(+1.8VS) 0.12A BL27 BK25
VCCPLL_OC1 VCCSA7
0.1U_0201_10V6K
CC28 @
RON(Max) : 25 mohm 1 BM26 BK27
VCCPLL_OC2 VCCSA8 BL8
V drop : 0.005 V BR11 VCCSA13 BL9
0.19A VCCPLL1 VCCSA14
BT11 BL10
2 VCCPLL2 VCCSA10 BL24
VCCSA11
+1.05VALW TO +1.05VS_VCCIO
BL26
VCCSA12 BM24
+VL +1.05VALW VCCSA15 BN25
VCCSA16
I(Max) : 3.675 A(+1.05VS_VCCIO) BP28
VCCIO_SENSE BP29
RON(Max) : 6.2 mohm VSSIO_SENSE
Trace Length Match < 25 mils
0.1U_0201_10V K X5R
1U_0201_6.3V6M
1 1 V drop : 0.019 V +1.05VS_VCCIO VSSSA_SENSE

CC29
BE7
VSSSA_SENSE VCCSA_SENSE VSSSA_SENSE [47]
CC30
UC15 BG7
VCCSA_SENSE VCCSA_SENSE [47] C
C @ 1 1uF X1
2 2 2 VIN1 0.1uF X1 CFLU-43E_BGA1528
VIN2 +1.05V_VCCST @
7 6 +1.05VS_VCCIO_STG RC137 1 @ 2 0_0805_5% PSC Side 14 of 20
VIN thermal VOUT +1.2V +1.05VS_VCCIO
1
3 CC31 @ PSC Side PSC Side
VBIAS
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
0.1U_0201_10V K X5R
SUSP# 4 5 1 1 1 1 1
ON GND 2
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1
@ CC32
@ CC34
CC33
CC35
CC36
CC37
CC38
EM5201V_DFN8_3X3
SA00008R600 2 2 2 2 2
2 2
Close to BP11 & BP2 Close to BR11 & BT11 Close to BM26 Close to BG1 & BG2
+1.2V change package of 1U from 0201 to 0402

PSC Side BSC Side
+1.05VS_VCCIO change package of 1U from 0201 to 0402

BSC Side PSC Side
4.7U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
B
1 1 1 1 1 1 1 1 1 B
@ CC53
@ CC55
CC49
CC50
CC51
CC52
CC54
CC56
CC57
2 2 2 2 2 2 2 2 2
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1 1 1 1 1 1 1 @ @
@ CC45
@ CC46
CC39
CC40
CC41
CC42
CC43
CC44
CC47
CC48
2 2 2 2 2 2 2 2 2 2
Underneath CPU Close to CPU
Close to CPU Underneath CPU
A A

WHL-U(8/12)Power
5 4 3 2 1
5 4 3 2 1
+1.05VALW +1.05VALW
1
@ 1
CC61
1U_0201_6.3V6M CC62
2
1U_0201_6.3V6M
2
Close to BV18 Close to BP20

Imax : 4.982A
D
+1.05VALW D
+1.05VALW +1.05VALW
+1.05VALW +3VALW
UC1P RTC Bat t er y
BP20
BW16 VCCPRIM_1P05_1 CB16
1 1 1 VCCPRIM_1P05_9 VCCPRIM_3P3_3
BW18 +3VL_RTC +RTCBATT
CC63 CC64 CC65 BW19 VCCPRIM_1P05_10 +3VL_RTC
4.7U_0402_6.3V6M 10U_0402_6.3V6M BY16 VCCPRIM_1P05_11
2
1U_0201_6.3V6M
2 2 +1.8VALW VCCPRIM_1P05_12 W=20mils
CA14 BR23
VCCPRIM_1P05_14 VCCRTC RC141 1 2 0_0402_5%
CC15 BY20 @
Imax : 0.702A CD15 VCCPRIM_1P8_1 VCCPRIM_1P05_13 BP24 DCPRTC CC66 1 2 1U_0201_6.3V6M
Close to BV12 VCCPRIM_1P8_4 DCPRTC 1
CD16
+3VALW CP17 VCCPRIM_1P8_5 CC67
Close to BV2 VCCPRIM_1P8_8 Close to BP24
BR20 1U_0201_6.3V6M
CB22 VCCPRIM_1P05_3 2
Imax : 0.21A VCCPRIM_3P3_4 Close to BR23
CB23 BT12
CC22 VCCPRIM_3P3_5 VCCAPLL_1P05_3
+1.8VALW CC23 VCCPRIM_3P3_6 BP14
CD22 VCCPRIM_3P3_7 VCCA_BCLK_1P05
VCCPRIM_3P3_8 Saf t y s ugges t i on r emove EE s i de , Keep PW
R s i de
CD23 BR14
CP29 VCCPRIM_3P3_9 VCCAPLL_1P05_1
VCCPRIM_3P3_10
1
BU15 BU12
CC68 BU22 VCCPRIM_CORE1 VCCA_SRC_1P05
VCCPRIM_CORE2 +1.05VALW
1U_0201_6.3V6M BV15 CP5
2 BV16 VCCPRIM_CORE3 VCCA_XTAL_1P05
BV18 VCCPRIM_CORE4 BY24
BV19 VCCPRIM_CORE5 VCCDPHY_1P24_2 CA24
BV20 VCCPRIM_CORE6 VCCDPHY_1P24_4 +VCCDPHY_1.24V
BV22 VCCPRIM_CORE7 BY23
VCCPRIM_CORE8 VCCDPHY_1P24_1 Close to CP25 1
Close to CP17 BW20 CA23 Intenal LDO CC70
BW22 VCCPRIM_CORE9 VCCDPHY_1P24_3 CP25 VCCDPHY_EC_1P24 CC69 1 2 4.7U_0402_6.3V6M 1U_0201_6.3V6M
CA12 VCCPRIM_CORE10 VCCDPHY_EC_1P24
CA16 VCCPRIM_CORE11 BT23 +1.05VALW 2
C CA18 VCCPRIM_CORE12 VCCDSW_3P3_2 C
+3VALW CA19 VCCPRIM_CORE13 BR12
CA20 VCCPRIM_CORE14 VCCA_19P2_1P05
CB12 VCCPRIM_CORE15
CB14 VCCPRIM_CORE16 +1.8VALW
1 1 VCCPRIM_CORE17 Close to CP5
@ @ Close to BT24 CB15
CC71 CC72 Internal LDO VCCPRIM_CORE18 CC18
0.1U_0201_10V K X5R CC73 1 2 1U_0201_6.3V6M DCPDSW BT24 VCCPRIM_1P8_2 CC19
Imax : 0.702A
1U_0201_6.3V6M VCCDSW_1P05 VCCPRIM_1P8_3
2 2 CD18
BU14 VCCPRIM_1P8_6 CD19
VCCAPLL_1P05_4 VCCPRIM_1P8_7 CP23
BV12 VCCPRIM_1P8_9
BW12 VCCPRIM_MPHY_1P05_1 BW23
Close to CP29 VCCPRIM_MPHY_1P05_3 VCCPRIM_3P3_2
BW14
BY12 VCCPRIM_MPHY_1P05_4
BY14 VCCPRIM_MPHY_1P05_5 +VCCDPHY_1.24V
VCCPRIM_MPHY_1P05_6 BP23
+3VALW BV2 VCCPRIM_3P3_1 +1.8VALW
VCCAMPHYPLL_1P05 CB36
BR15 GPP_B0/CORE_VID0 CB35 VCCDPHY_EC_1P24 R1 1 CNVi@ 2 0_0201_5%
VCCAPLL_1P05_2 GPP_B1/CORE_VID1
+3VALW CC12
VCCDUSB_1P05 1
1 @ When CNVi is not used in the design:
@ BR24 CC75 VCCDPHY_1P24 pin shall be disconnected from the VCCLDOSRAM_IN_1P24 pin.
CC74 +3V_1.8V_HDA VCCDSW_3P3_1 The decoupling capacitor shall remain connected to the VCCDPHY_1P24 pin.
1U_0201_6.3V6M
0.1U_0201_10V K X5R BT20 2
2 VCCHDA
BV23
BT18 VCCSPI
BT19 VCCPRIM_1P05_4
VCCPRIM_1P05_5 Close to CP23
Close to BR24 BU18
BU19 VCCPRIM_1P05_7
VCCPRIM_1P05_8
BT22
+3VALW RF@ +3V_1.8V_HDA BP22 VCCPRIM_1P05_6
B VCCPRIM_1P05_2 B
LC2 BV14
1 2 VCCPRIM_MPHY_1P05_2
BLM15BB221SN1D_2P CFLU-43E_BGA1528
SM01000BV00 @
16 of 20
1
CC76
0.1U_0402_25V6
RF@
2
UC1O
RF request K12
VCCOPC1 VCCEOPIO1
AA24
K14 AA26
K15 VCCOPC2 VCCEOPIO2 AB25
K17 VCCOPC3 VCCEOPIO3 AC24
L25 VCCOPC6 VCCEOPIO6 AD24
M24 VCCOPC7 VCCEOPIO7 AD26
M26 VCCOPC8 VCCEOPIO8
P24 VCCOPC9 V25
P26 VCCOPC10 VCCEOPIO_SENSE T25
R24 VCCOPC11 VSSEOPIO_SENSE
R25 VCCOPC12
R26 VCCOPC13
VCCOPC14
W25
V24 VCC_OPC_1P8_2
VCC_OPC_1P8_1
Y25
Y24 VCC_OPC_1P8_4
VCC_OPC_1P8_3
A A
CFLU-43E_BGA1528
@
15 of 20
VCCOPC and VCCEOPIO for CFL U43e only

WHL-U(9/12)Power
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
+VCC_GT +VCC_GT
+VCC_CORE +VCC_CORE
UC1M
UC1L
A5 D15
AN9 AW24 A6 VCCGT8 VCCGT58 D17
AN10 VCCCORE5 VCCCORE35 AW25 A8 VCCGT9 VCCGT59 D18
AN24 VCCCORE1 VCCCORE36 AW26 A11 VCCGT10 VCCGT60 D20
D D
AN26 VCCCORE2 VCCCORE37 AW27 A12 VCCGT1 VCCGT61 E4
AN27 VCCCORE3 VCCCORE38 AY24 A14 VCCGT2 VCCGT64 F5
AP2 VCCCORE4 VCCCORE44 AY26 A15 VCCGT3 VCCGT69 F6
AP9 VCCCORE6 VCCCORE45 BA5 +VCC_CORE A17 VCCGT4 VCCGT70 F7
AP24 VCCCORE9 VCCCORE48 BA7 A18 VCCGT5 VCCGT71 F8
AP26 VCCCORE7 VCCCORE49 BA8 A20 VCCGT6 VCCGT72 F11
AR5 VCCCORE8 VCCCORE50 BA25 AA9 VCCGT7 VCCGT65 F14
AR6 VCCCORE13 VCCCORE46 BA27 AB2 VCCGT11 VCCGT66 F17
AR7 VCCCORE14 VCCCORE47 BB2 AB8 VCCGT13 VCCGT67 F20
AR8 VCCCORE15 VCCCORE51 BB26 AB9 VCCGT14 VCCGT68 G11
AR10 VCCCORE16 VCCCORE52 BC5 AB10 VCCGT15 VCCGT73 G12
AR25 VCCCORE10 VCCCORE56 BC6 AC8 VCCGT12 VCCGT74 G14
AR27 VCCCORE11 VCCCORE57 BC7 AD9 VCCGT16 VCCGT75 G15
AT9 VCCCORE12 VCCCORE58 BC9 AE8 VCCGT17 VCCGT76 G17
AU5 VCCCORE18 VCCCORE54 BC27 AF2 VCCGT18 VCCGT79 H5
AU6 VCCCORE24 VCCCORE55 BD5 AF8 VCCGT22 VCCGT87 H6
AU7 VCCCORE25 VCCCORE63 BD8 AF10 VCCGT23 VCCGT88 H7
AU8 VCCCORE26 VCCCORE64 BD10 AG8 VCCGT21 VCCGT89 H8
AU9 VCCCORE27 VCCCORE60 BD25 AG9 VCCGT24 VCCGT90 H11
AU24 VCCCORE28 VCCCORE61 BD27 AH9 VCCGT25 VCCGT80 H12
AU25 VCCCORE20 VCCCORE62 BE9 AJ8 VCCGT26 VCCGT81 H14
AU26 VCCCORE21 VCCCORE69 BE24 AJ10 VCCGT28 VCCGT82 H15
AU27 VCCCORE22 VCCCORE65 BE25 AK2 VCCGT27 VCCGT83 H17
AV2 VCCCORE23 VCCCORE66 BE26 AK9 VCCGT29 VCCGT84 H18
AV5 VCCCORE30 VCCCORE67 BE27 AL8 VCCGT30 VCCGT85 H20
AV7 VCCCORE32 VCCCORE68 BF2 AL9 VCCGT32 VCCGT86 J7
C AV10 VCCCORE33 VCCCORE70 BF9 AL10 VCCGT33 VCCGT95 J8 C
AV27 VCCCORE29 VCCCORE73 BF24 AM8 VCCGT31 VCCGT96 J11
AW5 VCCCORE31 VCCCORE71 BF26 B3 VCCGT34 VCCGT91 J14
AW6 VCCCORE39 VCCCORE72 BG27 B4 VCCGT39 VCCGT92 J17
AW7 VCCCORE40 VCCCORE74 B6 VCCGT40 VCCGT93 J20
AW8 VCCCORE41 AN6 B8 VCCGT41 VCCGT94 K2
VCCCORE42 VCC_SENSE VCCCORE_SENSE [47] VCCGT42 VCCGT98
AW9 AN5 Trace Length Match < 25 mils B11 K11
VCCCORE43 VSS_SENSE VSSCORE_SENSE [47] VCCGT35 VCCGT97
AW10 B14 L7
VCCCORE34 AA3 SOC_SVID_ALERT# B17 VCCGT36 VCCGT100 L8
VIDALERT# B20 VCCGT37 VCCGT101 L10
BB9 AA1 VR_SVID_CLK C2 VCCGT38 VCCGT99 M9
RSVD3 VIDSCK VR_SVID_CLK [47] VCCGT49 VCCGT102
BC24 C3 N7
AY9 RSVD4 AA2 VR_SVID_DATA C6 VCCGT51 VCCGT104 N8
BB24 RSVD1 VIDSOUT C7 VCCGT52 VCCGT105 N9
RSVD2 Y3 +1.05VS_VCCIO C8 VCCGT53 VCCGT106 N10
RSVD5 C11 VCCGT54 VCCGT103 P2
BG3 C12 VCCGT43 VCCGT107 P8
VCCSTG1 C14 VCCGT44 VCCGT108 R9
CFLU-43E_BGA1528 C15 VCCGT45 VCCGT109 T8
C17 VCCGT46 VCCGT111 T9
@ VCCGT47 VCCGT112
12 of 20 C18 T10
C20 VCCGT48 VCCGT110 U8
D4 VCCGT50 VCCGT114 U10
D7 VCCGT62 VCCGT113 V2
SVID ALERT D11 VCCGT63
VCCGT55
VCCGT115
VCCGT116
V9
+1.05V_VCCST D12 W8
Place the PU VCCGT56 VCCGT117
D14 W9
resistors close to CPU Y10 VCCGT57 VCCGT118 Y8
VCCGT119 VCCGT120
1
B E3 VCCGT_SENSE B
VCCGT_SENSE VSSGT_SENSE VCCGT_SENSE [47]
RC147 D2
VSSGT_SENSE VSSGT_SENSE [47]
56_0402_5%
CFLU-43E_BGA1528 Trace Length Match < 25 mils
13 of 20
@
2
SOC_SVID_ALERT# 1 2 (To VR)

VR_ALERT# [47]
RC148 220_0402_5%
+1.05V_VCCST
SVID DATA Place the PU

resistors close to CPU
1
RC149
100_0402_1%
2
VR_SVID_DATA
VR_SVID_DATA [47] (To VR)
A A

WHL-U(10/12)Power,SVID
5 4 3 2 1
5 4 3 2 1
D D
UC1R UC1S UC1T

BT35 BY25
CR34 BL7 D6 VSS_145 VSS_217 J18 N6 CF23
BT5 VSS_1 VSS_73 AE25 AL32 VSS_146 VSS_218 AU32 B37 VSS_290 VSS_362 V4
BY5 VSS_2 VSS_74 BM33 BT36 VSS_147 VSS_219 BY28 CB3 VSS_291 VSS_363 BE30
CP35 VSS_3 VSS_75 CM5 D8 VSS_148 VSS_220 J21 P10 VSS_292 VSS_364 CF28
CM37 VSS_4 VSS_76 AE27 AL7 VSS_149 VSS_221 AV25 B5 VSS_293 VSS_365 W10
CK37 VSS_5 VSS_77 BM35 D9 VSS_150 VSS_222 BY33 CB33 VSS_294 VSS_366 BE31
AW1 VSS_6 VSS_78 CM9 AM10 VSS_151 VSS_223 J24 P3 VSS_295 VSS_367 CF3
CM1 VSS_7 VSS_79 AE30 BU11 VSS_152 VSS_224 AV28 B7 VSS_296 VSS_368 W27
BD6 VSS_8 VSS_80 BM36 E23 VSS_153 VSS_225 BY35 CB4 VSS_297 VSS_369 CF4
AY4 VSS_9 VSS_81 CN13 AM28 VSS_154 VSS_226 J33 P33 VSS_298 VSS_370 W30
B34 VSS_10 VSS_82 AE7 E27 VSS_155 VSS_227 AV3 B9 VSS_299 VSS_371 BF3
E35 VSS_11 VSS_83 BM9 AM33 VSS_156 VSS_228 BY36 CB7 VSS_300 VSS_372 CG33
A4 VSS_12 VSS_84 CN17 BU23 VSS_157 VSS_229 J36 P36 VSS_301 VSS_373 W7
AE24 VSS_13 VSS_85 AF27 E29 VSS_158 VSS_230 AV33 BA10 VSS_302 VSS_374 BF33
AE26 VSS_14 VSS_86 BN30 AM35 VSS_159 VSS_231 J6 CC11 VSS_303 VSS_375 CG7
AF25 VSS_15 VSS_87 CN21 BU24 VSS_160 VSS_232 AV36 P4 VSS_304 VSS_376 BF36
AG24 VSS_16 VSS_88 AF3 E31 VSS_161 VSS_233 C1 BA28 VSS_305 VSS_377 Y26
AG26 VSS_17 VSS_89 BN7 BU25 VSS_162 VSS_234 K21 P7 VSS_306 VSS_378 BF4
AH24 VSS_18 VSS_90 CN25 E33 VSS_163 VSS_235 AV4 BA3 VSS_307 VSS_379 CH31
AH25 VSS_19 VSS_91 AF30 AN25 VSS_164 VSS_236 C21 CC20 VSS_308 VSS_380 Y27
B2 VSS_20 VSS_92 CN29 BU7 VSS_165 VSS_237 K22 R27 VSS_309 VSS_381 BG25
B36 VSS_21 VSS_93 AF33 E9 VSS_166 VSS_238 AV6 BB3 VSS_310 VSS_382 Y30
C36 VSS_22 VSS_94 BP15 AN28 VSS_167 VSS_239 C25 CC25 VSS_311 VSS_383 BG28
C37 VSS_23 VSS_95 AF36 BV11 VSS_168 VSS_240 K24 R28 VSS_312 VSS_384 CJ11
C CN1 VSS_24 VSS_96 AF4 F12 VSS_169 VSS_241 AV8 BB33 VSS_313 VSS_385 Y33 C
CN2 VSS_25 VSS_97 CN5 AN29 VSS_170 VSS_242 C29 CC28 VSS_314 VSS_386 CJ14
CN37 VSS_26 VSS_98 AF7 F15 VSS_171 VSS_243 K25 R29 VSS_315 VSS_387 Y35
CP2 VSS_27 VSS_99 BP25 AN30 VSS_172 VSS_244 AW28 BB36 VSS_316 VSS_388 BH28
D1 VSS_28 VSS_100 CN9 F18 VSS_173 VSS_245 C33 CC31 VSS_317 VSS_389 CJ19
A32 VSS_29 VSS_101 AG10 AN31 VSS_174 VSS_246 K27 R30 VSS_318 VSS_390 Y7
F33 VSS_30 VSS_102 BP3 BV3 VSS_175 VSS_247 AW29 BB4 VSS_319 VSS_391 BH29
A3 VSS_31 VSS_103 CP1 F2 VSS_176 VSS_248 C4 CC7 VSS_320 VSS_392 CJ23
BJ7 VSS_32 VSS_104 BP32 AN7 VSS_177 VSS_249 K28 R31 VSS_321 VSS_393 BH32
CJ36 VSS_33 VSS_105 CP11 BV31 VSS_178 VSS_250 AW3 BC25 VSS_322 VSS_394 CJ28
A36 VSS_34 VSS_106 AH27 F21 VSS_179 VSS_251 C9 CD11 VSS_323 VSS_395 BH33
BK10 VSS_35 VSS_107 BP33 AN8 VSS_180 VSS_252 K29 T27 VSS_324 VSS_396 CJ33
CJ4 VSS_36 VSS_108 CP13 BV33 VSS_181 VSS_253 AW30 CD12 VSS_325 VSS_397 BH35
AB27 VSS_37 VSS_109 AH28 F24 VSS_182 VSS_254 CA11 T30 VSS_326 VSS_398 CJ35
BK2 VSS_38 VSS_110 BP4 BV4 VSS_183 VSS_255 K3 BC29 VSS_327 VSS_399 BP19
CK1 VSS_39 VSS_111 CP15 F3 VSS_184 VSS_256 AW31 CD14 VSS_328 VSS_400 BR16
AB3 VSS_40 VSS_112 AH29 AP3 VSS_185 VSS_257 CA15 T33 VSS_329 VSS_401 BY18
BK28 VSS_41 VSS_113 BP7 BW11 VSS_186 VSS_258 K30 T35 VSS_330 VSS_402 BY19
AB30 VSS_42 VSS_114 CP19 F4 VSS_187 VSS_259 AY33 BC32 VSS_331 VSS_403 CC16
BK3 VSS_43 VSS_115 AH30 AP33 VSS_188 VSS_260 CA22 CD24 VSS_332 VSS_404 BU16
CK4 VSS_44 VSS_116 CP21 BW15 VSS_189 VSS_261 K31 T36 VSS_333 VSS_405 CC14
AB33 VSS_45 VSS_117 AH31 G21 VSS_190 VSS_262 AY35 CD25 VSS_334 VSS_406 BR22
BK33 VSS_46 VSS_118 BR19 AP36 VSS_191 VSS_263 K32 T7 VSS_335 VSS_407 BU20
CK7 VSS_47 VSS_119 CP27 G27 VSS_192 VSS_264 B12 BC8 VSS_336 VSS_408 CD20
AB36 VSS_48 VSS_120 AH33 AP4 VSS_193 VSS_265 K4 CE33 VSS_337 VSS_409 BT14
BK4 VSS_49 VSS_121 BR25 G33 VSS_194 VSS_266 B15 U26 VSS_338 VSS_410 BP12
CL2 VSS_50 VSS_122 AH35 AR28 VSS_195 VSS_267 CA25 BD28 VSS_339 VSS_411 CB24
AB4 VSS_51 VSS_123 CP37 G35 VSS_196 VSS_268 K9 CE35 VSS_340 VSS_412 CC24
BK7 VSS_52 VSS_124 AJ25 G36 VSS_197 VSS_269 B18 U7 VSS_341 VSS_413 J5
B CM13 VSS_53 VSS_125 BT15 AT33 VSS_198 VSS_270 CB11 BD33 VSS_342 VSS_414 U24 B
AB7 VSS_54 VSS_126 AJ28 BW24 VSS_199 VSS_271 L27 CE36 VSS_343 VSS_415 BD7
BL25 VSS_55 VSS_127 BT16 G9 VSS_200 VSS_272 B21 V26 VSS_344 VSS_416 AR4
CM17 VSS_56 VSS_128 CP9 AT35 VSS_201 VSS_273 L33 BD35 VSS_345 VSS_417 AU4
AC10 VSS_57 VSS_129 AJ7 H21 VSS_202 VSS_274 B23 CE7 VSS_346 VSS_418 AW4
BL28 VSS_58 VSS_130 CR2 AT36 VSS_203 VSS_275 L35 V27 VSS_347 VSS_419 BA6
CM21 VSS_59 VSS_131 AK3 BW7 VSS_204 VSS_276 B25 BD36 VSS_348 VSS_420 BC4
AC27 VSS_60 VSS_132 CR36 H27 VSS_205 VSS_277 CB18 CF11 VSS_349 VSS_421 BE4
BL29 VSS_61 VSS_133 AK33 AT4 VSS_206 VSS_278 L36 V3 VSS_350 VSS_422 BE8
CM25 VSS_62 VSS_134 D21 BY11 VSS_207 VSS_279 B27 BE10 VSS_351 VSS_423 BA4
AC30 VSS_63 VSS_135 AK36 AU10 VSS_208 VSS_280 CB19 CF14 VSS_352 VSS_424 BD4
BL30 VSS_64 VSS_136 BT25 BY15 VSS_209 VSS_281 L6 V30 VSS_353 VSS_425 BG4
CM29 VSS_65 VSS_137 D25 H9 VSS_210 VSS_282 B29 BE28 VSS_354 VSS_426 CJ2
BL31 VSS_66 VSS_138 AK4 AU28 VSS_211 VSS_283 CB2 CF19 VSS_355 VSS_427 CJ3
CM31 VSS_67 VSS_139 BT28 BY22 VSS_212 VSS_284 N25 V33 VSS_356 VSS_428 AM5
AD33 VSS_68 VSS_140 AL28 J12 VSS_213 VSS_285 B31 BE29 VSS_357 VSS_429 CM4
BL32 VSS_69 VSS_141 BT33 AU29 VSS_214 VSS_286 CB20 CF2 VSS_358 VSS_430 AC5
CM33 VSS_70 VSS_142 D5 J15 VSS_215 VSS_287 N27 V36 VSS_359 VSS_431 AG5
AD35 VSS_71 VSS_143 AL29 VSS_216 VSS_288 CB25 BE3 VSS_360 VSS_432 CR6
VSS_72 VSS_144 VSS_289 VSS_361 VSS_433
CFLU-43E_BGA1528 CFLU-43E_BGA1528 CFLU-43E_BGA1528

@ @ @
17 of 20 18 of 20 19 of 20
A A

WHL-U(11/12)GND
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
D
+1.05VS_VCCIO D
RC150 1 @ 2 10K_0201_5% CFG0 UC1Q
CFG0 T4 F37
1 @ 2 CFG3 CFG_0 RSVD_TP5 F34
RC151 1K_0201_5% R4 RSVD_TP4
T3 CFG_1 CP36
CFG3 R3 CFG_2 IST_TRIG CN36
CFG4 J4 CFG_3 RSVD_TP3
M4 CFG_4 BJ36
J3 CFG_5 RSVD15 BJ34
M3 CFG_6 RSVD14
R2 CFG_7 BK34
N2 CFG_8 TP_1 BR18
R1 CFG_9 TP_3
N1 CFG_10
J2 CFG_11
L2 CFG_12 BT9
J1 CFG_13 RSVD21 BT8
L1 CFG_14 RSVD20
CFG_15 BP8
L3 RSVD18 BP9
N3 CFG_16 RSVD19
L4 CFG_18 CR4
N4 CFG_17 RSVD29
CFG_19 CP3
C RSVD26 CR3 C
CFG_RCOMP AB5 RSVD27
CFG_RCOMP
W4
ITP_PMODE
CG2
CG1 RSVD25
RSVD24
AT3
RSVD12 AU3
RSVD13
H4
H3 RSVD34
RSVD33 AN1
BV24 RSVD8 AN2
BV25 RSVD22 RSVD9
RSVD23 AN4
RSVD11 AN3
RSVD10
AL2
G3 RSVD3 AL1
G4 VSS_436 RSVD2
VSS_437
AL4
RSVD5 AL3
BK36 RSVD4
BK35 RSVD17 BP34
RSVD16 TP1 BP36
W3 TP_2 BP35
B AM4 RSVD35 TP_4 B
RSVD7 C34
AM3 VSS_435
RSVD6 A34
RSVD_TP1 B35
RSVD_TP2
CR35 RSVD28
A35 RSVD28 TP@ T2407 Follow Intel suggetion reserve TP
D34 RSVD1
RSVD30 AH26
1 2 CFG_RCOMP G2 ZVM# AJ27
RC152 49.9_0402_1% G1 RSVD32 MSM#
RSVD31 E1
1 2 CFG4 SKTOCC#
RC153 1K_0201_5%
CFLU-43E_BGA1528
@
20 of 20
DFX Privacy Strap
1 : Disabled;
Set DFX disable bit in debug interface MSR
CFG3
0 : Enabled;
Set DFX enable bit in debug interface MSR
A A
Display Port Presence Strap
1 : Disabled; Compal Secret Data

No Physical Display Port at t ac hed t o E mbedded Dis pl ay port
Security Classification
2018/04/09 2019/04/09 Title
CFG4 Issued Date Deciphered Date
0 : Enabled; THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WHL-U(12/12)CFG,RSVD
An external Display Port device is connected to the Embedded Display Port DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
5 4 3 2 1
5 4 3 2 1
Interleaved Memory
+DDR_VREF_CA +DDR_VREF_CA +DDR_VREF_CA

+DDR_VREF_CA
U1 U2 U3
U4
M1 G2 DDR_A_D4 M1 G2 DDR_A_D17 M1 G2 DDR_A_D47
D VREFCA DQL0 DDR_A_D1 VREFCA DQL0 DDR_A_D20 VREFCA DQL0 DDR_A_D43 DDR_A_D59 D
F7 F7 F7 M1 G2
DQL1 H3 DDR_A_D0 DQL1 H3 DDR_A_D21 DQL1 H3 DDR_A_D46 VREFCA DQL0 F7 DDR_A_D57
DDR_A_MA0 P3 DQL2 H7 DDR_A_D5 DDR_A_MA0 P3 DQL2 H7 DDR_A_D22 DDR_A_MA0 P3 DQL2 H7 DDR_A_D42 DQL1 H3 DDR_A_D62
1 DDR_A_MA1 A0 DQL3 DDR_A_D7 1 DDR_A_MA1 A0 DQL3 DDR_A_D19 1 DDR_A_MA1 A0 DQL3 DDR_A_D45 DDR_A_MA0 DQL2 DDR_A_D56
CD2 P7 H2 CD3 P7 H2 CD1 P7 H2 1 P3 H7
.047U_0402_16V7K DDR_A_MA2 R3 A1 DQL4 H8 DDR_A_D2 .047U_0402_16V7K DDR_A_MA2 R3 A1 DQL4 H8 DDR_A_D18 .047U_0402_16V7K DDR_A_MA2 R3 A1 DQL4 H8 DDR_A_D41 CD4 DDR_A_MA1 P7 A0 DQL3 H2 DDR_A_D63
SE076473K80 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D3 SE076473K80 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D16 SE076473K80 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D44 .047U_0402_16V7K DDR_A_MA2 R3 A1 DQL4 H8 DDR_A_D60
2 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D6 2 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D23 2 DDR_A_MA4 N3 A3 DQL6 J7 DDR_A_D40 SE076473K80 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_D58
MD@ DDR_A_MA5 A4 DQL7 MD@ DDR_A_MA5 A4 DQL7 MD@ DDR_A_MA5 A4 DQL7 2 DDR_A_MA4 A3 DQL6 DDR_A_D61
P8 P8 P8 @ N3 J7
DDR_A_MA6 P2 A5 DDR_A_MA6 P2 A5 DDR_A_MA6 P2 A5 DDR_A_MA5 P8 A4 DQL7
DDR_A_MA7 R8 A6 A3 DDR_A_D9 DDR_A_MA7 R8 A6 A3 DDR_A_D28 DDR_A_MA7 R8 A6 A3 DDR_A_D35 DDR_A_MA6 P2 A5
DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D10 DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D31 DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D34 DDR_A_MA7 R8 A6 A3 DDR_A_D50
DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_D15 DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_D25 DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_D38 DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_D49
DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D13 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D26 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D39 DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_D51
DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D11 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D24 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D37 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_D48
DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D12 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D27 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D33 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_D55
DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D14 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D29 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D32 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_D52
DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D8 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D30 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D36 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_D54
A14/WE DQU7 A14/WE DQU7 A14/WE DQU7 DDR_A_MA14 L2 A13 DQU6 D7 DDR_A_D53
DDR_A_BA0 N2 DDR_A_BA0 N2 DDR_A_BA0 N2 A14/WE DQU7
[7,20] DDR_A_BA0 DDR_A_BA1 BA0 DDR_A_BA1 BA0 DDR_A_BA1 BA0 DDR_A_BA0
N8 B3 +1.2V N8 B3 +1.2V N8 B3 +1.2V N2
[7,20] DDR_A_BA1 BA1 VDD BA1 VDD BA1 VDD DDR_A_BA1 BA0
B9 B9 B9 N8 B3 +1.2V
E2 VDD D1 E2 VDD D1 E2 VDD D1 BA1 VDD B9
+1.2V DMU/DBIU VDD +1.2V DMU/DBIU VDD +1.2V DMU/DBIU VDD VDD
E7 G7 E7 G7 E7 G7 +1.2V E2 D1
DML/DBIL VDD J1 DML/DBIL VDD J1 DML/DBIL VDD J1 E7 DMU/DBIU VDD G7
VDD J9 VDD J9 VDD J9 DML/DBIL VDD J1
VDD L1 VDD L1 VDD L1 VDD J9
DDR_A_CLK0 K7 VDD L9 DDR_A_CLK0 K7 VDD L9 DDR_A_CLK0 K7 VDD L9 VDD L1
[7] DDR_A_CLK0 DDR_A_CLK#0 CK_t VDD DDR_A_CLK#0 CK_t VDD DDR_A_CLK#0 CK_t VDD DDR_A_CLK0 VDD
K8 R1 K8 R1 K8 R1 K7 L9
[7] DDR_A_CLK#0 DDR_A_CKE0 CK_c VDD DDR_A_CKE0 CK_c VDD DDR_A_CKE0 CK_c VDD DDR_A_CLK#0 CK_t VDD
K2 T9 K2 T9 K2 T9 K8 R1
[7,20] DDR_A_CKE0 CKE VDD CKE VDD CKE VDD DDR_A_CKE0 CK_c VDD
K2 T9
CKE VDD
A1 A1 A1
VDDQ A9 VDDQ A9 VDDQ A9 A1
VDDQ C1 VDDQ C1 VDDQ C1 VDDQ A9
VDDQ D9 VDDQ D9 VDDQ D9 VDDQ C1
VDDQ F2 VDDQ F2 VDDQ F2 VDDQ D9
VDDQ F8 VDDQ F8 VDDQ F8 VDDQ F2
DDR_A_ODT0 K3 VDDQ G1 DDR_A_ODT0 K3 VDDQ G1 DDR_A_ODT0 K3 VDDQ G1 VDDQ F8
[7,20] DDR_A_ODT0 DDR_A_CS#0 ODT VDDQ DDR_A_CS#0 ODT VDDQ DDR_A_CS#0 ODT VDDQ DDR_A_ODT0 VDDQ
L7 G9 L7 G9 L7 G9 K3 G1
[7,20] DDR_A_CS#0 DDR_A_MA16 CS VDDQ DDR_A_MA16 CS VDDQ DDR_A_MA16 CS VDDQ DDR_A_CS#0 ODT VDDQ
L8 J2 L8 J2 L8 J2 L7 G9
DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA15 M8 RAS VDDQ J8 DDR_A_MA16 L8 CS VDDQ J2
CAS VDDQ CAS VDDQ CAS VDDQ DDR_A_MA15 M8 RAS VDDQ J8
B2 Replace with 240 Ohm to Support DDP@ B2 Replace with 240 Ohm to Support DDP@ B2 Replace with 240 Ohm to Support DDP@ CAS VDDQ
VSS E1 DDP@ VSS E1 DDP@ VSS E1 DDP@ B2 Replace with 240 Ohm to Support DDP@
VSS E9 RD55 1 2 240_0402_1% VSS E9 RD56 1 2 240_0402_1% VSS E9 RD57 1 2 240_0402_1% VSS E1 DDP@
C VSS VSS VSS VSS C
G8 G8 G8 E9 RD58 1 2 240_0402_1%
DDR_A_DQS#1 A7 VSS K1 DDR_A_DQS#3 A7 VSS K1 DDR_A_DQS#4 A7 VSS K1 VSS G8
DDR_A_DQS1 B7 DQSU_c VSS K9 DDR_A_DQS3 B7 DQSU_c VSS K9 DDR_A_DQS4 B7 DQSU_c VSS K9 DDR_A_DQS#6 A7 VSS K1
DDR_A_DQS#0 F3 DQSU_t VSS M9 DDR_A_BG1_R DDR_A_DQS#2 F3 DQSU_t VSS M9 DDR_A_BG1_R DDR_A_DQS#5 F3 DQSU_t VSS M9 DDR_A_BG1_R DDR_A_DQS6 B7 DQSU_c VSS K9
DDR_A_DQS0 DQSL_c VSS DDR_A_BG1_R [20] DDR_A_DQS2 DQSL_c VSS DDR_A_DQS5 DQSL_c VSS DDR_A_DQS#7 DQSU_t VSS DDR_A_BG1_R
G3 N1 G3 N1 G3 N1 F3 M9
DQSL_t VSS T1 DQSL_t VSS T1 DQSL_t VSS T1 DDR_A_DQS7 G3 DQSL_c VSS N1
MEMRST# P1 VSS MEMRST# P1 VSS MEMRST# P1 VSS DQSL_t VSS T1
RESET RESET RESET MEMRST# P1 VSS
1 2 RU1 F9 1 2 RU2 F9 1 2 RU3 F9 RESET
240_0402_1% ZQ 240_0402_1% ZQ 240_0402_1% ZQ 1 2 RU4 F9
240_0402_1% ZQ
MD@
DDR_A_ACT# MD@
DDR_A_ACT# MD@
DDR_A_ACT#
[7,20] DDR_A_ACT# L3 A2 L3 A2 L3 A2 MD@
DDR_A_BG0 M2 ACT VSSQ A8 DDR_A_BG0 M2 ACT VSSQ A8 DDR_A_BG0 M2 ACT VSSQ A8 DDR_A_ACT# L3 A2
[7,20] DDR_A_BG0 BG0 VSSQ BG0 VSSQ BG0 VSSQ DDR_A_BG0 ACT VSSQ
N9 C9 N9 C9 N9 C9 M2 A8
DDR_A_ALERT# P9 TEN VSSQ D2 DDR_A_ALERT# P9 TEN VSSQ D2 DDR_A_ALERT# P9 TEN VSSQ D2 N9 BG0 VSSQ C9
[7] DDR_A_ALERT# DDR_A_PARITY ALERT VSSQ DDR_A_PARITY ALERT VSSQ DDR_A_PARITY ALERT VSSQ DDR_A_ALERT# TEN VSSQ
[7,20] DDR_A_PARITY T3 D8 T3 D8 T3 D8 P9 D2
PAR VSSQ E3 PAR VSSQ E3 PAR VSSQ E3 DDR_A_PARITY T3 ALERT VSSQ D8
T7 VSSQ E8 T7 VSSQ E8 T7 VSSQ E8 PAR VSSQ E3
B1 NC VSSQ F1 B1 NC VSSQ F1 B1 NC VSSQ F1 T7 VSSQ E8
+2.5V VPP VSSQ +2.5V VPP VSSQ +2.5V VPP VSSQ NC VSSQ
R9 H1 R9 H1 R9 H1 +2.5V B1 F1
VPP VSSQ H9 VPP VSSQ H9 VPP VSSQ H9 R9 VPP VSSQ H1
96-BALL VSSQ 96-BALL VSSQ 96-BALL VSSQ VPP VSSQ H9
SDRAM DDR4 SDRAM DDR4 SDRAM DDR4 96-BALL VSSQ
K4AAG165WB-MCRC C38 K4AAG165WB-MCRC C38 K4AAG165WB-MCRC C38 SDRAM DDR4
@ @ @ K4AAG165WB-MCRC C38
@
C
o
-
l
a
y
f
o
r
S
D
P
/
D
D
P
M
e
m
o
r
y
D
I
E
[7,20] DDR_A_MA[0..16]
[7] DDR_A_DQS#[0..7]
[7] DDR_A_DQS[0..7]
SDP@
[7] DDR_A_D[0..63]
O
n
B
o
a
r
d
R
A
M
-
D
a
t
a
M
a
p
p
i
n
g
RD55
B
SD034000080 B
0_0402_1%
SDP@
RD56
DDP@ SD034000080 U4 DQ U2 DQ U3 DQ U1 DQ
DDR_A_BG1_R RD7 1 2 0_0402_5% 0_0402_1%
DDR_A_BG1 [7]
DQL0 D13 DQL0 D29 DQL0 D43 DQL0 D60
SDP@
RD57 DQL1 D12 DQL1 D25 DQL1 D40 DQL1 D61
SDP@ For SDP@ SD034000080
RD9 1 2 0_0402_5% 0_0402_1% DQL2 D11 DQL2 D27 DQL2 D42 DQL2 D62
C
L
O
C
K
T
E
R
M
I
N
A
T
I
O
N
SDP@ DQL3 D8 DQL3 D24 DQL3 D41 DQL3 D57

RD58
SD034000080 DQL4 D10 DQL4 D30 DQL4 D47 DQL4 D58
0_0402_1%
+1.2V
DDR_A_CLK0 RU5 1 2 33_0402_1% CU25 1 2
DDR_A_CLK#0 DQU0 D6 DQU0 D22 DQU0 D38 DQU0 D50
RU6 1 2 33_0402_1%
MD@ 0.01U_0402_16V7K DQU1 D1 DQU1 D17 DQU1 D37 DQU1 D52
DDR_A_CLK0
MD@ MD@
1
+1.2V
DQU2 D7 DQU2 D23 DQU2 D35 DQU2 D51
@
CD5 DQU3 D5 DQU3 D20 DQU3 D32 DQU3 D48
3300P_0402_50V7K
DDR_A_CLK#0 2
+1.2V
2
DDR_A_ALERT# DQU6 D2 DQU6 D18 DQU6 D39 DQU6 D55

RD11 2 1 49.9_0402_1% RD12
1.8K_0402_1%
+DDR_VREF_CA
MD@ RD13 MD@
2.7_0402_1%
1
2 1
[7] +0.6V_A_VREFCA
MD@
DDR_DRAMRST# 1
RD14 1 @ 2 0_0402_5% MEMRST#
[7,19] DDR_DRAMRST#
A
CD6 A
1 0.022U_0402_16V7K
@ 2
MD@
CD7
1
100P_0201_25V8J
2 RD15 RD16
24.9_0402_1% 1.8K_0402_1%
MD@
2
MD@
WWW.AliSaler.Com
DDR4 ON BOARD CHIPS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-H081P 0.2
5 4 3 2 1
A B C D E
[7]
[7]
DDR_B_DQS#[0..7]
DDR_B_D[0..63]
Reverse Type
[7] DDR_B_DQS[0..7] 2-3A to 1 DIMMs/channel
[7] DDR_B_MA[0..16]
DDR_B_BA0
[7] DDR_B_BA0 DDR_B_BA1 +1.2V +1.2V +1.2V
[7] DDR_B_BA1 DDR_B_BG0 JDIMM1
[7] DDR_B_BG0 DDR_B_BG1
[7] DDR_B_BG1
1 2
DDR_B_D1 3 VSS1 VSS2 4 DDR_B_D0
5 DQ5 DQ4 6 +DIMM_VREF_DQ
DDR_B_CLK0 DQ1 DQ0
2
9 10
[7] DDR_B_CLK0 DDR_B_CLK#0 DDR_B_DQS#0 VSS5 VSS6
11 12 RD17
[7] DDR_B_CLK#0 DDR_B_CLK1 DDR_B_DQS0 DQS0_c DM0_n/DBI0_n
1 13 14 1K_0402_1% 1
[7] DDR_B_CLK1 DDR_B_CLK#1 DQS0_t VSS7 DDR_B_D3
15 16 RD18
[7] DDR_B_CLK#1 DDR_B_D6 17 VSS8 DQ6 18 20mil 2_0402_1%
1
19 DQ7 VSS9 20 DDR_B_D2 2 1
DDR_B_CKE0 DDR_B_D7 VSS10 DQ2 [7] +0.6V_B_VREFDQ
21 22
[7] DDR_B_CKE0 DDR_B_CKE1 DQ3 VSS11 DDR_B_D11
23 24
[7] DDR_B_CKE1 DDR_B_CS#0 DDR_B_D9 VSS12 DQ12
25 26 1
[7] DDR_B_CS#0 DDR_B_CS#1 DQ13 VSS13 DDR_B_D8
27 28
[7] DDR_B_CS#1 DDR_B_D13 VSS14 DQ8
29 30 CD8
31 DQ9 VSS15 32 DDR_B_DQS#1 0.022U_0402_16V7K
SOC_SMBDATA 33 VSS16 DQS1_c 34 DDR_B_DQS1 2
[8] SOC_SMBDATA SOC_SMBCLK DM1_n/DBI_n DQS1_t
35 36
[8] SOC_SMBCLK DDR_B_D10 VSS17 VSS18 DDR_B_D15
2
37 38
39 DQ15 DQ14 40 RD19 RD20
DDR_B_ODT0 DDR_B_D14 41 VSS19 VSS20 42 DDR_B_D12
[7] DDR_B_ODT0 24.9_0402_1% 1K_0402_1%
DDR_B_ODT1 43 DQ10 DQ11 44
[7] DDR_B_ODT1 DDR_B_D32 VSS21 VSS22 DDR_B_D37
45 46
1
47 DQ21 DQ20 48
51 DQ17 DQ16 52
Note: DDR_B_DQS#4 VSS25 VSS26
Layout Note: 53 54
Check voltage tolerance of DDR_B_DQS4 55 DQS2_c DM2_n/DBI2_n 56
Place near JDIMM1 VREF_DQ at the DIMM socket 57 DQS2_t VSS27 58 DDR_B_D35
DDR_B_D39 59 VSS28 DQ22 60
61 DQ23 VSS29 62 DDR_B_D34
DDR_B_D38 63 VSS30 DQ18 64
65 DQ19 VSS31 66 DDR_B_D40
DDR_B_D45 67 VSS32 DQ28 68
+1.2V 69 DQ29 VSS33 70 DDR_B_D41
DDR_B_D44 71 VSS34 DQ24 72
73 DQ25 VSS35 74 DDR_B_DQS#5
75 VSS36 DQS3_c 76 DDR_B_DQS5
77 DM3_n/DBI3_n DQS3_t 78
DDR_B_D42 VSS37 VSS38 DDR_B_D46
SE00000UC00
1U_0201_6.3V6M
SE00000UC00
1U_0201_6.3V6M
SE00000UC00
1U_0201_6.3V6M
SE00000UC00
1U_0201_6.3V6M
SE00000UC00
1U_0201_6.3V6M
SE00000UC00
1U_0201_6.3V6M
SE00000UC00
1U_0201_6.3V6M
SE00000UC00
1U_0201_6.3V6M
79 80
DQ30 DQ31
1
81 82
DDR_B_D43 VSS39 VSS40 DDR_B_D47
CD9
CD10
CD11
CD12
CD13
CD14
CD15
CD16
83 84
85 DQ26 DQ27 86
2
87 VSS41 VSS42 88
89 CB5/NC CB4/NC 90
91 VSS43 VSS44 92
@ @ 93 CB1/NC CB0/NC 94
95 VSS45 VSS46 96
97 DQS8_c DM8_n/DBI_n/NC 98
4 as near side of the DIMM close to VDD pins DQS8_t VSS47
99 100
101 VSS48 CB6/NC 102
2 +1.2V 103 CB2/NC VSS49 104 2
105 VSS50 CB7/NC 106
107 CB3/NC VSS51 108 DDR_DRAMRST#_R
DDR_B_CKE0 VSS52 RESET_n DDR_B_CKE1
@
CD18 10U_0402_6.3V6M
CD19 10U_0402_6.3V6M
CD20 10U_0402_6.3V6M
CD21 10U_0402_6.3V6M
CD22 10U_0402_6.3V6M
@ SE00000UD00
CD23 10U_0402_6.3V6M
CD24 10U_0402_6.3V6M
CD25 10U_0402_6.3V6M
@ 109 110 1
111 CKE0 CKE1 112 CD17
DDR_B_BG1 VDD1 VDD2
SE00000UD00
SE00000UD00
SE00000UD00
SE00000UD00
SE00000UD00
SE00000UD00
SE00000UD00
113 114 100P_0402_50V8J

DDR_B_BG0 BG1 ACT_n DDR_B_ACT# [7]
1 1 1 1 1 1 1 1 115 116 ESD@
BG0 ALERT_n DDR_B_ALERT# [7] 2
117 118
DDR_B_MA12 119 VDD3 VDD4 120 DDR_B_MA11
DDR_B_MA9 121 A12 A11 122 DDR_B_MA7
2 2 2 2 2 2 2 2 123 A9 A7 124
DDR_B_MA8 125 VDD5 VDD6 126 DDR_B_MA5
DDR_B_MA6 127 A8 A5 128 DDR_B_MA4
129 A6 A4 130
@ DDR_B_MA3 131 VDD7 VDD8 132 DDR_B_MA2
DDR_B_MA1 133 A3 A2 134
135 A1 EVENT_n/NF 136 +1.2V
DDR_B_CLK0 137 VDD9 VDD10 138 DDR_B_CLK1
DDR_B_CLK#0 139 CK0_t CK1_t/NF 140 DDR_B_CLK#1
141 CK0_c CK1_c/NF 142
143 VDD11 VDD12 144 DDR_B_MA0
[7] DDR_B_PARITY DDR_B_BA1 PARITY A0 DDR_B_MA10
145 146
147 BA1 A10/AP 148
DDR_B_CS#0 VDD13 VDD14 DDR_B_BA0
1
149 150
DDR_B_MA14 151 CS0_n BA0 152 DDR_B_MA16 RD23
153 WE_n/A14 RAS_n/A16 154 +DIMM_VREF_DQ
VDD15 VDD16 470_0402_1%
DDR_B_ODT0 155 156 DDR_B_MA15
DDR_B_CS#1 157 ODT0 CAS_n/A15 158 DDR_B_MA13
2
159 CS1_n A13 160
DDR_B_ODT1 161 VDD17 VDD18 162 DDR_DRAMRST#_R RD24 1 @ 2 0_0402_5%
ODT1 C0/CS2_n/NC DDR_DRAMRST# [7,18]
163 164
165 VDD19 VREFCA 166 DDR_B_SA2
Place these caps on the VTT plane close to DIMM C1, CS3_n,NC SA2
167 168
+0.6VS 171 DQ37 DQ36 172
175 DQ33 DQ32 176
DDR_B_DQS#2 177 VSS57 VSS58 178
DDR_B_DQS2 DQS4_c DM4_n/DBI4_n
@
179 180
DQS4_t VSS59 DDR_B_D21
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 181 182
VSS60 DQ39
1
DDR_B_D19
CD30 SE00000UD00
CD31 SE00000UD00
183 184
DQ38 VSS61 DDR_B_D20
CD26
CD27
CD28 @
CD29 @
185 186
J
D
I
M
M
1
A
D
D
R
E
S
S
P
L
A
C
E
C
L
O
S
E
T
O
D
I
M
M
DDR_B_D18 187 VSS62 DQ35 188
2
( )
2 2 189 DQ34 VSS63 190 DDR_B_D29
DDR_B_D24 191 VSS64 DQ45 192
3 3
193 DQ44 VSS65 194 DDR_B_D25
DDR_B_D28 195 VSS66 DQ41 196
197 DQ40 VSS67 198 DDR_B_DQS#3
199 VSS68 DQS5_c 200 DDR_B_DQS3
201 DM5_n/DBI5_n DQS5_t 202 +3VS
205 DQ46 DQ47 206
209 DQ42 DQ43 210
213 DQ52 DQ53 214
217 DQ49 DQ48 218
+3VS DDR_B_DQS#6 219 VSS77 VSS78 220
DDR_B_DQS6 221 DQS6_c DM6_n/DBI6_n 222
223 DQS6_t VSS79 224 DDR_B_D50 DDR_B_SA2 DDR_B_SA1 DDR_B_SA0
DDR_B_D55 225 VSS80 DQ54 226
227 DQ55 VSS81 228 DDR_B_D51
DDR_B_D54 229 VSS82 DQ50 230
DQ51 VSS83 DDR_B_D56
1
+3VS 231 232
DDR_B_D60 233 VSS84 DQ60 234 RD27 RD28
235 DQ61 VSS85 236 DDR_B_D61 0_0402_5% @ 0_0402_5%
2.2U_0402_6.3V6M
DDR_B_D57 237 VSS86 DQ57 238 @

1 1 DQ56 VSS87 DDR_B_DQS#7
CD32 239 240
2
VSS88 DQS7_c DDR_B_DQS7
2
C1
0.1U_0201_10V6K +2.5V 241 242 +0.6VS

243 DM7_n/DBI7_n DQS7_t 244
2 2 DDR_B_D62 245 VSS89 VSS90 246 DDR_B_D59
247 DQ62 DQ63 248
251 DQ58 DQ59 252
SOC_SMBCLK 253 VSS93 VSS94 254 SOC_SMBDATA
close to DIMM SCL SDA DDR_B_SA0
+3VS 255 256
257 VDDSPD SA0 258
259 VPP1 VTT 260 DDR_B_SA1
261 VPP2 SA1 262
GND1 GND2
+2.5V
DEREN_40-42271-26001RHF
SP07001CY00
ME@
4 4
1
1
@ C2 CD33
10U_0402_6.3V6M 1U_0201_6.3V6M
SE00000UD00 SE00000UC00
2

DDR4_DIMM
A B C D E
5 4 3 2 1
[7,18] DDR_A_MA[0..16]
D D
+1.2V
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
1
1
+0.6VS
CU1
CU2
CU3
CU4
CU5
CU6
CU7
CD34
CD35
CD36
CD37
CD38
CD39
CD40
CD41
CD42
2
2
@ @
MD@ MD@ MD@ MD@ MD@ MD@ MD@ MD@ MD@ MD@ @ MD@ MD@ @
DDR_A_MA9 RD29 1 2 36_0201_5%
DDR_A_MA2 RD30 1 2 36_0201_5%
DDR_A_MA4 RD31 1 MD@ 2 36_0201_5%
DDR_A_BA1 RD32 1 MD@ 2 36_0201_5%
[7,18] DDR_A_BA1
4 as near each on board RAM device as possible MD@
MD@
DDR_A_MA10 RD33 1 2 36_0201_5%

DDR_A_MA3 RD34 1 2 36_0201_5%
DDR_A_MA12
CD43 10U_0402_6.3V6M
CD44 10U_0402_6.3V6M
CD45 10U_0402_6.3V6M
CD46 10U_0402_6.3V6M
CD47 10U_0402_6.3V6M
RD35 1 MD@ 2 36_0201_5%
DDR_A_BG0 RD36 1 MD@ 2 36_0201_5%
[7,18] DDR_A_BG0
SE00000UD00
SE00000UD00
SE00000UD00
SE00000UD00
SE00000UD00
MD@
1 1 1 1 1 MD@
2 2 2 2 2
DDR_A_MA16 RD37 1 2 36_0201_5%

DDR_A_ACT# RD38 1 2 36_0201_5%
[7,18] DDR_A_ACT# DDR_A_CS#0
MD@ MD@ MD@ @ MD@ RD39 1 MD@ 2 36_0201_5%
[7,18] DDR_A_CS#0 DDR_A_MA15 RD40 1 MD@ 2 36_0201_5%
MD@
MD@
C C
DDR_A_CKE0 RD41 1 2 36_0201_5%
[7,18] DDR_A_CKE0 DDR_A_ODT0
[7,18] DDR_A_ODT0 RD42 1 2 36_0201_5%
DDR_A_MA14 RD43 1 MD@ 2 36_0201_5%
MD@
MD@
DDR_A_MA13 RD44 1 2 36_0201_5%

DDR_A_MA8 RD45 1 2 36_0201_5%
DDR_A_PARITY RD46 1 MD@ 2 36_0201_5%
[7,18] DDR_A_PARITY DDR_A_MA11 RD47 1 MD@ 2 36_0201_5%
+2.5V +0.6VS MD@
MD@
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
SE00000UC00
1
1
CU9
CU10
CU11
CU12
CU13
CU14
CU15
CU16
CU17
CU18
CU19
CU20
CU21
CU22
CU23
CU24
@
DDR_A_MA1 RD48 1 2 36_0201_5%
2
2
@ @ DDR_A_BA0 RD49 1 2 36_0201_5%
[7,18] DDR_A_BA0 DDR_A_MA7
@ @ RD50 1 MD@ 2 36_0201_5%
MD@ MD@ MD@ MD@ MD@ MD@ @ MD@ MD@ MD@ MD@ MD@
MD@
2 as near each on board RAM device as possible
2 as near each on board RAM device as possible
DDR_A_MA5 RD51 1 2 36_0201_5%

DDR_A_MA6 RD52 1 2 36_0201_5%
DDR_A_MA0 RD53 1 MD@ 2 36_0201_5%
MD@
MD@
CD48 10U_0402_6.3V6M
CD49 10U_0402_6.3V6M
CD50 10U_0402_6.3V6M
CD51 10U_0402_6.3V6M
CD52 10U_0402_6.3V6M
CD53 10U_0402_6.3V6M
CD54 10U_0402_6.3V6M
@ @ @ @
SE00000UD00
SE00000UD00
SE00000UD00
SE00000UD00
SE00000UD00
SE00000UD00
SE00000UD00
DDR_A_BG1_R RD54 1 DDP@ 2 36_0201_5%

1 1 1 1 1 1 1 [18] DDR_A_BG1_R
B 2 2 2 2 2 2 2 B
MD@ MD@ MD@
A A
LA-H081P
WWW.AliSaler.Com
DDR4 MISC
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D562P
5 4 3 2 1
1 2 3 4 5
UV1A
COMMON
1/14 PCI_EXPRESS
Place Place near BGA +1.0VS_DGPU

AB6 PEX_WAKE#
under GPU
1.0V
PEX_IOVDD AA22
PLT_RST_VGA_MON# PLT_RST_VGA#
1U_0402_6.3V6K
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
22U_0603_6.3V6M
RV1 1 2 0_0402_5% AC7 PEX_RST# PEX_IOVDD AB23
CV1
CV2
CV12
CV3
10U_0402_6.3V6M
CV4
10U_0402_6.3V6M
CV5
N17S@ PEX_IOVDD AC24 1 1 1 1 1 1 1
CLKREQ_PEG#0_R
CV13 N17S@
AC6 PEX_CLKREQ# PEX_IOVDD AD25
PEX_IOVDD AE26
AE8 PEX_REFCLK PEX_IOVDD AE27
[10] CLK_PEG_P0 2 2 2 2 2 2 2
DIS@
N17S@
DIS@
N17S@
N17S@
N17S@
PCIE CLK AD8 PEX_REFCLK#
[10] CLK_PEG_N0
PCIE_CRX_DTX_P5 CV14 DIS@ 1 2 0.22U_0402_6.3V6K PCIE_CRX_C_DTX_P5 AC9
[12] PCIE_CRX_DTX_P5 PEX_TX0
PCIE_CRX_DTX_N5 CV6 DIS@ 1 2 0.22U_0402_6.3V6K PCIE_CRX_C_DTX_N5 AB9
A [12] PCIE_CRX_DTX_N5 PEX_TX0# A
PCIE_CTX_C_DRX_P5 AG6
[12] PCIE_CTX_C_DRX_P5 PEX_RX0
PCIE_CTX_C_DRX_N5 AG7 PEX_IOVDDQ AA10
[12] PCIE_CTX_C_DRX_N5 PEX_RX0#
PEX_IOVDDQ AA12 Place Place near BGA +1.0VS_DGPU
PCIE_CRX_DTX_P6 CV7 DIS@ 1 2 0.22U_0402_6.3V6K PCIE_CRX_C_DTX_P6 AB10 PEX_IOVDDQ AA13 RV447
[12] PCIE_CRX_DTX_P6 PCIE_CRX_DTX_N6 CV8 DIS@ 1 2 0.22U_0402_6.3V6K PCIE_CRX_C_DTX_N6 AC10
PEX_TX1
AA16
under GPU N16S@
[12] PCIE_CRX_DTX_N6 PEX_TX1# PEX_IOVDDQ 1.0V
PEX_IOVDDQ AA18 1 2
PCIE_CTX_C_DRX_P6
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
22U_0603_6.3V6M
AF7 PEX_RX1 PEX_IOVDDQ AA19
[12] PCIE_CTX_C_DRX_P6 PCIE_CTX_C_DRX_N6
CV15
CV16
CV733
CV734
CV17
CV18
10U_0402_6.3V6M
CV19
10U_0402_6.3V6M
CV20
AE7 PEX_RX1# PEX_IOVDDQ AA20 1 1 1 1 1 1 1 1 1 0_0805_5%
[12] PCIE_CTX_C_DRX_N6
CV10 DIS@
PEX_IOVDDQ AA21
PCIE_CRX_DTX_P7 CV9 DIS@ 1 2 0.22U_0402_6.3V6K PCIE_CRX_C_DTX_P7 AD11 AB22
PCIE X4 Bus [12] PCIE_CRX_DTX_P7 PCIE_CRX_DTX_N7 PCIE_CRX_C_DTX_N7
PEX_TX2 PEX_IOVDDQ
+1.8VGS_+3VGS
CV11 DIS@ 1 2 0.22U_0402_6.3V6K AC11 PEX_TX2# PEX_IOVDDQ AC23
[12] PCIE_CRX_DTX_N7 2 2 2 2 2 2 2 2 2
DIS@
N17S@
N17S@
N17S@
DIS@
N17S@
N17S@
DIS@
PEX_IOVDDQ AD24
PCIE_CTX_C_DRX_P7 AE9 PEX_IOVDDQ AE25 RV458
PCIE_CTX_C_DRX_N7 AF9 PEX_IOVDDQ AF26 N17S@
PEX_IOVDDQ AF27 1 2
PCIE_CRX_DTX_P8 CV21 DIS@ 1 2 0.22U_0402_6.3V6K PCIE_CRX_C_DTX_P8 AC12
[12] PCIE_CRX_DTX_P8 PEX_TX3
PCIE_CRX_DTX_N8 CV22 DIS@ 1 2 0.22U_0402_6.3V6K PCIE_CRX_C_DTX_N8 AB12 0_0805_5%
[12] PCIE_CRX_DTX_N8 PEX_TX3#
PCIE_CTX_C_DRX_P8 AG9
PCIE_CTX_C_DRX_N8 AG10
AB13
Near UV1 AC13
PEX_TX4
+1.8VGS_+3VGS
PEX_TX4#
RV445
AF10 PEX_RX4 N17S@
AE10 PEX_RX4# 1 2
AD14 NC FOR GF119

PEX_TX5 0_0805_5%
AC14 PEX_PLL_HVDD AA8 +1.8VGS_+3VGS_AON
PEX_TX5#
PEX_PLL_HVDD AA9
NC FOR GM108
AE12 PEX_RX5 RV446
AF12 PEX_RX5# Place near BGA N16S@
PEX_SVDD_3V3 AB8 1 2 1 2
AC15 PEX_TX6 0_0402_5%
B B
0.1U_0201_10V6K
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
AB15 PEX_TX6# RV460 0_0805_5%
CV23
CV24
CV25
N16S@ 1 1 1
AG12 PEX_RX6
AG13 PEX_RX6#
2 2 2
DIS@
DIS@
DIS@
AB16 PEX_TX7
AC16 PEX_TX7#
AF13 PEX_RX7
Reset Control AE13 PEX_RX7#
+1.8VGS_+3VGS_AON
AD17 PEX_TX8
UV6 AC17 PEX_TX8#
5
MC74VHC1G08DFT2G_SC70-5
AE15 PEX_RX8
VCC
1 AF15 PEX_RX8#
[10,30,31,33,36] PCI_RST# IN1
(From PCH) 4
OUT PLT_RST_VGA_MON# [24] VDD_SENSE_GPU
2 AC18 VDD_SENSE F2
GND
[11] DGPU_HOLD_RST# IN2 PEX_TX9 VDD_SENSE_GPU [50]

AB18 PEX_TX9# To POWER
DIS@ AG15 F1 GND_SENSE_GPU
PEX_RX9 GND_SENSE GND_SENSE_GPU [50] trace width: 16mils
3
AG16 PEX_RX9# differential voltage sensing.

+1.8VGS_+3VGS_AON AB19
differential signal routing.
PEX_TX10
AC19 PEX_TX10#
UV7
5
MC74VHC1G08DFT2G_SC70-5 AF16 PEX_RX10

AE16 PEX_RX10#
VCC
NC FOR GF117/GK208/GM108
1
IN1 4 PLT_RST_VGA# AD20
OUT PEX_TX11
2 AC20
GND
[24] PLT_RST_VGA_HOLD# IN2 PEX_TX11#

1
(From GPU)
RV2 AE18 PEX_RX11
N16S@ 10K_0201_5% AF18 PEX_RX11#
3
DIS@
C AC21 PEX_TX12 C
2
AB21 PEX_TX12#
AG18 AF22 PEX_PLL_CLK_OUT RV3 2 @ 1200_0402_1%

PEX_RX12 PEX_TSTCLK_OUT
AG19 AE22 PEX_PLL_CLK_OUT#
PEX_RX12# PEX_TSTCLK_OUT#
AD23
CLK_REQ +1.8VGS_+3VGS AE23
PEX_TX13
PEX_TX13# RV4 +1.0VS_DGPU
1.0V N16S@
AF19 AA14 PEX_PLLVDD_GPU 1 2
PEX_RX13 PEX_PLLVDD
AE19 PEX_RX13# PEX_PLLVDD AA15
1
0.1U_0201_10V6K
1U_0402_6.3V6K
4.7U_0402_6.3V6M
Place near BALL 0_0805_5%
CV27
CV28
RV5 AF24 PEX_TX14 1 1 1
CV26 N16S@
10K_0201_5% AE24 PEX_TX14#
DIS@ Place near BGA
AE21 PEX_RX14
2
2 2 2
N16S@
N16S@
AF21 PEX_RX14#
RV6 1 @ 2 0_0402_5% AD9 GPU_TESTMODE
[25,26,50] DGPU_PWROK TESTMODE GPU_TESTMODE [24]
AG24 PEX_TX15
AG25 PEX_TX15#
+1.8VGS_+3VGS_AON
1U_0402_6.3V6K
CV29 @
1
AG21 PEX_RX15
AG22 PEX_RX15#
1
RV7 2
10K_0201_5% QV150 AF25 PEX_TERMP
PEX_TERMP
DIS@ DIS@
2
1
G
BSS138W-7-F_SOT323-3
2
N16S-GT-S-A2_BGA595 RV8
CLKREQ_PEG#0_R 3 1 @
CLKREQ_PEG#0 [10] 2.49K_0402_1%
S
DIS@
(To SOC)
2
1
VGS(Max) : 1.5 V RV9

10K_0201_5%
D @ D
2
RV10 1 @ 2 0_0402_5%

NV(1/5)-PCIE
1 2 3 4 5
1 2 3 4 5
UV1K
DAC_A
COMMON
UV1G
IFPA/B
3/14 DACA
GF117/GM108 GF117 GM108/GK208

UV1H
COMMON IFPC
COMMON 5/14 IFPC
4/14 IFPAB W5 DACA_VDD NC NC I2CA_SCL B7 IFPC
I2CA_SDA A7
NC
AE2 DACA_VREF T6 IFPC_RSET GF119/GK208
TSEN_VREF
IFPA_TXC# AC4 Note:
IFPA_TXC AC3 AF2 AE3 IFPC/D/E/F interface are XVDDs pin for N17S GPU,
DACA_RSET NC NC DACA_HSYNC and connect them to NVVDD power for improving DVI/HDMI DP
DACA_VSYNC AE4
NC NVVDD power rail routing
AA6 M7 N5
NC FOR GF117/GM108
IFPAB_RSET IFPC_PLLVDD I2CW_SDA IFPC_AUX#
IFPA_TXD0# Y3 N7 IFPC_PLLVDD I2CW_SCL IFPC_AUX N4
Y4 AG3
NC FOR GF117/GM108
A IFPA_TXD0 DACA_RED A
NC
V7 IFPAB_PLLVDD DACA_GREEN AF4 IFPC_L3# N3
NC TXC
IFPA_TXD1# AA2 IFPC_L3 N2
TXC
W7 IFPAB_PLLVDD IFPA_TXD1 AA3 DACA_BLUE AF3
NC
NC FOR GF117/GM108
IFPC_L2# R3
TXD0
GM108 IFPC_L2 R2
GK208 TXD0
IFPA_TXD2# AA1 GF117
IFPA_TXD2 AB1 TXD1 IFPC_L1# R1
NC FOR GF117/GM108 N16S-GT-S-A2_BGA595 TXD1 IFPC_L1 T1
@
IFPA_TXD3# AA5 IFPC_L0# T3
TXD2
IFPA_TXD3 AA4 IFPC_L0 T2
TXD2
IFPB_TXC# AB4 GF117

IFPB_TXC AB5 P6 IFPC_IOVDD GPIO15 C3
NC
W6 IFPA_IOVDD IFPB_TXD4# AB2

IFPB_TXD4 AB3 N16S-GT-S-A2_BGA595
Y6 IFPB_IOVDD @
IFPB_TXD5#
IFPB_TXD5
AD2
AD3
UV1I
COMMON IFPD
6/14 IFPD
IFPB_TXD6# AD1
AE1 U6 GF119/GK208
IFPB_TXD6 IFPD_RSET
DVI/HDMI DP
IFPB_TXD7# AD5
IFPB_TXD7 AD4 T7 IFPD_PLLVDD I2CX_SDA IFPD_AUX# P4
P3
NC FOR GF117/GM108
I2CX_SCL IFPD_AUX
R7 IFPD_PLLVDD
NC FOR GF117/GM108
B +1.8VGS_+3VGS R5 B
GF117
RV448 IFPD_L3#
TXC
N17S@ IFPD_L3 R4
TXC
GPIO14 B3 1 2
NC
IFPAB 0_0805_5%
TXD0
IFPD_L2#
IFPD_L2
T5
T4
TXD0
N16S-GT-S-A2_BGA595
@ TXD1 IFPD_L1# U4
+1.0VS_DGPU IFPD TXD1 IFPD_L1 U3
N16S@ IFPD_L0# V4
GPU_PLLVDD TXD2
LV1 1 2 HCB1005KF-300T25_2P IFPD_L0 V3
TXD2
22U_0603_6.3V6M
0.1U_0201_10V K X5R
Place near balls
GF117
1 1
CV30 N16S@
CV31 DIS@
R6 IFPD_IOVDD GPIO17 D4
NC
UV1J
COMMON IFPE/F 2 2
7/14 IFPEF
GF119/GK208
N16S-GT-S-A2_BGA595
DVI-DL DVI-SL/HDMI DP @
I2CY_SDA I2CY_SDA IFPE_AUX# J3
I2CY_SCL I2CY_SCL IFPE_AUX J2
J7 IFPEF_PLLVDD
IFPE_L3# J1
TXC TXC K1
IFPE_L3
NC FOR GF117/GM108
TXC TXC
K7 IFPEF_PLLVDD
NC FOR GF117/GK208/GM108
IFPE_L2# K3
TXD0 TXD0 K2
IFPE_L2
TXD0 TXD0 PLLVDD RV457
K6 IFPEF_RSET IFPE_L1# M3 N17S@
TXD1 TXD1
IFPE_L1 M2 1 2
C TXD1 TXD1 C
TXD2
TXD2
TXD2
TXD2
IFPE_L0#
IFPE_L0
M1
N1
0_0805_5% UV1M
COMMON
9/14 XTAL_PLL
X'TAL
IFPE NC FOR GK208 L6 PLLVDD
+1.0VS_DGPU RV456 Place near BGA Place near balls M6 +1.8VGS_+3VGS_AON
SP_PLLVDD
N16S@ RV11 @
C2 1 2 VID_PLLVDD N6 10K_0402_1%
HPD_E HPD_E GPIO18 VID_PLLVDD NC XTAL_OUTBUFF 1 2
22U_0603_6.3V6M
22U_0603_6.3V6M
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
0_0805_5% GF117/GM108
NC FOR GF117 GF119/GK208
10U_0402_6.3V6M
CV34
1 1 1 1 1
CV32 N16S@
CV33 N16S@
CV35 DIS@
CV36 DIS@
RV12 DIS@ RV13 DIS@
H6 IFPE_IOVDD 10K_0402_1% 10K_0402_1%
GF119/GK208 2 1 A10 XTALSSIN XTALOUTBUFF C10 XTAL_OUTBUFF 1 2
J6 2 2 2 N16S@ 2 2
IFPF_IOVDD DVI-DL DVI-SL/HDMI DP
IFPF_AUX# H4 C11 XTALIN XTALOUT B10
I2CZ_SDA
I2CZ_SCL IFPF_AUX H3
N16S-GT-S-A2_BGA595
@
TXC IFPF_L3# J5 90-OHM DIFF Impedance for XTALIN & XTALOUT.
2
J4
NC FOR GF117/GM108
TXC IFPF_L3
YV1 RV14 DIS@
IFPF_L2# K5 27MHZ_10PF_XRCGB27M000F2P18R0 1.5K_0402_1%
TXD3 TXD0
IFPF_L2 K4 SJ10000UI00
TXD3 TXD0
1
TXD4 TXD1 IFPF_L1# L4 1 3
1 3
IFPF TXD4 TXD1 IFPF_L1 L3
NC NC
1 1
IFPF_L0# M5 DIS@
TXD5 TXD2 2 4
IFPF_L0 M4 CV37 DIS@ CV38 DIS@
TXD5 TXD2
18P_0402_50V8J 18P_0402_50V8J
2 2
NC FOR GK208
D D
GPIO19 F7
HPD_F
NC FOR GF117
N16S-GT-S-A2_BGA595
@
NV(2/5)-IFP_ABCDEF_DAC_XTAL
WWW.AliSaler.Com
1 2 3 4 5
1 2 3 4 5
UV1D UV1F
+1.35VS_VRAM COMMON COMMON
Place under GPU
GPU_Decoupling
12/14 FBVDDQ 13/14 GND
A2 GND GND M13
B26 FBVDDQ AB17 GND GND M15
C25 FBVDDQ AB20 GND GND M17
CAPs @ Power
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
E23 FBVDDQ AB24 GND GND N10
CV43
CV39
1 1 1 1 1 1 1 1 1 1 1 1 E26 FBVDDQ AC2 GND GND N12
CV723
CV724
CV721
CV722
CV719
CV720
CV40
CV41
CV42
CV44
A
F14 FBVDDQ AC22 GND GND N14 A
2 2 2 2 2 2 2 2 2 2 2 2
F21
G13
FBVDDQ
FBVDDQ Page AC26
AC5
GND
GND
GND
GND
N16
N18
N17S@
N17S@
N17S@
N17S@
N17S@
N17S@
N16S@
N16S@
DIS@
DIS@
N16S@
N16S@
G14 FBVDDQ AC8 GND GND P11
G15 FBVDDQ AD12 GND GND P13
G16 FBVDDQ AD13 GND GND P15
G18 FBVDDQ A26 GND GND P17
G19 +VGA_CORE UV1E AD15 P2
FBVDDQ GND GND
G20 FBVDDQ COMMON AD16 GND GND P23
G21 FBVDDQ Voltage by GPU SKU 11/14 NVVDD AD18 GND GND P26
L22 FBVDDQ K10 VDD AD19 GND GND P5
10U_0402_6.3V6M
CV726
10U_0402_6.3V6M
CV725
1 1 L24 FBVDDQ K12 VDD AD21 GND GND R10
L26 FBVDDQ K14 VDD AD22 GND GND R12
M21 FBVDDQ K16 VDD AE11 GND GND R14
N21 FBVDDQ K18 VDD AE14 GND GND R16
2 2
N17S@
N17S@
R21 FBVDDQ L11 VDD AE17 GND GND R18
T21 FBVDDQ L13 VDD AE20 GND GND T11
V21 FBVDDQ L15 VDD AB11 GND GND T13
W21 FBVDDQ L17 VDD AF1 GND GND T15
M10 VDD AF11 GND GND T17
M12 VDD AF14 GND GND U10
GF117 M14 AF17 U12
GF119
VDD GND GND
GK208
H24 FBVDDQ_AON N11 VDD AF5 GND GND U18
FBVDDQ
H26 FBVDDQ_AON N13 VDD AF8 GND GND U2
FBVDDQ
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
J21 FBVDDQ_AON N15 VDD AG2 GND GND U23
FBVDDQ
10U_0402_6.3V6M
CV46
1 1 1 1 K21 FBVDDQ_AON N17 VDD AG26 GND GND U26
FBVDDQ
CV728
CV727
CV45
P10 VDD AB14 GND GND U5
P12 VDD B1 GND GND V11
2 2 2 2
N17S@
N17S@
DIS@
DIS@
R11 VDD B20 GND GND Y2
B R17 B5 Y5 B
VDD GND GND
Place near GPU T10 VDD B8 GND
T12 VDD E11 GND
CIZ00 22uF x1 change to 10uF x2 T14 VDD E14 GND
T16 VDD E17 GND
T18 VDD E2 GND
U11 VDD E20 GND
U13 VDD E22 GND
U15 VDD E25 GND
Near Ball +1.35VS_VRAM U17 E5
VDD GND
V10 VDD E8 GND
V12 VDD H2 GND
FB_CAL_PD_VDDQ D22 RV15 1 DIS@ 2 40.2_0402_1% V14 VDD H23 GND
V16 VDD H25 GND
V18 VDD H5 GND
FB_CAL_PU_GND C24 RV16 2 DIS@ 1 40.2_0402_1% K11 GND
K13 GND
N16S-GT-S-A2_BGA595 K15 GND
FB_CALTERM_GND B25 RV17 2 DIS@ 1 60.4_0402_1% @ K17 GND
L10 GND
L12 GND
N16S-GT-S-A2_BGA595 L14 GND
@ L16 GND
L18 GND
L2 GND
L23 GND
L25 GND
L5 GND GND AA7
M11 GND GND AB7
N16S-GT-S-A2_BGA595
@
UV1C
C COMMON C
14/14 XVDD/VDD33
+1.8VGS_+3VGS
Under GPU Near GPU
AD10 NC VDD33 G8
AD7 NC GM108 VDD33 G9
+1.8VGS_+3VGS PLLVDD
0.1U_0201_10V6K
0.1U_0201_10V6K
1U_0402_6.3V6K
4.7U_0402_6.3V6M
VDD33 G10
3V3_AON
Near GPU Under GPU VDD33 G12 1 1 1 1
3V3_AON
CV47
CV48
CV49
CV50 DIS@
F11
1 2 F11 3V3AUX_NC
22U_0603_6.3V6M
4.7U_0402_6.3V6M
LV10 N17S@
2 2 2 2
0.1U_0201_10V6K
DIS@
DIS@
DIS@
HCB1005KF-300T25_2P 1 1 V5 FERMI_RSVD1_NC
CV396 N17S@
CV395 N17S@
1 V6 FERMI_RSVD2_NC
CV394 N17S@
+1.8VGS_+3VGS_AON
2 2
2 Under GPU Near GPU
CONFIGURABLE
POWER CHANNELS
0.1U_0201_10V6K
0.1U_0201_10V6K
1U_0402_6.3V6K
4.7U_0402_6.3V6M
* nc on substrate
CV740
1 1 1 1
CV51
CV52
CV53 DIS@
G1 XPWR_G1
G2 XPWR_G2
G3 XPWR_G3
2 2 2 2
DIS@
G4 XPWR_G4
N17S@
DIS@
G5 XPWR_G5
G6 XPWR_G6
G7 XPWR_G7
V1 XPWR_V1
V2 XPWR_V2
** XPWR pins are configurable.
These pins are not connected on the substrate.
D W1 XPWR_W1 Therefore, XPWR pins can be assigned as needed, D
W2 XPWR_W2
W3 XPWR_W3 to improve Top layer routing, power delivery.
W4 XPWR_W4
N16S-GT-S-A2_BGA595
@

NV(3/5)-POWER
1 2 3 4 5
1 2 3 4 5
+1.8VGS_+3VGS_AON
UV1N
COMMON
8/14 MISC1
GPIO +1.8VGS_+3VGS_AON
PLT_RST_VGA_HOLD#
DGPU_MAIN_EN
RV18
RV20
1
1
2 10K_0201_5% DIS@
2 10K_0201_5% DIS@
I2CS_SCL
D9 RV19 1 DIS@ 2 2.2K_0402_5% PSI RV22 1 2 10K_0201_5% DIS@
I2CS_SCL
I2CS_SDA D8
I2CS_SDA
RV21 1 DIS@ 2 2.2K_0402_5% I2CS SMBUS: 0x96 VGA_AC_DET
RV23 1 2 10K_0201_5% DIS@
I2CC_SCL A9 and 0x9E(Default)

I2CC_SDA B9
GF117 GPU_EVENT#_D
E12 THERMDN RV26 1 GC6@ 2 10K_0201_5%
I2CB_SCL C9
NC GPIO8_OVERT#
F12 THERMDP NC I2CB_SDA C8 RV27 1 DIS@ 2 100K_0201_5%
GPU_JTAG_TCK
AE5 JTAG_TCK
T231 TP@ GPU_JTAG_TMS
AD6 JTAG_TMS
T232 TP@ GPU_JTAG_TDI GPIO9_ALERT#
T242 TP@
AE6 JTAG_TDI RV28 1 2 10K_0201_5% DIS@
GPU_JTAG_TDO
AF6 JTAG_TDO
T243 TP@ GPU_JTAG_TRST# GPU_VID0 GPU_JTAG_TRST#
AG4 JTAG_TRST# GPIO0 C6 To DGPU VR RV30 1 2 10K_0201_5% DIS@
GPIO0_GC6_FB_EN GPU_VID0 [50]
GPIO1 B2 RV29 1 2 0_0402_5%
GPU_EVENT#_D GC6_FB_EN [11,25]
GPIO2
D6 DV1 DIS@ 2 1 RB751V-40_SOD323-2
GPU_EVENT# [9]
GPIO3 C7
DGPU_MAIN_EN
GPIO4
F9
A3 DGPU_MAIN_EN [26]
GPIO5
GPIO6
A4 PSI
GK208 PSI [50]
GM108 GPIO7
B6
GPIO8_OVERT#
OVERT GPIO8 A6
GPIO9_ALERT#
GPIO9
F8 DV2 DIS@ 2 1 RB751V-40_SOD323-2
MEM_VREF GPU_PROHOT# [33,42]
A GPIO10
C5 A
E7 MEM_VREF [27]
GPIO11 VGA_AC_DET
GPIO12
D7
GPIO13 B4
GM108 GK208 GF117 GF119 GPU_BUFRST

RV36 1 @ 2 10K_0201_5%
GPIO16 D5 RV2466 1 2 0_0402_5%
GPIO16 GPIO16 NC PLT_RST_VGA_MON# [21]
GPIO20 E6 N16S@ RV37 1 DIS@ 2 10K_0201_5%
GPIO20 GPIO20 NC PLT_RST_VGA_HOLD# [21] GPU_TESTMODE
GPIO21
C4
GPIO21 GPIO8 NC PLT_RST_VGA_HOLD# [21] MEM_VREF
RV38 1 DIS@ 2 100K_0201_5%
NC E9 RV2467 1 2 0_0402_5%
GPIO8 NC NC
@
PLT_RST_VGA_MON#
RV39 1 @ 2 10K_0201_5%
GC6_FB_EN
N16S-GT-S-A2_BGA595 RV40 1 GC6@ 2 10K_0201_5%
@
+1.8VGS_+3VGS_AON
UV1L
COMMON
10/14 MISC2
Internal Thermal Sensor
Link to PCH SML1
2
G
PU @ PCH SIDE
E10 VMON_IN0_NC
F10 VMON_IN1_NC ROM_CS# D12
I2CS_SCL
1 6
S
ROM_SI EC_SMB_CK2 [8,33,35]
D
ROM_SI B12
ROM_SO
ROM_SO A12
ROM_SCLK QV147A
STRAP0 D1 STRAP0 ROM_SCLK C12
STRAP1 D2 STRAP1 S TR PJT138KA 2N SOT363-6
5
STRAP2 E4 NC FOR
DIS@
G
STRAP2
STRAP3 E3 STRAP3 GM108
STRAP4 D3 STRAP4 VGS(Max) : 0.8~1.1 V
I2CS_SDA
4 3
S
EC_SMB_DA2 [8,33,35]
D
+1.8VGS_+3VGS_AON STRAP5 C1 STRAP5_NC GPU_BUFRST QV147B
RV49 BUFRST# D11
0_0402_5% S TR PJT138KA 2N SOT363-6
1 @ 2 STRAPREF0 F6 MULTISTRAP_REF0_GND PGOOD D10 DIS@
NC
GF117
GK208 GF117 GF119
1
GM108 GK208
RV58 F4 MULTISTRAP_REF1_GND NC
GM108
40.2K_0402_1%
N16S@ F5 MULTISTRAP_REF2_GND NC
2
N16S-GT-S-A2_BGA595
@
+3VS
B B
2
@
10K_0201_5%
DV3 @
RV60
STRAP
1
RB751V-40_SOD323-2
VGA_AC_DET AC_PRESENT
2 1 10/13 - Strap Pin Modify for MX110/130 (Pop RV81, Un-Pop RV64)
AC_PRESENT [10,33]
NV Suggest
RV61 1 @ 2 0_0402_5%
+1.8VGS_+3VGS +1.8VGS_+3VGS_AON STRAP STRAP0 : PU 49.9K (50K)
STRAP[1:5] : Reserved
+1.8VGS_+3VGS_AON
2
RV473 RV474
0_0402_5% N16S@ 0_0402_5% N17S@
1
1
100K_0402_5%
45.3K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
49.9K_0402_1%
RV444
10K_0402_1%
N16S@
RV384
RV2470
RV389
RV382
RV51
@ @ @ @ @
1
1
14.7K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
N16S@
RV2468
2
RV2469
RV2471
@ @ STRAP0
STRAP1
2
ROM_SI STRAP2
STRAP3
ROM_SO
ROM_SCLK STRAP4
STRAP5
1
1
100K_0402_5%
45.3K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
1
1
4.99K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
RV443
RV385
RV387
RV388
RV390
RV383
@
N16S@
RV65
RV64
RV381
@ @ @ @ @ @
2
2
2
N16S VRAM Res.
N17S-G0/G2 VRAM Strap RAM_CFG STRAP2 STRAP1 STRAP0 NOTE N17S Strap
RV51
RV388 N17_M2G@ RV383
N17_M2G@ N17_M2G@
100K_0402_5%
0x9(LML) M2G 100K_0402_5% RV390
100K_0402_5% ROM_SI ROM_SO ROM_SCLK STRAP3 STRAP4 STRAP5
N17_M2G@
100K_0402_5% RV2471
Strap RV2469 RV2468 N17S@ RV387 RV385 RV443
RV388 RV51 RV384 N17S@ N17S@ N17S@ N17S@ N17S@
S RES 1/16W 100K +-5% 0402
N17_H2G@ N17_H2G@ N17_H2G@ S RES 1/16W 100K +-5% 0402 S RES 1/16W 100K +-5% 0402 S RES 1/16W 100K +-5% 0402 S RES 1/16W 100K +-5% 0402 S RES 1/16W 100K +-5% 0402
0xA(LMH)H2G 100K_0402_5% 100K_0402_5% 100K_0402_5% RV381
RV390 N17S@
C N17_H2G@ S RES 1/16W 100K +-5% 0402 C
100K_0402_5%
N17S-G1 VRAM Strap
RAM_CFG STRAP2 STRAP1 STRAP0
RV388 RV390 RV383

0x00(LLL) S2G @ @ @
0x01(LLH)
0x02(LHL)
D D
0x03(LHH)
RV382 RV390 RV383
0x04(HLL) M2G @ @ @
RV382 RV390 RV384

0x05(HLH) H2G @ @ @
0x06(HHL)
0x07(HHH)
0x08(LLM)

2017/10/27 2019/04/09 Title
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NV(4/5)-GPIO/Strap
1 2 3 4 5
1 2 3 4 5
For GC6
+1.8VGS_+3VGS_AON
Normal:1.8V
GC6:1.3V
UV1B
COMMON CV54 @
1
1.8V OR GATE SA000099200 (Main) : VIH(min) = 0.8V
SA00008I400 (2nd) : VIH(min) = 0.8V
2/14 FBA N17S@ 0.1U_0201_10V6K
[27] FB_A_D[0..31] FB_A_D0 E18 FBA_D0 NC FB_CLAMP F3 RV2456 1 2 10K_0402_5%
FB_A_D1 F18 2 UV20 @
FBA_D1
5
FB_A_D2 E16 74AUP1G32GW_TSSOP5
FBA_D2 GF119
A FB_A_D3 F17 2 SA000054300 DV6 GC6@
A
FBA_D3
G Vcc
FB_A_D4 [11,24] GC6_FB_EN A GC6_FB_EN
D20 FBA_D4 4 2
FB_A_D5 Y 1.35V_PWR_EN [51] 1.35V_PWR_EN
D21 FBA_D5 1 1
FB_A_D6 F20 [21,26,50] DGPU_PWROK B DGPU_PWROK 3
FBA_D6
FB_A_D7 E21 FBA_D7
1
FB_A_D8 E15 BAV70W_SOT323-3
FBA_D8
FB_A_D9 D15 RV2462
FBA_D9
FB_A_D10 F15 16.5K_0402_5%
FBA_D10
FB_A_D11 F13 GC6@
FBA_D11
FB_A_D12 C13 FBA_D12
2
FB_A_D13 B13 FBA_D13
FB_A_D14 E13 RV68 1 2 0_0402_5%
FBA_D14
FB_A_D15 D13 NOGC6@
FBA_D15
FB_A_D17 C16 Stuff RV201 if not support GC6
FBA_D17
FB_A_D18 A13 FBA_D18
FB_A_D23 C19
FB_A_D24 B24
FBA_D23
FBA_D24
From DG-07158-001_v05_secured(NVDIA Spec)
FB_A_D29 B21 FBA_D29 FB_A_CMD[0..31] [27]
FB_A_D31 C21
[27] FB_A_D[32..63] FBA_D31
FB_A_D32 R22 FBA_D32
FB_A_D33 R24 FBA_CMD0 C27 FB_A_CMD0
FBA_D33
FB_A_D34 T22 FBA_CMD1 C26 FB_A_CMD1
FBA_D34
FB_A_D35 R23 FBA_CMD2 E24 FB_A_CMD2
FBA_D35
FB_A_D36 N25 FBA_CMD3 F24 FB_A_CMD3
FBA_D36
FB_A_D37 N26 FBA_CMD4 D27 FB_A_CMD4
FBA_D37
FB_A_D38 N23 FBA_CMD5 D26 FB_A_CMD5
FBA_D38
FB_A_D39 N24 FBA_CMD6 F25 FB_A_CMD6
FBA_D39
B
FB_A_D40 V23 FBA_CMD7 F26 FB_A_CMD7 B
FBA_D40
FB_A_D41 V22 FBA_CMD8 F23 FB_A_CMD8 +1.35VS_VRAM
FBA_D41
FB_A_D42 T23 FBA_CMD9 G22 FB_A_CMD9
FBA_D42
FB_A_D43 U22 FBA_CMD10 G23 FB_A_CMD10
FBA_D43
FB_A_D44 Y24 FBA_CMD11 G24 FB_A_CMD11 FBA_CKE_L FB_A_CMD14 RV69 1 DIS@ 2 10K_0201_1%
FBA_D44
FB_A_D45 AA24 FBA_CMD12 F27 FB_A_CMD12 FBA_CKE_H FB_A_CMD30 RV70 1 DIS@ 2 10K_0201_1%
FBA_D45
FB_A_D46 Y22 FBA_CMD13 G25 FB_A_CMD13
FBA_D46
FB_A_D47 AA23 FBA_CMD14 G27 FB_A_CMD14
FBA_D47
FB_A_D48 AD27 FBA_CMD15 G26 FB_A_CMD15 FBA_RST_L FB_A_CMD13 RV71 1 DIS@ 2 10K_0201_1%
FBA_D48
FB_A_D49 AB25 FBA_CMD16 M24 FB_A_CMD16 FBA_RST_H FB_A_CMD29 RV72 1 DIS@ 2 10K_0201_1%
FBA_D49
FB_A_D50 AD26 FBA_CMD17 M23 FB_A_CMD17
FBA_D50
FB_A_D51 AC25 FBA_CMD18 K24 FB_A_CMD18
FBA_D51
FB_A_D52 AA27 FBA_CMD19 K23 FB_A_CMD19
FBA_D52
FB_A_D53 AA26 M27 FB_A_CMD20
FB_A_D54 W26
FBA_D53
FBA_D54
FBA_CMD20
FBA_CMD21 M26 FB_A_CMD21 GDDR5 design
FB_A_D55 Y25 FBA_CMD22 M25 FB_A_CMD22
FBA_D55
FB_A_D56 R26 FBA_CMD23 K26 FB_A_CMD23
FBA_D56
FB_A_D57 T25 FBA_CMD24 K22 FB_A_CMD24
FBA_D57
FB_A_D58 N27 FBA_CMD25 J23 FB_A_CMD25
FBA_D58
FB_A_D59 R27 FBA_CMD26 J25 FB_A_CMD26
FBA_D59
FB_A_D60 V26 FBA_CMD27 J24 FB_A_CMD27
FBA_D60
FB_A_D61 V27 FBA_CMD28 K27 FB_A_CMD28
FBA_D61
FB_A_D62 W27 FBA_CMD29 K25 FB_A_CMD29
FBA_D62
FB_A_D63 W25 FBA_CMD30 J27 FB_A_CMD30
FBA_D63
FBA_CMD31 J26 FB_A_CMD31
[27] FB_A_DBI[3..0] FB_A_DBI0 D19 FBA_DQM0

FB_A_DBI1 D14 FBVDDQ_GPU
FBA_DQM1
FB_A_DBI2 C17 FBA_DQM2 GF117/GF119
FB_A_DBI3 C22 +1.35VS_VRAM
[27] FB_A_DBI[7..4] FBA_DQM3 GK208
FB_A_DBI4 P24 FBA_DQM4
FB_A_DBI5 W24 FBA_CMD32 B19 1.35V
FBA_DQM5 NC
FB_A_DBI6 AA25 FBA_DQM6
FB_A_DBI7 U25 FBA_CMD34 F22 RV73 1 @ 2 60.4_0402_1%
FBA_DQM7 FBA_DEBUG0
FBA_DEBUG1 FBA_CMD35 J22 RV74 1 @ 2 60.4_0402_1%
[27] FB_A_EDC[3..0] FB_A_EDC0 E19 FBA_DQS_WP0
FB_A_EDC1 C15 FBA_DQS_WP1
C FB_A_EDC2 B16 FBA_CLK0 D24 FB_A_CLK0 C
FBA_DQS_WP2 FB_A_CLK0 [27]
FB_A_EDC3 B22 FBA_CLK0# D25 FB_A_CLK#0
[27] FB_A_EDC[7..4] FBA_DQS_WP3 FB_A_CLK#0 [27]
FB_A_EDC4 R25 FBA_CLK1 N22 FB_A_CLK1
FBA_DQS_WP4 FB_A_CLK1 [27]
FB_A_EDC5 W23 FBA_CLK1# M22 FB_A_CLK#1
FBA_DQS_WP5 FB_A_CLK#1 [27]
FB_A_EDC6 AB26 FBA_DQS_WP6
FB_A_EDC7 T26 FBA_DQS_WP7
F19 FBA_WCK01 D18 FB_A_WCK0

FBA_DQS_RN0 FB_A_WCK0 [27]
C14 FBA_WCK01# C18 FB_A_WCK#0
FBA_DQS_RN1 FB_A_WCK#0 [27]
A16 FBA_WCK23 D17 FB_A_WCK1
A22 FBA_WCK23# D16 FB_A_WCK#1
P25 FBA_WCK45 T24 FB_A_WCK2
W22 FBA_WCK45# U24 FB_A_WCK#2
AB27 FBA_WCK67 V24 FB_A_WCK3
T27 FBA_WCK67# V25 FB_A_WCK#3
GF119
FB_PLLAVDD F16
PLLAVDD PLLAVDD +1.0VS_DGPU
NC
FB_PLLAVDD P22 RV2464
Close to P22 Close to F16 1.0V DIS@ N16S@
FB_PLLAVDD FB_DLLAVDD H22 1 2 HCB1005KF-300T25_2P
1 2
LV3
CV55
CV56
CV57
CV58
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
22U_0603_6.3V6M
GF117 SM01000NV00 0_0805_5%

1 2 1 1
+1.8VGS_+3VGS
DIS@
DIS@
DIS@
DIS@
2 1 2 2 RV2465
For VRAM DEBUG using N17S@
FB_VREF D23 1 2
T2402 @ FB_VREF_PROBE
Close to H22 Near GPU 0_0805_5%

N16S-GT-S-A2_BGA595
@
CV793
CV794
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
D D
1 2
N17S@
N17S@
2 1
Close to H22
NV(5/5)-MEMORY FBA
1 2 3 4 5
5 4 3 2 1
+1.8VS
RV66 1 2 N17S@
+3VS to +3VS_DGPU +5VALW
+3VS
0_0603_5% +1.8VGS_+3VGS
QV3 DIS@
ME2301DC-G_SOT23-3
2
RV67 1 2 N16S@ +1.8VGS_+3VSGS_S 3 1
D
RV75
47K_0402_5% 0_0402_5%
1
DIS@
RV76
G
1
2
22_0603_1%
DGPU_MAIN_EN# 1 DIS@ 2 DGPU_MAIN_EN#_GATE DIS@
RV77 4.7K_0201_5%
2
D RV81 D
0_0402_5% 1 1 2 1 1
1
D DIS@
6
DGPU_MAIN_EN
0.1U_0201_10V K X5R
CV59
4.7U_0402_6.3V6M
CV60
1U_0402_6.3V6K
CV61
0.1U_0201_10V K X5R
CV736
0.1U_0201_10V K X5R
CV737
1 2 2 QV148 D
[24] DGPU_MAIN_EN DGPU_MAIN_EN#
G BSS138W-7-F_SOT323-3 2
S 2 2 1 2 2 G
3
1U_0402_6.3V6K
CV62
1 QV6A
DIS@
DIS@
DIS@
DIS@
DIS@
S 2N7002KDW_SOT363-6
1
DIS@
+5VALW +1.0VS_DGPU
+3VS to +3VS_DGPU_AON
1
+5VALW +1.8VGS_+3VGS_AON
100K_0402_1%
RV78 DIS@
22_0603_1%
RV79 DIS@
QV7 DIS@
ME2301DC-G_SOT23-3
2
2
+1.8VGS_+3VSGS_S 3 1
D
RV83
6
47K_0402_5% D QV5A
1
DIS@ 1.0VS_DGPU_EN# 2 2N7002KDW_SOT363-6
G
1
470_0603_5%
RV84
RV85 DIS@ G DIS@
10K_0201_5%
3
DGPU_PWR_EN# 1 2 DGPU_PWR_EN#_GATE D QV5B S
1
C C
5 2N7002KDW_SOT363-6
[26,46] 1.0VS_DGPU_EN
@
G DIS@
RV86 1 1 2 1 1
3
0_0402_5% D S
4
1
D DGPU_PWR_EN#
0.1U_0201_10V K X5R
CV63
4.7U_0402_6.3V6M
CV64
1U_0402_6.3V6K
CV65
CV738
0.1U_0201_10V K X5R
CV739
DIS@ 5
DGPU_PWR_EN
0.1U_0201_10V K X5R
1 2 2 QV149 G
[11,26,33] DGPU_PWR_EN 2 2 1 2 2
G BSS138W-7-F_SOT323-3
S S QV6B
3
4
DIS@
DIS@
DIS@
DIS@
N17S@
2N7002KDW_SOT363-6
DIS@
1U_0402_6.3V6K
CV66
1 +3VALW +3VS
+3VS
2
@
1
RV106 DIS@ RV108 DIS@ UV10 DIS@
100K_0402_5% 10K_0402_5% NL17SZ08DFT2G_SC70-5
5
+1.8VGS_+3VGS_AON +3VS
Output 3.3V
2
DV4 DIS@ SA00009WE00 (Main) : VIH(min) = 1.2V
VCC
1.8VSDGPU_MAIN 1 RB751S-40_SOD523-2
IN B 4 GPUCORE_EN 1 2
OUT Y VGA_CORE_EN [50]
2
3
2
GND
RG1 RG82 5 G
D
IN A
6
10K_0201_5% 10K_0201_5% S RV105 DIS@ 1
N16S@ N17S@ DGPU_MAIN_EN 2 G
D
40.2K_0402_1%
3
4
S 1 2
1
1 QV152B DIS@ QV152A DIS@ CV197 DIS@
1
2N7002KDW_SOT363-6 2N7002KDW_SOT363-6 2 0.1U_0201_10V6K
Output 2.6V
DIS@ DV5 DIS@
DGPU_PWROK DG1 1 2 RB751V-40_SOD323-2 RB751S-40 SOD-523
SA0000ACG00(Main) : VIH(min) = 1.6V
[21,25,50] DGPU_PWROK
1 2
1.0VS_DGPU_EN [26,46]
[11,26,33] DGPU_PWR_EN
0_0402_5% RV103 DIS@
2
+1.35VGS_PGOOD RG2 1 2 56K_0402_1%
B [51] +1.35VGS_PGOOD GPU_ALL_PGOOD [11] 1 B
RV256 @ 1 2
100K_0402_5%
CV196 DIS@
2 0.1U_0201_10V6K
1
A A

DGPU_DC/DC Interface
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5 4 3 2 1
5 4 3 2 1
VRAM Memory Partition A UV22 MF=0

UV21 MF=0 MF=0 MF=1 MF=1 MF=0
MF=0 MF=1 MF=1 MF=0 A4 FB_A_D32

FB_A_EDC4 C2 DQ24 DQ0 A2 FB_A_D33
A4 FB_A_D0 FB_A_EDC5 C13 EDC0 EDC3 DQ25 DQ1 B4 FB_A_D34
FB_A_EDC0 C2 DQ24 DQ0 A2 FB_A_D1 FB_A_EDC6 R13 EDC1 EDC2 DQ26 DQ2 B2 FB_A_D35
FB_A_EDC1 EDC0 EDC3 DQ25 DQ1 FB_A_D2 FB_A_EDC7 EDC2 EDC1 DQ27 DQ3 FB_A_D36 BYTE4
C13 B4 R2 E4
FB_A_EDC2 R13 EDC1 EDC2 DQ26 DQ2 B2 FB_A_D3 EDC3 EDC0 DQ28 DQ4 E2 FB_A_D37
FB_A_EDC3 R2 EDC2 EDC1 DQ27 DQ3 E4 FB_A_D4 DQ29 DQ5 F4 FB_A_D38
EDC3 EDC0 DQ28 DQ4 FB_A_D5 BYTE0 DQ30 DQ6 FB_A_D39
E2 D2 F2
DQ29 DQ5 FB_A_D6 [25] FB_A_DBI4 DBI0# DBI3# DQ31 DQ7 FB_A_D40
F4 D13 A11
DQ30 DQ6 FB_A_D7 [25] FB_A_DBI5 DBI1# DBI2# DQ16 DQ8 FB_A_D41
D2 F2 P13 A13
[25] FB_A_DBI0 DBI0# DBI3# DQ31 DQ7 FB_A_D8 [25] FB_A_DBI6 DBI2# DBI1# DQ17 DQ9 FB_A_D42
D13 A11 P2 B11
[25] FB_A_DBI1 DBI1# DBI2# DQ16 DQ8 FB_A_D9 [25] FB_A_DBI7 DBI3# DBI0# DQ18 DQ10 FB_A_D43
D P13 A13 B13 D
[25] FB_A_DBI2 DBI2# DBI1# DQ17 DQ9 FB_A_D10 FB_A_CLK1 DQ19 DQ11 FB_A_D44
P2 B11 [25] FB_A_CLK1 J12 E11 BYTE5
[25] FB_A_DBI3 DBI3# DBI0# DQ18 DQ10 FB_A_D11 FB_A_CLK#1 CK DQ20 DQ12 FB_A_D45
B13 BYTE1 [25] FB_A_CLK#1 J11 E13
FB_A_CLK0 J12 DQ19 DQ11 E11 FB_A_D12 FB_A_CMD30 J3 CK# DQ21 DQ13 F11 FB_A_D46
[25] FB_A_CLK0 FB_A_CLK#0 CK DQ20 DQ12 FB_A_D13 CKE# DQ22 DQ14 FB_A_D47
J11 E13 F13
[25] FB_A_CLK#0 FB_A_CMD14 CK# DQ21 DQ13 FB_A_D14 DQ23 DQ15 FB_A_D48
J3 F11 U11
CKE# DQ22 DQ14 F13 FB_A_D15 FB_A_CMD18 H11 DQ8 DQ16 U13 FB_A_D49
DQ23 DQ15 U11 FB_A_D16 FB_A_CMD20 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 FB_A_D50
FB_A_CMD2 H11 DQ8 DQ16 U13 FB_A_D17 FB_A_CMD19 K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 FB_A_D51
FB_A_CMD4 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 FB_A_D18 FB_A_CMD17 H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 FB_A_D52
FB_A_CMD3 BA1/A5 BA3/A3 DQ10 DQ18 FB_A_D19 BA3/A3 BA1/A5 DQ12 DQ20 FB_A_D53 BYTE6
K11 T13 BYTE2 N13
FB_A_CMD1 H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 FB_A_D20 DQ13 DQ21 M11 FB_A_D54
BA3/A3 BA1/A5 DQ12 DQ20 N13 FB_A_D21 FB_A_CMD22 K4 DQ14 DQ22 M13 FB_A_D55
DQ13 DQ21 M11 FB_A_D22 FB_A_CMD27 H5 A8/A7 A10/A0 DQ15 DQ23 U4 FB_A_D56
FB_A_CMD6 K4 DQ14 DQ22 M13 FB_A_D23 FB_A_CMD26 H4 A9/A1 A11/A6 DQ0 DQ24 U2 FB_A_D57
FB_A_CMD11 H5 A8/A7 A10/A0 DQ15 DQ23 U4 FB_A_D24 FB_A_CMD23 K5 A10/A0 A8/A7 DQ1 DQ25 T4 FB_A_D58
FB_A_CMD10 H4 A9/A1 A11/A6 DQ0 DQ24 U2 FB_A_D25 FB_A_CMD25 J5 A11/A6 A9/A1 DQ2 DQ26 T2 FB_A_D59
FB_A_CMD7 K5 A10/A0 A8/A7 DQ1 DQ25 T4 FB_A_D26 A12/RFU/NC DQ3 DQ27 N4 FB_A_D60
FB_A_CMD9 A11/A6 A9/A1 DQ2 DQ26 FB_A_D27 DQ4 DQ28 FB_A_D61 BYTE7
J5 T2 BYTE3 A5 N2
A12/RFU/NC DQ3 DQ27 N4 FB_A_D28 U5 VPP/NC DQ5 DQ29 M4 FB_A_D62
A5 DQ4 DQ28 N2 FB_A_D29 VPP/NC DQ6 DQ30 M2 FB_A_D63
U5 VPP/NC DQ5 DQ29 M4 FB_A_D30 DQ7 DQ31
VPP/NC DQ6 DQ30 M2 FB_A_D31 RV88 DIS@ 2 1 1K_0402_1% J1 +1.35VS_VRAM
DQ7 DQ31 RV90 DIS@ 2 1 1K_0402_1% J10 MF
RV87 DIS@ 2 1 1K_0402_1% J1 +1.35VS_VRAM RV92 DIS@ 2 1 121_0402_1% J13 SEN B1
RV89 DIS@ 2 1 1K_0402_1% J10 MF ZQ VDDQ D1
RV91 DIS@ 2 1 121_0402_1% J13 SEN B1 VDDQ F1
ZQ VDDQ D1 FB_A_CMD24 J4 VDDQ M1
VDDQ F1 FB_A_CMD28 G3 ABI# VDDQ P1
FB_A_CMD8 J4 VDDQ M1 FB_A_CMD16 G12 RAS# CAS# VDDQ T1
FB_A_CMD12 G3 ABI# VDDQ P1 FB_A_CMD31 L3 CS# WE# VDDQ G2
FB_A_CMD0 G12 RAS# CAS# VDDQ T1 FB_A_CMD21 L12 CAS# RAS# VDDQ L2
FB_A_CMD15 L3 CS# WE# VDDQ G2 WE# CS# VDDQ B3
FB_A_CMD5 L12 CAS# RAS# VDDQ L2 VDDQ D3
WE# CS# VDDQ B3 VDDQ F3
VDDQ D3 FB_A_WCK#2 D5 VDDQ H3
VDDQ [25] FB_A_WCK#2 FB_A_WCK2 WCK01# WCK23# VDDQ
F3 D4 K3
FB_A_WCK#0 VDDQ [25] FB_A_WCK2 WCK01 WCK23 VDDQ
D5 H3 M3
[25] FB_A_WCK#0 FB_A_WCK0 WCK01# WCK23# VDDQ FB_A_WCK#3 VDDQ
D4 K3 P5 P3
[25] FB_A_WCK0 WCK01 WCK23 VDDQ [25] FB_A_WCK#3 FB_A_WCK3 WCK23# WCK01# VDDQ
M3 P4 T3
FB_A_WCK#1 VDDQ [25] FB_A_WCK3 WCK23 WCK01 VDDQ
P5 P3 E5
[25] FB_A_WCK#1 FB_A_WCK1 WCK23# WCK01# VDDQ VDDQ
P4 T3 N5
FB_A_CMD[0..15] [25] FB_A_WCK1 WCK23 WCK01 VDDQ VDDQ
E5 A10 E10
[25] FB_A_CMD[0..15] VDDQ VREFD VDDQ
N5 U10 N10
FB_A_CMD[16..31] VDDQ +FBA_VREFC0 VREFD VDDQ
A10 E10 J14 B12
C [25] FB_A_CMD[16..31] VREFD VDDQ VREFC VDDQ C
U10 N10 D12
+FBA_VREFC0 J14 VREFD VDDQ B12 VDDQ F12
FB_A_D[0..63] VREFC VDDQ VDDQ
D12 H12
[25] FB_A_D[0..63] VDDQ FB_A_CMD29 VDDQ
F12 J2 K12
FB_A_EDC[7..0] VDDQ RESET# VDDQ
H12 M12
[25] FB_A_EDC[7..0] FB_A_CMD13 VDDQ VDDQ
J2 K12 P12
RESET# VDDQ M12 VDDQ T12
VDDQ P12 VDDQ G13
VDDQ T12 H1 VDDQ L13
VDDQ G13 K1 VSS VDDQ B14
H1 VDDQ L13 B5 VSS VDDQ D14
K1 VSS VDDQ B14 G5 VSS VDDQ F14
RV93 DIS@ RV94 DIS@ B5 VSS VDDQ D14 L5 VSS VDDQ M14
40.2_0402_1% 40.2_0402_1% G5 VSS VDDQ F14 T5 VSS VDDQ P14
FB_A_CLK0 1 2 1 2 FB_A_CLK#0 L5 VSS VDDQ M14 B10 VSS VDDQ T14
T5 VSS VDDQ P14 D10 VSS VDDQ
B10 VSS VDDQ T14 G10 VSS
1 VSS VDDQ VSS
CV67 DIS@ D10 L10 A1
Near to UV6 0.01U_0402_16V7K G10 VSS
VSS
P10 VSS
VSS
VSSQ
VSSQ
C1
L10 A1 T10 E1
2 P10 VSS VSSQ C1 H14 VSS VSSQ N1
T10 VSS VSSQ E1 K14 VSS VSSQ R1
H14 VSS VSSQ N1 +1.35VS_VRAM VSS VSSQ U1
K14 VSS VSSQ R1 VSSQ H2
+1.35VS_VRAM VSS VSSQ U1 G1 VSSQ K2
VSSQ H2 L1 VDD VSSQ A3
RV95 DIS@ RV96 DIS@ G1 VSSQ K2 G4 VDD VSSQ C3
40.2_0402_1% 40.2_0402_1% L1 VDD VSSQ A3 L4 VDD VSSQ E3
FB_A_CLK1 1 2 1 2 FB_A_CLK#1 G4 VDD VSSQ C3 C5 VDD VSSQ N3
L4 VDD VSSQ E3 R5 VDD VSSQ R3
C5 VDD VSSQ N3 C10 VDD VSSQ U3
1 VDD VSSQ VDD VSSQ
CV68 DIS@ R5 R3 R10 C4
Near to UV7 0.01U_0402_16V7K C10 VDD
VDD
VSSQ
VSSQ
U3 D11 VDD
VDD
VSSQ
VSSQ
R4
R10 C4 G11 F5
2 D11 VDD VSSQ R4 L11 VDD VSSQ M5
G11 VDD VSSQ F5 P11 VDD VSSQ F10
L11 VDD VSSQ M5 G14 VDD VSSQ M10
P11 VDD VSSQ F10 L14 VDD VSSQ C11
G14 VDD VSSQ M10 VDD VSSQ R11
L14 VDD VSSQ C11 VSSQ A12
VDD VSSQ R11 VSSQ C12
VSSQ A12 VSSQ E12
VSSQ C12 VSSQ N12
VSSQ E12 VSSQ R12
VSSQ N12 170-BALL VSSQ U12
B B
VSSQ R12 VSSQ H13
170-BALL VSSQ U12 SGRAM GDDR5 VSSQ K13
+1.35VS_VRAM VSSQ H13 VSSQ A14
SGRAM GDDR5 VSSQ K13 VSSQ C14
VSSQ A14 VSSQ E14
VSSQ VSSQ
1
C14 N14
RV97 DIS@ VSSQ E14 VSSQ R14
549_0402_1% VSSQ N14 VSSQ U14
VSSQ R14 VSSQ
VSSQ U14 @ K4G80325FB-HC03_FBGA170~D
2
VSSQ
RV98 1 DIS@ 2 931_0402_1% +FBA_VREFC0 @ K4G80325FB-HC03_FBGA170~D
W=16mils
1
D
1.33K_0402_1%
820P_0402_25V7
820P_0402_25V7
RV99
CV85
CV86
1 1
2 QV8 DIS@ +1.35VS_VRAM Near VRAM Near ball +1.35VS_VRAM Near VRAM Near ball
[24] MEM_VREF
G L2N7002WT1G_SC-70-3
S
3
2 2
DIS@
DIS@
DIS@
2
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CV71
CV72
CV73
CV74
CV75
CV76
CV79
CV80
CV81
CV82
CV83
CV84
DIS@
DIS@
DIS@
DIS@
2 2 1 1 1 1 1 1 2 2 1 1 1 1 1 1
1 1 2 2 2 2 2 2 1 1 2 2 2 2 2 2
CV69
CV70
CV77
CV78
Place near pin J14 of each vram
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
+1.35VS_VRAM Near ball +1.35VS_VRAM Near ball
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
CV87 DIS@
CV88 DIS@
CV89 DIS@
CV90 DIS@
CV91 DIS@
CV92 DIS@
CV93 DIS@
CV94 DIS@
CV95 DIS@
CV96 DIS@
CV97 DIS@
CV98 DIS@
CV99 DIS@
CV100 DIS@
CV101 DIS@
CV102 DIS@
CV103 DIS@
CV104 DIS@
CV105 DIS@
CV106 DIS@
1
1
2
2
A A

N16P_GDDR5_A
5 4 3 2 1
5 4 3 2 1
LCD POWER SWITCH CAMERA POWER CIRCUIT

+3VS +LCDVDD_CONN
+3VS +3VS_CMOS
W=60mils U5 W=60mils
5 1 +LCDVDD R2 1 2 0_0805_5%
IN OUT
D
2 1 D
1 GND
C4 4 3 C3
1U_0201_6.3V6M EN OC 4.7U_0402_6.3V6M
W=20mils R3 1 @ 2 0_0603_5%
W=20mils
SE00000UC00 EM5203AJ-20 SOT23 5P 2
1 1
2
SA00008R900 C6 @
C5 10U_0402_6.3V6M
[6] PCH_ENVDD
0.1U_0201_10V K X5R SE00000UD00
2 2
1
R4
100K_0201_5%
DISPLAY OFF HOT PLUG DETECT

C C
R5 1 2 0_0402_5% DISPOFF# R6 1 2 0_0402_5% EDP_HPD_R

Through EC [33] BKOFF# [6] EDP_HPD
2
2
R8
R7 100K_0201_5%
100K_0201_5%
1
eDP CONNECTOR 1
B+ +LEDVDD
Touch Screen POWER CIRCUIT

JEDP1
R9 1 2 0_0805_5% 1
2 1
1 2
3
C7 @ 4 3
4.7U_0603_25V6K 5 4
2 [6] INVPWM 5
DISPOFF# 6
B EDP_HPD_R 7 6 B
W=60mils 8 7
+LCDVDD_CONN 8
9
C8 1 2 0.1U_0201_10V K X5R EDP_AUXN_C 10 9
[6] EDP_AUXN EDP_AUXP_C 10
[6] EDP_AUXP C9 1 2 0.1U_0201_10V K X5R 11
12 11
C10 1 2 0.1U_0201_10V K X5R EDP_TXP0_C 13 12
eDP [6] EDP_TXP0
C11 1 2 0.1U_0201_10V K X5R EDP_TXN0_C 14 13 +3VS +3VS_TS
[6] EDP_TXN0 14
15
C12 1 2 0.1U_0201_10V K X5R EDP_TXP1_C 16 15
[6] EDP_TXP1 EDP_TXN1_C 16
C13 1 2 0.1U_0201_10V K X5R 17
[6] EDP_TXN1 17
18
C232 1 2 0.1U_0201_10V K X5R EDP_TXP2_C 19 18
[6] EDP_TXP2 EDP_TXN2_C 19
C233 1 2 0.1U_0201_10V K X5R 20
W=20mils @ W=20mils
[6] EDP_TXN2 20
21 R264 1 2 0_0805_5%
C234 1 2 0.1U_0201_10V K X5R EDP_TXP3_C 22 21
EDP_TXP3
[6] EDP_TXN3_C 22 1 1
C235 1 2 0.1U_0201_10V K X5R 23 TS@ C231 @
EDP_TXN3
[6] 23
24 C230 10U_0402_6.3V6M
[6] TS_I2C_RST# 24
25 0.1U_0201_10V K X5R SE00000UD00
[11] TS_INT# USB20_N4_C 25 2 2
RTOUCH1 1 C340@ 2 0_0402_5% 26
[11] I2C_1_SDA USB20_P4_C 26
Touch Screen RTOUCH2 1 C340@ 2 0_0402_5% 27
[11] I2C_1_SCL 27
RTOUCH3 1 S540@ 2 0_0402_5% +3VS_TS
28
[12] USB20_N4 TS_DISABLE# 28
RTOUCH4 1 S540@ 2 0_0402_5% 29
[12] USB20_P4 USB20_N6 29
30
[33] TS_DISABLE# USB20_N6
[12] USB20_P6 30
Camera 31
USB20_P6
[12] 31
32
W=20mils +3VS_CMOS 33 32
[33,35] EC_SMB_DA4 33
G-Sensor 34
[33,35] EC_SMB_CK4 34
35
[33] TAB_SW# 35
+3VALW
36 41
37 36 GND 42
+3VS
DMIC DMIC_CLK 38 37 GND 43
[32] DMIC_CLK DMIC_DAT 38 GND
39 44
[32] DMIC_DAT 39 GND
40 45
40 GND
A CVILU_CVS3402M1RM-NH A
ME@
DT6 SP01002FV00
USB20_N6 3 6 DMIC_DAT
I/O2 I/O4
2 5
GND VDD
e
D
P
/
C
a
m
e
r
a
/
M
I
C
DMIC_CLK USB20_P6 Issued Date 2018/04/09 Deciphered Date 2019/04/09 Title
1 4
I/O1 I/O3
WWW.AliSaler.Com
CEST236LC5VU-M SOT23-6 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
SC300006000 Custom 0.2
@ESD@
5 4 3 2 1
5 4 3 2 1
HDMI +5VS +5V_Display
UH1
3
W=40mils
OUT
+1.2V_HDMI 1
Near Pin20 Near Pin12 Near Pin40 Near Pin31 Near Pin19 IN 1
CH5
1
D
@ 2 0.1U_0201_10V K X5R D
+1.2V +1.2V_HDMI CH6 GND
0.1U_0201_10V K X5R 2
2
0.01U_0402_16V7K
CLS228
0.01U_0402_16V7K
CLS225
0.1U_0201_10V6K
CLS226
0.1U_0201_10V6K
CLS229
0.1U_0201_10V6K
CLS222
0.1U_0201_10V6K
CLS223
W = 40mils S IC AP2330W-7 SC59 3P PWR SW
2 2 2 2 2 2 SA00004ZA00
RLS3 1 @ 2 0_0603_5%
1 1 1 1 1 1
LS@
LS@
LS@
LS@
LS@
LS@
+3VS
ULS1 LS@
Near Pin11 Near Pin37
19 11
20 VDDTA VDD33 37
31 VDDTX VDD33
VDDTX
0.01U_0402_16V7K
CLS224
0.1U_0201_10V6K
CLS227
12
40 VDDRX 30 HDMI_RD_TX_P2 +5V_Display
VDDRX OUT_D2p HDMI_RD_TX_N2 2 2
29
Near ULS1 LS@ OUT_D2n
CLS9 1 2 0.1U_0201_10V6K HDMI_TX_P2 1 27 HDMI_RD_TX_P1 HDMI_CTRL_DAT RH252 2 1 2.2K_0402_5%
[6] CPU_DP2_P0 HDMI_TX_N2 IN_D2p OUT_D1p HDMI_RD_TX_N1 1 1
LS@
LS@
CLS10 1 2 0.1U_0201_10V6K 2 26
[6] CPU_DP2_N0 IN_D2n OUT_D1n HDMI_CTRL_CLK
LS@ To HDMI RH253 2 1 2.2K_0402_5%
CLS11 1 LS@2 0.1U_0201_10V6K HDMI_TX_P1 4 25 HDMI_RD_TX_P0
[6] CPU_DP2_P1 HDMI_TX_N1 IN_D1p OUT_D0p HDMI_RD_TX_N0
CLS12 1 LS@2 0.1U_0201_10V6K 5 24
[6] CPU_DP2_N1 IN_D1n OUT_D0n
From CPU CLS13 1 LS@2 0.1U_0201_10V6K HDMI_TX_P0 6 22 HDMI_RD_CLKP
[6] CPU_DP2_P2 HDMI_TX_N0 IN_D0p OUT_CKp HDMI_RD_CLKN
CLS14 1 LS@2 0.1U_0201_10V6K 7 21
[6] CPU_DP2_N2 IN_D0n OUT_CKn
CLS15 1 LS@2 0.1U_0201_10V6K HDMI_CLKP 9 39 CPU_DP2_CTRL_DATA
CPU_DP2_CTRL_DATA [6]
[6]
[6]
CPU_DP2_P3
CPU_DP2_N3
CLS16 1 LS@2 0.1U_0201_10V6K HDMI_CLKN 10 IN_CKp
IN_CKn
SDA_SRC
SCL_SRC
SDA_SNK
38
33
32
CPU_DP2_CTRL_CLK
HDMI_CTRL_DAT
HDMI_CTRL_CLK
CPU_DP2_CTRL_CLK [6]
From CPU
EMI Near JHDMI1
SCL_SNK To HDMI
+3VS
DDCBUF 14 For HDMI
C
RLS247 1 LS@ 2 4.7K_0402_5% 13 DDCBUF/SDA_CTL 3 CPU_DP2_HPD C
EQ 17 DCIN_EN/SCL_CTL HPD_SRC 34 ISET
CPU_DP2_HPD [6] TO CPU HDMI_RD_CLKP RH10 1 EMI@ 2 6.8_0402_1%~D HDMI_L_CLKP
I2C_CTL_EN_LS 8 EQ/I2C_ADDR0 ISET 28 HDMI_HPD HDMI_RD_CLKN RH11 1 EMI@ 2 6.8_0402_1%~D HDMI_L_CLKN
I2C_CTL_EN HPD_SNK From HDMI
RLS249 1 LS@ 2 4.99K_0402_1% 18 HDMI_RD_TX_P0 RH12 1 EMI@ 2 6.8_0402_1%~D HDMI_L_TX_P0

36 REXT HDMI_RD_TX_N0 RH13 1 EMI@ 2 6.8_0402_1%~D HDMI_L_TX_N0
RLS251 1 @ 2 4.7K_0402_5% 23 PD# 15
From HDMI Re-driver
PRE 16 CFG / I2C_ADDR1 GND 35
PRE GND 41 HDMI_RD_TX_P1 RH14 1 EMI@ 2 6.8_0402_1%~D HDMI_L_TX_P1
EPAD HDMI_RD_TX_N1 RH15 1 EMI@ 2 6.8_0402_1%~D HDMI_L_TX_N1
PS8407ATQFN40GTR2A1_TQFN40_5X5
HDMI_RD_TX_P2 RH16 1 EMI@ 2 6.8_0402_1%~D HDMI_L_TX_P2
HDMI_RD_TX_N2 RH17 1 EMI@ 2 6.8_0402_1%~D HDMI_L_TX_N2
RF request
CPU_DP2_CTRL_DATA
+3VS +3VS +3VS +3VS +3VS CPU_DP2_CTRL_CLK
HDMI_CTRL_DAT
HDMI_CTRL_CLK 1
1
1
CLS238 HDMI_L_CLKP RH2 1 @EMI@ 2 150_0402_5% HDMI_L_CLKN
RLS257 RLS254 RLS255 RLS258 RLS256 1 10PF_0402_50V9
LS@ LS@ @ @ @ 2 @RF@
4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
CLS239 HDMI_L_TX_P0 RH4 1 @EMI@ 2 150_0402_5% HDMI_L_TX_N0
1 10PF_0402_50V9
2
DDCBUF EQ I2C_CTL_EN_LS PRE ISET 2 @RF@

CLS240 HDMI_L_TX_P1 RH5 1 @EMI@ 2 150_0402_5% HDMI_L_TX_N1
1
1 10PF_0402_50V9
RLS262 RLS307 RLS260 RLS263 RLS261 2 @RF@
@ @ @ @ @ CLS241 HDMI_L_TX_P2 RH6 1 @EMI@ 2 150_0402_5% HDMI_L_TX_N2
4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
10PF_0402_50V9
2 @RF@
2
B B
+5V_Display
JHDMI1
HDMI_HPD 19
18 HP_DET
DH1 @ESD@ DH2 @ESD@ DH3 @ESD@ 17 +5V
HDMI_CTRL_CLK 9 10 1 HDMI_CTRL_CLK HDMI_L_TX_P1 9 10 1 HDMI_L_TX_P1 HDMI_L_TX_P2 9 10 1 HDMI_L_TX_P2 HDMI_CTRL_DAT 16 DDC/CEC_GND
1 1 1
HDMI_CTRL_CLK 15 SDA
HDMI_CTRL_DAT 8 2 HDMI_CTRL_DAT HDMI_L_TX_N1 8 2 HDMI_L_TX_N1 HDMI_L_TX_N2 8 2 HDMI_L_TX_N2 14 SCL
9 2 9 2 9 2
13 Reserved
+5V_Display 7 4 +5V_Display HDMI_L_CLKP 7 4 HDMI_L_CLKP HDMI_L_TX_P0 7 4 HDMI_L_TX_P0 HDMI_L_CLKN 12 CEC 20
7 4 7 4 7 4
11 CK- GND 21
HDMI_HPD 6 5 HDMI_HPD HDMI_L_CLKN 6 5 HDMI_L_CLKN HDMI_L_TX_N0 6 5 HDMI_L_TX_N0 HDMI_L_CLKP 10 CK_shield GND 22
6 5 6 5 6 5
HDMI_L_TX_N0 9 CK+ GND 23
3 3 3 8 D0- GND
3 3 3
HDMI_L_TX_P0 7 D0_shield
8 8 8 HDMI_L_TX_N1 6 D0+
5 D1-
L05ESDL5V0NA-4 SLP2510P8 ESD L05ESDL5V0NA-4 SLP2510P8 ESD L05ESDL5V0NA-4 SLP2510P8 ESD HDMI_L_TX_P1 4 D1_shield
HDMI_L_TX_N2 3 D1+
2 D2-
HDMI_L_TX_P2 1 D2_shield
D2+
ACON_HMR2E-AK120F
A ME@ A
DC231807181
H
D
M
I
Custom 0.2
5 4 3 2 1
A B C D E
NGFF WLAN /BT(Key E)

1 1
+3VS_WLAN
CW78
10P_0402_50V8J
1 1 1 1
CW2 CNVi@ CW3
CW1 CNVi@ 0.1U_0201_10V6K 0.01U_0402_16V7K
@RF@
4.7U_0402_6.3V6M CNVi@ +3VALW

2 2 2 2 +3VS_WLAN
Need to stuff for CNVi power sequence control
Imax : 2.0 A Imax : 2.0 A
Close to KEY E pin72,74
1U_0201_6.3V6M
1
+3VS_WLAN
CW9
CW11
CNVi@ 0.1U_0201_10V6K
2
+3VS_WLAN UC13 2
CNVi@
5 1
IN OUT
2
10P_0402_50V8J
0.01U_0402_16V7K
GND
CW82 RF@
1 1 1 1 CNVi_PWR_EN#_R
CW4 CW5 1 CNVi@ 2 4 3 RW41 1 @ 2
[33] CNVi_PWR_EN# EN(EN#) OC#
0.1U_0201_10V6K RW42 0_0402_5% 10K_0402_5%
CNVi@ CW6
1U_0201_6.3V6M
4.7U_0402_6.3V6M CNVi@ G524B2T11U_SOT23-5
1
2 2 2 2
CW10
SA00007BW00
CNVi@
Close to KEY E pin2,4
2
I (Max) : 2.0 A(+3VS_WLAN)
CNVi@
RDS(Typ) : 70 mohm
V drop : 0.14 V
Jefferson Peak:1360mA@peak current
Thunder_Peak_2:1100mA@peak current
2 2
+3VS_WLAN
CNVi Module PIN Def i ne
JWLAN1
GND 1 2 +3P3A
GND_1 3.3VAUX_2
[12] USB20_P10 USB_D+ 3 USB_D+ 3.3VAUX_4
4 +3P3A
BT [12] USB20_N10 USB_D- 5 USB_D- LED1#
6 LED#1
GND 7 8 PCM_CLK
CNV_CRX_DTX_N1 GND_7 PCM_CLK CNV_RF_RESET#_R
[9] CNV_CRX_DTX_N1 CNV_CRX_DTX_P1
WGR_D1N 9 SDIO_CLK PCM_SYNC
10 RF_RESET_B RW4 1 CNVi@ 2 33_0201_5%
CNV_RF_RESET# [9]
[9] CNV_CRX_DTX_P1 WGR_D1P 11 SDIO_CMD PCM_OUT
12 PCM_IN
CLKREQ_CNV#_R
CNV_CRX_DTX_N0
GND 13 SDIO_DAT0 PCM_IN
14 CLKREQ0 RW6 1 CNVi@ 2 33_0201_5% CLKREQ_CNV# [9]
[9] CNV_CRX_DTX_N0 CNV_CRX_DTX_P0
WGR_D0N 15 SDIO_DAT1 LED2#
16 LED2#
[9] CNV_CRX_DTX_P0 WGR_D0P 17 SDIO_DAT2 GND_18
18 GND/LNA_EN
CLK_CNV_CRX_DTX_N
GND 19 SDIO_DAT3 UART_WAKE
20 UART WAKE#
CNV_BRI_CRX_R_DTX
RW9 1 NONCNVi@
2 0_0201_5%
UART0_RX [11]
[9] CLK_CNV_CRX_DTX_N CLK_CNV_CRX_DTX_P
WGR_CLKN 21 SDIO_WAKE UART_TX
22 BRI_RSP RW11 1 CNVi@ 2 22_0402_5%
CNV_BRI_CRX_DTX [11]
[9] CLK_CNV_CRX_DTX_P WGR_CLKP 23 SDIO_RST RW13 1 2 0_0201_5%
NONCNVi@
Near JWLAN1 24 RGI_DT CNV_RGI_CTX_R_DRX RW14 1 CNVi@ 2 75_0402_5%
UART0_TX [11]
UART_RX CNV_RGI_CRX_R_DTX CNV_RGI_CTX_DRX [11]
PCIE_CTX_C_DRX_P14
GND 25 GND_33 UART_RTS
26 RGI_RSP
CNV_BRI_CTX_R_DRX
RW15 1 CNVi@ 2 22_0402_5%
CNV_RGI_CRX_DTX [11]
CC82 1 2 0.1U_0201_10V6K PETp0 27 28 BRI_DT RW16 1 CNVi@ 2 75_0402_5%
+3VS_WLAN [12] PCIE_CTX_DRX_P14 PCIE_CTX_C_DRX_N14 PET_RX_P0 UART_CTS CNV_BRI_CTX_DRX [11]
CC83 1 2 0.1U_0201_10V6K PETn0 29 30 Clink RESET
[12] PCIE_CTX_DRX_N14 PET_RX_N0 CLink_RST EC_TX [33]
GND 31 GND_39 CLink_DATA
32 Clink DATA
EC_RX [33]
[12] PCIE_CRX_DTX_P14 PERp0 33 PER_TX_P0 CLink_CLK
34 Clink CLK
WLAN [12] PCIE_CRX_DTX_N14 PERn0 35 PER_TX_N0 COEX3
36 COEX3
GND 37 GND_45 COEX2
38 COEX_RXD
[10] CLK_PCIE_P3 REFCLKP039 REFCLK_P0 COEX1
40 COEX_TXD
[10] CLK_PCIE_N3 REFCLKN041 REFCLK_N0 SUSCLK(32KHz)
42 C_P32K
SUSCLK [10]
GND 43 GND_51 PERST0#
44 PERST0# PCI_RST# [10,21,31,33,36]
1 @ 2 CLKREQ_PCIE#3_R RWL1 1 2 0_0402_5% CLKREQ_PCIE#3_R
CLKREQ0#45 46 W_DISABLE2#
[10] CLKREQ_PCIE#3 WAKE#_R CLKREQ0# W_DISABLE2# WLBT_OFF# [9]
RW169 10K_0201_5% RWL2 1 @ 2 0_0402_5% PEWake0#47 48 W_DISABLE1#
[33] PCIE_WAKE# PEWAKE0# W_DISABLE1# WL_OFF# [12] WLBT_OFF#
CNV_CTX_DRX_N1
GND 49 GND_57 I2C_DAT
50 A4WP_I2C_DATA 1 @ 2
3
[9] CNV_CTX_DRX_N1 CNV_CTX_DRX_P1
WT_D1N 51 RSVD/PCIE_RX_P1 I2C_CLK
52 A4WP_I2C_CLK
WL_OFF#
RW158 10K_0402_5% 3
[9] CNV_CTX_DRX_P1 WT_D1P 53 RSVD/PCIE_RX_N1 I2C_IRQ

54 A4WP_IRQ#
CLKIN_XTAL
1 @ 2
CNV_CTX_DRX_N0
GND 55 GND_63 RSVD_64
56 REFCLK0
CLKIN_XTAL [10]
RW159 10K_0402_5%
[9] CNV_CTX_DRX_N0 CNV_CTX_DRX_P0
WT_D0N 57 RSVD/PCIE_TX_P1 RSVD_66
58 PERST1#
[9] CNV_CTX_DRX_P0 WT_D0P 59 RSVD/PCIE_TX_N1 RSVD_68
60 CLKREQ1#
CLK_CNV_CTX_DRX_N
GND 61 GND_69 RSVD_70
62 PEWake1#
[9] CLK_CNV_CTX_DRX_N CLK_CNV_CTX_DRX_P
WT_CLKN63 RSVD_71 3.3VAUX_72
64 +3P3A
[9] CLK_CNV_CTX_DRX_P WT_CLKP65 RSVD_73 3.3VAUX_74
66 +3P3A
GND 67 GND_75 68 GND
69 GND1
GND GND2
BELLW_80152-3221
SP070013E00
ME@
Note: The real behavior of BT_DISABLE are

The connectivity module power supply pin shall be BT_DISABLE=LOW, BT=OFF
connected directly to thr rail DSW. BT_DISABLE=HIGH, BT=ON
From
567240_Intel_Wireless_AC_9560_Jefferson_Peak_EPS_Rev1.1
PCH EDS : M.2 CNV Mode Select
GPP_F6/CNV_RGI_DT
0 = Integrated CNVi enable.
1 = Integrated CNVi disable.
+1.8VALW
4 4
CNV_RGI_CTX_R_DRX RW156 1 CNVi@ 2 20K_0201_5%

CNV_BRI_CTX_R_DRX RW157 1 @ 2 20K_0201_5%
100K_0201_5% 2 1 RW26 EC_TX
71.5K_0402_1% 1 2 RW27 CLKREQ_CNV#
N
G
F
F
W
L
A
N
/
B
T
CNVi@
2018/04/09
Compal Secret Data
2019/04/09
Issued Date Deciphered Date Title
WWW.AliSaler.Com
0.2
A B C D E
5 4 3 2 1
+3VS_SSD1
SSD(TYPE M) +3VS_SSD1
0.01U_0402_16V7K
+3VS
0.1U_0201_10V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1 +3VS_SSD1
C18
C19
R10
C20
C21
1 2
@
2 2 2 2
0_0805_5% R11 1 @ 2 0_0402_5%
NGFF_SSD_PEDET [12]
2
R12
D D
10K_0201_5%
JSSD1
1 2
1
3 GND 3P3VAUX 4
5 GND 3P3VAUX 6
[12] PCIE_CRX_DTX_N9 PERn3 NC
1
7 8 D
[12] PCIE_CRX_DTX_P9 9 PERp3 NC 10 NGFF_SSD_PEDET# 2
CC92 1 2 0.22U_0201_6.3V6M PCIE_CTX_C_DRX_N9 11 GND DAS/DSS# 12 G
[12] PCIE_CTX_DRX_N9 1 2 0.22U_0201_6.3V6M PCIE_CTX_C_DRX_P9 13 PETn3 3P3VAUX 14
CC93 Q1
[12] PCIE_CTX_DRX_P9 PETp3 3P3VAUX
15 16 S 2N7002KW_SOT323-3
3
17 GND 3P3VAUX 18 SB000009Q80
[12] PCIE_CRX_DTX_N10 19 PERn2 3P3VAUX 20
[12] PCIE_CRX_DTX_P10 PERp2 NC
21 22
SSD PCIE CC94 1 2 0.22U_0201_6.3V6M PCIE_CTX_C_DRX_N10 23 GND NC 24
[12] PCIE_CTX_DRX_N10 PCIE_CTX_C_DRX_P10 PETn2 NC
CC95 1 2 0.22U_0201_6.3V6M 25 26
[12] PCIE_CTX_DRX_P10 PETp2 NC
27 28
29 GND NC 30
31 32
[12]
[12]
PCIE_CRX_DTX_P11
PCIE_CTX_DRX_N11
CC84
CC85
1
1
2 0.22U_0201_6.3V6M
2 0.22U_0201_6.3V6M
PCIE_CTX_C_DRX_N11
PCIE_CTX_C_DRX_P11
33
35
37
PERp1
GND
PETn1
NC
NC
NC
34
36
38
NGFF_SSD_PEDET#
[12] PCIE_CTX_DRX_P11 39
41
PETp1
GND
DEVSLP
NC
40
42
DEVSLP1 [12]
H : PCIE Interface
SSD SATA
[12]
[12]
SATA_CRX_DTX_P1
SATA_CRX_DTX_N1
43
45
PERn0/SATA-B+
PERp0/SATA-B-
NC
NC
44
46
L : SATA Interface
[12] SATA_CTX_DRX_N1
CC86
CC87
1
1
2 0.22U_0201_6.3V6M
2 0.22U_0201_6.3V6M
SATA_CTX_C_DRX_N1
SATA_CTX_C_DRX_P1
47
49
GND
PETn0/SATA-A-
NC
NC
48
50 PCI_RST# Fellow 543016_SKL_U_Y_PDG_0_9
[12] SATA_CTX_DRX_P1 PETp0/SATA-A+ PERST# PCI_RST# [10,21,30,33,36]
51 52
53 GND CLKREQ# 54 CLKREQ_PCIE#1 [10]
[10] CLK_PCIE_N1 REFCLKN PEWake#
55 56
[10] CLK_PCIE_P1 REFCLKP NC
57 58
GND NC
59 60
NGFF_SSD_PEDET# 61 NC SUSCLK(32kHz) 62
63 PEDET(NC-PCIE/GND-SATA) 3P3VAUX 64
C C
65 GND 3P3VAUX 66
67 GND 3P3VAUX
GND 68
GND1 69
GND2
BELLW_80159-3221
SP070018L00
ME@
+3VS_SSD2
SSD(TYPE M) +3VS_SSD2
0.01U_0402_16V7K
+3VS
0.1U_0201_10V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
1 1 1 1
C22
C23
R13
C24
C25
1 2
2 2 2 2 +3VS_SSD2
0_0805_5%
@
@
R269 1 2 0_0402_5% NGFF_SSD2_PEDET [12]
S540@ S540@ S540@ @
2
JSSD2
1 2 R268
3 GND 3P3VAUX 4
GND 3P3VAUX 10K_0201_5%
5 6
B
7 PERn3 NC 8 S540@
B
1
9 PERp3 NC 10
11 GND DAS/DSS# 12
PETn3 3P3VAUX
1
13 14 D
15 PETp3 3P3VAUX 16 NGFF_SSD2_PEDET# 2
17 GND 3P3VAUX 18 G S540@
19 PERn2 3P3VAUX 20 Q5
21 PERp2 NC 22 S 2N7002KW_SOT323-3
3
23 GND NC 24 SB000009Q80
25 PETn2 NC 26
27 PETp2 NC 28
29 GND NC 30
[12] PCIE_CRX_DTX_P15 31 32
S540@ 33 PERp1 NC 34
CC88 1 2 0.22U_0201_6.3V6M PCIE_CTX_C_DRX_N15 35 GND NC 36
[12] PCIE_CTX_DRX_N15 PCIE_CTX_C_DRX_P15 PETn1 NC
CC89 1 2 0.22U_0201_6.3V6M 37 38
[12] PCIE_CTX_DRX_P15 39 PETp1 DEVSLP 40 DEVSLP2 [12]
S540@ 41 GND NC 42
[12] SATA_CRX_DTX_P2 43 PERn0/SATA-B+ NC 44
[12] SATA_CRX_DTX_N2 PERp0/SATA-B- NC
S540@ 45 46
CC90 1 2 0.22U_0201_6.3V6M SATA_CTX_C_DRX_N2 47 GND NC 48
[12] SATA_CTX_DRX_N2 1 2 0.22U_0201_6.3V6M SATA_CTX_C_DRX_P2 49 PETn0/SATA-A- NC 50 PCI_RST#
CC91
[12] SATA_CTX_DRX_P2 PETp0/SATA-A+ PERST#
51 52
53 GND CLKREQ# 54 CLKREQ_PCIE#2 [10]
S540@
[10] CLK_PCIE_N2 REFCLKN PEWake#
55 56
[10] CLK_PCIE_P2 REFCLKP NC
57 58
GND NC
59 60
NGFF_SSD2_PEDET# 61 NC SUSCLK(32kHz) 62
63 PEDET(NC-PCIE/GND-SATA) 3P3VAUX 64
65 GND 3P3VAUX 66
67 GND 3P3VAUX
GND 68
GND1 69
GND2
A A
BELLW_80159-3221
SP070018L00
ME@

SSD
C 0.2
5 4 3 2 1
A B C D E
+5VALW CA38 1 2 1U_0201_6.3V6M
RA66 1 2 0_0402_5%
Speaker Connector PN
CX11880 +1.8VDD_CODEC +5VDDA_CODEC
Speaker SP02000RR00
RA67 1 2 0_0402_5%
CA31
CA30
@
1U_0201_6.3V6M
1U_0201_6.3V6M
+1.8VDD_CODEC GNDA
EMI wide 40MIL
CA54
CA53
2.2U_0402_6.3V6M
0.1U_0201_10V K X5R
+IOVDD_CODEC +5VDDA_CODEC
1 1
1 1
@ @ +3VDD_CODEC
SPEAK 4 ohm : 40MIL
JSPK1
0.47U_0402_25V6K
2 2
1
SPEAK 8 ohm : 20MIL 6
2 2 5 G2
SPK_L1- 1 2 SPK_L1-_CONN 4 G1
CA42
RA18 @ 0_0603_5%
SPK_L2+ RA19 1 @ 2 0_0603_5% SPK_L2+_CONN 3 4
2 +1.8VS SPK_R1- RA16 1 @ 2 0_0603_5% SPK_R1-_CONN 2 3
39
38
18
29
13
16
37
28
27
2
9
1
UA1 SPK_R2+ RA17 1 @ 2 0_0603_5% SPK_R2+_CONN 1 1
1
Place near Pin18
1000P_0402_50V7K
LDO_V12
HDA_VDDIO
DVDD_IO
VDD18
CP_AVDD18
AVDD5
PVDD5_L
VREFP
PVDD5_R
LDO_AVDD
VREF_DAC
ME@
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1
SP02000VH00
1 1 1 1 CVILU_CI4404M1HRT-NH
EMI@ CA19
EMI@ CA20
EMI@ CA21
EMI@ CA22
RA39
HDA_RST#_R 5.11K_0402_5%
[9] HDA_RST#_R
2
[9] HDA_BIT_CLK_R
2
RESET# 2 2 2 2
@EMI@ @EMI@ CX11880-11Z 32 MICBIASB
CA29 22P_0402_50V8J RA36 2 1 33_0402_5% 40 MICBIASB
41 HDA_BUS_BCLK 35 PLUG_IN_R RA1 1 2 39.2K_0402_1% PLUG_IN
[9] HDA_SYNC_R HDA_BUS_SYNC JSENSE
RA35 1 2 33_0402_5% HDA_SDIN0_R 42
[9]
[9]
HDA_SDIN0
HDA_SDOUT_R 1 HDA_BUS_SDI ESD protection needs to be placed near connector side
HDA_BUS_SDO RA59 1 2 20K_0402_5%
34 Port_B_R
+3VS RA56
RA34
1
1
2 100K_0201_5%
2 0_0402_5% PDB 11
7
SPKR_MUTE#/SPDIF/GPIO1
PORT_B_R
PORT_B_L
33 Port_B_L
ESD
[33] EC_MUTE# Bi-directional EAPD EXT_MIC_RING2
31 +5VS
PC_BEEP 36 PORTD_B_MIC 30 EXT_MIC_SLEEVE
PCBEEP PORTD_A_MIC @ESD@ DA1
6 SPK_R1-_CONN 6 3 SPK_L2+_CONN
MUSIC_REQ/SPDIF/GPIO0 26 HGNDB I/O4 I/O2
EMI@ HGNDB 25 HGNDA
LA1 1 DMIC_CLK_R
2 BLM15PX221SN1D_2P 10 HGNDA
[28] DMIC_CLK DMIC_DAT PORTC_DMIC_CLK1/GPIO2
[28] DMIC_DAT 8 5 2
PORTC_DMIC_DATA1/GPIO3 24 HP_OUTR VDD GND
PORTA_R HP_OUTL
+3VDD_CODEC RA32 1 2 10K_0201_5% 4
5 HSCL/TEST1 PORTA_L
23 Headphone
HSDA/TEST2 SPK_R2+_CONN 4 1 SPK_L1-_CONN
I/O3 I/O1
12 21 AZC099-04S.R7G_SOT23-6
14 LEFT+ CP_VNEG 22
LEFT- CP_VPOS
CA33
CA34
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
15 20
CA32
2.2U_0402_6.3V6M
RIGHT- CP_FLY_N
EP_GND
17 19 1 1 1
RIGHT+ CP_FLY_P
2 2
CX11880-11Z_QFN42_5X5 2 2 2
RF request
43
@ HDA_RST#_R
2 1 CA52 2 @ 1 RA40 SPK_R2+ HDA_BIT_CLK_R
220P_0402_50V7K 10_0402_5% HDA_SYNC_R
@ HDA_SDIN0
2 1 CA51 2 @ 1 RA42 SPK_R1- HDA_SDOUT_R
220P_0402_50V7K 10_0402_5%
2
@
1 CA45 2 @ 1 RA44 SPK_L1- Speaker EMI
220P_0402_50V7K 10_0402_5%
CA35 2.2P_0402_50V8C
CA59 2.2P_0402_50V8C
CA60 2.2P_0402_50V8C
CA61 2.2P_0402_50V8C
CA62 2.2P_0402_50V8C
@ 1 1 1 1 1
2 1 CA46 2 @ 1 RA43 SPK_L2+ EXT_MIC_SLEEVERA62 1 2 100_0402_5% CA55 1 2 1U_0201_6.3V6M SM010009U00 LA2 2 EMI@ 1 BLM15PX221SN1D_2P HGNDB
W=40mils EXT_MIC_RING2 RA63 1 2 100_0402_5% CA56 1 2 1U_0201_6.3V6M SM010009U00 LA3 2 EMI@ 1
220P_0402_50V7K 10_0402_5% W=40mils BLM15PX221SN1D_2P HGNDA
HP_OUTL EMI@ RA22 1 2 47_0402_5% HPOUT_L
2 2 2 2 2 HP_OUTR EMI@ RA23 1 2 47_0402_5% HPOUT_R
Reserved Snubber Networks SD028470A80
Place near Codec Pins
@RF@
@RF@
@RF@
@RF@
@RF@
SD028470A80
470P_0402_50V7K
470P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
2
2
RA24
RA25
10K_0201_5%
10K_0201_5%
1 1
2
CA25
CA26
@
CA50
CA24
1
2 2
1
GNDA GNDA GNDA GNDA GNDA GNDA
EMI@ EMI@ EMI@ EMI@
+5VS --> +5VDDA_CODEC +3VS --> +IOVDD_CODEC +3VS --> +3VDD_CODEC SM010009U00LA5
SM010009U00LA4
2 EMI@
2 EMI@
1
1
BLM15PX221SN1D_2P
BLM15PX221SN1D_2P
RA64 1
RA65 1
2 100_0402_5%
2 100_0402_5%
CA57 1
CA58 1
2 2.2U_0402_6.3V6M
2 2.2U_0402_6.3V6M
Port_B_R
Port_B_L
1
3K_0402_1%
3K_0402_1%
+5VS +5VDDA_CODEC +3VS +3VDD_CODEC
3
wide 40MIL +3VS +IOVDD_CODEC 3
RA60
RA61
RA9 1 @ 2 0_0603_5% RA10 1 @ 2 0_0603_5% RA11 1 @ 2 0_0402_5%
2
MICBIASB
Combo Jack
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 1
(Normal Open)
CA39
CA40
CA37
CA12
CA28 CA13 CA14

2 2 2 2 2 2 2 JHP1
HGNDA / HGNDB , W=60mils
HGNDA 3 RING2_L
HPOUT_L RA28 1 @ 2 0_0402_5% HPOUT_L1 1 HPOUT_L_2
5 HP_PLUG#
Place near Pin3 PLUG_IN 6 GND
Place near Pin13,16,29 Place near Pin9 HPOUT_R RA29 1 @ 2 0_0402_5% HPOUT_R1 2 HPOUT_R_2
HGNDB 4 SLEEVE_L
7 GND
1 1
CA71
2200P_0402_25V7K
YUQIU_PJ784-F07M1BE-A
CA73
100P_0402_50V8J
DC23000FJ00
@ESD@
ESD@
2 1 2 ME@
DA3 SCA00002900
DA4 SCA00004300
L03ESDL5V0CC3-2_SOT23-3
CEST23LC5VB C/A SOT-23

3
2
CA72
100P_0402_50V8J
@ESD@
1
+1.8VS --> +1.8VDD_CODEC 2
CA70
2200P_0402_25V7K
ESD@
2
@ESD@
ESD@
RA57 1 @ 2 0_0402_5%
+1.8VS +1.8VDD_CODEC
RA31 1 @ 2 0_0402_5%
PC Beep RA14 1 @ 2 0_0402_5%
1
0.1U_0201_10V K X5R
1 1 RA15 1 @ 2 0_0402_5%
1 2 1 2 PC_BEEP
CA41
CA43
1U_0201_6.3V6M
[33] BEEP#
4 RA12 4.7K_0402_5% CA15 0.1U_0201_10V K X5R 4
1 2 1 2 RA58 1 @ 2 0_0402_5%
2 2 [9] HDA_SPKR
RA41 4.7K_0402_5% CA44 0.1U_0201_10V K X5R
GND GNDA
Place near Pin38

HD Audio Codec_CX11880
Custom 0.2
Date: Tuesday, October 23, 2018 Sheet 32 of 53
WWW.AliSaler.Com
A B C D E
+3VL +3VL +5VALW
L1
+3VALW_EC
1 2 +EC_VCCA
BLM15AX601SN1D _2P R14 1 @ 2 0_0805_5% +3VALW_EC USB_EN# R15 1 2 10K_0201_5%
1
SM01000KL00 C26
1 1 100P_0402_50V8J
C27 C28 1 1 1 1 @
2 VCIN1_BATT_TEMP C32
0.1U_0201_10V K X5R
C29
0.1U_0201_10V K X5R
C30
1000P_0402_50V7K
C31
1000P_0402_50V7K
C33
0.1U_0201_10V K X5R 1000P_0402_50V7K 1 2 100P_0402_50V8J
@
2 2 VCIN1_AC_IN C34 1 2 100P_0402_50V8J
L2 2 2 @ 2 @ 2 +EC_VCCA
1 2 ECAGND R16 1 @ 2 4.7K_0402_5%
BLM15AX601SN1D _2P
SM01000KL00
M12
K12
B11
K7
J4
J7
ECAGND U11
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
EC_VCC0
+3VS
M2 M9 VCCST_PWRGD
GATEA20/GPIO00 PWM0/GPIO0F VCCST_PWRGD [10] EC_SMB_CK4
L2 M8 R17 1 C340@ 2 1K_0201_5%
KBRST#/GPIO01 PWM1/GPIO10 BEEP# [32] EC_SMB_DA4
M3 M10 R18 1 C340@ 2 1K_0201_5%
[8] SERIRQ SERIRQ FANPWM0/GPIO12 EC_FAN_PWM2 [35]
K4 N10
EMI [8] LPC_FRAME#

[8] LPC_AD3
[8] LPC_AD2
N3
M4
K5
LPC_FRAME#
LPC_AD3
LPC_AD2 PWM Output
FANPWM1/GPIO13
B13
EC_FAN_PWM1 [35]
+3VS
[8] LPC_AD1 LPC_AD1 BATT_TEMP/AD0/GPIO38 VCIN1_BATT_TEMP [41,42]

@EMI@ @EMI@ N4 LPC & MISC A13
[8] LPC_AD0 LPC_AD0 AD1/GPIO39 I2C_2_SCL
C35 2 1 22P_0402_50V8J R19 2 1 10_0402_1% B12 R20 1 C340@ 2 2.7K_0402_5%
ADP_I/AD2/GPIO3A ADP_I [42] I2C_2_SDA
N5 AD Input A12 R21 1 C340@ 2 2.7K_0402_5%
[8] CLK_LPC_EC PCI_RST# CLK_PCI_EC AD3/GPIO3B CUST_TEMP3 [35]
M5 D8
[10,21,30,31,36] PCI_RST# EC_RST# PCIRST#/GPIO05 AD4/GPIO42 TS_DISABLE# [28]
+3VALW_EC R22 1 @ 2 47K_0402_5% K13 D7
EC_RST# IMON/AD5/GPIO43 CUST_TEMP2 [35]
N6
[6] EC_SCI# EC_SCI#/GPIO0E
2 1 @ 2 PM_CLKRUN#_R M6 +3VALW
[8] PM_CLKRUN# CLKRUN#/GPIO1D
0.1U_0201_10V K X5R
C36
R23 0_0402_5%
B10 NOVO# EC_PCIE_WAKE# R24 1 @ 2 4.7K_0402_5%
BA0/GPIO3C NOVO# [36]
DA Output A9
1 DA1/GPIO3D TP_DISABLE# [34]
KSI0 E9 A10
KSI0/GPIO30 DA2/GPIO3E USB_EN# DGPU_PWR_EN [11,26]
KSI1 E12 B9
KSI1/GPIO31 DA3/GPIO3F USB_EN# [36]
KSI2 E13
KSI3 D12 KSI2/GPIO32 D6 I2C_2_SCL LID_SW# R26 1 2 100K_0201_5%
KSI3/GPIO33 PSCLK1/GPIO4A I2C_2_SDA I2C_2_SCL [11]
KSI4 D13 E7
KSI4/GPIO34 PSDAT1/GPIO4B EC_SMB_CK4 I2C_2_SDA [11] TAB_SW#
KSI5 C12 E5 R27 1 2 100K_0201_5%
KSI5/GPIO35 PSCLK2/GPIO4C EC_SMB_DA4 EC_SMB_CK4 [28,35]
KSI6 C13 PS2 Interface D5
KSI6/GPIO36 PSDAT2/GPIO4D EC_SMB_DA4 [28,35]
KSI7 E10 A5
KSI7/GPIO37 PSCLK3/GPIO4E TAB_SW# USB_CHG_ILIM_SEL [36] EC_MUTE#
KSO0 J13 B5 R28 1 @ 2 10K_0201_5%
KSO0/GPIO20 PSDAT3/GPIO4F TAB_SW# [28]
KSO1 J12
KSO2 H12 KSO1/GPIO21
KSO[0..15] KSO3 H13 KSO2/GPIO22 B1
[34] KSO[0..15] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 ENBKL [6] EC_SPI_CS0#
KSO4 J10 A1 R30 1 2 100K_0201_5%
KSI[0..7] KSO4/GPIO24 WOL_EN/GPXIOA01 SYS_PWROK [10]
KSO5 J9 C1
[34] KSI[0..7] KSO6 H9 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 C2 ME_EN [9] Follow ENE suggestion for Auto load
KSO7 H10 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH1 [41]
KSO7/GPIO27 SPI Device Interface
KSO8 G13
KSO9 G12 KSO8/GPIO28 K2 1
KSO9/GPIO29 SPIDI/GPIO5B EC_SPI_MISO [8]
ESD
0.1U_0201_10V K X5R
C37
KSO10 F13 J2
KSO10/GPIO2A SPIDO/GPIO5C EC_SPI_MOSI [8]
KSO11 F12 SPI Flash ROM SPICLK/GPIO58 L1
KSO11/GPIO2B EC_SPI_CLK [8]
KSO12 G10 N2
KSO12/GPIO2C SPICS#/GPIO5A EC_SPI_CS0# [8] 2
@ESD@
KSO13 G9
KSO14 F10 KSO13/GPIO2D
KSO15 F9 KSO14/GPIO2E B6
KSO15/GPIO2F ENBKL/AD6/GPIO40 CUST_TEMP1 [35]
D9 B7
[34] KB_MUTLI_KEY KSO16/GPIO48 PECI_KB930/AD7/GPIO41 EC_MUTE# SENSOR_EC_INT [11]
D10 B4
+3VL [24,42] GPU_PROHOT# KSO17/GPIO49 FSTCHG/GPIO50 BATT_CHG_LED# EC_MUTE# [32]
A4
BATT_CHG_LED#/GPIO52 BATT_CHG_LED# [34]
B3
EC_SMB_CK1 EC_SMB_CK1 CAPS_LED#/GPIO53 CAPS_LED# [34] +3VL
R31 1 2 2.2K_0402_5% A8 GPIO A3
EC_SMB_DA1 [41,42] EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 BATT_LOW_LED# PWR_LED# [36]
R32 1 2 2.2K_0402_5% A7 A2
[41,42] EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_LOW_LED# [34]
B8 B2 SYSON
[8,24,35] EC_SMB_CK2
A6 EC_SMB_CK2/GPIO46 SM Bus SYSON/GPIO56 H5 SYSON [13,44]
NOVO# R33 1 2 100K_0201_5%
[8,24,35] EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON [47]
M1
PM_SLP_S4#/GPIO59 AC_PRESENT [10,24] KB_MUTLI_KEY R25 1 2 10K_0201_5%
J5 D4 ON/OFF# R34 1 2 100K_0201_5%

[10] PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# [10]
N9 D1
[36] USB_CHG_CTL1 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 3V/5VALW_PG [36,39,43,45]
L13 D2
[10] EC_CLEAR_CMOS# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 VCOUT1_PROCHOT#
K6 E2
[36] USB_CHG_CTL3 GPIO0A H_PROCHOT#_EC/GPXIOA06 VCOUT1_PROCHOT# [42]
N7 E4
+3VS [36] USB_CHG_EN GPIO0B VCOUT0_PH/GPXIOA07 VCOUT0_MAIN_PWR_ON [43]
M7 GPO BKOFF#/GPXIOA08 E1 @
[36] USB_CHG_CTL2 GPIO0C BKOFF# [28]
N8 GPIO F4 SUSP# R35 1 2 100K_0201_5%
[36] USB_CHG_STATUS# GPIO0D PBTN_OUT#/GPXIOA09 TYPEC_LIMIT_CTL1 [38]
K8 F2
EC_FAN_SPEED1 [34] KB_BL_PWM EC_FAN_SPEED2 M11 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 EC_PCIE_WAKE# CNVi_PWR_EN# [30] PCIE_WAKE#
R36 1 2 10K_0201_5% F1 1 2
EC_FAN_SPEED2 [35] EC_FAN_SPEED2 EC_FAN_SPEED1 N11 FANFB0/GPIO14 SA_PGOOD/GPXIOA11 PCIE_WAKE# [30]
R38 1 2 10K_0201_5% R37 0_0402_5%
[35] EC_FAN_SPEED1 FANFB1/GPIO15
K10
[30] EC_TX EC_TX/GPIO16
K9 F5
GPU_PROHOT# [30] EC_RX PCH_PWROK EC_RX/GPIO17 AC_IN/GPXIOD01 VCIN1_AC_IN [42]
R39 1 @ 2 10K_0201_5% N12 G1
[10] PCH_PWROK PWR_BATT_LOW# M13 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON [43]
G5 ON/OFF# ON/OFF# [36,39]
[36] PWR_BATT_LOW# VR_PWRGD SUSP_LED#/GPIO19 ON/OFF/GPXIOD03
L12 GPI LID_SW#/GPXIOD04 H1
[47] VR_PWRGD NUM_LED#/GPIO1A LID_SW# [35] VCOUT1_PROCHOT#
G4 SUSP# R40 1 2 0_0402_5%
SUSP#/GPXIOD05 SUSP# [13,39,44]
H4
GPXIOD06 H2 PECI 1 2
PBTN_OUT# PECI_KB9012/GPXIOD07 H_PECI [6]
J1 R41 43_0402_1% R42 1 2 0_0402_5% H_PROCHOT# [6]
+3VALW [10] PBTN_OUT# XCLKI/GPIO5D VCC_IO2 [47] VR_HOT#
K1 N1 1 @ 2 +3VALW_EC
[10,42,45] PM_SLP_S4# XCLKO/GPIO5E V18R R43 0_0402_5% 1
AGND
GND0
1
GND
R44 1 @ 2 10K_0201_5% PBTN_OUT# C39 C38 ESD@

4.7U_0402_6.3V6M 100P_0402_50V8J
2
N13
G2
ECAGND A11
KB9022GD_VFBGA124 2
ESD
ESD
Keyboard BackLight_SELECT 3V/5VALW_PG PCI_RST# PCH_PWROK VR_PWRGD VCCST_PWRGD BATT_CHG_LED# BATT_LOW_LED# SYSON
Funct i on KBL_ID
1 1 1
ESD@
@ESD@
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
C40
0.1U_0201_10V K X5R
C41
C42
C43
C44
C45
C46
C47
KBL 1 1 1 1 1 1
NO KBL 0 2 2 2
SE00000SV00
SE00000SV00
ESD@
ESD@
@ESD@
@ESD@
@ESD@
@ESD@
2 2 2 2 2
PH on KB side
KB_BL_PWM
1
R45
E
C
K
B
9
0
2
2
Q
D
10K_0201_5%
NOKBL@
2
Custom 0.2
Finger printer Keyboard
JFP1
1
2 1
3 2
4 3
5 4
6 5 9
[12] USB20_P7 6 G1
7 10
[12] USB20_N7 1 2 0_0402_5% 8 7 G2
+3VS RFP1 @
8 +5VS
RFP2 1 2 0_0402_5%
+3VALW
ME@ KSI[0..7] JKB1
KSI[0..7] [33]
SP01001AE00
ACES_51522-00801-001 KSO[0..15] RTP4 1 2 0_0402_5% 32
KSO[0..15] [33] CAPS_LED#_R 32
R265 2 1 866_0402_5% 31
[33] CAPS_LED# 30 31
KSO15
CFP1 KSO10 29 30
29
C229
0.1U_0201_10V K X5R KSO11 28 34
KSO14 27 28 GND 33
1 27 GND
3
KSO13 26
ESD@ KSO12 25 26
25
0.1U_0201_10V K X5R
DFP1 KSO3 24
ESD@ 2 KSO6 23 24
CEST23LC5VB C/A SOT-23 KSO8 22 23
SCA00004300 KSO7 21 22
1
KSO4 20 21
KSO2 19 20
KSI0 18 19
KSO1 17 18
KSO5 16 17
ESD KSI3
KSI2
KSO0
15
14
13
16
15
14
KSI5 12 13
KSI4 11 12
KSO9 10 11
KSI6 9 10
KSI7 8 9
8
Touch Pad
KSI1 7
6 7
5 6
4 5
3 4
+3VS +3VS 2 3
[33] KB_MUTLI_KEY 2
RTP1 1
1 2 1
JXT_FP257H-032S10M
0_0402_5% @ SP01002FA00
CTP1 ME@
1
0.1U_0201_10V K X5R
RTP2
4.7K_0402_5%
2
JTP1
+TP_VCC 8
7 8 10
[11] I2C_0_SCL 7 G2
6 9
[11] I2C_0_SDA 5 6 G1
4 5
3 4
2 3
[9] TP_INT# 2
1
[33] TP_DISABLE# 1
ME@
100P_0402_50V8J
100P_0402_50V8J
1 1 ACES_51522-00801-001
2
3
CTP2
CTP3
SP01001AE00
@
@ DTP1
2 2 @ESD@
1
L03ESDL5V0CC3-2_SOT23-3
ESD
Keyboard Backlight BATT LED

LED1
+5VS +5VS_KBL White
RS1
+5VALW BATT_CHG_LED# 1 @ 2 BATT_CHG_LED#_R 2
[33] BATT_CHG_LED#
KBL@ JKBL1 412_0402_1%
QKBL1 1 RS3 1 RS2 1 2 0_0402_5%
1 +VL
2
KBL@ 2 BATT_LOW_LED# 1 @ 2 BATT_LOW_LED#_R 3

2 [33] BATT_LOW_LED#
S
RKBL1 3 1 3 5 523_0402_1%
10K_0201_5% 4 3 GND 6
ME2301DC-G_SOT23-3 4 GND Amber
CKBL2
CKBL1
0.1U_0201_10V K X5R
RS1 RS1
10U_0402_6.3V6M
JXT_FP202DH-004M10M SC50000FV10
G
1 2
1
RKBL2 SP010022U00 C340@ S540@ HT-210UD5-BP5_AMBER-WHITE

[33] KB_BL_PWM 1 2 ME@ 330_0402_1% 604_0402_1% C340@
30K_0402_1% 2@ 1
KBL@
1 RS3 RS3
KBL@ KBL@
CKBL3 C340@ S540@
0.01U_0402_16V7K 330_0402_1% 523_0402_1% LED2
2 White
1
3
Amber
SC50000FV10
HT-210UD5-BP5_AMBER-WHITE
S540@

2017/5/3 2019/04/09 Title
Issued Date Deciphered Date KBL/KBD/LED/TP/HS Conn.
WWW.AliSaler.Com
C 0.2
5 4 3 2 1
THERMISTOR
+3VS_THM
+3VS +3VS_THM
RTH3 1 @ 2 0_0402_5% 1
D D
CTH1
0.1U_0201_10V6K
2 TOP DDR
BOTTOM VCORE REMOTE1+ Close UTH1 UTH1
+3VS_THM
QTH1 1 G-Sensor
1
1
C CTH3 1 10 EC_SMB_CK2
VCC SCL EC_SMB_CK2 [8,24,33]
MMBT3904WH_SOT323-3 2 2200P_0402_25V7K CTH4
2 9 EC_SMB_DA2 RTH2
B @ 2200P_0402_25V7K REMOTE1+ @
EC_SMB_DA2 [8,24,33] 10K_0402_5%
2
E 2 DP1 SDA
3
REMOTE1- REMOTE1- 3 8
2
DN1 ALERT#
REMOTE2+ REMOTE2+ 4 7 THM_ALERT#
BOTTOM GPU DP2 THERM# +3VS
REMOTE2- 5 6 +3VS_GS_R
1 DN2 GND
1
C CTH5 UGS1
QTH2 2 2200P_0402_25V7K CT114 RGS1 1 2 0_0402_5% +3VS_GS_R 7 3
VDD VDDIO
0.1U_0201_10V K X5R
B @ 2200P_0402_25V7K F75303M_MSOP10 10 11
MMBT3904WH_SOT323-3E
2
2 @ CSB PS
SA000046C00
3
REMOTE2- 2 5 4
6 INT1 NC
Address 1001_101xb INT2
CGS1
C340@ 1
2 SDO 9
REMOTE1,2 (+/-) : 1 [28,33] EC_SMB_DA4 12 SDx GND 8
[28,33] EC_SMB_CK4 SCx GNDIO
Trace width/space:10/10 mil BMA253_LGA12
Trace length:<8" SA000096W00
C340@
SMB Address: 0X18
C
DDR4 GPU_CHOKE Charger CHOKE C
+EC_VCCA +EC_VCCA +EC_VCCA

1
1
RTS1 RTS2 RTS3
16.5K_0402_1% 16.5K_0402_1% 16.5K_0402_1%
2
2
[33] CUST_TEMP1 [33] CUST_TEMP2 [33] CUST_TEMP3
1
1
RTS4 RTS5 RTS6
100K +-1% 0402 B25/50 4250K 100K +-1% 0402 B25/50 4250K 100K +-1% 0402 B25/50 4250K
2
2
ECAGND ECAGND ECAGND
+5VS
FAN RF1 2 1 0_0603_5% +5VS_FAN1
B B
1 2
@RF@
CF3 CF1 JFAN1
6.8P_0402_50V8C 10U_0402_6.3V6M 1
2 1 2 1
[33] EC_FAN_PWM1 2
3
EC_FAN_PWM1 [33] EC_FAN_SPEED1 4 3
5 4
EC_FAN_SPEED1 6 G1
G2
1
CVILU_CI4404M1HRT-NH +3VALW UHS1 UHS2
1 1
GND
GND
@RF@ @RF@ SP02000VH00 TCS40DPR_SOT23F3 TCS40DPR_SOT23F3
CF4 CF5 ME@ S540@ +3VALW C340@
VOUT
VOUT
6.8P_0402_50V8C 6.8P_0402_50V8C
VCC
VCC
2 2
3
+5VS
RF2 2 1 0_0603_5% +5VS_FAN2 LID_SW# LID_SW#

LID_SW# [33]
1 2
@RF@
CF6 CF2 JFAN2 2 1 2 1
6.8P_0402_50V8C 10U_0402_6.3V6M 1 CHS2 CHS3 CHS4
2 1 2 1 0.1U_0201_10V K X5R CHS1 0.1U_0201_10V K X5R 10P_0402_50V8J
[33] EC_FAN_PWM2 2
3 S540@ 10P_0402_50V8J C340@ C340@
[33] EC_FAN_SPEED2 4 3 1 2 S540@ 1 2
5 4
6 G1
G2
CVILU_CI4404M1HRT-NH
SP02000VH00
EC_FAN_PWM2 ME@
EC_FAN_SPEED2
A A
1 1
@RF@ @RF@
CF8 CF7
6.8P_0402_50V8C 6.8P_0402_50V8C
2 2

FAN / Thermal Senser
C 0.2
5 4 3 2 1
A B C D E F G H
USB3.0_Port (AOU_Port)
USB Charge switch
+VL +5VALW_CHG +5VALW
+5VALW_CHG
+3VL
+5VALW_USB1
1
+3VL
R270
10K_0201_5%
10K_0201_5%
R108 R110
NON_ONEKEY@
1
10U_0603_6.3V6M
C48
10U_0603_6.3V6M
C49
10U_0603_6.3V6M
C50
1 1 1 ME2301DC-G_SOT23-3
@
1
10K_0201_5%
D
R111 1 @ 2 0_0603_5% 3 1
10U_0603_6.3V6M
C51
10U_0603_6.3V6M
C52
1 Q2 1
2
2 2 2
2
USB_CHG_CTL2
G
2
U12
1 80mil 1
2
1 12 2 2
9 IN OUT 10 USB20_P1_C
[33] USB_CHG_STATUS# USB_OC0#_R STATUS# DP_IN USB20_N1_C
R112 2 @ 1 0_0402_5% 13 11
[12] USB_OC0# FAULT# DM_IN +VL
4 2
[33] USB_CHG_ILIM_SEL ILIM_SEL DM_OUT USB20_N1 [12]
5 3 NON_ONEKEY@
[33] USB_CHG_EN EN DP_OUT USB20_P1 [12]
6 15 R113 1 2 2.7M_0402_1% R115
[33] USB_CHG_CTL1 CTL1 ILIM_LO
7 16 R114 1 2 24.9K_0402_1% 1 2
[33] USB_CHG_CTL2 CTL2 ILIM_HI
8 14
[33] USB_CHG_CTL3 CTL3 GND 17 100K_0201_5%
T-PAD
0.1U_0201_10V K X5R
C53
1
1
D
10K_0201_5%
R117
2N7002K_SOT23-3
NON_ONEKEY@
Q3
SN1702001RTER_WQFN16_3X3 2
[33,39,43,45] 3V/5VALW_PG
G @
S 2
3
0.1U_0201_10V K X5R
C54
1
@
2
+5VALW +5VALWP
22U_0603_6.3V6M
C55
22U_0603_6.3V6M
C56
22U_0603_6.3V6M
C57
10U 6.3V M X5R 0402

C58
10U 6.3V M X5R 0402

C59
22U_0603_6.3V6M
C63
22U_0603_6.3V6M
C64
1 1 1 1 1 1 1
@ @ @ @ @ @ @
2 2 2 2 2 2 2
2 For USB Charger to improve +5VALWP power ripple 2
USB3.0_Port I/O CONN [12] USB3_CRX_DTX_P1

+3VALW 1
2
JIO1
1
3 2
[12] USB3_CRX_DTX_N1 3
4
[12] USB3_CTX_DRX_P1 4
5
[12] USB3_CTX_DRX_N1 5
6
USB20_N1_C 7 6
USB20_P1_C 8 7
9 8
10 9
[12] USB3_CRX_DTX_P2 10
[12] USB3_CRX_DTX_N2 11
12 11
[12] USB3_CTX_DRX_P2 12
13
[12] USB3_CTX_DRX_N2 13
14
15 14
[12] USB20_N2 15
16
[12] USB20_P2 16
+5VALW_USB1 17
18 17
19 18
20 19
21 20
22 21
+5VALW_USB2 22
23
24 23
25 24
26 25
+3VS 26
3
27 3
28 27
[10,21,30,31,33] PCI_RST# PCIE_CTX_C_DRX_P13 28
C236 1 2 0.1U_0201_10V6K 29
[12] PCIE_CTX_DRX_P13 PCIE_CTX_C_DRX_N13 29
C237 1 2 0.1U_0201_10V6K 30
[12] PCIE_CTX_DRX_N13 30
31
[12] PCIE_CRX_DTX_P13 31
32
[12] PCIE_CRX_DTX_N13 32
33
CLK_PCIE_P4_R 34 33
[10] CLK_PCIE_P4 CLK_PCIE_N4_R 34
35
[10] CLK_PCIE_N4 35
[10] CLKREQ_PCIE#4 36
NOVO# 37 36
[33] NOVO# 37
38
[33,39] ON/OFF# 38
+VL 39
PWR_LED# 40 39
[33] PWR_LED# PWR_BATT_LOW# 40
[33] PWR_BATT_LOW# 41
42 41 43
42 GND 44
GND
2A/Active Low ACES_50501-04201-001
SP01001O300
+5VALW +5VALW_USB2 ME@
U9 W=80mils
W=80mils 1
5 OUT
IN 2
USB_EN# 4 GND
[33] USB_EN# EN USB_OC1#_R
3 1 @ 2 R122
OCB USB_OC1# [12]
1 0_0402_5%
C66 G524B2T11U_SOT23-5
0.1U_0201_10V6K SA00007BW00
2
4 4
WWW.AliSaler.Com
2018/04/09 2019/04/09 Title
Issued Date Deciphered Date IO board
Custom 0.2
A B C D E F G H
5 4 3 2 1
USB3.0_Port
TI @ UT4 TI@ RT48 TI@ RT22 TI@ RT49 TI@ RT50 TI@ RT51 TI@
SN65LVPE502ARGER 0_0402_5% 0_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
D D
PA@ UT4 PA@ RT25 PA@

PS8713BTQFN24GTR2-A2 4.7K_0402_5%
PE@ UT4 PE@ RT49 PE@ RT24 PE@ RT28 PE@

PI3EQX7502AIZDEX TQFN24 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
ZZZ X76_TI@ ZZZ X76_PA@ ZZZ X76_PE@

+3VALW +3VALW
USB3.0 re-driver_TI USB3.0 re-driver_PARADE USB3.0 re-driver_PERICOM
0.01U_0402_16V7K
0.1U_0201_10V K X5R
X7680638L08 X7680638L07 X7680638L09
1 1
CT31
CT32
USB3 Re-driver
UT4 @
1 2 2
VDD 13
VDD
P3_A_EQ1 4
P3_A_DE0 3 NC 15 P3_B_EQ1
P3_A_EQ0 2 DE_A NC 16 P3_B_DE0
To CPU P3_A_DE1 6 EQ_A DE_B 17 P3_B_EQ0
NC EQ_B 18 P3_B_DE1
NC
C CT29 2 1 0.1U_0201_10V K X5R USB3_CRX_C_RD_DTX_P3 12 19 USB3_CRX_RD_DTX_P3 C
[12] USB3_CRX_DTX_P3 USB3_CRX_C_RD_DTX_N3 11 TXB+ RXB+ USB3_CRX_RD_DTX_N3 USB3_CRX_RD_DTX_P3 [38]
CT30 2 1 0.1U_0201_10V K X5R 20
USB3_CRX_RD_DTX_N3 [38]
[12] USB3_CRX_DTX_N3 TXB- RXB-
CT27 2 1 0.1U_0201_10V K X5R USB3_CTX_C_RD_DRX_P3 9 22 USB3_CTX_RD_DRX_P3

[12] USB3_CTX_DRX_P3 USB3_CTX_C_RD_DRX_N3 8 RXA+ TXA+ USB3_CTX_RD_DRX_N3 USB3_CTX_RD_DRX_P3 [38]
[12] USB3_CTX_DRX_N3 CT28 2 1 0.1U_0201_10V K X5R 23
RXA- TXA- USB3_CTX_RD_DRX_N3 [38]
5 PD#_1
10 RXD_EN 7
21 EN_A# NC 14 TEST3
EN_B# NC I2C_EN1
4.99K_0402_1%
25 24
GPAD NC
1
4.7K_0402_5%
RT46
RT47
PI3EQX7502AIZDEX_TQFN24_4X4
@ @
2
+3VALW +3VALW
+3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW
1
B B
1
RT29 RT45
RT56 RT55 RT52 RT53 RT23 RT25 RT27 RT54 4.7K_0402_5% 4.7K_0402_5%
4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% @ @
2
@ @ @ @ @ @ @ @
2
P3_B_EQ0 P3_B_EQ1 P3_B_DE0 P3_B_DE1 P3_A_EQ0 P3_A_EQ1 P3_A_DE0 P3_A_DE1 TEST3 PD#_1
1
RT49 RT50 RT51 RT22 RT24 RT26 RT28 RT48 +3VALW

4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
@ @ @ @ @ @ @ @
1
2
RT30
4.7K_0402_5%
@
2
I2C_EN1
A A
T
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-
C
U
S
B
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Custom 0.2
5 4 3 2 1
5 4 3 2 1
TYPE-C - CC+MUX (RTS5448-GR) TYPE-C CONNECTOR

Over Current Protection Pin:
+5VALW +VCON_IN_5448 +5VALW +5V_IN_5448 If Over Current Occurred - From High to Low.
+VBUS_5448 +VBUS_5448_R
JT1 @
1 2
RT1 1 2 0_0603_5% RT2 1 2 0_0603_5% +5VALW +VBUS_5448 1 2
JUMP_43X79
+5V_IN_5448
CT22 1 1 CT21
UT3
10U_0402_6.3V6M 10U_0402_6.3V6M
CC1_5448_CONN CC2_5448_CONN SE00000UD00 B1 C2 SE00000UD00
20V_PRTCT@ 2 C1 VINT VBUS D1 2 20V_PRTCT@
1 VINT VBUS
D +VCON_IN_5448 +LDO_3V3_5448 UT2 CT12 B2 D2 D
5 1 10U_0402_6.3V6M VINT VBUS
IN OUT
1
1
SE00000UD00
CT3 CT4 OCP_DET_5448_R 3 2 A3
220P_0402_50V8J 220P_0402_50V8J VBUS_EN_5448 4 FLAG 2 +VBUS_5448 A2 ILIM
1 1 1 1
2
2
CT2 CT1 CT5 CT6 EN(#EN) GND FAULT B3
0.1U_0201_10V K X5R 4.7U_0402_6.3V6M 10U_0402_6.3V6M 0.1U_0201_10V K X5R G517G1TO1U_TSOT23-5 A1 GND C3
SE00000SO00 SE00000UD00 SA00009XD00 EN GND D3
GND
1
2 2 2 2
1
1
CT11 NX5P3090UK_WLCSP12 RT15
10U_0402_6.3V6M RT14 SA00009LF00 16K_0402_1%
SE00000UD00 10K_0201_5% 20V_PRTCT@ 20V_PRTCT@
13
19
20
UT1 2 20V_PRTCT@
2
USB3_MRX_DTX_P2 CT23 1 2 0.1U_0402_6.3V7K USB3_MRX_C_DTX_P2 1
LDO_3V3
VCON_IN
5V_IN
2
USB3_MRX_DTX_N1 CT24 1 2 0.1U_0402_6.3V7K USB3_MRX_C_DTX_N1 2 C_RX2_1N/2P 14 CC2_5448_CONN
USB3_MRX_DTX_P1 CT25 1 2 0.1U_0402_6.3V7K USB3_MRX_C_DTX_P1 3 C_RX1_1P/2N CC2 15 VBUS_EN_5448
CT19 1 2 0.1U_0201_10V6K USB3_CRX_C_MTX_N3 4 C_RX1_1N/2P VBUS_EN 16 OCP_DET_5448
[37] USB3_CRX_RD_DTX_N3 USB3_CRX_C_MTX_P3 SSRX_1P/2N OCP_DET VMON_5448
CT20 1 2 0.1U_0201_10V6K 5 17
[37] USB3_CRX_RD_DTX_P3 USB3_CTX_C_MRX_N3 SSRX_1N/2P VMON
CT18 1 2 0.1U_0201_10V6K 6 INPUT 18 RT3 1 2 6.2K_0402_1%
[37] USB3_CTX_RD_DRX_N3 USB3_CTX_C_MRX_P3 SSTX_1P/2N REXT
CT17 1 2 0.1U_0201_10V6K 7 Only limit on 0.9A
[37] USB3_CTX_RD_DRX_P3 USB3_MTX_C_DRX_N1 USB3_MTX_DRX_N1 SSTX_1N/2P
USB3_MTX_C_DRX_P1
CT7 1 2 0.1U_0201_10V6K
USB3_MTX_DRX_P1
8
C_TX1_1P/2N TYPEC_LIMIT_CTL1 20 Volts Protection Circuit
CT8 1 2 0.1U_0201_10V6K 9 21
USB3_MTX_C_DRX_P2 USB3_MTX_DRX_P2 C_TX1_1N/2P RP_SEL_M1 TYPEC_LIMIT_CTL2 TYPEC_LIMIT_CTL1 [33]
CT9 1 2 0.1U_0201_10V6K 10 22
USB3_MTX_C_DRX_N2 CT10 1 2 0.1U_0201_10V6K USB3_MTX_DRX_N2 11 C_TX2_1N/2P RP_SEL_M0 23 DIR_SET
C_TX2_1P/2N NC
1
CC1_5448_CONN 12 24 USB3_MRX_C_DTX_N2 CT26 1 2 0.1U_0402_6.3V7K USB3_MRX_DTX_N2
CC1 C_RX2_1P/2N 25 RT17 +VBUS_5448_R +VBUS_5448_R
GND 10K_0201_5%
USB3_MRX_DTX_P2 RT18 1 2 220K_0402_5%
USB3_MRX_DTX_N1 RT19 1 2 220K_0402_5%
2
USB3_MRX_DTX_P1 RT20 1 2 220K_0402_5% RTS5448-GR QFN 24P TYPE-C JUSBC1
USB3_MRX_DTX_N2 RT21 1 2 220K_0402_5% SA0000AXR00 A1 B12
GND GND
USB3_MTX_C_DRX_P1 A2 B11 USB3_MRX_DTX_P1
USB3_MTX_C_DRX_N1 A3 SSTXP1 SSRXP1 B10 USB3_MRX_DTX_N1
SSTXN1 SSRXN1
CT13 1 2 0.47U_0402_25V6K A4 B9 CT14 1 2 0.47U_0402_25V6K
VBUS VBUS
CC1_5448_CONN A5 B8
CC1 SBU2
USB20_P3_R USB20_N3_R
MUX MISC.
A6 B7
USB20_N3_R A7 DP1 DN2 B6 USB20_P3_R
DN1 DP2
C CC2_5448_CONN C
A8 B5
SBU1 CC2
CT15 1 2 0.47U_0402_25V6K A9 B4 CT16 1 2 0.47U_0402_25V6K
VBUS VBUS
USB3_MRX_DTX_N2 A10 B3 USB3_MTX_C_DRX_N2
USB3_MRX_DTX_P2 A11 SSRXN2 SSTXN2 B2 USB3_MTX_C_DRX_P2
+LDO_3V3_5448 +LDO_3V3_5448 SSRXP2 SSTXP2
1 A12
GND GND
B1 ESD
2
CT33 +
2
150U_B2_6.3VM_R35M 1 4 DT5
RT12 RT13 SGA00001E10 2 GND GND 5 PESD24VS2UT_SOT23-3
10K_0201_5% 10K_0201_5% DIS@ 2 3 GND GND 6 SCA00000R00
GND GND ESD@
1
1
TYPEC_LIMIT_CTL1 TYPEC_LIMIT_CTL2 DEREN_560Q10-002H
SP061806210
ME@
1
RT4 @ RT5 @
10K_0201_5% 10K_0201_5%
2
USB2.0
Rp Configuration
SM070005U00
DLM0NSN900HY2D_4P
4 3 USB20_P3_R
[12] USB20_P3 4 3
1 2 USB20_N3_R
+VBUS_5448 +5V_IN_5448 +5V_IN_5448 [12] USB20_N3 1 2
LT1 EMI@
1
B B
RT6 RT7 RT8
ESD COMPONENTS
200K_0402_1% 4.7K_0402_5% @ 4.7K_0402_5%
2
VMON_5448 VBUS_EN_5448 OCP_DET_5448 1 2 OCP_DET_5448_R

RT16 0_0603_5%
1
1
RT11 @
RT9 RT10 10K_0201_5% DT1
10K_0402_1% 10K_0201_5% USB3_MTX_C_DRX_P1 9 10 1 USB3_MTX_C_DRX_P1
1
2
USB3_MTX_C_DRX_N1 8 2 USB3_MTX_C_DRX_N1
9 2
2
USB3_MTX_C_DRX_N2 7 7 4 USB3_MTX_C_DRX_N2
4
USB3_MTX_C_DRX_P2 6 6 5 USB3_MTX_C_DRX_P2
5
For C_VBUS For C_VBUS 3
(Power Switch Enable Pin) (Power Switch OCP Pin) 3
8
CESD2510UC3V3U DFN2510 USB3.1

SC300006600
ESD@
DT2 DT4
USB3_MRX_DTX_P1 9 10 1 USB3_MRX_DTX_P1 USB20_P3_R 3 6 CC1_5448_CONN
1
I/O2 I/O4
USB3_MRX_DTX_N1 8 9 2 USB3_MRX_DTX_N1
2
USB3_MRX_DTX_N2 7 7 4 USB3_MRX_DTX_N2 2 5
4
GND VDD
USB3_MRX_DTX_P2 6 6 5 USB3_MRX_DTX_P2
5
3 CC2_5448_CONN 1 4 USB20_N3_R
3
A I/O1 I/O3 A
8 CEST236LC5VU-M SOT23-6
SC300006000
CESD2510UC3V3U DFN2510 USB3.1 ESD@
SC300006600
ESD@
T
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LA-H081P
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5 4 3 2 1
A B C D E
DC to DC
1 1
+3VALW +3VS
J1
2 1
+VL 2 1
0.1U_0201_10V K X5R
JUMP_43X79
0.1U_0201_10V K X5R
1 1 1 1
+3VALW to +3VS
C71
C74
C72 @ @ C73
10U_0402_6.3V6M 10U_0402_6.3V6M
SE00000UD00 SE00000UD00
2 2 2 2
U10
1 14 +3VALW_3VS
2 VIN1 VOUT1 13
VIN1 VOUT1
3 12 C75 1 2 S CER CAP 1000P 50V K X7R 0402
ON1 CT1 SE074102K80
4 11
[13,33,44] SUSP# VBIAS GND +5VS
5 10 C76 1 2 S CER CAP 2200P 25V K X7R 0402
+5VALW ON2 CT2 SE075222K80 J2
6 9 +5VALW_5VS 2 1
7 VIN2 VOUT2 8 2 1
VIN2 VOUT2
0.1U_0201_10V K X5R
JUMP_43X79 1 1
0.1U_0201_10V K X5R
C80
1 1 15 @ C79
GPAD
C77
C78 @ 10U_0402_6.3V6M
10U_0402_6.3V6M S IC G2898KD1U TDFN 14P LOAD SWITCH SE00000UD00
SE00000UD00 SA0000BKC00 2 2
2 2
+5VALW to +5VS
2 2
DISCHARGE CIRCUIT MISC.

CPU GPU WLAN SSD2 SSD1 FAN ON/OFF# SHORT PADS
H1 H2 H3 H4 H5 H6 H7 H16 H17 @
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA JP1 2 1 ON/OFF#
ON/OFF# [33,36]
SHORT PADS
1
H_2P9 H_2P9 H_2P9 H_3P3 H_3P3 H_3P2 H_3P2 H_3P3 H_3P3 @
JP2 2 1 ON/OFF#
For +1.8VALW Discharge SHORT PADS
3 3
+5VALW +1.8VALW H9 H10 H11 H12 H18 H13 H14
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
1
R129 @ R130 @
100K_0402_1% 22_0603_1%
H_2P5 H_2P5N H_2P5 H_3P7 H_2P8 H_2P5X2P8N H_2P5X2P8

2
2
6
D
1.8VALW_PWR_EN# 2
G
S
DDR Shielding Clip LASER BARCODE
1
@ Q4A
2N7002KDW_SOT363-6 Larger FD1 FD2
CLIP1 CLIP10 CLIP11 CODE1 @ CODE2 @
HOLEA HOLEA HOLEA
3
1
5
[33,36,43,45] 3V/5VALW_PG G @ @ @
1
S FD3 FD4 BARCODE_8X8 BARCODE_12X4

4
@ Q4B
2N7002KDW_SOT363-6
Smaller
1
CODE3 @ CODE4 @
CLIP2 CLIP3 CLIP4 CLIP5 CLIP6 CLIP7 CLIP8 CLIP9
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
4 4
@ @ @ @ @ @ @ @
1
1 BARCODE_20X4 BARCODE_10X10

DC to DC / Discharge / MISC
Custom 0.2
A B C D E
5 4 3 2 1
D EMI@ PL1 D
ACES_50278-00401-001
6 PF1
5A_Z80_0805_2P
1 2
+19V_VIN
G2 5 7A_32VDC_0437007.WRML
G1 4 APDIN 1 2 +19V_APDIN
4 3 EMI@ PL2
3 2 5A_Z80_0805_2P
2
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
1 1 2
1
JDCIN1
1
EMI@ PC1
EMI@ PC2
EMI@ PC3
EMI@ PC4
CONN@
2
C C
+CHGRTC
2
PR1 @
45.3K_0603_1%
PR2 0_0603_5%
1
1 2
PD1 +3VL
LRB715FT1G_SOT323-3
2
+RTCBATT 1
3
+RTCBATT_R
B B
A A

PWR- DCIN / Vin Detector
WWW.AliSaler.Com
Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. KBL
5 4 3 2 1
5 4 3 2 1
EMI@ PL3
VMB2 +8.4V_VMB 5A_Z80_0805_2P
Conn@ PF2 1 2
JBAT1 F1206HB12V024TM 12A 24V UL FAST
1 1 2
1 2 +12.6V_BATT+
EMI@ PL4
2 3 EC_SMCA 5A_Z80_0805_2P
3 4 EC_SMDA 1 2
4 5
5 6
6 +RTCBATT_R
1
7
7
1
100_0402_1%
100_0402_1%
8
8 9 PC5 EMI@ PC6 EMI@
D G1 10 1000P_0402_50V7K 0.01U_0402_16V7K D
2
G2
PR4
PR5
11
2
G3 12
G4
ACES_60757-00802-001
EC_SMB_CK1 [33,42]
EC_SMB_DA1 [33,42]
1 2
+3VL
PR6
1 2 200K_0402_1% +3VALW
PR7
@ 200K_0402_1%
1 2
PR8
VCIN1_BATT_TEMP [33,42] PH201 under CPU botten side :
10K_0402_5%
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C
+EC_VCCA
16.5K_0402_1%
1
PR9
C C
2
[33] VCIN0_PH1
1
PH1
100K +-1% 0402 B25/50 4250K
2
ECAGND
B B
A A

PWR- BATTERY CONN/OTP
Custom 0.1
5 4 3 2 1
A B C D
Module model information

ISL95520A_Hybrid_Boost_V2.mdd +3VS
Pull high on HW side
1
VGA@
1
VGA@ PR1680
PR1681
Protection for reverse input 10K_0402_5%
10K_0402_5%
2
2
1 Vgs = 20V VGA@ 1
PQ1660A
Vds = 60V GPU_PROHOT# [24,33]
6
D
Id = 250mA 2
1
D G
1
2 PQ314 2N7002KDW_SOT363-6
G L2N7002WT1G_SC70-3 S
1
S max Power loss 0.22W for 90W;0.12W for 65W system;0.05W for 45W [33,42]
B+ VCOUT1_PROCHOT#
3
Rds(on) = 15.8mohm max 2 VGA@
1 2 1 2
CSR rating: 1W PQ1661
Vgs = 20V VCSIP-VCSIN spec < 81mV SSM3K35MFV 1N VESM
PR301 PR302 Vds = 30V
1M_0402_1% 3M_0402_5%
PQ311
ID = 10.5A (Ta=70C)
3
EMB04N03H_EDFN5X6-8-5 +19V_P1 PQ312
Need check the SOA for inrush 1 AON7506_DFN33-8-5 PR303
2 1 +19V_P2 0.01_1206_1% +19VB_CHG VGA@
5 3 2 @ PJP301 PQ1660B
3
3 5 1 4 1 2 D
+19V_VIN 1 2
EMI@
5
2 3 JUMP_43X118 G
2200P_0402_25V7K
10U_0603_25V6M
10U_0603_25V6M
4
[33,42] VCIN1_AC_IN
@EMI@ PC303
2N7002KDW_SOT363-6
0.1U_0402_25V6
4
1
CSIP_CHG_R
S
4
PC301
PC302
PC304
CSIN_CHG_R
2
2
2
0_0402_5%
0_0402_5%
PR304
PR305
1
392K_0402_1%
PR306
ASGATE_CHG_R @ @
1
PC305
2
1 2 PQ313
4.02K_0402_1%
4.02K_0402_1%
2 2
AON7506_DFN33-8-5
1
0.1U_0402_25V6
1
2
5 3
PR309
PR729 and PR732 are ACDET set t i ng base on your proj ect to set. 100_0402_1%
PC307 0.47U_0402_25V6K
2
4
PR307
PR308
1 2 +12.6V_BATT+ Rds(on) = 32mohm max
Vgs = 20V
Vds = 30V
1
CMSRC_CHG ID = 8A (Ta=70C)
@
PC308
2200P_0402_50V7K
49.9K_0402_1%
1
PR310
PC306
1
ASGATE_CHG 1 2
2
BGATE_CHG
2
OPCN_CHG 2
0.1U_0402_25V6
CSIN_CHG
CSIP_CHG
OPCP_CHG
VBAT_CHG
0x3CH <BIT9> PSYS current gain
Rs1 = 10mΩ and Rs2 = 5mΩ o r Rs 1 = 10m Ω a nd R s2 = 10Ω
m Rds(on) = 32mohm max
1 VDD_CHG
BIT0 = 1.14uA/W Vgs = 20V

BIT1 = 0.285uA/W Vds = 30V
5
========================================================= ID = 8A (Ta=70C) PQ301
Rs1 = 20mΩ and Rs2 = 10mΩ or Rs1 = 20mΩ and Rs2 = 20 m
Ω PU301
100K_0402_1%
support Turbo boost : 2200P Support max charge 3.5A
32
31
30
29
28
27
26
25
BIT0 = 2.28uA/W no support Turbo boost : 0.1u ISL95520AHRZ-T_QFN32_4X4
BIT1 = 0.57uA/W AON7408L_DFN8-5 Power loss: 0.245W
PR311
7X7X3
CSIN
CMSRC
OPCN
VBAT
CSIP
ASGATE
QPCP
BGATE
PC309 4 CSR rating: 1W
PR313 0_0603_5% 0.47U_0402_25V6K
Isat: 6.5A VCSPP-VCSON spec < 81mV
ACIN_CHG 1 24 BST_CHG 1 2 BST_CHG_R 1 2 DCR: 28mohm
2
ACIN BOOT
Ipsys = KPSYS  x  T
( VAD P x IAD P + VBA T x IBA ) PL301 PR315
2 23 UG_CHG 0.01_1206_1%
R_Psys = 1.2V / Ipsys
3
2
1
KPSYS = 1.14uA/W [33,42] VCIN1_AC_IN ACOK UGATE 4.7UH_5.5A_20%_7X7X3_M +12.6V_BATT+
1
1 2 0_0402_5% 3 22 LX_CHG 1 2 +17.4V_BATT_CHG 1 4

158K_0402_1%
adapter wattage = 45W @ PR312

[33,41] EC_SMB_DA1 SDA PHASE
PR314
Battery wattage = 40Wh 1 2 0_0402_5% 4 21 LG_CHG 2 3

@ PR320
4.7_1206_5%
Ipsys = 1.14 x (45+40) = 96.9uA [33,41] EC_SMB_CK1 SCL LGATE
RF@ PR317
PQ302
3 R_Psys = 1.2V / 96.9uA = 12.3K-ohm. @ PR316 1 2 0_0402_5% 5 20 VDDP_CHG 3
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
2
===================================== [33,42] VCOUT1_PROCHOT# PROCHOT# VDDP
1
adapter wattage = 65W PR318 1 2 1K_0402_1%AMON_ISL95520 6 19 VDD_CHG 1 2
Battery wattage = 40Wh [33] ADP_I AMON VDD
PC310
PC311
PC312
2
Ipsys = 1.14 x (65+40) = 119.7uA PR321 1 2 1K_0402_1%BMON_ISL95520 7 18 PR319 4.7_0402_5% 4
2
BMON DCIN
1
R_Psys = 1.2V / 96.9uA = 10K-ohm.
8 17
BATGONE
Close to EC. PC313 PC314
PSYS NTC
1
1U_0402_16V6K 1U_0402_16V6K
2
CCLIM
ACLIM
COMP
PROG
AGND
CSON
CSOP
FSET PR323 PC315 RF@
3
2
1
1
100K_0402_1% AON7506_DFN3X3-8-5 680P_0402_50V7K
2
1
PC316 PC317
0.1U_0402_25V6 0.1U_0402_25V6 PD301
33
10
11
12
13
14
15
16
**Design Notes** Follow adapter and PR324 10_1206_5% 3
+19V_VIN
2
battery wattage in 1 2 1
For 45W/65W /90W system, 2S/3S/4S battery
3
Close to Vsys current source. 2 PQ315
Maximum Charging current 3.5A BA
2
EC.
FSET_CHG
PC318
VF = 0.38V
1U_0603_25V6
Base on CPU Core VR design.
Maximum Battery discharge power 55W The resistor is pop on CPU VR schematic. LRB715FT1G_SOT323-3 LMUN5113T1G_SOT323-3
1
#Register Setting 2
1
PR325
1. 0X3DH bit10 set 0 (default 1) to enable turbo boost function
2. Disable turbo when AC only 10K_0402_1% A31 connect to BA
1
VDD_CHG
VDD=5V Other team connect to bat t c onn
#Circuit Design
2
1. ACLIM and CCLIM are devider voltage control.
1
CCLIM_CHG
2. Use 7X7 choke and 3X3 H/L side MOSFET [10,33,45] PM_SLP_S4# 2
200K_0402_1%
1
Charge current 3A ACLIM_CHG

PR326
Power loss : 1.79W (H/S=0.227W,L/S=1.2738W,Choke=0.297W) PR327

PROG_CHG CSOP_CHG CSOP_CHG_R
200K_0402_1% 1 2 PQ316
Power density : 0.61 (23X16)
BA
3
#Protect function COMP_CHG PR328 2_0402_5% LTC015EUBFS8TL_UMT3F
2
1
1. ACOVP : VCC voltage > 24V
100_0402_1%
Fs=729KHZ ~ +/- 15% PC319

38.3K_0402_1%
2. SMBus timeout : 0X3DH bit15 set 0 (default 0) to enable 175s(default). BA

1
2 PR331 1
3. ACOC : OX3CH bit4 set1 release adapter limit function (default:Enable). 0.1U_0402_25V6
2
PR330
4. CHGOCP : based on charge current setting

1
CSON_CHG 1 2 CSON_CHG_R
150K_0402_1%
560P_0402_50V7K
1
5. BATOVP : 4.6V/Cell
PR333
PC320
6. BATLOWV : No. @ PR332

2
1
0_0402_5%
76.8K_0402_1%
4 4
7. TSHUT : 150C
2
1
PR335 For A31 only.

0.033U_0402_25V7K
2
348K_0402_1% Turn off Charger IC on battery only.

1
VCIN1_BATT_TEMP [33,41]
PR334
PC321
Depend on customer design for

BATGONE(BATT_TEMP) system power consumption.
2
logic high: above 2.4V

2
Hybrid boost power mode logic low: under 0.8V

Cell = 4s
(Rs1 = 10mΩ and Rs2 = 5mΩ or Rs1 = 20mΩ and Rs2 = 10mΩ) .
CC_LIM = VccLIM / 64 x Rs2
=============================================================
(Rs1 = 10mΩ and Rs2 = 10mΩ or Rs1 = 20mΩ and Rs2 = 20mΩ) .
WWW.AliSaler.Com
CC_LIM = VccLIM / 32 x Rs2 Issued Date 2014/11/05 2014/12/15 Title
============================================================= Battery current limimed by CCLIm ~ 3.89A.
Deciphered Date
PWR_CHARGER
AC_LIM = Vac_LIM / 32 x Rs1 Adapter current limimed by ACLIm ~ 4.33A.
(PR779 and PQ741 are for change ACLIm when AC in) DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
A B C D
A B C D E

B+
SY8286B_V3_single.mdd EMI@ PL401 keep short pad,
SY8286B_V3_dual.mdd 5A_Z80_0805_2P
+19VB_3V snubber is for EMI only.
2200P_0402_50V7K
1 2
10U_0603_25V6M
@EMI@ PC402
EMI@ PC403
0.1U_0402_25V6
1
1
@ PR401 PC401
PC404
0_0402_5% 0.1U_0402_25V6
BST_3V 1 2 BST_3V_R 1 2
2
Use 7x7x3 size when the layout space is enough.
1 1
1
IN3
IN2
IN1
BS
+3VL
LX_3V 5 17 PL402
LX EP 1.5UH_6A_20%_5X5X3_M
Check pull up resistor of SPOK at HW side PU401
1
SY8386BRHC_QFN16_2P5X2P5 16 LX_3V 1 4
6 LX2 +3VALWP
PR403 GND 2 3
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
4.7_1206_5%
100K_0402_5% 15
LX1
1
PR402
RF@
2
PC405
PC406
PC407
PC408
7
[33,36,39,45] 3V/5VALW_PG PG 14
2
GND1
3V_SN
2
ENLDO_3V5V
4.7U_0402_6.3V6M
Fsw : 600K Hz EN1 and EN2 dont't be floating. 8 13
EN2 LDO +3VLP
EN :H>0.8V ; L<0.4V
1
PC409
TEST
OUT
EN1
1
@ PC410
FF
4.7U_0402_6.3V6M PC411 RF@
Vout is 3.234V~3.366V
2
680P_0402_50V7K
10
11
12
2
Iocp=10A
TDC=6A
3.3V LDO 150mA~300mA
2 PC412 PR404 2
1000P_0402_50V7K 1K_0402_1%
5V_3V_EN 3V_FB 1 2 3V_FB_1 1 2
@ PJ401
1 2
+3VALWP 1 2 +3VALW
keep short pad, JUMP_43X118
snubber is for EMI only.
@ PJP401
JUMP_43X39
B+ EMI@ PL403 +19VB_5V @ PR405 PC413 1 2
5A_Z80_0805_2P 0_0402_5% 0.1U_0402_25V6 +3VLP 1 2 +3VL
1 2 +19VB_5V BST_5V1 2 BST_5V_R 1 2
PU402
5
1
SY8288CRAC_QFN20_3X3
BS
IN
IN
IN
IN
PL404
LX_5V 6
2200P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
20 2.2UH_7.8A_20%_7X7X3_M
LX LX
7 19 LX_5V 1 4
GND LX +5VALWP
1
1
PC414
PC415
EMI@ PC416
@EMI@ PC417
8 18 2 3 @
GND GND PC418
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2
1
3 @ 9 17 VCC_5V 1 2 3
2 SPOK_5V
PG VCC
4.7_1206_5%
RF@ PR409
PC9174
PC9183
PC9173
PC9175
PC9186
PC9176
10 16
2
NC NC 2.2U_0402_6.3V6M
OUT
LDO
EN2
EN1
21
FF
GND
2
11
12
13
14
15
@
PR407
1 5V_SN
0_0402_5%
1
3V/5VALW_PG
SY8286C_V3_single.mdd +5VLP
SY8286C_V3_dual.mdd ENLDO_3V5V
4.7U_0402_6.3V6M
5V LDO 150mA~300mA PC9177 RF@

680P_0402_50V7K
2
1
PC425
Vout is 4.998V~5.202V
5V_3V_EN
2
PR410
499K_0402_1%
TDC=8A
1 2 ENLDO_3V5V
B+ EN1 and EN2 dont't be floating.
1
EN :H>0.8V ; L<0.4V PC427 PR408

1
PR411 1000P_0402_25V8J 1K_0402_1%

PC434 Fsw : 600K Hz 5V_FB 1 2 5V_FB_1 1 2
150K_0402_1%
1U_0201_6.3V6M
2
2
@ PJ402
1 2
PR412 +5VALWP 1 2 +5VALW
2.2K_0402_5% JUMP_43X118
1 2
4 [33] EC_ON @ PJP402 4
JUMP_43X39
1 2 1 2
[33] VCOUT0_MAIN_PWR_ON +5VLP 1 2 +VL
@
PR413
0_0402_5% 5V_3V_EN
1M_0402_1%
4.7U_0402_6.3V6M

1
1
PR415
PC438

+3VALW/+5VALW
2
2
A B C D E
5 4 3 2 1

RT8207P_single_V3.mdd For Single layer
RT8207P_dual_V3.mdd For Dual layer
D D
Pin19 need pull separate from +1.35VP.

If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
EMI@ PL501 you can change from +1.35VP to +1.35VS. TDC 0.7A
B+ 5A_Z80_0805_2P
+12.6VB_DDR Peak Current 1A
1 2 PR501
2.2_0603_5%
BST_DDR_R 1 2 BST_DDR
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
0.1U_0402_25V6
+1.2VP
1
1
PC503
PC504
PC501
PC502
UG_DDR +0.6VSP
2
2
EMI@
@EMI@
LX_DDR
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1
1
PC505
5
0.1U_0402_25V6
PC506
PC507
PC508
16
17
18
19
20
2
C PU501 C
2
PQ501
VLDOIN
PHASE
UGATE
BOOT
VTT
21 @
AON7408L_DFN8-5 PAD
4 LG_DDR 15 1
LGATE VTTGND
PL502 14 2
1UH_11A_20%_7X7X3_M PR502 PGND VTTSNS
1
2
3
14.7K_0402_1%
1 4 1 2 CS_DDR 13 3
+1.2VP PC509 CS RT8207PGQW _W QFN20_3X3 GND
1
2 3 1U_0201_6.3V6K
5
1 2 12 4 VTTREF_DDR
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
RF@ PR503 30MA_30V_0.5UA_0.4V_SOD323-2 PD501 VDDP VTTREF

1
4.7_1206_5% PR504 2 1
PC512
PC510
PC513
PC514
PC511
PC515
5.1_0603_5% 11 5
+1.2VP
2
VDD VDDQ
1
VDD_DDR
PGOOD
1 2
+5VALW
2
4 PC516
+5VALW PR505
TON
1
1
0.033U_0402_16V7K
FB
S5
S3
2
RF@ PC518 PQ502 PC517 1 2
680P_0402_50V7K 1U_0201_6.3V6K 2.2_0603_5%
2
10
6
1
2
3
AON7506_DFN3X3-8-5
EN_DDR
EN_0.675VSP
FB_DDR
TON_DDR
PR506
1 2 +1.2VP
PR507 470K_0402_1%
B +12.6VB_DDR1 2 B
6.04K_0402_1%
1
@
PR508
0_0402_5%
Choke: 7x7x3 1 2 PR509
[13,33] SYSON
Rdc=6.7mohm(Typ), 7.4mohm(Max) 10K_0402_1%
2
1
Mode Level +0.675VSP VTTREF_1.35V @ PC519
Switching Frequency:540kHz 0.1U_0402_10V7K
S5 L off off Ipeak=8A
2
S3 L off on Iocp~9.6A
S0 H on on OVP: 113%~120% @
VFB=0.75V, Vout=1.3545V PR510
0_0402_5%
Note: S3 - sleep ; S5 - power off 1 2
[13,33,39] SUSP#
@ PJ501
@
PR511 +1.2VP 1 2 +1.2V
0_0402_5% 1 2
1 2 JUMP_43X118
[7] DDR_VTT_PG_CTRL
1
@ PC520
0.1U_0402_10V7K
2
PJ502
@
1 2
+0.6VSP 1 2 +0.6VS
A
JUMP_43X39 A

Issued Date 2019/04/09 Title
2018/04/09 Deciphered Date
RT8207P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1

APL5930_V2.mdd
D D
+3VALW +5VALW
Ultra Low Dropout 0.23V(typical) at 3A Output Current
2
1
PC601
JUMP_43X79
2.2U_0201_6.3V6M
1
@ PJ601
2
2
11
10U_0402_6.3V6M
PU601 G9661MRE1U_TDFN10_3X3
1
C @ PC602 10 1 C
GND
VPP NC
PC603
4.7U_0402_6.3V6M 9 2
PJ602
NC VO
+1.8VALWP
@
PR601 8 3 @
2
VIN VO
1
7 4 1 2
12.7K_0402_1%
0_0402_5%
0.01U_0402_16V7K
VIN ADJ +1.8VALWP 1 2 +1.8VALW
1
1 2 6 5
[33,36,39,43] 3V/5VALW_PG VEN POK
PR602
PC604
22U_0603_6.3V6M
JUMP_43X79
Rup
2
1
1
0.1U_0402_16V7K
2
PC605
PC606
PR603
1M_0402_5%
2
@
2
1
PGOOD [46]
10K_0402_1%
PR605
Rdown
2
100K_0402_5%
2
PR604
1
Vout=0.8V* (1+Rup/Rdown)
+3VALW +5VALW +3VALW

B B
1
2
1
PC607
JUMP_43X79
2.2U_0201_6.3V6M
1
@ PJ603
2
2
PU602
G9661MF11U_SO8
10U_0402_6.3V6M
1
@ PC608 4 5
VPP NC
PC609
4.7U_0402_6.3V6M 3 6
VIN VO
+2.5VP
@
PR606 2 7
GND
2
VEN ADJ
1
1 8
3.4K_0402_1%
0_0402_5%
0.01U_0402_16V7K
POK GND
1
1 2
[10,33,42] PM_SLP_S4#
PR607
PC610
22U_0603_6.3V6M
9
Rup
2
1
1
0.1U_0402_16V7K
2
PC611
PC612
PR608
47K_0402_5% PJ604 @
2
2
1 2
+2.5VP +2.5V
2
1 2
1
1.6K_0402_1%
JUMP_43X79
PR609
Rdown
2
A A

APL5930
Custom 0.1
5 4 3 2 1
A B C D E

SY8286_V2_single.mdd
SY8286_V2_dual.mdd
keep short pad,

+19VB_1V
1 1
@ PR703 PC704
@ PJ701 0_0402_5% 0.1U_0402_25V6
1 2 +19VB_1V BST_1V 1 2 BST_1V_R 1 2
1 2
+19VB_CPU
10U_0603_25V6M
0.1U_0402_25V6
2200P_0402_50V7K
JUMP_43X79
1
EMI@ PC701
@EMI@ PC703
RF@ PR702 RF@ PC702
PC705
4.7_1206_5% 680P_0402_50V7K
1
PU701 1 2 SNUB_1V 1 2
IN3
IN2
IN1
BS
Use 7x7x3 size when the layout space is enough.
+3VALW LX_1V 5 17
LX EP
Confirm HW side PL701
1
LX_1V
@ PR701 6
GND
SY8386RHC_QFN16_2P5X2P5
LX2
16 1 2
+1.05VALWP
100K_0402_5% 1UH_6.6A_20%_5X5X3_M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
15
LX1
1
PC707
PC708
PC709
PC710
2
7
PG 14
2
GND1
330P_0402_50V7K
1
8 13 LDO_3V
PC706
TEST VCC
2
ILMT
BYP
2
PC711
EN
FB
4.7U_0402_6.3V6M
+3VALW
16.5K_0402_1%
9
10
11
12
1
@
PR705
0_0402_5%
R1
PR704
1
1 2 EN_1V
[45] PGOOD
Vout=0.6V* (1+R1/R2)
1
PR706
2
1
@ PC712 PC713 =0.6*(1+(16.5/22)) 1K_0402_1%

PR707 0.1U_0402_25V6 2.2U_0201_6.3V6M
2
1M_0402_1%
2
Vout=1.05V 2
2
+3VALW
2
EN :H>0.8V ; L<0.4V
FB_1V @ PJ702
EN pin don't floating
1
JUMP_43X118
@
If have pull down resistor at HW side, PR709 FB=0.6V +1.05VALWP

1
1 2
2
+1.05VALW
please delete PR601. 0_0402_5%
1
2
ILMT_1V
PR708
R2
1
22K_0402_1%
@ PR710
2
0_0402_5%
2
The current limit is set to 6A, 9A or 12A when this pin

is pull low, floating or pull high.
+1.2V +5VALW
3 3
Ultra Low Dropout 0.23V(typical) at 3A Output Current

1
2.2U_0201_6.3V6M
PC714
1
@ PJ703
JUMP_43X39
2
2
VGA@
2
VGA@
11
PU702 G9661MRE1U_TDFN10_3X3
1
VGA@ PC715 10 1
GND
10U_0402_6.3V6M 9 VPP NC 2
@VGA@ PR711 8 NC VO 3
2
0_0402_5% 7 VIN
VIN
VO
ADJ
4 +1.0VS
1
1 2 6 5
10K_0402_1%
[26] 1.0VS_DGPU_EN
0.01U_0402_25V7K
VGA@ PR713
VEN POK
1
PC717
22U_0603_6.3V6M
1
Rup
0.1U_0402_25V6
VGA@ PR712
@ PC716
@ PJ704
2
1M_0402_5%
PC718
2
VGA@
1 2
2
+1.0VS 1 2 +1.0VS_DGPU
2
JUMP_43X39
1
VGA@
38.3K_0402_1%
VGA@ PR714
Rdown
2
4 4
=0.8*(1+(10/38.3))
Vout=1.008V

WWW.AliSaler.Com
SY8286
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
A B C D E
1 2 3 4 5

Close IC
PRZ1 and PRZ22 are for debug only. RT3602AE_U22_RU42_colay_V1A.mdd for IC portion
VCCSSA_SENSE and VSSSA_SENSE need other resistor at HW side.
RT3602AE_U22_RU42_colay_V1B.mdd for SW portion
RT3602_VREF Vref=0.6V +VCCSA PRZ1 PRZ8 PRZ10
100_0402_1% 10K_0402_1% 54.9K_0402_1% PCZ3
1 2 VCCSA_SENSE_R 1 2 1 2 0.1U_0402_25V6
1
953_0402_1%
15K_0402_1%
6.8K_0402_1%
PRZ15
1 2 1 2
2
1
1
[13] VCCSA_SENSE
1 2 [48] AVCCSA AISPVCCSA [48]
@ PCZ200 PCZ5 390P_0402_50V7K PCZ6 68P_0402_50V8J
PRZ2
PRZ3
PRZ4
0_0402_5% 0.1U_0402_25V6
2
A @ PCZ1 @ PRZ16 A
FB_SA FB_SA
0.1U_0402_10V6K 10K_0402_1% @ PCZ4
2
1
1 2 1 2 0.47U_0402_25V6K
@ PCZ203 1 2
1
1
0.1U_0402_25V6
5K_0402_1%
10_0402_1%
11K_0402_1%
0.47U_0402_25V6K
2
PRZ94
Close IC RT3602_VREF
PRZ6
PRZ11
PCZ208
1
0_0402_5% 1 2 1 2
PRZ5
1 2
[13] VSSSA_SENSE PRZ13 PRZ14
2
2
RT3602_SET1
2
1
PRZ22 29.4K_0402_1% 21K_0402_1%
RT3602_SET2 1 2 @ PCZ199
RT3602_SET3
0.1U_0402_25V6
Close IC
RT3602_VREF 3.9_0402_1%
2
1
100_0402_1% PRZ95
PRZ24
VR_PSYS 0_0402_5%
PRZ23 +3VS
1
[15] VSSCORE_SENSE 1 2 100K_0402_1%

464_0402_1%
10K_0402_1%
1.1K_0402_1%
5.23K_0402_1%
1 2
Close CORE1 choke
PRZ18
PRZ19
PRZ20
2
PRZ17
PRZ21
@ PRZ107 PHZ1 PRZ26 1 2
VR_PWRGD [33] EN
2
0_0402_5% 100K_0402_1%_B25/50 4250K 40.2K_0402_1% PRZ25 High: > 0.7V

@ PCZ7 1 2PHZ1_R1 1 2 PHZ1_R 1 2 100_0402_1% 0_0402_5%
0.1U_0402_25V6
RGND_MAIN 1 2 VR_ON
Low: < 0.3V
[33]
2
RT3602_VREF
1
1
3K_0402_1%
499_0402_1%
2.1K_0402_1%
+1.05V_VCCST
IMON_SA
PRZ29
PRZ30
1 2 IMON_CORE_R 1 2
RT3602_EN
PRZ28
VSEN_CORE
RGND_MAIN
FB_SA
PRZ33
COMP_SA
RGND_SA
VR_PSYS
26.7K_0402_1% PRZ35 @ PCZ206
2
1
@ PCZ204 2.8K_0402_1% @ PCZ201 0.1U_0402_25V6
PCZ194
110_0402_1%
0.1U_0402_25V6
1
1
0.1U_0402_25V6 0.1U_0402_25V6 1 2
75_0402_1%
100_0402_1%
45.3_0402_1%
1
U22@ PRZ45 @ PCZ9
PRZ37
PRZ39
2
@ PCZ8 @ PRZ40 46.4K_0402_1% 0.1U_0402_10V6K
2
0.1U_0402_10V6K 10K_0402_1% 1 2 PUZ1
49
48
47
46
45
44
43
42
41
40
39
38
37
PRZ36
PRZ38
2
1 2 1 2 RT3602AJGQW_WQFN48_6X6 @ @
Close IC
2
PRZ43 U42@ PRZ45
GND
RGND_MAIN
VSEN_MAIN
EN
PSYS
FB_SA
RGND_SA
COMP_SA
ISENN_SA
ISENP_SA
IMON_SA
VR_READY
VREF06/PSET
10K_0402_1% 61.9K_0402_1% VR_SVID_CLK [15]
VSEN_CORE 1 2 1 2 VR_ALERT# [15]
+VCC_CORE PRZ41
IMON_CORE VR_SVID_DATA [15]
100_0402_1% PCZ12 82P_0402_50V8J 1 36 PWM_SA [48]
1 2 1 2 1 2 2 RT3602_SET1 IMON_MAIN PWM_SA 35 VR_HOT# [33]
FB_CORE SET1 DRVEN DRVEN [48]
PRZ47 3 34 1 2
0_0402_5% PCZ13 4 COMP_CORE FB_MAIN VCLK 33 PRZ98 49.9_0402_1% RT3602_VREF
[48] AVCORE1
1 2 PCZ11 330P_0402_50V8J 0.1U_0402_25V6 5 RT3602_SET2 COMP_MAIN ALERT 32 PRZ99 1 210_0402_1% PRZ48
[15] VCCCORE_SENSE
1 2 Ra 6 RT3602_SET3 SET2 VDIO 31 1
PRZ100 2
100_0402_1% 28K_0402_1% PRZ49 7.68K_0402_1%
SET3 VR_HOT IMON_GT
1
U42@ PRZ106 7 30 1 2 1 2
@ PCZ196 1 2 1 2 ISEN1N_MAIN 8 ISEN1N_MAIN IMON_AUXI 29 @ PCZ15 0.47U_0402_25V6K
Close IC
0_0402_5% 9 ISEN2N_MAIN ISENP_AUXI 28 1 2
0.1U_0402_25V6
2
U42@ PCZ16 0.1U_0402_25V6 10 ISEN2P_MAIN ISENN_AUXI 27 VSEN_GT

[48] AVCORE2 TSEN_CORE 11 ISEN1P_MAIN VSEN_AUXI COMP_GT
26 AISP1 [48] PRZ50
RT3602_VIN 12 TSEN_MAIN COMP_AUXI 25 0_0402_5%
Rb VIN RGND_AUXI AVGT1 [48]
PWM2_MAIN
PWM1_MAIN
DRVEN_SET
B 1 2 B
TSEN_AUXI
PWM_AUXI
+5VALW VSEN_GT
RGND_AUXI
U22@ PRZ105 10K_0402_1% 1 2 1 2 VCCGT_SENSE [15]
FB_AUXI
0.22U_0402_25V6K
1
1
PCZ18
2.2_0805_1%
[48] AISPCORE2
0.1U_0402_25V6 PRZ54 PRZ56 PRZ59
PRZ41 and PRZ21 are for debug only.
VCC
24.3K_0402_1% 10K_0402_1% 100_0402_1% +VCC_GT
NC
NC
NC
NC
NC
Rc
PRZ53
PCZ19
2
VCCCORE_SENSE and VSSCORE_SENSE need other resistor +5VALW
1 2 1 2 1 2 1 2
U22@ PRZ104 10K_0402_1%
at HW side.
13
14
15
16
17
DRVEN_SET 18
19
20
21
22
TSEN_GT 23
FB_GT 24
1
[48] AISPCORE1
1 2 1 2 @ PCZ198
Ra Rb/Rc RT3602_VREF PRZ51 PRZ52 0.1U_0402_25V6
RT3602_VCC
2
110K_0402_1% 1.65K_0402_1% PCZ20 82P_0402_50V8J PCZ21
TSEN_CORE_R 1 2 1 2 270P_0402_50V7K
+19VB_CPU
PHZ2
U22 N/A Stuff
1
1 2 1 2 1 2
8.25K_0402_1%
@ PCZ202
1
FB_GT
@ PRZ61 @ PCZ22 0.1U_0402_25V6
4.64K_0402_1% 8.25K_0402_1%
100K_0402_1%_B25/50 4250K
2
10K_0402_1% 0.1U_0402_10V6K
U42 Stuff N/A
PRZ64
PWM_GT
[48]
Close CORE1 MOSFET
PRZ63
+5VALW
[48]
[48]
PRZ65
Close IC
PWM_CORE2
PWM_CORE1
2
8.2_0402_1%
1 2
PRZ93
1
1
7.68K_0402_1%
U22@ PRZ68 1 2
U42@ PRZ68
VSSGT_SENSE [15]
1K_0402_1%
PRZ67
1
0_0402_5%
1
+5VALW PCZ207
2
1
4.7U_0402_6.3V6M PRZ66
TSEN_CORE_R TSEN_GT_R
2
110K_0402_1% @ PCZ197 PRZ60
1
100K_0402_1%_B25/50 4250K
0.1U_0402_25V6 100_0402_1%
2
1
2
1
@ PRZ72
5.62K_0402_1%
19.1K_0402_1%
U42@ PRZ71
10K_0402_5%
U22@ PRZ71
PRZ70
1
71.5K_0402_1%
PHZ3
2
DRVEN_SET PRZ69
2
1.65K_0402_1%
1
2
1
PRZ108
11.5K_0402_1%
4.02K_0402_1%
PRZ109
10K_0402_5%
Close GT MOSFET
PRZ73
TSEN_GT_R
PRZ59 and PRZ60 are for debug only.
2
2
VCCGT_SENSE and VSSGT_SENSE need other resistor

at HW side.
C
Set DRVEN output function at PS4. Set to 5V DRVEN C
is floating, and set to GND DRVEN is low at PS4.
D D

CPU_CORE
1 2 3 4 5
5 4 3 2 1
PUZ4 U42@
11 10 +19VB_CPU
PUZ2 EMI@ PLZ1 5A_Z80_0805_2P B+ 12 SW PGND 9
11 10 +19VB_CPU SW VIN U42@
12 SW PGND 9 1 2 13 8 PCZ29
SW VIN U42@ GL VIN 0.1U_0402_25V6
PCZ23
13 8 +5VALW PRZ77 14 7 1 2
GL VIN PGND PHASE
2200P_0402_50V7K
0.1U_0402_25V6 1 2 15 6
@EMIU42@ PCZ30
EMIU42@ PCZ31
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
+5VALW PRZ76 14 7 1 2 CORE1_BST_R 1 2 PVCC N/C
PGND PHASE CORE2_BST 1CORE2_BST_R
2200P_0402_50V7K
1
1 2 15 6 5.1_0402_1% 16 5 2
@EMI@ PCZ28
EMI@ PCZ24
U42@ PCZ32
U42@ PCZ33
PCZ34
PCZ35
1 1 1
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
PVCC N/C N/C BOOT
33U_D2_25VM_R60M
33U_D2_25VM_R60M
33U_D2_25VM_R60M
EMI@ PLZ2 5A_Z80_0805_2P 17 4
1
CORE1_BST N/C AGND
1
5.1_0402_1% 16 5 2 1 + + + U42@ PRZ75 2.2_0603_5%
PCZ25
PCZ26
PCZ51
PCZ52
PCZ53
2
17 N/C BOOT 4 PCZ37 3
N/C AGND 18 VCC 2 DRVEN U42@ @ @
PRZ74 1U_0402_10V6K
1
2.2_0603_5%
2
2
2
3 2 2 2 19 GL FCCM 1
PCZ36 18 VCC 2 AGND PWM
1U_0402_10V6K 19 GL FCCM 1 AOZ5038QI-05 QFN 31P_5X5
2
AGND PWM
D D
AOZ5038QI-05 QFN 31P_5X5
[47] PWM_CORE2
Rdc=0.9mohm +VCC_CORE
[47] PWM_CORE1 Rdc=0.9 mohm CORE2_LX
PLZ4
+VCC_CORE 1 4
[47] DRVEN PLZ3
CORE1_LX 1 4 2 3
+5VALW
2 3 PRZ89
PRZ88 1 2 0.15UH_NA__35A_20%
AISPCORE2_R
RF@ PRZ78
+5VALW
4.7_1206_5%
1
U42@
U42RF@ PRZ80
1 2
4.7_1206_5%
0.15UH_NA__35A_20% 5.1_0402_1%
1
AISPCORE1_R
U42@ U42@
1
5.1_0402_1%
U42@ PCZ39
PCZ61
1CORE2_SNUB
0.1U_0402_25V6K
1
1CORE1_SNUB 2
PCZ38 1U_0402_10V6K 1 2 1 2 1 2
2
PCZ50
2
0.1U_0402_25V6K
1U_0402_10V6K 1 2 1 2 1 2 PRZ82 PRZ83 PRZ85
2
750_0402_1% 750_0402_1% 10_0402_1%

PRZ79 PRZ81 @ PRZ84 U42@ U42@ 1 2
750_0402_1% 750_0402_1% 560_0402_1%
1 2 PCZ41 U42RF@ @U42@
680P_0402_50V7K
2
PCZ40 RF@
680P_0402_50V7K
2
AVCORE2 [47]
AVCORE1 [47]
AISPCORE2 [47]
AISPCORE1 [47]
H/S AON6280:
R DS(ON) (at V GS =10V) < 6.8m
R DS(ON) (at V GS =4.5V) < 10.5m
L/S AON6214:
R DS(ON) (at V GS =10V) < 2.8m?
R DS(ON) (at V GS =4.5V) < 3.5m?
C C
+19VB_CPU
VCC_CORE VCC_GT VCC_SA
FSW=450kHz FSW=450kHz FSW=600kHz
Choke=0.15uH Choke=0.15uH DCR=6.2 mohm +/- 5%
PRG1 DCR=0.9 mohm +/- 5% DCR=0.9 mohm +/- 5%
2200P_0402_50V7K
2.2_0603_5%
PCG2
PCG3
U22
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
GT_BST 1 2 GT_BST_R
1
PCG4
PCG5
U22 U22 LL=10.3 mohm
1
PUG1
PCG1 LL=2.4 mohm LL=3.1 mohm TDC=4A
EMI@
RT9610CGQW_WDFN8_2X2 @EMI@
2
0.1U_0402_25V6 TDC=21A TDC=18A ICCMAX=5A
2
GT_UG
4
BOOT UGATE
3 PQG1 ICCMAX=32A ICCMAX=31A OCP=10A
5 2 GT_LX OCP=40A OCP=39A
[47] PWM_GT PWM PHASE
2
+5VALW DRVEN 1 6
U42
Rdc=0.9 mohm
D1
G1
VCC_GT
EN PGND
PLG1
+VCC_GT U42 U42 LL=10.3 mohm
1 PRG2 2 8 7
VCC LGATE 9 7 GT_LX 1 4 LL=2.4 mohm LL=3.1 mohm TDC=4A
GND D2/S1
1_0402_5%
2 3
TDC=42A TDC=12A ICCMAX=5A
ICCMAX=64A ICCMAX=28A OCP=10A
1
RF@ PRG3
G2
S2
S2
S2
4.7_1206_5%
1
PCG6
AON6962_DFN5X6D-8-7 0.15UH_NA__35A_20% OCP=70A OCP=39A
4.7U_0402_6.3V6M
3
6
2
AISP1_R
2
PRG4 PRG5 PCG7

1K_0402_1% 1K_0402_1% 0.1U_0402_25V6K
1 2 1 2 1 2
1GT_SNUB
PRG6 PRG7
2.61K_0402_1% 10K_0402_1%
GT_LG 1 2 1 2
AVGT1_R
PCG8 RF@
680P_0402_50V7K
2
1 2
PHG1
10K_0402_1%_B25/50 3370K
B AVGT1 [47] B
AISP1 [47]
+19VB_CPU
2200P_0402_50V7K
PRA1
@EMI@ PCA3
PCA5
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
2.2_0603_5%
SA_BST SA_BST_R
1
1 2
PCA1
PCA2
1
EMI@
PUA1
2
RT9610CGQW_WDFN8_2X2 PCA4
0.1U_0402_25V6
2
4 3 SA_UG SA_UG_R
BOOT UGATE
5 2 SA_LX
[47] PWM_SA PWM PHASE
1
+5VALW DRVEN 1 6 PQA1

Rdc=0.98 mohm
G1
D1
D1
D1
EN PGND AONH36334_DFN3X3A8-10 +VCCSA

1 2 VCC_SA 8 7 PLA1
VCC LGATE 9 9 10 1 4
PRA2 1_0402_5% GND D2/S1 D1
2 3
1
RF@ PRA3
G2
S2
S2
S2
4.7_1206_5%
1
PCA6
0.47UH_NA__12.2A_20%
4.7U_0402_6.3V6M
8
5
2
AISPVCCSA_R
SA_LG
2
PCA7
0.1U_0402_25V6K
SA_SNUB
1 2 1 2 1 2
PRA4 PRA5 PRA6 PRA7

A 787_0402_1% 787_0402_1% 825_0402_1% 1K_0402_1% A
1 2 1 2
AVCCSA_R
1
PCA8 RF@
680P_0402_50V7K
2
1 2
PHA1
1K_0402_5%_TSM0B102J3652RE
AVCCSA [47]
WWW.AliSaler.Com
AISPVCCSA [47]
CPU Power stage
Size Document Number Re v
5 4 3 2 1
1
0.1
Rev
53
of
49
Sheet
EH5AW M/B LA-G521P
E
E
Monday, October 22, 2018
Power Train
Document Number
+VCCSA
PC9079
1U_0201_4V6M
1 2
PC9078
Date:
Title
Size
PC9164 PC9052 1U_0201_4V6M
22U_0603_6.3V6M 22U_0603_6.3V6M
C
1 2
1 2 1 2 PC9077
PC9165 PC9051 1U_0201_4V6M
22uF_0603*10
22U_0603_6.3V6M 22U_0603_6.3V6M
22uF_0603*2
1 2
1 2 1 2 PC9076
1uF_0201*7
PC9162 PC9050 1U_0201_4V6M
@
22U_0603_6.3V6M 22U_0603_6.3V6M
1 2
1 2 1 2 PC9075
2018/11/04
PC9163 PC9049 1U_0201_4V6M
unpop:
22U_0603_6.3V6M 22U_0603_6.3V6M
1 2
1 2 1 2 PC9074
PC9022 PC9048 1U_0201_4V6M
pop:
@
22U_0603_6.3V6M 22U_0603_6.3V6M
1 2
SA
1 2 1 2 PC9073
PC9021 PC9047 1U_0201_4V6M
22U_0603_6.3V6M 22U_0603_6.3V6M
1 2
Deciphered Date
1 2 1 2
Compal Secret Data

D
D
0.47uF*4
22uF*37
22uF *7
330uF*1
unpop:
1uF*9
1uF*1
2018/10/10
+VCC_GT
+VCC_GT
PC9020 PC9046 PC9072 PC9095 @ PC9109 PC9129 PC9153

@
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 0.47U_0201_6.3V6K 1U_0201_4V6M
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9019 PC9045 PC9071 PC9094 @ PC9108 PC9128 PC9152
Issued Date
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9018 PC9044 PC9070 PC9093 @ PC9107 PC9127 PC9151
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9017 PC9043 PC9069 PC9092 @ PC9106 PC9126 PC9150
@

1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9016 PC9042 PC9063 PC9091 PC9125
@
C
C
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M
1 2 1 2 1 2 1 2 1 2
PC9015 PC9041 PC9062 PC9090 PC9124
1 2 1 2 1 2 1 2 1 2
PC9014 PC9040 PC9061 PC9089 PC9123
1 2 1 2 1 2 1 2 1 2
PC9013 PC9039 PC9060 PC9088 PC9122
@

1 2 1 2 1 2 1 2 1 2
PC9012 PC9038 PC9059 PC9087 PC9121
1 2 1 2 1 2 1 2 1 2
PC9011 PC9037 PC9058 PC9086 PC9120
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 0.47U_0201_6.3V6K
+
1
1 2 1 2 1 2 1 2 1 2
330U_B2_2.5VM_R9M
PC9105
SGA00007Z00
+VCC_CORE
B
PC9001 PC9036 PC9068 U42@ PC9099 PC9104 PC9119 PC9139 PC9149 PC9158
+VCC_CORE
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9010 PC9035 PC9067 PC9098 PC9103 U42@ PC9118 PC9138 PC9148 PC9157
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9009 PC9034 U42@ PC9066 PC9080 U42@ PC9117 PC9137 PC9147 PC9159
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
+
1
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9008 PC9033 PC9065 PC9097 PC9116 PC9136 PC9146 PC9160
330U_B2_2.5VM_R9M
U42@ PC9101
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9007 PC9032 PC9064 PC9166 U42@ PC9115 PC9135 PC9145 PC9161
+
1
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
VCORE Output Capacitor:
PC9006 PC9031 PC9057 PC9169 U42@ PC9114 PC9134 PC9144

330U_B2_2.5VM_R9M
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M 1U_0201_4V6M 1U_0201_4V6M 1U_0201_4V6M
PC9100
SGA00007Z00
1 2 1 2 1 2 1 2 1 2 1 2 1 2
PC9005 PC9030 PC9056 PC9168 U42@ PC9113 PC9133 PC9143
1 2 1 2 1 2 1 2 PC9187 U42@ 1 2 1 2 1 2
PC9004 PC9029 PC9055 PC9167 U42@ 22U_0603_6.3V6M PC9112 PC9132 PC9142
1 2
1 2 1 2 1 2 1 2 PC9189 U42@ 1 2 1 2 1 2
PC9003 U42@ PC9028 PC9054 PC9171 U42@ 22U_0603_6.3V6M PC9111 PC9131 PC9141
A

1 2
1 2 1 2 1 2 1 2 PC9188 U42@ 1 2 1 2 1 2
22uF_0603*41
PC9002 U42@ PC9027 U42@ PC9053 PC9170 U42@ 22U_0603_6.3V6M PC9110 PC9130 PC9140
1uF_0201*35

1 2
2017/06/06
1 2 1 2 1 2 1 2 1 2 1 2 1 2
22_0603*1
330uF *2
UNPOP
U42
1
4
5 4 3 2 1
OpenVReg Configurations:(PSI pin)

Operation phase Number PSI Voltage setting Module model information:
R1, R2, R3, R4, R5, C are 1 phase with DEM 0V to 0.4V RT8816A-2P_NVVDDS_V2A.mdd for IC portion VGA_B+
PL801 VGA_EMI@
based on VGA type to set. RT8816A-2P_NVVDDS_V2B.mdd for SW portion S SUPPRE_ 5A Z80 20M 0805
1 phase with CCM 0.7V to 0.88V VGA_B+ 2 1
B+
2 phase with DEM 1.08V to 1.35V
PC804
2200P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
PC805
2 phase with CCM 1.6V to 5.5V
1
PC802
PC803
DH1_VGA VGA_EMI@
D D
@VGA_EMI@
Vboot=Vvref*Rref2/(Rref1+Rref2+Rboot)
2
PWM VID and Output voltage control
Rt=Rrefadj // (Rboot+Rref2) 1.Boot mode PQ801
PSI pull up on HW side VGA@ VGA@
1
Vmin= Vvref*[Rref2/(Rref2+Rboot)]*[Rt/(Rref1+Rt)] 2.Standby mode (don't support) AON6962_DFN5X6D-8-7
+1.8VGS_+3VGS_AON 3.Normal mode
D1
G1
Vmax=Vvref*Rref2/[(Rref1//Rrefadj)+Rboot+Rref2] 0.24UH_22A_20%_ 7X7X3_M
PL802
+VGA_CORE
1
7 LX1_VGA 1 4
Vout=Vmin+N*Vstep @VGA@ +1.8VGS_+3VGS_AON D2/S1
Vstep=(Vmax-Vmin)/Nmax PR801 2 3
1
10K_0402_1%
G2
S2
S2
S2
VGA_RF@
330U_B2_2.5VM_R9M
330U_B2_2.5VM_R9M
330U_B2_2.5VM_R9M
1SNUB_VGA1
2
1
VGA@ PR803 1 1 1
PR802
1 DL1_VGA 6
[24] PSI 1 2 @VGA@ VGA@
4.7_1206_5% + + +
PR833
PC806
PC807
PC808
2
1
0_0402_5% @ PR804 10K_0402_1%
VGA@
N16_VGA@ PR809 N17_VGA@
2
2 2 2
20K_0402_1% PR809
20.5K_0402_1%
10K_0402_1% PR805
0_0402_5% VGA_B+ PC809 VGA_RF@
680P_0402_50V7K
10.7K_0402_1%
N16_VGA@ PR813 1 2
N16_VGA@
VGA_CORE_EN [26]
2
N16_VGA@ PR812 20K_0402_1%
PR807
VGA@ VGA@ VGA@
1
1
2K_0402_1% VGA@ VGA_B+
@ PR810 @ PC801
10U_0603_25V6M
R2
10U_0603_25V6M
1 2 .1U_0402_16V7K
High: >1.2V
[24] GPU_VID0
Low: <0.55V
2
PC810
N16_VGA@ PR814
PC811
R3
NVVDDS_PSI_R
1
18K_0402_1% PR812 0_0402_5% DH2_VGA
R1 N16S-GTR
NVVDDS_EN
2
NVVDDS_VID
4.32K_0402_1%
C 1 2 1 2 DH1_VGA N16_VGA@ PU801 Rocset +VGA_CORE C
2
N17_VGA@ RT8812AGQW _W QFN20_3X3
16.5K_0402_1%
PQ802 EDP-Continuous 26.5A

1
N17_VGA@ N17_VGA@ PR813

0.01U_0402_16V7K
VGA@ VGA@
1
6.19K_0402_1% BST1_VGA1 PR815 2BST1_VGA-R AON6962_DFN5X6D-8-7 EDP-Peak 53A
PR814
R4
4700P_0402_50V7K
1 2.2_0603_5% OCP min 63.6A
D1
G1
1
0.24UH_22A_20%_ 7X7X3_M
PC812
PC813
REFADJ_NVVDDS
VGA@ PL803
+VGA_CORE
1
1 2
1
N17_VGA@ PC816 7 LX2_VGA 1 4
2
N17_VGA@ 2@ D2/S1
C
309_0402_1%
0.1U_0402_25V6
UGATE1
BOOT1
VID
EN
PSI
1
N16_VGA@ PC813 2 3
PR816
2700P_0402_50V7K
VGA@ VGA_RF@
N17S-G1
G2
S2
S2
S2
SNUB_VGA2
6 20 LX1_VGA PR817
R5 REFADJ PHASE1 +VGA_CORE
4.7_1206_5%
EDP-Continuous 29.7A
2
6
RGND_NVVDDS RT8816BGQW _W QFN20_3X3 VGA@
2
REFIN_NVVDDS 7
REFIN LGATE1
19 DL1_VGA EDP-Peak 59.2A
N16_VGA@ PR816 PR819 OCP min 71.1A
VGA@
0_0402_5% 1_0402_1% 4.7U_0402_6.3V 4pcs
1
VREF_NVVDDS PVCC_NVVDDS
DL2_VGA
8 PU801 18 1 2 PC817 VGA_RF@
VREF N17_VGA@ PVCC +5VALW 680P_0402_50V7K 10U_0603_6.3V 13pcs
1
1
PC818 Close Vref pin N17_VGA@ PR820 VGA@
+VGA_CORE
2
TON_NVVDDS DL2_VGA
0.1U_0402_25V6
N17_VGA@ PR821
1 2 9
TON LGATE2
17 PC819
2.2U_0603_16V6K
Near GPU Core
2
2
VGA_B+ 1 2 432K_0402_1% Rton VGA@
OCSET/SS
2.2_0805_5% 10 16 LX2_VGA
RGND PHASE2
1
UGATE2
PC823
PC828
PC829
PC824
PC826
PC827
PGOOD
N16_VGA@ PC818 N16_VGA@ PR820
PC830
10U_0402_6.3V6M
RGND_NVVDDS
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
PC831
10U_0402_6.3V6M
BOOT2
PC825
10U_0402_6.3V6M
VGA@
10U_0402_6.3V6M
10U_0402_6.3V6M
VSNS
1U_0402_6.3V6K PC820 499K_0402_1%

GND
1
1
1
1
1U_0603_25V6K @ PR823
2
0_0402_1% PC822
VGA@
1 2 0.1U_0402_25V6
2
[21] GND_SENSE_GPU
2
2
2
21
11
12
13
14
15
2
2
B B
VGA@ 4.7U_0402_6.3V 12pcs
PR825
1 PR8242 BST2_VGA1 2BST2_VGA-R
Remark: 1U_0402_16V 5pcs
DH2_VGA
2.2_0603_5% VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
1. Switching frequency setting:(Ton pin) 10_0402_5%
1000P_0402_50V7K
VGA@
Fsw=(Vin-0.5)/(2*Vin*Rton*3.2p) VGA@ +VGA_CORE
PC834
PC835
PC838
PC839
PC841
PC842
PC843
PC844
PC845
=352Khz Current Limit threshold setting
PC836
PC837
PC840
GB4-128 package
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1
0.01U_0402_16V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0402_6.3V6M
1
PC832
Rocset= (Ivalley * Rds(on) * 12) / Icoset
1
1
1
For debug only, VGA@ PR826
PC833
HW side need other resister 10K_0402_5%

NVVDDS_VSENSE
1U_0402_16V6K
1U_0402_16V6K
1U_0402_16V6K
1U_0402_16V6K
1U_0402_16V6K
2
@VGA@ 2 1 2
PC846
PC847
PC848
PC849
PC850
2
2
2
OCSET_NVVDDS
VGA@ @VGA@ +3VS
1
1 PR8272 PR829
+VGA_CORE 0_0402_5% DGPU_PWROK [21,25,26]
10_0402_5% N16_VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2
2
[21] VDD_SENSE_GPU 1 2 1 2 N17_VGA@ PC851
0.01U_0402_16V7K VGA@ VGA@ VGA@ VGA@ VGA@
Css
@ PR828 1 2
0_0402_1% 1 2
PR830 1 2 Under GPU Core
0_0402_5%
N17_VGA@ N17_VGA@ PR831
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
90.9K_0402_1%
PC852
PC853
PC854
PC855
PC856
PC857
PC858
PC859
PC860
PC861
PC862
PC863
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1
1
2
2
A A
VGA@ VGA@ VGA@ VGA@
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@

Issued Date 2015/04/19 Title
2012/04/19 Deciphered Date
VGA_CORE
WWW.AliSaler.Com
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. VGA_CORE
5 4 3 2 1
5 4 3 2 1
D D

SY8286_V1_single.mdd
SY8286_V1_dual.mdd keep short pad,
B+_1.35V
@VGA@
PR1203 VGA@ PC1204
@ PJ1201
0_0402_5% 0.1U_0402_25V6
BST_1.35V 2 BST_1.35V_R
VGA_B+ 1
1 2
2 1 1 2
10U_0603_25V6M
0.1U_0402_25V6
2200P_0402_50V7K
JUMP_43X79
1
VGA_EMI@PC1201
@VGA_EMI@PC1203
VGA@ PC1205
2
2
VGA@ VGA_RF@ PR1202 VGA_RF@ PC1202
4.7_1206_5% 680P_0402_50V7K
1
PU1201 1 2 SNUB_1.35V 1 2
IN3
IN2
IN1
BS
+3VS Use 7x7x3 size when the layout space is enough.
LX_1.35V 5 17
LX EP
PL1201 VGA@
1
Confirm HW side LX_1.35V

PR1201 @VGA@
100K_0402_5% 6
GND
SY8386RHC_QFN16_2P5X2P5
LX2
16 1 4
+1.35VGSP
2 3
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
15
2
LX1
1
VGA@PC1206
VGA@PC1207
VGA@PC1208
VGA@PC1209
VGA@PC1210
1UH_6.6A_20%_5X5X3_M
7
[26] +1.35VGS_PGOOD PG 14
2
C GND1 C
8 13 LDO_3V_1.35V
VGA@
1
VGA@ PD1201 TEST VCC
1 2 PC1211
ILMT
BYP
4.7U_0402_6.3V6M
EN
FB
2
RB751V-40_SOD323-2
+3VALW
10
11
12
1
VGA@
1
VGA@ PR12054.7K_0402_5% PR1209
1 2 EN_1.35V 1K_0402_1%
[25] 1.35V_PWR_EN
2.2U_0201_6.3V6M
VGA@ R1
2
1
VGA@PC1213
1
PR1204
2
VGA@ PR1206 PC1212 VGA@ 12.7K_0402_1%
2
1M_0402_1% 0.22U_0402_16V7K @ PJ1202
2
JUMP_43X118
1 2
LDO_3V_1.35V +1.35VGSP +1.35VS_VRAM
2
1 2
FB_1.35V
EN :H>0.8V ; L<0.4V
1
@VGA@
EN pin don't floating PR1208
If have pull down resistor at HW side, 0_0402_5%
please delete PR601.
FB=0.6V
2
1
ILMT_1.35V
EN pin don't floating PR1207 VGA@
If have pull down resistor at HW side, pls delete PR702 Vout=0.6V* (1+R1/R2) R2 10K_0402_1%
=0.6*(1+(12.7/10))
2
Vout=1.362V
B B
A A

VRAM-SY8286RAC
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. ISL62771 Module
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1

for PWR
Item Reason for change PG# Modify List Date Phase
Add PR407(SD028000080,S RES 1/16W 0 +-5% 0402)

1 To avoid shortage issue and fix BOM error 2018/07/31 EVT
Change PQ1661 PN from SB000012900 to SB000011Z00
D D
2 Modify BOM for X1 code Change PQ314 from SB00000ST00 to SB000009Q80 2018/08/10 DVT
3 Modify BOM for X1 code Change PC315,PC411,PC702,PC1202 from 680P_0603_50V7K to 680P_0402_50V7K 2018/08/10 DVT
4 Modify Vin detector setting for 4 cell battery Change PR306 from 287K_0402_1% to 392K_0402_1% 2018/08/16 DVT
5 Change Battery connector P/N Change JBATT1 to ACES 60757-00802-001 2018/08/16 DVT
6 Change +3VALWP IC solution Change PU401 from SY8286BRAC to SY8386BRHC 2018/08/16 DVT
7 Change +1.05VALWP & +1.35VGSP IC solution

Add PR1209(SD034100180,S RES 1/16W 1K +-1% 0402) 2018/08/16 DVT
Change PU701 & PU1201 from SY8286RAC to SY8386RHC
Change PR330 from 349_0402_1% to 100_0402_1%
8 Charger IC Vendor suggestion Change PC321 from 0.015U_0402_25V7K to 0.033U_0402_25V7K 2018/08/27 DVT
C Change PR333 from 182K_0402_1% to 150K_0402_1% C
9 Change PC9120,PC9126,PC9127,PC9129 from 0.47U_0201_4V6M to

Follow cost down action 0.47U_0201_6.3V6K 2018/08/27 DVT
10 Change PQ311 P/N Change PQ311 P/N from SB00001IL00 to SB00001C500 2018/08/27 DVT
PC307 & PC309 change from SE000005Z80(S CER CAP 0.22U 25V K X7R 0603) 2018/08/27 DVT
11 Charger IC Vendor suggestion to SE00000WA00(S CER CAP 0.47U 25V K X5R 0402)
PCZ19 change from SE000013J00(S CER CAP 0.22U 25V K X6S 0402)
12 Follow cost down action to SE000015W00(S CER CAP 0.22U 25V K X5R 0402) 2018/08/27 DVT
PCZ3,PCZ13,PCZ16 change from SE074104K80(S CER CAP 0.1U 50V K X7R 0402)
Follow cost down action to SE00000G880(S CER CAP 0.1U 25V K X5R 0402) 2018/08/27 DVT
13
PC505 , PC1204 change from SE00000W210(S CER CAP 0.1U 25V K X7R 0402)
Follow cost down action to SE00000G880(S CER CAP 0.1U 25V K X5R 0402) 2018/08/27 DVT
14
B B
15 Fine tune for U42 CPU transent test result Add PC9103, PC9187 ,PC9188 ,PC9189(22U_0603_6.3V6M) 2018/08/29 DVT
16 Follow HW request Change PR826 from 100K to 10K 2018/08/29 DVT
Change PRZ35 from 4.22K to 2.8K Change PRZ71 from 182K to 19.1K
17 Change PCZ11 from 150p to 330p Change PRZ48 from 30K to 28K
Fine tune for U42 CPU transent test result 2018/08/30 DVT
Change PRZ67 from 115 to 7.68K Change PRZ54 from 22.1K to 24.3K
Change PRZ70 from 549K to 5.62K
Change PRZ68 from 374 to 4.64K
Delete PC9101,PC9166,PC9167,PC9168,PC9169,PC9170,PC9171,PC9068,PC9080,
18 Fine tune for U22 CPU transent test result PC9002,PC9003,PC9027,PC9034 for U22 CPU SKU 2018/09/05 DVT
Delete PR1(45.3K_0603_1%)
19 To avoid RTC loos issue 2018/09/06 DVT
Change PR2 from 1.5K_0603_1% to 0_0603_5%
Change PR304,PR305,PR332,PR407,PR413,PR508,PR511,PR709, PR601,
A 20 0 ohm change to short pad PR606,PR705, PR711,PR803 to short pad 2018/10/11 PVT A

WWW.AliSaler.Com
PIR (PWR)
Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Z_BDW
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1 for EE
Item Reason for change PG# Modify List Date Phase
1 Audio Vendor request for hum noise issue Reserved +5VALW for AVDD5 (pin29) 2018/10/17 PVT
D D
C C
B B
A A

EE (PWR)
Custom 0.3
5 4 3 2 1

LENOVO FLEX 14 - EL4C1-EL451 LA-H081P r03 20181022

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LENOVO FLEX 14 - EL4C1-EL451 LA-H081P r03 20181022

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A B C D E

DIS M/B Schematic Document

Security Classification Compal Secret Data Compal Electronics, Inc.

USB2.0 x1, 480Mb/s USB Charger USB2.0 x1, 480Mb/s

NGFF (Key E) PCIe x1 , Gen1 2.5Gb/s Intel WHL/CML-U On Sub Board

eDP Panel eDP x2 , HBR 2.7Gb/s USB2.0 x1, 480Mb/s

PCIe x1 , Gen1 2.5Gb/s Card Reader SDIO

USB2.0 x1, 480Mb/s HDA HP

SPI SPI ROM

LED Security Classification Compal Secret Data

Voltage Rails BOM Structure Table USB 2.0 Port Table

EC SM Bus1 address EC SM Bus2 address

PCH SM Bus address GPU SM Bus address

UC1 I3_8145U_R3@ UC1 I5_8265U_R3@ UC1 I7_8565U_R3@ GPU

SMBUS Control Table

SRD1V W0 2.1G SREJQ W0 1.6G SREJP W0 1.8G

Full ON HIGH HIGH HIGH HIGH ON ON ON ON

S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF

S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF

Security Classification Compal Secret Data

G3->S0 S0->S3/DS3 S0/ DS3 ->S0 S0->S5

PCH_PWR_EN (SLP_SUS#) PCH_PWR_EN (SLP_SUS#)

EXT_PWR_GATE# If EXT_PWR_GATE# Toffmin is too small, Pwr EXT_PWR_GATE#

Security Classification Compal Secret Data Compal Electronics, Inc.

Trace width=20 mils, Spacing=25mil, Max length=600mils

+1.05VS_VCCIO < Test Point for CMC Debug >

If routed MS, PECI requires 18 mils spacing to other signals

1 2 H_PROCHOT#_R Y4 PECI PROC_TDI Y5 SOC_XDP_TDO

RC15 2 @ 1 49.9_0402_1% EOPIO_RCOMP N5

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

0 = LPC is selected for EC ==> Default

1 = eSPI is selected for EC

RPC1, RPC3 and RC30 are close to UC3

SOC_SPI_0_SO RC29 1 2 33_0402_5% SOC_SPI_0_SO_R EC_SMB_CK2 RC30 1 2 1K_0201_5%

B EC_SPI_CLK RC41 1 EMI@ 2 33_0402_5% SOC_SPI_0_CLK_R B

< SPI ROM - 16M >

Security Classification Compal Secret Data Compal Electronics, Inc.

< HD AUDIO > RC163 1 2 33_0201_5% HDA_RST#

RC46 1 EMI@ 2 33_0201_5% HDA_BIT_CLK UC1G

GPP_H21 XTAL frequency select.

SOC_GPIO_C10 RC59 1 @ 2 0_0402_5% GPU_EVENT#

Security Classification Compal Secret Data Compal Electronics, Inc.

AW2 AU1 CLKIN_XTAL RC65 1 2 10K_0201_5%

RC71 1 2 20K_0402_5% 33E_SOC_XTAL24_OUT_R 1 2 33E_SOC_XTAL24_OUT

RC75 1 2 1M_0402_5% SM_INTRUDER# < PCH PLTRST Buffer > YC1

RC90 1 2 60.4_0402_1% EC_VCCST_PG

Security Classification Compal Secret Data Compal Electronics, Inc.

GSPI0_MOSI (Internal Pull Down):

RC102 1 2 10K_0201_5% SOC_GPIO_A7

RC103 1 2 49.9K_0402_1% UART0_RX

1 = Integrated CNVi disable.

RC160 1 @ 2 10K_0201_5% DGPU_SEL0

RC162 2 1 20K_0201_5% CNV_RGI_CTX_DRX

SOC_GPIO_B16 RC121 1 2 0_0201_5% GC6_FB_EN

[36] PCIE_CRX_DTX_N13 BK6 CB8

NGFF_SSD2_PEDET RC131 1 2 10K_0201_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

1 1 V drop : 0.019 V +1.05VS_VCCIO VSSSA_SENSE

+1.2V change package of 1U from 0201 to 0402

+1.05VS_VCCIO change package of 1U from 0201 to 0402

Close to CPU Underneath CPU

Security Classification Compal Secret Data Compal Electronics, Inc.