Memory Management

Ankur Gupta
Agenda

 Memory Management : Contiguous Alloc.

– Static Memory Partitioning
– Dynamic Memory Partitioning
– Segmentation
 Memory Management: Noncontiguous Alloc.
– Paging
– Virtual Memory
– Some Memory Allocation Policies
Introductory Concepts

 The memory manager is responsible for allocation of

memory of finite capacity to requesting processes.
 No process can be activated before a certain
amount of memory is allocated to it.
 Temporarily inactive processes may be swapped out
of memory to load another process which may be
ready for execution
 The requirement for multi-programming
environments is to have multiple processes (address
spaces) in the main memory at the same time for
concurrent execution.
 The memory manager needs to contend with 2
conflicting issues –separation of address spaces
andsharing of memory.
 Introductory Concepts (Contd…)

Separation of address spaces is achieved by

isolation of each address space. It is needed to
prevent an error prone or malicious process to
access and potentially corrupt the contents of the
Sharing of
address space of another process.
memory is necessary for cooperating processes as a
means of inter-process communication and is
needed in multiprogramming environments. The
memory management module needs to take care of
allowing sharing of memory and also ensuring that it
is protected.
Contiguous Memory Allocation
 Means that program instructions and data are placed in a set
of memory locations with strictly consecutive addresses.
 Typical implementation is to divide the available memory into a
set of partitions (static partitioning) and load each process into
a separate partition. With this approach we can have a fixed no.
of processes in memory. Also if a resident process terminates
and a small process is loaded into a larger partition, then there
is wastage of memory – internal fragmentation, which is
memory wasted within a partition. So, this approach is not very
efficient.
 Another approach could be to have partitions of varying sizes –
some large, some medium and some small, so that we can find
as close a fit as possible between the size of the process and
the size of the partition. Again, this approach does not ensure
efficiency as we cannot predict process sizes on a system.
Performance criteria for Memory
Allocation Strategies

 Wasted Memory
 Time Complexity
 Memory-access overhead
 Single process monitor
 Simplest form of memory management.
Memory divided into 2 partitions – one for 0 Operating System
the OS and one for the user process.
 OS simply needs to keep track of the first (monitor)
and last memory location to allocate
memory for transient processes.
 If a process whose size is more than the
Transient Process Area is attempted to be
loaded, the OS throws an error preventing
such an operation
 Protection of OS code from user programs
requires hardware assistance – fence
register which contains the highest
address occupied by the OS Code.
Addresses generated by user programs
need to be higher than the address in the Transient Process Area
fence register. Otherwise the process is
aborted.
 Other approach is to use protection bits
with each memory location and not to
allow tampering of a memory location MAX
whose memory bit is protected
Static Memory Partitioning

 Division of memory is made considering the available physical

memory, desired degree of multiprogramming and typical sizes
of processes most frequently run on a given installation
(heuristics from past experience). This is done at system
generation time i.e at the time of kernel recompilation, maybe
after a kernel configuration parameter change.
 The OS first allocates a memory region large enough to hold
the process’s image (text + data + fixed region for data and
stack segments to grow into). It then loads the process’s image
from disk into main memory. Thus, the process makes the
transition to ready state and thus becomes eligible for
execution.
 Request to allocate partitions happens when 1) a process is
created and 2) when a swapped-out process is reactivated.
 Static Memory Partitioning (Contd…)
0K Partition Partition Partition
OS Base Size Status
100K
0K 100K ALLOC
P1 100K 300K ALLOC
400K
400K 100K FREE
500K
P2 500K 250K ALLOC

750K 750K 150K FREE

900K 900K 1000K ALLOC

P3
1000K Partition Description Table
Partition Allocation Strategy

 First Fit – allocate first free partition large enough to

hold the process.
 Best Fit – allocate the smallest partition capable of
holding the process being created.
 These 2 approaches represent a trade-off between
speed and memory utilization. However, if the
number of partitions is small then the speed gains by
using first fit are insignificant.
Partition Allocation Scenarios
 No partition is large enough to hold the incoming process – OS
throws an error as it can’t do much. Need to reconfigure the
kernel.
 All partitions are allocated – defer the loading of that process
until a suitable partition is available or remove a resident
process to make space for the incoming process
(swapping…discussed in next slides)
 Some partitions are free, but none of the free ones are large
enough to hold the incoming process – again deferring or
swapping can be used. Deferring the memory allocation of a
process and loading processes which can fit into the smaller
partitions available sounds nice, but it directly violates the
order in which the scheduler decides to sequence the
processes. So, if the memory manager decides to defer
processes, it can impact scheduler performance.
Swapping
 Suspended or preempted processes need to be
moved from main memory to the disk to make way
for other processes – these processes also need to
be moved back into main memory when they need to
swapper .
execute once again. This is the job of the
 Once the processes are resident in main memory
they make the transition to “ready to run” state. So,
the swappers job is to improve processor utilization
by improving the ratio of ready to resident processes.
WHY?? HOW??
 The swapper needs to
– Select the process to swap out
– Select the process to swap in
– Allocation and management of swap space.
Swapping (Contd…)
 A process can be swapped out if it is low priority or has been
suspended while waiting for I/O to complete. Other important
considerations are the time spent in main memory and
whether it got a chance to run while in memory (otherwise you
can cause thrashing if you swap processes immediately after
they were loaded in main memory)
 A process is swapped in based on the time it spent in
secondary storage (age), its priority, and whether it has met the
swapped-out disk residence time requirement to prevent
thrashing.
 Running processes have a different “process image” than
dormant processes, because they would have modified their
stack and data regions. When running processes are swapped
out they should not overwrite the initial process image on the
disk. Hence the swapper needs to maintain a different swap
file in secondary storage for this purpose.
Swapping (Contd…)
 There are 2 approaches to swap files – a system-wide swap file
or a per process swap file. Swap space is a kernel configuration
parameter.
– A system-wide swap files handles the swapping requirements of all
processes. This is usually a static file which is placed on a fast
access secondary storage device. The major consideration in this
approach is the size of the system-wide swap file. A small size
means that the file access is fast and it is easier to manage. On the
other hand it means that fewer processes can be active in the
system as a new process can be activated only when sufficient
swap space can be reserved for it.
– A per process swap file eliminates the dimensioning problems with
the system-wide swap file and also that there is now no limitation
on the number of active processes in the system. The
disadvantages are – more disk space is needed, slower access as
swap files are scattered around secondary storage
Regardless of the type of swapping file, accessing secondary storage
is an expensive operation and swapping should be done when
absolutely unavoidable.
Relocation
 When a program is translated (compiled into an executable), its
instructions and data are assigned addresses within the address space
of that process. These local or virtual addresses need to be mapped to
the actual physical addresses of the partition in which the program
may be loaded at run time. So, the program needs to be relocatable in
memory, i.e it should be able to execute correctly irrespective of the
memory location it is loaded in. Relocation can be static or dynamic
 Static relocation is done once before or during the loading of the
program into main memory by a relocating linker or loader. Thus,
statically relocatable programs can only be swapped in to the same
partitions that they were initially loaded in or software relocation needs
to be performed each time the process needs to be swapped in. This
approach has a lot of overheads
 Dynamic relocation implies that address mapping is done at run time
usually with hardware support. This is done with the help of base
registers, which contain the physical load address of the program.
Then the address from the address space of the process is mapped to
the physical address by simply adding the base register value to the
local address. This is invisible to programmers.
Dynamic Memory Partitioning
 Static memory partitioning is inflexible and unable to
adapt in a dynamic environment where process
sizes cannot be predicted. Also lot of memory is
wasted due to internal fragmentation. Dynamic
Partitioning apparently alleviates this problem, by
dynamically catering to the memory needs of
processes of varying sizes.
 With dynamic partitioning, in principle there is no
limit to the degree of multiprogramming, but
practically the limit is imposed by the size of the
main memory.
Dynamic Memory Partitioning (Contd..)

 Need to keep track of partitions created and available free

areas – so we have the Partition Description Table and the
Free List data structures. The PDT contains the base address
of the partition, its size and whether it is allocated and free list
contains size of the free block and a pointer to the next free
block of memory.
 Algo for partition creation goes like this
For each incoming process, create partition p
- search free list for a free area f such that f_size >= p_size
else terminate with an error
- if p_size and f_size are roughly the same, than allot the
entire free area, else f_base = p_base + p_size and f_size
= f_size – p_size. (minimize memory wastage)
- add this info to the PDT (in an unused entry)
- record PDT entry in the Process Control Block (The OS
needs to know the partitions that a process occupies)
Dynamic Memory Partitioning (Contd..)

 Algos for searching the free list include – First Fit, Best Fit,
Worst Fit and choice of these depends on trade-off between
speed and wastage of memory.
 Algo for partition deletion goes like this
For each outgoing process P
- locate the PDT entry using P’s PCB – PDT[PCB[P]]
- If P is being swapped out, copy its runtime image from
its partition to the swap file.
- update the PCB by removing the partition reference
- add the partition to the free list and try and add it to
neighboring free areas to reduce fragmentation.
- remove the partition entry from PDT.

Reading Assignment : Read about Buddy Systems – a

memory allocation de-allocation strategy.
Dynamic Memory Partitioning (Contd..)

 Memory Compaction – done to reclaim smaller

chunks of available memory and compact them into
larger, more useful chunks – to overcome external
fragmentation.
 Typically holes are combined into one big free area
and placed at one end of main memory.
 For compaction the processes need to be
suspended and relocated to other memory locations
after compaction is done. This is an expensive
operation, so we need to decide carefully when
compaction is to be performed – every once in a
while or every time a free area is created.
Segmentation
 Problem with dynamic partitioning is the creation of
small holes of wasted memory – external
fragmentation – we cannot reduce the size of
processes to fit in these holes, but we can try and
decrease the size of requested memory for a
process, by splitting the process into relocatable
segments which can be placed in non-contiguous
memory locations. Items within a segment are
however, placed in contiguous memory locations –
so segmentation employs a mix of contiguous and
non-contiguous memory allocation strategies.
 To access a particular memory location in
segmented systems we need
– Segment name/number
– Offset within the segment.
Segmentation (Contd…)

 Each segment can grow and shrink independently of

the other segments
 Segments facilitate sharing of code. For instance,
we can put a shared procedure in a separate
segment, which can be made accessible to
procedures in other segments thereby avoiding
having a copy of the shared procedure in each
process’s address space. Shared libraries are also
possible due to segments as it is a collection of
procedures, which can be put in different segments
or the same segment.
Segmentation – Address Translation

 Since, addresses in segmented systems have two components

(two dimensional addresses – segment number + offset in the
segment), a mechanism is needed to translate these 2-D
addresses into uni-dimensional physical addresses.
 To make each segment relocatable, segment addresses start
from virtual address 0. These addresses are just added to the
base physical address which marks the beginning of the
physical memory partition which houses the segment.
 When a process is to be loaded, the memory manager
allocates different partitions to individual segments of that
process (dynamic partitioning), the base of that segment
(known after creation of partition) and its size (known from the
load module) are recorded as a tuple - the Segment Descriptor.
All segment descriptors of a given process are stored in the
Segment Descriptor Table (SDT).
 Segmentation – Address Translation
Lookup base
physical
execute address
Segmented Address Memory from SDT for
Program
Generated (Logical Manager given
4 Address) – Seg No + 5 segment
1 Compile and link Offset number. Also
Add offset check if
6 offset is
to base
Segm Size Type 7 within the
address legal limit
ent
No. Actual Physical
Address Base Size
0 a Code
1 b Data
100K a
2 c Stack 550K b
2 3
3 d Share Memory 750K c
d Manager Create Partition and
update SDT 900K d
Load Module
Segmentation – Address Translation

 For example in intel’s 286 processor, there can be 16K

segments of upto 64K per process. So, there would be 16K
entries in the SDT. Given the potential size of SDT’s, they are
not kept in registers, but may be put in a separate segment. To
hasten access times to SDTs, two hardware registers SDT base
register and SDT limit register, the values of which are stored
in the PCB of the process. This implies that the SDT entries
need to be updated on each process switch. WHY??
 The overhead of this approach is in the storing and accessing
of SDT. Mapping a segmented address requires two memory
references
– to access the Segment Descriptor in the SDT
– to access the target item in physical memory.
So, segmented memory access time is twice as
long as physical memory access time.
Segmentation Descriptor Caching

 Hardware accelerators needed to alleviate

the problem of slow address translation.
Because SDTs can be large, they cannot be
kept in registers, but a few of the most
frequently used can indeed be cached in
registers – like a shared procedure which is
frequently used by the rest of the program.
Memory Management – Non Contiguous
Allocation

 A single logical object may be placed in non-contiguous areas

of physical memory. This is a much more flexible approach and
memory can be utilized better, but there is a tradeoff with the
additional complexity of allocating and deallocating non-
contiguous memory – because it requires address translation
between contiguous virtual addresses and non-contiguous
physical addresses.
 Virtual Memory – is a memory management scheme which
allows execution of processes when portions of its address
space are resident in main memory. Other portions are brought
in main memory on-demand as per the execution requirements.
It was basically proposed to allow programs larger in size than
the main memory to be split into many portions and executed
independently.
Paging
 A non-contiguous memory management scheme - works on
the same principle – provide the illusion of a contiguous virtual
address space even though it is physically discontiguous in
main memory – again done through dynamic address
translation.
 Physical and virtual memory are divided into fixed size blocks
calledpage frames andpages respectively. Both are of the
same size. The requesting processes pages are loaded into
equal no. of physical page frames. Address translation involves
mapping pages to page frames. Page frames allocated to a
single process can be dispersed throughout main memory as
they are mapped individually.
 If the process size is not a multiple of page size then there is
some amount of wasted memory in the last page frame
allocated to the process – page fragmentation or page
breakage.
Paging (Contd…)

 Consider 16 MB main memory – 2^24 bytes – So, 24

bit addresses. Let us assume a 4K (4096) page size.
So, there will be 4096 pages of 4096 bytes each. So,
to reach a physical address within a page we need to
know the page number and the offset within the
page (as with segments). 4096 is 2^12, so we can
use 12 bits out of the 24 bit address to uniquely
identify page numbers and the remaining twelve bits
to access any of the 4096 memory locations inside a
page. Only the page numbers need to be translated
(from virtual to physical) as the offsets are same for
pages as well as page frames.
 Paging – Address Translation
Look up first 12 bits
0K of the address (page 0 – address of Page
0 no.) in the page Frame in Memory
mapping table (PMT)
4K 1 – address of Page Page
1 Frame in Memory Mapping
Table
8K 2 – address of Page (stored in
2
Frame in Memory the PCB
12K of a
3 3 – address of Page process)
Frame in Memory
12 lower 12 higher
order bit order bits with
offset physical page
frame address
Actual Physical
Address
 Structure of a Page Table Entry
 Page Frame Number is the address of
the physical page frame in memory
 Present/Absent bit indicates whether Referenced Protection
the frame is in memory or needs to be
brought in from secondary storage
 Protection refers to access rights to this
page frame (read, write or execute) Page Frame
Modified bit is set when the page is

written to and becomesdirty . This page Number
needs to be written to secondary
storage
 Referenced bit is set when a program is
accessing this page. So, this cannot be
removed from main memory Present/Absent
Caching Modified
 Caching disabled flag is used for
devices. If Input is being received from Disabled
a device, you don’t want an old cached
page from memory, but direct input
from the device. So, disable caching for
that page.
Paging – keeping track of page frames

 Done with the help of a Memory Map Table

(same as Partition Description Table)- which
is simply the status of each page frame –
Allocated or free. The MMT has the same
number of entries as the number of page
frames – 4096 in the previous example.
 Alternate is to have a free list of page frames
which will help locate free page frames faster
than the MMT.
Paging – Page Faults

 When a requesting process accesses a page, the

corresponding page frame of which is not in main
memory, it cause a trap to the OS, called a page fault.
This causes the required page frame to be loaded
from the disk into main memory. If there are no free
page frames, then page frames need to be swapped
– a page frame is written out to secondary storage
to make way for the incoming page frame.
 Hardware traps to the kernel – PC is saved
 State of Hardware is backed up (registers and all)
 OS knows the virtual address which caused the page
fault. Is this address valid? No – kill process
Paging – Page Faults (Contd…)

• Is there a free page? No – page replacement algo

• If the selected page for eviction is “dirty” write it to disk. A context
switch takes place. Run another process till disk transfer completes
• When page is clean, OS looks up the disk address to find the needed
page and transfers it to main memory
• When the page arrives, indicated by a disk interrupt, the page tables
are updated to indicate its position and frame is marked as being in
normal state
• The instruction which caused the fault is restored and PC is set to
that instruction
• The faulting process is scheduled
• The faulting process begins execution as if no page fault occurred
Paging – Page Replacement Algorithms

 Not Recently Used

 First-In First-Out
 Second Chance
 Clock
 Least Recently Used
 Working Set
Belady’s Anomaly

 The problem with FIFO is that it does not take

into account the pattern of page usage. As a
result, a page which was paged-out, can
immediately be paged-in if a page fault
occurs, leading to thrashing.
 Also, it is counter-intuitive. If we have more
page-frames, we would think it would lead to
fewer page faults, but Belady discovered that
FIFO could cause more page faults when
more page frames are available.
Belady’s Anomaly (Contd…)

 Consider virtual page reference sequence of

0 1 2 3 0 1 4 0 1 2 3 4 first with 3 page frames
and then with 4 page frames. Using FIFO
page replacement algo, in the first case we
get 9 page faults and in the second case 10
page faults.

CLASS ASSIGNMENT : PROVE IT

Inverted Page Tables

 Page tables contain one entry per virtual page. For

an address space of 2^32 bytes and a 4K (2^12) page
size, we need 2^20 page table entries. This is
manageable, but with a 64 bit address space, we
need 2^52 page table entries. With say 8 bytes per
entry, we need 2^55 bytes of memory (approximately
30 million GB). This is just not feasible.
 The solution for such a scenario is to use an
Inverted Page Table (IPT). In this scheme, there is
one entry per page frame in real memory, rather than
an entry per page of virtual address space.
Inverted Page Tables (Contd…)

 So, with 256 MB RAM and a 4KB page size, we only

need 65,536 entries. Each entry keeps track of which
process, virtual page is associated with the physical
page frame. Thus, huge amounts of memory + space
is saved, especially when the virtual address space
is much larger than physical memory.
 However, address translation becomes much harder.
When a process N references virtual page P, it can no
longer use P to index into the page table and locate
the physical frame. It has to traverse the entire IPT
to look up the (N,P) tuple entry. This has to be done
for each memory reference, thereby impacting
execution speed.
Inverted Page Tables (Contd…)

 The solution is to use Translation Lookaside Buffers

(TLB) – another form of caching, which stores the
heavily used pages. So, address translation can
happen as fast as in the normal case. If the TLB does
not have an entry, then the IPT needs to be searched
anyway. However, we can use a hash table – hashed
on the virtual page number – in the IPT to greatly
speed up the search operation of IPT. All virtual page
numbers which hash to the same bucket are chained
together, along with their corresponding physical
page frames. If the hash table has the same number
of entries as the number of physical page frames,
then the average chain will only be one entry long.
Hybrid Schemes : Segmentation with
Paging

 If segments are large, it may be difficult to keep them in main

memory. So, why not page segments – Divide the large
segments into pages and keep only the pages (containing
portions of the segment) in memory. (MULTICS & PENTIUM)
 So, we need a segment descriptor table and a page table per
segment.
 Virtual Address contains segment no, page no and offset.
 First find the segment descriptor from the segment number in
the virtual address
 If the segment’s page table is not in memory a segment fault
occurs and the page table is loaded
 Lookup the page table to locate the address of the physical
page frame. If frame is not in memory, page fault occurs.
 Add offset to find physical address
Assignment II

 What are the future trends in memory

(primary as well as secondary) management?

NOTE : Look at concepts like SANs (Storage

Area Networks, RAID, caching, memory
management in distributed systems etc.
THANK YOU !!