COMPUTER ORGANIZATION AND ARCHITECTURE LAB

(KCS-302)

Submitted To: Mr. Laxmi kant Sagar Submitted By: Vishal Sharma
Roll Number: 1901920100328

Department of Computer Science & Engineering

G L Bajaj Institute of Technology and Management
Greater Noida – 201306
 Experiment – 1

OBJECT: Implementation of Gates

SOFTWARE USED: Logisim
(A) AND GATE: The AND gate is a basic digital logic gate that implements logical conjunction -
it behaves according to the truth table. A HIGH output (1) results only if all the inputs to the
AND gate are HIGH (1). The function can be extended to any number of inputs.
Represented by: Y = A.B OR AB

Truth Table:
A B A.B
0 0 0
0 1 0
1 0 0
1 1 1

OUTPUT:
(B) OR GATE: The OR gate is a digital logic gate that implements logical disjunction – it
behaves according to the adjacent truth table. A HIGH output results if one or both the inputs
to the gate are HIGH. If neither input is high, a LOW output results.
Represented by: Y = A+B

Truth Table:
A B A+B
0 0 0
0 1 1
1 0 1
1 1 1

OUTPUT:
(C) NOT GATE: In digital logic, an inverter or NOT gate is a logic gate which implements
logical negation. The truth table is shown on the right.
Represented by: Y =A’

Truth Table:
A A’
0 1
1 0

OUTPUT:
 Experiment – 2

OBJECT: Implementing HALF ADDER, FULL ADDER using basic logic gates
SOFTWARE USED: Logisim
HALF ADDER: It is a combinational arithmetic circuit that adds two numbers and produces a sum
bit (S) and carry bit (C) as the output. If A and B are the input bits, then sum bit (S) is the X-OR of
A and B and the carry bit (C) will be the AND of A and B.

Truth Table:
A B
0 0
0 1
1 0
1 1
SUM CARRY
0 0
1 0
1 0
0 1

OUTPUT:
FULL ADDER: It is the adder which adds three inputs and produces two outputs. The first two
inputs are A and B and the third input is an input carry as C-IN. The output carry is designated as C-
OUT and the normal output is designated as S which is SUM.

Truth Table:
A B CARRY IN SUM CARRY OUT
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
1 0 0 1 0
0 1 1 0 1
1 1 0 0 1
1 0 1 0 1
1 1 1 1 1

OUTPUT:

[0] [1]

[2] [3]
[4] [5]

[6] [7]
 Experiment – 3

OBJECT: Implementing Binary -to -Gray, Gray -to -Binary code conversions

SOFTWARE USED: Logisim

BINARY YO GRAY: Gray code has property that two successive numbers differ in only one
bit because of this property gray code does the cycling through various states with minimal effort
and used in K-maps, error correction, communication etc.

(3- Bit)

Truth Table:
Decimal Binary Gray
A B C D E F
0 0 0 0 0 0 0
1 0 0 1 0 0 1
2 0 1 0 0 1 1
3 0 1 1 0 1 0
4 1 0 0 1 1 0
5 1 0 1 1 1 1
6 1 1 0 1 0 1
7 1 1 1 1 0 0
OUTPUT:

[0] [1]

[2] [3]

[4] [5]

[6] [7]
 (4- bit)
Truth Table:
Decimal Binary Gray
A B C D E F G H
0 0 0 0 0 0 0 0 0
1 0 0 0 1 0 0 0 1
2 0 0 1 0 0 0 1 1
3 0 0 1 1 0 0 1 0
4 0 1 0 0 0 1 1 0
5 0 1 0 1 0 1 1 1
6 0 1 1 0 0 1 0 1
7 0 1 1 1 0 1 0 0
8 1 0 0 0 1 1 0 0
9 1 0 0 1 1 1 0 1
10 1 0 1 0 1 1 1 1
11 1 0 1 1 1 1 1 0
12 1 1 0 0 1 0 1 0
13 1 1 0 1 1 0 1 1
14 1 1 1 0 1 0 0 1
15 1 1 1 1 1 0 0 0

OUTPUT:
GRAY TO BINARY: The Most Significant Bit (MSB) of the binary code is always equal to the
MSB of the given binary number. Other bits of the output binary code can be obtained by checking
gray code bit at that index. If current gray code bit is 0, then copy previous binary code bit, else
copy invert of previous binary code bit.

Truth Table:
Decimal Gray Binary
E F G H A B C D
0 0 0 0 0 0 0 0 0
1 0 0 0 1 0 0 0 1
2 0 0 1 1 0 0 1 0
3 0 0 1 0 0 0 1 1
4 0 1 1 0 0 1 0 0
5 0 1 1 1 0 1 0 1
6 0 1 0 1 0 1 1 0
7 0 1 0 0 0 1 1 1
8 1 1 0 0 1 0 0 0
9 1 1 0 1 1 0 0 1
10 1 1 1 1 1 0 1 0
11 1 1 1 0 1 0 1 1
12 1 0 1 0 1 1 0 0
13 1 0 1 1 1 1 0 1
14 1 0 0 1 1 1 1 0
15 1 0 0 0 1 1 1 1
OUTPUT:

[0] [1]

[2]
[3]

[4] [5]

[6] [7]
[8] [9]

[10] [11]

[12] [13]

[14] [15]
 Experiment – 4

OBJECT: Implementing 3-8 line DECODER.

SOFTWARE USED: Logisim
DECODER: In digital electronics, a binary decoder is a combinational logic circuit that converts
binary information from the n coded inputs to a maximum of 2ⁿ unique outputs.

Truth Table:
E A B C D7 D6 D5 D4 D3 D2 D1 D0
1 0 0 0 0 0 0 0 0 0 0 1
1 0 0 1 0 0 0 0 0 0 1 0
1 0 1 0 0 0 0 0 0 1 0 0
1 0 1 1 0 0 0 0 1 0 0 0
1 1 0 0 0 0 0 1 0 0 0 0
1 1 0 1 0 0 1 0 0 0 0 0
1 1 1 0 0 1 0 0 0 0 0 0
1 1 1 1 1 0 0 0 0 0 0 0
OUTPUT:

[0] [1]

[2] [3]
[4] [5]

[6] [7]
 Experiment – 5

OBJECT: Implementing 4x1 and 8x1 MULTIPLEXERS

SOFTWARE USED: Logisim
MULTIPLEXER: In electronics, a multiplexer, also known as a data selector, is a device that
selects between several analog or digital input signals and forwards it to a single output line. A
multiplexer of inputs has select lines, which are used to select which input line to send to the output.

(4*1 Multiplexer)

Truth Table:
E S0
0 *
1 0
1 0
1 1
1 1
S1 Y
* 0
0 I0
1 I1
0 I2
1 I3

Output:

[0] [I0]

[I1] [I2]
[I3]
 (8*1 Multiplexer)

Truth Table:
E S0 S1 S2 Y
1 0 0 0 I0
1 0 0 1 I1
1 0 1 0 I2
1 0 1 1 I3
1 1 0 0 I4
1 1 0 1 I5
1 1 1 0 I6
1 1 1 1 I7

Output:

[I0] [I1]
[I2] [I3]

[I4] [I5]

[I6] [I7]
 Experiment – 6

OBJECT: Verify the excitation tables of various FLIP-FLOPS.

SOFTWARE USED: Logisim

FLIP-FLOP: A flip flop is an electronic circuit with two stable states that can be used to store
binary data. The stored data can be changed by applying varying inputs. Flip-flops and latches are
fundamental building blocks of digital electronics systems used in computers, communications,
and many other types of systems.
(A) SR Flip-Flop: The SR flip-flop, also known as a SR Latch, can be considered as one of the
most basic sequential logic circuit possible. This simple flip-flop is basically a one-bit
memory bistable device that has two inputs, one which will “SET” the device (meaning the
output = “1”), and is labelled S and one which will “RESET” the device (meaning the output
= “0”), labelled R.

Truth Table:
S R Q Q-
-
0 0 Q Previous Q Previous Value
0 1 0 1
1 0 1 0
1 1 (Not Possible)

Output:
(B) JK Flip-Flop: The J-K flip-flop is the most versatile of the basic flip-flops. It has the
input- following character of the clocked D flip-flop but has two inputs,traditionally labeled J
and K. If J and K are different then the output Q takes the value of J at the next clock edge.

Truth Table:
J K Qn Q-
0 0 0 0
0 1 0 1
1 0 1 0
1 1 0 1

Output:
(C) T Flip-Flop: T flip – flop is an edge triggered device i.e. the low to high or high to low
transitions on a clock signal of narrow triggers that is provided as input will cause the change in
output state of flip – flop.

Truth Table:
CLK T Qn Qn+1 Qn+1-
0 x x Qn Qn-
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 0 1

Output:
(D) D Flip-Flop: The D-type flip-flop is a modified Set-Reset flip-flop with the addition of an
inverter to prevent the S and R inputs from being at the same logic level. One of the main
disadvantages of the basic SR NAND Gate Bistable circuit is that the indeterminate input
condition of SET = “0” and RESET = “0” is forbidden.

Truth Table:
CLK D Qn+1 Qn+1- STATE
0 0 Qn Qn- NC
0 1 Qn Qn- NC
1 0 0 1 Reset
1 1 1 0 Set

Output:
 EXPERIMENT 8

OBJECT: Design of an 8-bit ARITHMETIC LOGIC UNIT.

SOFTWARE USED: Logisim

THEORY: ALU: An arithmetic-logic unit (ALU) is the part of a computer processor (CPU) that
carries out arithmetic and logic operations on the operands in computer instruction words. In some
processors, the ALU is divided into two units, an arithmetic unit (AU) and a logic unit
(LU). ALU comprises the combinational logic that implements logic operations such as AND and
OR, and arithmetic operations such as Addition, Subtraction, and Multiplication.
8-bit ALU: 8 Bit ALU design is a combinational circuit which adds two binary numbers of 8 bit
length.

ALU COMMANDS:

COMMANDS OPERATIONS
000 AND
001 OR
010 XOR
011 NOR
100 ADD/SUB
101 LESS / EQ(WITH SUB SET)
110 OR
111 MULTIPLIER
OUTPUT:

1) 000

2) 001

3) 010
4) 011

5) 100

6) 101
7) 110

8) 111