Laboratory Exercises in Logic Circuits and Design Lab Exercise No.

LCaD-07

Name: RIVERA, RICARDO EDRELL D. Date Completed:

________________
Instructor: MARK JONIEL M. LOPEZ Instructor’s Signature:

LABORATORY EXERCISE NO. LCaD-07

XOR GATE
Exercise Overview

This exercise will introduce you to the basics of Logic gates XOR

EXERCISE LEARNING OBJECTIVES

At the end of this exercise, the students are expected to

• To study the basic logic gates: XOR

• To study the representation of these functions by truth tables, logic diagrams and
Boolean algebra.
• To observe the pulse response of logic gates

EXERCISE CONTENTS

I. MATERIALS REQUIRED:

1 Power Supply (w/ 5v DC source)

LED / Logic Probe
Connecting Wires
Breadboard
1 74LS86 XOR Gate

II. PRINCIPLES:

XOR - A multi-input circuit in which the output is 1 if either input is HIGH. The
symbolic representation of the XOR gate is shown in Fig. 1a.

Fig 1a.

III. PROCEDURES:
1. For the XOR gate look on the data sheets, connect the circuit on Breadboard
and test the gate.
2. Using logic switches SW1 and SW2, apply the logic levels 0 and 1 to gate
inputs
3. Create a truth table and record the results
4. Also simulate the given gate using the Circuit Wizard simulation software
5. Obtain the corresponding circuit diagram using the simulation software of the
Boolean expression F((A, B,C)=( A’B +AB’) + (B’C +BC’)

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Laboratory Exercises in Logic Circuits and Design Lab Exercise No. LCaD-07

6. From the obtain circuit diagram develop the corresponding truth table
7. From the figure below obtain the equivalent Boolean expression and develop
its corresponding truth Table

NOTE: Never supply the circuit with more than 5v DC source.

LED ON = Logic 1, (High)
LED OFF = Logic 0 (Low)
A B OUTPUT Y
0 0 0
0 1 1
1 0 1
1 1 1

IV. DATA AND RESULTS: (place your answer here from 1-7) include actual photos during
bread board assembly

Using circuit wizard, simulation of XOR gate.

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Laboratory Exercises in Logic Circuits and Design Lab Exercise No. LCaD-07

The corresponding circuit diagram using the simulation software of the Boolean expression
F((A, B,C)=( A’B +AB’) + (B’C +BC’)

The figure below shows the circuit diagram of the Boolean expression F(A, B,C)=( A’B
+AB’) + (B’C +BC’)

Truth table of F(A, B,C)=( A’B +AB’) + (B’C +BC’)

A B C F= ( A’B
+AB’) + (B’C +BC’)

0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
0 0
1 1
0 1
1 1
0 1
1 1
0 1
1 0

The figure below obtains the equivalent Boolean expression and develops its
corresponding truth Table

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Laboratory Exercises in Logic Circuits and Design Lab Exercise No. LCaD-07

The table above shows the truth table of the Boolean expression F= ((A’B +AB’)’+
(C’D+CD’))+ ((A’B +AB’)+(C’D+CD’)’)

A B C D F= ((A’B +AB’)’+
(C’D+CD’))+ ((A’B
+AB’)+(C’D+CD’)’)
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1
F= ((A’B +AB’)’+(C’D+CD’))+ ((A’B +AB’)+(C’D+CD’)’)

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Laboratory Exercises in Logic Circuits and Design Lab Exercise No. LCaD-07

V. OBSERVATIONS: The XOR gate is a digital logic gate that implements an

exclusive or; that is, a true output results if one, and only one, of the inputs to
the gate is true. If both inputs are false or both are true, a false output result.
VI. CONCLUSION: XOR represents the inequality function, i.e., the output is HIGH if
the inputs are not alike otherwise the output is LOW. XOR can also be viewed as
addition modulo 2. As a result, XOR gates are used to implement binary addition
in computers. A half adder consists of an XOR gate and an AND gate.

VII. CHECKING:

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