Digital Logic and Design

Lecture No 20 : Don’t Care Conditions, NAND, NOR

Implementation
BEE-12B, Fall 2021
Dated 04 Nov 2021

By Nasir Mahmood
nasir.mahmood@seecs.edu.pk
nasirm15@gmail.com

 Don’t Care Conditions

● So far, we have always assumed that all combinations of
the input values are necessary in our expressions.

● Sometimes there are unspecified combinations within a

function.
● For example, four bit binary has six combinations that are not
used.

● Functions that have unspecified outputs for some input

combinations are called incompletely specified functions.
● These are called don’t care conditions because in most
applications, we do not care what the specification of the
combination is.

2
 Indicating Don’t Care Conditions
● A don’t care condition cannot be specified with a 1 because it would
require the function to always be 1 for the combination.

● Likewise, a don’t care condition cannot be specified with a 0

because it would require the function to always be 0 for the
combination.

● To specify don’t care conditions in a map, we use the letter ‘X’.

● When we choose adjacent squares to simplify the map, the don’t care
minterms can be assumed to be 0 or 1, whichever leads to the simplest
expression.

3
 Simplify With Don’t Care Conditions
● Simplify the Boolean function: F (w,x,y,z) = Σ(1,3,5,9,13)
● It has don’t-care conditions: d(w,x,y,z) = Σ(0,2,7)

F1 = w’x’+y’z = Σ(0, 1, 2, 3, 5, 9, 13)

F2 = w’z+y’z = Σ(1, 3, 5, 7, 9, 13)
4
 Example 3-9

● Simplify the Boolean function: F (w,x,y,z) = Σ(1,3,7,11,15)

● It has don’t-care conditions: d(w,x,y,z) = Σ(0,2,5)

5
 More Examples with Don’t Care

CD
00 01 11 10
AB
00 0 1 0 0
01 x x x 1 F=AʹCʹD+B+AC
11 1 1 1 x
10 x 0 1 1
CD
00 01 11 10
AB
00 0 1 0 0
01 x x x 1 F=AʹBʹCʹD+ABCʹ+BC+AC
11 1 1 1 x
10 x 0 1 1
6
 NAND and NOR Implementations

Digital circuits are frequently constructed with NAND and

NOR implementations:
∗ they are easier to make
∗ they are used in all IC digital logic families
Because of their use, rules have been developed that allow
us to convert Boolean functions using AND, OR and NOT
into the equivalent NAND and NOR logic diagrams.

 NAND Circuits
The NAND gate is a universal gate that can be used to
construct any gate, therefore being able to replace all AND
and OR gates.

8
 NAND Notation

A convenient method for creating a NAND circuit is to obtain

the simplified Boolean function in terms of Boolean operators
and then convert the function to NAND logic.
To facilitate the conversion to NAND logic we define
equivalent alternative symbols as shown below for NAND
gate

 Two-Level Implementation
The implementation of Boolean functions with NAND gates
requires that the function be in sum of products form.
∗ F = AB + CD
All three diagrams are equivalent

10

 Two-Level Implementation
F = AB+CD+E
F = ((AB)' (CD)' E')' =AB+CD+E

11

 Example 3-10
Implement F(x,y,z)= Σ(1,2,3,4,5,7) with NAND gates

12
 2-Level NAND Rules

Given a Boolean function, follow these rules to obtain the

NAND logic diagram:
∗ Simplify the function and express it in sum of products
∗ Draw a NAND gate for each product term of the expression that has at least
two literals. This is group of first level gates
∗ Draw a single gate using the AND-invert or the invert-OR graphic symbol in
the second level, with inputs coming from outputs of first level gates
∗ A term with a single literal requires an inverter in the first level, unless the
single literal is already complemented

13

 Multilevel NAND Circuits

The general procedure for converting a multi-level AND-OR

diagram into an all-NAND diagram is as follows:
∗ Convert all AND gates to NAND gates with AND-invert graphic symbols
∗ Convert all OR gates to NAND gates with invert-OR graphic symbols
∗ Check all the bubbles in the diagram
∗ Every bubble that is not compensated by another along the same line will
require the insertion of an inverter or complement the input literal

14

Multilevel NAND Example

15
Multilevel NAND Example

16
 NOR Circuits
∗ The NOR operation is a dual of the NAND operation and
therefore all procedures and rules for NOR logic are the
dual of the corresponding procedures and rules for the
NAND logic.
 NOR Notation

∗ A convenient method for creating a NOR circuit is to obtain

the simplified Boolean function in terms of Boolean
operators and then convert the function to NOR logic.
 Two-Level Implementation
∗ The implementation of Boolean functions with NOR gates
requires that the function be in product of sums form.
∗ F = (A + B)(C + D)E

NOR Implementation : Your Turn

∗ Implement F= (AB’ + A’B ) (C + D’) with NOR gates

End of Lecture

21