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Bart Geerligs, Maciej Stodolny, Yu Wu, Gaby Janssen & Ingrid Romijn, ECN Solar Energy, Petten, &
Cell
Martijn Lenes & Jan-Marc Luchies, Tempress Systems BV, Vaassen, The Netherlands
Processing
ABSTRACT Thin
Film
Contact recombination has long been identified as one of the key challenges for achieving high efficiency
of crystalline silicon (c-Si) solar cells. As well as having the ability to extract majority carriers effectively, a
contact to a solar cell should ideally be passivating. The combination of a thin oxide and doped polysilicon PV
to obtain low recombination junctions was demonstrated in the 1980s to be a viable candidate for creating Modules
passivating contacts to c-Si solar cells. In recent years variations and innovations of this technology have seen
intense development and rapid progress towards demonstrating very high (25%) cell efficiencies. This paper Market
presents the progress made by ECN and Tempress in developing and integrating the processing of polysilicon Watch
passivating contacts aimed at use in low-cost industrial cell production. The polysilicon is deposited by low-
pressure chemical vapour deposition (LPCVD), and the results are presented for in situ as well as ex situ
doping processes. Synergy and compatibility with industrial cell processing is demonstrated – for example,
the application of hydrogenation from silicon nitride coating layers, and metallization by screen-printed fire-
through paste. This demonstrates the potential application of polysilicon passivating contacts to a variety of
cell designs in production in the near future. The way in which the passivating and contact properties depend
on the layer parameters and subsequent cell processes is analysed and explained. Results are presented for
6" screen-printed bifacial n-type cells with a diffused boron emitter and an n-type polysilicon (n-poly) back
contact, with an efficiency of 20.7%, as an industrially relevant application of the polysilicon technology. Ways
to improve cell efficiency to > 22% are indicated.
Introduction to passivating superseded by ‘passivating contacts’). low or high work function in order
contacts Reviews of the need for and potential to properly align the conduction
Good contacts to solar cells should b e n e f i t o f p a s s i v at i n g co nt a c t s , o r v a l e n c e b a n d r e s p e c t i v e l y,
extract one type of charge carrier along with several approaches for ha s b e en explore d [3–6] (if the
and have low series resistance, while creating them, were given by Green passivating interface is omitted, J 0
avoiding recombination of the other in 1995 [1] and Swanson in 2005 usually increases noticeably). To
type of charge carrier. In industrially [2]. Swanson noted that the most create electrodes with suitable band
produced silicon solar cells, contacts ambitious target level could be given alignment to the silicon, heavily
are mostly created by heavily doping by the radiative limit of the silicon doped silicon can be employed. An
the surfaces of the silicon wafer; this bulk – recombination current density advantage of this approach is the
allows go o d S chottk y contact to J 0 = 0.27fA/cm 2. A (non-exhaustive) existence of fe a sible and w idely
a metal electrode for the majority list of the most frequently reported known techniques for creating a low-
carriers , while at the same time approaches is given in Table 1 (see recombination interface between the
reducing the minority-carrier density reviews in, e.g ., Young et al. [3], silicon wafer and a deposited doped
and therefore the minority-carrier Melskens et al. [4], Cuevas et al. [5]; silicon layer. Sanyo (later Panasonic)
recombination at the interface of the also several materials are evaluated in pioneered the development, as
silicon with the metal electrode. Feldmann et al. [6]). well as the application with ver y
For crystalline silicon solar cells, a high performance, of amorphous
passivating but conductive interface, silicon heterojunctions [7], where
“Good contacts to solar combined with an electrode with a the passivating interface is a ver y
cells should extract one type
of charge carrier and have Passivating interface Contact material Reference
low series resistance, while Intrinsic a-Si:H Doped a-Si:H [7]
the other type of charge Intrinsic a-Si:H Set WF (e.g. TCO) [9]
carrier. ” SiOx
SiOx
Set WF (e.g. TCO)
Alter native s to the s e dif f u s e d † See the various references given in the present paper.
junctions that are directly contacted
Table 1. The main published approaches for creating passivating contacts.
by metal have been described and
In addition to SiOx, other thin dielectric interfaces, such as Al2O3, are being
investigated for many years . One
explored. (‘Set WF’ denotes materials with a well-defined suitable work
such option is passivating contacts
function in order to align to the conduction or valence band in the silicon;
(the original terminology ‘passivated
TCO = transparent conductive oxide.)
contacts’ seems to have now become
(a) (b)
Figure 1. (a) Schematic of the structure of a polysilicon passivating contact. A stack of a thin dielectric (hashed) and doped
polysilicon is grown on a silicon wafer. The polysilicon may be coated with metal (for contacting) or a dielectric (for anti-
reflection coating, or hydrogenation). The interface recombination velocity Si is low; the surface recombination velocity Ss
does not affect the contact passivating properties and may be high. On the right is an SEM image of one of ECN/Tempress’s
polysilicon stacks on a textured wafer. (b) Modelled J0 from PC1D as a function of the phosphorus-dopant concentration
in the polysilicon. In the model the effect of the very small transmission of minority carriers into the polysilicon has been
replaced by a very low Ss, to render negligible any recombination in or on the polysilicon.
46 w w w.p v - te ch . o rg
to a high-temperature treatment above diffused metal contacted regions can steps and chemical treatments. For
1000°C, which probably decreased have a J0 that is ~100 times higher, but mass production, batches of up to a
the resistance (created pinholes in the also a very low ρco, which allows their few hundred wafers can be processed,
oxide). area to be reduced by a similar factor. with excellent process uniformity [28].
In ECN/Tempress's results, even However, for metal point contacts, The thin oxide was produced by
when a thin oxide (nominally 13Å a negative side effect is spreading thermal oxidation (Th.Ox.) or wet-
thick) is use d and 900°C is not resistance, which reduces the FF (see, chemical oxidation (NAOS: nitric
Cell exceeded in the process, the contact e.g., Glunz et al. [25]). Aspects of the acid oxidation of silicon). A reliable
Processing resistances in the cells, measured trade-off between area fraction, J0 and ab s olute thick ne ss me a surement
by TLM, appear to be inconsistent ρ co have been illustrated in detail by is not straightfor ward; in this
with a tunnelling model for carrier other authors [26,27]. work the thickness was estimated
t r a n s p o r t . Fo r s i m u l t a n e o u s l y by spectroscopic ellipsometr y on
processed p-type polysilicon (p-poly) mirror-polished wafers , with the
contacts and overcompensated
n-type polysilicon (n-poly) contacts,
“The excellent low J values 0 resulting typical values of 13 to 15Å
corresponding to good performance.
of polysilicon passivating
w ith identical oxide, p olysilicon A high repeatability and tuning of this
d e p o sit io n a n d th er m a l bu d g e t , contacts are hard to beat thickness at the 1Å level is possible.
E C N/ Te mp re s s fo u n d a s p e c i f i c A slightly greater thickness can result
contact resistance ρco of polysilicon to
by traditional dielectric- in a noticeably reduced FF, whereas a
wafer of about 30mΩ·cm 2 for n-type
and 5mΩ·cm 2 for p-type polysilicon
passivated diffusions. ” slightly smaller thickness can lead to
increased dopant diffusion into the
[22], with J 0 below 10fA/cm 2 and wafer. Of course, this depends on the
~50fA/cm 2 respectively (the p-type To summarize, the attractiveness of precise doping processes and thermal
J 0 value is quite high, presumably polysilicon passivating contacts derives budgets, as well as on other process
as a result of the low boron doping from being able to: parameters [18,20]. Excellent contact
concentration of 3×10 19 cm -3 , and • achieve an excellent J0; resistance and passivation have been
because of a textured surface). If • avoid Auger recombination from obtained with these thin oxides.
tunnelling were dominant, a higher heavily diffused areas in the wafer; The main focus was on n-type
ρ co would be obser ved for p-type • avoid process complexity and the polysilicon, where the LPCVD layer is
polysilicon than for n- type [23]. spreading-resistance effect related to intrinsic, and subsequently doped by
Recently, Yan et al. [24] also reported a metal point contacts. POCl 3 diffusion [28,29] (Fig. 2): this
low ρco for p-type polysilicon. results in fast deposition, a tuneable
The excellent low J 0 v alues of doping level, low diffusion into the
Industrial LPCVD of
polysilicon passivating contacts are wafer, and excellent J 0. In situ p-type
hard to beat by traditional dielectric-
polysilicon passivating doped polysilicon for cell processing
passivated diffusions. But conventional contacts has also been investigated [28,30].
high-performance contacts based This section will focus on ECN/ Alternatively, in situ doping during
on local diffusion with metal point Te m p r e s s ’s s t u d i e s o f n - t y p e LPCVD to create n-type polysilicon,
contacts can also yield low contact p o l y s i l i co n p a s s i v ate d co nt a c t s . and BBr3 doping of intrinsic polysilicon
recombination at the cell level, through Polysilicon layers grown in a high- to create p- ty p e p olysilicon, are
reducing the contact area. The ratios th ro u g hp u t L P C V D f u r n a ce a re in principle also possible [18,31].
of specific contact resistance ρ co and employed. An LPCVD process has the However, in situ phosphorus doping
J0 of the metal and the polysilicon are advantage of creating very conformal during LPCVD has been reported to
not more favourable for polysilicon: and pinhole-free layers; this ensures reduce deposition speed [32], and BBr3
polysilicon combines a J0 of a few fA/ that the underlying interfacial oxide is doping of an oxide/polysilicon stack
cm 2 with a ρ co of ~10mΩ·cm 2, while protected against subsequent doping can cause damage to the thin oxide and
Figure 2. Examples of deposition and doping methods used in creating an n-type or p-type polysilicon passivating contact.
(The approaches reported in this paper are underlined.)
48 w w w.p v - te ch . o rg
thereby result in too much diffusion profiling (ECV), in polysilicon layers a particular hydrogenation step. A
into the wafer [28]. with thicknesses of 70 and 200nm. rough correlation between the initial
The application to industrial cell The intrinsic polysilicon layers were J 0 values and the doping levels and
processing is an important aspect, so doped by POCl 3 diffusion at three leakage can be observed. The higher
with this in mind the following were different temperatures. It is noticeable initial J 0 of the 200nm-thick layers
used: that the thin oxide can be an excellent with high Rsheet is probably due, at least
• Hydrogenation from SiNx:H coating diffusion barrier. However, a high partly, to the lower doping level, which
layers deposited by PECVD. diffusion temperature together with increases sensitivity to the defects at Cell
the use of NAOS oxide resulted in the interface. For the 70nm layers with Processing
• C o nt a c t i n g o f th e p o l y s i l i co n significant diffusion into the wafer. The Th.Ox., the doping level and J0 are in
by fire- through scre en- printe d corresponding R sheet values are also the same range as that for the most
m e t a l l i z at i o n , w i t h o u t a d d i n g indicated on the graphs. In the results heavily doped 200nm layer. In the case
significant contact recombination. obtained here, the mobility is at best of the 70nm polysilicon/NAOS stacks,
around one-half to one-third of that in the initial J 0 is probably dominated
In other reported studies monocrystalline silicon, and it can be by the effects of phosphorus leakage
hydrogenation is often carried out enhanced somewhat by hydrogenation. throug h the oxide. Af ter P O C l 3
by an extra processing step, such as a The polysilicon layers in Fig . 3 diffusion at the highest temperature
forming-gas anneal, but hydrogenation showed a strong correlation between (72Ω/sq.), the high J 0 , probably due
from SiN x:H eliminates the need for the sheet resistance and the diffusion to Auger recombination or increased
this. The second point, contacting temp erature. This indicates that interface defect density, renders the J0
by screen-printed metallization, has the mobility heavily dep ends on unsuitable for practical applications.
the potential benefit for industrial the diffusion temperatures, which Improved J 0 values were observed
application of the passivating contact i s p erhap s rel ate d to continue d af ter PEC VD SiN x :H dep osition,
as basically a drop-in replacement for a cr ystallization of the polysilicon in particular for the 200nm n-type
diffused back-surface field (BSF). With during the diffusion. After exposure polysilicon layers with a low doping
a screen-printed metallization grid, an to the lowest diffusion temperatures, level. The benefit of SiNx:H deposition
additional advantage is that a bifacial the apparent mobility is much lower is attributed to the hydrogenation of
cell is possible. In view of the use of (approximately one-tenth) than that for the SiOx/wafer interface. The firing of
fire-through metallization, relatively monocrystalline silicon. the SiN x:H layer did not significantly
thick layers of polysilicon have so far Fig. 3 also presents the evolution change J0. Likewise, the removal of the
been investigated. of the re combination p arame ter SiNx layer by wet-chemical etching did
J 0 through subsequent processing not change J 0, as expected, since this
n-type polysilicon steps of PECVD SiN x :H deposition, etching step should not change the
Fig . 3 show s ac tive pho sphor u s f i r i n g a n d S i N x: H r e m o v a l . A n hydrogen passivation of defects at the
concentration profiles, measured by average J 0 per side of less than 10fA/ S i O x/ w a f e r i n t e r f a c e , w h i c h i s
electrochemical capacitance–voltage cm 2 was already achieved without prote cte d by the polysilicon top
Figure 3. Phosphorus-doping profiles (top row) of several n-type polysilicon/SiOx/Cz-Si stacks, with the corresponding
Rsheet values, on polished Czochralski (Cz) wafers. Three different POCl3 diffusion temperatures (the same for all stacks)
were used for doping, with high to low temperatures corresponding to low to high Rsheet values. Evolution of the surface
passivation quality (bottom row), through a sequence of process steps. All J0 values are per side, and are the average of up
to 15 points on three wafers, where the error bars depict standard deviations. J0 was derived from lifetime measurements
using the Sinton WCT-120 tool.
Figure 4. Evolution of J0 through the process steps relevant to cell production, for textured wafers with 200nm n-type polysilicon,
over several test runs. The highest diffusion temperature in Fig. 3 was used for Th.Ox., and the middle temperature for NAOS.
Figure 5. Development of average Jo with SiNx deposition and firing over several test runs, and ECV doping profile of in situ
doped p-type polysilicon/SiOx passivating contacts.
50 w w w.p v - te ch . o rg
Application to industrial
the literature for n-type polysilicon bifacial n-type cells polysilicon layer can be used at the rear
p a ssiv ate d cont ac t s on p oli she d of a cell as the emitter or base contact.
surfaces [36]. For textured Cz wafers, Various c-Si cell design variations Here the results for an n-type cell with
the recombination currents of making use of polysilicon passivating a front diffused boron emitter and an
~4.2fA/cm2 (Table 2) achieved in this co nt a c t s a re co n ce i v ab l e , u s i n g n-type polysilicon back contact (Fig. 6)
study for n-poly are, to the authors’ the polysilicon for one or both of will be elaborated on. This kind of cell
knowledge, the lowest reported to date. the contact polarities. A uniform with an n-type polysilicon back contact Cell
has been widely investigated in recent Processing
years, but what differentiates ECN/
Tempress’s development is the use of a
iVoc J0 Lifetime
bifacial metallization with fire-through
[mV] [fA/cm2] [ms @∆n=1015cm-3] paste, and the full 6" cell size combined
Wafer surface = polished with an LPCVD process.
n-type, after doping ~731 ~3.4 ~5.0 Table 3 lists the status of n-type
n-type, after SiNx ~743 ~2.2 ~6.6
cells with a front boron emitter and
a polysilicon back contact that have
n-type, after SiNx and firing ~734 ~5.2 ~9.4
been reported in the literature. The
p-type, after SiNx and firing ~715 ~12 ~1.6
designation PERPoly (passivated emitter
Wafer surface = textured and rear polysilicon) is proposed for
n-type, after SiNx and firing ~732 ~4.2 ~6.2 the cell design with a polysilicon back
p-type, after SiNx and firing ~682 ~55 ~0.7 contact, in line with the PERT, PERC
and PERL acronyms.
Table 2. Best passivation characteristics of polysilicon passivating contacts ECN/Tempress’s n-type cell process
on PV-grade Cz wafers obtained in this study. (‘Lifetime’ = effective on industry-standard 6" Cz wafers has
minority-carrier recombination lifetime; iVoc = implied Voc determined been developed using only the tools
using a Sinton WCT-120; phosphorus-doping level = ~3×1020cm-3; boron currently available to the industry. A
doping level = ~4×1019cm-3.) diffused boron emitter is used, in order
to remain close to ECN/Tempress’s
industrial n-PERT process. A diffused
boron emitter can yield very high
performance (low J0), and is therefore
a good match for a high-performance
back passivating contact.
The PERPoly cell process is expected
to be feasible using a comparable
numb er of pro cess to ols to that
required for PERC cells, although at
the moment some more-elaborate
chemistry is still used. A BBr3-diffused
i n d u s t r i a l - t y p e u n i fo r m e m i tte r
with a sheet resistance of 70Ω/sq.
was employed on the front side. The
emitter was passivated with Al 2 O 3
deposited by atomic layer deposition
(ALD), and coate d w ith PEC V D
SiN x :H; the rear-side p olysilicon
was also coated with SiN x :H. Fig. 7
shows that iV oc before metallization
is approximately 700mV and fairly
uniform over the wafer. In recent tests
Figure 6. Schematic of the bifacial n-type solar cell design discussed in this using a higher emitter sheet resistance,
paper – PERPoly (passivated emitter and rear polysilicon). The cell features an the iV oc was increased to slightly
n-type polysilicon/SiOx back contact. more than 700mV, and the total J0 was
reduced to less than 45fA/cm2.
Poly deposition Poly doping Back contact Emitter Front contact Size [cm2] η [%] Ref.
PECVD In situ Ag PVD BBr3, SE Litho/PVD/plate 4 25.1 [25]
PECVD <20nm In situ Ag PVD Implant Screen print 239 21.2 [37]
LPCVD 40nm In situ Ag PVD Implant Screen print 132 20.9 [38]
LPCVD 200nm POCl3 Screen print BBr3 Screen print 239 20.7 [29]
Table 3. Status of front- and back-contact cells with polysilicon passivating contacts.
(a) (b)
Figure 7. (a) Photoluminescence image of the solar cell half-fabricate (half-fab), with iVoc and J0 obtained at five locations.
(b) Structure of the half-fab. Rsheet of the 200nm-thick n-poly is approximately 70Ω.
Best cell 7.7 56.2 6.68 699 675 38.8 79.1 82.8 20.72
Table 4. Results for the PERPoly cells of ECN/Tempress (this study). Both cell sides were textured. Polysilicon
thickness was 200nm. The best cell results are shown, as well as the best J0, iVoc and bulk lifetime obtained on half-
fabs. J0 F+B is the J0 of the front and back sides together. The rear metallization coverage is approximately 10%.
Table 5. Estimated distribution of the recombination losses (in fA/cm2) of the cells listed in Table 4.
52 w w w.p v - te ch . o rg
(a) (b)
Cell
Processing
Figure 8. (a) EQE of a PERPoly cell compared with an n-PERT cell, showing in particular the difference due to FCA in the
range from 1000 to 1200nm. (b) The absorption of AM1.5 spectrum in thin crystalline silicon as an approximation of the
loss in a polysilicon layer when used at the light-incident side of a solar cell.
54 w w w.p v - te ch . o rg
record efficiency HIT solar cell on
thin silicon wafer”, Proc. 39th IEEE
PVSC, Tampa, Florida, USA, pp.
96–99.
[8] Heng , J.B. et al. 2015, “>23%
high ef f icienc y tunnel oxide
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electroplated Cu gridlines”, IEEE Cell
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[9] Battaglia, C. et al. 2014, “Silicon
heterojunction solar cell with
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[10] C o u s i n s , P. J . e t a l . 2 0 1 0 ,
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[12] Yablonovitch, E., Swanson, R.M. &
Kwark, Y.H. 1984, Proc. 17th IEEE
are bifacial with a bifaciality factor Acknowledgements PVSC, Kissimmee, Florida, USA,
of greater than 0.8. To the authors’ Part of this work was performed within pp.1146–1148.
knowledge, these are the first 6" cells the framework of the PV4facades [13] Gan, J.Y. & Swanson, R.M. 1990,
employing LPCVD for the polysilicon, (TEMW140009) and NexPas Proc. 21st IEEE PVSC, Kissimmee,
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a polysilicon passivating contact funding from the Topsector Energie [14] Borden, P. et al. 2008, “Polysilicon
with fire- through scre en- printe d of the Dutch Ministry of Economic tunnel junctions as alternates to
metallization. Affairs. The authors thank T. Burgers diffused junctions”, Proc. 23rd
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“A highest efficiency of and A . Cue vas of the Australian
N at i o n a l Un i v e r s i t y f o r h el p f u l
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20.7% was achieved for the
discussions. high-efficiency n-type S i solar
PERPoly cell, along with an cells providing high interface
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