A High Linearity 6th-Order Active R-MOSFET-C

Band-Pass Filter for Power-line Communication

＊
Di Zhu , Jiacheng Wang, Chaoli Zhong, Jie Tian, Yiming Tang, Peiyuan Wan, Ping Lin
Beijing Embedded System Key Lab , Beijing University of Technology, Beijing, 100124,China
＊
Email: alexandra_zhudi@emails.bjut.edu.cn

Abstract – A linearity improvement technique is proposed

on the design of low frequency (132 KHz center frequency, 40 II. OVERVIEW OF THE WHOLE FILTER
KHz band frequency) power-line communication band-pass The basic structure of the band-pass filter is showing as
filter, which focus on the linearity of large R-MOSFET. In the Fig. 1. In the figure, Ri is 1/ω0i , C1i equals K1i/ω0i , C3i
order to enhance the linearity of the triode-mode MOSFET
equals 1/Qi . It contains three stages; every stage is a High-Q
variable resistors, driving the controlling voltages of the R-
MOSFET in a resistor tuning schematic instead of the main Opamp-R-C second-order band-pass filter. By cascading,
signal schematic is chosen. Further more, appropriate control three stages form a 6th-order Chebvshev I filter.
bits are added to adjust the center frequency of the band-pass
filter. Fabricated in SMIC0.18μm CMOS technology, this 6th-
order Chebvshev I filter achieves 5K Hz band frequency
deviation and 43dB in-band IIP3, and dissipates 4.86mW from a
1.8-V supply; the on-chip continuous automatic tuning block
(MASTER) dissipates 2.05mW at the supply of 3.3V.

Index Terms –Continuous-time filter, high linearity, master-
slave tuning, R-MOSFET-C
I. INTRODUCTION
The filter in this design is applied in a receiver for power
line communication which center frequency is 132K Hz.
Large resistors and capacitors are used to realize the rather
large time constant in conventional design. However, in low
frequency application, large R and C caused by the large time
constant means it is hard to realize on-chip_ [1, 2]. In order
to implement on-chip design, the combination of large R and
small C is usually adopted. Using the switch capacitor (SC)
method, large R can be achieved by adjusting capacitor ratios.
Meanwhile, it comes with two disadvantages_ [3]. Firstly,
switch capacitor causes large noise in the signal path
degrading the linearity. Secondly, owing that the clock
frequency should be strictly according to the clock of system,
additional input anti-aliasing and output smoothing filters are
required.
This work combines the advantages of SC and
continuous time (CT) filters, and the exact R-MOSFET SC
tuning schematic is employed in a MASTER block to avoid
the drawbacks of SC filters. In the main signal path, the
SLAVE-R CT filter is used_ [4]. Further, to satisfy the
requirement of system, some control bits are added to
modulate the center frequency of the filter.
The overview of the whole filter is discussed in chapter II,
and the design of accurate R-MOSFET is described in chapter
III, further detailed design of filter’s single stages and the
testing result is shown in chapter IV and V, chapter VI makes
the conclusion.
Fig. 1 The whole structure of 6th-order Chebvshev I filter_ [1].
The whole transfer function is as followings:
K11s K12 s K13s (1)
H (s)  
2 01 2 2 02 2 2 03 2
s  ( )s  01 s  ( )s  02 s  ( )s  03
Q1 Q2 Q3
The values of the above parameters are basically calculated
by the soft Filter Solution and done some necessary
normalization. To reduce the complication of the circuits, all
of the resistors in the Fig. 1 are the same value. In this way,
the whole filter only needs one MASTER.
The value of R-MOSFEF is intensely relies on the
variation of PVT. So how to make the value of R-MOSFET
be irrelative of PVT is the most critical challenging.
III. THE DESIGN OF ACCURATE R-MOSFET
A. The analyze of the equivalent R-MOSFET
The MOSFET works in the triode region can be treated as
a resistor, utilizing the linear model behavior. [3,7]
Fig. 2 Two methods to realize R-MOSFET. (a)Conventional balanced variable
resistor, (b) Improved MOSFET-R balanced variable resistor.
In the Fig.2 (a),

978-1-4244-7456-1/10/$26.00 ©2010 IEEE 843

  1 1 L
R eq  G  G  KV RM  (4)
1,2 3,4 C nCoxW VGS  VTH 

 The Rtotal is composed by R and RM. When Rtotal is larger
Gi  K VGSi  Vthi  (2)
 than Req, the integrator manifests positive feature ,Vout
 K   COX W increases , VGS of M increases, RM decreases , so the Rtotal
 L decreases ; similarly , when the Rtotal is less than Req, the
integrator displays negative feature ,the Vout decreases ,VGS
The parameter Gi represents the transconductance of the of M decreases, RM increases. At the end, the whole loop
MOSFET Mi working in triode region. From (2), the become stable, Rtotal equals Req .The low-pass filter (R1pf and
equivalent resistor is the linear function of the control C1pf) can diminish the DC component of Vout, so the linearity
voltage Vc. of RM increases. Further, the values of R1pf and C1pf are chosen
To improving the linearity of the variable resistor, the relatively large, a more stable controlling is achieved by the
improved structure is proposed as the Fig.2 (b) shows. The existing of this dominant pole.
resistor R occupies some voltage of Vds of the MOSFET. So
the Vds of Mi shrinks, keeping the MOSFETs in deep triode C. Frequency tuning circuit
region, the R-MOSFET’s linearity increases. The MASTER in the filter is used to acquire accurate R-
The equivalent value of R-MOSFET is: MOSFET_ [3]. The frequency tuning circuit MASTER is as
followings:
F F
Req   (3)
G1,2  G3,4 KVc
The parameter F is defined as Vi / V , which equals

1  2GR , the average transconductance is the half of

G1,2  G3,4 .From (3), the Req is enhanced by a factor G . In
this structure, when F increases, the voltage of Vds degrades,
the linearity of R-MOSFET enhances. The MOSFETs in this
structure conduct as current steering devices, operating in the
triode region, rather than as “resistors”.
It is shown in [2] that the noise also improves with the
increasing voltage scale factor F .A linearity versus noise
trade-off needs well consideration in the design when
choosing an optimum value for F.
B. The switch-capacitor part
The switch-capacitor schematic is used to realize the
reference accurate resistor. It‘s schematic is as the following:
Fig. 3 The switch-capacitor resistor part.
In Fig.3, the two non-overlap clock control the switches,
the cap is charged and uncharged periodically. The equivalent
resistor is  T / C . The MOSFET M is controlled by the
output of the simple low-pass filter (R1pf and C1pf). The value
of MOSFET M is_ [4]:
Fig. 4 Frequency tuning circuit
By splitting the nonlinear MOSFET into a linear poly-
silicon resistor and the MOSFET, the nonlinearity of the
MOSFET degrades. The SC schematic in Fig.3 combined by
an enhanced R-MOSFET-C filter is shown in Fig.4. The right
part keeps the value of R-MOSFET equals with R2/F-1. The
common-mode control voltage, Vcm, maintains the designed
voltage scale factor F, an actual time constant matching is
accomplished by varying the differential control voltage Vc+-
Vc-_ [2].
D. Tuning method
The capacitors in Fig.1 and the capacitor in Fig.3 are
chosen of the same unity value, so the match could be rather
accurate. The time constant RC equals (T/C) C, and it is T
after simplification. The T is the period of the clock in Fig.3
and Fig.4.
While the PVT influences the corner frequency about 5%
deviation, for a greater accuracy of the corner frequency is
desired, a fine adjustment can be provided by means of either
digitally trimming the capacitor C1 or varying the clock
frequency fclk _[2][3].

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 In Fig.4, capacitor C1 is designed with a digitally In (6), the parameter VCM is the common-mode voltage
controlled bank of weighted capacitors_ [5] C1 is designed at controlled by the circuit in Fig.4.
the default value of 500fF, and the control bits can be set to
525fF and 475fF .By determining whether the mismatch is B. Design of second-order High-Q Opamp-R-C filter
positive or negative, the control bits are set to proper This paper chooses the High-Q Opamp-R-C structure_ [7]
value .From the following Table 1, it shows under the Typical to build the whole 6th-order Chebvshev I filter. The signal
corner, how the corner frequency f1 and f3 vary with the flow gram for high-Q biquad and Opamp-R-C prototype is as
control bits. the followings:
TABLE I 0  S / Q
THE RELATIONSHIP OF CORNER FREQUENCY AND CONRTOLLED C1
O SK1
C 500 fF 525 fF 475 fF 0 1 1 0 1 1 1
Vi 1  
1
 Vo
f1 f3 f1 f3 f1 f3 s s
-40 113.9 153.9 119 160 109 146.4 1
27 115.2 154.1 119.8 161.2 110.3 147.3 a VM

75 127.3 171.4 101.8 136.8 109.4 147.7 1

Q

1 / 0
IV. DETAILED DESIGN OF THE FILTER
CA  1
CB  1
A. Design of high linearity integrator K1 / 0
Vi 1/ 0
Combining the above R-MOSFET and Opamp in
 Vo
conjunction with feedback capacitor is a low-distortion R- VM 
MOSFET-C integrator_ [6], as the following shows: b 
Fig. 6 (a) SFG of High-Q Biquad (b) Opamp-R-C prototype

Fig.6 (a) shows the basic biquad band-pass filter. Its

transfer function is as shown below:
 a b Vo K1
H bq ( s)   2 (6)
Fig. 5 Two kinds of improved R-MOS-C integrator Vi s  (o / Q ) s  o 2
Fig.5 (a) contains an R-MOSFET shown in Fig.2 (b). The
In the equation (6), the gain of single stage is –K1Q/ωo.
integrator demonstrates a linear controlled unity-gain
frequency More detailed relationship between the voltages in Fig.6 (a) is
shown as (7).
G 1, 2  G 3 , 4 K Vc
 u n ity   (5 ) 1 1
FC FC 
Although Fig.5 (a)shows a linearity controlled integrator, it  Vo   s ( oVM )  s oVM

decrease the effective DC gain and bandwith ,enhances the  (7)
1  k s
VM   ( ) sVi  (o  )Vo 
1

sensitivity of ωunity towards component mismatch .Moreover,
because of low resistor path between the summing node, the  s  o Q 
noise of filter increases. The improved structure of Fig.5 (a) is
Fig.6 (b) is the real circuit of biquad band-pass filter. The
Fig.5 (b). This structure dumps the current of M3 and M4
resistors in it are realized by the R-MOSFET controlled by
into ground instead of the summing node. It enhances the
Fig.4. In this paper, the Req is chosen to be 200KΩ.
resistor between the inputs of the Opamp and decreases the
noise at the summing node. Its unity-gain frequency and V. TESTING RESULT
equivalent resistor is
This filter was fabricated in the SMIC 0.18 μm CMOS
^
 G technology. Fig.7 shows the micrograph of the BPF.
  u n ity  1,2  K V c
 FC FC
 F F (6)
 R eq   ^
 G 1,2 K VC
 ^
V  V C  V
C M  V th 
 C 2

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 Capacitor Array

6 Opamps
Fig. 9 IM3 Testing result of linearity

Resistors VI. CONCLUSIONS

Fig. 7 Micrograph of the BPF
In Fig.7, the upper part is the capacitor array and the other
part is 6 Opamps and the resistors. This chapter describes the
Frequency response and Linearity testing result.
A. Frequency response result
Given an AC frequency sweep, Fig.8 shows the frequency
response of the whole band-pass filter.
This paper designs a 6th-order band-pass filter which
works in rather low frequency (132K) .The rather large time
constant is realized by the special designed R-MOSFET and
well matched capacitor. The filter was fabricated in the
SMIC0.18 μm CMOS technology. The filter has an area of
0.3mm2 and the MASTER circuit has an area of 0.1mm2. The
testing shows the band-pass filter has 43dB linearity and the
frequency response matches the specification well. In the
design, all of the capacitors in the circuit are of the same
unity size, so the matches are rather better. Also, using the
controlled bits to moderate the value of capacitors can rectify
the deviation made by the fabrication. Through the testing,
the band-pass filter satisfies the requirement in the power
application well.

ACKNOWLEDGMENT
The authors thank Rui Jin, Yunfeng Chang, Ruitao He
and Cuihua Jia in the Beijing Embedded System Key Lab-
Beijing University of Technology, for their help with circuit
simulation and layout, Bin Zhang, Wei Lang and Zejun
Zhang for testing.

Fig. 8 Testing result in output REFERENCES

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