INTEGRATED CIRCUITS

The 555 timer consist of two comparators, a flip-flop, output stage transistors Q, and voltage divider circuit
consist of three equal resistances ‘R’
PIN – 1 : Ground : All voltages in the circuit are measured with respect to this PIN.
PIN – 2 : Trigger : The trigger input terminal is an inverting input terminal of comparator –2
The non-inverting input terminal of comparator-2 is kept at 1/3 Vcc using voltage divider circuit.
When trigger input is at + Vcc, the output of comparator –2 is low. To change the output of comparator –
2, the negative trigger pulse of amplitude greater than 1/3 Vcc, the output of comparator –2 goes high. Since the
output of comparator –2 is connected to set input of flip-flop, the flip-flop sets. Therefore Q = 1, = 0. The
transistor goes in cut off and the output of timer goes high.
PIN – 3 : Output : The output of timer is taken from complement side (i.e. ) of flip-flop through
output stage in such a way so that then is high output is low and vice – versa.
The external load can be connected in two different ways.
The load can be connected between output (PIN-3) and +Vcc (PIN-8) and / or it can be connected
between output and ground (PIN-1).
When output is high, the load current flows out of output stage i.e. PIN-3 to PIN-1. This current is called
source current.
When output is low load current flows from + Vcc into the output stage. This current is called as sink
current. The maximum value of sink and source current is 200 mA
In normal condition output of timer is low. The load current flows through the load connected between +
Vcc and output. Hence this load is known as normally ON load.
Similarly load connected between output and ground is called normally OFF load.
PIN -4 : Reset : The separate reset terminal is provided to reset the flip-flop externally. The voltage
applied to the reset PIN over rides the effect of output of comparator-2 which sets the flip-flop. The flip-flop is
reset when the voltage of reset terminal is less than 10.4 volts. When reset terminal is not in use it should be
connected to the + Vcc to avoid false triggering.
PIN -5 : Control voltage : The control voltage input is inverting input terminal of comparator -1, An
external voltage applied to this terminal, changes the threshold as well as trigger voltage. It means by imposing
the voltage at this PIN, the pulse width of output waveform can be varied. When it is not in use, it should be
connected to the ground through capacitor to avoid noise problems.
PIN -6 : Threshold : This is the non-inverting input terminal of comparator-1. The inverting input
terminal is kept at 2/3 Vcc through voltage divider circuit. The external capacitor is connected to this pin. When
transistor is OFF, capacitor charges towards + Vcc. When voltage across capacitor and ultimately at the
threshold terminal is equal to or greater than 2/3 Vcc, the output of comparator goes high, which resets the flip –
flop.
Therefore =1
 The transistor goes into saturation and output of timer goes low.
PIN -7 : Discharge : This is the collector terminal of transistor . The external capacitor is connected
between PIN -7 and PIN -1. When the output is high, the transistor is OFF and capacitor charges towards +
Vcc.
When the output is low, the transistor is ON and capacitor discharges through it.
PIN -8 : +Vcc : The supply voltage between +5 volt to +18 volt is applied to this PIN with respect to ground.
555 TIMER AS A MONOSTABLE VIBRATOR :
FIG :
The monostable multivibrator has one stable state and other state is quasi –stable. Hence this
multivibrator is also known as one shot multivibrator.
The monostable multivibrator using 555 timer is shown in figure.
Initially when the output is low, the timer is instable state. Since the flip-flop is in reset condition (i.e.
= 1), the transistor is ON and capacitor is shorted to the ground through it. The capacitor is in discharge
state.
Now the negative trigger pulse of amplitude greater than 1/3 Vcc is applied to the trigger terminal. When
voltage at trigger terminal falls to 1/3 Vcc the output of comparator-2 goes high, because comparator-2 has
reference voltage equal to 1/3 Vcc. This sets the flip-flop and is low. The transistor turns OFF and output
of timer goes high.
As soon as turns OFF, capacitor starts charging up towards + Vcc through resistance . Since
capacitor is connected to threshold terminal, when capacitor voltage is equal to or turns ON the transistor and
output of timer goes low.
Now the capacitor C discharge through transistor . The output of timer remains low till the next
trigger pulse is applied.
Due to the applicaton of periodic trigger pulse, the rectangular or square wave is generated at the output
terminal.
The waveforms for negative pulse, output voltage and capacitor voltage are shown below.

Fig.
The pulse width ouput waveform during which the output ishigh is given by

tp = 1.1 RA.C

555 TIMER AS AN STABLEMULTIVIBRATION :

FIG :
This 555 timer for astable operation is shown in figure.
As astable multivibrator does not require any external trigger pulse to change the state of output. As
astable multivibrator has both the states quasi-stable. It is also known as free running multivibrator. In the above
astable multivibrator, the time during which output is high or low is determined by two resistors and a capacitor
which are externally connected.
Initially consider that flip-flop is set. Therefore = 0. This turns OFF the transistor and output of
timer is high. Since . Is OFF capacitor C starts charging up towards + Vcc through resistances and . As
capacitor is connected to threshold terminal and reference voltage of comparator-1 is 2/3 Vcc, when voltage
across capacitor is equal to or greater than 2/3 Vcc, the output of comparator-1 goes high. The flip-flop resets
and is high. This turns ON transistor and output of timer goes low.
Now the capacitor C discharges through transistor Q and resistance .
When capacitor voltage falls below 1/3 Vcc, which is the reference voltage of comparator-2, the output
of comparator-2 goes high and flip-flop sets. Hence =0
Again transistor turns OFF and output of timer is high.
The cycles repeats till the + Vcc is applied. Thus 555 timer works as an astable multivibrator.
The waveforms of capacitor voltage and output of timer are as shown below.
Fig.
The output of timer is high during the time period in which capacitor voltage increases from 1/3 Vcc to
2/3 Vcc.
Therefore the time during which the output is high and capacitor charges from 1/3 Vcc to 2/3 Vcc to 1/3
Vcc is by
tc = 0.69 (RA + RB). C

The output of timer is low during the time period in which capacitor voltage falls from 2/3 Vcc to 1/3
Vcc is by
td = 0.69 RB. C
The total time period of output waveform is given by –
T = tc + td

T = 0.69 (RA + 2RB) C

The frequency of oscillation is

fo =

∴ fo = . .

1.45
∴ fo =
R " + 2R % . C
Duty Cycle : It is defined as the ratio of time during which output is high (tc) to the total time period of the
output waveform.
∴ % Duty Cycle = × 100

= × 100
 R" + R%
∴ % Duty Cycle = × 100
R " + 2R %

3) Pulse amplitude modulator using IC 555.

Fig.
In the process of pulse amplitude modulation, the resulting output is series of pulse whose amplitudes are
same as analog signal which carries the information. The basic block diagram of pulse amplitude modulator is as
illustrated in figure.
The PAM uses IC 555 as an astable and monostable multivibrator. The gate used in PAM essentially
consists of switching devices like diodes, BJT or FET.
As shown in diagram, an astable multivibrator using IC 555 generates clock pulses which are used to
drive monostable multivibrator. The monostable M.V. which is constructed from IC 555 generates pulses of
narrow fixed width. These narrow pulses are applied to this gate circuit. The gate is also supplied with analog
signal for the purpose of modulation. The gate circuit which uses semiconductor switch, opens and closes in
accordance with narrow fixed width pulse produced by monostable mutivibrator.
During OFF time of pulse, gate is closed and analog signal will not pass through it. Dring ON time of
pulse, the gate opens for a short period and analog signal passes through it. This repeated action of opening and
closing the gate produces series of pulses whose amplitudes are same as analog signal during the time when gate
is open. Thus, pulse amplitude modulation is achieved.
4) IC 555 TIMER AS A PULSE POSITION MODULATOR :
FIG :
In communication system low frequency signals (audio or video) required to be transmitted to very long
distance. For this, these signals are fed with high frequency signals known as carrier waves. When low
frequency audio signals are combined with high frequency carrier wave, the audio signal causes change in
certain parameters of the carrier wave known as modulation.
In pulse mmodulation high frequency pulses are used as a carrier-wave. In pulse position modulation
both the width and period of pulses very with modulating signal. The pulse position modulator using 555 timer is
shown in figure. Here the 555 timer works in astable mode. The modulating signal is applied to the control
voltage terminal (PIN-5).
Without application of modulating signal the voltage at control voltage terminal is 2/3 Vcc which is the
reference voltage for comparator-1. Similarly the control voltage of com parator-2 is 1/3 Vcc that means the
upper triggering point (UTP) is 2/3 Vcc and lower triggering point (LTP) is 1/3 Vcc.
Since timer is acting in astable mode it generates the rectangular pulses at the output terminal with high
frequency.
The frequency is given by fo =

Where T = 0.69 R " + 2R % × C

 Now when modulating signal is applied to the control voltage input terminal, the upper triggering point
(UTP) changes with the instantaneous value of modulating signal.
Hence, instantaneous value of UTP is given by
UTP = 2/3 Vcc + Vmod.
Where Vmod is instantaneous value of modulating signal.
When the instantaneous value of modulating signal increases, UTP increases. The comparator-1 takes
more time to trigger and hence output of time remains high for large time
During this period, the pulse width (W) increases.
When the instantaneous value of modulating signal decreases, UTP decreases, the comparator-1takes
less time to trigger and output of timer remains high for short time.
During this period, the pulse width decreases, thus due to variation in UTP pulse width varies. The pulse
width (W) is given by
899 − ;<=
2= + × 3 . 4567
899 − 0.5 ;<=

The output waveform is as shown below.

Fig.
The space between two pulses in which output is low, is always constant which is given by

Space = 0.69 × R % × C

The space is defined as the time between the trailing edge of one pulse and leading edge of next pulse.
The total time period (T) of pulse is given by
T = W + space
T = W + 0.69 × R % × C.
Since pulse width is varying and space is constant, the total time period of each pulse varies with the
instantaneous value of modulating signal. The position of the leading edge of any pulse depends on how wide the
proceeding pulse is. It is called pulse position modulation.
Thus in pulse position modulator, the modulating signal in the form of variations in the position of pulse
is transmitted to long distance.
5) A 555 AS A FREQUENCY SHIFT KEYING GENERATOR :
FIG :
In computer peripherals and radio communication system, the binary data or code is transmitted by
means of carrier frequency. This carrier frequency is shifted between two preset frequencies. These preset
frequencies are correspond to logic ‘1’ and logic ‘0’ of a binary data signal.
The frequency corresponding to logic ‘1’ and logic ‘0’ are called mark and space frequencies. The values
of mark and space frequencies are different in “different digital communications,
For example : In teletype writer 1070 Hz to 1270 Hz (mark and space) pair represents original signal
while a 2025 Hz to 2225 Hz pair (mark and space) represents the answer signal.
 The technique of binary data transformation in which carrier frequency is shifted between two preset
frequencies is known as frequency shift keying technique. The circuit which shifts (modulate) carrier frequency
between two preset frequencies corresponding to logic ‘1’ and logic ‘O’ is known as frequency shift keying
generator (modulator).
The frequency shift keying generator using 555 timer is shown in figure. The frequency shift keying
generator uses 555 timer in astable mode. As shown in diagram, the resistance is connected in parallel with
through transistor B. The base of transistor B is supplied with input digital data. The frequency of digital
data is 150 Hz and it acts as a modulating signal which modulates the output frequency of timer depending upon
the logic state of the digital data input.
Initially consider that flip-flop is set. Hence = 0. Therefore transistor is OFF and output of timer is
high.
Now when the input data is at logic ‘1’ the transistor B is OFF and capacitor C charges towards +Vcc
through and . Since reference voltage of comparator-1 is 2/3 Vcc, when capacitor voltage is greater than
2/3 Vcc, the output of comparator-1 is high. This resets the flip-flop. The transistor turns ON and output goes
low.
Now capacitor starts discharging through and transistor . When voltage across capacitor falls
below 1/3 Vcc, output of comparator-2 goes high. This sets the flip-flop. The transistor turns OFF and output
is high.
Thus timer works in normal astoble mode and produces the rectangular waves of frequency given by

1.45
fo =
R " + 2R % × C

The values of , and C are selected in such a way so that at logic ‘1’ of input data the ‘fo’ is equal
to mark frequency (say 1070 Hz).
When input data is at logic ‘0’, the transistor Q, turns ON, which connects resistance Ro across RA. This
parallel combination of RA and Re reduces net resistance of the charging circuit. The charging time of capacitor
‘C’ reduces but discharging time remains same. Thus the timer operates in astable mode with reduced charging
time which in turn increases frequency. The frequency is given by

1.45
fo =
R " ||R D + 2R % . C

By proper selection of Rc, this output frequency at logic ‘0’ is adjusted to ‘space’ frequency (say 1270
Hz)
Thus the input data modulates the frequency of output signal at preset frequencies. The difference
between mark and space is known as frequency shift.
CHARACTERISTICS OF 1C 55 TIMER :
1) It operates on + 5 to + 18 volts supply in both monostable and astable mode.
2) It has adjustable duty cycle.
3) The timing of output pulse can be from microseconds to hours.
4) It has high current output.
5) It cart source or sink 200 mA current.
6) The temperature stability is 0.005% per E C
7) The output can drive TTL circuits.
8) It is reliable, easy to use and low cost.
APPLICATIONS of 555 TIMER :
1) It is used as a monostable and astable multivibrator.
2) It is used as a pulse width modulator, pulse position modulator and frequency shift keying generator
in communication system.
3) It is used as a D.C. to D.C. converter.
4) It is used in temperature measurement and control.
5) It is used in burglar and toxic gas alarms.
6) It is used as ainfrared transmitter.
7) It is used as a voltage controlled oscillator (VCO).
IC 741
BLOCK DIAGRAM OF 1C 741 :
Fig.
1) Input stage : The input stage consist of dual input balanced output (double ended input and double ended
output) differential amplifier. It has tv/o input terminals (inverting and non-inverting). The difference of these
two signal is amplified and output is taken across two collector terminals. This stage (dual input balanced output
differential amplifier) provides high voltage gain and high input impedence. It suppresses common mode signals.
2) Constant Current Source : The constant current source is used to supply constant corrent to the differential
amplifier:
3) Intermediate Stage : It is also known as additional gain amplifier. This stage is consist of dual input
unbalaned output differential amplifier. The output of input stage is applied to the input of intermediate stage.
This stage increases gain of 1 C 741 and also suppresses common mode signals.
4) Emitter Follower : The emitter follower circuit has very high input impedence and low output impeduence.
This is why it is used as a buffer circuit which isolates remaining circuits from differential amplifier circuit.
5) Level Shifter : Because of the direct coupling of input and intermediate stages, the D.C. level of the output
of intermediate stage is above the ground level. Hence to bring this D.C. level to zero value, the third stage
known as level shifting stage is used. This level shifting stage is consist of an emitter follower circuit for D.C.
level shifting.
6) Power Amplifier (Output Stage) : The fourth and final stage of OPAMP is a consist of a simple push-pull
power amplifier. The output of D.C. leverl shifter is fed to the power amplifier. This power amplifier increases
the output voltage swing and raises the current supplying capacity of 1C 741 (OPAMP : Operational amplifier)
This also provides the low output impedence. (Ideally = 0, Practically = 75Ω)
PIN Configuration of 1C 741 :
Fig.
PIN 1 and 5 – OFFSET Null :
When OPAMP is not supplied with differential input signal (both the input terminals are at ground
potentials), due to mismatching of transistors the output voltage may not be zero, This output voltage appears
across output terminal even if differential input is zero is known as output offset voltage. Before the application
of OPAMP, this output offset voltage is nullified using offset null pins. The negative voltage is supplied to pins 1
and 5 using a potentiometer.
PIN 2 – Inverting Input :
When the input voltage applied to this pin is greater than the input voltage applied to non-inverting input
terminal then the output is inverted from of input. It means the phase of output is shifted by 180o with reference
to the phase of input applied to PIN No. 2.
PIN 3 – Non – inverting Input :
When the input voltage applied to this pin is greater than inverting input-voltage, the phase of output
voltage is same as phase of non-inverting input voltage.
PIN 4 and 7 :
The OPAMP uses dual power supply. The DC power supply required for the operation of the OPAMP is
connected to the PIN No. 4 and PIN No. 7. The negative terminal of power supply is connected to PIN No. 4 and
positive terminal of power supply is connected to PIN No, 7.
PIN 6 – Output Terminal :
The output of OPAMP is taken across PIN No. 6 and ground.
PIN 8 – NC :
PIN No. 8 is not connected any where.
APPLICATION of 1C 741 ;
Following are some applications of 1C 741
1) Adder
2) Substractor
3) Inverting amplifier
4) Non-inverting amplifier
5) Integrator
6) Differentiator
7) Comparator
 8) Schmitt trigger
CHARACTERISTICS OF 1C 741 OPAMP :
1) Open loop voltage gain is 100000 (1 Lakhs).
2) Unity gain frequency is 1 MHz.
3) Input resistance is 2 M Ω
4) Output resistance is 75 Ω
5) Input bias current is 80 nanoampere.
6) Input offset current is 20 nanoampere.
7) Common mode rejection ratio is 90 dB.
8) Slew rete is 0.5 volt / µsec.
9) Power supply rejection ratio is – 70 dB.
IC LM317 :
Pin Configuration of 1C LM 317 : Fig.
A LM 317 is series adjustable three terminal positive voltage regulator, the three terminals are Vin, Vout
and adjustment.
The Vin terminal is supplied with unregulated DC supply. The Vout terminal provides regulated output
voltage. The adjustment terminal is connected to external resistance to provide variable regulated output voltage.
Characteristics of LM 317 :
1) The output voltage range is from 1.2 volt to 37 volt.
2) Maximum output current is 1.5 ampere.
3) Load regualtion is 0.3 % for IL = 10 m Amp. To 1.5 Amp.
4) Line regulation is 0.02% per volt.
5) Ripple rejection is 80 dB.
6) Drop out voltage is 2 volt.
7) Output resistance is 10 m Ω
8) Short circuited load current is 2.2 Amperes.
Adjustable Voltage Regulator using LM317 :
Circuit Diagram
An adjustable positive voltage regulator using LM 317 is shown in circuit diagram. The unregulated
voltage from unregulated power supply is given to input terminal ‘Vin’. The ‘output set’ resistor R2 is connected
between adjustment terminal and ground. The fixed resistor R1 is connected between output terminal and
adjustment terminal. The load is connected across output terminal and ground.
The LM 317 develops nominal 1.25 volt between output and adjustment terminals. This voltage is
known as reference voltage (Vref). This 1.25 volt reference voltage is impressed across resistor R1. Since voltage
is constant the current through ‘R1’ (I1) is also constant for a given value of ‘R1’. Because resistor ‘R1’ sets
current ‘I1’ it is called current set or program resistor’. The current ‘IAdj’ flows from adjustment terminal to
ground through the output set resistor ‘R2’ The value of ‘IAdj’ is very small and constant irrespective of line and
load changes. The maximum value of ‘IAdj’ is 100 µAmpers.

From circuit diagram,

V = R . I + R I + I"HI
JKLM
Where, I = NO
JKLM JKLM
V = . R + . R + R I"HI
NO NO

Since I"HI is very small, neglecting R I"HI , drop

JKLM N
V = . R + VNPQ NR
NO O

NR
V = VNPQ S1 + NO
T

But, VNPQ = 1.25 V

R
V = 1.25 U1 + V
R
From output equation, the output voltage is a function of output set resistor R2 for fixed value of current
set resistor R1. Hence by varying R2, the variable regulated output voltage can be obtained.
For better load regulation current set resistor ‘R1’ is tied close to regulator rather than load.
The capacitor ‘C1’ is connected to avoid oscillations in case the IC is away from unregulated power
supply.
The capacitor C2, is used to improve frequency response of regulator circuit.
Application of LM 317 :
1) It is used in high gain amplifier.
2) It is used as constant current battery charger.
3) It is used for digitally selected outputs.
4) It is used as power follower.
5) It is used as adjustable voltage regulator with wide range of O/P voltage is i.e. 1.25 to 37 V.
6) It is used as a lamp driver or lamp flasher.
Q.1 Draw a diagram showing pin connections of IC 555.
Ans. Pin connections of IC 555 :

Control Voltrage
Dischange

Threshold
+Vcc
8 7 6 5

1 2 3 4

Output
Ground

Trigger

Q. 2 Explain the working of 555 monostable time. Reset

Ans. IC 555 as Monostable Multivibrator (Timer) :

+ Vcc Trigger
W
B

B
Vcc

0 Threas hold

+ Vcc
0 Output

555 timer connected as monostable Multivibrator

Waveforms

When the trigger input is slightly less than + Vcc/3, the lower comparator has a high output and
it resets the flip-flop. This cuts off the transistor and allows the transistor to charge. When the capacitor
voltage is slightly greater than + 2 Vcc/3, the upper comparator has a high output, which sets the flip-
flop. As soon as Q = 1, it turns on the transistor. This quickly discharges the capacitor.

In typical waveforms are shown. The trigger input is narrow pulse with a quiescent value of +
Vcc. When this pulse drops below + Vcc/3, the flip-flop resets and allows the capacitor to charge. When
the threshold voltage is slightly large than + 2 Vcc/3, the flip-flop sets. Q = 1, This saturates the
transistor and discharges the capacitor. Thus we get a rectangular output pulse. The capacitor charges
through R. The time required to charge the capacitor from o to + 2 Vcc/3 is the ‘RC time constant’ which
controls the width of the output pulse. W = 1.1 RC.
 + Vcc
4 8
R
7 3
Vout

555
+ C 5
-
6
2 1
0.01 F
Trigger

555 Monostable Time

Q.3 i) Explain with circuit diagram, working of IC 555 as an as table multivibrator. Write the
mathematical expressions for t1, t2 and frequency of the output wave.
ii) List types of multivibrators than can be constructed using IC 555 and draw the circuit diagram
of stable MV with equation for output frequency.

+ Vcc
R1 4 8
7 3
Vout
R2
555

6 5

2 1
C 0.01 F

555 Astable Time Circuit

555 timer connected as Astable Multivibrator

Capacitor Waveform

+ Vcc Output Waveform

W
0
T

Waveforms

Astable 555 timer is also called as free-running multivibrator. Pin 4 is connected to supply
voltage and control pin (pin 5) is bypassed to ground through 0.01 µF capacitor.

When supply is turned on, the capacitor charges through a total resistance of R1 + R2. Therefore
charging time constant is (R1 + R2) C. As the capacitor charges, the threshold voltage increases. When
the threshold voltage (pin 6) increases beyond + 2Vcc/3, the upper comparator has a high output. This
sets the flip-flop. Q = 1. The transistor saturates and grounds the pin 7. Now the capacitor discharges
through R2. Therefore discharging time constant is R2 C. when the capacitor voltage drops slightly below
+ Vcc/3, the lower comparator has a high output. This resets the flip-flop. Q = 0.

The capacitor voltage exponentially rises and falls. The output is a rectangular wave. The output
is not sysmmetrical because charging time constant is longer than the discharging time constant.

Y
The duty cycle X = × 100%

= O R
× 100%
O R

Depending on R1 and R2, the duty cycle varies between 50 & 100%. The output frequency is.

.ZZ
f=
NO NR D

Astable multivibrator is used to produce a continuous train of rectangular pulses. i.e. clock
pulses.

T=t +t

t = W = 0.693 R + R . C = charge time

t = 0.693 R . C = Discharge time

T = (0.693) (R1 + 2R2) . C

.ZZ
b= = NO NR D