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Irl 3803
Irl 3803
IRL3803
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Advanced Process Technology D
Thermal Resistance
Parameter Min. Typ. Max. Units
RθJC Junction-to-Case –––– –––– 0.75
RθCS Case-to-Sink, Flat, Greased Surface –––– 0.50 –––– °C/W
RθJA Junction-to-Ambient –––– –––– 62
1/5/04
IRL3803
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ.
Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 30 –––
––– V V GS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.052
––– V/°C Reference to 25°C, ID = 1mA
––– –––
0.006 VGS = 10V, ID = 71A
RDS(on) Static Drain-to-Source On-Resistance Ω
––– –––
0.009 VGS = 4.5V, ID = 59A
VGS(th) Gate Threshold Voltage 1.0 –––
––– V VDS = V GS, ID = 250µA
gfs Forward Transconductance 55 –––
––– S V DS = 25V, ID = 71A
––– –––25 VDS = 30V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– –––
250 VDS = 24V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– –––
100 VGS = 16V
IGSS nA
Gate-to-Source Reverse Leakage ––– –––
-100 VGS = -16V
Qg Total Gate Charge ––– –––
140 ID = 71A
Qgs Gate-to-Source Charge ––– –––41 nC VDS = 24V
Qgd Gate-to-Drain ("Miller") Charge ––– –––78 VGS = 4.5V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 14––– VDD = 15V
tr Rise Time ––– 230
––– ID = 71A
ns
td(off) Turn-Off Delay Time ––– 29
––– RG = 1.3Ω, VGS = 4.5V
tf Fall Time ––– 35––– RD = 0.20Ω, See Fig. 10
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact S
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 71A, VGS = 0V
trr Reverse Recovery Time ––– 120 180 ns TJ = 25°C, IF = 71A
Q rr Reverse RecoveryCharge ––– 450 680 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
VDD = 15V, starting TJ = 25°C, L = 180µH
Caculated continuous current based on maximum allowable
RG = 25Ω, IAS = 71A. (See Figure 12) junction temperature;for recommended current-handling of the
ISD ≤ 71A, di/dt ≤ 130A/µs, VDD ≤ V(BR)DSS, package refer to Design Tip # 93-4
TJ ≤ 175°C
IRL3803
10000 VGS
TOP 15V 10000 VGS
12V TOP 15V
10V 12V
8.0V 10V
1000
ID , D rain-to-S ource C urrent (A )
6.0V 8.0V
1000
ID , Drain-to-Source Current (A )
4.0V 6.0V
3.0V 4.0V
BOTTOM 2.0V 3.0V
BOTTOM 2.0V
100
100
10
10
1
1 2.0V
0.1
0.1
2 .0 V
2 0µ s P U LS E W ID T H
T J = 2 5°C 2 0µ s P U LS E W ID TH
0.01 A T J = 1 75 °C
0.1 1 10 100 0.01 A
0.1 1 10 100
V D S , D rain-to-S ource V oltage (V )
V D S , D rain-to-S ource V oltage (V )
1000 2.0
I D = 1 20 A
R D S (on ) , D rain-to-S ource O n R esistance
T J = 2 5°C
I D , D rain-to-So urce C urren t (A )
100 TJ = 1 75 °C
1.5
(N orm alized)
10
1.0
0.5
0.1
V DS = 2 5V
2 0µ s P U L S E W ID TH V G S = 10 V
0.01 0.0 A
A -60 -40 -20 0 20 40 60 80 100 120 140 160 180
2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0
10000 15
V GS = 0V , f = 1MHz I D = 7 1A
C iss = C g s + C g d , C d s S H O R TE D V D S = 2 4V
V G S , G a te-to-S ou rc e V o ltag e (V )
C = C gd
C iss C rs s = C ds + C g d
V D S = 1 5V
8000 o ss 12
C , Capacitance (pF)
6000 C oss 9
4000 6
C rss
2000 3
FO R TE S T CIR C U IT
S E E FIG U R E 1 3
0 A 0 A
1 10 100 0 40 80 120 160 200
V D S , D rain-to-S ourc e V oltage (V ) Q G , T otal G ate C harge (nC )
1000 1000
O P E R A T IO N IN T H IS A R E A L IM ITE D
B Y R D S (o n)
I S D , R everse Drain C urrent (A )
10µ s
I D , D rain Current (A )
TJ = 17 5°C
100 100µ s
100
T J = 25 °C
1m s
T C = 25 °C
T J = 17 5°C
V G S = 0V S ing le P u lse 10m s
10 A 10 A
0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 1 10 100
V S D , S ourc e-to-D rain V oltage (V ) V D S , D rain-to-S ource V oltage (V )
140 RD
LIMITED BY PACKAGE VDS
120
VGS
D.U.T.
RG
I D , Drain Current (A)
100 +
-VDD
80 4.5V
Pulse Width ≤ 1 µs
60 Duty Factor ≤ 0.1 %
VDS
20
90%
0
25 50 75 100 125 150 175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50
0.20
0.1 0.10
P DM
0.05
t1
0.02 t2
SINGLE PULSE
0.01 (THERMAL RESPONSE)
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)
1500
L ID
600
Fig 12a. Unclamped Inductive Test Circuit
300
V(BR)DSS V D D = 15 V
0 A
25 50 75 100 125 150 175
tp
S tarting T J , J unc tion T em perature (°C )
VDD
IAS
50KΩ
12V .2µF
QG .3µF
4.5 V +
V
D.U.T. - DS
QGS QGD
VGS
VG
3mA
IG ID
Charge Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
IRL3803
+
- +
-
RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS=10V *
Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5% ISD
0 .9 3 (.0 3 7 ) 0 .5 5 (.0 2 2 )
3X 3X
0 .6 9 (.0 2 7 ) 0 .4 6 (.0 1 8 )
1 .4 0 (.0 5 5 )
3X
1 .1 5 (.0 4 5 ) 0 .3 6 (.0 1 4 ) M B A M
2 .9 2 (.1 1 5 )
2 .6 4 (.1 0 4 )
2 .5 4 (.1 0 0)
2X
N O TE S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 3 O U T L IN E C O N F O R M S T O J E D E C O U T L IN E T O -2 2 0 A B .
2 C O N T R O L L IN G D IM E N S IO N : IN C H 4 H E A T S IN K & L E A D M E A S U R E M E N T S D O N O T IN C L U D E B U R R S .
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IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086
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http://www.irf.com/ Data and specifications subject to change without notice. 1/04