TITLE : To Experimentally Investigate Digital

Logic Gates

DATE OF
: 14th April, 2021
EXPERIME
NT

Lab : 05
Number

Muhammad Waqas Ul
:
NAME Qasim

ROLL NO : MEEN-19111026
 Objectives:
● Introduction and familiarization with logicIC's
● To setup apparatus for verification of logicgates

Equipment:
● Breadboard.
● Connectingwires.
● IC 7408, IC 7432, IC 7406, IC 7402, IC7404
● Power Supply
● Light Emitting Diode(LED)

Theory:
The basic logic gates are the building blocks of more complex logic circuits and
the AND, OR and NOT gates are three of the basic gates. All these gates are packaged in
chips that contain multiple gates and are considered Small Scale Integration(SSI) since
the packages have less 12 gates per chip.All the chips discussed in laboratory manual are
dual in line pin(DIP) packages which allows for easy insertion in to the bread board and
for easy access to the leads(pins) for trouble shooting. Each chip used in any of the
experiments has a manufacturers’ specification (data) sheet available on the internet.

The gates listed in table above will respond to HIGH and LOW voltages and since
all the chips are TTL based the corresponding voltages will be approximately +5V for
HIGH and 0V for LOW. Also, only positive logic is considered in the laboratory manual
so a HIGH will correspond with a Boolean logic 1 and a LOW will correspond to a
Boolean logic 0. In this lab, each of the gate types will be thoroughly tested. All gates

7486
have two inputs and one output except for not gate. Not gate works with one input. The
AND, OR, NAND, and NOR gates can be extended to have more than two inputs.

Part Numbers
Part numbers given to these DIP packages specify what type of gates are enclosed, and
how many. These part numbers are industry standards. A few of the more common TTL
“DIP” circuit packages are shown here for reference:
Truth Table and Boolean Expression
The eight most “standard” individual Digital Logic Gates are summarised below
along with their corresponding truth tables.
Lab Task
1. Setup the circuits for each logic gate to analyze the operation of the various basic
logic gates.
2. Vary the inputs of each gate and measure the output.
3. Do this for all possible combinations of inputs.
4. Construct the truth table for each gate.
Buffer
Truth table of Buffer

A Y

0 0

1 1
Inverter ( NOT gate )
Truth table of NOT gate

A Y

0 1

1 0

AND gate
Truth table of AND gate

A B Y

0 0 0
0 1
0
1 0
1 1 0

1
NAND gate
 Truth table of NAND gate

A B Y

0 0 1
0 1 1
1 0 1
1 1 0

OR gate
Truth table of OR gate
 A B Y

0 0 0
0 1 1
1 0 1
1 1 1

NOR gate
Truth table of NOR gate

A B Y
0 0 1
0 1 0
1 0 0
1 1 0
XOR gate
Truth table of XOR gate

A B Y
0 0 0
0 1 1
1 0 1
1 1 0
XNOR gate
Truth table of XNOR gate

A B Y

0 0 1
0 1 0
1 0 0
1 1 1