Microprocessor

Microcontroller Systems

Chapter 2
SEMICONDUCTOR
MEMORY
‫ ﻭﺟﺩﻱ ﺳﻠﻳﻣﺎﻥ ﺍﻟﺣﻠﺑﻲ‬.‫ ﻡ‬.‫ ﺩ‬:‫ﻣﺩﺭﺱ ﺍﻟﻣﺳﺎﻕ‬

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 Outline of the Chapter

 1.1 Some important terminology

 1.2 Internal organization of computers
 1.3 Memory characteristics
 1.3.1 Memory capacity.
 1.3.2 Memory organization
 1.3.3 Speed
 1.4 ROM (read-only memory)
 1.5 PROM (programmable ROM)
 1.6 EPROM (erasable programmable ROM) and UV-
EPROM
 1.7 EEPROM (electrically erasable programmable ROM)
 1.8 Flash memory EPROM
 1.9 Mask ROM
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 Outline of the Chapter

 1.10 RAM (random access memory)

 1.11 SRAM (static RAM)
 1.12 NV-RAM (nonvolatile RAM)
 1.13 DRAM (dynamic RAM)
 1.14 Packaging issue in DRAM
 1.15 DRAM organization

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 Some important terminology

A bit is a binary digit that can have the value 0 or 1. 0

Bit
A byte is defined as 8 bits.
A nibble is half a byte, or 4 bits. Nibble 1011
A word is two bytes, or 16 bits. Byte 11000101
Word 1011 1011 1011 1011
Every thing shown on display is a relative size of these units. All are
composed of any combination of zeros and ones.

A kilobyte is 210 bytes, which is 1024 bytes

A megabyte, or mega as some call it, is 220 bytes

16 megabytes of memory would be 16 × 220, or 24 × 220, which is 224.

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 Some important terminology

n 2n n 2n
0 20=1 8 28=256
1 21=2 9 29=512
2 22=4 10 210=1024 Kilo

3 23=8 11 211=2048
4 24=16 12 212=4096
5 25=32 20 220=1M Mega

6 26=64 30 230=1G Giga

7 27=128 40 240=1T Tera

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 Some important terminology

Two types of memory used in microcomputers:

 RAM (random access memory) also called read/write
memory.
used by the computer for temporary storage of
programs that it is running.
Data is lost when the computer is turned off.
is called volatile memory.
 ROM (read-only memory).
ROM contains programs and information essential to
operation of the computer. The information in ROM is:
1. permanent,
2. cannot be changed by the user,
3. is not lost when the power is turned off.
ROM is called nonvolatile memory.
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 Internal organization of computers
Computer consists of three parts: CPU, memory, and I/O devices.

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 Internal organization of computers

 CPU: process information stored in memory, I/O devices:

provide a means of communicating with the CPU.

 CPU is connected to memory and I/O through strips of wire

called a bus.

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 Memory characteristics

 Memory semiconductor chip capacity: It can be in units of

Kbits (kilobits), Mbits (megabits), and so on.
The capacity of a memory IC chip is always given in bits, the
memory capacity of a computer system is given in bytes.
 Memory organization: Memory chips are organized into a
number of locations within the IC, each location (1, 4, 8, or
even 16 bits)
 The number of bits that each location within the memory
chip can hold is always equal to the number of data pins
on the chip.
 The number of locations within a memory IC always equals
2 to the power of the number of address pins.

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 Memory characteristics

 Memory organization: (summarization)

 A memory chip contains 2x locations, where x is the
number of address pins.
 Each location contains y bits, where y is the number of
data pins on the chip.
 The entire chip will contain 2x × y bits,
where x is the number of address pins
and y is the number of data pins on
the chip.

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 Memory characteristics

 Memory Speed: speed at which data can be accessed

 The speed of the memory chip is commonly referred to as
its access time.
 varies from a few nanoseconds to hundreds of
nanoseconds, depending on the IC technology
 The shorter the access time, the better and the more
expensive the memory chip.

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 ROM (Read-Only Memory)

 ROM:
 does not lose its contents when the power is turned off.
 called nonvolatile

 Types of ROM,
 PROM,
 EPROM,
 EEPROM,
 Flash EPROM,
 and mask ROM.

Each is explained next

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 ROM (Read-Only Memory)

 PROM (programmable ROM)

 PROM is a user-programmable memory.
 A fuse for every bit of the PROM,
 is programmed by blowing the fuses.
 Must be discarded If the information burned is wrong
 also referred to as OTP (one-time programmable).

 EPROM (erasable programmable ROM) and UV-EPROM

 allow making changes in the contents of PROM,
 A widely used EPROM is called UV-EPROM, (Ultraviolet),
 erasing its contents can take up to 20 minutes.

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 ROM (Read-Only Memory)

EPROM (erasable programmable ROM) and UV-EPROM

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 ROM (Read-Only Memory)

EPROM (erasable programmable ROM) and UV-EPROM

 Steps to program a UV-EPROM chip:
 remove it from its socket on the system board and place it in
EPROM erasure equipment to expose it to UV radiation for
15–20 minutes.
 Place the EPROM in the ROM burner, the ROM burner uses
12.5 volts or higher. This voltage is referred to as VPP in the
UVEPROM data sheet.
 Place the chip back into its socket on the system board.

major disadvantage, it cannot be erased and programmed while

it is in the system board.
EEPROM was invented.

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 ROM (Read-Only Memory)

EEPROM (electrically erasable programmable ROM)

 EEPROM has several advantages over EPROM

 Erasure is electrical and therefore instant, therefore no

erasure time required,
 in EEPROM one can select which byte to be erased, in
contrast to UV-EPROM,
 EEPROM can be reprogramed and its contents erased
while it is still in the system board.

 In general, the cost per bit for EEPROM is much higher

than for UV-EPROM.

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 ROM (Read-Only Memory)
Flash memory EPROM
 user-programmable memory chip,
 Became very popular since early 1990s, due to:
 The erasure of the entire contents takes less
than a second “Flash memory”.
 Erasure method is electrical “Flash EEPROM”
 Firstly, when Flash memory's contents are erased, the
entire device is erased. However, recently the contents
are divided into blocks and the erasure can be done
block by block.
 Flash memory has no byte erasure option
 widely used to upgrade the BIOS ROM of the PC
 Suggested to replace the hard disk storage
 access time in the range of 100 ns compared to tens of
milliseconds.
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 ROM (Read-Only Memory)

Flash memory EPROM

 Suggested to replace the hard disk storage

 Problem:
 The program/erase cycle is 100,000 for Flash and
EEPROM, 1000 for UV-EPROM, and infinite for RAM and
disks.

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 ROM (Read-Only Memory)

Mask ROM

 The contents are programmed by the IC manufacturer.

 It is not a user-programmable ROM
 process is costly (used when the needed volume is high)
 absolutely certain that the contents will not change.
 UV-EPROM or Flash for the development phase of a project,
and after finalization is the mask version ordered.

Advantage: Mask ROM is significantly cheaper than other kinds of

ROM

 Note: All ROM memories have 8 bits for data pins; therefore,
the organization is x8.

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 RAM (random access memory)

Volatile memory
 RAM (SRAM),
 NV-RAM (nonvolatile RAM),
 and dynamic RAM (DRAM).
SRAM (static RAM)
 made of flipflops
 refreshing in order to keep their data
is not required.
 problem each storage cell requires at
least 6 transistors to build, and the
cell holds only 1 bit of data.
 Recently, have been made of 4 transistors, still too many
 4-transistor cells + the use of CMOS technology high-
capacity SRAM, but still far below DRAM.
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 RAM (random access memory)

SRAM (static RAM)

 A0–A10 are for address inputs,
where 11 address lines gives 211 = 2K.
 WE (write enable) is for writing data
into SRAM (active low).
 OE (output enable) is for reading data
out of SRAM (active low).
 CS (chip select) is used to select the
memory chip.
 I/O0–I/O7 are for data I/O, where 8-bit data lines give an
organization of 2K × 8.

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 RAM (random access memory)

SRAM (static RAM)

 The functional diagram for the 6116 SRAM is given in Figure.

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 RAM (random access memory)

SRAM (static RAM)

 Figure shows the following steps to write data into SRAM.
1. Provide the addresses to pins A0–A10.
2. Activate the CS pin.
3. Make WE = 0 while RD = 1.
4. Provide the data to pins I/O0–I/O7.
5. Make WE = 1 and data will be written into SRAM on the
positive edge of the WE signal.

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 RAM (random access memory)
SRAM (static RAM)
 The following are steps to read data from SRAM. See Figure
1. Provide the addresses to pins A0–A10. This is the start of
the access time (tAA).
2. Activate the CS pin.
3. While WE = 1, a high-to-low pulse on the OE pin will read the
data out of the chip.

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 RAM (random access memory)
NV-RAM (nonvolatile RAM) called NV-RAM
 allows the CPU to read and write to it,
 when the power is turned off the contents are not lost.
 made of the following components:
1. It uses extremely power-efficient, SRAM cells built out of
CMOS.
2. It uses an internal lithium battery as a backup energy
source.
3. It uses an intelligent control circuitry. The main job of this
control circuitry is to monitor the VCC pin constantly to detect
loss of the external power supply. If the power to the VCC pin
falls below out-of-tolerance conditions, it switches
automatically to its internal power source, which is used to
retain the NV-RAM contents when the external power source is
off. nonvolatile RAM is a very expensive
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 RAM (random access memory)
DRAM (dynamic RAM)
 dynamic RAM (random access memory).
 Using a capacitor to store data cuts down the number of
transistors needed to build the cell.
 requires constant refreshing due to leakage.
 has smaller net memory cell size due to use of capacitors.
The advantages and disadvantages of DRAM
 Advantages:
 high density (capacity
 cheaper cost per bit
 lower power consumption per bit.
 Disadvantage
 must be refreshed periodically
 while DRAM is being refreshed, the data cannot be
accessed.
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 RAM (random access memory)
DRAM (dynamic RAM)
 Since 1970, the capacity of DRAM has exploded. 1K-bit
(1024) chip, 4K-bit in 1973, …, In the 2000s, 2G-bit chips, …
Packaging issue in DRAM
 In DRAM there is a problem of packing a large number of cells
into a single chip with the normal number of pins assigned to
addresses.
For example, a 64K-bit chip (64K × 1) must have 16 address
lines and 1 data line, requiring 16 pins to send in the address
if the conventional method is used. This is in addition to
VCC power, ground, and read/write control pins.
 Therefore, multiplexing/demultiplexing is used.
 The method used is to split the address in half and send in
each half of the address through the same pins.

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 RAM (random access memory)

Packaging issue in DRAM

 Internally, the DRAM structure is divided into a square of rows
and columns.
 first half of the address is called the row and the second half is
called the column.
 the first half of the address
is sent in through the 8 pins
A0–A7, and by activating
RAS (row address strobe),
 the second half of the
address is sent in through
the same pins, and by
activating CAS (column address strobe).
 This results in using 8 pins for addresses plus RAS and CAS,
for a total of 10 pins, instead of the 16 pins.
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 RAM (random access memory)

DRAM organization
 In ROM, we noted that all of these chips have 8 pins for data.
But DRAM memory chips can have ×1, ×4, ×8, or ×16
organizations.
 Example:
Discuss the number of pins set aside for addresses in each of
the following memory chips.
(a) 16K × 4 DRAM (b) 16K × 4 SRAM
Solution:
Since 214 = 16K:
(a) For DRAM we have 7 pins (A0–A6) for the address pins and
2 pins for RAS and CAS.
(b) For SRAM we have 14 pins for address and no pins for RAS
and CAS since they are associated only with DRAM.
In both cases we have 4 pins for the data bus.
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 RAM (random access memory)

DRAM organization
 In memory chips, the data pins are also called I/O. In some
DRAMs there are separate Din and Dout pins.
 Figure shows a 256K × 1 DRAM chip
with pins A0–A8 for address, RAS and CAS,
WE (write enable),
and data in and data out,
as well as power and ground.

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