c29p12 TRN

S ® Training Manual
KD-34XBR2
KDP-57XBR2
Direct View
& Projection TVs
HA-3/RA-5A Chassis
Models: KD-34XBR2
KDP-57XBR2
KDP-65XBR2
Troubleshooting Information
Course: CTV-29/TVP-12 (C29P12)

Table of Contents
1. Introduction ...................................... 1 10. Communications
Models Covered .............................................. 1 (HA-3 & RA-5A Chassis) ..................... 36
Technical Highlights ......................................... 1 11. Video Process
2. New Features ................................... 3 (HA-3 & RA-5A Chassis) ................ 40
Menu ............................................................... 3 Overall Sync Path ........................................... 43
i Link ................................................................ 5 Board Replacement Repairs .......................... 44
3. DTV Signal Information ................... 8 Component Level Repair ................................ 53
Digital TV Transmissions ................................. 8 DTV Tuner Processing for DTV Box Repair
(HA-3 & RA-5A Chassis ............................. 58
Signal Contents ............................................... 8
Signal Quality .................................................. 9
12. Audio Block (HA-3 Chassis) ........ 60
Signal Flow ..................................................... 60
4. HA-3 Chassis Overall Block .......... 10
Normal Signal Levels ..................................... 62
5. Power ON Block (HA-3 Chassis) ... 12
Power Supplies .............................................. 12 13. Firmware Upgrade
(HA-3 & RA-5A Chassis) ................. 63
Standby Power Supply ................................... 13
Primary & Secondary Power Supplies ............ 13 14. HA-3 TV Chassis
TV Power ON Sequence ................................ 15 Board Replacement ........................ 66
6. Primary Power Supply 15. Convergence Adjustment
( HA-3 & RA-5A Chassis) ................. 16 Overview (HA-3 Chassis) ............... 69
Oscillator Start Up .......................................... 16 Service Mode Access (conventional) .............. 69
Driver / Output stage ...................................... 16 Service Mode Categories (groups) ................. 69
Regulator Stage.............................................. 17 Convergence Adjustments - Overview............ 70
Testing ............................................................ 18 Data Copy Function ........................................ 71
Internal Video Pattern Generation .................. 71
7. Secondary Power Supply
(HA-3 & RA-5A Chassis) ................. 20 Alternate Video 5/6 Input Path -
used for troubleshooting only ..................... 72
Start UP .......................................................... 20
RA-5A Chassis
Regulation ...................................................... 21
Testing for Low B+ or Shutdown ..................... 21 16. Board Layout
8. Protection Block (HA-3 Chassis) .. 23 (RA-5A Chassis) .............................. 74
Protection Circuits .......................................... 24 17. Overall Block ................................. 75
9. High Voltage Stage 18. Power Supply Block ..................... 77
(HA-3 Chassis) ............................... 32 Power Supplies .............................................. 78
Power ON ....................................................... 79
Start Up .......................................................... 32
Protection ....................................................... 33 19. G Board Tests................................ 81
A. Power the G board and check
HV Adjustment ............................................... 34
output voltages ........................................... 81
Testing ............................................................ 35
B. Power UP the G board removed from Testing for Dark Screen .................................. 98
the TV chassis ............................................ 82 22. Video Process
C. Powering up the G board power supplies (RA-5A Chassis)............................100
after parts replacements ............................. 82
23. Board Replacement
20. Protection Block
(RA-5A Chassis).............................102
(RA-5A Chassis)..............................85
Appendix
Protection Circuits .......................................... 86
Connector Layout (HA-3 Chassis) .................... i
21. High Voltage Stage
Communication (HA-3 Chassis) .......................ii
(RA-5A Chassis).............................95
D Board Tests (RA-5A Chassis) ...................... iii
HV Power Supply Start Up
(Board level repairs) ................................... 95 Physical Video/Sync Path (RA-5A Chassis) .... iv
HV Block Description
(Component level repairs) .......................... 95
1. Introduction
Introduction
This training manual covers circuit description and troubleshooting for the direct view HA-3 TV chassis and the
similar projection TV RA-5A chassis. This information is on two levels. The first level covers board replacement.
As you read further, you enter the second level containing the information for component level to repair the board.
When repairing at component level, references are made to the DTV-02 training manual (P/N = DTV021000),
which contains circuitry similar to the HA-3 direct view TV circuitry.
Models Covered
Model numbers related to the HA-3 and RA-5A chassis are listed in Chart 1-1:
Chart 1-1 - Related Model Number
HA-3 Chassis Direct View TV Models RA-5A Chassis Projection TV Models
KD-34XBR2 KDP-57XBR2
KDP-65XBR2
The “D”in the model name refers to the digital decoder box built into the TV that can decode the 18 ATSC digital
TV formats approved for the USA and Canada over the air transmission. ATSC stands for “Advanced Television
Standards Committee”and replaces the 1940 NTSC (National Television Standards Committee) standard. The
above models have a 16 x 9 aspect ratio screen in compliance with most of the ATSC formats.
Chart 1-2 – TV Inputs
Video Off the Air / Cable
Video 1-4 – 480i NTSC format Air – NTSC channels 2-69
Video 5-6 – 480i NTSC format or 480p, 720p, 1080i ATSC format Air – ATSC channels 2-69
Cable – NTSC channels 1-125
Technical Highlights
• There are three microprocessors in the Q box and the TV operations micro is on the B board. They are listed
in Chart 1-3 below:
Chart 1-3 – Microprocessors in the TV
Q box (DTV decoder) B Board AD Board
Digital Processor Main TV Micro Convergence Micro (PJ TV
MPS CPU (i LINK) only)
MID Microprocessor
• The Q box micros talk to the TV micro using separate receive (RXD) and transmit (TXD) lines. The Main TV
Micro talks to the TV ICs using the standard I2C communications format.
• The New white OSD Menu is generated by one of the Q box micros.
• The TV micro generates the service mode OSD and green displays as before but there are two intensities for
the green channel display. When changing channels, the green channel number shows at full intensity for 1.5
seconds then drops in brightness to prevent burning the CRT.
• All the video passes through the Q box. The Q box is exchanged as a package.
• There are self-diagnostics in these TV sets with memory to assist in locating shutdown causes.
• One horizontal high scan frequency of 33.75kHz, yields less geometry/convergence adjustments.
• Geometry / Convergence Adjustments are made in the FULL picture mode and its data is copied into most
other picture modes
1
1. Introduction
• There are three power supplies in each of these TV sets. The primary supply must start before the secondary
supply operates, and the horizontal sweep must be active before the HV power supply becomes active.
• There is no filament preheating from the primary power supply as in the similar Sony  model KV32XBR400
(DX-1A chassis). The CRT filament voltage comes from the HOT.
• There are only a few mechanical adjustments in these TV sets and they are listed in Chart 1-4 below:
Chart 1-4 - Mechanical Adjustments
Direct View TV (HA-3 chassis) Projection TV (RA-5A chassis)
G2 (screen) – C board G2 (screen) controls - chassis
H Static control – C board Static electrical focus - chassis
Static focus on the Flyback - D board Mechanical focus - lenses
HV reg. and shutoff point (2 epoxy sealed controls) – D HV reg. and shutoff point (2 epoxy sealed controls)
board – D board
 Sony and i LINK are registered trademarks of Sony Electronics.
2
2. New Features
New Features
Menu
The video, screen mode and setup menus are new or have changed. The changes to the menu are explained
below:
Video Menu
Refer to Figure 2-1 for a sample of the video menu. Video
Picture Mode Vivid
DRC Mode = Interlaced / Progressive / CineMotion – There are three Picture
choices offered in the DRC mode. The Digital Reality Creation (DRC) Brightness
module within the Q box converts the NTSC input video to a higher reso- Color
lution picture. This is necessary so a standard resolution input can be Hue
presented on this high-scan TV screen. During the conversion, you can Sharpness
instruct the DRC module to output the high-resolution video in one of Color Temperature Cool
three modes: Interlaced, Progressive or CineMotion. VM High
DRC Mode CineMotion
Interlaced picture is for moving images – A single TV frame consists of Alternate Video Alternate 1
two picture fields (see Figure 2-2). Each field contains on half of the
picture and was originally presented this way in the NTSC TV standard
Figure 2-1
to reduce flicker.
Field Field
1 2
"6i" Interlaced Picture consisting of "6p" Progressive

alternating lines from fields 1 & 2 Scan Picture
Figure 2-2 - Interlaced Pix Figure 2-3 - Progressive Pix
Progressive picture is for still pictures – When the TV screen contains pages of still text or a still image, an
interlaced picture appears to jitter. This is because field 2 displays the same picture as field 1, but is positioned
lower. When the fields are displayed one after the other, a still picture appears to jump. The solution is to not
displace these lines (see Figure 2-3). Progressive scan only has one field per picture so a still image does not
jump.
CineMotion is for movies shot at 35mm or wide 70mm – Movie film is NOT shot at the same rate that television
presents a picture. A Telecine Conversion must take place to present the 24 frames/sec of movie film in the 30-
frames/sec (60-fields/sec) TV rate. This conversion is also referred to as 3:2 pulldown because the first frame is
duplicated three times and the second twice (see Figure 2-4) before repeating. The result is that sometimes two
different film picture frames are merged into an interlaced TV frame. As a result, there may not be smooth
movement. Therefore, this Telecine conversion distorts moving TV images.
3
2. New Features
Telecine
A, A, B, B, C, C, D, D, Conversion A, A A, B B, C C, C D, D
4 film frames (24 frames duplicated 1 2 3 4 5

to 48 frames/sec to reduce flicker) Interlaced frame #
Figure 2-4 - CineMotionProblem

+ =
Film Film Distorted TV

frame B frame C frame 3
The distortion is eliminated in this TV’s CineMotion mode by restoring the original film sequence, eliminating the
3:2 pulldown originally used for timing (see Figure 2-5). Each TV frame contains the same picture so the movie
is clearer. The time difference between film and TV video is compensated for by digitally storing and displaying
the movie frames for a longer period.
CineMotion
A, A A, B B, C C, C D, D Mode A, A B, B C, C D, D A, A
1 2 3 4 5 1 2 3 4 5
Interlaced frame # Interlaced frame #
Figure 2-5
CineMotion
Solution
Distorted TV Clear
frame 3 Frame 3
Alternate Video / Audio - Refer to Figure 2-1 for a sample menu page. If this feature in the DTV transmission is
available, the user can select a second video or audio stream for a different camera angle or second language.
Screen Modes Menu Screen Mode

Wide Mode Wide Zoom
Refer to Figure 2-6 for a sample Screen Mode menu. 4:3 Default Off
Wide Mode - you can alter the 4:3 picture you are watching into: Vertical Center
Vertical Size
Wide Zoom – The sides of a 4:3 picture are stretched while the top
and bottom are condensed.
Normal – No change to the 4:3 picture. Figure 2-6 - Screen Mode Menu
Full – The 4:3 picture is just stretched horizontally.

Zoom – The 4:3 picture is enlarged to maintain aspect ratio.
4:3 Default - Allows the TV to enter one of the above Wide Modes when you change stations. If “OFF”is
selected, the 4:3 picture will remain in the size selected by Wide Mode.
4
2. New Features
Setup Menu
Setup
Refer to Figure 2-7 for a sample setup menu page.
Caption Vision Off
Select Out - Selects Monitor for the same screen pix, TV for tuner, or Select Out Monitor
Video 1-4 regardless of what you are watching. Video Input
i Link Setup - Allows you to select a product like a cable box, which is Language
i Link Setup
connected to the rear panel i Link (IEEE1394) jack.
i Link Standby Off
i Link Standby - Allows the TV to remain at a power level between Set Clock/Timers
standby and ON so an i Link device can power this TV ON. Vertical Correction
Tilt Correction
Vertical Correction - Vertical position (centering)
Demo
Factory Reset – Clears all user settings and the active TV channels found Factory Reset
so only channels 2-13 are loaded. The TV shuts off momentarily and
loads the defaults at turn ON. Figure 2-7 - Setup Menu
i LINK 
i Link  and Fire Wire  are trade names for the IEEE-1394 high-speed communications standard that can
support digital video, audio and data. It uses transaction-based packet technology to communicate between
devices. This standard was developed to help bridge the gap between PCs and consumer electronic products.
Compatibility
The purpose of i Link is to transmit and receive high-speed data. The data may include digital audio and video
data as well as communications data in the ideal arrangement. In this early i Link acceptance stage, no digital
video or audio input is possible with this TV. Communications with this TV is limited to operation with the Sony
CableVision cable box currently used in NYC. Therefore, the following information shows how to connect i LINK
devices and what this TV does with an i LINK connected device.
Connection for Speed
The IEEE-1394 allows the data transmission speed to vary between devices, but the proper connection will
improve communications speed. In Figure 2-8, the PC or scanner would have no trouble communicating with the
camcorder at a rate of 100 Mb/s. However, the scanner could not communicate with the PC at its top data rate of
200 Mb/s because the path between the two contains a 100 Mb/s device (the camcorder). The maximum data
rate that can be achieved through another device is limited to the speed of that device.
PC Camcorder Scanner
400Mb/s 100 Mb/s 200 Mb/s
Figure 2-8 - Bandwidth limited by slower device
In Figure 2-9, the PC and the scanner would be able to communicate at the scanner’s top rate of 200 Mb/s. It is
important that when an IEEE-1394 network is set up, that high-speed devices are connected to high-speed
devices and lower speed devices are placed at the end of the chain.
PC Scanner Camcorder
400Mb/s 200 Mb/s 100 Mb/s
Figure 2-9 - Improved Hookup
5
2. New Features
The rear panel i Link connectors on the back of this TV (see Figure 2-10) connect to hardware and software in the
DTV’s “Q box”to identify and react with other i Link devices. The speed of this i Link device is marked next to the
connector as 200 Mb/s.
Digital Audio Found new i Link Device

Optical Output Sony DCR-TRV130
Do you want to add this
device?
i Link Cancel Add

S200
Figure 2-11 - TV screen

after i Link connection
Figure 2-10 - Back panel of TV
Operation
Once another i Link device is connected and turned on, communications occurs. The DTV displays the message
shown in Figure 2-11 at the center of the screen. When you select “Add”, a second message may appear if the
digital inputs formats are compatible. The message will ask you to select the input for this i Link device. After-
wards a momentary message says the setup is now complete. You can now press the i Link button on the front
panel or remote and see the new i Link device listed along with the DTV i Link device itself. Whenever you select
that device from the list, the two will operate together. In this example, the output of Sony camcorders is a digital
DV format. The DTV set is expecting an MPEG digital video format and therefore cannot display the DV format
video on the screen. An analog cable between the two is needed to display the camcorder video as explained in
the owner’s manual. The TV’s video 1 input must then be selected manually to view the camcorder picture.
i Link Circuitry
The i Link circuits and jacks are at the rear of the QI board. The four pins of each i Link jack (CN9203 and
CN9294) are connected to eight individual pins of IC9203 (see Figure 2-12 for the circuitry). The QI circuitry is
provided as reference since both QI and QM boards are replaced as an assembly.
6
2. New Features
IC9206 3.3V
MEM.
IC9201
SYS LED 8 LED's
IC9209
BUS DRIVER
uPD3020D
MIPS CPU
A1-A12,
IC9205 D0- D15
uPD82442GN EMI BUS CN9201
BRIDGE IC XRST CN9201/A13
HB BUS
TEST
27MHz CLK TO
CONN.
27MHz TO: CN9201/B25 CN7002
CN9205 IC9213-5
IC9202, QM BD.
OSC/
RESET IC9203,IC9205, X9203
DIVIDER
CE0 OE IC9210-2,IC9209 49MHz
CE1
TS BUS
IC9210 IC9211 IC9212 IC7205
FLASH FLASH START-UP TS
MEMORY MEMORY MEMORY BUS
IC9202
CXD3203R IC9203
CXD1945R
HB BUS DATA/ iLINK

CLK PORTS
QI BOARD CN9203
CN9204
FIGURE 2-12 - iLINK CIRCUITRY 1TVP12 1319 9/4/01
The microprocessor for the i Link program is IC9209, but the i Link data is stored in upgradable Flash memory
IC9210 and IC9211. IC9205 is an IC that acts as an interface or bridge to another micro IC7205 (not shown) on
the QM board via the EMI bus. This bridge is necessary because the B+ for these two ICs are different so the HB
bus and EMI bus are at different voltage levels. This often occurs in new design to match ICs. Bridge IC9205 also
acts as an expansion IC using SYS bus to perform driver (output) functions such as Output Enable (OE) for start
up data.
IC7205 (not shown) communicates with the main micro (B board) in the TV and contains the i Link OSD graphics
that are routed to OSD IC8801.
The eight LEDs and IC9201 driver are used in i Link software loading verification (not for servicing). The left LED
with the rear of the QI board facing you is the reset LED for the board. It lights up at reset. Reset occurs shortly
at power ON and just before the memory stick information gets processed.
Fire Wire is a trademark of Apple Computer Inc.
i Link is a trademark of Sony.
7
3. DTV Signal Information
DTV Signal Information

Digital TV Transmissions
In addition to receiving the current channel 2-69 NTSC format TV stations and channel 01-125 cable stations,
these TV sets contain an extra tuner to receive off-the-air channel 01-99 Digital stations in the ATSC format. DTV
channels 01-99 are mostly in the UHF band because the channel 2-13 VHF band is currently occupied with
analog NTSC stations.
During this transition period as the USA and Canada move from the current analog NTSC format to the digital
ATSC format, transmitting stations will be sending out both formats on two different channels. Some of the
current DTV transmissions are of low power to lower their operating costs of a second transmitter and the pro-
gramming is duplicated with sporadic HDTV transmissions. By now (2001), all major networks have DTV trans-
missions in the larger cities.
Signal Contents
You can determine the noise level and contents of the DTV signal being received by going to the service mode
and examining the transmitted PSIP information received by the TV’s decoder:
1. Enter the service mode: Using the remote control, press buttons: Display, 5, Volume +, Power On.
2. Select an active DTV station using the channel up/down buttons.
3. Use the 2 (up) or 5 (down) buttons to locate category DTV. DTV 0 0
The WSL indicates signal strength like AGC. 0 = strong and 255 = snow. Info
WSL = 0
4. Use the 3 or 6 buttons to change the data from 0 to 1.
5. Information about the received channel (similar to Figure 3-1) will be added to the screen from the Q box.
Figure 3-1
DTV Signal
Information
Contents of the DTV Signal

The Decoder Status page as pictured in Figure 3-1 reveals that:
• The DTV received channel is UHF channel (Phy Ch) 56, but the channel number displayed on the TV screen
is (Act) 2.1.
• The digital video decoding is (Fmt) MPEG2 and the audio decoding is (Fmt) AC-3.
• Closed caption (CC) levels 1and 2 are being sent
• The transmitted resolution is (Video Src) 1080i in the 16:9 aspect ratio.
• Although the audio decoding requested is AC-3, a 6-channel system, there are only two front channels en-
coded and no (0) rear channels sent (Audio Src: 2 / 0 LR).
8
3. DTV Signal Information
Signal Quality
You can also determine the quality of the received signal while still in the service mode. If the digital signal is
correct, the decoder will process the information and output audio and video in sync. If there are sunspots, rain,
or airplanes for example that can distort the signal the decoder will take longer to try to resolve the errors.
Therefore, the time the signal enters and leaves the decoder will be longer. This delay identifies digital reception
errors.
You can see the audio and video processing time in the service mode. From the service mode, select category
DTV. Use the remote’s number 3 button to change the data from 1 to 3.
The following audio and video data packet processing example shown in Figure 3-2 shows the packet number
going into the TV’s decoder (PTS) and what packet has been successfully processed (PCR). At the right is the
decoder processing time is given in ms. The greater the difference in packet number or processing time in ms,
the poorer the signal quality (since the decoder takes longer to try to resolve digital errors). A large number of
digital errors may be due to sunspots, airplanes, storms or transmission errors. The picture shown in Figure 3-2
is of a good quality signal.
Figure 3-2
Input/Output
Packet data
9
4. HA-3 Chassis Overall Block
HA-3 Chassis Overall Block

The HA-3 TV chassis is the first direct view TV that contains a DTV decoder. This decoder is identified as the “Q”
box and is a shielded assembly within the TV. Currently only the KD-34XBR2 model houses the HA-3 chassis.
The major stages of the model KD-34XBR2 bridge several boards as shown in Figure 4-1. These stages are:
• Power supply (A, D and F boards)
• Video Processing Stage (B board)
• Deflection Stages (described in detail within the DTV-02 training manual) (D board)
SPLITTER/
ISOLATOR
B BD.
MAIN DTV
VIDEO A DRC TUNER
VIDEO IC401 ANALOG
IN SYNC
A/V VIDEO B VIDEO
(U, HB SW. PROCESS SUB
BD.'s)
SYNC MID
TUNER IC001
A MAIN HI
TUNER MICRO H+V
SCAN
B SYNC Q BOX
VIDEO
LOWER YOKE
ANALOG VOLTAGES Q BD. IC3101 IC9001-3
TUNERS RGB
Y/C RGB
CRT RGB DRIVERS
PRIM DRIVE
A BD.
P.S
STANDBY HD VD C BD.
P.S
PRI- IC5004 VD
PRE VD
ON/OFF HV
RY6501 HD
H DRIVE
SEC
P.S
HV/
HIGHER 200V FBK
F BD. D BD.
VOLTAGES
FIGURE 4-1 - HA-3 CHASSIS OVERALL BLOCK 43TVP12 1359 8/30/01

Power Supply
The power supply consists of three parts as shown in Chart 4-1:
Chart 4-1 - Model KD34XBR2 / HA-3 Chassis Power Supplies
Name Board Purpose
Standby F Powers Main Micro IC001 and AC relay. Outputs Standby 7 and 15Vdc
Primary A Outputs 12Vdc and lower voltages to the A, B and S boards. Outputs Pri -Pre 15V to start
the Secondary Power Supply.
Secondary D Supplies the deflection (D) board with the higher voltages such as 200V (HV), 135V (H
Defection), and 24V (audio).
The Primary power supply starts the secondary supply using a Pri-Pre 15V line. Once the Secondary power
supply operates, these voltages supply the deflection circuitry on the D board and the HV starts.
10
4. HA-3 Chassis Overall Block
Video Processing
This TV will accept standard resolution inputs or high-resolution inputs.
Standard Resolution Input – A standard resolution signal could be selected from either analog tuner (NTSC) or
any composite video 1-4 input. However, this high resolution TV runs at a different horizontal frequency of
33.75kHz than what is input. To view a standard NTSC signal (480i) that runs at 15,734 Hz on this TV, the video
signal must be improved and the horizontal sync more than doubled. The improvement is performed in the DRC
circuits and the sync conversion and picture sizing is done in the MID circuitry. Both of these circuits are part of
the Q box.
The Digital Reality Creation (DRC) Circuit analyzes each pixel of a line to add another line. Therefore, the DRC
circuit doubles the number of video lines of a standard NTSC signal. The DRC also doubles the horizontal sync
frequency before passing the signal onto the MID circuit on the same board.
The Multi Image Driver (MID) Circuit stores the lines and outputs the signal based on a new horizontal frequency
that matches the TV. At the higher frequency, the picture finishes before the scan. Blank lines are added as filler
by this MID stage before leaving the board.
The output of the Q box is a “Hi-Scan”(high-resolution) picture with separate H & V sync lines that are applied to
the Y/C CRT Drive IC3101 (A board). IC3101 converts the component video input into RGB for the CRT cathodes
and uses the sync input to lock the 60 Hz vertical oscillator and 33.75kHz horizontal oscillator.
High Resolution Input - Video inputs 5 and 6 are for Y, Pr and Pb component video signal types only. They can be
standard (480i) or high resolution (480p, 720p or 1080i) formats. The standard resolution signal must be switched
into the DRC circuit using the Main path (for up conversion), and the high-resolution signals must be sent into the
MID circuit using the Sub path (for sizing and sync conversion).
The DTV tuner signal is also fed into the MID circuit (Q box). The MID circuit selects one input (or two of the
inputs when in the Twin mode) and outputs a single “Hi Scan”picture with corrected sync to match the 33.75kHz
TV frequency. The component video that outputs the Q box is applied to Y/C CRT Drive IC3101 on the A board.
This IC level shifts (matrixes) the signal into an RGB output signal for each CRT cathode.
Deflection Stages
Chart 4-2 shows the two stages that feed the deflection yoke.
Chart 4-2 – HA-3 Chassis Deflection Stages – D board
Stage Drive Source Power Supply Diagnostic Indication
Vertical Sweep Y/C CRT Drive IC3101 + 15Vdc from the Secondary PS (D Bd) Blinks 4X
Horizontal Scan Y/C CRT Drive IC3101 +135Vdc from the Secondary PS (D Bd) Blinks 2X, 3X, or 7X
Vertical Sweep – Vertical drive signal comes from Y/C CRT Drive IC3101 synced to signal from the MID circuitry
on the QM board (in the Q box).
Horizontal Scan - Y/C CRT Drive IC3101 also develops H drive signal. The H drive is not only used to drive the
yoke, but also starts the HV Regulator stage.
11
5. HA-3 Chassis - Power ON Block
HA-3 Chassis - Power ON Block

Power Supplies
There are four power supplies in the HA-3 direct view TV chassis. These are listed in Chart 5-1 below:
Chart 5-1 - Model KD32XBR2 – HA-3 Chassis Internal Power Supplies
Name Board Start Purpose
Standby F AC Plug in 5V for Main Micro
7V & 15V for power relay
Primary A Power ON (Voltage Unreg 11V, 7V, 5V become
from AC Relay regulated 9V, 5V, 3.3V.
RY6501)
Secondary D Primary Pre 15V, +200V for HV stage, +135V
Main Relay (5V) for H. Output, +15V, +24V
for Audio stage *
HV Converter D Horiz Output AFC- 31.5kV HV for CRT, Focus
(not shown) PLS (5Vp-p) voltage.
* see Chart 5-4 for the destination of output voltages
A BD.
F BD. STBY 7V CN3171/
SOURCE CN6506
IC6002 STBY +5V STBY +5V IC003
C28 RESET
REG
F6701 STBY
6.3A STBY P.S. +15V
5
T6703 AC 32
7 D2007 SOURCE
D6702 RELAY
D2008 C26 69
D6709/ Q2006 IC001
CN6502 S01 A25 44 MAIN MICRO
OVP
FRONT PANEL + M306V2MF
C25 45
PWR (HA BD.) C2039 CN3170/
CN6503 OCP 50 46
1 2 1 3 1 7 8
CN6709/ CN7003/ CN3171/
SET
CN6501 CN6503 CN6506
RY6501 ON Q522 P.ON
AC B+ (HA BD.)
RELAY OVP
Q6527
PROT. D6537 TO STBY
LATCH LED
Q6530
D BD.
D6730 Q6532
B BD.
R5002
PRIM P.S 200V
(A BD.) OCP D6501
SEC P.S
R6526 (D BD.)
B+ OCP
FIGURE 5-1 - POWER ON 1/2 12TVP12 1330 8/30/01
Except for the Standby power supply, the Primary, Secondary and HV Converter supplies are similar. The last
three supplies use the same IC in a similar configuration. They differ in how they are turned ON and their output
voltages.
12
Each power supply is turned ON in the order listed. The standby power supply is operational when the TV is
plugged into AC. When the TV is powered ON, the second and third supplies are turned ON one after the other.
These supplies power the horizontal stages. Finally, the fourth (HV) power supply is turned ON after the horizon-
tal output transformer develops scan (AFC pulses are used). The HV power supply is not shown on Figure 5-1,
but knowing when the HV is powered ON is important for troubleshooting.
Standby Power Supply
When the TV is plugged in, the standby power supply outputs three voltages: +15V, +7V and +5V. A small
transformer develops the +15V and +7V. The +7V is regulated down to +5V to power the Main MicroIC001.
Primary & Secondary Power Supplies
Before power ON can occur, the front panel master ON/OFF button (S01 on the HA board) must be pressed in.
This latching switch behind the button supplies the AC relay (RY6501) with standby 7V. Pressing the switch again
would unlatch the switch and the set would shut OFF.
Power ON can be activated either from the remote control or when the front panel button is latched in. The
second half of front panel switch S01 (not shown) grounds the power ON input to Main Micro IC001. IC001
powers ON the TV by turning on relay driver Q6527. Q6527 grounds one end of RY6501 relay coil and momen-
tarily turns on Q2006 via C2039. Q2006 supplies a higher +15V to AC relay RY6501 because a relay requires
more voltage to close the contacts than to hold them closed, especially if the AC input voltage is below normal at
that time. Once RY6501’s contacts close, D6730 is powered and 340V is applied to the Primary and Secondary
power supplies.
Primary Power Supply
Starting
This primary power supply only needs 340Vdc from the bridge rectifier D6530 to start up and run.
Output Voltages
The Primary Power Supply outputs low voltages labeled “Sub”and “Q”voltages. The Q voltages go to the Q box
and the Sub voltages are distributed to the TV for operation. The Sub and Q voltages may be checked at the
board’s connector as shown in Chart 5-2.
Chart 5-2 – Primary Power Supply Output Voltage Checkpoints
Output Checkpoint Output Checkpoint
Sub 12V CN6002/pin 1 Q6.5V CN6005/pin 1, 2
Sub 9V CN4402/pin 7 or CN3020/pin C4, C5 Q9V CN6005/pin 6
Sub 5V CN3020/pin C6, C7 Q5V CN6005/pin 5
Sub 3.3V CN3020/pin C2, C3
The most important output voltage from the primary power supply is the “Pri Pre 15V”output. This volume
starts the Secondary power supply on the D board.
13
STBY STBY
5V Q522 LED
IC001
50 (FRONT
MAIN MICRO
PANEL)
M306V2MF
46 POWER ON
D BD.
69 72 45 44 (HA BD.) B BD.
R017 R018
STBY 7V
100 100
FROM PW
C26 A26 C25 A25
SW.S01 SUB 12V
(HA BD.) AC B+ OVP A BD. REGULATORS
MAIN IC6008 Q9V
RELAY
SW.
11V IC6007 SUB 9V
RY 6501
AC RELAY IC6001 7V IC6006 SUB 5V
Q6527
1
PRIMARY IC6005 SUB 3.3V
Q3170-
POWER SUPPLY
Q3172 IC6004 Q5V
2
LATCH Q6.5V
AC FROM Q6530 CN6504/
CN6502/ Q6522 CN3170 R6039
CN6709 LATCH R5002 R6043
(F BD.) CN3171/ 0.1?
CN6506 7 8 5 1
B+ OVP 200V
OCP MAIN RELAY B+ OVP B+ OCP PRI CN6003/
B+ OCP
D6530 PRE CN6501
IC6501 15V
200V OCP
SECONDARY Q8009
+200V
POWER SUPPLY
B+ OVP
Q6520- SOURCE
Q6524 B+ OCP D BD.
R6526 135V
O.1? +15V
-
+24V
FIGURE 5-2 - DIAGRAM 13 - POWER ON 2/2 13TVP12 1331 8/30/01
Secondary Power Supply

Starting
The Secondary Power Supply needs three items to operate. They are listed in Chart 5-3 below:
Chart 5-3 - Three voltages needed to run the Secondary Power Supply
Item From Purpose
1. 340Vdc (B+) Bridge Rectifier D6530 Powers the Driver/Output
2. Pri Pre 15V Primary Power Supply’s Starts the oscillator when
voltage secondary winding above 15.6Vdc.
3. Main Relay Main Micro IC001 Enables IC6501 when
(normally HIGH) HIGH
14
Output Voltages
This secondary power supply produces the remainder of the low voltages to power the TV. These are listed in
Chart 5-4.
Chart 5-4 - Secondary Power Supply Load
Output Protected Destination
200V Yes OCP D Board - HV Converter power supply
135V Yes. OVP, OCP D board - Horizontal stages
Sample voltage returned for regulation
+24V No D board - Makes Main 12, Main 9 and
Main 5V used throughout the D board *
+15V No A board - Audio output stage
* see Chart 5-1 for source of voltages
TV Power ON Sequence
1. Press the PWR ON button;
2. AC Relay energizes (RY6501);
3. Primary Power Supply starts (Q box is powered, Surge relay is energized);
4. Main Micro (B board) resets Q box (The Q box has flash memories for self initialization);
5. Q box acknowledges after initializing (TXD and RXD communications. See appendix);
6. Main Micro (B board) starts the Secondary Power Supply (Deflection and TV filaments start). The Secondary
power supply is started 100msec after power ON and independent of the Q box acknowledgment (step 5);
7. Main Micro (B board) retrieves information from the NVM ICs on the B communications bus and sends the
data to the appropriate TV operating ICs using the S communications bus;
8. HV starts after horizontal deflection operates (D board);
9. Shutdown circuitry is enabled (B board); and
10. IK circuitry (A board) adjusts the gain of the RGB amplifiers and unmutes the RGB signal to the CRT.
15
6. Primary Power Supply - HA-3 & RA-5a Chassis
Primary Power Supply (HA-3 & RA-5A Chassis)

The Primary and Secondary power supplies are similar in operation. They differ in schematic nomenclature
(component numbers) and output voltages. The HA-3 simplified secondary power supply is shown in Figure 6-1
for this description.
The primary power supply on the HA-3 chassis A board consists of three parts:
1. Oscillator 2. Output stage 3. Regulator Stage
The oscillator starts up to produce an initial signal for the output stage. The output stage develops voltage to
continue running the oscillator stage, supply the regulating stage, and provide normal output for the TV. One of
the normal TV outputs is used to start the secondary power supply.
D6018
T6002
A BD.
UNREG.
7V SOURCE
R6002
AC RECT.+ 0.47 OHMS
FROM 340VDC D6014
IC6501/1
UNREG. 11V
(D BD.) R6010
R6001 SOURCE
18 PRI
R6003 VD Q6002 PRE 15V (D
-32V N BD.)
VG(H) 16 R6023 D6012
CH
R6004 V
-32V R6020 D6011
SENSE VS 15
1 IC6001
3V DRIVER Q6001
R6006 MCZ3001D 4.5V N
VG(L)12 CH
D6016
TIMER OCP R6009 C6014 Q +6.5V

OV
9 SOURCE
VC1 VC2 VB F/B
6 8 10 14 2
R6018 R6019
+ 10V -28V 1.86V R6041
C6007 1
D6004 PH6001 IC6003 R6045
+ OPTICAL ERROR DET.
2 3 1
ISOLATOR uPC1093C
C6009
18V R6040
FIGURE 6-1 - PRIMARY POWER SUPPLY - HA-3 CHASSIS 23TVP12 1341 8/30/01
Oscillator Start Up
The oscillator within IC6001 starts if the V Sense input voltage at pin 1 is above 1.3Vdc, but less than 8Vdc.
Sample voltage from pin 18 is then used to run the internal oscillator. The initial frequency is approximately
200kHz. The low amplitude initial oscillator signal is output IC6001/pins 12 and 16 into the driver/output stage.
Driver / Output stage
The oscillator voltage output at pins 12 and 16 use drivers Q6001 and Q6002 to develop T6002 secondary
voltages. IC6001’s oscillator will shut down if the driver transistor’s current is excessive. To prevent premature
shutdown, the timer capacitor C6007 delays the shutdown.
16
VC1 Powers IC6001
Although the oscillator is running, at this initial frequency of 200kHz there is insufficient current from T6002 to
produce any unregulated 7V or 11V voltage because of the load. On the other hand, there is very little load on
D6011 and D6012, so they output about 15V each at the cathodes (normally about 18Vdc).
The voltage from D6011 is returned to IC6001/pin 8 (VC1) to serve as regulated B+ for the IC.
IC6001 Normal Operation
At start up, IC6001 initially uses current limited B+ from pin 18 to power internal drivers. These internal drivers
amplify the oscillator signal and get it out to pins 12 and 16. The power for the internal drivers initially come from
pin 18, but ultimately comes from pins 10 (VC2) and 14 (VB) when the power supply stage begins working. VC2
provides the voltage for the bottom driver (pin 12) while VB provides the voltage for the top driver (pin 16).
The VC2 voltage comes from the 18Vdc input VC1 (pin 8) that is internally regulated to 10Vdc. The 10Vdc from
VC2 is used to make VB voltage at pin 14. Because there is a square wave at pin 14 (internally from pin 15),
D6004 and C6009 are necessary to keep the DC voltage at pin 10 and the signal at pin 14 separate. D6004
brings +10V from pin 10 into VB pin 14 to power the top internal driver (pin 16).
The reason VB pin 14 measures –28 is because pin 14 starts at the same voltage as pin 15 (-32Vdc), but +10Vdc
is added from D6004. That brings the –32Vdc (+10V =) to -22. Because there is a 50% duty cycle square wave
at pin 14, the voltmeter averages the increase so only half of +10V is measured, producing approximately –32
+5V = -28V at VB pin 14.
The result is a VB voltage that is approximately +5V (average) above the reference voltage at IC6001/pin 15.
This voltage supplies the top internal driver that amplifies the oscillator signal that leaves IC6001/pin 16.
Secondary Power Supply Starting
The Pri Pre 15V output of the primary power supply (D6012) is used to enable the secondary power supply. At
start up, the primary oscillator frequency is HIGH so low secondary voltages are output. Pri Pre 15V is only 10Vdc
at start up but rises to a normal 18Vdc. When it rises to 15.6Vdc, the Secondary Power Supply can start.
Therefore, the Secondary Supply cannot start until the Primary Supply is running normally.
Regulator Stage
Concept
By controlling the frequency of the power supply oscillator, T6002’s secondary output voltage can be regulated.
T6002’s secondary output voltages are dependent upon the match between the output resonate circuit (T6002 =
L, C6019 = C) and the oscillator frequency. When IC6001’s oscillator frequency is the same as the resonate
circuit frequency, there is maximum power transferred in T6002, producing maximum output voltage. By setting
the oscillator frequency above resonance, T6002’s output voltage can be regulated. See Figure 6-2 for the power
output of power transformer T6002.
T6002 85kHz = Normal Operation
Figure 6-2 – Output 200kHz @ Start Up
T6002 Output
Frequency
Output Voltage Control
The regulating stage uses error detector IC6003 and optical isolator PH6001 to monitor the Q+6.5V output from
T6002. If the Q+6.5Voutput is LOW, as it is at initial start up (Chart 6-1), the voltage fed back to IC6001/pin 2
goes HIGH, decreasing the oscillator frequency. The decrease in frequency increases the output of the T6002
transformer, until +6.5Vdc is reached.
Chart 6-1 - Regulation Stage – Error Correction Voltages
Q+6.5V Output (D6016) PH6001/pin 2 IC6001/pin 2
Low High High
17
In the following Waveform 6-1, both drive outputs from IC6001/pins 12 and 16 are shown (channels 1 and 2). The
outputs are complementary, the duty cycle is 50% and the frequency has dropped down from 200kHz to 85kHz
during normal operation. When the top Driver (Q6002) is ON, the bottom Driver (Q6001) is OFF.
PM3394, FLUKE & PHILIPS
ch1: pkpk= 325 V

c h 1 : freq= 84.8kHz
Ch 1
T
Ch 2
2
CH1! 100 V=
CH2!5.00 V= MTB2.00us- 1.18dv ch1-
Waveform 6-1 - Primary PS Oscillator - Normal operation - 85kHz

Channel Name Location Voltage
1 Top Driver Output Q6002/gate 340Vp-p
2 Bottom Driver Out Q6001/gate 12Vp-p (4.6Vdc)
Time base = 2usec/div.
Testing
Chart 6-2 shows what is necessary to start and run the primary power supply and Chart 6-3 lists the voltages
of the power supply’s IC6001.
Chart 6-2 - Checks for Primary power supply operation

Check Point Normal Description
1. R6006 (Fusible) 340Vdc P.S. Input voltage
2. CN6005/ pin 5 >+15.6Vdc Pri-Pre 15V. Checks P.S. Output
3. IC6001/ pin 2 1.9Vdc Feedback Voltage. Troubleshooting - If step 2 voltage is low,
(Feedback voltage) measure IC6001/pin 2. If pin 2 is High (4V) - problem is
around IC6001. If pin 2 is Low (0-1V), problem is the
feedback path IC6003, PH6001.
4. IC6001 voltages. See chart 6-3.
Chart 6-3 - IC6001 Voltages (Power ON, Video 1 input, Dark screen)
1. 2. 3. 4. 5. 6. 7. 8. 9.
3.0V 1.8V 2.2V 2.5V 0V 0V 4.5V 18.4V 0V
10. 11. 12. 13. 14. 15. 16. 17. 18.
10V 0V 4.5V -0.2V -28V -32V -32V -0.3V 313V
Hot ground is at CN6501/pin 6 (black wire).
18
Chart 6-4 - IC6001 (MCZ3001D) Pin Description
Pin - Description Pin - Description
Name Name
1 - Sense ON/OFF input for the IC. IC ON = 1.5- 8 – VC1 Power for IC. Input voltage limits = 15.6V
7Vdc. – 33V
2 – F/B Feedback control voltage for regulation. 9 - OCP When input voltage reaches 0.2Vdc, the
Needs bias current feed of 80uA min. IC momentarily enters high freq, low
Open circuit triggers IC shutdown. voltage output. Max = 5Vdc
3 - Ct Determines Oscillator minimum freq 10 – VC2 10.5dc Output (regulated from VC1) & low
driver (pin 12) pwr.
4 – Rt Determines Oscillator minimum freq 14 - VB 10.5dc Input for high driver (pin 16).
6 - Timer External cap sets delay time to enter high 15 - VS Reference for high side driver.
freq, low voltage output (protect state).
After four entry’s, the osc stops but can
be reset by removing Vcc (pin 8) voltage.
7 - SS External cap determines initial start freq. 18 - VD Start up voltage for VC1, low & high
(200kHz in this TV). drivers internal to the IC. Max =
600V/12ma
Protection
See Chart 6-5 below. IC6001 stops operating and enters a protective stage when:
Chart 6-5 - IC6001 enters a protective state

Protection Cause Location Normal Trip
1. Input V Sense input voltage too high IC6001/pin 1 3V 8.3V
2. Primary PS Output too high IC6001/pin 8 (VC1) 15Vdc 33Vdc
3. No regulation feedback (error voltage) * IC6001/pin 2 1.86Vdc 0V (open)
4. Excessive Driver current(Q6001,2) IC6001/pin 9 0Vdc +0.2Vdc
5. IC temperature Diode Internal to IC6001 ? 155 C
* IC Output does not stop. Oscillator output changes from continuous normal operation to output bursts
RESET IC6001 = Unplug the AC line cord, (or shut off the TV if you can determine that) and wait 10 seconds.
19
7. Secondary Power Supply HA-3 & RA-5A Chassis
Secondary Power Supply (HA-3 & RA-5A Chassis)

The Primary and Secondary power supplies are similar in operation and circuitry using the same IC and driver/
output stage. They differ in schematic nomenclature and output voltages. The HA-3 simplified secondary power
supply shown in diagram 24 contains the RA-5A chassis nomenclature in parentheses.
340V FROM
PRIMARY P.S.
BRIDGE RECT. R6526(R6041)
D6530 OUTPUT
(D6001) R6646 MOSFET HA-3 RA5A
PRI PRE 15V N/C
Q6531 R6513 (R6015) Q6506-7 +
(Q6104)
(STBY 15V)
(R6013) 18 (Q6006-7) - 15V +- 15V
+24V +22V
MAIN RELAY R6557 Q6503 16 T6501 +200V
CN6504/2 N (R6074) (Q6003) (T6001)
(CN6101/6) 1 12 PIT
Q6528
2 N OFF
(Q6001) R6517 +135V +135V
5V 1 (R6017)
PH6503, 3 N IC6501, 1
STBY (PH6003) ON (IC6001) IC503
ISOLATE RA-5A ONLY DRIVER (IC6101)
SURGE RELAY 4 MCX CONTROL
STBY
CIRCUIT D6532 R6018 33001D 4
5V
PH6501 (D6002, Q6526, Q6529,
PH6001) (Q6004-5)
LATCH R6533
PRI PRE 15V HA-3 ONLY 1.8V PH6502
CN6501/5 8 VC1 2 (PH6002)
(D6049/C) 18V ISOLATE
FIGURE 7-1 - SECONDARY P.S. HA-3 (RA-5A) CHASSIS 24TVP12 1371 8/30/01
Start UP
Although IC6501 is identical to IC6001 found in the Primary power supply, IC6501/pin 18 in this supply is not
connected to 340Vdc. This means the VC1 voltage at pin 8 must be input externally to this stage to start IC6501’s
oscillator (during or after V sense at pin 1 senses voltage). Refer to Figure 7-1 as you follow the following
Secondary Power Supply start up sequence:
1. 340Vdc (B+) is applied to this stage from bridge rectifier D6530.
2. Pri Pre 15V voltage from the Primary power supply is applied to IC6501/pin 8. It must be at least 15.6Vdc to
enable IC6501’s internal oscillator.
3. Main Relay signal from Main Micro IC001/pin 72 (HIGH at CN6501/pin 5) turns ON Q6531, PH6503 and
Q6528. Q6528 turns OFF Q6503, enabling voltage to appear at IC6504/pin 2.
4. Voltage divider R6646, R6513, and R6517 deliver at least 1.3Vdc to IC6501/pin 1.
5. IC6501 turns ON using voltage from pin 8 to run the oscillator.
6. An internal diode connected between pin 8 and 10 supplies voltage to VC2.
7. Oscillator signal outputs IC6501/pins 12 and 16.
Testing for NO Start

If the secondary power supply does not start, use Chart 7-1 to determine if an input to the D or G board is missing:
Refer to Figure 7-2 for the checkpoint locations on the boards.
20
7. Secondary Power Supply - HA-3 & RA-5A Chassis
Chart 7-1 - Items Needed to Start the Secondary Power Supply
Item Checkpoint (use Hot Gnd except noted) From Purpose
HA-3 Direct View RA-5A PJ TV
340Vdc (B+) D board G board Bridge Rectifier D6530 Powers the Driver/Output
CN6501/pin 1 / Fusible R6041
Fusible R6526
Pri Pre 15V D board G board Primary Power Supply Starts the oscillator when
voltage CN6501/pin 5 IC6001/pin 8 secondary – Pri Pre more than 15.6Vdc.
Main Relay D board G board Main Micro IC001 (B Enables Sec PS Osc
voltage CN6504/pin 2 = CN6101/pin 6 = board) IC6501 when HIGH
4.9Vdc (cold Gnd) 5V (cold Gnd)
Surge Relay D board G board Primary Power Supply Stop the secondary PS if
PH6503/pin 4 = PH6003/pin 4 = secondary -Sub 7V or the Surge Relay does not
6.3Vdc 4.5Vdc Sub 6.5V close after power ON.
4
PH6503 3
CN6501/6
CN6501/6 PH6003
Hot GND CN6504/1
34
IC6001
FBT
AC in
R6041
HA-3 Chassis - D Board Figure 7-2 RA-5A Chassis - G Board
Checkpoint
Locations
Regulation
The +135V line to the Horizontal Output stage is fed back to IC6501 for regulation of the secondary power supply.
Error Control IC6503 and Optical Isolator PH6502 control regulation. If the +135V output rises, the voltage at
IC6501/pin 2 lowers to correct. A reduced voltage increases the oscillator frequency and decreases the output
voltages of T6501.
Testing for Low B+ or Shutdown

The typical error correction feedback voltage at IC6501/pin 2 is 2Vdc. By verifying the +135V B+ at R6598 and
measuring the feedback at IC6501/pin 2, you can determine if the problem is in the basic oscillator stage or in the
error regulator stage. See Chart 7-2, Chart 7-3 and Chart 7-4 on the following page:
21
7. Secondary Power Supply HA-3 & RA-5A Chassis
Chart 7-2 - Follow procedure 1-3 to locate PS Shutdown problem
1. Measure B+ at R6598 2. Measure 3. Problem area
(0.27 ohms fusible at 1W) IC6501/pin 2 Voltage
B+ is LOW or 0V Higher than 2V Oscillator stage IC6501
Lower than 2Vdc Error regulating stage
IC6503/PH6502
B+ is HIGH (shutdown – Higher than 2V Error regulating stage
Stby light blinks 3 times) IC6503/PH6502
Lower than 2Vdc Oscillator/Driver Stage
IC6501
Chart 7-3 - IC6501 Typical Voltages (Power ON, Video 1 input, Dark screen)
1. 2. 3. 4. 5. 6. 7. 8. 9.
2.5V 1.8V 2.2V 2.5V 0V 0V 4.0V 18.3V 0V
10. 11. 12. 13. 14. 15. 16. 17. 18.
10V 0V 4.7V 0V -15V -19V -19V 0V 1.5V
Use the Hot ground shown in figure 1 at CN6501/pin 6 (black wire).
Chart 7-4 - Checking the Primary PS Output

HA-3 Chassis RA-5A Chassis
Voltage Checkpoint Voltage Checkpoint
+15V 15V Bridge Rectifier D6514 +15V CN6106/pins 7 & 9
+24V CN6503/pin 7 or 8 +22V CN6106/pins 4 & 6
+135V CN5509/pin 9 +135V CN6106/pin 1
+200V Fusible R8051 or Q8014/D
UseUse
ColdCold Ground
Ground suchsuch as the
as the tuner
tuner or FBT
or FBT shield.
shield. HeatHeat sinks
sinks are are not reliable
not reliable ground
ground points.
CN5509/1
CN6503/1
+ CN6101/1
D6515
R8051
Q8014 IC6501
IC6001
FBT
AC in R6041
HA-3 Chassis - D Board RA-5A Chassis - G Board

Figure 7-3
Voltage Checkpoint
Locations
22
8. Protection Block (HA-3 Chassis)
Protection Block (HA-3 Chassis)

Refer to Figure 8-1 for the following overview of the protection circuits. When a failure occurs, this TV will protect
the remainder of its circuitry in one of the following ways:
• TV shutdown (AC relay is turned off);
• TV Latched OFF (AC relay is held off); or
• A dark picture (no RGB signal to the CRT cathodes).
When Main Micro IC001 places the TV in a protective state, IC001 also indicates the cause by blinking the
Standby LED a number of times, pauses, and then repeats the same count.
NUMBER OF TIMES
THE STANDBY IC001 MAIN MICRO STANDBY LED
X LIGHT BLINKS
D BD. S B BD.
OVP OCP
+135V CN001/ DATA SCLK
3X CN3020
0X OVP A25 C25 C24 C26 B19 A20
EXCESS CN002/
C BD.
HV 7 CN3022
2X OVP
IK 5X
0X Q6.5V 8
+135V PULSES
OCP OCP/ CN3101/
ABL
OVP IC3101 CN9001
Q8008
OCP 6X Y/C CRT
8 7 V LOSS 4X
DRIVE
0X
CN6506/
+200V POWER OFF CN3171 8
+135V
OCP LATCH 0X CN3103/ OCP 7X
CN6504/ AC CN5505 (H.OUT)
AC RELAY CN3170 RELAY
POWER 1 A BD. D BD.
ON/OFF
FIGURE 8-1 - PROTECTION BLOCK 20TVP12 1338 9/4/01
There are seven protected areas summarized in Chart 8-1. Chart 1 also lists the signal that triggered the protec-
tion. If no signal triggered the protection, suspect Micro IC001 on the B board and the latch transistors (Q6522/
Q6530) on the D board of causing the TV shutdown. Figure 8-2 shows the location of Chart 8-1’s protection
signal checkpoints.
23
Chart 8-1 - Shutdown Causes

Stby Protected areas Bd Check Normal Front of TV
CN6506
LED Point Ck Pt
Blinks voltage CN6504
D Board
0X +200V OCP D Q8009/C 0.1Vdc
(HV) / Over HV
2X +135V OCP D CN6506/ 0V 8 CN6506
pin 8
3X +135V OVP D CN6506/ 0.1V CN5503
pin 7 Q8009
4X V Out D CN5505/ 0.78V 10
Loss pin 7 CN5505
5 X (pix IK balance C/A C Bd – 3 FBT
blanked /G2 CN9001/ pulses CN5501
1
- TV adj pin 8 in
remains vertical Pin 1 of each connector
Figure 8-2
begins at this end
ON) interval.
6X Q6.5V OVP & A D6021/ 0Vdc
OCP cathode
7X H Out OCP D CN5505/ 0V
pin 8
Protection Circuits
After the TV enters a protective state, the standby light blinks to identify one of seven problem sections. Each
section consists of not only the protected circuit (load) but also the sensing circuit that monitors the fault. A
description these seven sections consist of the sensing circuit itself so you know how the load is being protected
and a test for the load.
Standby light blinks 0 times – TV Shutdown
Refer to Figure 8-3 for the circuit description and Flow Charts A and B (Figures 8-4 and 8-5) for the testing
procedure.
Circuit – When the TV shuts down and the Standby light will not indicate the trouble area, five circuits are suspect:
• 200V OCP (HV Over current protection)
• ABL voltage too LOW (Video Output Failure)
• Excessive HV
• Surge Relay did not energize
• Shutdown Latch Circuit failure
1. 200V OCP - R8043 and Q8009 monitor the current on the +200 volt line. This 200-volt line supplies the High
Voltage Converter stage, which feeds the flyback transformer. The flyback generates HV, focus voltage and ABL
voltage. A short in the flyback or excessive high voltage will demand sufficient current to shut down the TV. When
the voltage across R8043 reaches 1.2Vdc, Q8009 outputs a HIGH that passes through D8003 to trigger the latch
formed by Q6530/Q6532. The latch grounds the voltage required to sustain relay driver Q6527 and the TV shuts
off. Since there is no connection to the Main Micro IC001, the standby LED will not indicate this failure.
2. ABL voltage - The ABL voltage from the flyback T8001 at pin 1 is monitored by IC8001. As the CRT draws more
current from the flyback’s HV output, the ABL voltage reduces. If this voltage drops to 0Vdc, IC8001 outputs a
HIGH for as long as the TV is powered ON. The HIGH passes through D8027 to trigger the Q6530/Q6532 latch
that finally shuts off the TV set.
3. Excessive HV - To shut down the TV when there is excessive HV, a winding of the FBT produces a voltage
proportional to the HV. This secondary AC voltage is rectified by D8014 and applied to protection latch IC8001.
24
When D8014’s voltage reaches a critical level, IC8001 outputs a HIGH for as long as the TV is powered ON. The
HIGH passes through D8027 to trigger the Q6530/Q6532 latch that finally shuts off the TV set.
4. Surge Relay - If the secondary power supply (IC6501) came on but shut down in six seconds, it would seem as
though the TV’s AC relay had shut off the TV except that the AC relay remains energized.
This unlikely problem could happen if the primary power supply (IC6001 – A board) did not produce the 7Vdc
output used to energize the surge relay RY6502 or its contacts did not short out R6516. If the surge relay did not
energize after the TV was turned ON, C6595 would continue to charge. When this voltage reaches 0.6Vdc, latch
Q6526 and Q6529 would turn ON. This grounds the V sense voltage input to IC6501/pin 1, shutting down the
secondary power supply.
5. Shutdown Latch – Finally, an unstable standby voltage or a defect in the basic latch circuit (Q6530 and Q6532)
will also cause the TV to shut down without the standby light blinking. This last problem is rare.
PRIMARY P.S (A BD.)

AC D6530 R6526
RELAY IC6501
R8043 200V
Q6501 R6516 R6513-14 SEC P.S
TO H.V.
R6646 Q6506-7
AC CONV.
T6501
FROM UNREG 7V
F BD. FROM PRIM
SURGE V SENSE
P.S (A BD.)
RELAY
RY6502, R6527 LATCH Q8009
PH503 Q6526, Q6529, OCP
C6595 + Q6528,
Q6527
100 Q6503
RELAY AC RELAY
DRIVER FROM IC001-
MAIN MICRO (A D8003
FROM
LATCH BD.) FBT
Q6530, T8001
Q6532 D8027 D8014 EXCESS
HV (FBT
IC8001
VOLT.)
PROT.
D BD. LATCH ABL (FBT
CURRENT)
FIGURE 8-3 - SHUTDOWN - NO INDICATION 15TVP12 1333 9/4/01
Testing – If the TV relays turn ON but quickly turn back off with no standby light indication, use these flow charts
to determine which one of the five circuits is causing the shutdown:
25
TV SHUTS OFF WITHIN 6 SECONDS OF POWER ON

NO STANDBY LED DIAGNOSTIC INDICATION
The following test for the video output ICs is

With the TV OFF, unplug the C
quick, but dangerous to the technician. In the Check Video Output
board from the CRT. Also unplug
next box, you will unplug the TV, then unplug IC9001-3 (C Bd) for
the 200V supply to this board by Yes
the C board from the CRT. You must keep shorts and Y/C CRT
removing CN9002. Insulate the
away from the CRT pins, especially at TV Drive IC3101 for
board, keep away from the CRT
turn ON and OFF. The exposed CRT pins constant 9V high at R,
pins and turn ON the TV. Does
will have 37kV on them in this test. Plug G, or B output (A Bd)
the TV stay ON?
the C board back only when the TV is OFF.
No
PH6503/pin 3
Front of TV
Remove the fusible R8051
D Board CN6503 (D Bd) to stop B+ to HV
converter stage. Turn ON Yes Problem is in the
CN6505 the TV. Does the TV stay HV converter
ON? stage (D Bd.)
CN6504
No
8 CN6506
R8051 Q8009 CN6503 The problem is in the: Go to

Primary PS (A Bd), Flow Chart B
10 Surge Relay circuit ( D Bd.), or
CN6505
FBT Latch circuit (D Bd.)
1 CN6501
1
Pin 1 of each connector
begins at this end.
FIGURE 8-4 - FLOW CHART A 25TVP12 8/30/01
TV SHUTS OFF WITHIN 6 SECONDS OF POWER ON

NO STANDBY LED DIAGNOSTIC INDICATION
PRESS 7VDC AT NO TROUBLESHOOT A BD.'s

POWER ON CN4403/2-(A BD.)
PRIMARY POWER SUPPLY
BUTTON (CN6503/2-D BD.)
(IC6001)
YES (MOMENTARY)
REPLACE
200V AT SURGE
NO LESS THAN 3VDC NO
Q8009/BASE & EMITTER RELAY
AT PH6503/PIN 3
(D BD.)AFTER RY6502
(D BD.) AT POWER ON
PRESSING POWER ON? AND
PH6503 (D BD.)
YES
YES (MOMENTARY)
LATCH Q6503
LESS THAN 0.3V AT NO Q6526,Q6528-9
Q8009/C ARE
(D BD.) AT POWER ON? HV SUSPECT (D BD.)
CONVERTER
IS DEFECTIVE
YES
(D BD.)
ABNORMAL FBT
MORE THAN 5VDC
NO ABL VOLTAGE
(ABL VOLTAGE)
CHECK FOR
AT FBT T8001/PIN 1
SHORTED VIDEO
AT POWER ON?
OUTPUT IC's OR
SHORTED FBT,
YES EXCESS HV
LATCH CIRCUIT DEFECT
AT Q6530,Q6532 (D BD.)
FIGURE 8-5 - FLOW CHART B 22TVP12 1340 9/4/01
26
Standby light blinks two times – TV Shutdown
There are two +135V OCP monitoring circuits. The first circuit will cause the Standby light to blink two times and
the second will cause the light to blink seven times. Both sensing and output circuits are on the D board but the
indicating circuit is on the B board.
Circuit - Refer to Figure 8-6 for the following circuit and testing procedure. The sensing circuit consists of R6598,
R6591, Q6520, Q6521 and Q6524. It monitors the current on the +135V line from the Secondary Power Supply.
The +135 volt line supply the following loads:
• Velocity modulation (V) board
• Horiz Output (Q5030) and PWM (Q5003) stage (D board)
STBY
• The HOT supplies +200V to the RGB Output ICs (C board). IC001 LED
MAIN MICRO
AC RELAY
M306V2MF
45 44
Q6527
(D BD.)
R018
B BD.
CN6504/
IC6501 CN3170
A26 A25 C25
MAIN RELAY
SECONDARY 2 CN001/
P.S, R5013 2.2 OHMS 5V CN3020
Q6506-7
T6501 D6513 R6598 135V TO
H.DRIVE
H.OUT
R6526 PRI PRE 15V OCP Q6520 OVP OCP
FROM Q6521
PRIM P.S. Q6524
D6530
(A BD.)
120V AC RELAY R6593 LATCH
AC RY6501 Q3170-3
IC6505
OVP-140V,
Q6527 Q6522
AC RELAY
IC001-
CN6506/
MICRO
D6537 CN3171
(A BD.) 0V
LATCH 7
Q6530,
0V
Q6532 8
D6501 D BD. A BD.
FIGURE 8-6 - SHUTDOWN - 2X, 3X, INDICATION 16TVP12 1334 9/4/01
Testing – You can test the sensing circuit by removing R5013 (disconnects the load) and power up the TV to see
if the standby LED blinks 2X. Since the sensing circuit has a low failure rate, the TV will usually stop the 2X
blinking, indicating the load is at fault. The +135Vdc load goes to the H. Output/PWM stage on the same D board
and the velocity modulation coils on the V board.
To locate the problem, monitor CN6506/pin 8 as you power ON. The normal voltage here is 0Vdc. If the voltage
reaches 1.2V, disconnect the V board and try again. If the CN6506/pin 8 voltage still rises to 1.2V, test the H
Driver transistor Q5028, H Output transistor Q5030 and PWM transistors (Q5003, Q5011) or replace the entire D
board.
The circuit description and simplified schematic of this PWM-H Output section is in the DTV-02 training manual
on page 37.
27
Standby light blinks three times – TV Shutdown

Circuit – Referring to Figure 8-6, the maximum voltage the +135V line can rise to from the D board is +140V
before the TV is shut down. IC6505 and Q6522 sense the danger and apply a voltage through D6537 when this
limit is reached. This voltage triggers latch Q6530/Q6532 that shuts off the TV (RY6501 = OFF).
Testing - To verify the trip condition, on the D board, monitor CN6506/pin 7. If this voltage rises above 0.6Vdc, the
problem is on the D board, either in the sensing circuit (IC6505/Q6522) or the secondary power supply (IC6501).
To determine if the problem is in the sensing circuit or the secondary power supply you will need a peak reading
DVM. Monitor the +135Vdc at CN5509/pin 9 (D Bd). Note the reading at power ON. If this voltage is too high, go
to the regulating circuit that is found in the Secondary Power Supply chapter of this book. Suspect the Control
IC6503 and perhaps static/lightning damage to PH6502. If the voltage peaks at a normal 135Vdc, the problem is
in the IC6505/Q6522 sensing circuit.
Standby light blinks four times – TV Shutdown

Refer to Figure 8-7 for this circuit and testing.
Circuit - A vertical failure because of the output IC or secondary power supply (both on the D board) will cause the
Y/C Jungle, CRT Drive IC3101 (A board) to send emergency serial data to Main Micro IC001 (B board). IC001
turns the TV OFF by dropping the AC relay drive voltage (IC001/pin 69 goes LOW).
Testing - At power on verify +15v and -15V to the vertical output, IC5004/pins 2 and 4, before you suspect the
vertical IC5004 itself or discontinuity in the vertical deflection yoke path (plug/socket).
B BD. A BD.
STBY LED
50
S DATA
31 B19 25 V PROTECT
IC001 IC3101 35
R055
MAIN MICRO Y/C CRT DRIVE
R069 CXA2150AQ
M306V2MF 26 A20 24
S CLK CN002/ 52 53 1Vp-p
61
CN3022 CN3103/
+ - V DRIVE CN5505
3 4 7
AC RELAY CN3174/
(B BD.) CN5503 R5599
R5046 10k
1 7 1.8?
FROM +15V 2
IC5004 V
SEC P.S V OUT DY
(D BD.) -15V 4 STR9372
5
D BD.
FIGURE 7-7 - SHUTDOWN - 4X INDICATION 17TVP12 1335 9/6/01
28
Standby light blinks five times – Picture Blanked (dark), sound OK.
Circuit - Three IK pulses are measured by Y/C, CRT Drive as they return to IC201/pin 58. Each pulse corre-
sponds to the efficiency of each CRT cathode and is used to adjust the RGB gain within IC3101 to maintain color
balance while the TV is operating (dynamic adjustment). The IK signals originate from IC3101 in as three bright
lines in the vertical-blanking interval at lines 19-21. As the picture tube ages, the IK signals may fall below the
threshold for automatic balance adjustment causing IC3101 to mute/blank the substandard picture. Although the
picture is blanked, the IK pulses still output IC3101 and the three return IK pulses to IC3101/pin 58 are still
operational as long as the TV is ON.
Testing - Increase the G2 control on the CRT’s C board. If that does not return cathode current to within operating
range so the picture appears, examine each filament to see if it is lit.
The next step uses your scope to determine if there is drive signal to each CRT cathode. Begin by looking for a
positive pulse at CN9001/pins 1, 3 and 5 as it enters the C board. Next, check for these signals at each CRT
cathode (R, G and B). If they are present, examine the composite IK signal at CN9001/pin 8 of the C board. You
should see three pulses that change in level as the G2 control is adjusted. One pulse corresponds to one color
and they should be within 15% of each other. The normal IK output from the CRT/C board is about 1Vp-p pulses
at pin 8. If these three pulses are present at pin 8, the problem is on the A board about IC3101.
VIDEO
CN3101/ OUTPUTS
Q3101 CN9001 R CRT
64 1 IC9001 7 CATHODE
R
G CRT
Q3102 CATHODE
63
G IC9002 7
3
Q3107 B CRT
IC3101 B CATHODE
62 5 IC9003
Y/C CRT
7
DRIVE
CXA2150AQ
Q9013
R9036
Q9015
C3117
0.068 R3122 Q9001 R9041
58 8
IK R9013 R9042 Q9007
C3115
A BD. 0.002 C BD.
FIGURE 8-8 - BLANKING - 5X INDICATION 19TVP12 1336 9/4/01
29
Standby light blinks six times – TV Shutdown
Circuit – IC001/pin 43 monitors the Q6.5Vdc from the Primary power supply (A Bd) to the Q box (QM and QI
boards). A short or excessive voltage on the Q6.5Vdc line will cause IC001 to shut off the AC relay (IC001/pin 69
goes LOW).
IC7002 D 1.8V
IC6001 Q6.5V 1
DC-DC CONV.
T6002 D6016 R6031 SOURCE D 3.3V
2
PRIMARY
CN7001
P.S
R6043 QM BD.
R6029 Q6005
OCP
STBY STBY LED
D6015 5V (BLINKS 6X)
7.5V D6021
50
LB
D6024 Q6004 ERROR IC001
Q6006 C24 43 MAIN MICRO
AMP M306V2MF
R6032 CN3020/ 69
D6020 10k CN001
4.7V
A BD. B BD.
AC RELAY
RY6501
(DBd)
Testing – Unplug power to the Q box (CN7001) and power On the TV. If the TV does not shut down, the problem
is in the Q box. If the TV still shuts down, the problem is in the primary power supply. Measure “Q6.5Vdc” at
CN6005/pins 1 or 2 on the A board at power ON. A high of 8Vdc will trip the protection latch and shut down the TV.
The TV will not display A/V without the Q box (dark screen).
Standby light blinks seven times – TV Shutdown

There are two +135V OCP monitoring circuits. The first circuit will cause the Standby light to blink two times and
the second will cause the light to blink seven times. Both sensing and output circuits are on the D board, but the
indicating circuit is on the B board.
Circuit - Refer to Figure 8-10. The second OCP circuit consists of Q5004, Q5018, and IC5007 on the D board. It
monitors the +135V current through R5013 to the PWM Output (Q5003, Q5011) circuitry. This output circuitry
supplies B+ voltage (regulated 102Vdc) to the H. Output transistor Q5030. When there is excessive current
drawn by the Horizontal Output stage, OCP transistor Q5018 turns OFF, permitting IC3101/pin 34 to rise to a
threshold of 1.2Vdc (D board - CN5505/pin 8).
Y/C CRT Drive IC3101 immediately blanks the picture to prevent a CRT line burn and sends instructions (data) to
IC001/pin 31 to stop the AC relay voltage, which shuts down the TV.
Normally at power ON, Protect Mute Q3111 on the A board is turned on for five seconds to ground IC3101/pin 34
(CN3103/pin 8). This permits OCP comparator IC5007 (D board) time to stabilize, preventing premature blanking
and shutdown at power ON.
30
B BD. A BD.
200V TO
STBY LED CN002/ RGB VIDEO
CN3022 OUTPUT (C BD.)
R055 S DATA
IC001 31 B19 25 IC3101 Q5016
MAIN MICRO Y/C CRT DRIVE 200V
M306V2MF 26 B20 26 CXA2150AQ REG
54 R069 S CLK 34
200V
B20
CN3103/ D5015
R024 CN001/ Q3111 CN5505
AC RELAY CN3020 8
HOT T5001
(D BD.) H.PROT. Q5030, Q5011 H
135V
H. OUT DY
Q5004
IC5007 D5013 REG
Q5018
102V
OCP
IC5002
+135V PWM
FROM CIRCUITRY
SEC Q5003,
P.S R5013 Q5011
(D BD.)
D BD.
Testing - If the Standby light blinks two or seven times, the problem is most likely on the D board where the
sensing and Horizontal Output stages are. On the D board, if the Horizontal Output (Q5030), PWM (Q5003/
Q5011) transistors and video output ICs (C board) are good, suspect the components in the sensing circuit (same
board). The sensing parts are Q5004, IC5007 and Q5018.
Verify that this circuit is causing the shutdown by disconnecting the H. Output Transistor Q5030 and monitor the
voltage at CN5505/pin 8 (D Bd) as you power ON. If this voltage rises above 1 volt, this +135V OCP circuit or
Q3111 is responsible. The 135V OCP circuit consists of:
R5013, Q5004, IC5007, delay cap C5006, and Q5018 on the D board (not all parts shown in Figure 8-10).
31
9. High Voltage Power Supply
High Voltage Power Supply

This HV Converter is similar to the two low-voltage power supplies because they both have the same MCZ3001D
ICs. This power supply differs only in the start up, voltage output and over voltage (OV) protection. The Flyback
Output transformer of this power supply generates regulated 31.5kV and focus voltage for the CRT. Excessive
current drawn by this stage will permit Q8009 to shut down the TV set, but there will be no Standby light blink
indication. Refer to Figure 9-1 for the overview and Figure 9-2 for the description.
31.5kV
D6515 Q8009 200V HV TO
200V PIX
OCP IC8002
SEC PS TUBE
HV DRIVER
(D BD.) AFC PULSE
OUTPUT FBT
FROM FOCUS
H OUT VOLTAGE
Q5030/C HV TO PIX TUBE
(D BD.) ADJ.
IC8001 ABL
D BOARD D8014
PROTECT
LATCH
SAMPLE
D8027 Q6530, Q6532
SHUTDOWN
D8003 LATCH ONLY
0V
(D BD.)
FIGURE 9-1 - HA-3 HV BLOCK 55TVP12 1369 8/30/01
Start UP
Three items listed in Chart 9-1 are necessary to start this HV power supply:
Chart 9-1 - HV Converter Inputs (Starting)
Name From Destination
1. +200V D6515 & D6517 / cathode(D Bd) IC8002/18 (199V)
2. +15V D6514 / cathode (D Bd) IC8002/8 (14.7V)
3. AFC- H Out Q5030/C (D Bd) IC8002/1 (1.6V)
PLS (CN5501/pin 3 = 9Vp-p
The Start sequence is as follows:

• The Primary power supply produces low voltages for the Horizontal stage (D board).
• The Secondary power supply produces +135V for the Horizontal stage, along with +200V and +15V for this
HV Converter stage.
• The Horizontal Output stage is needed to develop AFC-PLS pulses (CN5501/pin 3 = 9Vp-p) for the HV
Converter.
• AFC-PLS pulses turn ON Q8001 and turn OFF Q8002.
• IC8002/pin 1 voltage rises to 1.8V. (1.3Vdc is the minimum to start IC8002).
• IC8002’s oscillator starts and drives the flyback transformer.
• The voltage at IC8002/pin 2 decreases from 4V to 2Vdc as the HV climbs to 31.5kV.
• Regulated HV and focus voltage output the flyback transformer.
32
SHUTDOWN LATCH
Q6530,Q6532
+200V D8003
R8051
(FROM D BD.
SECONDARY Q8009
POWER OCP
R8053-
SUPPLY) R8055 VD
V HV TO
ON 18 VC1
AFC OFF SENSE PICTURE
IC8002 8
D8027 PLS 1 CONVERTER TUBE
HV DRIVER TRANSISTORS
(Q5030/C + Q8002
Q8001 MCZ3001D FLYBACK FOCUS
H OUT) C8004
START H PULSES 2 VOLTAGE
KEEP C8004 100 F/B (PICTURE
HV R8056
CONV. DISCHARGED OFF TUBE)
RV8002
0V HV IC8003, IC8004 Q8022-3, Q8018
IC8001 Q8004
EPOXY PH8001 ERROR DYNAMIC FOCUS
OP AMPS 0V OFF DET
COATED AMP
NJM2901M
Q8003 D8002 D8005
+ 5 ABL
2 B 5.1V D8025
- 4 Q8007 D8020
REF. 7 DF DRIVE
VOLT. 1 A+ + DQP CONTROL
- 6 +15V
D8004/C R8016 C8005 Q8010 IC5511/11
IC8001 47
OP AMPS D8004
NJM2901M 5.1V
- 10
13 C+ R8006 8
11 14
- D8014
D+
9
IC8001 R8021 R8078
OP AMPS R8144
D8007 RV8001
NJM2901M
R8042 TO CN5506 PIN 2
R8044 EPOXY
Q8008 4.36 TO 4.66 VDC R8127 COATED
ABL
FIGURE 9-2 - HA-3 CONVERTER BLOCK 44tvp12 1358 9/4/01
Protection
There are two protection circuits for the HV stage. The first causes the HV to stop, leaving the TV’s audio to
continue operating. The second shuts off the entire TV set.
No or Momentary High Voltage
Excessive HV
A representative sample of this HV is available at the cathode of D8014. Since D8014 is difficult to access,
D8025/cathode is the same electrical point but easier to access. D8025/cathode’s normal voltage is 32Vdc when
the HV is 31.5kV.
This sample voltage from D8014 is applied to IC8001/B to stop the HV if it becomes excessive. IC8001 consists
of four op-amps in the same package, all with their negative inputs connected to a +5V reference voltage held by
zener D8004.
When the HV is excessive, the sample voltage input IC8001/pin 5 rises higher than the +5V reference voltage,
causing IC8001/pin 2’s output to go HIGH. The HIGH output is applied to inverter Q8004 that outputs a LOW.
This LOW output from Q8004 (collector) grounds IC8002/pin 1 and stops the HV oscillator IC8002.
Below Normal HV
After the TV is turned ON, if the HV drops lower than normal, the HV oscillator will stop. Below normal HV is
monitored by IC8001/A. In normal operation, a sample of the HV from D8014 causes 33V zener D8025 to
conduct. The HIGH that is output D8014 is turned into a LOW by inverter Q8010. Q8010’s LOW output is passed
33
by IC8001/A to output a LOW that keeps Q8003 turned OFF in normal operation. C8005 keeps IC8001/pin 7
LOW at turn ON when there is no HV, to prevent premature HV shutdown. If the HV drops low for a prolonged
period because it is being loaded down or the screen is excessively bright, 33V zener D8025 turns OFF and
inverts all the logic states listed above causing the HV to stop.
Excessive Beam Current (ABL)
Excessive current through the flyback transformer will stop the HV if a momentary bright screen (video game, or
action movie) caused the current demand. This protection circuit monitors the ABL (ground leg of the picture tube
HV feed) line at the FBT using Q8007 and D8005. If the screen brightness rises to a critical level, the low going
ABL voltage is inverted by Q8007, causing a HIGH to pass through D8005 into latch IC8001/pin 7. The latch
outputs and holds the HIGH at pin 7 that turns ON Q8003. Q8003 in turn grounds V Sense IC8002/pin 1 to stop
the HV oscillator. Latch IC8001 resets when the TV is turned OFF.
TV Shutdown
Excessive HV
If the HV rises very fast (faster than the IC8001/B HV kill circuit can respond), IC8001/C and D will shut down the
entire TV set. The Standby LED indicator lamp (part of the self-diagnostic circuit) will NOT blink when HV
shutdown occurs.
During a defect when the sample HV from D8014 continues to rise, IC8001/D voltage at pin 9 reaches the +5V
threshold. The HIGH that is output pin 14 passes IC8001/C to produce a HIGH at pin 13. This final HIGH passes
D8027 and is applied directly to the shutdown latch formed by Q6530 and Q6532. When this latch activates,
shutdown occurs so fast that it seems the TV set did not turn on at all. An easy way to prove this HV protection
circuit caused shutdown is to look for a momentary increase in voltage at D8027/cathode during turn ON.
Epoxy sealed RV8001 (at IC8001/pin 9) sets the shutdown threshold. When the HV is correctly set at 31.5kV, the
resultant voltage a test point CN5506/pin 2 is between 4.36–4.66Vdc.
Excessive Current Protection
Excessive current drawn along the +200V line into this HV Converter stage will also feed the latch transistors
(Q6530 and Q6532) directly, causing the TV to shut down. When this TV shutdown occurs, there is NO Standby
light blink indication. The +200 line feeds IC8002, the two converter transistors (not shown) and the flyback
transformer. Excessive HV will also cause the TV to shut down by drawing too much current through the flyback.
Excessive Beam Current (ABL)
Excessive current through the flyback transformer will stop the HV and shut down the TV if the HV current drain
is excessive due to a failure. Such a failure can be due to shorted video output ICs, defective CRT or shorted
FBT. When the ABL voltage from the FBT is excessive, Q8008 outputs a HIGH that exceeds 5.1Vdc at latch
IC8001/pin 11. IC8001 outputs a HIGH at pin 13 that passes through D8027 to trip the latch that shuts OFF the
TV.
In summary, shutdown without a Standby light indication indicates a problem is either in this HV stage or in the
shutdown circuit itself.
HV Adjustment
The adjustment procedure for these three controls is straightforward. First, the shutdown controls are preset
(ineffective). Then the RV8002 HV control is set to the shutdown trip point. The two shutdown controls are reset.
Finally, the HV control is set. A HV probe connected to a DVM is required for this precise adjustment procedure.
The procedure is as follows:
1. Replace RV8001 and RV8002 (they are epoxied).
2. Turn RV8001 both CCW from the top of the D board.
3. Turn the set ON with a black screen (HV unloaded).
34
4. Adjust HV RV8002 for 35.5kV (shutdown threshold). Use an accurate DVM with HV probe.
5. Adjust RV8001 until the set just shuts down.
6. Turn HV RV8002 CW to turn the set ON. Input a white signal. Bring the HV up to 35kV to make sure the set
does not shut down. (This rechecks the RV8001 adjustments.)
7. Adjust HV RV8002 for 31.5kV.
Testing
1. HV Check - Measuring the voltage at D8025/Cathode verifies HV. Normally D8025/Cathode = 31.6Vdc
when there is HV, and 0V when HV is missing. D8025’s Anode voltage should not be higher than 0.6Vdc
in normal operation (measured). D8025 is located next to the potted (epoxy sealed) RV8001/RV8003
controls at the left edge of the D board. See Figure 9-3 below:
D Bd A Bd
D8025
Flyback
FIGURE 9-3 - KD34XBR2 rear
2. HV Converter Check - If no HV is output, look for +200V input at IC8002/pin 18 and more than 15.6V at
IC8002/pin 8.
Look for HV Conv start voltage at IC8002/pin 1 (normally 1.6Vdc but must be more than 1.3Vdc. to start). See
Charts 9-2 and 9-3 below:
Chart 9-2 - Converter IC8002 Voltages

Pin 1 2 3 4 5 6 7 8 9
Volts 1.63 1.75 2.25 2.47 0 0 4.56 14.7 0
Pin 10 11 12 13 14 15 16 17 18
Volts 10.3 0 4.14 0 108 98.6 103 0 200
Chart 9-3
Additional Important Voltages related to IC8002/pin 1 Voltage
Electrical Location Physical Location Voltage
IC8001/pin 1 14 pin Surface mounted IC under 0V
IC8001/pin 2 RV8001/RV8003 0V
C8004/ + lead Behind IC5515’s large heat sink 0.02V
next to large 820uf, 250V C8023.
3. HV may be starting, then shutting down - Monitor D8025/Cathode for 31.6V at start up. If it is 0V, there is
no HV. Check the converter transistors and suspect IC8002 and the flyback to cause OCP shutdown (via
Q8009). If the cathode voltage momentarily rises beyond 31.6Vdc, there is HV but it may be excessive.
Turn the RV8001 and RV8003 controls CCW and adjust the HV. Follow the HV adjustment procedure. If
shutdown still occurs suspect D8025, C8005 and D8004.
35
10. Communications
Communications (HA-3 & RA-5A Chassis)

There are three communications buses in the HA-3 Direct view chassis (Figure 10-2) and similar RA-5A pro-
jection TV chassis (Figure 10-3):
• RXD/TXD bus between the Q box and the Main Micro (B board).
• S data and clock bus between the Main Micro and its TV operation ICs.
• B data and clock bus between the Main Micro and its memory ICs (NVM).
See Figure 10-1 below. NVM
B data/clk HA-3 - D Bd.
TXD
B Board RA-5A - A Bd.
Q Box Main Figure 10-1
Microprocessors RXD Micro
IC001 TV Operating ICs
HA-3 - A & D Bb.
S data/clk RA-5A - A Bd.
In comparing the two chassis, the only communication differences between them are the final destinations of
the two buses on the A and D boards.
A1 B1
Q BOX IC7205
A11 DIG
B11
PROCESS
CN8801
IC8902
CN8601 MID MICRO
A10 = DATA
A11 = CLOCK CN007
B1 A1 1 13
N/C S DATA, CLK B BD.
B CLK,
S COMMUNICATIONS
10 IC001 DATA
CN005 11 MAIN DATA CLK
IC004 CN005 A10 A11
B1 A1 MICRO
NVM CN007 1 13
CN004 2 (RST) CN4402 15 14
2
STBY CN6506 2 1
(R) 11 11 (T) 5V CN5501 8 7
CN2003 A20 B19
CONN. DESC. PATH CN002
CN2003
A2 = MID BUSY
CN4402 (AUDIO) A25 A20 2
B2 = BOX RST B19 1
1 14 15 B25 B COMMUNICATIONS
A11 = M16 RXD DATA CLK
B11 = M16 TXD TUNERS CN2003 A2 B1
A BD.
CLOCK &
CN3171 2 1 7 8
1
DATA =
CN3173 4Vp-p,
CN5501
2 1 7 8
PRESENT
CN6506
WHEN TV
IS ON
IC5001 CONV.
NVM D FOCUS
D BD.
FIGURE 10-2 - HA-3 CHASSIS COMMUNICATION 52TVP12 1364 9/7/01
36
10. Communications
RXD/TXD bus
Normal Operation
The individual RXD and TXD lines are active at:
• TV power ON,
• The end of a microprocessor program (periodic activity), and
• When the Q box is needed.
At power ON, there is bi-directional communications between the Main Micro (IC001) on the B board and the
Digital Processor in the Q box.
After power ON in normal operation, there is periodic communications on the TXD/RXD lines initiated by IC001
that results in just an acknowledgment (RXD) pulse. Communications is also present when changes to the Q
box operation are called for, as shown in Waveform 10-1. Note that the normal output of IC001 is 5Vp-p and
the reply signal from the Q box is only 3Vp-p because of their operating B+ levels.
While the TV is operating, there is only periodic communications when required. Waveform 10-1 shows typical
Q box to Main Micro IC001 (B Bd) bi-directional communications. This waveform was taken when changing
into a DTV station (channel up command).
In the waveform sequence below, notice that the Main Micro starts the communications (ch 2) and the Q box
micro replies afterwards (ch 1). When changing into NTSC stations the Q box does not have to select a
station so there is no (ch 1) reply (acknowledgment).
CH1
T
CH2
2
CH1!2.00 V=
CH2!2.00 V= MTB2.00ms- 5.82dv ch1-
Waveform 10-1 – Microprocessor Communications* QM – B Board

Channel Signal Name Location Vp-p
1 RXD to Main Micro CN8801/pin B11 3Vp-p
IC001 (B Bd)
2 TXD CN8801/pin A11 5Vp-p
Time Base = 2msec/div.
* Taken when channel changing into a DTV station. When changing to
another NTSC station, RXD signal (ch 1) from the Q box is not present.
37
10. Communications
A1 B1
Q BOX IC7205
A11 DIG S COMMUNICATIONS
B11
PROCESS DATA CLK
CN8801 CN005 A10 A11
IC8902
CN007 1 13
CN8601 MID MICRO
CN002/ B19 A20
A10 = DATA CN3022
A11 = CLOCK CN007 B BD.
B1 A1 13 CN1602 2 1
1
S DATA, CLK
B CLK,
10
IC001 DATA
CN005 11 MAIN
IC004 B COMMUNICATIONS
B1 A1 MICRO
NVM DATA CLK
CN004 2 (RST) CN002/
STBY 2 1
STBY CN3022
5V
(R) 1111 (T) 5V
A2 = MID BUSY CN3022
B2 = BOX RST A25 A20 2
A11 = M16 RXD A BD. B25 B19 1
B11 = M16 TXD
4Vp-p PRESENT
IC13013 CLOCK
WHEN
NVM DATA
TV IS ON
TUNERS
CN1601 1 20 1 6 7 20
CN1602TO
CONV.BD.
FIGURE 10-3 - RA-5A CHASSIS COMMUNICATIONS 53TVP12 1365 9/6/01
Loss of RXD/TXD Communications

Symptom 1 - Loss of RXD/TXD Communications between the Q box and the Main Micro results in a white
screen with no sound as if there is a break in the video path. This is because the Q box has no instructions
(communications) to configure the video ICs within the Q box so there is no active video output.
During this RXD/TXD Communications failure, the B and S data/clock communications is still active as long as
the TV is ON. This means main TV micro still communicates with the NVM ICs and TV operation ICs so the
TV deflection stages are working even though there is no audio and video.
Symptom 2 - If the power to the Q box is removed, the TV responds to the power ON/OFF button but the
screen is dark with no audio. The B and S data/clock communications is still active without the Q box power.
S data and clock bus

This data bus is bi-directional with the video processor on the A board (and AD board in the RA-5A projection
TV chassis), but unidirectional with the remainder of the ICs in the TV. The clock signal comes from Main
Micro IC001. Both data and clock signals are 4Vp-p and are always present as long as the TV is ON. This
output drops to 2Vp-p if the Q box power was removed (CN7001 unplugged).
38
10. Communications
B data and clock bus
This data bus is a bi-directional bus connecting the Main Micro IC001 with the two Non-Volatile Memory (NVM)
ICs. The data and clock lines are 4Vp-p and are always present as long as the TV is powered ON.
On Screen Displays
The main (white) menu comes from the Digital Processor Micro within the Q box. The menu data is sent on an
EMI communications bus used solely within the Q box to its OSD IC, which is also within the Q box.
The green service mode OSD, channel numbers and user functions (e.g. volume, picture) come from the Main
Micro IC001 on the B board. IC001 communicates with the Q box for this purpose using RXD and TXD as
explained above. The OSD RGB output is applied to the video processor IC on the A board.
The white crosshatch patterns and dots OSD used for convergence in the projection TV set (RA-5A chassis)
comes from the AD board. The OSD RGB output is applied to the video processor IC on the A board.
39
11. Video Process - HA-3 and RA-5A Chassis
Video Process (HA-3 & RA-5A Chassis)

The bulk of the video process is the same for the HA-3 and RA5A chassis. The differences are the connector
numbers on the A boards. Therefore this video process section applies to both chassis and contains:
• Overall Video Block
• Overall Sync Path
• Board Replacement Repairs
• Component Level Repair
Sony’s direct view HA-3 TV chassis drives a 16x9 flat-faced picture tube. The acceptable inputs for this chassis
are listed in Chart 11-1. Refer to Figure 11-1 for the video signal flow that follows.
Chart 11-1 – HA-3 Input

TV Input Acceptable Input
DTV TV stations Air Channels 1-99 in 18 ATSC digital formats
Analog TV stations Air (ch 2-69) or cable (ch 1-125) in the NTSC analog format
Video 1-4 S or composite video in standard 480i format (525 line)
Video 5-6 Y, Pb, Pr component video in 480i, 480p, 720p, or 1080i format
A general description of the video flow by board is explained for each of the four input groups.
IC7205, IC7603
DTV TUNER QM BD. C BD.
MAIN SIGNAL PATH
AND PROCESS
NTSC INPUT/ TWIN
IC8801
OSD
IC8601 IC7806,
IC7807 IC9001-3
IC8703, IC8902 RGB
DRC CRT
MID PROCESS
PROCESS NTSC OUTPUTS
MN-SB- MAIN
CN8601/
SW. PATH CN8801
CN005
A1-3 A9 A5-7 A3-5 A7-9 1, 3, 5
NTSC MAIN OSD CN9001/
SUB CN3101
U BD. PATH HD Q9, Q11, Q13
IC200 VIDEO C OSD
MIXER 11 HD
NTSC
COMPONENT
INTERFACE I/F IC205
*
5,6
IC3101
(33.75kHz)
OR OSD 13
IC201 SUB SW. MAIN SW. Y/C
CN4001/ HD IC001 CRT
CN003 INPUT MAIN MICRO DRIVE
VIDEO 5,6 C
15
NTSC IC201,IC202, IC002 VD (60Hz)
SUB IC204,IC207 SW. 17
VIDEO 1,3,4 IC401 ANALOG VIDEO CN001/
A/V PROCESSING CN3020 A BD.
SW. MAIN
B
6 ANALOG
VIDEO 2
B TUNERS
HB BD. CN008/ *SERVICE MODE B BD.

9
ENABLED PATH CN002/

CN1200
CN3022
FIGURE 11-1 - VIDEO BLOCK - HA-3 CHASSIS 7TVP12 1324 9/4/01
40
Digital TV station Input
QM board – Selecting a digital TV channel requires the communications of the Main Micro IC001 (B board) and
Digital Processor IC7205 (QM board - not shown). At each channel up or down command, the Main Micro IC001
(B Bd.) asks Digital Processor IC7205 if the next station is an active DTV station. If the next station is digital, the
reply contains the channel number (IC001 displays channel numbers). Main TV Micro IC001 instructs IC7205
(QM board) to receive that DTV channel.
Digital TV station processing is then entirely performed on the QM board. The DTV tuner receives the station
while its circuitry (IC7205, IC7603) converts the digital signal to final component video form with two or six chan-
nel audio output. OSD IC8801 buffers the component analog video before sending it to the B board.
Previously, the TV’s Main Micro generated the OSD menu and channel numbers. IC8801 now generates all the
TV menu graphics from the QM board, but the Main Micro (B board) still makes the green channel numbers and
controls the service mode display.
B board – The menu OSD from IC8801 (QM board) and channel number/service mode OSD from the Main Micro
IC001 are combined by Q9, Q11 and Q13 and sent to the A board. The DTV’s component video passes through
switch IC002 and enters the A board.
A board – Both the OSD information (if any) and the DTV station’s component video enter the Y/C, CRT Drive
IC3101 to be merged. The combined output leaves as RGB to the CRT on the C board.
Analog TV station Input

A board – Both the main and sub analog tuners are mounted on the A board. Their composite video outputs are
sent to the A/V switch on the B board.
B board – A/V switch IC401 chooses the signal path for the main and sub tuners. The main tuner signal may
either enter the main path or be switched into the sub path. The main path leaves IC205 on the B board for the
QM board (Q Box). The sub path leaves IC200 on the B board for the QM board (Q Box). When a single analog
picture is selected, the main signal path into the DRC circuitry on the QM board is always taken, no matter which
tuner originates the signal.
In the Twin View picture mode (Figure 11-2), both main and sub paths are used to produce two pictures on the
screen side by side. The main picture from IC205 is positioned on the left side by the MID circuit when both
pictures are the same size (Figure 11-2 a) or the left picture is the larger picture (Figure 11-2 b). When the picture
on the right becomes the larger (Figure 11-2 c), the MID process reverses the position so the larger picture always
comes from the DRC process (main signal path) via IC205. Earlier in the signal path, IC200 and IC205 switch the
input signals to keep the same station at the same position on the screen. The main (IC205) and sub (IC200) IC
switches are inversely controlled by a single “MN SB SW”line from the MID micro on the QM board. A slight delay
occurs when the right picture just begins to become larger, allowing the MID circuit to switch positions. The
picture freezes for a moment until both switches have been made, then the frame continues to increase in size.
Figure 11-2 - Twin Picture Mode, Analog Inputs
Main Sub
Main pix Main pix
pix pix S S
from IC205 from IC205
IC205 IC200
a b c
41
QM board – The main and sub video signals are both input to the MID circuitry, but the Main signal passes through
the DRC circuit first. The DRC circuit increases the number of pixels of the standard resolution NTSC signal. The
MID circuit selects one of three inputs (DTV, sub video, main video), then changes its input horizontal frequency
(see Chart 11-2 for the possible input frequencies) and the aspect ratio to match the TV parameters. The TV
horizontal frequency is always 33.75kHz.
Chart 11-2 – Input signal H. Frequency
Input signal Horizontal Frequency
Standard NTSC 480i 15,734 Hz
High Resolution 480p 31.5kHz
High Resolution 720p 45.kHz
High Resolution 1080i 33.75kHz
The MID circuit output is high-resolution component video and separate H & V sync lines. The OSD IC buffers the
video before leaving the QM board.
B board – CN004 receives the video signal and SW IC002 on the B board acts as a pass-through for the video
signal. The video leaves unaltered at CN001 (see Figure 11-3) into the A board.
A board - Both component video and sync leave the B board and enter the Y/C CRT Drive IC on the A board.
From the A board, the RGB signal is applied to the CRT cathodes.
Main & Sub Sw B Bd.

Q Box Main
Path A/
V
CN005
Sub Path Video
Inputs
CN8801
CN004
CN8601
CN001 CN001
Figure 11-3 - HA-3 & RA-5A Video Path
Video 1-4 Input

Composite video from video inputs 1-4 enter the U or front panel HB board and pass through the A/V switch IC401
on the B board. From there, they take the same path as explained in the Analog TV stations.
Video 5-6 Input
U board – The U board houses the component video input jacks (Y, Pb, Pr). The signal is input to the B board.
B board – The component video signal enters component interface switch IC200 and goes into the QM board.
QM board – The MID process (IC8601, IC8703) converts the 480i, 480p, 720p or 1080i video format and separate
sync frequencies to 540p/1080i (video) and 33.75kHz (H sync) to match that of the TV. The component video
output is sent through IC8801 into the B board. The sync is sent through the B board into the A board (not shown).
B board – The component video passes through IC002 and goes to the A board. Switch IC002 is not normally
used as a switch except when enabled using the service mode. Then a 1080i video 5, 6 signal can be made to
avoid the QM board for testing purposes. See Video Adjustments for the procedure.
42
A board – The Y/C CRT Drive IC3101 converts the input video to RGB, mixes any OSD and outputs the combined
signal to the CRT on the C board.
In the twin picture mode, the DTV picture or video 5 or 6 high resolution input will always appear on the left side
and never swap places. Video 5, 6 or a DTV station CANNOT be selected in the right picture.
Figure 11-4 - Twin

DTV or
Picture Mode with Main pix
HD pix
Digital Input
Overall Sync Path

The sync paths for the analog and digital TV tuner and video inputs are shown in Figure 11-5. The sync is first
stripped from the video on the left B board. Both the main and sub sync signals input the QM board as NTSC
standard, but leaving is 33.75kHz to match that of the TV’s horizontal oscillator frequency. Normally switch IC006
on the right part of the B board just passes the 33.75kHz from the (QM board’s) MID circuit. IC6 only selects the
sub path sync when the HD High Pass mode is selected from the service mode. See the Conv. Adjustments
Overview section for details.
TUNER
B BD. QM BD. B BD. A BD.
A8 H MAIN
CN8801/
B8 V CN004
VIDEO A/V
1-6 SW./ A6 H
MID B6 V
IN VIDEO CN001/
PROCESS CN3020
A4 H A6 H
IC6
B4 V SUB B6 V
HD SW
CN005/ DTV PASS
CN8601
IC001 SUB IC3101
MICRO SYNC Y/C
B BD.
CN3174/ V
CN5503
3 4 2
V, H DRIVE H DRIVE
(D BD.) (D BD.)
FIGURE 11-5 - HA-3 SYNC PATH 42TVP12 1357 8/30/01
43
Chart 11-3 - Horizontal Sync Levels – Input is 15.735kHz NTSC at Video 1
Location Board Description Frequency Vp-p
CN005/pin A8 B Output - Main H from B board 15.735kHz 3.5Vp-p
CN005/pin A4 B Output - Sub H from B board 15.735kHz 3.6Vp-p
CN8801/pin A6 QM Output – Pix sync from MID circuit 33.75kHz 3.7Vp-p
CN001/pin C18 B Output – Final pix sync from QM bd or Video 33.75kHz 5Vp-p
5 or 6, 1080i input signal
Board Replacement Repairs

The following are very simplified signal flow diagrams used to quickly see the Main, Twin and HD signal paths
for board isolation. The paths are the same in the HA-3 and RA-5A TV chassis because they use the same B
and Q box that houses the bulk of the video signal processing.
Main Video Path
When a single picture is chosen from the analog tuner or video inputs, the path shown in Figure 11-6 applies.
Hi SCAN VIDEO/33.75kHz
MID DRC MAIN

QM BD. PROCESS PROCESS OSD
PIX
NTSC
RGB OUT
U BD. B BD. MAIN
TO C BD.
SW.
VIDEO
1, A BD.
VIDEO
3-6 ANALOG
A/V MAIN IC002 CRT
VIDEO
SW. SW. DRIVE
PROCESS
HD BD.
VIDEO ANALOG
2 TUNER
FIGURE 11-6 - NTSC MAIN PIX VIDEO PATH 8TVP12 1325 9/4/01
Only the main signal path is used to direct the analog composite video from the rear panel (U board) or main tuner
(A board). Component video (Y, Pb, Pr) with H & V sync lines is sent to the QM board for conversion into a high
resolution, high frequency video signal to match that of the TV.
The OSD IC buffers the component video signal before leaving the QM board and returning to the B board. SW
IC002 on the B board acts as a pass-through for the video signal. Both component video and sync from the QM
board leave the B board and enter the Y/C CRT Drive IC on the A board. From the A board, the RGB signal is
output to the CRT cathodes.
44
NTSC Twin View (Picture with Picture) Video Path

When the Twin View (Picture with Picture) feature is selected, two pictures appear on screen side by side. Two
video sources are chosen and two video paths are used to support these pictures. The main picture starts at the
left side when the pictures are the same size. With the remote, one picture can be made larger than the other
can. The larger picture will always take the main picture path with two NTSC inputs so video paths are switched
as necessary. Picture switching is done at the MID Process (QM board) and the Component I/F and Main Sw ICs
on the B board.
COMBINED PIX
LARGER PIX IS
ALWAYS MAIN
MID DRC
QM BD. PROCESS PROCESS OSD
MAIN SUB
SUB MID
MAIN
PIX MICRO
PIX
SUB MAIN
U BD. COMPONENT MAIN

I/F, SUB SW. MN SB SW. RGB OUT
TO C BD.
VIDEO SW.
1-6 A BD.
MAIN ANALOG
HD BD. A/V IC002 CRT
VIDEO
SW. SW. DRIVE
PROCESS
SUB
HD BD.
MAIN
ANALOG
VIDEO TUNER
2 SUB
B BD.
FIGURE 11-7 - NTSC ONLY TWIN VIEW VIDEO PATH 9TVP12 1326 9/4/01
The combined picture leaves the MID process with a new horizontal frequency to match the TV as well. An OSD
IC buffers the component video before leaving the QM board. The component video and sync pass through the
B board and enter the Y/C CRT Drive IC on the A board. The Y/C CRT Drive IC output is RGB that goes into the
C board and CRT cathodes.
Main and Twin Mode Video Troubleshooting

Because of the switching in the Twin mode, we can use the Twin Mode user operation to isolate the problem to a
board. Use Figure 11-8 for identifying a video problem using two NTSC signals, and Figure 11-13 for an ATSC
signal problem. With the suspected board in mind, you can use your scope to prove the problem is in the
suspected board by checking for video signals at chassis connectors (signal tracing).
45
Flow Charts for locating a defective board
In the Twin Picture Mode the main picture video signal path is always used to display the largest picture. To do
this the MID circuit in the Q box and switching ICs on the B board may interchange paths depending upon which
picture is the largest. Use the flow charts to change the size of the pictures in Twin Mode and isolate the problem
to a board.
Figure 11-2 - Twin Picture Mode, Analog Inputs
Main Sub
Main pix Main pix
pix pix S S
from IC205 from IC205
IC205 IC200
a b c
NTSC/480i
SINGLE PIX ANALOG PROBLEM
HAS A DEFECT? IN A, B, OR C BD.
PRESS "TWIN MODE". YES

MAKE LEFT PIX RETURN TO 1 PIX.
IS THE DEFECT IN DEFECT IN THE
YES LARGER. DO BOTH YES TURN ON THE INTERNAL
ALL MODES? GENERATOR
PIX HAVE THE VIDEO GEN. (SERVICE
VIDEO, TV? PATTERN?
PROBLEM? MODE)*
NO NO
NO QM BD.
DEFECT
PROBLEM EXTERNAL, SAME
MAKE THE RIGHT (MID IC8703)
OR ON B OR U INPUT BDs PIX QM BD. LARGER
PIX LARGER.
WHERE IS THE PROBLEM PROBLEM
DEFECT? WHICH PIX? IN A/D IC7806
DRC IC7804
CHANGED SMALLER
PIX
PROBLEM IS IN
LEFT
WHICH PIX? A/D IC8601
MID IC8703 *SEE "ADJ. OVERVIEW" SECTION
SUB AREA
RIGHT B BD. IC200/
IC202
MAIN AREA
B BD. IC207,
IC205, QM BD.
IC7807
FIGURE 11-8 - FLOW CHART 2 - VIDEO TROUBLESHOOTING - NTSC PIX DEFECT 39TVP12 1355 8/30/01
Signal Tracing to prove the problem is on the board

Refer to the following to support the traditional video signal tracing in the HA-3 and RA-5A TV chassis:
• Figure 11-1 for the signal flow
• Figure 11-10 for the location of HA-3 chassis connectors.
• Chart 11-4 shows the Video Signal Levels along the way
• Waveforms 11-1 – 11-3 that show the signal shapes with an NTSC color bar input to the TV.
Conditions of measurement - Color bars are input to the main (VHF/UHF) and sub (Cable) tuners from two
separate NTSC generators for ease of signal tracing. The color bar signal is followed as it enters and leaves a
board. The Sub signal is always present at the connector even though it is not being used. The TV is tuned to
Channel 3 and Channel C3.
46
IC7205, IC7603
MAIN SIGNAL PATH
AND PROCESS
NTSC INPUT/ TWIN
IC8801
OSD
IC8601 IC7806,
IC7807 IC9001-3
IC8703, IC8902 RGB
DRC CRT
MID PROCESS
PROCESS NTSC OUTPUTS
MN-SB- MAIN
CN8601/
SW. PATH CN8801
CN005
A1-3 A9 A5-7 A3-5 A7-9 1, 3, 5
NTSC MAIN OSD CN9001/
SUB CN3101
U BD. PATH HD Q9, Q11, Q13
IC200 VIDEO C OSD
MIXER 11 HD
NTSC
COMPONENT
INTERFACE I/F IC205
5,6 * IC3101
(33.75kHz)
OR OSD 13
IC201 SUB SW. MAIN SW. Y/C
CN4001/ HD IC001 CRT
CN003 INPUT MAIN MICRO DRIVE
VIDEO 5,6 C
15
NTSC IC201,IC202, IC002 VD (60Hz)
SUB IC204,IC207 SW. 17
VIDEO 1,3,4 IC401 ANALOG VIDEO CN001/
A/V PROCESSING CN3020 A BD.
SW. MAIN
B
6 ANALOG
VIDEO 2
B TUNERS
HB BD. CN008/ *SERVICE MODE B BD.

9
ENABLED PATH CN002/

CN1200
CN3022
FIGURE 11-1 - VIDEO BLOCK - HA-3 CHASSIS 7TVP12 1324 9/4/01
DIG TUNER
1
CN7001 2 6.5V QI BD.
ALL 3
4 GND PIN1 IS
VOLT. 5 5V CLOSEST TO
FROM 6 9V
A BD. 7 GND B BOARD THE BACK
CN6005 8 33V QM BD. PLUGS INTO OF THE TV
CN2002 & 3
A 1 1 B 2 CH. AUDIO
2 BACK OF TV
3 (HA-3)
CN7402 4 AB
5
AUDIO (RA-5) 1 CN3173
6 CN5501
7 TO B BD.,CN009 FBT
GRAY CN3103 CN5505
CN002/
A 1 1 B CN2003
3 VIDEO TO B BD. CN3174 CN5503
4 25
5
CN8801 OSD CN004 AC CN3171 CN6506 D BD.
7
8 1 A BD.
9
11 11 VIDEO INPUT
WHITE FROM B BD.
CN3170 CN6504
A 1 1 B CN005 CN001/
2 CN2002 CN6501
3 SUB CN6001
CN8601 5 CN6505
6 32
7 MAIN CN6005 CN6503
11 11
BLK
CN6502
CN2001 CN6003
CN4404 CN4403
FRONT OF TV
FIGURE 11-9 - HA-3 CHASSIS CONNECTOR LAYOUT 38TVP12 1354 9/4/01
47
Chart 11-4 - Video Signal Levels - HA-3 Chassis, RA-5A Chassis Similar
Signal Name Location Board Voltage
Main tuner output A bd. CN002/pin B6 Input B 1Vp-p Composite video bars (gen. 1)
Sub tuner output A bd. CN002/pin B9 Input B 1Vp-p Composite video bars (gen. 2)
Main Y Signal CN005/pin A5 Output B 1Vp-p NTSC Main Component video
Main Pb CN005/pin A6 Output B 1.2Vp-p output the B board
Main Pr CN005/pin A7 Output B 1.2Vp-p
Sub Y Signal CN005/pin A1 Output B 1.2Vp-p NTSC Sub Component video
Sub Pb CN005/pin A2 Output B 1.2Vp-p output the B board
Sub Pr CN005/pin A3 Output B 1Vp-p
Hi Scan Y Signal CN001/pin C15 Input B 0.7Vp-p High Resolution Component
Hi Scan Pb CN001/pin C16 Input B 0.6Vp-p video output Q box
Hi Scan Pr CN001/pin C17 Input B 0.5Vp-p
Menu CN001/pin C12 (green) Output B 0.5Vp-p OSD white menu signal
Waveform 11-1 shows component video leaving the B board into the Q box. The main and sub signals look the
same. Only the main output is actually shown.
Ch 1
2
3
Ch 2
Ch 3 CH2! 500mV~
CH3! 500mV~
CH4! 500mV~ CHP MTB10.0us- 5.96dv ch4-
Waveform 11-1 – Main / Sub Signal Output B Board

Name Location Voltage/div
Channel 1 Main / Sub Y CN005/pin A5 / A1 1.2Vp-p
Channel 2 Main / Sub Pb CN005/pin A6 / A2 1.2Vp-p
Channel 3 Main / Sub Pr CN005/pin A7 / A3 1.2Vp-p
Time base 10usec/div
48
Waveform 11-2 shows the high-resolution output (ch 2-4) of the Q Box compared to the standard resolution (ch 1)
color bar pattern composite input. The sync is doubled and the resolution is increased (density is higher).
Ch 1
1
2T
Ch 2
Ch 3
4
CH1 500mV~
Ch 4 CH2! 500mV~
CH3! 500mV~
CH4! 500mV~ CHP MTB10.0us- 1.72dv ch2+
Waveform 11-2 – Hi Scan Video Output Q box

Channel 1 NTSC Main Tuner Out CN002/pin B9 1Vp-p
Channel 2 Hi Scan Pr CN001/pin C17 0.5Vp-p
Channel 3 Hi Scan Pb CN001/pin C16 0.6Vp-p
Channel 4 Hi Scan Y Signal CN001/pin C15 0.7Vp-p
Waveform 11-3 shows the menu signal output the Q box. This menu signal is present for 1.5 minutes after the
menu button is pressed. The signal appears on all RGB outputs lines because the new menu is white in color.
Cancel the menu by pressing the menu button again.
Ch 1
2
T
Ch 2
3
Ch 3 4
CH2! 500mV~
CH3! 500mV~
CH4! 500mV~ ALT MTB5.00us- 1.72dv ch3+
Waveform 11-3 – OSD Menu Signal from Q box

Channel 1 OSD Red CN001/pin C13 0.5Vp-p
Channel 2 OSD Green CN001/pin C12 0.5Vp-p
Channel 3 OSD Blue CN001/pin C11 0.5Vp-p
49
High Definition (HD) Video Path
A high definition signal can come from the DTV tuner in the QM board or externally from the TV’s rear video 5 or
video 6. See Figure 11-10 for signal flow to each board and Chart 11-5 for a video path list.
DTV
TUNER &
PROCESSOR
QM BD. HD
PIX
MID
OSD
PROCESS
RGB OUT
TO C BD.
VIDEO COMPONENT IC002 Y/C

5,6 I/F SW. CRT DRIVE
HD INPUTS HIGH DEF

PASS-THROUGH
480p SERVICE MODE ENABLED
U BD. 720p
B BD. A BD.
1080i
FIGURE 11-10 - HD VIDEO PATH 10TVP12 1328 8/30/01
Chart 11-5 - High Definition Video Signal Path

Video 5 or 6 Input DTV Air Signal
Stage Board Purpose Stage Board Purpose
Input U Input DTV Tuner QM DTV Reception
Component B Video buffer; H & V Sync DTV QM Decodes one of 18 ATSC
Interface IC200 extraction Process formats. Input = Antenna
Outputs = component video.
MID Processor QM Signal determination MID QM Signal determination based
based upon sync freq.; Processor upon sync freq; aspect ratio
aspect ratio change; H change; H freq. change to
freq. change to 33.75kHz 33.75kHz. Combines pix.
OSD QM Video buffer, User Menu Combined with the Video 5 or 6 picture by the MID
OSD Processor
SW IC002 B Video Pass through
Y/C CRT Drive A Input = Component Video.
Output = RGB.
Adds Menu OSD from QM
board.
50
HD Twin View (picture with Picture) Video Path

When a HD signal from the DTV tuner or Video 5 or 6 input is selected in Twin View, this HD picture will remain
fixed at the left side of the screen. The signal path is easy to see in Figure 11-12 and the signal path is listed in
Chart 11-6.
DTV
TUNER &
PROCESSOR
COMBINED PIX
HD
VIDEO
MID DRC
GEN. OSD HD NTSC
PROCESS PROCESS PIX PIX
QM BD.
HD NTSC
RGB OUT
U BD. COMPONENT MAIN
TO C BD.
I/F SW.
VIDEO HD
5-6 NTSC A BD.
VIDEO ANALOG
A/V IC002
1,3,4 VIDEO JUNGLE
SW. SW.
PROCESS
VIDEO TUNER
2
HD BD. B BD.
FIGURE 11-11 - HD & NTSC TWIN VIEW VIDEO PATH 11TVP12 1327 8/30/01
51
Chart 11-6 - HD Twin View Video Signal Path
HD Signal Path NTSC Signal Path
Stage Board Purpose Stage Board Purpose
DTV Tuner QM Input = Outside Antenna Main NTSC A Receives cable, or off the
Output = Component Video Tuner air TV stations
Video 5, 6 U Video Input A/V Switch B Selects NTSC input

Component B Video buffer; H & V Sync Analog B Inserts closed caption,
Interface extraction. Output = Video & Video Detects ID1 aspect ratio
Sync Process signal, parent control.
Input = composite video
Output – Component
video & sync (not shown)
DTV Tuner QM Decodes one of 18 ATSC Main B Remains locked to the
& Process formats. Input = Antenna Switch main signal input
Outputs = component video.
MID QM Selects Video 5/6 or DTV DRC QM Increases the pixel
Processor input; H freq. change to Process number.
33.75kHz.
MID QM Creates two pictures on the MID QM Creates two pictures on
Processor screen. Processor the screen.
OSD QM Video buffer, User Menu OSD The MID Processor combines with the HD picture with
SW IC002 B Pass through only. Switch is this input on the screen.
disabled from the service
mode.
Y/C CRT A Input = Component Video.
Drive Output = RGB.
Adds Menu OSD from QM
board.
HD & Twin View Mode Video Troubleshooting

When there is a video problem in a high definition picture, you can use the twin picture mode and the built in video
generator to isolate the problem to a board without removing the back panel. The Video Adjustment section of
this book contains instructions on how to access the video generator from the service mode.
52
HIGH DEFINITION
SINGLE PICTURE
HAS A DEFECT
IS THE DEFECT
DEFECTIVE CIRCUIT
SIMILAR FOR
IS LOCATED ON[B] OR[U]
ALL INPUTS
NO BOARDS
(V5, V6)?
YES
ACTIVATE THE SEE CONVERGENCE

INTERNAL ADJUSTMENT OVERVIEW
VIDEO GENERATOR CHAPTER
CAN THE NO NEED TO TROUBLESHOOT

DEFECT STILL THE ANALOG AREA OF
BE SEEN? THE SET
YES
Q BOX OR [M] BOARD IS
TROUBLESHOOT [C] BOARD,
PROBABLY
[B] BOARD (IC002, IC006),
DEFECTIVE. MID (IC8703)
OR [A] BOARD (IC3101)
A/D (IC8601), OR CXA2151
(IC2000)
FIGURE 11-12 - FLOW CHART 3 - VIDEO TROUBLESHOOTING - ATSC SIGNAL 41TVP12 1356
Component Level Repair

Detailed Video Signal Flow
The video signal flow is divided into four parts as shown in Chart 11-7. A block diagram represents each part.
Chart 11-7 - HA-3 Video signal flow

Figure # Title Board(s) Input Output
11-13 Video Process 1 A, U, HB, B All NTSC inputs Component Video
11-14 Video Process 2 - B, QM, Component Video, Component Video, Sync,
DTV Video EMI DTV bus Menu OSD.
11-15 Video Process 3 QM, B, A, C Component Video, RGB to CRT cathodes
Sync, Menu OSD.
11-16 DTV Tuner QM UHF antenna / Memory EMI video bus,
Stick DTV line audio output
53
Video Process 1
The first Video Process (Figure 11-13) shows the composite and component video inputs to be NTSC processed
on the B board. Chart 11-7 shows the signal flow and board input/output signal types.
CN3022/
TUNERS CN002 HD VIDEO 5,6
A BD. MAIN B6 OUTPUT TO
SUB VIDEO SW.
B9
B BD. IC002
CN008/CN1200
10 CN005/
VIDEO V 6 Y
Y IC501 VIDEO CN8601 SUB SIG.
HB BD. 2 C 2
3D COMB FILTER 5 IC200 A1 Y TO
uPD64082 COMP. I/F A2 PB IC8601
IC401 C 6 A3
CN4001/CN003 CXA2151Q PR A/D
VIDEO V A1 A/V SW. V_MID QM BD.
CXA2069Q Y C
1 Y A2 VIDEO
C A3 NTSC
A4
VIDEO V
Y A5
5 IC207 IC201 SIG.
3 MAIN YCT SUB SW. PATH
U BD. C A6 6
A8 CXA2151Q M52055FP
VIDEO V A9
Y MAIN
4 VIDEO A5 Y
C A10 VIDEO 5 TO IC202 IC205 SIG.TO
VIDEO V
A12
IC200 5 A6 PB
A13 SUB YCT MAIN SW. V_DRC A7 PR IC7806
5 PB IC202 6
A14 CXA2103Q M52055FP A/D
VIDEO V A15 IC207 QM BD.
6 PR A16
A17 VIDEO 6 TO Y C STBY +5V
IC200
(A BD.)
IC202 IC204
IC207 SUB COMB.
CXD2073Q
IC001 IC004
IC401 MAIN MICRO NVM
IC501 M306V2MF B N24C32
IC202 S DATA
IC207 DATA CLK
CLK
FIGURE 11-13 - VIDEO PROCESS 1 4TVP12 1321 8/30/01
54
Chart 11-8 shows the main and sub video signal flow through the B board.
Chart 11-8 – Video Process 1 Signal Flow
IC Name Board Function Mode used
IC401 A/V Sw B Selects Main & Sub video inputs When NTSC inputs are selected
Main Path
IC501 3D Comb Filter B Separates the luminance form the All NTSC modes except S video
chroma.
IC207 Main Y/Ct B Selects input component video 5, All NTSC modes
6, or composite video from IC501.
Adds Closed Caption graphics
IC205 Main Sw B Swaps Twin View pictures back to All NTSC modes
original position
Sub Path
IC204 Sub Comb B Separates the luminance from the Twin View
Filter chroma.
IC202 Sub Y/Ct B Selects input component video 5, Twin View
6, or composite video from IC501.
Adds Closed Caption graphics
IC201 Sub Sw B Swaps Twin View pictures back to Twin View
original position
IC200 Component B Selects NTSC sub video or HD Twin View and HD video input
Interface video 5, 6.
Video Process 2
The main and sub NTSC component video signals from the B board enter the QM board for processing as listed
in Chart 11-9a. The signal flow is joined by the DTV tuner signal shown in Figure 11-15. All three signals flow into
the MID IC8703 for selection.
55
SDA SCL
IC8601 A/D MID
IC8902 A2
IC8901 IC8703 MID-XA BUSY
MIDuCOM
NVM MB9489A88F B2 BOX
ANALOG RST
CN005/
SUB Y IC7807 DRC
CN8601
ANALOG CB
SUB
VIDEO IC8601 CR
FROM Y A1
IC200 PB CXA3506R
A2 YO-7,RO-7,CO-7
P A3 A/D, SW
COMP. R IC7601 IC8703
I/F DRAM MID-XA
IC7603 IC7604 CXD
IC7602 MPEG CONV. YO-7,CO-7 9509AQ
Y,C
DRAM ST17000AQA C B,
R
MID VIDEO
OUT OUTPUT
IC7807 YO-7
DRC-MF CRO-7
MAIN IC7806 YO-7,CO-7 CN8801/
MAIN CXD RBO-7
FROM Y A5 A/D CN004
IC205 PB A6 TLC5733AIPM 2095AQ (B BD.)
MAIN PR A7
SW ANALOG
VIDEO YO-7,
CO-7 A5 Y
IC8805 A4 PB
EMI D/A ANALOG A3 PR
BUS YO-7,CO-7 A6
HS
FOR IC8801OSD
V
B6 S
VIDEO IC8803 YGV619
A7 OSD R
PROCESS A8 OSD G
IC8804
A9 OSD B
B BOARD SRAM QM BOARD
FIGURE 11-14 - VIDEO PROCESS 2 - DTV VIDEO 3TVP12 1320 9/6/01
Chart 11-9a - QM board Signal Processing

Main Signal DTV Signal Sub Signal
IC IC Name Purpose Path IC IC Name Purpose
IC7806 A/D Conv Digital DTV Tuner IC8601 A/D Conv Digital
Conversion Conversion
IC7807 DRC-MF Increases IC7205 to EMI bus
pixel count
MPEG IC7603
MIDIC8703
MID IC8703
IC8801
IC8801 Output to B
IC8805
IC8805 board
56
These three (Main, DTV and Sub) signals are input to MID IC8703. This MID IC will select either one input for
normal TV operation or combine two inputs into a single picture for the Twin mode. The signal from MID IC8703
will continue into OSD IC8801.
Chart 11-9b - QM board Signal Processing (continued)
IC – Signal Flow IC Name Purpose
IC8703 MID-XA (Multi Image Driver) Twin View, H freq. conversion
IC8801 OSD Buffer for video, Menu OSD
IC8805 D/A Analog Conversion
Video Process 3
Refer to Figure 11-15 to follow the signal flow. The conversion of Component video to a high-resolution picture by
the DRC and then being sized by the MID circuitry to fit on the screen is performed on the QM board. The
component video output passes through the B board into the A board. The (white) menus OSD at CN004/pins A7-
9 mix with the green OSD graphics (channel numbers, volume etc) from the main micro using Q9, Q11 and Q13.
The combined OSD signal and buffered component video are applied to Y/C CRT Drive IC3101 on the A board.
IC3101 mixes the video signal and OSD then converts the result into an RGB signal for the CRT on the C board.
HD VIDEO 5,6
FROM IC200-
COMP I/F
V MID
TO
IC8601- DRIVE
A/D SW. IS SERVICE
HORIZ. CN3101/CN9001
QM BD. MODE ENABLED
ONLY VERT. +
CN8801/ +12V 7
CN004 ALL +12V
Y A5 VIDEO 9 C15 20
IC002 1 R
C16 21 IC3101 62 IC9001
PB A4 14 SW. G CRT
3 IC9002
PR A3 16 M52055 C17 22 Y/C,CRT 63 CATHODES
DRIVE 64 B
5 IC9003
OSD R A7 C13 4
CXA2
OSD G B6 Q9, Q11, C12 5
150AQ 58 8
MENU Q13 6 IK Q9001
OSD B A9 C11
MIXER OSD 25 26
BUFF.
OSD
RGB CN001/ SCREEN
S CLK VOLT. SCREEN
P MUTE C22 CN3020 Q9002
67 10 CONT. VOLT.
IC001 P MUTE Q9014 TO CRT
MAIN MICRO 31 S DATA B19 S DATA P MUTE Q9012
M306V2MF
28 A20 G2 Q9008
S CLK CN002/ S CLK VOLTAGE
CN3022 FROM R9053 R9083
QM BD. B BD. A BD. FBT (D BD.) R9064 R9084
IC004
NVM C BD.
5TVP12 1322 8/30/01

FIGURE 11-15 - VIDEO PROCESS 3
57
DTV Tuner Processing for DTV Box Repair (HA-3 & RA-5A Chassis)
Refer to Figure 11-9 for the location of connectors and Figure 11-16 for the DTV tuner support signal diagram.
The DTV tuner needs various voltages for operation. They are easy to check at the Q box (CN7001). The DTV
tuner receives the 8VSB modulation and delivers that signal to Digital microprocessor IC7205.
DIG TUNER
1
CN7001 2 6.5V QI BD.
ALL 3
4 GND PIN1 IS
VOLT. 5 5V
FROM 6 9V CLOSEST TO
CN2002 & 3
A 1 1 B 2 CH. AUDIO
2 BACK OF TV
3 (HA-3)
CN7402 4 AB
5
6 CN5501
GRAY CN3103 CN5505
CN002/
A 1 1 B CN2003
4 25
5
7
8 1 A BD.
9
11 11 VIDEO INPUT
WHITE FROM B BD.
CN3170 CN6504
A 1 1 B CN005 CN001/
2 CN2002 CN6501
3 SUB CN6001
CN8601 5 CN6505
6 32
11 11
BLK
CN6502
CN2001 CN6003
CN4404 CN4403
FRONT OF TV
FIGURE 11-9 - HA-3 CHASSIS CONNECTOR LAYOUT 38TVP12 1354 9/4/01
IC7205 is one of three microprocessors in this TV that communicate with each other. Two are in the Q box and
the Main Micro is on the B board.
Chart 11-10 –Microprocessor Responsibilities

IC9209 MIPS CPU IC7205 Digital Micro Processor IC001 Main Micro
i Link operation Memory Stick port access Service mode & green user OSD
DTV video & audio processing TV Protection / Diagnostics
DTV Tuner control Power Supply Control
NTSC tuner control
Q box reset & Master
communications
58
There are two LEDs inside the Q box near the DTV tuner. The green LED lights when a DTV station contains the
8VSB modulation scheme. The red error LED lights when the DTV signal stream does not contain the basic
ATSC ID bits in the digital data (wrong data – not ATSC format).
TS BUS
SYNC
TO IC9202
ERR LOCK
(QI BD.)
(RED) (GRN)
D+3.3V 9
DIO,BS,INS,CLK MEMORY
IF AGC Q7606
STICK
Q7605 PORT
IC7205
CN7001 DATA 0-7 DIGITAL 10
+33V 8 DTV TUNER PROCESSOR CN8801

MAIN
BTD-DA402 ST20TP4CX605 TXD B11 TXD
+9V 6 MICRO
+5V 5 RXD A11 RXD IC001
FROM
B2 XRST (B BD.)
A BD. S DATA/S CLK XRST
CN
IC7206 A2 FL
NVM IC7401 A3 FR
+6.5V 1 IC7002 AUDIO A4 FL
2 DC-DC D3.3V DECODER ANALOG
B4 FR
CONV. STJ4600BEV IC7402-4
D1.3V A5 CENT. AUDIO
PCS D/A
(IC7804-DRC) OUT
A6 RL
B6 RR
IC7201
IC7203
IC7202 A7 LF
IC7204
FLASH
RAM
i LINK A1-A12 MEM CN7402
EMI BUS D0-D15
EMI BUS
FROM CN7002
TO VIDEO
IC9205 (QI
PROCESSING QM BD.
BD.)
FIGURE 11-16 - DTV TUNER & AUDIO 2TVP12 1319 8/30/01
The EMI bus carries the DTV digital tuner data to the MID circuit for switching into the video path. See Figure 11-
14 for the completion of the EMI bus.
SDA SCL
IC8601 A/D MID
IC8902 A2
IC8901 IC8703 MID-XA BUSY
MIDuCOM
NVM MB9489A88F B2 BOX
ANALOG RST
CN005/
SUB Y IC7807 DRC
CN8601
ANALOG CB
SUB
VIDEO IC8601 CR
FROM Y A1
IC200 PB CXA3506R
A2 YO-7,RO-7,CO-7
P A3 A/D, SW
COMP. R IC7601 IC8703
I/F DRAM MID-XA
IC7603 IC7604 CXD
IC7602 MPEG CONV. YO-7,CO-7 9509AQ
Y,C
DRAM ST17000AQA C B,
R
MID VIDEO
OUT OUTPUT
IC7807 YO-7
DRC-MF CRO-7
MAIN IC7806 YO-7,CO-7 CN8801/
MAIN CXD RBO-7
FROM Y A5 A/D CN004
IC205 PB A6 TLC5733AIPM 2095AQ (B BD.)
MAIN PR A7
SW ANALOG
VIDEO YO-7,
CO-7 A5 Y
IC8805 A4 PB
EMI D/A ANALOG A3 PR
BUS YO-7,CO-7 A6 HS
FOR IC8801OSD
B6 VS
VIDEO IC8803 YGV619
A7 OSD R
PROCESS A8 OSD G
IC8804
A9 OSD B
B BOARD SRAM QM BOARD
FIGURE 11-14 - VIDEO PROCESS 2 - DTV VIDEO 3TVP12 1320 9/6/01
59
12. Audio Block
Audio Block (HA-3 Chassis)

Refer to the audio block Figure 12-1 for the description and board flow of the audio processing.
Signal Flow
• The audio input signal hops from the B board to the S, and finally to the A where the output amplifiers are
located. The audio can either output the internal speakers or the rear panel phono jacks when the speakers
are turned OFF (from the menu).
CN4401/
CN4402 SUB
9V
IC4405 L/R
D4408 OUTPUT TWEETER
11V AUDIO
24V AMP. H
IC4401 IC4403 SPKRS
(D BD). IC4406
IC4402 AUDIO IC4404
IC4403 PROCESS LPF AMP. W L/R
IC4404 MID-RANGE
CN4404
IC4401 Q4403,10
TRUSURROUND Q4405-7
S BD.
AUDIO
IC4402 24V
Q4401-2 (D BD).
CN4401/ V/F BUGGER
MUTE
CN003 D4416
22V
B BD.
AUDIO L,R D4415
OUT A MUTE
22V
L,R IC001-MAIN
AUDIO 5 IC402 MICRO
LEFT CH. SW. SEL_L, B BD. SPKRS.
AUDIO 6 IC403 SEL_R 0V = ON
RIGHT CH. SW. 5V = OFF
U BD.
AUDIO 1,3,4 ANALOG

TUNER A BD.
MONITOR ST_L,
OUT IC401
OUT 3 A/V SW. ST_R
AUDIO2 DIGITAL
D MIX_L, QM BD.
CN008/ TUNER
H B BD. D MIX_R CN009/
CN1200 & PROCESS
CN7402
6TVP12 1329 9/4/01
FIGURE 12-1 - AUDIO BLOCK - HA-3 CHASSIS
B Board
There are three audio sources input to the B board:
• Analog TV tuners
• Video / audio jacks
• Digital tuner
On the B board, a single selection is made and both Sel_L and Sel_R audio channels pass through the A board
for processing within the S board.
60
12. Audio Block
S Board
Chart 12-1 shows the functions of all four ICs on the S board.
Chart 12-1 - S Board ICs
IC / Name Mode used Purpose
IC4401 / TruSurround When TruSurround Produces the surround sound illusion when stereo sound is
is selected from the input. S Mode from Main Micro IC001/pin 88 (CN4401/pin 6)
“Effects”menu. goes HIGH to turn on Surround Sound.
IC4403 / Audio Process All modes Controlled by serial data from Main Micro IC001 (B board –
not shown)
Sets Volume, Tone, Balance, & Simulated Mode (echo effect
for mono signals).
IC4404 / Low Pass Filter Speakers ON Passes only the low frequencies to the internal midrange spk.
IC4402 / Variable/Fixed When speakers are Rear panel audio output jacks can be used to feed an
Audio Buffer switched OFF external Dolby 5.1 channel or DTS amp or headphones.
IC4401 TruSurround
Both Sel_L and Sel_R audio signals enter the S board and are applied to IC4401. IC4401 either passes the audio
out of the IC or creates a 3D sound field when the TruSurround mode is activated from the menu. When acti-
vated, Main Micro IC001 outputs a HIGH at the “S Mode”line that can be checked at the S board (CN4401/pin 6).
Chart 12-2 shows IC4401’s control voltage.
Chart 12-2 - TruSurround IC4401 Control Voltage
Audio Effect Location Voltage
Off CN4401/pin 6 0Vdc (OFF)
Simulated CN4401/pin 6 0Vdc (OFF)
TruSurround CN4401/pin 6 5Vdc (ON)
IC4403 Audio Process

Audio Process IC4403 controls all other audio effects from volume, tone, balance, to echo effects used in the
menu’s Simulated Audio Mode and BBE Mode (RA-5A chassis only). IC4403 output takes two paths. The main
path leaves the S board as the High output. The second path goes into a Low Pass Filter IC4404 to remove the
high frequencies before leaving the board as the woofer output.
A Board
Two power amplifier ICs are fed by a zener protected 24Vdc source. One power amp processes both channels
of the high frequency signal and the other processes the low frequency signal from the low pass filter. The power
amplifiers can be muted when speakers are turned OFF from the menu. When the speakers are turned OFF, the
variable or fixed line output is enabled.
61
12. Audio Block
Normal Signal Levels
Refer to chart 12-3 for the audio signal levels throughout the audio chain. The audio signal is taken from a B&K
1064 NTSC pattern generator with 1kHz audio modulation input to the sub tuner’s channel 3. The DTV audio
level is the average volume sampled from four DTV stations.
Chart 12-3 - Audio Signal Levels

Test Location
Signal Left Right Level *
DTV Output CN7402/pin A2 (QM CN7402/pin A3 0.4Vp-p (average)
board)
Analog Tuner Main or Sub Tuner pins Main or Sub Tuner pins 1.4Vp-p (1kHz)
(A board) (A board)
B Board Output CN4401/pin 8 (S board) CN4401/pin 9 (S board) 1.4Vp-p w 5Vdc
Mid & Tweeter out to Amp CN4401/pin 1 (S board) CN4401/pin 2 (S board) 0.1Vp-p at half volume **
** 0.6Vp-p = Max volume
Low freq Output to Amp CN4401/pin 3 (S board) CN4401/pin 4 (S board) 0.018Vp-p = half volume,
0.03Vp-p = Max volume
Variable / Fixed Output *** CN4401/pin 11 (S board) CN4401/pin 12 (S board) 0.22Vp-p = half volume,
2.0Vp-p = Max volume
1.5Vp-p = Fixed output
* All effects are turned OFF from the menu.

** Output level at half volume changes to 90mVp-p in Simulated Mode or 120mVp-p in TruSurround Mode.
*** Main Micro IC001 Mute control line “A Mute”at CN001/pin A1 either selects speakers (HIGH) or the rear panel
variable / fixed audio output (LOW).
62
13. Firmware Upgrade
Firmware Upgrade
Each HA-3 direct view and RA-5A projection TV chassis contains a built-in DTV decoder. Although the main DTV
format is set by the ATSC standard for the US and Canada, changes to the fine DTV transmission will take place
as the format details are ironed out. To maintain future compatibility in the face of changing standards, the DTV’s
flash memory can be upgraded (replaced) with data from a plug-in memory stick.
Upgrade Procedure:
The upgrade requires the technician to insert the memory stick when the TV is OFF. The TV must then be turned
ON to recognize the memory stick and begin the upgrade. The upgrade status LED (TV rear panel above the
memory stick port) begins flashing while the TV’s OSD displays “Memory Upgrade Mode”on the screen. When
the screen goes dark, the upgrade is in progress. All the TV user functions are inhibited until the upgrade is
finished. At the end, the upgrade status LED changes the blink rate to indicate a successful or unsuccessful
upgrade completion. It flashes quickly for success or stays ON for one second. When unsuccessful, it stays OFF
for two seconds while flickering. The memory stick must be removed to resume TV operation or left inserted for
another attempt.
Technical Upgrade Operation
Refer to Figure 13-1 for the technical operation.
Q5V
QI BD. QM BD.
D7204
UPGRADE
IC9209
MIPS CPU Q7203 RB7221
uPD3020d CN7202
22 OHMS
HB 163 1 GND
SYS
BUS BUS CN9201/ 142 2 7 2 BS
CN7002 XILM RST 3
55 A13 167 IC7205 139 4 5 4 D10
IC9205 XRST MEMORY
DIGITAL 5
BRIDGE STICK
PROCESSOR
uPD82442GN EMI BUS 143 1 8 6 INS PLUG-IN
ST20TP4CX605
7
154 153 156
D0-D15 140 3 6 8 SCK
EMI
A1-A12 136 166 165 162 9 VCC
CE0 CE1 OE BUS D3.3V 10
IC9210-2 CN8801/CN004
FLASH IC7201-2
FLASH A1 GRANT (39) TO B BD.
MEMORY TXD
MEMORY B11 RXD (36) MAIN
RXD MICRO
A11 TXD (35)
XMST 6 IC001
BOX
RST IC7209 13 B2 (PINS)
RST (61)
RESET Q7202
FIGURE 13-1 - MEMORY STICK UPGRADE CIRCUIT 26TVP12 1343 8/30/01
1. The upgrade memory stick must contain two files and supporting data. Insert the Memory Stick into CN7202
(QM Bd) to begin the upgrade. The memory stick brings the INSERT line at CN7202/pin 6 LOW.
2. IC7205 responds by flashing the D7204 LED.
63
3. IC7205 (QM Bd) uses TXD and RXD to communicate with Main Micro IC001 (B Bd). When IC7205 requests
a memory upgrade operation, IC001 must interrupt the normal TV operation.
Waveform 13-1 shows typical Q box to Main Micro IC001 (B Bd) bi-directional communications. Normally
there is only periodic communications and then only when needed. This waveform was taken when changing
into a DTV station (channel up command). In the waveform sequence, notice that the Main Micro starts the
communications (ch 2) and the Q board micro replies afterwards (ch 1). When changing into NTSC stations
that do not require the Q box to select a station, there is no (ch 1) reply. Note that the output of the Q box is
5Vp-p and the reply signal from IC001 is only 3Vp-p.
Ch 1
T
Ch 2
2
CH1!2.00 V=
CH2!2.00 V= MTB2.00ms- 5.82dv ch1-
Waveform 13-1 – Microprocessor Communications* QM – B Board

Channel Signal Name Location Vp-p
1 RXD to Main Micro CN8801/pin B11 3Vp-p
IC001 (B Bd)
2 TXD CN8801/pin A11 5Vp-p
Time Base = 2msec/div.
* Taken when channel changing into a DTV station. When changing to
another NTSC station, RXD signal (ch 1) from the Q box is not present.
4. Main Micro IC001 displays “Memory Upgrade Mode”on the screen.

5. Main Micro IC001 then blanks the screen and outputs a Grant and reset (XRST) line to begin the upgrade.
After resetting the Q box microprocessors, IC7205 and IC9209, the upgrade sequence starts.
Chart 13-2 - IC001 Outputs to Q board to begin Memory Upgrade

IC001 Output Location Voltage
Grant CN8801/pin A1 (QM Bd) HIGH
XRST CN7201/pin A2 (QM Bd) Momentary LOW
6. IC7205 checks for the first folder of data and if present, loads these files into the two Flash Memories (IC7201-
2) on the QM board.
7. Next IC7205 checks the memory stick for the second folder. When found, IC7205 instructs MIPS CPU
IC9209 to complete the loading process.
8. MIPS CPU IC9209 loads the second folder into two flash memories (IC9210-1) on the QI board via IC9205.
Bridge IC9205 serves as an interface IC between the EMI and HB bus completing the communications path.
9. When finished, MIPS CPU IC9209 sends an OK to IC7205 using bridge IC9205 and the EMI bus.
10. IC7205 pulses LED D7204 in a pattern to indicate success or failure. If failure, the cycle repeats as long as
the memory stick is inserted.
11. Removing the memory stick permits IC7205 to inform Main Micro IC001 of the successful upgrade.
12. To return to normal TV operation, IC001 outputs a XRST momentary LOW to restart the Q box but this time
the Grant line is kept LOW for normal operation. This is listed in Chart 13-3.
64
Chart 13-3 - IC001 Outputs to Reboot
IC001 Output Location Voltage
Grant CN8801/pin A1 (QM Bd) LOW (no upgrade)
XRST CN8801/pin B2 (QM Bd) Momentary LOW
13. IC7205 informs IC001 the boot up is complete.

14. IC001 unblanks the CRT resuming normal TV operation.
Upgrade error
IC7205 pulses the rear panel LED D7204 to show an error code if:
• IC7205 discovers there is no first folder on the memory stick.
• After loading the first folder, IC7205 discovers there is no second folder for IC9209 to upgrade.
• Memory stick is not making good contact.
65
14. HA-3 TV Chassis Board Replacement
HA-3 TV Chassis Board Replacement
Board Circuits Fuses Zeners After board

# Load # Purpose Replacement
A Standby Power R6002 Primary PS D4415, +24V OVP No Adjustments
Supply D4416 Audio Out
Degaussing circuit B+
Primary Power D6017 6.8V for
Supply (9V, 5V, pwr OFF A
3.3V) mute
H&V D6015,20 Q6.5V
Oscillators/Jungle OVP
Both Tuners
Audio output
B Video processing None None Transplant memory

and audio switching. IC004 containing
Closed caption/V system and user
Chip data, including analog
tuner active stations.
Main Micro IC001
** see note below.
OSD (Menu)
C RGB CRT signal None D9010 G1 Volt Adj Screen control
amplifiers limiter according to the
service manual:
Reduce vertical size
to see IK line at the
top. Blank pix in the
service mode* by
changing CXA2150P-
2/ALBLK data from 0
to 1. Adjust screen
control so the IK line
is just invisible in a
dark room.
Adj H Static Control
66

# Load # Purpose Replacement
D
A Secondary Power
Standby Power R6236
R6002 Sec PS PS
Primary D6508=33V
D4415, Reg
+24VTuner
OVP Transplant memory
No Adjustments
Supply (+200V, voltage IC5501 containing
+135V) PS6501, 24V Audio deflection
PS6502 Output parameters.
Protection latch D6025=33V HV limit
circuit D8006=13V Adj Focus (on FBT).
R8051 Hi Volt PS
HV Regulator circuit Enter the service
Corner focus circuit D6004=5V HV Protect mode* and perform
ref touch up geometry
Top/bottom R5096 200V adjustments to D-
pincushion circuit Video Conv/CXA8070,
H Output / V Output Output CXA2150D-1 and
CXA2026 data.
D5031=17V Fbk pulse Adjust HV RV8002
limiter for 31.5kV. Adjust
R5097-8 H HV shutdown
Centering RV8001 according to
R5099 Filament safety related adj. in
the service manual.
R5576 DQP Amp D5004=12V MOSFET

(corner Protect
focus)
R5711 Conv Yoke D5007 DQP mute
R5712 Amp at pwr ON
F AV loss detection F6701- Main AC – None No adjustments.
circuit 6A
Degaussing relay
Q Box DRC for line None D7803 3.9V Reg No adjustments.
doubling for IC7805 Enter the service
(Qi, (Write PLL)
MID for twin pictures mode and verify the
QM QM Bd. TV ID (group #19).
Bds) DTV Tuner and
video processing ** see note below
S Audio Processing None D4408-11V Sub 9V line No adjustments.
OVP
D4401-2 = line input
10V protection
U Rear panel None None No adjustments.

input/output
connectors.
W Velocity Modulation None None No adjustments.
circuit to improve W board Note position of coils
detail. clamp Pix on CRT neck before
Top/bottom tube removing the old
Pincushion and board or corner
G1 distortion will occur.
corner focus coils.
67
* Enter the service mode from the remote control buttons: Display, Ch 5, Vol +, Power. See the Convergence
Adjustment Overview chapter for more information about the service mode.
** After replacing the B board or Q box you will find that the plugs to CN8801 and CN8601 are the same.
Cables from Q box to CN004 and CN005 should cross. See Figure 14-1.
Main & Sub Sw B Bd.

Q Box Main
Path A/
V
CN005
Sub Path Video
Inputs
CN8801
CN004
CN8601
CN001 CN001 Diagram 41
NVM Contents
TV’s Non Volatile Memory (NVM) Contents
B board IC004 D board IC5501 QM board IC7206 and IC8901
Active Analog & Digital TV Deflection parameters Picture parameters such as size, position, etc
stations & last channel/video (raster parameters not video) (video parameters not raster)
User Picture / Audio settings CRT Drive settings Single and Twin pix parameters
User Operation settings (DRC) Freeze pix settings
Close caption
Service mode model ID
68
15. Convergence Adjustment Overview - HA-3 Chassis
Convergence Adjustment Overview – HA-3 Chassis

HA-3 Adjustments are performed after CRT, D board or EEPROM replacement. The details are explained in the
service manual. With so many details, the technician needs to get an overview of the adjustments so he can
determine what he may see if his adjustment affects others. Generally, because the horizontal TV frequency is
fixed at 33.5kHz for all four picture modes, there are less picture size and geometry adjustments than other
HDTVs. Often, copying the main Full Mode data to the other modes is all that is required without touch up.
Service Mode Access (conventional)
In Standby (power OFF), point the remote to the TV and press the following four buttons in sequence:
Display, 5, Volume + and Power On.
Service Mode Categories (Groups)

There are so many service mode adjustments possible that they are grouped into “categories”. Within the
category are “items”that you can adjust. Finally changing the “data”for the item will make the adjustment. See
Figure 15-1 below:
FIGURE 15-1
Service Category Data Service

Service Item Video 5
480i
WSL = 0
F/A Flag: 11110111

CBA Flag: 11111111
Chart 15-1 on the next page summarizes the service mode categories for the HA-3 TV chassis. The RA-5A
chassis has an additional PJE category for convergence. Use the 2 (up) or 5 (down) remote buttons to change
categories in the service mode. This chart permits you to get to the category faster and prevents you from
missing the category. Locate the category you are at on the chart and then determine where you want to go. You
can then take the shortest path (up or down) to get there.
69
15.Convergence Adjustment Overview - HA-3 Chassis
Chart 15-1 - HA-3 Chassis Service Mode Categories
Category NVM Data Purpose Copy
Location (Board) Function ?
Version Q Box Versions of ICs in box
3D-Comb B Y/C separation parameters
2103 (1-2) B NTSC pix parameters
2150P (1-4) D CRT Drive settings
2150D (1-3) D Deflection parameters Yes
D-CONV D Corner Convergence Yes
CXA2026 D Focus, Corner Conv. Yes
CXA2151 B NTSC Sync, YUV* gain
MID (1-5) Q Box Video (pix) parameters
CXA3506R Q Box Contrast settings
BH3868 B Audio settings
TDA7312F,R,C B Audio settings
SNNR D Noise reduction
CCD B Close Cap parameter
DTV Q Box Signal Info, test pattern
TP Q Box Modl, Dmy1 ?
OP B Main Micro Version, OSD
position
ID B Model /Feature Codes
* YUV = Component Video (Y, Pb, Pr or Y, Cb, Cr)
Convergence Adjustments - Overview

These adjustments are found in the 2150D (1-3), D-CONV, and CXA2026 catagories of the service mode. They
should be performed in the sequence given (by following the stepped procedure in the service manual). In other
words, place the TV in the FULL picture mode form the menu and perform the adjustments starting with “H
Centering”and finishing with “Outer vertical bow”. Next, switch to the NORMAL picture mode using the menu and
perform “Vertical Pin”and so on. Do not perform the High Definition 1080i Mode adjustments first and then the
Full Mode adjustments. Always check the Full, Normal, Zoom, Wide Zoom and finally the High Definition 1080i
Modes while adjusting in that order.
Full Mode
1. H Center 11. H Linearity
2. V Position 12. H Middle Pincushion
3. V Size 13. H. Outer Pincushion
4. H Position 14. Top and Bottom Pincushion
5. H Size 15. Vertical Keystone
6. V Centering 16. Left and Right Vertical Slant (Angle)
7. V Pin 17 . Overall Vertical Slant
8. H Keystone 18. Vertical Bow
9. Vert Linearity 19. Outer vertical Bow
10. S Correction
70
Normal Mode
Vertical Pincushion
Zoom Mode
1. Vertical Size
2. Vertical Position
Wide Zoom Mode
1. Vertical Center (Video) 4. Horizontal corner Pincushion
2. Vertical Size 5. Vertical Keystone
3. Horizontal Outer Pincushion
High Definition 1080i Mode
1. Vertical Size
2. Vertical Position (Video)
3. Horizontal Position (Video)
Data Copy Function

The copy operation is only found in the service mode categories that contain convergence data. See Chart 15-1.
The purpose of the copy function is to copy the data within that category from the Full Mode to the other display
modes such as Normal and Zoom. The data should be the same in this TV because the deflection has not
changed in these other modes (horizontal frequency is always 33.75kHz in all picture modes). The different
modes are accomplished by changing the video signal.
Procedure
1. Perform convergence or geometry adjustments in the FULL Picture Mode.
2. When you finish making adjustments to that category, use buttons 1 and 4 on the remote to go to the “CPY”
item in that category (CPY 1, CPY 2 or CPY 3 is the last item in the category).
3. While on the CPY item, Change its data from 0 to 1 (button 3).
4. Press the Mute button.
5. Press the Enter button.
The data from the Full mode in the category you are in is copied to the remaining picture modes.
Internal Video Pattern Generation

The Q boards can generate patterns in 1080i, 720p, 480p and 480i when receiving a DTV station.
1. Enter the service mode.
2. Go to a DTV station or input a 1080i video input, otherwise the patterns will not be displayed.
3. Select category “DTV”(buttons 2 and 5).
4. Select item #1 (PATN) using buttons 1 or 4. You can select 1080i, 480 or 720p video patterns by choosing the
data numbers 1-39 (buttons 3 and 6) as shown in Chart 15-2.
71
15.Convergence Adjustment Overview - HA-3 Chassis
Chart 15-2 - Generator Patterns
Pattern Data # Data # for Data # Data # for
for 1080i 480i for 480p 720p
pattern pattern pattern pattern
Black screen 0 16 26 36
Cent Hatch 1 11 21 31
Color Bars/B-W 2 12 22 32
White Square 3 13 23 33
Color Bars 4 14 24 34
White 5 15 25 35, 37,40
Black 6 16 26 36
Gray scale 7 17 27
Low to High 8 18 28 38
Freq Sweep
Gray 9 19 29 39
Diamond 10 20 30
The video patterns are generated on the QM board taking the following path to OSD IC8801 in Chart 15-3.
Chart 15-3 - Video Pattern Generation
IC Bd Name Purpose
IC7205 / QM Dig Process Stores the pieces of the
ST20TP4CX604 video pattern
IC7203,4 / QM D RAM Lays out the pieces
GM71VS65163 (map)
IC7603 / QM MPEG Inserts the map into the
STI7000AQA Decoder video chain
IC8801 / QM OSD Pass-through out of the
YGV619 bd.
Alternate Video 5/6 input Path – used for troubleshooting only

(Q box video bypass is NOT fully tested)
Purpose
All video must pass through the Q box, including TV. When the Q box video path operation is in question, HD
1080i video 5 or 6 input can be routed in a direct path to the CRT if the service mode is operational.
Alternate Signal Path
This alternate path is from the input, B board, A board and C board to the CRT for a normal picture. Refer to
Figure 15-2 and see the Video Processing for details of the alternate signal path.
72
DTV
TUNER &
PROCESSOR
QM BD. HD
PIX
MID
OSD
PROCESS
RGB OUT
TO C BD.
VIDEO COMPONENT IC002 Y/C

5,6 I/F SW. CRT DRIVE
HD INPUTS HIGH DEF

PASS-THROUGH
480p SERVICE MODE ENABLED
U BD. 720p
B BD. A BD.
1080i
FIGURE 15-2 - HD VIDEO PATH 10TVP12 1328 8/31/01
Procedure
Rerouting the HD video path is done from the service mode. The Q board must remain connected (CN8801 for
communications and CN7001 for power) for you to see the servicing mode OSD to make the change.
1. Enter the service mode (Display, 5, Volume +, Power On).
2. Select category “OP”(buttons 2 and 5).
3. Select item “HDPT”(buttons 1 and 4) (HDPT means High Definition Pass Through, item 5).
4. Change its data from 0 to 1.
Only a 1080i video input signal will display a picture because it solely has a 33.75kHz signal frequency that
matches the TV’s horizontal frequency of this Hi-Scan TV. All the other signal inputs must be converted by the
MID circuitry within the Q box (Q boards) to view. Chart 15-4 shows the horizontal frequency of the DTV formats
at the popular 60Hz Vertical frequency.
Chart 15-4 – Input signal H. Frequency

Input signal Horizontal Frequency
Standard NTSC 480i 15,734 Hz
High Resolution 480p 31.5kHz
High Resolution 720p 45.kHz
High Resolution 1080i 33.75kHz
73
RA-5A Chassis Board Layout
74
17. RA-5A Chassis Overall Block
RA-5A Chassis Overall Block

The HA-3 Direct View TV Chassis and the RA-5A Projection TV chassis share almost identical B and Q boards
(except for software), making the video processing flow the same. The two sets differ in the location of power
supply and convergence stages. Refer to Figure 17-1 for the descriptions of these stages.
SPLITTER/
ISOLATOR
MAIN DTV
VIDEO VIDEO A DRC
IC401 ANALOG TUNER
IN SYNC
A/V VIDEO
(U, HB SUB
SW. PROCESS
BD.'s) VIDEO B
SYNC
MID
TUNER B
Hi-SCAN
TUNER
IC001 VIDEO
A
MAIN MICRO B BD.
Q BOX
SYNC
6 SCREEN R DRIVE CR R
A BD.
AC SENSORS
ANALOG
TUNERS RELAY I3006
H+V G DRIVE CG G
VIDEO
AD PROCESS
MAIN BD.
RGB CB
SW. B DRIVE B
PROTECT D BD. R
IC8003
SEC RH GH BH G V DY
V DRIVE
ON/OFF P.S RV GV BV
HIGHER B
RY6501
VOLTAGES
G BD. HV CONVERTER HV
IC8001,
PRIM IC8002
STBY H DRIVE H DY
P.S CONVERG.
P.S DEFLECTION
STANDBY LOW AMPS
5V VOLTAGES
FIGURE 17-1- RA - 5A CHASSIS OVERALL BLOCK 49TVP12 1351 8/31/01
Power Supply
The entire low voltage power supply is located on the G board. The standby power supply delivers 5V to the Main
Micro on the B board so it can respond to the power ON command form the remote or front panel. When the TV
is turned ON, the Primary power supply delivers low voltages to the “Q” (DTV decoder) box, the A, AD and B
boards.
Deflection and HV stage voltages (D board) are not present until the secondary power supply runs, so the TV is
still dormant in its initial stage. The Main Micro and Primary power supply start the secondary power supply to
complete the remainder of the voltages for set operation. The high voltage power supply starts after the horizon-
tal deflection operates.
Deflection
When the Primary power supply runs, it develops voltage to start the horizontal and vertical oscillators in Video
Processor IC3006 (A board). The horizontal oscillator from the A board is sent to the D board to produce the H
Drive signal used by the horizontal deflection amplifiers and HV stage (D board).
75
17. RA-5A Chassis Overall Block
The vertical stage also starts on the A board, but does not deliver its drive signal into the D board without commu-
nications from the Main Micro. The vertical oscillator IC3006 (A board) initially produces only vertical timing
signals (VTIM is not shown) that are applied to Main Micro IC001 (B board). IC001 uses VTIM to output serial
communications data and clock signal to ICs on the I2C bus line during the vertical blanking time. This bus line
includes IC3006, which originated the VTIM signal. When data and clock are received by IC3006, this IC can
then output the vertical drive signal from the A board. The V drive feeds deflection IC8003 on the D board. This
completes the vertical and horizontal deflection signal flow.
Video Process
The video processing encompasses the A, B, Q and the three C boards.
B board – Air or cable analog NTSC signal comes into the two tuners mounted on the A board before outputting
composite video to the B board. The tuner video and video 1-6 is applied to A/V Sw IC401 for selection. Two
selections are output. One will be used as the main picture and the other as the sub picture if the Twin View
feature is called for. Both component video outputs are sent to the Q box.
Q Box - The main and sub component video and corresponding sync are sent to the DRC (main picture) and MID
(sub picture) stages in the Q box. Here digital ATSC signals are received from the DTV tuner, processed and
made available to the MID circuit for selection. The MID circuit chooses one (or two if in Twin View mode) and
outputs a high-resolution video signal to IC3006 on the A board. The video signal was also changed so its
frequency matches the 33.75kHz frequency of the horizontal oscillator in IC3006 (A board). Separate sync lines
also go to IC3006 on the A board.
A board – Both sync and component video are sent to the A board. The V & H sync signals are applied to IC3006
for oscillator lock and to supply the convergence circuitry in the AD board. The component video is input IC3006
and converted to RGB. The RGB signal feeds the three CRT’s cathodes.
Convergence
Convergence and Flash focus are independent operations sharing the same microprocessor and memory IC on
the AD board. The AD board plugs into the A board.
Convergence – The purpose of this circuit is to modify the magnetic field in the main yoke of all three CRTs so
their colored pictures become merged as one on the TV screen. There are two outputs from this board. One
output is the main convergence signal consisting of RGB vertical and horizontal signals that feed the two conver-
gence amplifiers on the D board. These convergence amplifiers output a final convergence signal that is applied
to the convergence yoke within the main yoke. The second output is a pattern signal consisting of an RGB signal
that is sent to Video Processor IC3006 for OSD. The pattern signal can be a crosshatch pattern for convergence
or positioning boxes flash focus adjustment. Convergence settings are stored in a NVM IC within the AD board
and shared with flash focus position information. This information should not be confused with Geometry settings
for all three CRTs that are stored in a NVM (memory) on the A board.
Flash Focus – This user operation on the AD board automatically adjusts centering and now also adjusts size and
linearity (new). The flash focus circuit produces a TV screen pattern using RGB output from the AD board into the
A board’s IC3006. The OSD positioning boxes are monitored by six sensors mounted at the screen edges to
provide feedback to the AD board’s flash focus circuitry for adjustment. The picture is converged and the center-
ing, size and linearity data is modified in the memory on the AD board.
76
18. RA-5A Chassis - Power Supply Block
Power Supply Block (RA-5A Chassis)

The RA-5A projection TV chassis is similar in operation to the direct view HA-3 chassis, but the layout is confined
to one board for simplicity. Refer to Figure 18-1 for a description of the power supplies and the power ON
sequence.
AC INPUT TH6001 STANDBY+5V

R6057 IC6106, T6003
OVP Q6010, SOURCE
STBY P.S
D6016
D6015 SUB 6.5V
LATCH Q6105, D6130

POWER IC6002
Q6119 R6099
ON RY6001 T6004 D6183
+11V
R6010 PRIMARY D6115
F6001 +7V
P.S
10A RY6002 D6001
STANDBY
SURGE D6051 C6036
5V VC1 (ENABLE 1)
RELAY Q6004 R6041 D6049
Q6005 D6105
LATCH PS6101,2
Q6120 +22V OCP +- 15V
+15V OVP
Q6101 D6105
V SENSE (ENABLE 2) IC6001 +22V
B+ ISOLATION T6001 PS6103-6
AC AC IN OVP OCP Q6001, SECONDARY -22V
RELAY Q6003 P.S D6104
Q6105, PH6003, +135V
D6124 B+
G BD. Q6119 Q6104 D6116
LATCH OVP +19V
CN6101/ STBY+5V
CN3016 D6123 -19V
D6114
4 5 7 6 1 9
D3009
H PLS MAIN
A BD. VIDEO
DET SW.
PROC.
Q3037
IC3006/34
C26 A25 C25 A26 C28
CN3020/
CN001 AC
RELAY Q522
STBY
B BD. IC001 MAIN MICRO LED
R017
FIGURE 18-1 - POWER SUPPLY BLOCK - RA-5 A CHASSIS 21TVP12 1339 8/31/01
77
Power Supplies
Chart 18-1 shows that there are four power supplies found in the RA-5A projection TV chassis. Each power
supply starts one at a time dependent upon prior stage operations for safety.
Chart 18-1 – RA-5A Power Supplies
Name Startup Requirements Purpose
Standby AC input Standby +5Vdc for Micro IC001 on B board
Primary AC relay (RY6001) & surge relay ?? Powers the Q Box and circuits on the A board.
(RY6002) closes
?? VC1 Starts the Secondary PS.
Secondary 1) Primary PS outputs VC1 (HIGH at ?? 135V for H Deflection, HV, Tuner (A & D Bd);
D6049)
?? 22V for Convergence IC Amps (D bd
2) Main Micro outputs Main Sw HIGH
?? 15V for V Deflection and Op amps (D bd)
(CD6101/9)
3) Surge relay RY6002 must energize. ??
19V for Audio Output (K Bd)
HV 1) 135Vdc (CN8013/9, D board) Develops, regulates and checks the High Voltage to
Converter 2) 12Vdc (CN8016/1, D board) the three picture tubes.
(not shown)
3) H Drive (CN8006/10, D board).
Standby PS
This is a simple 60Hz step-down transformer power supply with a 5V regulator IC6106 at the secondary. The only
unique part in this supply is the TH6001 thermistor in series with the primary winding. Since T6003 is working 24
hours a day, TH6003 prevents T6003 damage if the line voltage goes high for a prolonged time as commonly
occurs during summer. If the abnormally high AC input voltage causes T6003 to draw more current, TH6001 will
increase resistance to offset the current draw, preventing the transformer from over-dissipating. TH6001 mea-
sures 24 ohms cold and R6057 = 4.7 ohms.
The standby 5 volts can be easily checked at the G board’s CN6101/pin 1. See Figure 18-2 for the G board
connector locations. Pin 1 of each connector is at the right.
CN6102 CN6101
CN6104 CN6106
G Bd. Prim
R6099
Second
AC In R6041
Figure 18-2 - G Board Connectors
Primary PS
The primary power supply starts as soon as the Main Micro IC001 B board turns on the AC relay RY6001. Only
three voltages are output and are sent to the A board. From the A board, various voltages are sent to the QM, B
and AD boards (final destinations). Chart 18-2 shows these destinations:
78
Chart 18-2 – Primary Power Supply Voltage Distribution G Bd to A Bd
Primary PS Output Location A board Destination Output Final Destination
Sub 6.5V (digital) CN6104/pin 8,9 CN3015/pin 1,2 6.5Vdc QM board CN7001/pin 1,2.
11Vdc CN6104/pin 1 IC3002 Regulator 9V QM board CN7001/pin 9.
IC3005 Sw Regulator Sub 9V B board CN3020//pin C4,5
9V A board IC3021 5V Regulator
7V or 6.5V (analog) CN6104/pin 2,3 IC3003 Regulator 5V QM board CN7001/pin 5.
IC3007 Sw Regulator 5V B board CN3020/pins C6,7
5V AD board CN3012/pin 17,
Secondary PS
The secondary power supply starts after being enabled by the primary power supply, the Main Micro and the
surge relay. Figure 18-1 shows that the primary power supply makes VC1 to enable the secondary supply. The
second enable line comes from the Main Micro IC001 as a “Main Sw”HIGH voltage (CN6101/pin 9 = 5V) about ½
second after power ON. The third enable comes from the surge relay RY6002. If the RY6002 contacts close
before the capacitor in the Q6004/5 latch circuit charges, the latch does not activate and the V sense 2 line into
the secondary power supply is enabled. The secondary power supply may now power up because its V Sense
input is allowed to go HIGH.
All secondary PS outputs are fused, except the 19V and 135V lines. This power supply is connected to the D
(deflection) and K (audio) boards. The D board supplies 15V and 135V to the A board. The destinations for the
secondary power supply are listed in Chart 18-3.
Chart 18-3 – Secondary Power Supply Voltage Distribution
Primary PS Output Location D board Destination Output Final Destination
+15Vdc CN6106/pin 1,3 IC8003 Vert Out
IC8004 Regulator 12Vdc
Through to A board +15Vdc A board CN8004/pin 8,10
19Vdc CN6102/pin 7,8 Through to K board 19Vdc K board CN2104/pin 7,8
+22Vdc CN6106/pin 4,6 IC8001/2 Conv Amps
135Vdc CN6106/pin 9 H Drive, HV Conv
Through to A board 135Vdc A board CN8006/pin 10
Power ON
The power ON sequence is similar to the HA-3 chassis (model KD34XBR2). Pressing the front panel or remote
control ON button activates power ON. Main Micro IC001 responds by energizing the AC relay (RY6001), which
powers the primary power supply. The primary power supply and Main Micro then turn ON the secondary power
supply to supply the remaining power to the TV set for operation. The sequence is summarized in Chart 18-4.
79
Chart 18-4 - Power On Sequence
Step Action Verification
1. Press Power On Main Micro receives the command
button
2. AC Relay activates Main Micro (B bd) activates AC relay RY6001 (G bd) G board CN6101/pin 4 =
5Vdc
3. Primary PS powered B+ applied to primary PS to start & run G board CN6106/pin 8 or 9
= 6.5Vdc
4. Surge Relay Primary PS output Sub 6.5 energizes surge relay G board - Feel for click in
activates RY6002 rear relay RY6002. RY6001
is nearest the line cord.
5. Secondary PS is VC1 voltage (15V) from Primary PS D6049/C enables G board - D6049/Cathode =
enabled 1. the secondary PS. 15.6V minimum
6. Secondary PS is Main Micro IC001 turns on Secondary PS. G board CN6101/pin 9 =
enabled 2 5Vdc
7. Secondary PS Secondary PS starts and runs powering TV G board CN6106/pin 9 =
powered 135Vdc
8. VTIM (vertical Video Processor (Jungle) IC3006 on A board gets A board CN3014/pin 1 =
timing) pulses input 9Vdc operating voltage from Primary PS and outputs 11V (regulated to 9Vdc on
Main Micro IC001 VTIM pulses to IC001 and IK test drive to CRT (in V the A board)
blanking area of the CRT above the screen)
9. Picture appears Main Micro IC001 instructs Video Process IC3006 to A board Serial data port
output vertical drive and unblanks picture if IK signal CN3009/pins 10 (data), &
is OK. pin 11 (clk).
FIGURE 18-3
G board
D6049
RY6002
AC input
80
19. Projection TV RA-5A Chassis Power Supply Board Tests
G Board Tests (RA-5A Chassis)

Unlike other Sony projection TV chassis, the power supply in the RA-5A chassis will operate unloaded when
turned ON. There are several ways you can power the G board, depending upon how much time you have: The
first method is the fastest:
A. Power the G board and check output voltages (protection circuits operational).
B. Power Up the G board removed (protection circuits operational).
C. Powering up the G board power supplies after parts replacement.
A. Power the G board and check output voltages

Use this procedure to determine if the power supply G board is either being loaded down externally or is defec-
tive. The outputs from the G board can be unplugged and the TV powered ON to see if the G board is OK (can
produce the normal output voltages).
Necessary Materials: 1k ohm resistor, DVM, remote.
Procedure:
1. Plug the TV set into AC and verify the Standby 5Vdc from the G board at CN6101/pin 1.
2. At the G board, unplug output voltage connectors CN6104 (to A board), CN6102 (to K board) and the CN6106
(to the D board). Leave control connector CN6101 plugged in.
3. Turn ON power from the remote or front panel. The power supply board will come ON and produce all
voltages labeled at the connectors. The schematic and measured voltages are listed in Chart 19-1. Most
voltages will remain at the terminals even when the TV is shut down because these lines are completely
unloaded (unplugged). Cold ground is either at the connectors (labeled) or at the heat sink of D6105 near
CN6106.
Chart 19-1 - Unloaded Output Voltages from the G board
Pin CN6104 to A board CN6102 to K board CN6106 (to the D board
# Schematic Measured Schematic Measured Schematic Measured
1 11V 11.3V * 11V 14.75V -15V -15V *
2 7V (A) 7.4V * -15V -14.2V Gnd
3 7V (A) 7.4V * -15V -14.2V 15V 14.75V
4 Gnd Gnd -22V -22.5V
5 Gnd Gnd Gnd
6 N/C Gnd 22V 22.5V
7 Gnd 15V 14.15V Gnd
8 6.5V (D) 6.9V 15V 14.15V N/c
9 6.5V (D) 6.9V * Unloaded. Needs to be 135V 135.3V
10 Gnd manually discharged.
4. Sampling one voltage from each connector will only tell you if the primary and secondary power supplies are
working. All voltages need to be measured because there are fuses on various lines. If the voltages are
present, the G board is OK.
5. Caution - Before plugging the connectors back into the G board, you must discharge the unloaded voltages
to avoid damaging parts. Touch a 1k-ohm resistor to the following * unloaded terminals and ground: CN6104/
pin 1 (11V), CN6104/pin 2 (7V) and CN6106/pin 1 (-15V). Hold the resistor at each terminal for 10 seconds.
The remaining voltages will dissipate within 10 seconds.
81
B. Powering Up the G board removed from the TV Chassis
When the board is removed from the chassis, the micro that turns ON the two power supplies must be simulated.
Two jumper wires must be installed - the first to bypass the AC relay and the second to enable the secondary
power supply. If good, the G board will then power up and produce all the voltages listed in Chart 19-1.
Required Materials: Soldering iron, short wires, AC cord, DVM, 1k ohm resistor.
Procedure:
1. Remove the G board. Be careful of the voltages across the larger capacitors (350Vdc max).
2. Plug AC into CN6001 (by the glass fuse).
3. Verify “Standby 5Vdc”from the G board at CN6101/pin 1.
4. Unplug the AC and place a jumper wire across CN6101/pins 1, 4 and 9.
5. Plug the board into AC. Both Primary and Secondary power supplies should work and you should be able to
measure the voltages at connector CN6104 (chart 1). If the AC relay does not remain ON, the protection
circuit has sensed a problem on the G board such as excessive output voltage or a defective latch.
6. To check the other voltages, the secondary power supply must be turned ON. Place a jumper wire across the
B-E of surface package Q6003 (near heat sinked Q6007). See Figure 19-1 to locate Q6003.
B
C
E
7. Plug the board into AC. You should be able to measure the remaining output voltages (Chart 19-1).
8. Caution - Before plugging the connectors back into the G board, you must discharge the unloaded voltages
to avoid damaging parts on the A and D boards. Hold a 1k ohm resistor to the following * unloaded terminals
and ground. Connect the resistor at each terminal for 10 seconds. CN6104/pin 1 (11V), CN6104/pin 2 (7V),
CN6106/pin 1 (-15V). The remaining voltages will dissipate within 10 seconds.
C. Powering up the G board power supplies after parts replacements

To avoid damaging the new parts installed to the primary or secondary power supplies, it is important to gradually
apply power to the parts so you can detect a problem before the parts are damaged. In the following steps you will
start the oscillator IC using an external power supply, then gradually bring up the input AC voltage with a variable
AC transformer (Variac) while monitoring the AC input current and output voltage. The output voltage will be kept
at a minimum by disabling the regulator circuit.
Needed Materials: Soldering iron, short wires, AC cord, DVM, 1k ohm resistor, 68k ohm resistor, diode, 16V DC
power supply, AC Variac, scope.
Procedure:
Running just the Primary Power Supply
1. Place a jumper wire across the contacts of AC relay RY6001. See Figure 19-1 for the location of parts.
2. Short PH6005/pins 3-4 to disable the regulating circuit. This prevents the oscillator from pulsing on and off at
low AC input voltages before regulation takes over.
3. Connect a 68k-ohm resistor between IC6002/pins 1 and 7.
4. Connect the band end of a rectifier/diode to IC6002/pin 7. The diode protects your power supply by prevent-
ing the TV’s DC from entering your supply.
5. Connect the anode (unbanded) end of the diode to an external variable DC power supply.
6. The external power supply’s negative lead goes to HOT ground at large cap C6010 neg. terminal or D6001’s
heat sink nearby.
7. Bring the external power supply to 12Vdc (23ma).
8. Connect one end of an AC line cord to CN6001 and the other to the AC Transformer (Variac) set to 0Vac.
82
9. Place your scope at Q6009/Drain of the primary power supply. Gradually increase the Variac voltage. The
square Waveform 19-1 will start at 16Vac and gradually increase in amplitude. Make sure the waveform is flat
on the top and bottom and its Vp-p is at the same level as the DC voltage from main rectifier D6001. For
example at 20Vac, there is 60Vdc from D6001 and waveform should be 60Vp-p. Waveform 1 shows the
square shape at 20Vac input to the TV.
ch1: pkpk= 57.6 V
ch1: freq= 220kHz

Figure 19-1
CN6106 CN6101 CN6102 CN6104

1
G Board - RA-5a Chassis

CH1!10.0 V~ MTB1.00us ch1- Bottom view
Waveform 19-1 - Primary PS Output – 20Vac PH6005 Q6009
input PH6002
Name Location Voltage/div 1
Channel 1 IC6002 Q6009/Drain 57Vp-p
Output
Sec PS
Time base 1usec/div IC6001
Waveform frequency = 220kHz 1
Q6003
Prim PS IC6002 RY6001
10. Stop at each AC input level to recheck the output voltage and verify that almost no AC current is drawn. Only
the primary PS voltages in Chart 19-2 will output. The frequency of the primary oscillator should remain at
220kHz as the input voltage increases because the regulator circuit has been disabled (step 2).
11. Finally, test the regulating circuit by measuring the voltage across PH6005/pins 1-2 with the board powered
up. 0V = normal. 1.2V or higher means the regulating IC6107 is defective.
Chart 19-2 – Primary and Secondary Output Voltages at various input voltages
AC Input Voltage 20Vac 30Vac 50Vac 90Vac 120Vac
D6001 Output 60Vdc 87Vdc 146Vdc 254Vdc 336Vdc
Primary PS
CN6104/pin 1 (11V) 1.86Vdc 2.38Vdc 4.1Vdc 6.24Vdc 7.8Vdc
CN6104/pin 2 (7V) 1.1Vdc 1.55Vdc 2.7Vdc 4.6Vdc 5.8Vdc
CN6104/pin 8 (6.5V) 0.72Vdc 1.1Vdc 1.96Vdc 3.5Vdc 4.6Vdc
Secondary PS
CN6106/pin 9 (135V) 18.55Vdc 25.3Vdc 44.4Vdc 79Vdc 108Vdc
CN6106/pin 6 & 4 (+22V) +3Vdc +4.16Vdc +7.6Vdc +13.46Vdc +18.3Vdc
CN6106/pin 3 & 1 (+15V) +2Vdc +2.8Vdc +5Vdc +8.8Vdc +12Vdc
Running both the Primary and Secondary Power Supply

12. Unplug the AC and disconnect the DC voltage to the blocking diode.
13. Move the resistor and diode from IC6002/pins 1 and 7 to IC6001/pins 1 and 7.
14. Short Q6003/ base to emitter. This enables IC6001.
15. Move the short from across PH6005/pins 3-4 to PH6002/pins 3-4.
16. Place the scope probe at Q6007/Source to monitor the oscillator output.
17. Connect the DC power supply to the blocking diode that is soldered to IC6001/pin 7.
83
18. Set the DC power supply to 16Vdc. More voltage (15.6Vdc) is required to start this IC because pin 18 is not
connected to a Vcc source.
19. Plug the AC cord to the Variac and bring up the voltage slowly as with the primary power supply. The second-
ary voltages in chart 2 will appear as you increase the AC input voltage. The secondary PS oscillator fre-
quency should remain stable at approx. 183kHz.
Note that at about 87Vac, the Primary power supply will suddenly turn ON full and its 11V line will energize the
Surge relay (click sound). This is normal, so do not be startled. The primary power supply will deliver these
voltages from CN6104 unloaded:
• CN6104/pin 1 (11V output) = 11.3Vdc;
• CN6104/pin 2 (7V output) = 7.4Vdc;
• CN6104/pin 8 (6.5V output) = 6.9Vdc
84
20. RA-5A Chassis Protection Block
Protection Block (RA-5A Chassis)

Refer to Figure 20-1 for an overview of the protection circuits.
When a serious problem occurs, this TV will protect the remainder of its circuitry and the picture tubes in one of
the following ways:
• TV shutdown (AC relay is turned off);
• TV Latched OFF (AC relay is held off); or
• Picture is blanked to produce a dark screen (no RGB signal to the CRT cathodes).
When the TV is placed in one of these protective states, IC001 also indicates the cause by blinking the
Standby LED a number of times, pauses, and then repeats the same count.
B BD. STANDBY
LED
(HA BD.) B IK
IC001 CB BD.
MAIN MICRO
G BD. 2
CN001/
CN3020 S DATA S CLK CG BD.
6X
C24 A25 C25 C26 B19 A20
SUB G IK
CN013/
6.5V 2
+135v 8 CN3022 CN3011/
3X OVP 0.02V
OVP CN3703
OCP 9 2
OVP
OCP IK
0.1V
7 IC3006 5X CR BD.
R IK
6 VIDEO
0.1V PROCESSOR
AC IN
0X OVP 7 V LOSS
+135v CN6101/
CN3005/ 4X
15V POWER OCP CN3016
CN8004
0X OVP OFF
LATCH 2X 7X
0.2V
22V 5 6 H.PULSES
0X
OCP CN3007/
CN8006
AC
RELAY 4.6V A BD. D BD.
4
POWER
ON/OFF
FIGURE 20-1 - PROTECTION BLOCK - RA-5A CHASSIS 33TVP 1351 9/4/01
85
Chart 20-1 summarizes the TV’s seven protected areas. Use Chart 20-1 and Figures 20-2 and 20-3 to verify the
signal that triggered the protection (shutdown). If no signal triggered the protection, suspect Micro IC001 on the
B board and the latch transistors (Q6105/Q6119) on the G board of causing the TV shutdown.
Chart 20-1 - Shutdown Causes
CN6104 CN6102 CN6101 CN6106
Stby Protected Area Shutdown
LED Verification 2 4
Blinks Circuit Bd PH6004
Location Normal 1 3
PRIM
Voltage STANDBY
P.S
0X +AC line OVP, G, G Bd - 0.1Vdc P.S
15V OVP, 22V D PH6004/
D6015
OCP pin 3
+ - SEC
2X +135V OCP D CN6101/ 0.1V
P.S
pin 6
3X +135V OVP D CN6101/ 0.1V AC IN
pin 7 RA-5A
FIGURE 20-2 HOT
4X V Out D, D Bd - 5Vp-p G BD.
GND
Loss A CN8004/ Pulses T.P.
pin 7 at V rate
5 X (pix IK balance C/A A Bd – 3 pulses
blanked /G2 CN3011/ in
CN8003
-TV adj pin 9 or vertical
remains CR Bd interval. CN8022 CN8013 CN3005
ON) CN3703/2
6X Q6.5V OVP & Q G Bd - 0.1Vdc CN3006
FBT H OUT
OCP box CN6101/
,G pin 8 CN8016 CN3002
7X H Out Drive D, D Bd - H pulses V OUT
A CN8006/ 5Vp-p CN3008
pin 6
CONV. IC
RA-5A
FIGURE 20-3 D BD.
Protection Circuits
After the TV enters a protective state, the standby light blinks to identify one of seven problem sections. The
problem section not only consists of the protected circuit (load), but also the sensing circuit that monitors the fault.
In the following seven sections, there is a description of the sensing circuit itself so you know how the load is being
protected and a test procedure to determine if the board that contains the load or circuit is at fault.
Standby light blinks 0 times – TV Shutdown
Refer to Figure 20-4 for the Circuit description and the Testing procedure that follows.
Circuit – When the TV shuts down (no line current) and the Standby light does not blink (indicates the trouble
area), three protection circuits are suspect:
• AC Input OVP
• +15Vdc OVP
• +19Vdc OCP
• +22Vdc OCP
The first two areas are most likely confined to the G board. The 19Vdc and 22Vdc OCP is likely to be a D board
problem.
86
STANDBY 5V
T6003 SOURCE
R6064 R6111
STANDBY AC IN
D6017 2.2k 100
P.S 1 PH6004
4 OVP 19V
Q6010 OCP
D6016
OVP 3 +15V (SEC P.S.)
R6065 12V 2
(SEC P.S.)
R6112
N R6060 100
+19V
R6067 2.2k R6133
C6140 1k
C6065
+ D6122
D6015 P
Q6105 Q6101
AC RELAY R6132
P
RY6001 D6001 D6125
Q6119 R6134 D6121
BRIDGE
N 1k 20V
RECT. D6126
AC IN 5.6V
STBY 5V R6119
CN6001
+22V
15V OVP
Q6120 R6195
C6141 47k 22V
G BD. D6111 CN6101/
10 OCP (SEC P.S.)
CN3016
4 5
HP DET. (Q3061)
A BD.
VIDEO PROCESSOR
D3009
IC3006/34
C26
MAIN MICRO CN3020/

B BD. IC001/69 CN001
FIGURE 20-4 - SHUTDOWN - NO INDICATION - RA-5 CHASSIS 27TVP12 1344
1. AC Input OVP – D6016 and Q6010 monitor the DC voltage from bridge rectifier D6015 that corresponds to the
AC input voltage. If the AC input reaches a trip voltage of 165Vac, Q6010 turns on opto isolator PH6004. PH6004/
pin 3 outputs a HIGH that turns on latch Q6105/Q6119. This two-transistor latch grounds out the AC relay drive
voltage at CN6101/pin 4 to prevent the AC relay from turning ON so the TV shuts down.
2. +15Vdc OVP - The 15Vdc line from the secondary power supply (IC6001) on the G board is monitored by
Q6101 and zener D6121. If the 15V line rises to 20.6Vdc, Q6101 turns on latch Q6105/Q6119. This latch
removes the AC relay voltage and the TV shuts down from the excessive voltage. The cause for excessive +15V
is poor or no regulation in the secondary power supply, or a loss of load. The major load for the 15 line is the
circuitry on the D board.
+15V D Board
Sec P.S.
y Vertical Output IC8003
G Bd. CN8022/ y 12V Regulator IC8004
CN8013
87
3. +19Vdc OCP – The 19Vdc line is from the secondary power supply. The load is the audio output stage. If the
19-volt line were loaded down, its voltage would drop. If it drops below 15Vdc, D6122 and Q6101 turn ON to trip
the latch formed by Q6105 and Q6119. This latch shuts down the TV.
4. +22Vdc OCP – The +22Vdc line from the secondary power supply (IC6001 – G board) supplies the conver-
gence amplifiers and the Dynamic Focus circuitry on the D board (not shown). D6126 and Q6101 monitor the
+22V on the G board for low voltage. This circuit would shut off the TV if the 22-volt line dropped to 8.2Vdc.
+22V D Board
Sec P.S.
y Convergence Amp IC8001/2
G Bd. CN8022/ y Dynamic Focus Stage Q8008-11
CN8013
Testing – If the TV Power ON and Surge (not shown) relays turn ON but quickly turn back off with NO standby light
indication, use figure 20-5 to determine which one of the four circuits is causing the shutdown:
BEGIN
G Bd Shutdown with no indication.
Turn on TV with Audio Repair Audio The problem:
Out CN6102 unplugged Output Bd. *120VAC measures excessive
Does TV stay on 3? RA-5A Chassis *15V line above 20 Vdc
*22V line below 8.2Vdc
No PH6004 *19V line below 15Vdc
G Bd G Bd Problem is not in CN6104 CN6102 CN6101 CN6106

Does PH6004/pin 3 Latch is not this section.
Yes Yes 2 4
remain below 1Vdc at being triggered. Secondary P.S.
Power ON? (use Cold Replace Latch Defective(G Bd) 1 3
Surge relay sense PRIM
GND Normal = 0V) Q6105, Q6119 STANDBY
circuit DEF(G Bd) P.S
No Does TV shut P.S
down?
GBd D6015
Does PH6004/pin 2 No SEC
SEC
+ -
drop from 13.6Vdc P.S
P.S
Repaired
(norm) to 0Vdc at
Power ON? (Use Hot Yes AC OVP Circuit is defective.
AC IN HOT
GND) Check /replace D6016, Q6010 RA-5A
GND
No R6065, R6067 T.P. G BD.
D6015 -
GBd Is CN6106/pin 8
Does the 15V line at resistance to ground This is the normal load
CN6106/pin 3 rise Yes more than 3k Ohms Yes resistance so the D Board is
above 20Vdc at Power (Normal is above 3k OK. There is excessive voltage
ON? Ohms) from Secondary P.S. on G Bd.
Troubleshoot or replace G Bd.
No
Normal No
GBd
Replace PH6004
Does the 22 Vdc line No load on +15V line,
Yes Check:
at CN6106/pin 6 rise D bd.
135OVP-GBd
above 18Vdc at Power Check Vert Out IC5004
135OCP-DBd
On?
HP DET ABd
No Q3061
22V line is loaded down from the D Bd.

Replace
FIGURE 20-5 - FLOW CHART C 35TVP12 9/4/01
88
There is also a possibility that a simultaneous loss of communications from the B (IC001) to the A board (IC3006)
and loss of horizontal drive will result in shutdown without a blinking LED, possibly from a broken or contaminated
A board. See Standby light blinks 7X or the overall protection block diagram 33.
Standby light blinks two times – TV Shutdown
The +135V OCP monitoring circuits are located on the G board, but the indicating circuit is on the B board. This
circuit monitors current drawn by the horizontal regulator that provides power for the horizontal output stage. See
Figure 20-6 below: Figure 20-6
AC
AC Sec P.S. OCP
Relay
AC Relay Main Relay
Pwr
Main Micro IC001
On Stby LED Indicator
Circuit - Refer to Figure 20-7 for the following circuit description of the 135V load and current sensing circuit.
135V Loads (D, C, A and V boards)
The 135V OCP circuit monitors the current on the +135V line from the Secondary Power Supply to the D, C, A and
V boards. Of all the +135 volt line loads listed, the D board is the most demanding:
• Horiz Output (Q5030) and PWM (Q5003) stage (D board).
• The HOT on the D board in turn supplies +200V to the RGB Video Output ICs (C board).
• 33V tuning voltage to analog tuners (A board).
• Velocity modulation coils (V board).
+135V CN6106/
SURGE V SENSE (ENABLE 2) D6104 CN8013
RELAY 9
IC6001,
CIRCUIT SW. R6102
CN6001 T6001
270k
AC IN SECOND. P.S
STANDBY R6041
RY6001 D6001 R6101
5V T6001
AC RELAY R6099 4.7k
D BD.
PRI R6118
P.S 0.22 HV REG/
Q6120 HV OUT,
Q6105 PROTECT
H OUT REG/
LATCH G BD.
G BD. P H OUT,
VIDEO OUT
Q6119 P.S
4
AC IN OVP
N 15VOVP
AC
A BD. RELAY R6119 22VOCP 10
R6195 (NO
A26 CN001/ INDICATION) A BD.
B BD. CN3020 C6146 TUNER 33V

D6123
10
0.27V ZENER
69 2X OCP +
D6124 3
R6104 REF.
OCP
44 C25 6 1 560 V BD.
IC001
+
- 2 2
MAIN C6102 IC6103 VEL MOD
R6142 R6103
COILS
MICRO 100 4.7k 1 uPC
3X OVP 6 1093J
STBY 5V -
45
OVP 7 2.5V 3
A25 7
50 + 5
CN3016/
STBY IC6102
CN6101 R6110
LED uPC393C
Q522 STBY 5V
(H BD.) STANDBY
A BD.
5V
FIGURE 20-7 - PROTECTION - 2X, 3X INDICATION - RA-5 CHASSIS 28TVP12 1345 9/4/01
89
135V Current Sensing Circuit (G board)
The 135V sensing circuit consists of R6118 and IC6102. R6118 is connected to the 135V line at the ground end.
As the current along the 135V line increases, the voltage across R6118 becomes negative (similar to ABL volt-
age). This negative voltage that represents the 135V-line current offsets the 0.27V at comparator IC6102/pin 2.
When the voltage at IC6102/pin 2 drops to the same voltage as pin 3 (0V), the output pin 1 goes HIGH to shut
down the TV and light the standby light.
The HIGH from comparator IC6102/pin 1 is split into two paths. One path is through D6124 to trip the Q6105/
Q6119 latch that shuts off the TV. The other path is through CN6101/pin 6 to inform the Main Micro IC001 that the
135V line current has exceeded 0.7A. IC001 will indicate the 2X-blink failure code as long as the TV is plugged
in.
Testing – You can determine if the sensing circuit or the load is defective by removing the load, but you must keep
the error regulating circuit on the G board operational. L6106 is in series with the 135V output connector CN6106/
pin 9. Removing L6106 removes all the loads. You should then power up the TV to see if the standby LED still
blinks two times. It will usually stop blinking two times, meaning you disconnected the problem but the TV will still
shut down and blink seven times because there are no H pulses.
The problem has been isolated to load on either the D, C, A or V boards. See Figure 20-7. The +135Vdc leaves
the G board and goes to the H. Regulator and Output stage load on the D board and the velocity modulation coils
on the V board. Attack the D board first by testing the H Out transistor (Q8024), and the H Regulator output
transistor (Q8027). A similar circuit description and simplified schematic of an H. Regulator and Output stage is
in the DTV-02 training manual on page 37. The V board can be unplugged and the zener on the A board could not
cause the TV to enter shutdown. Reinstall L6106 onto the G board.
If the LED still blinks 2X with the load disconnected (L6106 removed), the problem is on the G board sensing
circuits. Suspect IC6102, IC6103 and R6118.
Standby light blinks three times – TV Shutdown
Refer to Figure 20-7, for the following 135V OVP circuit explanation and testing.
Circuit –The +135 voltage limit is 150Vdc. This limit is checked by R6101, R6102 and IC6102. Normally with an
output of 135V, the junction of the R6101/R6102 voltage divider produces 2.3Vdc into IC6102/pin 5. This 2.3V is
compared to the 2.5Vdc reference voltage placed at pin 6 by IC6103. Because the 2.3Vdc applied to the + input
of Op Amp IC6102/pin 5 is lower than its input at pin 6, the output at IC6102/pin 7 will be 0Vdc. However, if the
135V line rises to 150Vdc, its corresponding voltage at IC6102/pin 5 will increase from 2.3V to meet the reference
voltage of 2.5V. IC6102’s output at pin 7 will go HIGH. The HIGH that outputs IC6102/pin 7 is applied to the
Q6105/Q6119 latch that shuts off the TV set. The HIGH also goes to IC001 via CN6101/pin 7 causing the standby
LED to blink three times repeatedly.
Testing - To verify the defective condition on the G board, monitor the 135V line at CN6106/pin 9. If this line rises
above 135V at turn ON, the secondary power supply or its regulator (G board) is at fault.
If the 135V line did not rise above the limit, this 135V OVP sensing circuit is defective. Measure the shutdown
latch trip voltage at CN6101/pin 7. At power ON this voltage normally remains at 0Vdc. If this line rises above
0.7Vdc, then suspect IC6102 and IC6103. All these circuits are on the G board.
Standby light blinks four times – TV Shutdown
Refer to Figure 20-8 for this circuit description and testing.
Circuit - A Vertical Output IC failure or secondary power supply failure (both on the D board) will stop vertical
pulses from being detected at IC3006/pin 35. This loss will cause IC3006 to blank the screen (no RGB output)
and emergency serial data will be sent to Main Micro IC001 (B board). IC001 turns the TV OFF by dropping the
AC relay drive voltage (IC001/pin 69 goes LOW) and blinks the LED four times.
90
Testing - At power ON, verify +15v and -15V to the vertical output IC5004/pins 2 and 4. This voltage comes from
the secondary power supply on the G board. Then look for vertical drive signal at CN8006/pin 3 and 5. It is
possible to have reduced vertical deflection if one drive input is missing.
B BD. A BD.
STBY LED
B19
S DATA
31 B19 25 IC3006
IC001 R055 VIDEO
MAIN MICRO PROCESSOR
R069 V PROTECT
M306V2MF 26 24 CXA2150AQ 35
A20
S CLK CN013/ 52 53
CN3022 -V CN3005/
+
DRIVE CN8004
3 5 7
AC RELAY CN3005/
Q8001
(B BD.) CN8006
BUFF.
D8001 V DY
5.6V R8015 CN8009
R8036 CN8008
CN8007
3
R8039 B
2.2 1
7 1
3
FROM +15V 2
R8040 G
IC5004 220 1
SEC P.S
(GBD.) -15V V OUT 3
4
LA78045 R
5 1
D BD.
FIGURE 20-8 - PROTECTION - 4X INDICATION - RA-5 CHASSIS 30TVP12 1346 8/31/01
Standby light blinks five times - Blanking

Circuit - Three IK pluses are measured by Video Processor IC3006 as they return into pin 58. Each pulse
corresponds to the efficiency of each CRT cathode and therefore is used to adjust the RGB gain within IC3006 to
maintain color balance while the TV is operating (dynamic adjustment). The IK signals originate from IC3006 as
three bright lines in the vertical-blanking interval at lines 19-21. As the picture tube ages, the Ik signals may fall
below the threshold for automatic balance adjustment, causing IC3006 to mute/blank the substandard picture.
Although the picture is blanked, the IK pulses still output IC3006 and the three return IK pulses to IC3006/pin 58
are still operational as long as the TV is ON.
91
LIMITER +9V
IC3701
R3071 OUTPUT
R3069 VIDEO OUT 12
R3068 TO RED
R3070 TDA612OQ
+9V N 2 7 6
CRT
Q3054 D3709
R3066 N +12V CR BD.
N Q3055 IC3014 R3726
P Q3056 +12V
Q3053 CN3011 N CH
8 1 R3727
FROM + +12V 220k Q3702
R3067 R3729
MAIN CN3703 IK BUFF. 4.7k
MICRO 61 R
IC001 64 5 4
(B BD.) IC3006 2 2
Q3050 CN3702
VIDEO CN
S CLK PROCESSOR CN3803 2
3703
26 CXA2150 G
63 3 2
CG BD.
Q3048 CN3805
25 Q3049 2
62 1
12 OUTPUT
S DATA 58 IC3801
B
+12V VIDEO OUT 7 1k
IK
BUFF.
R3045 2
C3017 R3055 CN3804
2
CN3903 CN3909 2
Q3021 R3228
+9V R3801 IC3901 12 OUT
A BD. P 2
+9V VIDEO OUT 7 1k
R3229 Q3901
Q3022 BUFF.
LIMITER
N BUFF. CB BD.
Q3020 9
R3230 P IK
+ LIMITERS R3227
-
FIGURE 20-9 - PROTECTION-5X INDICATION - RA-5A CHASSIS 31TVP12 1348 9/4/01
Testing - Increase the G2 control on the CRT’s C board. If that does not return cathode current to within operating
range so the picture appears, examine each filament to see if it is lit.
Then use your scope to examine the signal at the cathode. Go to CN3011/pins 1, 3 and 5 to see if there is a drive
signal going to the C boards. Next, check for these signals at each CRT cathode. If they are present, examine
the IK signal into the A board at CN3011/pin 9. You should see three pulses that change in level as the G2 control
is adjusted. One pulse corresponds to one color and should be within 15% of each other. The normal IK output
from the CRT/C board is about 1Vp-p pulses at pin 9. If these three pulses are present at pin 9, the problem is on
the A board about IC3006.
Standby light blinks six times – TV Shutdown

Circuit – IC001/pin 43 monitors the Sub 6.5Vdc from the Primary power supply (G Bd) to the Q box (QM and QI
boards). A short or excessive voltage on the Q6.5Vdc line will cause IC001 to shut off the AC relay (IC001/pin 69
goes LOW), shutting down the TV and blinking the LED six times.
92
SURGE
RELAY G BD. A BD. QM BD.
RY6002
CN6104/ CN3015
IC6002, R6175 CN3104 CN7001
D6130 L6102
T6004 8 1 SUB
PRIMARY 9 2 6.5V
P.S D6133 Q6115 SOURCE
7.5V P D6132
R6174 LOW R6183
D6144 6.2 B BD.
Q6111 PROT. STBY
R6180 5V
1k P
N R6182 STBY
C6194 10k Q6110 R6184 0.1VDC LED
100 IC001 (HA BD.)
4.7
8 C24 43 MAIN 50
R6178 CN6101/ CN3020/ MICRO
47k CN3016 CN001 69
AC RELAY
FIGURE 20-10 - PROTECTION - 6X INDICATION - RA-5A CHASSIS 32TVP12 1349
Testing – Unplug CN7001 to the Q box (consists of QI and QM boards) and power On the TV. Normally the TV will
power ON with HV, a dark screen and no sound because there is no microprocessor-to-microprocessor commu-
nications. If the TV does not shut down, the problem is in the Q box because you unplugged the short. If the TV
still shuts down, the problem is in the primary power supply (G board). Measure “Sub 6.5Vdc”at D6130 cathode
on the G board at power ON. A high of 8Vdc will trip the protection latch and shut down the TV. The TV will not
display A/V without the Q boards active, but will remain ON.
Standby light blinks seven times – TV Shutdown

Refer to Figure 20-11 for the circuit and testing of the Horizontal sweep detection circuit.
Circuit – If the horizontal sweep is lost for a moment, three vertical lines would instantly appear on the three CRTs
and burn a line into the tubes. To prevent this, a horizontal activity circuit consisting of D3011, C3090, R3140 and
Q3037 keep IC3006/pin 34 LOW as long as horizontal pulses are fed into the circuit.
Horizontal pulses into the activity circuit come from the horizontal Output transistor Q8024/Collector. A capacitor
voltage divider (C8096-8) reduces the 1KV, 31.5kHz spikes. The horizontal spikes are clamped (limited) and
shaped into rectangular pulses by zener D8026. Buffers Q8031/Q8101 apply the reshaped pulse to the horizon-
tal activity circuit. D3011 is the first part of this circuit outputting a DC voltage to LPF C3090/R3140. The DC
voltage keeps Q3037 turned ON. When Q3037 is ON, IC3006/pin 34 remains LOW for normal operation.
During a defect when horizontal pulses are NOT detected, IC3006/pin 34 goes HIGH. This HIGH is used to blank
the screen, trigger the Standby LED indicator and shut down the TV. IC3006 blanks the RGB output in its own IC
and sends data to instruct Main Micro IC001 to blink the standby LED seven times. The HIGH is also applied
through D3009 to the latch circuit on the G board to shut down the TV for safety.
The protect Mute line from IC001/pin 67 places a HIGH at Q3037/base for five seconds at power ON to prevent
this circuit from shutting the TV back off after turn ON.
93
11V (G BD.)
PROT.LATCH +15V
9V Q6105,Q6118 (G BD.)
STBY LED SOURCE IC3005
(HB BD.) REG. D3026 R3287
5 Q3062
CN6103/
IC3021 R3137 CN3016 P
+
REG.
Q522 D3009 R3288 C3186
CN013/ HORIZ. PULSE 100
CN3022 55 61 19 21 DETECT. CIRCUIT
50 SCLK Q3037
28 A20 26 IC3006 N A BD.
VIDEO R3140
25 PROCESSOR 34 C3090
IC001 31 B19
MAIN CXA2150 D3011
MICRO 40
M306V2ME S DATA
R3139 R3144
5V p-p
67 A23 0.6VDC
D3012 H DRIVE
10 6
PROTECT Q8024 CN3007/

MUTE H OUT CN8006
Q8030-BUFF. T8003
YOKE 12V
Q8023-DRIV HOT
T8002-DRIV
D8027 R8189
Q8031
IC8005 +135V N
Q8027 (G BD.)
B BD. D BD. C8097 R8174

P
D8021
C8096 D8026 Q8101
DAMP C8098
5.6V
FIGURE 20-11 - PROTECTION 7X INDICATION - RA-5 CHASSIS 29TVP12 1347 9/4/01
Testing - If the Standby light blinks seven times, the problem is most likely on the D board where the Horizontal
Regulator and Horizontal Output stages are. Use this three-step method to determine if the problem is on the G,
D or A board:
1. On the D board CN8013/pin 9, verify there is 135V coming into the D board from the G board.
2. On the D board, look for 5Vp-p H drive pulses into the D board at CN8006/pin 10 from the A board.
3. On the D board, look for 5Vp-p H pulses output from the D board at CN8006/pin 6 into the A board.
Not Present - The problem is on the D board, suspect the Horizontal Output (Q5030), PWM (Q5003/Q5011)
transistors on the D board and video output ICs (C board).
Present - The D board is OK and the problem is in the sensing circuit on the A board. Suspect components
D3011, C3090, R3140 and Q3037.
94
21. RA-5A Chassis High Voltage Stage
High Voltage Stage (RA-5A Chassis)

HV Power Supply Start Up (Board level repairs)
As shown in Chart 21-1, the HV stage starts when enabled by three inputs.
Chart 21-1- HV Stage Inputs (for Starting)

Name From Checkpoint
1. +135Vdc D6104 / cathode (G Bd – Sec PS) Q8035/ S (D Bd)
2. +12Vdc 12V Reg IC8004 / output (D Bd) IC8008/1 (bottom) or
(CN8016/pin 1, 2)
3. H Drive Video Process IC3006/pin 40 CN8006/pin 10
Once these three voltages are present, there is no reason the HV should not start unless the D board HV circuitry
is defective. See Testing for the procedure and location of the checkpoint connectors.
The HV stage can be tested for operation and level by measuring the sample of the HV at:
CN8016/pin 3 = 7.46Vdc. See Figure 21-2 for the schematic and “Testing”for connector locations.
HV Block Description (Component level repairs)

The HV Stage only has a few major blocks as shown in Figure 21-1.
G BD. CN6106/
CN8013 IC8004 CN8016
+15V 3 12V REG. 1
+135V +12V CRT

2
+135V 9 7.46V 3
R
7.46V HV DIST.
BLOCK G
+135V 10 4
+135V B
CN3005/
CN8004
IC8008
PWM Q8035
HV REG. T8005
GEN.
FBT
T8004
LOT 1 200V
CN3007/
CN8022/ TO VIDEO
CN8006
10 CN7304 OUTPUT
Q8038
H DRIVE H DRIVE DRIVER ABL
IC3006/40 HV OUT C BD.
IC8006, 7
PROT.
FIGURE 21-1 - RA-5 HV BLOCK 45TVP 1366 9/4/01
95
Chart 21-2 explains the function of each block in the HV stage.
Chart 21-2 - HV Block Operation
Block Name Major component Purpose
PWM Generator IC8008, Q8035, Provides regulated B+ supply voltage to the HV Output stage,
Q9035 preventing picture width fluctuations. A sample of the HV from
the distribution block is used for error correction
LOT – Low Output T8004 Primary is regulated voltage. Secondary outputs 200V B+
Transformer voltage to the RGB video output ICs on the C boards.
HV Drive / Output, FBT Q8005, Q8032, Amplifies the H drive signal to feed the flyback (FBT). The FBT
Q8038, T8005 develops the HV.
HV Distribution Block Input is HV from the FBT. Outputs are HV for each CRT and
one HV sample voltage reduced to about 7.4Vdc for regulation .
HV Protection IC8006-7 Monitors the FBT output and stops the HV by grounding out the
H Drive input.
Refer to Figure 21-2 for the operational description of the HV stage.
+135V HV BLK CRT

SEC.P.S HV
IC6001 G BD.
7.46VDC
(G BD.)
9 1 2 3 4
CN6106/ CN8016 R8171
CN8013 +12V 100
+135V
D8036
Q8035 15V
1 12
R8196 S HV REG.
H OUT VR8001
18 P 12
D BD. REG. 5k 3 CN8022/ 200V TO
IC8008 CH CN7304 VIDEO
Q8027 HV C8118
PWM GEN. 7 LOT 14 1 OUT B+
6 D
T8004 D8039 C B BD.
14 10 D8030
MIX OUT TO D8029 1 200V
H DRIVE
Q8023 IC8007 Q8038
HV OUT T8005
DRIVER DRIVER 8.1V 1
Q8036 N FBT
CN8004/ Q8004 G D8035
Q8016 Q8037 R8160 2 11 6
CN3005
10 Q8019 D8031 D8034 C8142
Q8020 18V R8219
3
A BD. IC3006
Q8022 IC8007 ABL
VIDEO 40 10 PROT. 1 D8023
7 D8038
PROCESS CN3007/ DRIVERS 5
CN8006 Q8005, Q8028-9

ABL
+135V Q8032 Q8021 5
+135V
1 1 1 +15V 7 IC8006 D8025
PROT. 2 R8223 CN8021
CN3001/ CN3023/ CN3010/ R8198 3 1
CN9001 CN9001 CN9001 10k D8015
R8153 PROT. R
LATCH
VR8002
V BD. D BD. D8017 2
100k
VEL MOD COILS
FIGURE 21-2 - HIGH VOLTAGE STAGE - RA-5 CHASSIS 34TVP12 1350 8/31/01
96
PWM Regulator
This stage controls the HV level by regulating the B+ voltage from Q8035. IC8008 starts when both 12Vdc and H
drive pulses are input to pins 1 and 14 respectively. Pulses are output pin 3. The width of the pulse is dependent
upon the error voltage input IC8008/pin 12. The higher the input voltage, the narrower the low going output
pulses.
The pulses are amplified by P channel MOSFET Q8035 and applied to the primary winding of LOT T8004/pin 7.
Typical voltage output from Q8035/drain = 130Vdc. The other end of this primary winding at pin 1 goes to HV
Output Transistor Q8038/collector to develop HV. The secondary of LOT T8004 makes 200V for the RGB output
drivers on the C boards (unrelated to the HV development but linked to maintain picture brightness uniformity).
HV Drive / Output, FBT
This stage is located in Figure 21-2 below the PWM Regulator stage. It begins by amplifying the 33kHz horizontal
drive signal from Video Process IC3006/pin 40 in various stages and uses the final amplified signal from Q8038
to drive the flyback transformer T8005. The flyback steps up the input voltage to HV level and the HV distribution
block (external to the D board) sends the voltage to the three picture tubes. Another secondary winding of T8005/
pin 6 produces a low voltage that represents the FBT output. This output is rectified by D8038 and used in the HV
protection circuit.
Q8038 is a new device used in this TV set. It tests like an enhancement N channel MOSFET. Normally, all leads
measure infinity resistance to each other. If you charge the base/gate lead, then connect the ohmmeter + to the
collector/drain, a resistance will appear for over an hour if the gate lead is not touched.
The test procedure for Q8038 is:
1. Check all leads of the device with respect to each other. Normal is no resistance (infinity).
2. Connect the negative lead of the ohmmeter (set to read diodes) to the emitter.
3. Touch the positive lead of the ohmmeter to the gate/base lead.
4. Move the positive lead of the ohmmeter to the collector/drain for a reading if Q8038 is OK.
Q8038
Gate Emitter
Collector
Protection
The protection circuit grounds out the H drive signal to the HV stage, stopping the HV, which causes a dark
screen but the sound remains normal.
These conditions will trip the protection circuit:
● Instructed to by regulator IC8008/pin 10 = HIGH (normally LOW).
● ABL from FBT/pin 11 goes LOW (caused by excessive pix tube current usually from shorted RGB Drivers).
● FBT output voltage rises to a critical threshold (T8005/pin 6).
These three inputs to Op Amps IC8006 and IC8007 form the protection circuit. When protection is called for, Pin
7 of either IC that was triggered goes HIGH. The HIGH is inverted by Q8021 or Q8022. Either transistor turning
on will ground out the H Drive signal that feeds HV Output Q8038. That stops the HV.
What keeps the HV latched ON until the TV is shut down is D8015. When IC8006/pin 7 goes HIGH, this high is
returned to the + input of the Op Amp at pin 3, keeping its output HIGH as long as power is applied. There is a
similar latching diode connected across IC8007/pins 7 – 3 but not shown in Figure 21-2.
97
Testing for Dark Screen
A dark screen with normal sound can be caused by the items listed in Chart 21-3. Use Figure 21-3 of the D board
in conjunction with Chart 21-3 to locate the test points.
Chart 21-3 – Common Causes of a Dark Screen

Cause Board Reason Troubleshooting Procedure
Screen Screen IK blanking brings all CRT 1. Look at each CRT. If there is an IK line at any
voltages too adj. on cathodes high if a screen CRT, there is HV and deflection. If there is a
low Chassis voltage is low line missing, CRT drive is missing from the A
board.
Video A, B RGB cathode voltages stay 2. The screen control is above the speakers.
blanking abnormally high at 200Vdc Turn one at a time until retrace lines appear
then back off
No HV D, A, or G No HV or too low. 3. Check for a sample of the HV at CN8016/pin 3
=7.46Vdc if the HV is normal. 0V if there is no
HV.
CN8006/10 Figure 21-3 - D Board
D Bd. Convergence ICs
IK line
FBT should
always be
present
CRT screens
CN8016/pin 3 = 7.46V
D8038
98
Figure 21-4 provides the step-by-step troubleshooting procedure. Refer to Figure 21-3 for test point location.
Dark Screen. Sound OK.

Adj. controls according to service manual.
Is there an IK line
in any CRT? 1. HV is OK.
Yes 2. V&H Deflection is OK.
IK 3. IK blanking - Adj. screen control one
at a time to retrace, then back off. Did
the picture come back?
No No
Troubleshoot that
No HV or blanking. Is Yes color C board. Blanking is caused
one IK line missing? Adj. screen by no video output
control first. the A board.
No
Replace
If all IK lines are
missing, the HV may
be LOW or None. Yes
Sample the HV at
CN8016/3 (7.4V) or
D8036/cathode. Is
there voltage?
No
There is No HV. Look

for HV start signals
(Chart 21-1). Suspect Figure 21-4 - Troubleshooting a Dark Screen
the D board.
99
22. RA-5A Chassis Video Process
Video Process (RA-5A Chassis)

The Video processing for the projection TV chassis is almost identical to the HA-3 chassis. The difference is the
A board. An AD board is a plug-in to the A board for convergence operation and the output connector is a different
number. Refer to Figure 22-1 of the RA-5A overall video block diagram for the following description of the
similarities and differences and Figure 22-2 for the location of the video and sync signal checkpoints.
IC7205, IC7603 CRT B

MAIN SIGNAL PATH
AND PROCESS
NTSC INPUT/ PIP
CB CRT G
IC8801
BD.
OSD
IC7806, CRT R
IC8601 CG
IC8703, IC8902 IC7807
BD.
MID PROCESS DRC
PROCESS NTSC CR
MN-SB- MAIN BD.
CN8601/
SW. PATH CN8801
CN005
A1-3 A9 A5-7 A3-5 A7-9 1, 3, 5
NTSC MAIN OSD CN3011
SUB OSD
U BD. PATH HD Q9, Q11, Q13 HD
IC200 VIDEO C
MIXER 11 (33.75kHz)
NTSC
COMPONENT
INTERFACE I/F IC205
*
5,6
IC3006 VD (60Hz)
OR OSD 13
IC201 SUB SW. MAIN SW. VIDEO
CN4001/ HD IC001 PROCESS
CN003 INPUT MAIN MICRO
VIDEO YS
C D
5,6 15 CN3012/
REG
NTSC IC201,IC202, IC002 20 CN1601
VIDEO SUB IC204,IC207 SW.
17
IC401 RGB 1,
AD
1,3,4 ANALOG VIDEO CN001/ 2,
A/V PROCESSING CN3020 3 BD.
CN3013/
SW. MAIN
B CN1602
VIDEO 6
2 ANALOG
B TUNERS
HB BD. CN008/ *SERVICE MODE B BD. 9
A BD.
ENABLED PATH CN002/
CN1200
CN3022
FIGURE 22-1 - VIDEO BLOCK - RA-5 CHASSIS 48TVP12 1360 9/4/01
HA-3 / RA-5A Similarities

The HA-3 TV chassis and RA-5A TV chassis share an almost identical QM and B board with minor differences to
the NVM software so they are not interchangeable. Refer to the service manual for the board’s part number and
you will see they are stocked independently for ease of servicing. The signal flow between these boards is
identical so you may refer to the previous Video Process description in the HA-3 section of this training manual.
HA-3 / RA-5A Differences
The A board is very different between these two sets. The two differences that pertain to the video section are
shown in Figure 22-1:
• IC3006 was labeled the Y/C CRT Drive in the HA-3 chassis, but is labeled “Video Process (or)” here.
• The single CN3011 RGB output connector branches out to three CRTs simultaneously. The RGB signal wires
from CN3011 go directly to their corresponding CRT board. In previous projection TV sets, the RGB signals
passed through the C boards in series
• The projection TV’s A board has a plug-in registration (convergence) AD board. This board produces either
video patterns for Flash Focus or crosshatch patterns for convergence (service mode only). When a pattern
is called for, Main Micro IC001 sends a request (data path not shown) to the micro in the AD board.
100
22. RA-5A Chassis Video Process
The AD board generates the pattern as an RGB signal (CN3013/pin 1-3) that is sent to Video Processor
IC3006 (A board). The RGB pattern is accompanied by a Ys switching signal from CN3012/pin 20. The Ys
control signal from the AD board is normally 0Vdc, but goes to 5Vdc when the Flash Focus pattern or conver-
gence pattern is called for. See Chart 22-1.
Chart 22-1 - Video Process(or) Output Vs Ys control Input
Picture Output Ys input from CN3012/pin 20 AD board
Normal picture 0Vdc
Flash Focus or Convergence crosshatch 5Vdc
The 5Vdc Ys input signal tells IC3006 to replace the normal video path with the RGB pattern from the AD
board when HIGH. This also implies that a defect on the AD board can stop the normal picture and leave a
blank screen. The PJ TV set will still run normally without the AD board plugged in.
Q BOX B BD.
U BD.
CN7001
CN005 Y - A1 CN003
B1 A1 P B - A2 SUB A1 C1
P R - A3 INPUTS
H S - B3
VIDEO 1 VIDEO 6
V S - B4 VIDEO
CN7402 V1 = A 1 Y = A15
Y - A5 PROCESS
Y1 = A 2 PB = A16
P B - A6 C1 = A3
B11 A11 P R - A7 MAIN PR = A17
A31C31
H S - A8
A1 B1 B1 A1 V - B
S 8
SUB MAIN
Y - A3 TUNER
P B - A4 TUNER
CN8801 Y - C15 VIDEO VIDEO
P R - A5
H S - A6 P B - C16
V S - B6 P R - C17
A11 B11 B11 A H S - C18 B9 B6
11
CN004 V S - C19
A1 B1 25 1
1
32 CN001 CN002
CN3020 CN3022
CN8601 A32 A1 A25 A1
C32 C1 B25 B9 B6
B1
A11 B11 RGB
SUB MAIN
C BOARDS R=2 TUNER TUNER
CN3011/PINS G=3
B=5 A BD.
FIGURE 22-2 - PHYSICAL VIDEO/SYNC PATH (RA-5A CHASSIS) 50TVP12 1363 9/4/01
101
23. RA-5A PJ Chassis Board Replacement
RA-5A Chassis Board Replacement

replacement
A CRT (RGB) Driver R3024-IC3002- D3001-33V – tuner Transplant memory
H&V 9Vreg D3004-5.1V-IC3006/56 IC3013 containing
Oscillators/Jungle R3077-neg15V line protect deflection parameters.
Both analog Tuners D3006-5.6V-Stby 5V OVP
Deflection NVM IC3013 D3025-5.6V- Stby 5V
Shading circuit OVP
Flash focus buffers
Audio output
AD Convergence Flash Focus sensor signal Complete
Processing protection-D1604-07. convergence or
Flash Focus sensing D1602-5V-5Vline OVP transplant memory
and processing IC1607 containing
D1608-3.6V-3.3V line convergence data and
OVP do touch up
convergence.
B Video processing and None None Transplant memory
audio switching. IC004 containing
Closed caption/V Chip system and user data.
Main Micro IC001 ** see note below
chart
OSD (Menu)
CR, RGB CRT signal None None No adjustments
amplifiers
CG,
CB
D HV Regulator circuit R8208=200V line D8028, D8038-HV Reg, Adj Focus (on FBT).
HV Flyback (video out) Out protect After ½ hour warm up,
H Output Reg circuit PS8007=3A-CRT D8036=HV Reg IC8008 enter the service
filaments protect mode*, select
H. Drive & H. Output category “PJE”(2 or
PS8001=6-3A- D8024=15V-H. Out
V Output Conv Output protect #5 buttons) and
Two Convergence Amp perform touch up
R8205-6=H D8002-3=+15V protect- convergence
packages (fused) centering (global) Vert Out adjustments.
Dynamic Focus Output D8026=5.6V fdbk H. Adj. HV VR8001, 2 for
pulse limiter HV level and
shutdown according to
safety related adj. in
the service manual.
102

replacement
A
G CRT (RGB)
Standby Driver
Power Supply R3024-IC3002-
F6001-10A-main D3001-33V – tuner
D6016=AC input OVP Transplant memory
No adjustments
Primary Power Supply R6099-Prim PS D6121, D6126=15V OVP,
(Sub 6.5V, 11V, 7V.) R6041-Sec PS 22VOCP
Secondary Power PS6101-04=135V, D6133=Sub 6.5V OVP
Supply (135V, 22V, +22V, +15V lines
19V, 15V) R6057-Stby PS
Protection latch circuit R6073, R6081-2-
Pri & Sec PS
sustaining volt.
K Prologic Decoding None S Data protect D2301, No adjustments
Audio Output D2303, D2305
Amplifiers S Clk protect D2302,
Tone Control D2304, D2306
Pwr On/Off/Ch change Surround spk protection-
mute D2602-5
Center Spk protection-
D2619-20
Main spk protection-
D2614-17
Var/Fixed output
protection D2624-31
Q Box DRC for line doubling None D7803-3.9V=Reg for write Enter the service
MID for twin pictures PLL IC7805 (QM Bd) mode and check the
(Qi, model ID category
DTV Tuner and A/V
QM process
items to see if they
Bds) agree with the service
manual. ** see note.
U Audio/Video None None No adjustments
Input/output panel
V Velocity Modulation None None No adjustments
* Service Mode access using remote buttons: Display, #5, Vol +. Power. See the Convergence Adjustment
Overview chapter for more information on the service mode.
** After replacing the B board or Q box you will find that the plugs to CN8801 and CN8601 are the same. Cables
from Q box to CN004 and CN005 should cross. See Figure 23-1.
103
Main & Sub Sw B Bd.

Q Box Main
Path A/
V
CN005
Sub Path Video
Inputs
CN8801
CN004
CN8601
CN001 CN001
NVM Contents – Chart 23-1

Chart 23-1 - TV’s Non Volatile Memory (NVM) Contents
B board IC004 A board IC3013 AD board IC1607 QM board IC7206 and IC8901
Active Analog & Digital TV Deflection parameters Convergence Picture parameters such as size
stations & last channel/video (raster not video) data position, etc (video not raster)
User Picture / Audio settings CRT Drive settings Flash Focus data Single and Twin pix parameters
User Operation settings (DRC) Freeze pix settings
Closed caption
Service mode model ID
104
APPENDIX
DIG TUNER
1
CN7001 2 6.5V QI BD.
ALL 3
4 GND PIN1 IS
VOLT. 5 5V
FROM 6 9V CLOSEST TO
CN2002 & 3
A 1 1 B 2 CH. AUDIO
2 BACK OF TV
3 (HA-3)
CN7402 4 AB
5
6 CN5501
GRAY CN3103 CN5505
CN002/
A 1 1 B CN2003
4 25
5
7
8 1 A BD.
9
11 11 VIDEO INPUT
WHITE FROM B BD.
CN3170 CN6504
A 1 1 B CN005 CN001/
2 CN2002 CN6501
3 SUB CN6001
CN8601 5 CN6505
6 32
11 11
BLK
CN6502
CN2001 CN6003
CN4404 CN4403
FRONT OF TV
HA-3 CHASSIS CONNECTOR LAYOUT 38TVP12 1354 9/5/01
i
A1 B1
Q BOX IC7205
A11 DIG
B11
PROCESS
CN8801
IC8902
CN8601 MID MICRO
A10 = DATA
CN007
A11 = CLOCK 13
B1 A1 1 N/C S DATA, CLK B BD.
B CLK,
S COMMUNICATIONS
10 IC001 DATA
CN005 DATA CLJ
11 MAIN
IC004 CN005 A10 A11
B1 A1 MICRO
NVM CN007 1 13
CN004 2 (RST) CN4402 15 14
2
STBY CN6506 2 1
(R) 11 11 (T) 5V CN5501 8 7
CN2003 A2 B1
CN2003
A2 = MID BUSY
B2 = BOX RST CN4402 (AUDIO) A25 A20 2
1 14 15 B25 B19 1 B COMMUNICATIONS
A11 = M16 RXD DATA CLJ
B11 = M16 TXD TUNERS CN2003 A10 B1
CLOCK & A BD.

DATA = CN3171 2 1 7 8
1
4Vp-p, CN3173
PRESENT CN5501
WHEN TV CN6506 2 1 7 8
IS ON
IC5001 CONV.
NVM D FOCUS
D BD.
HA-3 CHASSIS COMMUNICATION 52TVP12 1364 9/5/01
ii
RA-5A Chassis D Board Tests

Many voltages from the G board are delivered to the D board (CN8013 in Figure 24-1) for deflection use. The
135V path continues into the A and V boards. A short on the D board will load down the power supply, but the D
board can be quickly tested for shorts.
Figure 24-1 -135V Distribution
Vr board
D board +135V Vb board
G
A board
board Vg board
CN8006 CN8013
CN8013
This D board can be tested for excessive current demand (shorts) either by making resistance (ohms) checks or
by supplying voltage to each input of CN8013 to see if it is normal. The conditions are that the D board is
unplugged from the TV before resistance measurements are taken and the polarity of the ohmmeter voltage
matches that of the load. The DVM used was a Fluke 8050A set to 200k ohm range. Your ohmmeter will show
different readings but they will be proportional.
The DVM leads were reversed so the – voltage from the DVM was applied to the –22 and –15 volt pins of
CN8013/pins 1 and 4. By maintaining the correct polarity, premature parts failures can be avoided. See Chart 24-
1.
Chart 24-1 - D Board Excessive Current Demand Tests
Input Location Ohms to Gnd Current Destination Major Part
Name (charging caps)
+135V CN8013/pin 9 1.2k to 55k in 1 min. 0.5A at 30Vdc HV Conv., Q8038,
PS for HV Conv, Q8035,
H Out, Q8024,
PS for H Out, Q8027,
A board CN8006/10
+22Vdc CN8013/pin 6 4k to infinity 0.02ma at 22Vdc STK Convergence Amp, IC8001, 2;
-22Vdc CN8013/pin 4 1.7k to 7k 9.29ma at –22Vdc Dynamic Focus Q8008, 9
+15Vdc CN8013/pin 3 800 to 10.5k in 1 min 110.7ma at 15Vdc Vertical Output IC8003,
-15Vdc CN8013/pin 1 1k to 65k in 1 min. 5.09ma at –15Vdc H Drive Q8036, 7
iii
Q BOX B BD.
U BD.
CN7001
CN005 Y - A1 CN003
B1 A1 P B - A2 SUB A1 C1
P R - A3 INPUTS
H S - B3
V S - B4 VIDEO 1 VIDEO 6
VIDEO
CN7402 V 1 = A1 Y = A15
Y - A5 PROCESS
Y1 = A2 PB = A16
P B - A6 C1 = A 3
B11 A11 P R - A7 MAIN PR = A17
A31C31
H S - A8
A1 B1 B1 A1 V - B
S 8
SUB MAIN
Y - A3 TUNER
P B - A4 TUNER
CN8801 Y - C15 VIDEO VIDEO
P R - A5
H S - A6 P B - C16
V S - B6 P R - C17
A11 B11 B11 A H S - C18 B9 B6
11
CN004 V S - C19
A1 B1 25 1
1
32 CN001 CN002
CN3020 CN3022
CN8601 A32 A1 A25 A1
C32 C1 B25 B9 B6
B1
A11 B11 RGB
SUB MAIN
C BOARDS R=2 TUNER TUNER
CN3011/PINS G=3
B=5 A BD.
PHYSICAL VIDEO/SYNC PATH (RA-5A CHASSIS) 50TVP12 1363 9/7/01
iv
Sony Service Company
A Division of Sony Electronics Inc ©2001
All Rights Reserved
Printed in U.S.A.
S is a trademark of Sony Electronics
S
SEL Service Company
A Division of Sony Electronics Inc. 09/07/01
C29P12901 1 Sony Drive
Park Ridge, New Jersey 07656 Printed in U.S.A.

c29p12 TRN

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S ® Training Manual

Course: CTV-29/TVP-12 (C29P12)

 Sony and i LINK are registered trademarks of Sony Electronics.

"6i" Interlaced Picture consisting of "6p" Progressive

4 film frames (24 frames duplicated 1 2 3 4 5

Figure 2-4 - CineMotionProblem

Film Film Distorted TV

Screen Modes Menu Screen Mode

Full – The 4:3 picture is just stretched horizontally.

Figure 2-8 - Bandwidth limited by slower device

Figure 2-9 - Improved Hookup

Digital Audio Found new i Link Device

i Link Cancel Add

Figure 2-11 - TV screen

HB BUS DATA/ iLINK

DTV Signal Information

Contents of the DTV Signal

HA-3 Chassis Overall Block

FIGURE 4-1 - HA-3 CHASSIS OVERALL BLOCK 43TVP12 1359 8/30/01

HA-3 Chassis - Power ON Block

FIGURE 5-2 - DIAGRAM 13 - POWER ON 2/2 13TVP12 1331 8/30/01

Secondary Power Supply

Primary Power Supply (HA-3 & RA-5A Chassis)

TIMER OCP R6009 C6014 Q +6.5V

PM3394, FLUKE & PHILIPS

ch1: pkpk= 325 V

Waveform 6-1 - Primary PS Oscillator - Normal operation - 85kHz

Chart 6-2 - Checks for Primary power supply operation

Chart 6-5 - IC6001 enters a protective state

Secondary Power Supply (HA-3 & RA-5A Chassis)

Testing for NO Start

Testing for Low B+ or Shutdown

Chart 7-4 - Checking the Primary PS Output

HA-3 Chassis - D Board RA-5A Chassis - G Board

Protection Block (HA-3 Chassis)

FIGURE 8-1 - PROTECTION BLOCK 20TVP12 1338 9/4/01

Chart 8-1 - Shutdown Causes

PRIMARY P.S (A BD.)

TV SHUTS OFF WITHIN 6 SECONDS OF POWER ON

The following test for the video output ICs is

R8051 Q8009 CN6503 The problem is in the: Go to

TV SHUTS OFF WITHIN 6 SECONDS OF POWER ON

PRESS 7VDC AT NO TROUBLESHOOT A BD.'s

FIGURE 8-5 - FLOW CHART B 22TVP12 1340 9/4/01

FIGURE 8-6 - SHUTDOWN - 2X, 3X, INDICATION 16TVP12 1334 9/4/01

Standby light blinks three times – TV Shutdown

Standby light blinks four times – TV Shutdown

FIGURE 7-7 - SHUTDOWN - 4X INDICATION 17TVP12 1335 9/6/01

FIGURE 8-8 - BLANKING - 5X INDICATION 19TVP12 1336 9/4/01

FIGURE 8-9 - SHUTDOWN - 6X INDICATION 14TVP12 1332 8/30/01

Standby light blinks seven times – TV Shutdown

FIGURE 8-10 - SHUTDOWN - 7X INDICATION 18TVP12 1337 9/4/01

High Voltage Power Supply

FIGURE 9-1 - HA-3 HV BLOCK 55TVP12 1369 8/30/01

The Start sequence is as follows:

FIGURE 9-3 - KD34XBR2 rear

Chart 9-2 - Converter IC8002 Voltages

Communications (HA-3 & RA-5A Chassis)

FIGURE 10-2 - HA-3 CHASSIS COMMUNICATION 52TVP12 1364 9/7/01

PM3394, FLUKE & PHILIPS

CH2!2.00 V= MTB2.00ms- 5.82dv ch1-

Waveform 10-1 – Microprocessor Communications* QM – B Board

Loss of RXD/TXD Communications