Anghel Matei

CEN 3.1A

Laboratory documentation - Digital

Electronics
Introduction
My name is Anghel Matei, I am studying at faculty of Automatics Computers and Electronics in third
year. This portfolio will be a documentation for the laboratories completed at Digital Electronics
throughout this semester. In this portfolio I will discuss the assignments required at this laboratory, I will
present my implementation and we will observe and correct, if necessary, the results we get. In order to
implement the laboratory requirements I used a program called Digital Works, I will discuss more about
it bellow.

Laboratory 1
In the first laboratory we were presented with the Digital Works environment, we learned about various
buttons and their function.

Digital Works is a graphical design tool that enables you to construct digital logic circuits and to analyze
their behavior through simulation. Circuits can be composed of simple gates (AND, OR, NAND, NOR,
XOR, XNOR, NOT) and simple flip-flops (D, RS and JK). You can also use tri-state and memory devices to
construct systems with buses. Digital Works also provides mechanisms for detecting race conditions and
bus contention.

1 – Screen Shot with Digital Works application

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Laboratory 2 – Combinational Logic Circuits

Introduction
A combinational logic circuit is a circuit whose outputs only depend on the current state of its inputs. In
mathematical terms, each output is a function of the inputs. These functions can be described using
logic expressions, but is most often (at least initially) using truth tables.

Logic gates are the simplest combinational circuits, because their output is a very simple function of
their inputs describable with a very simple truth table. Naturally, the more inputs there are, the larger
the truth table.

Implementation
For this laboratory we had to implement a more economic design of the XOR function so we first start
by completing the given schematic with the pins number.

Schematic for Laboratory 2

Looking at this schematic, I was able to implement the XOR function using the Integrated Circuit
74HC00, I will post the datasheet below:

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Datasheet for integrated circuit 74HC00
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CEN 3.1A

Using Digital Woks, I was able to implement the required circuit, I used as input A and B two buttons and
as output Y a LED. Bellow is my implementation of laboratory 2:

My implementation of laboratory 2

As you can see above the simple use of the 74HC00 helps us to implement an example of Combinational
Logic Circuit in which our input affects the output.

Conclusion
In the end we have to check if our implementation is correct, in order to do that we take a look at the
truth table of XOR function which I attached bellow:

XOR Truth table Example of correct output

As we can see above our implementation is working properly because for a certain input, we have the
desired output. In this case for A = 1 and B = 1 (a red dot inside the button means that the buttons is
clicked) we have output Y = 0 (if the circle is white, it means that there is no current arriving to the LED).

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In conclusion I really enjoyed the first laboratory at Digital Electronics and I was happy that I managed to
implement this simple circuit.

Laboratory 3 – Parity Checker

Introduction
The parity generating technique is one of the most widely used error detection techniques for the data
transmission. In digital systems, when binary data is transmitted and processed, data may be subjected
to noise so that such noise can alter 0s (of data bits) to 1s and 1s to 0s.

Hence, a Parity Bit is added to the word containing data in order to make number of 1s either even or
odd. The message containing the data bits along with parity bit is transmitted from transmitter to the
receiver.

At the receiving end, the number of 1s in the message is counted and if it doesn’t match with the
transmitted one, it means there is an error in the data. Thus, the Parity Bit it is used to detect errors,
during the transmission of binary data.

A Parity Generator is a combinational logic circuit that generates the parity bit in the transmitter. On the
other hand, a circuit that checks the parity in the receiver is called Parity Checker. A combined circuit or
device of parity generators and parity checkers are commonly used in digital systems to detect the
single bit errors in the transmitted data.

In this laboratory we will focus on the Parity Checker, more exactly on the 4 bits Even/Odd Parity
Checker.

Implementation
Taking in consideration the assignment our circuit will have 5 inputs (4 bits representing the information
and the fifth input will let us choose if we check for odd parity or even parity). In order to begin
implementing the circuit in digital works we first have to take a look at the following schematic and
understand what Integrated Circuits we will use and what pins we will connect.

Schematic for laboratory 3

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After I numbered all the pins so it would be easier for me to implement this circuit, I made the parity
checker using one 74HC86 integrated circuit for the five inputs I used five buttons and for the output I
used a LED. Bellow there is a screen shot with the circuit in Digital Works, after that we will discuss how
the P input affects the output and what should the output be depending on the input.

My implementation for laboratory 3

Looking at the design above let’s discuss more about the P input so we have two possible states:

 P = 0 then it will be an odd parity checker

 P = 1 then it will be an even parity checker

The sum of the data bits and parity bits can be even or odd. In even parity, the added parity bit will
make the total number of 1s an even number, whereas in odd parity, the added parity bit will make the
total number of 1s an odd number.

Conclusion
I will attach the truth table bellow to better understand how this circuit works, then another table with
six groups of inputs, where I tested to see if the circuit is working correctly.

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Table of truth for parity checker
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D C
1 0
1 1
1 1
0 1
1 0
1 1
B A Y P NOT Y
0 0 1 0 1
0 1 1 0 1
1 1 0 0 0
1 1 1 1 0
1 1 1 1 0
1 1 0 1 1

After comparing the results from my table with the results in the original we can conclude that the
parity checker is working properly. In conclusion I want to discuss more about the every day use of the
parity checker and other facts.

Some applications of parity are:

 In digital systems and many hardware applications.

 My results
The parity bit is also used in Small using theSystem
Computer circuit I designed
Interface (SCSI) and also in Peripheral
Component Interconnect (PCI) to detect the errors.

We also have the term no parity which is used when the parity bits are not used to check for errors then
the parity bit is said to be non-parity or no parity or the absence of parity.

The parity checker is needed to detect the errors in communication and also in the memory storage
devices parity checker is used for testing.

As a conclusion, I was surprised how a device this simple it’s so important in guaranteeing that the
information received it’s not corrupted.

Laboratory 4 – Multiplexers
Introduction
It is a combinational circuit which have many data inputs and single output depending on control or
select inputs. For N input lines, log n (base2) selection lines, or we can say that for 2n input lines, n
selection lines are required. Multiplexers are also known as “Data n selector, parallel to serial convertor,
many to one circuit, universal logic circuit”. Multiplexers are mainly used to increase amount of the data
that can be sent over the network within certain amount of time and bandwidth.

Example of Multiplexer with 4 inputs

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Implementation
In this laboratory we will cover the implementation of the four inputs MUX for this we will use the
following integrated circuits:

 One 74HC14 (HEX Inverters)

 Three 74HC08 (4 AND with 2 inputs)
 One OR gate
 One NOT gate

For a better understanding of the circuit, I will post bellow the datasheet of the two integrated circuits.

74HC08 Datasheet 74HC14 Datasheet

Next, we will take a look at the schematic showing us how we will connect all the pins, I already
numbered the pins so it will be easier when we implement the MUX in digital works.

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Schematic for laboratory 4

Using the diagram shown above it was easy to implement the MUX on the board using Digital Works, as
a disclaimer instead of the CDB408 we used 74HC08 and instead of CDB404 we used 74HC14. This task
was a little bit harder than the rest of the tasks because you had to pay attention to connect all the wires
correctly.

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My implementation of laboratory 4

Conclusion
Let’s take a look at the truth table and then discus some of the advantages when using a MUX.

Truth table for four inputs MUX

Using the truth table above I was able to correct some mistakes and in the end the circuit was working
properly. A fac that was very interesting for me to find out, was the widely usefulness of the MUX circuit
because let’s say we have four inputs and each of the inputs has an output (E.G. If input one is active,
output one will be active), for this system to work we will have to use four wires, which it’s not cost
effective, but using a MUX we use fewer wires and the system works the same, I will attach a photo to
better understand how a MUX and DMUX work.

MUX and DMUX working principle

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CEN 3.1A

Laboratory 5 – Demultiplexer
Introduction
A demultiplexer (also known as a demux or data distributor) is defined as a circuit that can distribute or
deliver multiple outputs from a single input. A demultiplexer can perform as a single input with many
output switches. The demultiplexer’s output lines are ‘n’ in number, the select line number is ‘m’ and n
= 2m. The control signal or select input code decides the output line to which the input has to be
transmitted.

The demux can also perform as a binary to decimal decoder. The data input line should be at the logic 1
level, and the binary input is given to the select input lines. The corresponding line will give the output.
In the designing of multiple combinational circuits, this circuit is advantageous.

The function of a demultiplexer circuit essentially the reverse of the multiplexer (hence the name).

Here’s will analyze a 1 to 4 demultiplexer in a bit more detail.

Note that there are many other types of demultiplexers—e.g., 1-to-2, 1-to-8, 1-to-16 demultiplexer, etc.
But for this article, we’ll focus on a 1 to 4 demultiplexer. A 1 to 4 demultiplexer has:

 Input -> 1 input bit is present.

 Outputs -> The number of outputs is four. They are Y0, Y1, Y2, and Y3.
 Control Bits

Two control bits are used here. They are A and B. The input data bit is sent to the data bit of the output
lines depending on the select input or control bit’s value.

Implementation
For this implementation we used two integrated circuits 74HC08 and one integrated circuit 74HC04 the
data sheet for these integrated circuits can be found above (laboratory 4). We started as usual by
numbering the pins in order to begin implementing the circuit on the board.

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Schematic for laboratory 5

Looking at this schematic we can see that the DMUX is the opposite of the MUX, this one take only one
input (and two control bits) and as output it will show depending on the control bits which one of the
four inputs from the MUX was activated. Implementing this design in Digital Works was a little bit easier
and the final design looked a lot cleaner.

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My implementation for laboratory 5

Another interesting exercise was to connect the two circuits in order to see the full functionality of the
design. So to go in more depths in order to connect the MUX to the DMUX, I had to do the following
operations, the output from the MUX will be the input for the DMUX and the two control bits from the
MUX will be the same with the two control bits.

Example of MUX and DMUX circuit

As we can see above in the MUX we have the third input activated and int the DMUX the third bulb is
light, so this is a short demonstration of how this circuit is supposed to work.

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Conclusion
In the end we have to check the truth table to make sure that our DMUX is behaving normally, so I will
insert bellow a picture with the table.

Truth table for four inputs DMUX

In conclusion I think that this laboratory was my favorite one because I had the chance to better
understand how all the circuit works once I put them together, it was interesting to see how brilliant
idea and a simple circuit can save you a lot of wires and time. In reality this kind of system would be
operated by two motors that spins at the same time and checks the inputs and outputs one by one, or a
more modern system would use a digital MUX and DMUX.

Laboratory 6 – Digital Comparator (Numerical Comparator)

Introduction
A Numerical Comparator is a combinational circuit that compares two digital or binary numbers in order
to find out whether one binary number is equal, less than or greater than the other binary number. We
logically design a circuit for which we will have two inputs one for A and other for B and have three
output terminals, one for A > B condition, one for A = B condition and one for A < B condition.

Example of N bit comparator

In this laboratory we will talk about different types of comparators, so let’s start with the first one.

1 bit Numerical Comparator

A comparator used to compare two bits is called a single bit comparator. It consists of two inputs each
for two single bit numbers and three outputs to generate less than, equal to and greater than between
two binary numbers.

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4 bit Numerical Comparator

A comparator used to compare two binary numbers each of four bits is called a 4-bit magnitude
comparator. It consists of eight inputs each for two four bit numbers and three outputs to generate less
than, equal to and greater than between two binary numbers. The condition of A=B is possible only
when all the individual bits of one number exactly coincide with corresponding bits of another number.

Cascading Comparator

A comparator performing the comparison operation to more than four bits by cascading two or more 4-
bit comparators is called cascading comparator. When two comparators are to be cascaded, the outputs
of the lower-order comparator are connected to corresponding inputs of the higher-order comparator.

Example for Cascading Comparator

In this laboratory we will take a look at the 8 bits comparator, which will be possible by cascading two 4
bits comparators.

Implementation
Since we discussed the three types of comparators, we will also take a closer look at how to implement
them. Let’s start with the 1-bit comparator. This one is simple to implement, we will use the following
integrated circuits: 74HC86, 74HC04, 74HC08. For an easier understanding I will also attach the
datasheet for every integrated circuit.

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Datasheet for 74HC08 Datasheet for 74HC04 Datasheet for 74HC86

Using these three integrated circuits we are able to complete the schematic showing us how to connect
the comparator.

Schematic for 1-bit Comparator

As we can see from the schematic above the 1-bit comparator it’s really simple to implement, but let’s
now take things a little bit harder and let’s talk about what we need in order to implement the 4-bit
comparator. Here we only need one Integrated Circuit 74HC85, so let’s have a look at the datasheet to
better understand what logical gates we have in this circuit and at what ports we can connect the input
and where the output.

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Datasheet for 4-bits Comparator

Here I will also add the schematic so we can analyze how the inputs are used and how the output will
generate the correct state when comparing the two numbers.

Schematic for the 4-bits Comparator

In the end after we made the four-bit comparator it will be easier to implement any type of comparator
because we only have to cascade the four-bit comparator as many times as we want in order to reach
the value of the inputs. In the example below we use two bits comparator to create an 8-bits
comparator.

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Schematic for the 8-bits Comparator

After we have all the three schematics, we could start to implement them in digital works, we start with
the 1-bit comparator and work our way until we are done with the 8-bits comparator and after this in
the next section we will take a look at the truth tables for all the comparators and check our work.

My implementation of 1-bit Comparator

My implementation of 4-bits Comparator

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My implementation of 8-bits Comparator

Taking a look at the three implementation we can see that the difficulty of the circuits is increasing
exponentially, we also notice that the 8-bit Comparator is mase up of two 4-bits Comparator, the first
one compares the bits from 0 to 4 and then it sends the answer to the tree “comparator inputs” (A>B,
A<B and A=B), then the other 4-bits Comparator compares the bits from 4 to 7, the final answer is then
outputted at the end of the circuit.

Conclusion

If we had three different circuits to implement it does mean that we will have three different truth
tables so let’s check each implementation one by one.

Truth table for 1-bit Comparator

Input to Compare Cascading Input Outputs

A3B3 A2B2 A1B1 A0B0 A>B A<B A=B A>B A<B A=B
A3>B3 A2>B2 X X X X X 1 0 0

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A3<B3 X X X X X X 0 1 0
A3=B3 A2=B2 A1=B1 A0=B0 X X 1 0 0 1
A3=B3 A2=B2 A1=B1 A0<B0 X X X 0 1 0
Truth table to check my implementation of 4-bits Comparator

Input to Compare Cascading Input Output

A7B7 A6B6 A5B A4B4 A3B3 A2B A1B1 A0B A<B A=B A>B A<B A=B A>B
5 2 0
= X X X X X X = X X X 0 1 0
X X X > X X = = X = X 0 0 1
> > > X X X X X X X X 0 0 1
= = = = = = = = < X X 1 0 0
Truth table to check my implementation of 8-bits Comparator

After I tried different inputs on all three implementation and comparing the result with the truth tables
in the laboratory, I was positive that all three circuits were implemented correctly.

As a curiosity I searched the internet on some systems that use this sort of comparators, here are some
cases when they are useful:

 Comparators are used in central processing units (CPUs) and microcontrollers (MCUs).

 These are used in control applications in which the binary numbers representing physical
variables such as temperature, position, etc. are compared with a reference value.

 Comparators are also used as process controllers and for Servo motor control.

 Used in password verification and biometric applications.

Laboratory 7 – Half Adder and Full Adder

Introduction
An adder is a digital logic circuit in electronics that is extensively used for the addition of numbers. In
many computers and other types of processors, adders are even used to calculate addresses and related
activities and calculate table indices in the ALU and even utilized in other parts of the processors. These
can be built for many numerical representations like excess-3 or binary coded decimal. Adders are
basically classified into two types: Half Adder and Full Adder.

So, coming to the scenario of half adder, it adds two binary digits where the input bits are termed as
augend and addend and the result will be two outputs one is the sum and the other is carry. To perform
the sum operation, XOR is applied to both the inputs, and AND gate is applied to both inputs to produce
carry. Whereas in the full adder circuit, it adds 3 one-bit numbers, where two of the three bits can be
referred to as operands and the other is termed as bit carried in. The produced output is 2-bit output
and these can be referred to as output carry and sum.

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Implementation
In this laboratory we have to implement three different circuits, we will break them one by one and
explain what we need to build them.

We are starting with the Half Adder, this one is a simple circuit we will need two logical gates, the XOR
gate will be used to give us the sum of the two bits and the AND gate will be used to give us the carry.
Bellow is the schematic with numbered pins so it will be easier for us to implement this circuit.

Schematic for 1-bit Half Adder

In the schematic we used for the AND gate the integrated circuit 74HC08 and for the XOR gate we used
the integrated circuit 74HC86.

The next circuit we will look at is the 1-bit Full Adder, this time we have to take in consideration that we
also have as an input the bit carried in. This is how the schematic should look like.

Schematic for21
1-bit Full Adder
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CEN 3.1A

We can observe in the schematic above that we replaced the three inputs AND, instead we are using
two AND gates with two inputs each. In order to implement this circuit in Digital Works we used
Integrated Circuits like 74HC08 and 74HC04 and some other logical gates. Next, we will take a closer
look at the last circuit, this is a more complex one, we are talking about the 4-bits Full Adder. Below we
have the schematic to better understand how it works.

Schematic for 4-bits Full Adder

We can see in the above schematic that this circuit will have eight inputs (four bits for each number that
will be summed) and it has one more input which represents the carry in, as output we will have four
bits they represent the result of the sum, but we also have a carry out bit.

Now that we have prepared all the schematics let’s start to implement all the circuits in Digital Works
starting with the 1-bit Half Adder.

My implementation for 1-bit Half Adder

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My implementation of 1-bit Full Adder

My implementation of 4-bits Full Adder

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As we can see in the implementation above, we are using the 74LS83 Integrated Circuit. If we double
click on it, we can see all the components that are used to create this macro, so let’s take a closer look at
this.

Components of 4-bit Full Adder

And now we could click once more on the “adder” circuit to see what components does it have.

Binary Full Adder

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So we can say that the 4-bit adder it’s made by combining four Binary Full Adder.

Conclusion
Now as we did in the other laboratories, we have to verify the implementations in order to be certain
that the circuit works. I will attach all the truth tables and then we will take a look at the results.

Truth table for 1-bit Half Adder

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Truth table for 1-bit Full Adder

Truth table for 4-bits Full Adder

The last table, the one for the 4-bits Adder was completed with the help of the circuit designed in Digital
Works, after I checked all the results given by the circuits implemented in Digital Works with the
information written in the truth tables I concluded that the circuits worked properly.

As always, I was curious on where the Full Adder (FA) and the Half Adder (HA) are used, so I search on
the internet for some information, here are some interesting facts that I found out.

 The binary bits addition can be done by half adder using ALU within the computer because it
uses adder.

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 Half adder combination can be used for designing a full adder circuit.

 Half adders are used in the calculators and to measure the addresses as well as tables

 These circuits are used to handle different applications within digital circuits. In the future, it
plays a key role in digital electronics.

 A FA circuit is used as an element in many large circuits such as Ripple Carry Adder. This adder
adds the number of bits simultaneously.

 FAs are used in Arithmetic Logic Unit (ALU)

 FAs are used in graphics-related applications like GPU (Graphics Processing Unit)

 These are used in the multiplication circuit to execute Carryout Multiplication.

 In a computer, to generate the memory address & to build the program counterpoint toward
subsequent instruction, the Arithmetic Logic Unit is used by using Full Adders.

Laboratory 8 – Code Converters – Binary to/from Gray Code

Introduction
Gray Code system is a binary number system in which every successive pair of numbers differs in only
one bit. It is used in applications in which the normal sequence of binary numbers generated by the
hardware may produce an error or ambiguity during the transition from one number to the next.

For example, the states of a system may change from 3(011) to 4(100) as- 011 — 001 — 101 — 100.
Therefore there is a high chance of a wrong state being read while the system changes from the initial
state to the final state.

This could have serious consequences for the machine using the information. The Gray code eliminates
this problem since only one bit changes its value during any transition between two numbers.

Converting Binary to Gray Code

Let b0, b1, b2 and b3 be the bits representing the binary numbers. Where b0 is the LSB and b3 is the
MSB.

Let g0, g1, g2 and g3 be the bits representing the gray code of the binary numbers, where g0 is the LSB
and g3 is the MSB. We then have the following truth table:

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Truth table for Binary to Gray conversion

To find the corresponding digital circuit, we will use the K-Map technique for each of the gray code bits
as outputs with all of the binary bits as input.

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After calculation we end up with the following relations:

 G3 = B3
 G2 = B2 XOR B3
 G1 = B1 XOR B2
 G0 = B0 XOR B1

Converting Gray Code to Binary

Converting gray code back to binary can be done in a similar manner.

Let b0, b1, b2 and b3 be the bits representing the binary numbers. Where b0 is the LSB and b3 is the
MSB.

Let g0, g1, g2 and g3 be the bits representing the gray code of the binary numbers, where g0 is the LSB
and g3 is the MSB. We then have the following truth table:

We then have the following truth table:

Truth table for Gray to Binary conversion

Then we use again K-map to get back the binary bits from the gray code and we end up with the
following relations:

B3 = G3 B2 = G2 XOR G3 B1 = G1 XOR G2 XOR G3 B0 = G0 XOR G1 XOR G2 XOR G3.

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Implmentation
Using the relations that we discovered above we can easily have the schematic regarding the two
converters, I also numbered the pins for an easier understanding when we have to implement them in
Digital Works.

We can
use
these

Schematic for Binary to Gray converter Schematic for Gray to Binary converter

schematics to make our code converters in Digital Works, we have to use on 74HC86 integrated circuit
for every converter, as inputs we will use four buttons and as output we will have four LEDs for every
code converter.

My implementation for Binary to Gray converter My implementation for Gray to Binary converter

Conclusion
Now that we have implemented the two code converters, we can use the truth tables to be certain that
the circuit is working correctly. As we can see in the image above both circuits gave the correct output
so we can be sure that everything is working properly.

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Laboratory 9 – Encoders and Decoders

Introduction
Binary code of N digits can be used to store 2 N distinct elements of coded information. This is what
encoders and decoders are used for. Encoders convert 2N lines of input into a code of N bits
and Decoders decode the N bits into 2N lines.

Encoders

An encoder is a combinational circuit that converts binary information in the form of a 2 N input lines into
N output lines, which represent N bit code for the input. For simple encoders, it is assumed that only
one input line is active at a time.

As an example, let’s consider Octal to Binary encoder. As shown in the following figure, an octal-to-

binary encoder takes 8 input lines and generates 3 output lines.

Decoders

A decoder does the opposite job of an encoder. It is a combinational circuit that converts n lines of input
into 2n lines of output.

Implementation
Given the truth table and some other relations we can conclude that:

Let x, y, z be the output of the encoder and D1, D2, …, D7 the input, we have the following relations:

X = D4 + D5 + D6 + D7 Y = D2 + D3 + D6 + D7 Z = D1 + D3 + D5 + D7

Hence, the encoder can be realized with OR gates as follows:

Schematic for Encoder

Using again the truth table, but this time for the decoder we can make again the schematic and then
number the pins.

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Schematic for Decoder

We can use the two schematic to figure what Integrated Circuits we need when designing the circuits in
Digital Works, for the encoder we will use two 74HC20 parts (four inputs AND gate) and for the decoder
we have to use one 74HC04 (hex inverters) and three 74HC10 (triple 3-input NAND gate).

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My implementation for the encoder

My implementation for the decoder

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Conclusion
Let’s have a look at the truth tables of the encoder and decoder to be sure that the circuits are working
correctly.

Truth table for decoder

Truth table for encoder

Having the two tables we can check if the circuits are working properly, another interesting fact is that
we can link the two circuits so if we do that the final output will be the same as the input because the
first circuit will decode the input and after that the second circuit will code again the input so the output
will match the first input. In the schematic bellow we can see how to link the circuits.

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Example of how we can link the DCD (decoder) and the CD (encoder)

I also implemented this in digital works, making the decoder and encoder two separate macros and then
connecting them.

My implementation of decoder and coder linked together

We can see that the output is the same with the input, another proof that the circuits are designed and
implemented properly.

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Laboratory 10 – Decoder BCD to Decimal. Decoder BCD to 7 Segments

Introduction
BCD to Decimal decoder converts each BCD code into one of 10 possible decimal combinations.

It is generally referred to as 1 of 10 decoder. The table for the same is shown below.

The method of implementation is the same as that of the 4-bit decoder. This also uses NAND or an AND
gate for decoding. And the output is produced concerning the gate used.

BCD to 7 segment decoder accepts BCD codes and produces outputs to drive 7 segment display devices.

An example of such a decoder includes 74LS47 which is an IC device but other than decoding and
segmentation drive capabilities, it also has additional features like RBI (ripple blanking input).

We will also cover in this laboratory BCD to decimal with two inputs and four outputs.

Implementation
Let’s start with the BCD to Decimal decoder, in order to implement it we have to first look at the
schematic:

Schematic for BCD to Decimal

We can see that it will have four inputs and ten outputs. We will have to make the macro ourself
because I didn’t find the part in digital works. So here is a screenshot with the macro:

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Anghel Matei
CEN 3.1A

Macro used for the BCD to Decimal decoder

Using this macro, it was easy to implement the rest of the circuits as in the photo shown below:

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Anghel Matei
CEN 3.1A

My implementation for BCD to Decimal

The next circuit will be the BCD to Decimal decoder with two inputs and four inputs. As before we start
with the schematic in order to have a better look at what we will use:

Schematic for BCD to Decimal with two inputs and four outputs

Comparing the two schematic we can see that we have to use the same circuit as before (CDB 442) and
we also have to use 74HC04 (CDB 404). So here is the implementation using Digital Works:

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Anghel Matei
CEN 3.1A

My implementation for BCD to Decimal with two inputs and four outputs

The last circuit we had to implement was the BCD to 7 Segments, this one was a bit tricky because I had
to be careful when connecting the display so that every pin is connected correctly. Let’s look at the
schematic:

Schematic for BCD to 7 Segments

Forming the numbers using the 7 Segments display

So, in order to implement this in Digital Works we will use the 74LS47, I will post a picture with the
logical gates that make the integrated circuit:

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Anghel Matei
CEN 3.1A

74LS47 Integrated Circuit

So now that we have all the parts needed let’s take a look at the final implementation of the BCD to 7
segments decoder.

My implementation of BCD to 7 Segments decoder

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CEN 3.1A

Conclusion
Now that we have all the implementations it’s time to check the truth tables to make sure that the
circuits are working fine.

Truth table for BCD to Decimal decoder

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Anghel Matei
CEN 3.1A

Truth table for BCD to 7 Segments

Using the tables above I was able to test the circuits and make some minor changes in order for them to
work correctly.

Final Conclusion
At the end of this documentation, I wanted to take the time I share some of my personal opinions
regarding the Digital Electronics laboratory.

I enjoyed this laboratory and the practical implementation, I also liked that almost all the laboratories
had some real-life use.

The laboratory professor explained the task very well and was very helpful when I had problems or
didn’t understand some definitions.

In other words, I learned some interesting and useful information in this laboratory and I really liked this
subject of Digital Electronics.

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