UEENEEH148A

Design and develop advanced digital systems

NAVJOT SINGH

Task 1
Bothe the 4001 and 4070 ICs are CMOS and therefore sensitive to static electricity.

This experiment may be built using only one 8 –position DIP switch but the concept is easier
to understand if two switch assemblies are used , the idea is one switch acts to hold correct
code for unlocking the lock.While the other switch serves as a data entry point for the person
trying to open the lock.

In real life of course the switch assembly with key code set on it must be hidden from the site
of person opening the lock which means it must be physical located elsewhere from where
the data entry switch assembly is.This requires two switch assemblies.

However if you understand the concept clearly you may built a working circuit with only one
8-position switch using the left four switches for data entry and the right four switches to
hold the key code.

For extra effect choose different colours LED green for go and red for no go.

Task 2

Solution .

Task 2.-

Designing requirements:

1xAND Block
1xOR Block

2x NOT Blocks

3x Input Blocks

1x Power Block

The output of an AND Block with two Input Blocks should be connected to one input of an OR
Block The other input of OR block should be connected to a NOT block which has an input
Block feeding into it .Finally the output of OR Block should feed into another NOT Block which
is connected to a power block.

The OUTPUT of this combinational logic circuit ic represented by the Red LED on the final NOT
Block.

FIGURE B

IN the above figure (B) it applies De Morgan LAW:Push the bubble through the NOR
gate ,turning that gate into an AND_ and through to create NOT gate on BOTH inputs.
FIGURE C

Figure (c)
As shown in figure c Multimedia devices like cellphones radios , televisions and computers
require low area and low power configurable address to process greedy computation
algorithm for the real time A/V signal and image processing such as discreet cosine transform,
inverse ,discreet cosine transform and fast fourier transform etc. In this diagram a 64 bit de-
configurable adder is proposed and implemented to reduce the area and power consumption

FIGURE D

In the above figure :

First a truth table should be made for all the possible combinations of inputs the inputs are
for example ATM P stand for printing statement ,W for withdrawing money and D for
depositing money.There is one output which is whether or not the ATM bill charge a fee the
output will be donated by C.

Part A of Given Task Prepare to diagnose and rectify faults OHS (Included)

PART –A:SOLUTION.

(a)

 The OHS risk document is as below:-

It is the responsibility of the Operational Manager to ensure that:

• Work areas that they control are Appropriately signed to warn of present danger;

• Work areas that they control are Provided with suitable systems to:
o Restrict access to the work area;

o Ensuring that workers are adequately trained and instructed on how to perform work
safely.

• Risks to health and safety that arise as a result of use of a work area are eliminated or
otherwise minimised to an acceptable level;

• Any OHS prescribed activities are managed in accordance with the OHS Prescribed Activities
and Permit to Work Procedure.

• Monitoring of risks is being effectively managed.

• Any changes made are managed in accordance with section 3 – Managing physical changes
to a work area

(b)

Generally, functional testing in detail follows the steps below: Determine which functionality
of the product needs to be tested. This can vary from testing main functions, messages, error
conditions and/or product usability.

(c) 1:-

Digital logic gates can have more than one input, for example, inputs A, B, C, D etc., but
generally only have one digital output, (Q). Individual logic gates can be connected or
cascaded together to form a logic gate function with any desired number of inputs, or to form
combinational and sequential type circuits, or to produce differnt logic gate functions from
standard gates.

The integrated circuits we have used are MOS, CMOS, TTL . CMOS ICs are fault tolerant,
reduce risk of chip failure, use of anti-static foam for storage and transport of ICs. TTL
technology requires regulated power supply of 5 volts.
ii)

For a 2-input OR gate, the output Q is true if EITHER input A “OR” input B is true, giving the
Boolean Expression of: ( Q = A or B ).

When a logic circuit is given, the Boolean expression describing that logic circuit can be
obtained by combining the input variables in accordance with the logic gate functions.

iii)

There are four steps to building a truth table are as under:-

• Determine the number of lines or rows in the table.

• Second, the main operator has to be identified.

• Next the basic input values are assigned to each letter.

• The final step is to calculate the values of each logical operator.

Part B of Given Task

SOLUTION:- B

a)

The OHS risk document is as below:-

• Work areas that they control are Appropriately signed to warn of present danger;
• Work areas that they control are Provided with suitable systems to:

o Restrict access to the work area;

o Ensuring that workers are adequately trained and instructed on how to perform work
safely.

• Risks to health and safety that arise as a result of use of a work area are eliminated or
otherwise minimised to an acceptable level;

• Any OHS prescribed activities are managed in accordance with the OHS Prescribed Activities
and Permit to Work Procedure.

• Monitoring of risks is being effectively managed.

• Any changes made are managed in accordance with section 3 – Managing physical changes
to a work area.

b)

The digital logic trainer used in this lab includes a number of features to support

the design and fabrication of logic circuits in the lab. The main features include:

• Fixed and variable positive and negative DC power supplies

• Fixed 60 Hz AC power supply

• Pulse generator with continuously variable pulse widths from 100 nSec

to 10 mSec and repetition rates from 1 μSec to 100 mSec

• Pulse duty cycles from 0 – 100%

• Pulse position and width modulation inputs

• Sweep generator Function with variable period from 1 mSec to 1

second

• Function generator with sine, square, and triangular output from 1 Hz

to 1 MHz with logic level and variable DC offset output.

• 8 - Logic level switches.

c)

The easiest way is to go to an outlet on a circuit that you know is live (has power). Insert the
tester leads or sensor into the outlet slots. If the tester lights up, it's working fine. If it fails to
light up, the tester is bad or needs new batteries.

d)

Fault diagnosis is determining which fault occurred, in other words, determining the root(s)
of the out of control status. Process fault diagnosis involves interpreting the current status of
the plant given sensor readings and process knowledge.

e)

Equal probability troubleshooting is a technique that allows you to make a few initial
observations and then move troubleshooting fences to include only one or two suspected
components. Well, how do you do that? Within the lifetime of a system, certain components
tend to fail more often than others and that's what we had talked about on the previous
slide. Using this information the probability of a failure being a repeat event can lead to
faster diagnosis and repair and as was mentioned in the previous page, logbooks, technicians
experience will aid in being able to quickly diagnose a problem.

f)

A bistable multivibrator has two stable states, as indicated by the prefix bi in its name.
Typically, one state is referred to as set and the other as reset. The simplest bistable device,
therefore, is known as a set-reset, or S-R, latch. To create an S-R latch, we can wire two NOR
gates in such a way that the output of one feeds back to the input of another, and vice versa,
like this:

g)

By adding a .dc analysis card and specifying source V1 from 24 volts to 24 volts in 1 step (in
other words, 24 volts steady), we can use the .print card analysis to print out voltages
between any two points we desire.

h)

One minus one may not be zero. It may have have an offset like an analog meter which is not
zeroed. The inputs may draw current. The characteristics may drift with age and temperature.
Gain may be reduced at high frequencies, and phase may shift from input to output.

Part C of Given Task

1. We can implement these Boolean functions by using basic gates. The basic gates are
AND, OR & NOT gates.

AND gate

An AND gate is a digital circuit that has two or more inputs and produces an output, which is
the logical AND of all those inputs. It is optional to represent the Logical AND with the symbol
‘.’.

The following table shows the truth table of 2-input AND gate.
A B Y = A.B

0 0 0

0 1 0

1 0 0

1 1 1

Here A, B are the inputs and Y is the output of two input AND gate. If both inputs are ‘1’, then
only the output, Y is ‘1’. For remaining combinations of inputs, the output, Y is ‘0’.

The following figure shows the symbol of an AND gate, which is having two inputs A, B and
one output, Y.

And Gate

This AND gate produces an output Y, which is the logical AND of two inputs A, B. Similarly, if
there are ‘n’ inputs, then the AND gate produces an output, which is the logical AND of all
those inputs. That means, the output of AND gate will be ‘1’, when all the inputs are ‘1’.

OR gate

An OR gate is a digital circuit that has two or more inputs and produces an output, which is
the logical OR of all those inputs. This logical OR is represented with the symbol ‘+’.

The following table shows the truth table of 2-input OR gate.

A B Y=A+B

0 0 0

0 1 1

1 0 1
1 1 1

Here A, B are the inputs and Y is the output of two input OR gate. If both inputs are ‘0’, then
only the output, Y is ‘0’. For remaining combinations of inputs, the output, Y is ‘1’.

The following figure shows the symbol of an OR gate, which is having two inputs A, B and one
output, Y.

Or Gate

This OR gate produces an output Y, which is the logical OR of two inputs A, B. Similarly, if
there are ‘n’ inputs, then the OR gate produces an output, which is the logical OR of all those
inputs. That means, the output of an OR gate will be ‘1’, when at least one of those inputs is
‘1’.

2. These ICs are core components of logic circuits. Today's session on digital ICs will focus on
this type of IC. There are roughly 600 types of standard logic ICs, from basic chips to highly
functional arithmetic-and-logic units. There are two different types of implementation: TTL
and CMOS.

3. We see that Boolean functions are implemented in digital computer circuits called gates.

• A gate is an electronic device that produces a resultbased on two or more input values.

• In reality, gates consist of one to six transistors, but digital designers think of them as a
single unit.

4. A truth table is a mathematical table that lists the output of a particular digital logic circuit
for all the possible combinations of its inputs. These truth tables can be used to deduce the
logical expression for a given digital circuit, and are used extensively in Boolean algebra.

Part D of Given Task

Risk Identification /Task Yes/No Comments
Equipment Used
Power Supply
Are you using AC or DC Power
YES
Supply ?
Has the power supply been
YES
connected properly to the
mains?
Are the power supply leads
connected to the correct
sockets?
What is the maximum voltage
you will be required to use?
Any other Safety issues when
using Power Supply?
Digital Trainer YES
Has the Digital Trainer been
connected properly to the
mains?
What is the maximum voltage 12 VOLTS
you will be required to use?
Any other Safety issues when
using Digital Trainer Board?
Soldering/High Temperature
When using soldering iron:
Handling it with the correct
YES
technique?
Correct temperature being
used? YES
Correct amount of solder
being used?
Is there a risk of fire?
Can anyone suffer ill health YES
due to exposure to high or
low temperatures?
Soldering/High Temperature
When using soldering iron:
Handling it with the correct YES

technique?

Correct temperature being

used? NO
Correct amount of solder
being used?
Is there a risk of fire?
Can anyone suffer ill health
due to exposure to high or NO
low temperatures?
Electrical
When testing the circuit, Is
there water near/ on the NO

circuit board?
Damaged electrical switches?
Damaged cords/leads? NO
Any other factors?
Tripping/Falling
Is the floor surface slippery? NO
Poor housekeeping?
Lack of proper work platform?
Obstacles being placed on the NO

work platform?
WRITTEN ASSESSMENT

ANSWERS:

Ans1. Digital to Analog Converter (DC) basically converts digital code that represents digital
value to analog current or voltage.

Types of Digital to Analog Converter (DC)

There are basically four types of Digital to Analog Converter circuits namely:

• Binary Weighted Resistor D/A Converter Circuit

• Binary ladder or R–2R ladder D/A Converter Circuit

• Segmented DC

• Delta-Sigma DAC_______________________________________________________
Ans2. AD follow a sequence when converting analog signals to digital. They first
sample the signal, then quantify it to determine the resolution of the signal, and finally set
binary values and send it to the system to read the digital signal. Two important aspects of
the AD are its sampling rate and resolution.

TYPES

• Summing Amplifier. Since digital to analog conversion is simply a weighted sum of the
binary input, a circuit called a summing amplifier is used.

• R-2R Ladder. This is the simplest type of DA and needs only two resistor values
arranged in a ladder.

• PWM DA
Ans3. An A/D converter is a device that converts analog signals (usually voltage) obtained
from environmental (physical) phenomena into digital format Conversion involves a series of
steps, including sampling, quantization, and coding. A/D and D/A Requirements Electrically
sophisticated and high-speed processing are performed digitally in CPUs and DSPs.

There are really five major types of ADCs in use today:

• Successive Approximation (SAR) ADC

• Delta-sigma (ΔΣ) ADC

• Dual Slope ADC

• Pipelined ADC

• Flash ADC

Ans4. Analog to Digital Converters (D/A) are used to convert analog signals to digital signals.
Inversely, the computer output that is in digital form must sometimes be converted to an
analog signal prior to input to an electronic or electrical device. Digital to Analog Converters
(D/A) are used to perform this operation. A digital to analogue converter (D/A) converts a
digital signal from the computer into an electrical voltage which can be used to drive
electrical equipment, for example, a stirrer motor. _________________________________

. i. A programmable logic device (PLD) is an electronic component used to

build reconfigurable digital circuits. Unlike digital logic constructed using discrete logic gates
with

fixed functions, a PLD has an undefined function at the time of manufacture.

ii. Device (CPLD) is a logic device with completely programmable AND/OR arrays and
macrocells. Macrocells are the main building blocks of a CPLD, which contain complex logic
operations and logic for implementing disjunctive normal form expressions. AND/OR arrays
are completely reprogrammable and responsible for performing various logic functions.
Macrocells can also be defined as functional blocks responsible for performing sequential or
combinatorial logic.
iii. Field Programmable Gate Arrays (FPGAs) are semiconductor devices that are based around
a matrix of configurable logic blocks (CLBs) connected via programmable interconnects.
FPGAs can be reprogrammed to desired application or functionality requirements after
manufacturing.

_____________________________________________________________________

Ans6. In Verilog, a module is declared by the keyword module. A corresponding

keyword end module must appear at the end of the module definition. Each module must
have a module name, which is the identifier for the module, and a port list, which describes
the input and output terminals of the module.

When you write you Verilog or VHDL code, you are writing code that will be translated into
gates, registers, RAMs, etc. The program that performs this task is known as a Synthesis Tool.
It is the job of the Synthesis Tool to take your Verilog or VHDL code and turn it into something
that the FPGA can understand.

_____________________________________________________________________

Ans7. The key parameters to test an ADC are:

• DC offset error.

• DC gain error.

• signal-to-noise ratio (SNR)

• Total harmonic distortion (THD)

• Integral nonlinearity (INL)

• Differential nonlinearity (DNL)

• Spurious free dynamic range.

• Power dissipation.

_____________________________________________________________________

Ans8. The most basic of these characteristics are speed, resolution, dynamic range,
and accuracy. ADC conversion speed refers to samples-per-second, and measures how quickly
the device can accurately convert an analog signal/voltage.
Ans9. A state machine is a mathematical abstraction used to design algorithms. A state
machine reads a set of inputs and changes to a different state based on those inputs. A state
is a description of the status of a system waiting to execute a transition.

Objective Questions

Choose the correct option

Ans10. A = 1, B = 1, C = 1

Ans11 . b 2

Ans12.b.NAND

Ans13. Logic Analyser

Ans14. 4 Circuits

Ans15. All of the above

Ans16.b AND

Ans17. c AND gate

Ans18.b 16

Ans19. c basic gates, a clock oscillator, and a DeMorgan pulse generator

Ans20. d. All inputs are LOW

Ans22. b. dc supply voltage and the average supply current

Ans23. f. Any input is HIGH

Ans24. c. X = A + B + C