Practical No.

– 01
AIM: Draw the Circuit diagram of logic gates and verify the truth table.

OBJECTIVE: Identify various ICs and their specification

a) OR gate
b) AND gate
c) NAND gate
d) NOR gate

COMPONENTS REQUIRED:

• Breadboard.
• Connecting wires.
• IC 7400, IC 7408, IC 7432, IC 7406, IC 7402, IC 7404, IC 7486

THEORY:

The basic logic gates are the building blocks of more complex logic circuits. These logic gates
perform the basic Boolean functions, such as AND, OR, NAND, NOR, Inversion, Exclusive-OR,
Exclusive-NOR. Fig. below shows the circuit symbol, Boolean function, and truth. It is seen
from the Fig that each gate has one or two binary inputs, A and B, and one binary output, C.
The small circle on the output of the circuit symbols designates the logic complement. The
AND, OR, NAND, and NOR gates can be extended to have more than two inputs. A gate can
be extended to have multiple inputs if the binary operation it represents is commutative
and associative.

These basic logic gates are implemented as small-scale integrated circuits (SSICs) or as part
of more complex medium scale (MSI) or very large-scale (VLSI) integrated circuits. Digital IC
gates are classified not only by their logic operation, but also the specific logiccircuit family
to which they belong. Each logic family has its own basic electronic circuit upon which more
complex digital circuits and functions are developed. The following logic families are the
most frequently used.

TTL Transistor-transistor logic

ECL Emitter-coupled logic
MOS Metal-oxide semiconductor
CMOS Complementary metal-oxide semiconductor

TTL and ECL are based upon bipolar transistors. TTL has a popularity among logic families.
ECL is used only in systems requiring high-speed operation. MOS and CMOS, are based on
field effect transistors. They are widely used in large scale integrated circuits because of
their high component density and relatively low power consumption. CMOS logic consumes
far less power than MOS logic. There are various commercial integrated circuit chips
available. TTL ICs are usually distinguished by numerical designation as the 5400 and 7400
series.

PROCEDURE:

1. Check the components for their working.

2. Insert the appropriate IC into the IC base.
3. Make connections as shown in the circuit diagram.
4. Provide the input data via the input switches and observe the output on
output LEDs
 Practical No. – 02
Aim: Realization of AND, OR, NOT and Ex-OR logic gates using NAND and NOR gate.

Apparatus:

Circuit Diagram:

I. Implementation using
NAND gate:
Procedure:

a) Connections are made as per the circuit diagram I & II.

b) By applying the inputs, the outputs are observed and the operation is verified with
the help of truth table.

Precautions

1. Connections must be tight on the bread board

2. Identify the pins of the IC properly.
3. Take care while removing and inserting the IC on bread board.
 Practical No. – 03
Aim: Implement simple Boolean equation using gates and verify output.

LEARNING OBJECTIVE:

• To simplify the Boolean expression and to build the logic circuit.

• Given a Truth table to derive the Boolean expressions and build the logic circuit to
realize it.

COMPONENTS REQUIRED:

IC 7400, IC 7408, IC 7432, IC 7406, IC 7402, Connecting wires, Bread board.

THEORY:

Canonical Forms (Normal Forms): Any Boolean function can be written in disjunctivenormal
form (sum of min-terms) or conjunctive normal form (product of max- terms).

A Boolean function can be represented by a Karnaugh map in which each cell corresponds
to a minterm. The cells are arranged in such a way that any two immediately adjacent cells
correspond to two minterms of distance 1. There is more than one way to construct a map
with this property.
PROCEDURE:

• Check the components for their working

• Insert the appropriate IC into the IC base
• Make connections as shown in the circuit diagram.
• Provide the input data via the input switches and observe the output on output LEDs
Verify the Truth Table

RESULT: Simplified and verified the Boolean function using basic gates and universal gates
 Practical No. – 04
AIM: Implement and Verify truth table of Half and Full Adder

LEARNING OBJECTIVE:

• To design, realize and verify the adder and subtractor circuits using basic gates and
universal gates.
• To design, realize and verify full adder using two half adders.
• To design, realize and verify a full subtractor using two half subtractors.

COMPONENTS REQUIRED: IC 7400, IC 7408, IC 7486, and IC 7432, Patch cards and IC Trainer
Kit.

THEORY:

Half-Adder: A combinational logic circuit that performs the addition of two data bits, A and
B, is called a half-adder. Addition will result in two output bits; one of which is the sum bit,
S, and the other is the carry bit, C. The Boolean functions describing the half-adder are:

S =A ⊕ B C=AB

Full-Adder: The half-adder does not take the carry bit from its previous stage into account.
This carry bit from its previous stage is called carry-in bit. A combinational logic circuit that
adds two data bits, A and B, and a carry-in bit, Cin, is called a full-adder. The Boolean
functions describing the full-adder are:

S = (x ⊕ y) ⊕ Cin C = xy + Cin (x ⊕ y)
PROCEDURE:

• Check the components for their working

• Insert the appropriate IC into the IC base
• Make connections as shown in the circuit diagram.
• Verify the Truth Table and observe the outputs.
 Practical No. – 05
AIM: Study and Verify truth table of 4:1 Multiplexer.

APPARATUS REQUIRED: Power Supply, Digital Trainer, Connecting Leads, IC’s 74153(4x1
multiplexer )

THEORY:

MULTIPLEXER: Multiplexer generally means many into one. A multiplexer is a circuit with
many Inputs but only one output . By applying control signals we can steer any input to the
output .The fig.(1) Shows the general idea . The ckt. has n-input signal, control signal & one
output signal . Where 2 n = m . One of the popular multiplexer is the 16 to 1 multiplexer,
which has 16 input bits, 4 control bits & 1 output bit.
PROCEDURE:

1. Fix the IC's on the bread board &give the input supply.
2. Make connection according to the circuit.
3. Give select signal and strobe signal at respective pins.
4. Connect +5 v Vcc supply at pin no 24 & GND at pin no 12
5. Verify the truth table for various inputs.

Truth Table of multiplexer (4x1) IC 74153

 Practical No. – 06
AIM: Study and Verify truth table of 1:4 De-Multiplexer

Theory:

Demultiplexer

A demultiplexer basically reverse the multiplexing function. It is take data from one line and
distribute them to given number of output lines. Fig. (3) shown a one to four line
demultiplexer circuit. The input data line goes to all of the AND gates. The two select lines
enable only one gate at a time and the data appearing on the input line will pas through the
selected gate to the associated output line.

The simplest type of demultiplexer is the one to two lines DMUX.

Procedure:

1. Connect the circuit as shown in Fig. (2).

2. Apply a signal to (A) input from clock (High Speed) of the logic INTIKIT unit. Draw the
wave form.
3. Apply signal to (B) input from the pulse generator of amplitude = 5 Volt (pp)
frequency = 50 KHz. Draw the wave form.
4. Set the selector control input (S = 0), draw the output waveform from the
multiplexer.
5. Set S = 1, draw the output waveform of the multiplexer. 6. Connect the output of
MUX to the DMUX circuit of Fig. (5) and find the output of demultiplexer when S = 0
and when S = 1.
 Practical No. – 07
AIM: Design and implement 2:4 Decoder.

THEORY:

Binary code of N digits can be used to store 2 N distinct elements of coded information. This
is what encoders and decoders are used for. Encoders convert 2 N lines of input into a code
of N bits and Decoders decode the N bits into 2N lines.

1) 2x4 Decoder / De-multiplexer

The name “Decoder” means to translate or decode coded information from one format into
another, so a digital decoder transforms a set of digital input signals into an equivalent
decimal code at its output

A decoder is a combinational circuit that converts binary information from n input lines to a
maximum of m=2^n unique output lines.

Figure 1. Logic Diagram of Decoder

1.1) 2-to-4 Binary Decoder

Figure 2. Circuit Diagram of 2-to-4 Decoder

The 2-to-4 line binary decoder depicted above consists of an array of four AND gates. The 2
binary inputs labelled A and B are decoded into one of 4 outputs, hence the description of 2-
to-4 binary decoder. Each output represents one of the minterms of the 2 input variables,
(each output = a minterm).

Figure 3. Logic Diagram and Truth table of 2-to-4 Decoder

The binary inputs A and B determine which output line from Q0 to Q3 is “HIGH” at logic
level “1” while the remaining outputs are held “LOW” at logic “0” so only one output can be
active (HIGH) at any one time.

Therefore, whichever output line is “HIGH” identifies the binary code present at the input, in
other words it “decodes” the binary input.Some binary decoders have an additional input
pin labelled “Enable” that controls the outputs from the device.

This extra input allows the decoders outputs to be turned “ON” or “OFF” as required.
Output is only generated when the Enable input has value 1; otherwise, all outputs are 0.
Only a small change in the implementation is required: the Enable input is fed into the AND
gates which produce the outputs.

If Enable is 0, all AND gates are supplied with one of the inputs as 0 and hence no output is
produced. When Enable is 1, the AND gates get one of the inputs as 1, and now the output
depends upon the remaining inputs. Hence the output of the decoder is dependent on
whether the Enable is high or low.
 Practical No. – 08
AIM: Design and implement 4:2 Encoder.

THEORY:

Encoder

An Encoder is a combinational circuit that performs the reverse operation of Decoder.It has
maximum of 2n input lines and ‘n’ output lines, hence it encodes the information from
2n inputs into an n-bit code. It will produce a binary code equivalent to the input, which is
active High. Therefore, the encoder encodes 2n input lines with ‘n’ bits.

Figure 4. Logic Diagram of ENCODER

4 : 2 Encoder

The 4 to 2 Encoder consists of four inputs Y3, Y2, Y1 & Y0 and two outputs A1 & A0. At any
time, only one of these 4 inputs can be ‘1’ in order to get the respective binary code at the
output.

Figure 5. Logic symbol and truth table of 4 to 2 encoder