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Date q /23/ IC\ Period _1_

Activity 2.1.4 AOI Logic Implementation

Introduction IS-
Would you pay $199 for a written specification for an MP3 player? Would you pay $299 for the
schematics for a cell phone? Of course not. You don't pay for the specifications or the schematics;
you pay for the product itself.

You are not quite to the point where you can design an MP3 player or a cell phone, but you can
design AOl logic circuits. In this activity you will learn how to implement AOl logic circuits from logic
expressions. The logic expressions will be in either Sum-Of-Products (SOP) or Product-Of-Sums (POS)
form.

Equipment
A: Y~q,\e : A(_
• Paper & Pencil 1():: f:>\v e :: t\ ~ (__
•
•
Circuit Design Software (CDS)
Digital Logic Board (DLB) c= o'(Q.V\(/•f :. p. c
• Integrated Circuits (74LS04, 74LS08, 74LS32)
• Jumper Wire

Procedure

Let's examine the process of implementing an AO! logic circuit by designing a circuit for the
relatively simply Sum-Of-Products (SOP) logic expression F1.
\
\
FI =AC+AC+ABC
1. Draw this circuit in the space provided below assuming that only 2-input AND gates
(74LS08), 2-input OR gates (74LS32), and inverters (74LS04) are available.

Circuit Truth Table

A l B C A. B (_ f ,
0 0 D
D 0

0 0
r- I 0 \

0 0
1)

'
~
 '- · ur dW a truth table for the circuit in the space above on the right.

3
· Using the CDS, enter and test the logic circuit that you designed. Use switches for the inputs
A, 8, & C and a probe or LED circuit for the output F1 . Verify that the circuit is working as
expected. Label, print, and attach a copy of the circuit to this assignment.

Teacher verification /vy1 g_~

4. Using the DLB, build and test the logic circuit that you designed and simulated. Verify that
the circuit is working as expected and the results match the results of the simulation.

Teacher verification fvY'11 / U\. ~

Though they are less frequently used, in later activities we will see that occasionally, logic expression
in the Product-Of-Sums (POS) form are easier to implement than SOP e9uations. For practice let's
implement an AOI circuit for the logic expression F2. ,

F2 =(A + C ) • ( A + 8 + C )
1. Draw this circuit in the space provided assuming that only 2-input AND gates (74LS08), 2-
input OR gates (74LS32), and inverters (74LS04) are available.
A ts C

1. Using th e CDS, enter and test the logic circuit that you designed. Use switches for the inputs
A, 8, & C and a probe or LED circuit for the output F2 . Verify that the circuit is working as
expected. Label, print, and attach a copy of the circuit to this assignment.

Teacher verification £vr'1 °I. 7 ~-

Conclusion
1. The two circuits shown below are equivalent, meaning that they both produce the same output,
Minterm=WXVZ.

w9z ~
-
_____~
')G
- wrt.
t.JI/.
. ~
W"< \
1\f/1'('("2-Minterm

'L
Version 1
w

f- ~___ _:._ 8;: Version 2

• Minterm

Analyze each circuit to prove that they both produce the output Minterm=WXYZ. You may use
the TP's as you did at the beginning of the previous assignment, or use the second method.

Since the two .versions produce the same output and require the same number of gates to
implement, is one version any better than the other? Note: Think delays. Though we don't
normally worry about it in our designs, remember that all logic gates have propagation delay.
\Je ,..,'.:.1~ "2 vv N'k , ~-\-\~,, kcu \:1 it"(s,'tv~,.,J o.t\l,.\\,u.,,i \ ., <-\0
--\(,n~~)\,. ~~ t} ~~..,.._~q -\v..~< ~ / w\..~-e '1 tv~'fv, '.~•~ "'-~11"'"'- \ ~c.,,\ ,~ 'i"
·Tu Y'lf ~\._ '°S .
2. Shown below are two equivalent circuits. One was implemented from an SOP logic expression
and the other from the equivalent POS form.

A ~

B I\~ -t \) (_
F3
C
SOP Version

A ~
- - )L~-\ c.,)
( f'\-\' ~
B
F3
C
c..;
POS Version

3
First analyze the SOP v . . tO rm use this
expression to erSion to determine the logic expression for F? in SOP •
generate a truth table for the circuit. t>c (3. L f 3
0 0 0
0
0
O
\
I
() 'I
()
0
l I
O
•
\' <) \ v'
'\ '
. . pos form. use this
Now analyze the POS version to determine the logic expression for F3 !.!.in!2.-!=-;_..--
expression to generate a truth table for the circuit. \3 C... f
D D D 1
0 o \
0 \ 0 t
0 I I I.
0
0
'I .0
0
I
I
How do the two truth tables compare? ' I

------r- ' < ...

\ \ A ,C:... . . \ 1 v ~ f \
• \ '
..,\ -<--- '()\ -t: \

::),;( {!_ _:~ f \ ~ '-5;,cJ..,' fV"~'C •

Is the column for F3 the same for both? Je<, They should be. If they are not the same,
review your work and make any necessary corrections.

Since the truth tables are the same for F3, what could b .d
--c- L .. ~ ' \ e sa, about the two logic expressions?
\"".e- ,""~ t'~ ~ ~ ~~"-C>Y\,J CA~ eVvw\.
 ).
-0 ~
- I 5 I 6
I "
.,,....__,.
I ~
2 3 4
7

vcc GND
-
=f
r
Al I 5.0V

51

Key= A
/S2 Key= B
/S3 Key= C B
B

X1
U3
NOT 2.5V
C C
Uf.
,.. U4 I OR2
-t ~X) L___./
AND2

D OR2 D

AND2 I us
NOT

E
AND2
E

F F

G G

0 2 3 4 5 6 7 8
 \. - r--

a' I 1
I 2
I 3
I 4
(- I1 5
I 6
I 2
___,-- 8

vcc GND IA
~

5.0V
Al L__
-
S1 I ls2 l 1s3
X1

Key= A \._ Key= B \._ Key= C 0 2.5V

U2
I 1s
B I I I l D
OR2
U3
~
.....

cl
NOT ~ U7 I IC
I I I U4

~
~
OR2

NOT
I OR2

I U6
D I I I
--·-··-· - ·· I 10
v- -
NOT

E
E

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