Chapter 

1 Chapter 1 :: Topics
• Background
• The Game Plan
Digital Design and Computer Architecture, 2nd Edition • The Art of Managing Complexity
David Money Harris and Sarah L. Harris • The Digital Abstraction
• Number Systems
• Logic Gates
• Logic Levels
• CMOS Transistors
• Power Consumption

Chapter 1 <1>  Chapter 1 <2> 

Background The Game Plan
• Microprocessors have revolutionized our world
• Purpose of course:
– Cell phones, Internet, rapid advances in medicine, etc.
• The semiconductor industry has grown from $21  – Understand what’s under the hood of a computer
billion in 1985 to $300 billion in 2011 – Learn the principles of digital design
– Learn to systematically debug increasingly 
complex designs 
– Design and build a microprocessor

Chapter 1 <3>  Chapter 1 <4> 

1
 The Art of Managing Complexity Abstraction
• Abstraction • Hiding details when programs

• Discipline they aren’t important device drivers

instructions
• The Three –Y’s registers

focus of this course

– Hierarchy datapaths
controllers

– Modularity adders
memories

– Regularity AND gates

NOT gates

amplifiers
filters

transistors
diodes

electrons

Chapter 1 <5>  Chapter 1 <6> 

Discipline The Three ‐Y’s
• Intentionally restrict design choices • Hierarchy
– A system divided into modules and submodules
• Example: Digital discipline
– Discrete voltages instead of continuous • Modularity
– Simpler to design than analog circuits – can build more sophisticated – Having well-defined functions and interfaces
systems
– Digital systems replacing analog predecessors: • Regularity
• i.e., digital cameras, digital television, cell phones, – Encouraging uniformity, so modules can be easily reused

CDs

Chapter 1 <7>  Chapter 1 <8> 

2
 Example: The Flintlock Rifle Example: The Flintlock Rifle
• Hierarchy • Modularity
– Three main modules: – Function of stock: mount
lock, stock, and barrel barrel and lock
– Submodules of lock: – Interface of stock: length
hammer, flint, frizzen, and location of mounting
etc. pins

• Regularity
– Interchangeable parts

Chapter 1 <9>  Chapter 1 <10> 

The Digital Abstraction The Analytical Engine

• Most physical variables are continuous • Designed by Charles 
Babbage from 1834 –
– Voltage on a wire 1871
– Frequency of an oscillation • Considered to be the 
– Position of a mass first digital computer
• Digital abstraction considers discrete  • Built from mechanical 
subset of values gears, where each gear 
represented a discrete 
value (0‐9)
• Babbage died before it 
was finished
Chapter 1 <11>  Chapter 1 <12> 

3
 Digital Discipline: Binary Values George Boole, 1815‐1864
• Two discrete values: • Born to working class parents
– 1’s and 0’s • Taught himself mathematics and
– 1, TRUE, HIGH joined the faculty of Queen’s
– 0, FALSE, LOW College in Ireland.
• Wrote An Investigation of the Laws
• 1 and 0: voltage levels, rotating gears, fluid  of Thought (1854)
levels, etc.  • Introduced binary variables
• Digital circuits use voltage levels to represent  • Introduced the three fundamental
1 and 0 logic operations: AND, OR, and
NOT.
• Bit: Binary digit

Chapter 1 <13>  Chapter 1 <14> 

Number Systems Number Systems
• Decimal numbers • Decimal numbers
1000's column

10's column
1's column

1000's column

10's column
1's column
100's column

100's column
5374 10 = 5374 10 = 5 × 103 + 3 × 102 + 7 × 101 + 4 × 100
five three seven four
thousands hundreds tens ones

• Binary numbers • Binary numbers

8's column

2's column
1's column

8's column

2's column
1's column
4's column

4's column
11012 = 11012 = 1 × 23 + 1 × 22 + 0 × 21 + 1 × 20 = 1310
one one no one
eight four two one

Chapter 1 <15>  Chapter 1 <16> 

4
 Powers of Two Powers of Two
• 20 = • 28 = • 20 = 1 • 28 = 256
• 21 = • 29 = • 21 = 2 • 29 = 512
• 22 = • 210 = • 22 = 4 • 210 = 1024
• 23 = • 211 = • 23 = 8 • 211 = 2048
• 24 = • 212 = • 24 = 16 • 212 = 4096
• 25 = • 213 = • 25 = 32 • 213 = 8192
• 26 = • 214 = • 26 = 64 • 214 = 16384
• 27 = • 215 = • 27 = 128 • 215 = 32768
• Handy to memorize up to 29
Chapter 1 <17>  Chapter 1 <18> 

Number Conversion Number Conversion
• Decimal to binary conversion: • Decimal to binary conversion:
– Convert 100112 to decimal – Convert 100112 to decimal
– 16×1 + 8×0 + 4×0 + 2×1 + 1×1 = 1910

• Decimal to binary conversion: • Decimal to binary conversion:

– Convert 4710 to binary – Convert 4710 to binary
– 32×1 + 16×0 + 8×1 + 4×1 + 2×1 + 1×1 = 1011112

Chapter 1 <19>  Chapter 1 <20> 

5
 Binary Values and Range Binary Values and Range
• N‐digit decimal number  • N‐digit decimal number 
– How many values?  – How many values? 10N
– Range?  [0, 10N ‐ 1]
– Range?   – Example: 3‐digit decimal number: 
– Example: 3‐digit decimal number:  • 103 = 1000 possible values
• Range: [0, 999]

• N‐bit binary number • N‐bit binary number
– How many values? 2N
– How many values?  – Range: [0, 2N ‐ 1]
– Range: – Example: 3‐digit binary number:
– Example: 3‐digit binary number: • 23 = 8 possible values
• Range: [0, 7] = [0002 to 1112]

Chapter 1 <21>  Chapter 1 <22> 

Hexadecimal Numbers Hexadecimal Numbers
Hex Digit Decimal Equivalent Binary Equivalent Hex Digit Decimal Equivalent Binary Equivalent
0 0 0 0 0000
1 1 1 1 0001
2 2 2 2 0010
3 3 3 3 0011
4 4 4 4 0100
5 5 5 5 0101
6 6 6 6 0110
7 7 7 7 0111
8 8 8 8 1000
9 9 9 9 1001
A 10 A 10 1010
B 11 B 11 1011
C 12 C 12 1100
D 13 D 13 1101
E 14 E 14 1110
F 15 F 15 1111

Chapter 1 <23>  Chapter 1 <24> 

6
 Hexadecimal Numbers Hexadecimal to Binary Conversion
• Base 16 • Hexadecimal to binary conversion:
– Convert 4AF16 (also written 0x4AF) to binary
• Shorthand for binary

• Hexadecimal to decimal conversion:

– Convert 0x4AF to decimal

Chapter 1 <25>  Chapter 1 <26> 

Hexadecimal to Binary Conversion Bits, Bytes, Nibbles…
• Hexadecimal to binary conversion: • Bits 10010110
– Convert 4AF16 (also written 0x4AF) to binary most least
– 0100 1010 11112 significant significant
bit bit

byte
• Hexadecimal to decimal conversion: • Bytes & Nibbles
– Convert 4AF16 to decimal
10010110
nibble
– 162×4 + 161×10 + 160×15 = 119910

• Bytes CEBF9AD7
most least
significant significant
byte byte

Chapter 1 <27>  Chapter 1 <28> 

7
Large Powers of Two Estimating Powers of Two
• 210 = 1 kilo  ≈ 1000  (1024) • What is the value of 224?
• 220 = 1 mega  ≈ 1 million  (1,048,576)

• 230 = 1 giga  ≈ 1 billion (1,073,741,824)

• How many values can a 32‐bit variable 
represent?

Chapter 1 <29>  Chapter 1 <30> 

Estimating Powers of Two Addition
• What is the value of 224? • Decimal 11 carries
‐ 24 × 220 ≈ 16 million 3734
+ 5168
8902
• How many values can a 32‐bit variable 
represent? • Binary 11 carries
‐22 × 230 ≈ 4 billion 1011
+ 0011
1110

Chapter 1 <31>  Chapter 1 <32> 

8
 Binary Addition Examples Binary Addition Examples
• Add the following • Add the following 1
1001 1001
4-bit binary 4-bit binary
+ 0101 + 0101
numbers numbers
1110

111
• Add the following 1011 • Add the following 1011
4-bit binary + 0110 4-bit binary + 0110
numbers numbers 10001
Overflow!
Chapter 1 <33>  Chapter 1 <34> 

Overflow Signed Binary Numbers
• Digital systems operate on a fixed number of • Sign/Magnitude Numbers
bits • Two’s Complement Numbers
• Overflow: when result is too big to fit in the
available number of bits
• See previous example of 11 + 6

Chapter 1 <35>  Chapter 1 <36> 

9
 Sign/Magnitude Numbers Sign/Magnitude Numbers
• 1 sign bit, N-1 magnitude bits • 1 sign bit, N-1 magnitude bits
• Sign bit is the most significant (left-most) bit • Sign bit is the most significant (left-most) bit
– Positive number: sign bit = 0 A : a N 1 , a N 2 , a2 , a1 , a0  – Positive number: sign bit = 0 A : a N 1 , a N 2 , a2 , a1 , a0 
– Negative number: sign bit = 1 n 2 – Negative number: sign bit = 1 n 2
A  ( 1)
a n 1i
a 2
i 0
i A  ( 1)
a n 1i
a 2
i 0
i

• Example, 4-bit sign/mag representations of ± 6: • Example, 4-bit sign/mag representations of ± 6:

+6 = +6 = 0110
-6= - 6 = 1110

• Range of an N-bit sign/magnitude number: • Range of an N-bit sign/magnitude number:

[-(2N-1-1), 2N-1-1]

Chapter 1 <37>  Chapter 1 <38> 

Sign/Magnitude Numbers Two’s Complement Numbers
• Problems: • Don’t have same problems as sign/magnitude
– Addition doesn’t work, for example -6 + 6: numbers:
– Addition works
1110 – Single representation for 0

+ 0110
10100 (wrong!)

– Two representations of 0 (± 0):

1000
0000
Chapter 1 <39>  Chapter 1 <40> 

10
 Two’s Complement Numbers Two’s Complement Numbers
• Msb has value of -2N-1 • Msb has value of -2N-1
n 2 n 2
A  an 1  2 n 1
  a 2 i
i
A  an 1  2 n 1
  a 2 i
i

i 0 i 0

• Most positive 4-bit number: • Most positive 4-bit number: 0111

• Most negative 4-bit number: • Most negative 4-bit number: 1000
• The most significant bit still indicates the sign • The most significant bit still indicates the sign
(1 = negative, 0 = positive) (1 = negative, 0 = positive)
• Range of an N-bit two’s comp number: • Range of an N-bit two’s comp number:
[-(2N-1), 2N-1-1]
Chapter 1 <41>  Chapter 1 <42> 

“Taking the Two’s Complement” “Taking the Two’s Complement”
• Flip the sign of a two’s complement number • Flip the sign of a two’s complement number
• Method: • Method:
1. Invert the bits 1. Invert the bits
2. Add 1 2. Add 1
• Example: Flip the sign of 310 = 00112 • Example: Flip the sign of 310 = 00112
1. 1100
2. + 1
1101 = -310

Chapter 1 <43>  Chapter 1 <44> 

11
 Two’s Complement Examples Two’s Complement Examples
• Take the two’s complement of 610 = 01102 • Take the two’s complement of 610 = 01102
1. 1001
2. + 1
10102 = -610

• What is the decimal value of 10012?
• What is the decimal value of the two’s
complement number 10012?
1. 0110
2. + 1
01112 = 710, so 10012 = -710

Chapter 1 <45>  Chapter 1 <46> 

Two’s Complement Addition Two’s Complement Addition
• Add 6 + (-6) using two’s complement • Add 6 + (-6) using two’s complement
numbers numbers 111
0110 0110
+ 1010 + 1010
10000
• Add -2 + 3 using two’s complement numbers • Add -2 + 3 using two’s complement numbers
111
1110 1110
+ 0011 + 0011
10001
Chapter 1 <47>  Chapter 1 <48> 

12
 Increasing Bit Width Sign‐Extension
• Extend number from N to M bits (M > N) : • Sign bit copied to msb’s
– Sign-extension • Number value is same
– Zero-extension
• Example 1:
– 4-bit representation of 3 = 0011
– 8-bit sign-extended value: 00000011
• Example 2:
– 4-bit representation of -5 = 1011
– 8-bit sign-extended value: 11111011

Copyright © 2012 Elsevier

Chapter 1 <49>  Chapter 1 <50> 

Zero‐Extension Number System Comparison
• Zeros copied to msb’s Number System Range
Unsigned [0, 2N-1]
• Value changes for negative numbers Sign/Magnitude [-(2N-1-1), 2N-1-1]
Two’s Complement [-2N-1, 2N-1-1]
• Example 1:
– 4-bit value = 00112 = 310 For example, 4-bit representation:
– 8-bit zero-extended value: 00000011 = 310
-8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

• Example 2:
Unsigned 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

– 4-bit value = 1011 = -510

1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 Two's Complement
– 8-bit zero-extended value: 00001011 = 1110
0000
1111 1110 1101 1100 1011 1010 1001
1000
0001 0010 0011 0100 0101 0110 0111 Sign/Magnitude

Chapter 1 <51>  Chapter 1 <52> 

13
 Logic Gates Single‐Input Logic Gates

• Perform logic functions:  NOT BUF

– inversion (NOT), AND, OR, NAND, NOR, etc.
A Y A Y
• Single‐input: 
– NOT gate, buffer Y=A Y=A

• Two‐input:  A Y A Y
0 0
– AND, OR, XOR, NAND, NOR, XNOR 1
1
• Multiple‐input

Chapter 1 <53>  Chapter 1 <54> 

Single‐Input Logic Gates Two‐Input Logic Gates

NOT BUF AND OR

A A
A Y A Y Y Y
B B

Y = AB Y=A+B
Y=A Y=A
A B Y A B Y
A Y A Y 0 0 0 0
0 1 0 0 0 1 0 1
1 0 1 1 1 0 1 0
1 1 1 1

Chapter 1 <55>  Chapter 1 <56> 

14
Two‐Input Logic Gates More Two‐Input Logic Gates

AND OR XOR NAND NOR XNOR

A A A A A A
Y Y Y Y Y
B Y B B B B
B
Y=A+B Y = AB Y=A+B Y=A+B
Y = AB Y=A+B
A B Y A B Y A B Y A B Y
A B Y A B Y 0 0 0 0 0 0 0 0
0 0 0 0 1 0 1 0 1 0 1
0 0 0 1 0 1 0 1 0 1 0
0 1 0 0 1 1 1 1 1 1 1 1 1 1
1 0 0 1 0 1
1 1 1 1 1 1

Chapter 1 <57>  Chapter 1 <58> 

More Two‐Input Logic Gates
XOR NAND
A A
Y Y
B B
Multiple‐Input Logic Gates
NOR3 AND4
NOR XNOR A A
B Y
A A B Y C
Y Y C D
B B

Y=A+B Y = AB Y=A+B Y=A+B Y = A+B+C Y = ABCD

A B Y A B Y A B Y A B Y A B C Y A B C Y
0 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0
0 1 1 0 1 1 0 1 0 0 1 0 0 0 1 0 0 1
1 0 1 1 0 1 1 0 0 1 0 0 0 1 0 0 1 0
1 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 1 1
1 0 0 1 0 0
1 0 1 1 0 1
1 1 0 1 1 0
1 1 1
1 1 1

Chapter 1 <59>  Chapter 1 <60> 

15
 Multiple‐Input Logic Gates Logic Levels
NOR3 AND4 • Discrete voltages represent 1 and 0
A
A B
B Y Y
C
C
D • For example: 
Y = A+B+C Y = ABCD – 0 = ground (GND) or 0 volts
A B C Y A B C Y – 1 = VDD or 5 volts
0 0 0 1 0 0 0 0
0 0 1 0 0 0 1 0
• What about 4.99 volts?  Is that a 0 or a 1?
0 1 0 0 0 1 0 0
0 1 1 0 0 1 1 0
• What about 3.2 volts?
1 0 0 0 1 0 0 0
1 0 1 0 1 0 1 0
1 1 0 0 1 1 0 0
1 1 1 0
1 1 1 1
• Multi‐input XOR: Odd parity

Chapter 1 <61>  Chapter 1 <62> 

Logic Levels What is Noise?
• Range of voltages for 1 and 0
• Different ranges for inputs and outputs to 
allow for noise

Chapter 1 <63>  Chapter 1 <64> 

16
 What is Noise? The Static Discipline
• Anything that degrades the signal • With logically valid inputs, every circuit 
– E.g., resistance, power supply noise, coupling  element must produce logically valid 
to neighboring wires, etc. outputs
• Example: a gate (driver) outputs 5 V but, 
because of resistance in a long wire,  • Use limited ranges of voltages to 
receiver gets 4.5 V represent discrete values
Noise
Driver Receiver

5V 4.5 V

Chapter 1 <65>  Chapter 1 <66> 

Logic Levels Noise Margins
Driver Receiver Driver Receiver

Output Characteristics Input Characteristics Output Characteristics Input Characteristics

VDD VDD
Logic High Logic High
Output Range Logic High Output Range Logic High
VO H Input Range VO H Input Range
NMH NMH
Forbidden VIH Forbidden VIH
Zone VIL Zone VIL
VO L NML VO L NML
Logic Low Logic Low
Logic Low Input Range Logic Low Input Range
Output Range Output Range
GND GND

NMH = VOH – VIH

NML = VIL – VOL
Chapter 1 <67>  Chapter 1 <68> 

17
 DC Transfer Characteristics DC Transfer Characteristics
Ideal Buffer: Real Buffer: A Y
V(Y) V(Y)
A Y

VOH VDD VDD

VOH V(Y)
Output Characteristics Input Characteristics
V DD VDD
V OH
VO H
NMH
Forbidden VIH
Zone VIL
Unity Gain
Points
VOL Slope = 1 Unity Gain NML
Points VO L
V OL Slope = 1
VOL 0 V(A) V(A)
0
VDD / 2 VDD VIL VIH VDD 0
V(A)
VIL, VIH V IL V IH V DD GND

NMH = NML = VDD/2 NMH , NML < VDD/2

Chapter 1 <69>  Chapter 1 <70> 

VDD Scaling Logic Family Examples

• In 1970’s and 1980’s, VDD = 5 V
• VDD has dropped Logic Family VDD VIL VIH VOL VOH
– Avoid frying tiny transistors TTL 5 (4.75 - 5.25) 0.8 2.0 0.4 2.4
– Save power
• 3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, 1.0 V, … CMOS 5 (4.5 - 6) 1.35 3.15 0.33 3.84
• Be careful connecting chips with 
different supply voltages LVTTL 3.3 (3 - 3.6) 0.8 2.0 0.4 2.4

LVCMOS 3.3 (3 - 3.6) 0.9 1.8 0.36 2.7

Chips operate because they contain magic 
smoke
Proof: 
– if the magic smoke is let out, the chip 
stops working

Chapter 1 <71>  Chapter 1 <72> 

18
 Transistors Robert Noyce, 1927‐1990
• Logic gates built from transistors • Nicknamed “Mayor of
Silicon Valley”
• 3-ported voltage-controlled switch
• Cofounded Fairchild
– 2 ports connected depending on voltage of 3rd Semiconductor in 1957
– d and s are connected (ON) when g is 1 • Cofounded Intel in 1968
g=0 g=1 • Co-invented the integrated
circuit
d d d

g OFF ON
s s s

Chapter 1 <73>  Chapter 1 <74> 

Silicon MOS Transistors
• Transistors built from silicon, a semiconductor • Metal oxide silicon (MOS) transistors:
• Pure silicon is a poor conductor (no free charges) – Polysilicon (used to be metal) gate
• Doped silicon is a good conductor (free charges) – Oxide (silicon dioxide) insulator
– n-type (free negative charges, electrons) – Doped silicon source gate drain
Polysilicon
– p-type (free positive charges, holes) SiO2
Free electron Free hole

Si Si Si Si Si Si Si Si Si n n
- +

+
p substrate
-
Si Si Si Si As Si Si B Si
gate
Si Si Si Si Si Si Si Si Si source drain

nMOS
Silicon Lattice n-Type p-Type

Chapter 1 <75>  Chapter 1 <76> 

19
 Transistors: nMOS Transistors: pMOS
Gate = 0 Gate = 1 • pMOS transistor is opposite
– ON when Gate = 0
OFF (no connection ON (channel between
– OFF when Gate = 1
between source and source and drain)
drain) source gate drain
source drain source gate drain Polysilicon
gate VDD SiO2
GND

+++++++
------- p p
n n n n
channel n
p p substrate
substrate substrate

GND GND gate

source drain

Chapter 1 <77>  Chapter 1 <78> 

Transistor Function Transistor Function

g=0 g=1
• nMOS: pass good 0’s, so connect source to 
d d
GND
d
nMOS g OFF
ON • pMOS: pass good 1’s, so connect source to 
s s s VDD
pMOS
pull-up
s s s network

pMOS g OFF inputs

ON
d d
output
d
nMOS
pull-down
network

Chapter 1 <79>  Chapter 1 <80> 

20
CMOS Gates: NOT Gate CMOS Gates: NOT Gate
NOT VDD
NOT VDD
A Y A Y
P1 P1
Y=A A Y Y=A A Y
N1 N1
A Y A Y
0 1 0 1
1 0
GND 1 0
GND

A P1 N1 Y A P1 N1 Y
0 0 ON OFF 1
1 1 OFF ON 0

Chapter 1 <81>  Chapter 1 <82> 

CMOS Gates: NAND Gate CMOS Gates: NAND Gate
NAND NAND
A A
Y Y
B P2 P1 B P2 P1
Y Y
Y = AB Y = AB
A N1 A N1
A B Y A B Y
0 0 1 B N2 0 0 1 B N2
0 1 1 0 1 1
1 0 1 1 0 1
1 1 0 1 1 0

A B P1 P2 N1 N2 Y A B P1 P2 N1 N2 Y
0 0 0 0 ON ON OFF OFF 1
0 1 0 1 ON OFF OFF ON 1
1 0 1 0 OFF ON ON OFF 1
1 1 1 1 OFF OFF ON ON 0
Chapter 1 <83>  Chapter 1 <84> 

21
CMOS Gate Structure NOR Gate
How do you build a three-input NOR gate?
pMOS
pull-up
network
inputs
output

nMOS
pull-down
network

Chapter 1 <85>  Chapter 1 <86> 

NOR3 Gate Other CMOS Gates
How do you build a two-input AND gate?
A
B
C
Y

Chapter 1 <87>  Chapter 1 <88> 

22
 AND2 Gate Transmission Gates
• nMOS pass 1’s poorly
EN
• pMOS pass 0’s poorly
A
Y • Transmission gate is a better switch A B
B
– passes both 0 and 1 well
EN
• When EN = 1, the switch is ON:
– EN = 0 and A is connected to B
• When EN = 0, the switch is OFF:
– A is not connected to B

Chapter 1 <89>  Chapter 1 <90> 

Pseudo‐nMOS Gates Pseudo‐nMOS Example

• Replace pull‐up network with weak pMOS Pseudo‐nMOS NOR4
transistor that is always on
• pMOS transistor: pulls output HIGH only
weak
when nMOS network not pulling it LOW 
weak
Y
A B C D
Y
inputs nMOS
pull-down
network

Chapter 1 <91>  Chapter 1 <92> 

23
 Gordon Moore, 1929‐ Moore’s Law
• Cofounded Intel in
1968 with Robert
Noyce.
• Moore’s Law:
number of transistors
on a computer chip
doubles every year
(observed in 1965) • “If the automobile had followed the same development cycle as the 
• Since 1975, transistor computer, a Rolls‐Royce would today cost $100, get one million 
miles to the gallon, and explode once a year . . .” 
counts have doubled
– Robert Cringley
every two years.
Chapter 1 <93>  Chapter 1 <94> 

Power Consumption Dynamic Power Consumption

• Power = Energy consumed per unit time
– Dynamic power consumption
– Static power consumption
Chapter 1 <95>  Chapter 1 <96>
• Power to charge transistor gate 
capacitances
– Energy required to charge a capacitance, C, to 
VDD is CVDD2
– Circuit running at frequency f: transistors 
switch (from 1 to 0 or vice versa) at that 
frequency
– Capacitor is charged f/2 times per second 
(discharging from 1 to 0 is free)
• Dynamic power consumption:
Pdynamic = ½CVDD2f
 

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 Static Power Consumption Power Consumption Example
• Power consumed when no gates are  • Estimate the power consumption of a 
switching wireless handheld computer
• Caused by the quiescent supply current, IDD – VDD = 1.2 V
(also called the leakage current) – C = 20 nF
• Static power consumption: – f = 1 GHz
– IDD = 20 mA
Pstatic = IDDVDD

Chapter 1 <97>  Chapter 1 <98> 

Power Consumption Example
• Estimate the power consumption of a 
wireless handheld computer
– VDD = 1.2 V
– C = 20 nF
– f = 1 GHz
– IDD = 20 mA

P = ½CVDD2f + IDDVDD
= ½(20 nF)(1.2 V)2(1 GHz)  +   
(20 mA)(1.2 V)
= 14.4 W
Chapter 1 <99> 

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