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Higher Secondary Second year

Physics Practical
Short Procedure -EM (2019-2020)
Prepared by

S.Jayachandran
P.G.Asst(Physics)
GHSS,Manali,Thiruvallur Dt
Chennai-600 068.
(9840430109)
1.METRE BRIDGE (Short Procedure) 4. Both Vernier readings V1 and V2 are noted for two
1.Connections are given as shown in the circuit. reflected image of slit.
2.By connecting, Known resistance R in the left gap 5. Difference between two readings gives 2A from
and the unknown resistance X in the right which Angle of prism (A) is calculated.
gap,balancing length l is found. Angle of Minimum Deviation
3.By using the formula ,unknown 1. Light from collimator is made to fall on only one
resistance X1 is calculated. refracting surface of the prism.
4.By connecting, Known resistance R in the right gap 2. Telescope is rotated to see refracted image of slit
and the unknown resistance X in the left gap, and Prism table is adjusted to be at minimum
balancing length l is found. deviation position.
5.By using the formula ,unknown 3. Vernier readings V1 and V2 are noted for minimum
resistance X2 is calculated. deviation position and also for direct ray.
6.Average of X1 and X2 gives X. 4. Difference between two readings gives Angle of
7.From the values of X, r and L, using the formula minimum deviation (D).
the specific resistance of the 5. From the values of A and D, using the formula
material of the wire is calculated. the refractive index of the material of
a prism is calculated
2.TANGENT GALVANOMETER(Short procedure)
1. Connections are given as shown in the circuit. 4.DIFFRACTION GRATING(Short procedure)
2. After doing all initial adjustments, aluminium 1. Initial adjustments of spectrometer are done.
pointer is made to read 00 - 0° in the compass box. 2. Grating is mounted on prism table and set for
3. By passing suitable current in the TG, deflections Normal incidence position.
θ1 and θ2 of the aluminium pointer are noted in the 3. Telescope is rotated on both sides of direct ray to
tabular column. see diffracted Blue,green and yellow images of slit.
4. By using commutator, current in the TG is reversed 4. Both Vernier readings V1 and V2 are noted for two
and deflections θ3 and θ4 of the aluminium pointer diffracted image of slit on both sides of direct ray.
are noted in the tabular column. 5. Difference between two verniers gives 2Ɵ, from
5. Average of θ1 , θ2 ,θ3 and θ4 gives θ. which, angle of diffraction (Ɵ) is calculated.
6. Reduction Factor of TG is calculated. 6. Knowing N, n and Ɵ,and using the formula
wavelength of blue,green and yellow
7. By measuring the circumference of the coil using a spectral lines are calculated.
thread, radius of the circular coil is found. 5.TRANSISTOR Input Impedance
8. From the values of r, n and k, t using the formula Input characteristic curve: VBE vs IB (VCE constant)
the horizontal component of Earth’s 1. Connections are given as shown in the diagram
magnetic field is calculated. 2. Collector-emitter voltage VCE is kept constant.
3.PRISM(Short procedure) 3. Base-emitter voltage VBE is changed and the
1. Initial adjustments of spectrometer are done. corresponding base current (IB) is noted in the
Angle of Prism tabular column.
2. Light from collimator is made to fall on both 4. Experiment is repeated for another constant VCE
reflecting surfaces of the prism. 5. A graph is plotted by taking VBE along x-axis and
3. Telescope is rotated on both sides of direct ray to IB along y-axis for both the values of VCE.
see reflected image of slit. 6. Reciprocal of the slope of curve gives
the input impedance of the transistor.
12 Std Physics Practical (Short Procedure) EM
S.Jayachandran, PG.Asst, GHSS, Manali,Thiruvallur Dt 9840430109 Page | 1
6.TRANSISTOR (Output Impedance) 9.LOGIC GATES NOR,OR, NOT and EX-OR
Output characteristic curve: VCE vs IC (IB constant)
1. Connections are given as shown in the diagram 6. To verify the truth table of a logic gate NOR, OR,
2. Base current IB is kept constant. NOT and EX-OR , suitable IC 7402, IC 7432,
3. Collector-emitter voltage VCE is changed and the IC 7404 and IC 7486 respectively are taken.
corresponding collector current (IC) is noted in the Connections are given using the circuit diagram.
tabular column. 7. For all the ICs, 5V is applied to the pin 14 while
4. Experiment is repeated for another constant IB the pin 7 is connected to the ground.
5. A graph is plotted by taking VCE along x-axis and 8. Logical inputs of the truth table are applied and the
IC along y-axis for both the values of IB. corresponding output is noted.
6. Reciprocal of the slope of curve 9. Similarly the output is noted for all other
gives the output impedance of the combinations of inputs.
transistor. 10. In this way, the truth table of a logic gate is
7.TRANSISTOR (Current Gain) verified.
Transfer characteristic curve: IB vs IC (VCE constant)
1. Connections are given as shown in the diagram. 10.De Morgan’s theorem
2. Collector-emitter voltage VCE is kept constant.
3. Base current IB is changed and the corresponding I.Verification of De Morgan’s first theorem
collector current (IC) is noted in the tabular column. 1. Connections are made for and of
4. A graph is plotted by taking IB along x-axis and IC the theorem as shown in the circuit diagram using
along y-axis for both the values of VCE . appropriate ICs Separately.
5. Reciprocal of the slope of curve 2. All combinations of Logical inputs of truth table
gives the current gain of the are applied and the corresponding output is noted
transistor and tabulated.
3. From the truth table, is verified.
8.LOGIC GATES NAND,AND, NOT and EX-OR II.Verification of De Morgan’s Second theorem
1. Connections are made for and of the
1. To verify the truth table of a logic gate theorem as shown in the circuit diagram using
NAND,AND, NOT and EX-OR , suitable appropriate ICs Separately.
IC 7400, IC 7408, IC 7404 and IC 7486 2. All combinations of Logical inputs of truth table
respectively are taken. Connections are given using are applied and the corresponding output is noted
the circuit diagram. and tabulated.
2. For all the ICs, 5V is applied to the pin 14 while 3. From the truth table, is verified.
the pin 7 is connected to the ground.
3. Logical inputs of the truth table are applied and the
corresponding output is noted.
4. Similarly the output is noted for all other
combinations of inputs.
5. In this way, the truth table of a logic gate is
verified.

12 Std Physics Practical (Short Procedure) EM


S.Jayachandran, PG.Asst, GHSS, Manali,Thiruvallur Dt 9840430109 Page | 2

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