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MC14060B

14-Bit Binary Counter and


Oscillator
The MC14060B is a 14–stage binary ripple counter with an on–chip
oscillator buffer. The oscillator configuration allows design of either
RC or crystal oscillator circuits. Also included on the chip is a reset
function which places all outputs into the zero state and disables the http://onsemi.com
oscillator. A negative transition on Clock will advance the counter to
the next state. Schmitt trigger action on the input line permits very MARKING
slow input rise and fall times. Applications include time delay circuits, DIAGRAMS
16
counter controls, and frequency dividing circuits.
PDIP–16
• Fully static operation P SUFFIX MC14060BCP
AWLYYWW
• Diode Protection on All Inputs CASE 648

• Supply Voltage Range = 3.0 V to 18 V


1

• Capable of Driving Two Low–power TTL Loads or One Low–power 16


Schottky TTL Load Over the Rated Temperature Range SOIC–16
14060B
• Buffered Outputs Available from Stages 4 Through 10 and
D SUFFIX
CASE 751B
AWLYWW
12 Through 14 1
• Common Reset Line
16
• Pin–for–Pin Replacement for CD4060B
TSSOP–16 14
DT SUFFIX 060B
CASE 948F ALYW

MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.) 1

Symbol Parameter Value Unit 16

VDD DC Supply Voltage Range – 0.5 to +18.0 V SOEIAJ–16


F SUFFIX MC14060B
Vin, Vout Input or Output Voltage Range – 0.5 to VDD + 0.5 V CASE 966 AWLYWW
(DC or Transient)
1
Iin, Iout Input or Output Current ± 10 mA
(DC or Transient) per Pin A = Assembly Location
WL or L = Wafer Lot
PD Power Dissipation, 500 mW YY or Y = Year
per Package (Note 3.) WW or W = Work Week
TA Ambient Temperature Range – 55 to +125 °C
Tstg Storage Temperature Range – 65 to +150 °C ORDERING INFORMATION
TL Lead Temperature 260 °C
(8–Second Soldering) Device Package Shipping

2. Maximum Ratings are those values beyond which damage to the device MC14060BCP PDIP–16 2000/Box
may occur.
3. Temperature Derating: MC14060BD SOIC–16 2400/Box
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
MC14060BDR2 SOIC–16 2500/Tape & Reel
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid MC14060BDT TSSOP–16 96/Rail
applications of any voltage higher than maximum rated voltages to this
MC14060BDTR2 TSSOP–16 2500/Tape & Reel
high–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) vVDD. MC14060BF SOEIAJ–16 See Note 1.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open. MC14060BFEL SOEIAJ–16 See Note 1.

1. For ordering information on the EIAJ version of


the SOIC packages, please contact your local
ON Semiconductor representative.

 Semiconductor Components Industries, LLC, 2000 1 Publication Order Number:


March, 2000 – Rev. 3 MC14060B/D
MC14060B

PIN ASSIGNMENT

Q12 1 16 VDD
Q13 2 15 Q10
Q14 3 14 Q8
Q6 4 13 Q9
Q5 5 12 RESET
Q7 6 11 CLOCK
Q4 7 10 OUT 1
VSS 8 9 OUT 2

TRUTH TABLE
Clock Reset Output State
L No Change
L Advance to next state
X H All Outputs are low
X = Don’t Care

LOGIC DIAGRAM
OUT 2
9 Q4 Q5 Q12 Q13 Q14
OUT 1 7 5 1 2 3
10
CLOCK
11 C Q C Q C Q C Q C Q C Q

C Q C Q C Q C Q C Q C Q
R R R R R R

RESET
12
Q6 = PIN 4 Q8 = PIN 14 Q10 = PIN 15 VDD = PIN 16
Q7 = PIN 6 Q9 = PIN 13 VSS = PIN 8

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2
MC14060B

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎÎÎ
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
VDD – 55_C 25_C 125_C
Characteristic Symbol Vdc Min Max Min Typ (4.) Max Min Max Unit

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎ
Output Voltage

ÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
Vin = VDD or 0 ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
“0” Level

ÎÎÎ
VOL 5.0
10


0.05
0.05


0
0
0.05
0.05


0.05
0.05
V

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
15 — 0.05 — 0 0.05 — 0.05

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Vin = 0 or VDD “1” Level VOH 5.0 4.95 — 4.95 5.0 — 4.95 — V
10 9.95 — 9.95 10 — 9.95 —

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
15 14.95 — 14.95 15 — 14.95 —

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Input Voltage “0” Level VIL V

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
(VO = 4.5 or 0.5 V) 5.0 — 1.5 — 2.25 1.5 — 1.5
(VO = 9.0 or 1.0 V) 10 — 3.0 — 4.50 3.0 — 3.0

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
(VO = 13.5 or 1.5 V) 15 — 4.0 — 6.75 4.0 — 4.0

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
(VO = 0.5 or 4.5 V) “1” Level VIH 5.0 3.5 — 3.5 2.75 — 3.5 — V

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
(VO = 1.0 or 9.0 V) 10 7.0 — 7.0 5.50 — 7.0 —
(VO = 1.5 or 13.5 V) 15 11.0 — 11.0 8.25 — 11.0 —

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Input Voltage

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ
(VO = 4.5 Vdc) ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
“0” Level

ÎÎÎ
ÎÎÎ
(For Input 11
VIL
5.0 — 1.0 — 2.25 1.0 — 1.0
Vdc

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
(VO = 9.0 Vdc) and Output 10) 10 — 2.0 — 4.50 2.0 — 2.0
(VO = 13.5 Vdc) 15 — 2.5 — 6.75 2.5 — 2.5

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎÎ
(VO = 0.5 Vdc)

ÎÎÎ ÎÎÎ
ÎÎÎÎ
(VO = 1.0 Vdc) ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
“1” Level

ÎÎÎ
VIH 5.0
10
4.0
8.0


4.0
8.0
2.75
5.50


4.0
8.0


Vdc

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
(VO = 1.5 Vdc) 15 12.5 — 12.5 8.25 — 12.5 —

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Output Drive Current IOH mA
(VOH = 2.5 V) (Except Source 5.0 – 3.0 — – 2.4 – 4.2 — – 1.7 —

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎÎ
(VOH = 4.6 V)

ÎÎÎ ÎÎÎ
ÎÎÎÎ
(VOH = 9.5 V)
(VOH = 13.5 V)
ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
Pins 9 and 10)

ÎÎÎ
ÎÎÎ
5.0
10
15
– 0.64
– 1.6
– 4.2



– 0.51
– 1.3
– 3.4
– 0.88
– 2.25
– 8.8



– 0.36
– 0.9
– 2.4


ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎÎ
(VOL = 0.4 V)

ÎÎÎ ÎÎÎ
ÎÎÎÎ
(VOL = 0.5 V) ÎÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
Sink IOL 5.0
10
0.64
1.6


0.51
1.3
0.88
2.25


0.36
0.9


mA

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
(VOL = 1.5 V) 15 4.2 — 3.4 8.8 — 2.4 —

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Input Current Iin 15 — ± 0.1 — ± 0.00001 ± 0.1 — ± 1.0 µA

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Input Capacitance (Vin = 0) Cin — — — — 5.0 7.5 — — pF
µA

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Quiescent Current IDD 5.0 — 5.0 — 0.005 5.0 — 150
(Per Package) 10 — 10 — 0.010 10 — 300

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
15 — 20 — 0.015 20 — 600

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
Total Supply Current (5.) (6.) IT 5.0 IT = (0.25 µA/kHz) f + IDD µA
IT = (0.54 µA/kHz) f + IDD

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
(Dynamic plus Quiescent, 10
Per Package) 15 IT = (0.85 µA/kHz) f + IDD

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
(CL = 50 pF on all outputs,
all buffers switching)
4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
5. The formulas given are for the typical characteristics only at 25_C.
6. To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + (CL – 50) Vfk
where: IT is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.002.

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3
MC14060B

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
SWITCHING CHARACTERISTICS (CL = 50 pF, TA = 25_C)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
VDD

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Characteristic Symbol Vdc Min Typ (7.) Max Unit

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Output Rise Time (Counter Outputs) tTLH 5.0 — 40 200 ns
10 — 25 100

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
15 — 20 80

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Output Fall Time (Counter Outputs) tTHL 5.0 — 50 200 ns

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
10 — 30 100
15 — 20 80

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎÎ
Clock to Q4 ÎÎÎÎ
Propagation Delay Time

ÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ
tPLH
tPHL
5.0
10


415
175
740
300
ns

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
15 — 125 200
µs

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Clock to Q14 5.0 — 1.5 2.7
10 — 0.7 1.3

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
15 — 0.4 1.0

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Clock Pulse Width twH 5.0 100 65 — ns

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
10 40 30 —
15 30 20 —

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎÎ ÎÎÎÎ
Clock Pulse Frequency
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
fφ 5.0
10


5
14
3.5
8
MHz

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
15 — 17 12

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
Clock Rise and Fall Time tTLH 5.0 ns
tTHL 10 No Limit

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
15

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
Reset Pulse Width tw 5.0 120 40 — ns

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
10 60 15 —
15 40 10 —

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Reset to On ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ ÎÎÎÎ
Propagation Delay Time

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ


ÎÎÎÎ ÎÎÎÎ
ÎÎÎÎ ÎÎÎ
ÎÎÎÎ
ÎÎÎ
tPHL 5.0
10
15



170
80
60
350
160
100
ns

7. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

VDD
VDD

PULSE CLOCK
500 µF ID 0.01 µF Q4
GENERATOR
NC OUT1 Q5
NC OUT2
Qn CL
R CL
PULSE CLOCK
Q4 VSS CL
GENERATOR
NC OUT1 Q5
NC OUT2 Qn CL
R 20 ns 20 ns
CL
VSS CL 90%
CLOCK
50%
10%
tWH
20 ns 20 ns tPLH tPHL
VDD
90% 90%
50% 50%
CLOCK 10% Q
VSS 10%
50% DUTY CYCLE tTLH tTHL

Figure 1. Power Dissipation Test Circuit Figure 2. Switching Time Test Circuit
and Waveform and Waveforms

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4
MC14060B

CLOCK 11
f [ 2.3 R1tcCtc
if 1 kHz ≤ f ≤ 100 kHz
RESET 10 OUT 1 9 OUT 2 and 2Rtc < RS < 10Rtc
Rtc (f in Hz, R in ohms, C in farads)
The formula may vary for other frequencies. Recommended
maximum value for the resistors in 1 MΩ.
RS Ctc

Figure 3. Oscillator Circuit Using RC Configuration

TYPICAL RC OSCILLATOR CHARACTERISTICS

8.0 100
VDD = 10 V
VDD = 15 V 50

f, OSCILLATOR FREQUENCY (kHz)


4.0 f AS A FUNCTION
FREQUENCY DEVIATION (%)

20
OF RTC
0 10 (C = 1000 pF)
(RS ≈ 2RTC)
1.0 V 5
– 4.0
2 f AS A FUNCTION
OF C
– 8.0 1 (RTC = 56 kΩ)
5.0 V
0.5 (RS = 120 k)
– 12
RTC = 56 kΩ RS = 0, f = 10.15 kHz @ VDD = 10, TA = 25°C 0.2
C = 1000 pF RS = 120 kΩ, f = 7.8 kHz @ VDD = 10 V, TA = 25°C
– 16 0.1
– 55 – 25 0 25 50 75 100 125 1.0 k 10 k 100 k 1.0 M
TA, AMBIENT TEMPERATURE (°C) RTC, RESISTANCE (OHMS)
0.0001 0.001 0.01 0.1
C, CAPACITANCE (µF)
Figure 4. RC Oscillator Stability Figure 5. RC Oscillator Frequency as a
Function of RTC and C

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
CLOCK
11 ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ Characteristic
500 kHz 32 kHz
Circuit Circuit Unit

RESET 10 OUT 1 9 OUT 2 ÎÎÎÎÎÎÎÎÎÎ


ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
Crystal Characteristics
Resonant Frequency 500 32 kHz

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
18M Equivalent Resistance, RS 1.0 6.2 kΩ

RO
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
External Resistor/Capacitor Values
RO
CT
47
82
750
82
kΩ
pF

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
CS CT CS 20 20 pF

Figure 6. Typical Crystal Oscillator Circuit ÎÎÎÎÎÎÎÎÎÎ


ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
Frequency Stability
Frequency Changes as a
Function of VDD (TA = 25_C)

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
VDD Change from 5.0 V to 10 V
VDD Change from 10 V to 15 V
+ 6.0
+ 2.0
+ 2.0
+ 2.0
ppm
ppm

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Frequency Change as a Function
of Temperature (VDD = 10 V)

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
TA Change from – 55_C to + 100 + 120 ppm
+ 25_C Complete Oscillator (8.)

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ
ÎÎÎ ÎÎÎ
ÎÎÎ
ÎÎÎ
TA Change from + 25_C to
+ 125_C Complete Oscillator (8.)
– 160 – 560 ppm

8. Complete oscillator includes crystal, capacitors, and resistors.


Figure 7. Typical Data for Crystal Oscillator Circuit

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5
MC14060B

PACKAGE DIMENSIONS

PDIP–16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08 NOTES:
–A– 1. DIMENSIONING AND TOLERANCING PER ANSI
ISSUE R Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
16 9 3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
B 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
1 8 5. ROUNDED CORNERS OPTIONAL.
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
F C L A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
S C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
SEATING F 0.040 0.70 1.02 1.77
–T– PLANE G 0.100 BSC 2.54 BSC
H 0.050 BSC 1.27 BSC
H K M J 0.008 0.015 0.21 0.38
J K 0.110 0.130 2.80 3.30
G L 0.295 0.305 7.50 7.74
D 16 PL
M 0_ 10 _ 0_ 10 _
0.25 (0.010) M T A M S 0.020 0.040 0.51 1.01

SOIC–16
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
–A– ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
16 9 2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
–B– MOLD PROTRUSION.
P 8 PL
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
1 8
0.25 (0.010) M B S PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
G
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
F A 9.80 10.00 0.386 0.393
K R X 45 _ B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
C F 0.40 1.25 0.016 0.049
–T– SEATING G 1.27 BSC 0.050 BSC
PLANE
M J J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
D 16 PL M 0_ 7_ 0_ 7_
P 5.80 6.20 0.229 0.244
0.25 (0.010) M T B S A S R 0.25 0.50 0.010 0.019

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6
MC14060B

PACKAGE DIMENSIONS

TSSOP–16
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948F–01
ISSUE O
16X K REF

0.10 (0.004) M T U S V S

0.15 (0.006) T U S
K

ÉÉÉ
ÇÇÇ
K1
NOTES:

ÇÇÇ
ÉÉÉ
16 9 1. DIMENSIONING AND TOLERANCING PER ANSI
2X L/2 J1 Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS. MOLD
B SECTION N–N FLASH OR GATE BURRS SHALL NOT EXCEED 0.15
L –U– (0.006) PER SIDE.
J 4. DIMENSION B DOES NOT INCLUDE INTERLEAD
PIN 1
FLASH OR PROTRUSION. INTERLEAD FLASH OR
IDENT. PROTRUSION SHALL NOT EXCEED
1 8 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
N PROTRUSION. ALLOWABLE DAMBAR
0.25 (0.010) PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
0.15 (0.006) T U S
A M MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
–V– REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
N AT DATUM PLANE –W–.
F MILLIMETERS INCHES
DIM MIN MAX MIN MAX
DETAIL E A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C ––– 1.20 ––– 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
C –W– G 0.65 BSC 0.026 BSC
H 0.18 0.28 0.007 0.011
J 0.09 0.20 0.004 0.008
0.10 (0.004) J1 0.09 0.16 0.004 0.006
–T– SEATING H DETAIL E K 0.19 0.30 0.007 0.012
PLANE D G K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0_ 8_ 0_ 8_

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7
MC14060B

PACKAGE DIMENSIONS

SOEIAJ–16
F SUFFIX
PLASTIC EIAJ SOIC PACKAGE
CASE 966–01
ISSUE O NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE
16 9 LE MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
Q1 OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
E HE M_ 4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
1 8 L DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DETAIL P DIMENSION AT MAXIMUM MATERIAL CONDITION.
Z DAMBAR CANNOT BE LOCATED ON THE LOWER
D RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
VIEW P
e A MILLIMETERS INCHES
c DIM MIN MAX MIN MAX
A ––– 2.05 ––– 0.081
A1 0.05 0.20 0.002 0.008
b 0.35 0.50 0.014 0.020
c 0.18 0.27 0.007 0.011
A1 D 9.90 10.50 0.390 0.413
b E 5.10 5.45 0.201 0.215
e 1.27 BSC 0.050 BSC
0.13 (0.005) M 0.10 (0.004) HE 7.40 8.20 0.291 0.323
L 0.50 0.85 0.020 0.033
LE 1.10 1.50 0.043 0.059
M 0_ 10 _ 0_ 10 _
Q1 0.70 0.90 0.028 0.035
Z ––– 0.78 ––– 0.031

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