6108 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO.
11, NOVEMBER 2014
Modeling, Impedance Design, and Efficiency
Analysis of Quasi-Z Source Module in Cascaded
Multilevel Photovoltaic Power System
Dongsen Sun, Baoming Ge, Member, IEEE, Xingyu Yan, Daqiang Bi, Hao Zhang,
Yushan Liu, Student Member, IEEE, Haitham Abu-Rub, Senior Member, IEEE,
Lazhar Ben-Brahim, Senior Member, IEEE, and Fang Zheng Peng, Fellow, IEEE
Abstract—The quasi-Z source (qZS) cascaded multilevel in-
verter (CMI) (qZS-CMI) presents attractive advantages in appli-
cation to photovoltaic (PV) power system. Each PV panel connects
to an H-bridge qZS inverter (qZSI) to form a power generation
module. The distributed maximum power point tracking and all
modules’ dc-link peak voltage balance can be achieved. However,
it is the same with the conventional CMI that the second-harmonic
(2ω) voltage and current ripples exist in each qZSI module. It
is crucial for a qZS-CMI to design the reasonable qZS network
parameters to limit the ripples within a desired range. This paper
proposes an analytic model to accurately calculate the 2ω voltage
and current ripples of each qZSI module. A qZS impedance design
method based on the built model is proposed to limit the 2ω
ripples of dc-link voltage and inductor current. Simulated and
experimental results through using the designed 1.5-kW prototype
validate the proposed analytic model and the design method. Fur-
thermore, this paper analyzes all of the operating states for a qZSI
module and calculates the power loss. The measured efficiency
from the prototype verifies the theoretical calculation, and the
qZS-CMI-based grid-tie PV power system is tested in practical.
Manuscript received June 28, 2013; revised October 7, 2013; accepted
November 25, 2013. Date of publication February 10, 2014; date of current
version June 6, 2014. This paper was supported by the Qatar National Research
Fund (a member of the Qatar Foundation) under The National Priorities
Research Program-Exceptional Proposals (NPRP-EP) Grant X-033-2-007.
D. Sun was with the School of Electrical Engineering, Beijing Jiaotong Uni-
versity, Beijing 100044, China. She is now with the Department of Electrical
and Computer Engineering, University of Texas at San Antonio, San Antonio,
TX 78249 USA (e-mail: 09117343@bjtu.edu.cn).
B. Ge is with the School of Electrical Engineering, Beijing Jiaotong Univer-
sity, Beijing 100044, China; and also with the Department of Electrical and
Computer Engineering, Michigan State University, East Lansing, MI 48824
USA (e-mail: gebaoming@tsinghua.org.cn).
X. Yan was with the School of Electrical Engineering, Beijing Jiaotong
University, Beijing 100044, China. He is now with the Laboratoire
d’Electrotechnique et d’Electronique de Puissance, Ecole Centrale de Lille,
59650 Lille, France.
D. Bi is with the State Key Laboratory of Control and Simulation of Power
Systems and Generation Equipments, Tsinghua University, Beijing 100084,
China.
H. Zhang is with the School of Electrical Engineering, Beijing Jiaotong
University, Beijing 100044, China.
Y. Liu is with the School of Electrical Engineering, Beijing Jiaotong Uni-
versity, Beijing 100044, China; and also with the Department of Electrical and
Computer Engineering, Texas A&M University at Qatar, Doha 23874, Qatar.
H. Abu-Rub is with the Department of Electrical and Computer Engineering,
Texas A&M University at Qatar, Doha 23874, Qatar.
L. Ben-Brahim is with the Department of Electrical Engineering, College of
Engineering, Qatar University, Doha, Qatar.
F. Z. Peng is with the Department of Electrical and Computer Engineering,
Michigan State University, East Lansing, MI 48824 USA.
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2014.2304913
0278-0046 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
Index Terms—Circuit modeling, multilevel inverter, photo-
voltaic (PV) power generation, quasi-Z source (qZS) inverter.
I. I NTRODUCTION
W ITH THE photovoltaic (PV) power generation becom-
ing more and more popular, the applications and re-
search studies of multilevel-inverter-based PV power systems
are growing continuously due to the multilevel inverters’ ad-
vantages and large power-scale/high-voltage grid-tie demands.
A cascaded multilevel inverter (CMI) [1]–[6] has unique ad-
vantages when applied to the PV power system, because it can
achieve the distributed maximum power point (MPP) tracking
(MPPT) to increase the system efficiency and achieve high-
voltage/high-power grid tie without a transformer. However, in
the conventional CMI-based PV power system, each module
is a buck inverter, and its dc-link voltage changes along with
the PV panel voltage. So, when the MPPT is employed in each
module, the unbalanced dc-link voltage will happen between all
modules.
Z source (ZS)/quasi-Z source (qZS) CMIs (ZS/qZS-CMIs)
overcome the aforementioned disadvantages of conventional
CMI through combining ZS/qZS network and H-bridge module
together [7]–[11], because of the ZS/qZS inverter’s (ZSI/qZSI)
buck/boost and inversion in a single stage [12]–[19].
The second-harmonic (2ω) voltage and current ripples al-
ways exist in each module of CMI. A huge dc-link capacitor
is required in each H-bridge module of traditional CMI to limit
the voltage ripple. Similarly, the ZS/qZS-CMI also has the 2ω
voltage and current ripples in each ZS/qZSI module. Some
literatures focus on analyzing and eliminating low-frequency
ripples of each capacitor voltage and inductor current [8], [15],
[16]. An ac equivalent model is built to analyze the 2ω ripples
of the qZSI module in [8], but the built model contains five
equations, where the coupled relationship makes the analysis
and design difficult, and there is no experimental verification.
The low-frequency harmonic elimination pulsewidth modula-
tion (PWM) is proposed in [15] through analyzing the rela-
tionship of 2ω voltage and current ripples with ZS capacitance,
inductance, shoot-through duty ratio, and modulation index, but
the obtained equations are too complex for ZS network design.
Two smoothing-power circuits are employed in [16] to reduce
the 2ω ripple of dc-link peak voltage in single-phase ZSI, but
the additional circuits increase the system cost and complexity.
New research progress is desired on building accurate 2ω
SUN et al.: MODELING, IMPEDANCE DESIGN, AND EFFICIENCY ANALYSIS OF qZS MODULE 6109

Fig. 1. Configuration of qZS cascaded multilevel PV power system.

ripple analytic model and the detailed design method of the
capacitance and inductance for ZSI/qZSI module.
For traditional H-bridge module in CMI, there are two op-
erating states, i.e., active state and zero state. However, for
ZS/qZS-CMI, operating states are little bit complex because of
additional shoot-through states when calculating inverter effi-
ciency. In [8], the authors analyze the qZSI module efficiency,
but the qZS network diode’s loss calculation did not include the
reverse recovery loss; moreover, the conduction loss omitted
the resistance loss, which will definitely affect the calculated
efficiency. Up to now, there is no literature that analyzes the
equivalent circuits of ZSI/qZSI module to clarify all operating
states, and there is no literature that presents the ZS/qZS-CMI
device conduction current with the exact time interval, which
are related to accurately estimate the loss.
This paper proposes an accurate 2ω ripple model, and the
qZS impedance design and the detailed efficiency analysis for
the qZS-CMI are addressed. The prototype is built to verify
the proposed model and efficiency analysis. The qZS-CMI-
based PV power system is tested in practical, and the distributed
MPPT control, the balanced dc-link peak voltage, and the PV
power grid tie are achieved.
II. M ODELING AND A NALYSIS OF qZSI M ODULE
The seven-level single-phase example configuration of the
qZS cascaded multilevel PV power system is shown in Fig. 1.
The system consists of three PV panels, three qZSI modules,
the filter, and the grid.
non-shoot-through state, the power is transmitted from the dc
side to the ac side, while, at the shoot-through state, there is
no power transmission because the dc-link voltage is zero [17].
Each qZSI module has the power balance as
vPN × iPN × (1 − D) + 0 × D = va × ia (1)
where vPN represents the dc-link voltage envelope which con-
sists of a dc value plus a 2ω residual ripple, iPN represents the
current entering the H-bridge averaged on the switching period,
D is the shoot-through duty ratio, and va and ia are the output
voltage and current of the H-bridge module, respectively.
Without loss of generality, we assume that the module out-
puts fundamental voltage and current with va = Va · sin ωt and
ia = Ia · sin(ωt − φ), where ω is the angular frequency, φ is
the impedance angle, and Va and Ia are the amplitudes of the
ac output voltage and current, respectively.
The output voltage of qZSI module can be expressed as
va = m × vPN (2)
where m = M · sin ωt and M is the modulation index.
From (1) and (2), iPN is deduced as
M Ia
iPN = (cos φ − cos(2ωt − φ)) = IPN + ĩPN (3)
2(1−D)
which consists of the dc component
M Ia
IPN = cos φ
2(1 − D)

A. Operating Principle of qZSI Module and the 2ω component

There are two operating states for each qZSI module [12], M Ia
ĩPN = − cos(2ωt − φ).
[14], i.e., non-shoot-through and shoot-through states. At the 2(1 − D)
6110 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 11, NOVEMBER 2014

Fig. 2. Phasor diagram of 2ω voltage and current components. (a) Capacitor voltage and inductor current. (b) Capacitor voltage and dc-link current.

Both IPN and ĩPN affect the module’s state variables iL1 , iL2 , From (7), ĩL1 and ĩL2 can replace each other; ṽC1 and ṽC2
vC1 , and vC2 . As a result, they also consist of dc and 2ω can also replace each other. Therefore, ĩL1 = ĩL2 , and ṽC1 =
components. In particular, there are ṽC2 ; the four-order model in (7) is simplified as
iL1 = IL1 + ĩL1 iL2 = IL2 + ĩL2 
T
vC1 = VC1 + ṽC1 vC2 = VC2 + ṽC2 . L dĩL1
dt = (2D − 1)ṽC1
dṽC1 T
(8)
C dt = (1 − 2D)ĩL1 − (1 − D)ĩPN .
B. Equivalent Model of DC Component
The dc component has the steady-state model as [14] From the first equation in (8), Fig. 2(a) can be obtained in
⎧ 2ω frame, where D < 0.5. From the second equation in (8),
1−D
⎪
⎪ VC1 = 1−2D Vdc there is
⎪
⎨ D
VC2 = 1−2D Vdc  
M Ia (4) 1 dṽC1 T
⎪
⎪ IL1 = 2(1−2D) cos φ ĩPN = (1 − 2D)ĩL1 − C . (9)
⎪
⎩ M Ia 1−D dt
IL2 = 2(1−2D) cos φ
where Vdc is the input voltage of the qZSI module. From (9), Fig. 2(b) can be obtained, where ĩL1 has the same
phase of ĩPN , and we can define
C. Equivalent Model of 2ω Component
At steady state, we can assume that the PV panel voltage is ĩL1 = îL1 cos(2ωt − φ) ĩL2 = îL2 cos(2ωt − φ)
constant. For the non-shoot-through state, the dynamic equa- ṽC1 = v̂C1 sin(2ωt − φ) ṽC2 = v̂C2 sin(2ωt − φ).
tions are
⎧
⎪ L1 dĩL1 = −ṽC1 Using these equations and (7), we can get
⎪
⎪
⎨ dĩdtL2 
L2 dt = −ṽC2 (5) ĩL1 = ĩL2 = 4LCω(1−2D)
2 −(1−2D)2 · 2 · cos(2ωt − φ)
M Ia
⎪
⎪ C1 dṽdtC1 = ĩL1 − ĩPN (10)
⎪
⎩ dṽC2 −(1−2D)2 · · sin(2ωt − φ).
M Ia
ṽC1 = ṽC2 = 4LCω22ωL
C2 dt = ĩL2 − ĩPN . 2

For the shoot-through state, there are

⎧ D. Complete Model of qZSI Module
⎪
⎪ L dĩL1 = ṽC2
⎪ 1 dt
⎨ Adding dc components in (4) and 2ω components in (10)
L2 dĩdtL2 = ṽC1 (6) together, in steady state, the complete model is
⎪
⎪ C1 dtC1 = −ĩL2
dṽ
⎪
⎩ dṽC2 ⎧
C2 dt = −ĩL1 . ⎪
⎪ iL1 = IL1 + ĩL1 = (1−2D) 1
· M2Ia · cos φ
⎪
⎪
⎪
⎪ + 4LCω(1−2D)
2 −(1−2D)2 · 2 · cos(2ωt − φ)
M Ia
For 2ω components, the average inductor currents and aver- ⎪
⎪
⎪
⎪
age capacitor voltages over one switch cycle are not zero. With ⎪
⎪ iL2 = IL2 + ĩL2 = (1−2D) · M2Ia · cos φ
1
⎪
⎪
L1 = L2 = L and C1 = C2 = C, from (5) and (6), we have ⎨
+ 4LCω(1−2D)
2 −(1−2D)2 · 2 · cos(2ωt − φ)
M Ia
⎧ (11)
⎪ T ⎪ vC1 = VC1 + ṽC1 =
⎪ 1−D
· Vdc
⎪
⎪ L dĩL1 = (1 − D) · (−ṽC1 ) + D · (ṽC2 ) ⎪
⎪ 1−2D
⎪ dt
⎨ dĩL2 T ⎪
⎪
−(1−2D)2 · 2 · sin(2ωt − φ)
M Ia
L dt = (1 − D) · (−ṽC2 ) + D · (ṽC1 ) ⎪
⎪ + 4LCω22ωL
(7) ⎪
⎪
⎪ dṽC1 T ⎪
⎪ vC2 = VC2 + ṽC2 = 1−2D D
· Vdc
⎪ C dt
⎪ = (1 − D) · (ĩL1 − ĩPN ) + D · (−ĩL2 ) ⎪
⎪
⎪
⎩ dṽC2 T ⎩ + 4LCω2 −(1−2D)2 · M2Ia · sin(2ωt − φ).
2ωL
C dt = (1 − D) · (ĩL2 − ĩPN ) + D · (−ĩL1 ).
SUN et al.: MODELING, IMPEDANCE DESIGN, AND EFFICIENCY ANALYSIS OF qZS MODULE 6111

Fig. 3. (a) DC-link voltage envelope’s 2ω ripple ratio. (b) Inductor current’s 2ω ripple ratio.

III. I MPEDANCE D ESIGN OF qZS N ETWORK decreases when the inductance and capacitance increase, as
The impedance design of qZS network aims to limit the 2ω shown in Fig. 3(b).
components of the dc-link voltage and inductor currents within From (16), (18), and Fig. 3, the minimum capacitance and
the engineering tolerable ranges. inductance should meet
From (11), the dc-link voltage envelope is deduced as (1 − 2D)(1 + b∗ cos φ)M Ia a∗ Vdc (1 − 2D)
C≥ L≥
Vdc 2ωLM Ia a∗ ωVdc 4ωb∗ M Ia cos φ
vPN = + sin(2ωt − φ) (19)
1 − 2D 4LCω 2 − (1 − 2D)2
(12) to limit the voltage and current ripples within the required ratios
where the dc component is b∗ and a∗ , respectively.

VPN = Vdc /(1 − 2D) (13) IV. V ERIFICATION OF THE P ROPOSED M ODEL AND
I MPEDANCE D ESIGN M ETHOD
and the 2ω voltage component’s amplitude is
From Fig. 3, when C1 = C2 = 4400 μF and L1 = L2 =
2ωLM Ia 500 μH, the dc-link voltage envelope’s 2ω ripple ratio defined
v̂PN = 2v̂C1 = 2v̂C2 = . (14)
4LCω 2 − (1 − 2D)2 in (15) is limited to 6%, and the inductor current’s 2ω ripple
ratio defined in (17) will be within 18%. Two more cases
The dc-link voltage envelope’s peak-to-peak ripple ratio is
defined by are tested to verify the proposed model; the total three cases
are as follows: 1) C1 = C2 = 2200 μF, L1 = L2 = 500 μH;
2v̂PN 2) C1 = C2 = 4400 μF, L1 = L2 = 500 μH; and 3) C1 =
a= (15)
VPN C2 = 4400 μF, L1 = L2 = 1000 μH.
For experimental test, simulation, and theoretical analysis,
then, it will be
the constant dc voltage source Vdc = 25 V is employed, which
4ωLM Ia (1 − 2D) is identical to the theoretical model, the carrier frequency fs is
a= . (16)
[4LCω 2 − (1 − 2D)2 ] Vdc 10 kHz, D = 0.25, M = 0.7, ω = 314 rad/s, and the RL load
consists of 7-Ω resistor and 1.2-mH inductor.
For the 2ω current component in (10), the amplitude is The proposed model in (11) is verified by simulation and
experimental results. Fig. 4 shows the comparison waveforms
(1 − 2D)M Ia for case 2. Three approaches result in the identical current
îL1 =
2 [4LCω 2 − (1 − 2D)2 ] iL1 of inductor L1 in Fig. 4(a). Three voltage waveforms of
capacitor C1 also have the identical 2ω components in Fig. 4(b);
when defining the inductor 2ω current ripple ratio as
for the dc voltage component, the experimental result is a little
îL1 bit lower than the theoretical and simulated results, because
b= (17) of practical voltage drops on the inductors and power devices.
IL1
Fig. 4(c) shows the experimental results of inductor currents iL1
the defined 2ω current ripple ratio is and iL2 , voltages vC1 and vC2 of capacitors C1 and C2 , dc-link
(1 − 2D)2 voltage vPN , and load current. Two capacitors have the identical
b= . (18) 2ω voltage component, and the dc-link voltage envelope’s 2ω
[4LCω 2 − (1 − 2D)2 ] cos φ
component is the sum of them. The qZS impedance parameters
Fig. 3(a) and (b) shows the ripple ratios a and b versus the have the effect on the voltage and current ripples, as shown in
inductance and capacitance of qZS impedance network, re- Table I. The theoretical results are identical to the simulation
spectively, where D = 0.25, M = 0.7, ω = 314 rad/s, cos φ = and experiment results with a little bit of errors. The large
0.9986, Ia = 5 A, and Vdc = 25 V. As shown in Fig. 3(a), the capacitance leads to the 2ω ripple component’s significant
dc-link voltage envelope ripple significantly decreases with the reduction for both capacitor voltage and inductor current; the
capacitance increasing but slowly decreases with the inductance large inductance leads to the significant reduction of the induc-
increasing. However, the inductor current ripple significantly tor current’s 2ω ripples, but the capacitor voltage’s 2ω ripple
6112 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 11, NOVEMBER 2014

TABLE I
C OMPARISON OF 2ω-C OMPONENT A MPLITUDES IN T HEORETICAL ,
S IMULATION , AND E XPERIMENTAL R ESULTS

V. E FFICIENCY A NALYSIS OF qZSI M ODULE

A. Operating State Analysis
When using the improved phase-shifted sinusoidal PWM in
[17], the switch states of qZSI module can be presented in the
positive half fundamental cycle, as shown in Fig. 6, because
there are the same states in the negative half cycle.
When compared to the traditional H-bridge module’s op-
erating states, shoot-through states 1 and 2 are added in the
qZSI module. As a result, there are five operating states in
one switching cycle Ts , i.e., traditional zero states 1 and 2,
shoot-through states 1 and 2, and active state in Fig. 6, and the
equivalent circuit of each operating state is shown in Fig. 7.
As shown in Fig. 7, the devices of qZSI module have different
ON -state currents during one switching cycle, which affects the
device power loss. The conduction currents and time intervals
for all devices are summarized in Table II.

B. Power Loss Calculation

The qZSI module’s loss includes one caused by traditional
states and one caused by shoot-through states. The total loss
consists of H-bridge device loss, qZS diode loss, and inductor
and capacitor losses of qZS network.
1) H-Bridge Device Power Loss:
a) Conduction loss: The conduction loss includes the
switch loss in forward conduction and the conduction loss of
the freewheeling diode [20]. In traditional states, there is
π  
2 1+m
Pcon_S_tr = RDS(on) · i2a · dωt
π 2
0

π 
2
 1+m
+ uD0 · ia + RD · i2a · 1 − dωt (20)
π 2
0
Fig. 4. Results of case 2 in theoretical calculation, simulation, and exper-
iment. (a) Inductor L1 current. (b) Capacitor C1 voltage. (c) Experimental where RDS(on) is the drain–source ON-state resistance of MOS-
results of vC1 , vC2 , vPN , iL1 , iL2 , and iload . FET. uD0 and RD are the ON-state zero-current voltage and the
does not have obvious reduction. The results are identical to ON -state resistance of the antiparallel diode, respectively. They
that in Fig. 3. are available in the datasheet.
On the basis of the aforementioned analysis and experimental The conduction loss in shoot-through states is
results, the impedance parameters of case 2 are used to build the  
2 D
qZS-CMI prototype. Fig. 5(a) shows the qZS module consist- Pcon_S_th = 4 · RDS(on) · (2iL1 ) · . (21)
2
ing of a gate drive, an H-bridge inverter with four MOSFET
switches, capacitors, and a coupled inductor. Fig. 5(b) shows b) Switching loss: The switching loss of MOSFET in-
the qZS-CMI consisting of three qZSI modules installed at the cludes the turn on/off loss, and the reverse recovery loss of the
heat sink. antiparallel diode [20].
SUN et al.: MODELING, IMPEDANCE DESIGN, AND EFFICIENCY ANALYSIS OF qZS MODULE 6113

Fig. 5. Experimental prototype. (a) One module. (b) qZS-CMI.

2) qZS Diode Power Loss: The qZS diode power loss con-
sists of the conduction loss and the reverse recovery loss.
The conduction loss of qZS diode is
π
2

Pcon_D = uD0_z ·2iL1 +RD_z ·(2iL1 )2 ·(1−D−m)dωt
π
0
π
2

+ uD0_z ·(2iL1 −ia )+RD_z ·(2iL1 −ia )2 · mdωt (24)
π
0

where uD0_z and RD_z are the ON-state zero-current volt-

age and the ON-state resistance of the qZS network diode,
respectively.
The reverse recovery loss is
Prr_D = 2 · Qrr_z · VPN · fs (25)
where Qrr_z is the reverse recovery charge of the qZS diode.
3) qZS Inductor Power Loss: The inductor’s loss consists of
copper loss and core loss.
Copper loss is expressed by
PCu = i2L1 RL (26)
Fig. 6. Switching states of qZSI module.
where RL is the inductor’s resistance.
From Fig. 6, the switching loss in traditional states is Core loss is expressed by
π  
2 tri + tfu PFe = pVe (27)
Psw_S_tr = VPN · ia · · fs dωt + 2 · Qrr
π 2
0 where Ve is the core volume and p is the loss coefficient; for
π   high-flux core 58090, there is
2 tru + tfi
· VPN ·fs + VPN · ia · · fs dωt (22) 2.22 1.32
π 2 p = 492 Bpk f
0

where tri is the current rise time, tfu is the voltage fall time, tru where Bpk is the half of ac flux swing and f is the frequency.
is the voltage rise time, tfi is the current fall time, and Qrr is the So, the inductor’s loss is
reverse recovery charge. They are available in the datasheet. PL = 2PCu + PFe . (28)
The switching loss in shoot-through states is
tri + tfu 4) qZS Capacitor Power Loss: Different operating states
Psw_S_th = 2 · VPN · 2iL1 · · fs cause different capacitor currents, as shown in Table II. The
2
tru + tfi rms value of the capacitor current is calculated as (29), shown
+ 2 · VPN · 2iL1 · · fs . (23) at the bottom of the page.
2


 π π

 1 1
IC1 = (−iL1 ) · D +
2 iL1 · (1 − m − D)dωt +
2 (iL1 − ia )2 · mdωt (29)
π π
0 0
6114 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 11, NOVEMBER 2014
Fig. 7. Equivalent circuits in one switching cycle. (a) Traditional zero state
1, S1234 = 0 1 0 1. (b) Traditional zero state 2, S1234 = 1 0 1 0. (c) Shoot-
through state 1, S1234 = 1 1 0 1. (d) Shoot-through state 2, S1234 = 1 0 1 1.
(e) Active state, S1234 = 1 0 0 1.
TABLE II
D EVICE C URRENTS AND T IME I NTERVALS OF qZSI M ODULE IN O NE
S WITCHING C YCLE FOR P OSITIVE H ALF F UNDAMENTAL C YCLE
TABLE III
PARAMETERS OF qZSI M ODULE
The power losses of two capacitors are expressed by
PC1C2 = 2(IC1 )2 RC (30)
where RC is the capacitor’s resistance.
C. Verification of Power Loss Calculation Method
The efficiency of one qZSI module is measured to verify the
power loss calculation method. Table III shows the parameters
of qZSI module.
Two 200-V/2200-μF capacitors are connected in parallel to
achieve 4400-μF capacitance of capacitor C1 , and another two
capacitors are connected in parallel for capacitor C2 , as shown
in Fig. 5(a) and Table III. In the experiment, the input voltage
can change from 46 to 90 V, while the output voltage is kept
at 73.3 V rms (one-third phase voltage of 220 V). For each
input voltage, five cases with different operating power values
from 100 to 500 W are tested. Fig. 8 shows the efficiency
comparison of experimental and theoretical results to verify the
proposed loss calculation method. Fig. 9 shows the measured
qZS H-bridge module efficiency at input voltages of 46, 60, 70,
and 90 V.
VI. qZS-CMI PV P OWER S YSTEM ’ S O PERATION
Tests of qZS-CMI-based PV system are fulfilled in the
experimental setup shown in Fig. 10. The control method
shown in Fig. 11 is employed, including the distributed MPPT
control, the independent dc-link peak voltage control, and the
grid-injected power control [17]. As shown in Fig. 11(a), each
SUN et al.: MODELING, IMPEDANCE DESIGN, AND EFFICIENCY ANALYSIS OF qZS MODULE
Fig. 8. Efficiency comparison of experimental and theoretical results. (a) 60-V input voltage. (b) 90-V input voltage.
Fig. 9. Measured module efficiency with different input voltages.
Fig. 10. Prototyped qZS-CMI-based PV system.
PV panel is controlled to operate at the MPP by regulating Dn .
At the same time, each dc-link peak voltage has the same value.
Fig. 11(b) shows the grid power control for the whole system.
In the experiments, the PV panel type is KD135GH-2P, the
carrier frequency is fs = 10 kHz, each module’s dc-link peak
voltage reference is 65 V, and the qZS-CMI is interfaced to
50-Hz/220-V grid through the L-filter and transformer. Three
separate perturb-and-observe algorithms for three qZSI mod-
ules achieve the distributed MPPTs for harvesting the maxi-
mum PV power.
A. First Test: qZSI Modules With Equal PV Voltages
In this test, each qZSI module is fed by three PV panels
in series. As shown in Fig. 12, at MPPs, three qZSI modules’
PV voltages and currents are vPV1 = 36.6 V, iPV1 = 6.78 A,
vPV2 = 36.5 V, iPV2 = 6.65 A, and vPV3 = 34.6 V, iPV3 =
7.18 A. The dc-link voltage vPN1 is shown in Fig. 12, and
the other two modules’ dc-link voltages vPN2 and vPN3 can
be indirectly observed from the seven-level output voltage vH ,
6115
Fig. 11. Control scheme for qZS-CMI-based PV power system. (a) Control
method of each qZSI module. (b) Power control of the whole system.
which verify that three dc-link peak voltages are controlled at
65 V even though the three modules’ PV voltages have few
differences. The grid-injected current ia is in phase with the
grid voltage va , and its total harmonic distortion (THD) is 4.8%.
B. Second Test: qZSI Modules With Unequal PV Voltages
In this test, modules 1 and 2 are fed by four PV panels in
series, respectively, while module 3 is fed by three PV panels in
series. As shown in Fig. 13, at MPPs, the module-1 PV voltage
and current are vPV1 = 41.1 V and iPV1 = 5.95 A, the module-
2 PV voltage and current are vPV2 = 40.2 V and iPV2 =
6.01 A, and the module-3 PV voltage and current are vPV3 =
33.1 V and iPV3 = 7.27 A, respectively. Although three
modules have different PV voltage values, the three modules’
dc-link peak voltages are still controlled at 65 V, which can be
verified by the seven-level output voltage vH . The grid-injected
6116 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 11, NOVEMBER 2014

Fig. 12. Experimental results of qZS-CMI-based PV power system when all modules have equal PV voltages.

Fig. 13. Experimental results of qZS-CMI-based PV power system when one module has a different PV voltage.

current ia is in phase with the grid voltage va , and it has a THD
of 4.6%.
VII. C ONCLUSION
This paper has proposed an analytic model for the qZSI mod-
ule of qZS-CMI system to address the relationship between the
2ω voltage (and current) ripples and the impedance parameters.
An impedance design method has been proposed to limit the 2ω
ripples in the desired range. Simulations and experiments with
different impedance parameters were carried out to verify the
proposed analytic model and design method.
The efficiency calculation method has been proposed to
analyze this kind of qZS-CMI system. The measured efficiency
and the theoretical efficiency were compared using a designed
prototype, and the identical results verified the efficiency of
the analysis method. Finally, the experimental results of qZS-
CMI-based PV system validated the theoretical analysis and the
system characteristics.
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6117
Dongsen Sun received the Ph.D. degree in electri-
cal engineering from Beijing Jiaotong University,
Beijing, China, in 2014.
Since February of 2014, she has been a Postdoc-
toral Researcher with the Department of Electrical
and Computer Engineering, University of Texas at
San Antonio, San Antonio, TX, USA. Her research
interests include electrical machines and drives, re-
newable energy generation technology, and Z-source
inverters.
Baoming Ge (M’11) received the Ph.D. degree
in electrical engineering from Zhejiang University,
Hangzhou, China, in 2000.
He was a Postdoctoral Researcher with the De-
partment of Electrical Engineering, Tsinghua Uni-
versity, Beijing, China, from 2000 to 2002; a Visiting
Scholar in the Department of Electrical and Com-
puter Engineering, University of Coimbra, Coimbra,
Portugal, from 2004 to 2005; and a Visiting Professor
in the Department of Electrical and Computer En-
gineering, Michigan State University, East Lansing,
MI, USA, from 2007 to 2008, where he is currently working. He has also
been a Professor with the School of Electrical Engineering, Beijing Jiaotong
University, Beijing, since 2002. His research interests include renewable energy
power generation, electrical machines and control, power electronics systems,
and control theories and applications.
Xingyu Yan received the M.S. degree in electri-
cal engineering from Beijing Jiaotong University,
Beijing, China, in 2013. He is currently working
toward the Ph.D. degree in electrical engineering in
the Laboratoire d’Électrotechnique et d’Électronique
de Puissance, École Centrale de Lille, Lille, France.
His research interests include renewable energy
generation technology, photovoltaic inverters, and
smart grids.
Daqiang Bi, photograph and biography not available at the time of publication.
Hao Zhang, photograph and biography not available at the time of publication.
Yushan Liu (S’12), photograph and biography not available at the time of
publication.
Haitham Abu-Rub (M’99–SM’07), photograph and biography not available at
the time of publication.
Lazhar Ben-Brahim (S’88–M’91–SM’02), photograph and biography not
available at the time of publication.
Fang Zheng Peng (M’92–SM’96–F’05), photograph and biography not avail-
able at the time of publication.