USN: 2 S D

SDM College of Engineering & Technology, Dharwad –580 002

Department of Computer Science and Engineering
I –Internal Assessment
Course & Semester: B.E, 7th sem Date: 20-10-2020
Time: 9:30 to 10:30am Max. Marks: 20
Course Code & Title: 15UCSC701 (Advanced Computer Architecture)
Course Teacher: Prof. Vidya V.Uttur(A div) & Dr. Raghavendra G.S(B div)
Note: Q.3 is compulsory. Answer any one from Q.1 & Q.2.

Q.1.
a. Explain shared memory multiprocessor models. [Marks: 05, CO → 1]

b. Explain the characteristics of CISC and RISC Architectures using architectural

distinctions. [Marks: 05, CO → 2]
Q.2.
a. Compare and contrast the different program flow mechanisms. [Marks: 05, CO → 1]

b. Perform a data dependence analysis on each of the following Fortran program fragments.
Show the dependence graphs among the following statements with justification.

(I) S1: A=B+D (II) S1: X=SIN(Y)

S2: C=A*3 S2: Z=X+W
S3: A=A+C S3: Y= -2.5*W
S4: E=A/2 S4: X=COS(Z)
[Marks: 05, CO → 2]

Q.3. a. Consider the execution of an object code with 2*(10^6) instructions on a 400MHz processor.
The program consists of four major types of instructions. The instruction mix and the number of
cycles(CPI) needed for each instruction type are given below based on the result of a program
trace experiment:

Instruction type CPI Instruction mix

Arithmatic and Logic 1 60%
Load/Store with cache hit 2 18%
Branch 4 12%
Memory reference with 8 10%
cache miss

(a) Calculate the Average CPI when the program is executed on a uniprocessor with the
above trace results.
(b) Calculate the corresponding MIPS rate based on the CPI obtained in part(a).
[Marks: 05, CO → 2]

b. With a neat diagram, explain the inclusion and coherence property with respect to the data
transfers between adjacent levels of a memory hierarchy. [Marks: 05, CO → 2]
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