U.S.N.

B.M.S. College of Engineering, Bengaluru-560019

Autonomous Institute Affiliated to VTU
January / February 2020 Semester End Make Up Examinations
Programme: B.E. Semester : III
Branch : Computer Science and Engineering Duration: 3 hrs.
Course Code: 19CS3DCCOA Max Marks: 100
Course: Computer Organization and Architecture Date: 29.01.2020

Instructions: 1. Answer any FIVE full questions, choosing one full question from each unit.
2. Missing data, if any, may suitably assumed.

UNIT - I
Important Note: Completing your answers, compulsorily draw diagonal cross lines on the remaining blank

1 a) Explain following addressing modes with example 05

i. Direct ii. Indirect iii. Index iv. Autoincrement

b) Obtain 5-bit 2’s-complement numbers for the following pairs of decimal 10

numbers and then add them. State whether or not overflow occurs in each case
i. 7 and 13 ii. -14 and 11 iii. -5 and 7
pages. Revealing of identification, appeal to evaluator will be treated as malpractice.

iv. -3 and -8 v. -10 and -13

c) Analyze the following mathematical expression and build set of instructions 05
for 3, 2 and 1-address machines
A = (B – C)*D

UNIT - II
2 a) Consider a task that reads characters typed on a keyboard, stores these data in 08
the memory, and displays the same characters on a display screen. The registers
in the keyboard and display registers are given below. Write a program that
implements these tasks using program-controlled I/O approach and explain by
utilizing appropriate registers.
 b) Consider the case of a single interrupt request from one device. The device 06
keeps interrupt request signal activated until it is informed that the processor
has accepted its request. This activated signal, if not deactivated, may lead to
successive interruptions causing the system to enter infinite loop.
Determine what measures the processor can take to avoid successive
interruptions causing the system to enter infinite loop.

c) Illustrate the need for Bus Arbitration and how the arbiter circuit resolves 06
which device will access the slave.

UNIT – III
3 a) Describe Set-Associative memory mapping technique with a neat diagram. 06

b) Design a Memory of Size 16 x 8 using 4 x 8 memory chips. Show your design 08

with neat diagram.

c) List and explain different types of Read Only Memories (ROM). 06

OR
4 a) A cache is organized in the direct-mapped manner with the following 05
parameters:
 Main memory size of 64K words.
 Blocks of 16 words each.
 Cache consisting of 2K words.
i. How many bits are there in a main memory address?
ii. How many bits are there in each of the TAG, BLOCK and WORD fields?

b) Illustrate with a neat diagram the CMOS memory cell and describe it’s 05
working.

c) Define Virtual memory? Explain translation of virtual address to physical 10

address with block diagram.

UNIT – IV
5 a) Design 4-bit Carry Look Ahead (CLA) Adder using four Bit Stage cell (or B- 10
Cell). Show your design with neat diagram and write down the appropriate
expressions for Sum and Carry.

b) Using Booth’s algorithm multiply the numbers -11 (Multiplicand) and 27 05

(Multiplier).
Note: Consider 6-bit number representation

c) Apply Restoring division algorithm divide +25 by +4. Show the solving steps 05
clearly and neatly.
 OR
6 a) Following figure shows the implementation of a full adder in a 16-bit ripple 06
carry adder realized using 16 identical full adders. The propagation delay of the
XOR, AND and OR gates are 20 ns, 15 ns and 10 ns respectively. Compute the
time after which output carry bit and sum bit becomes available from the last
full adder.

b) With a neat diagram explain the working of a sequential circuit binary 12

multiplier. Show the steps in multiplying 11 with 13 using the add-shift
method.

c) Represent (0.0625) 10 in single precision & double precision Floating Point 02

representation.

UNIT – V
7 a) With a neat diagram show how the hardware is organized as a datapath in a 12
processor and describe the functioning of the different stages.

b List and Explain different classifications of Parallel Computers according to 08

Flynn’s Taxonomy?

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