Led TV: Service Manual

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LED TV
SERVICE MANUAL
CHASSIS : LB4BC
MODEL : 42LY750H 42LY750H-TA

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL68104712 (1406-REV00) Printed in Korea

CONTENTS
CONTENTS . ............................................................................................. 2
SAFETY PRECAUTIONS ......................................................................... 3
SERVICING PRECAUTIONS..................................................................... 4
SPECIFICATION........................................................................................ 6
ADJUSTMENT INSTRUCTION................................................................. 8
TROUBLESHOOTING GUIDE.................................................................. 16
BLOCK DIAGRAM ................................................................................. 24
EXPLODED VIEW .................................................................................. 25
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder
on page 3 of this publication, always follow the safety precau- ES devices.
tions. Remember: Safety First. 4. Use only an anti-static type solder removal device. Some sol-
der removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board 6. Do not remove a replacement ES device from its protective
module or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug (Most replacement ES devices are packaged with leads elec-
or other electrical connection. trically shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective mate-
installation of electrolytic capacitors may result in an explo- rial to the chassis or circuit assembly into which the device will
sion hazard. be installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or cir-
high voltage meter or other voltage measuring device (DVM, cuit, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropri-
(by volume) isopropyl alcohol (90 % - 99 % strength) ate tip size and shape that will maintain tip temperature within
CAUTION: This is a flammable mixture. the range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication 2. Use an appropriate gauge of RMA resin-core solder composed
of contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks Do not use freon-propelled spray-on cleaners.
are correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand
ily by static electricity. Such components commonly are called against the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharg-
ing wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed when-
gently prying up on the lead with the soldering iron tip as the ever this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remain- good copper pattern. Solder the overlapped area and clip off
ing on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.
Fuse and Conventional Resistor

Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range 3. Test method

This specification is applied to the LED TV used LB4BC 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
2. Requirement for Test
Each part is tested as below without special appointment.
1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C

2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.
4. Model General Specification

No. Item Specification Remarks
1 Market Asia, Oceania, Africa, Middle East
(PAL/DVB Market)
1) PAL/SECAM-B/G/D/K
2) PAL-I
2 Broadcasting system
3) NTSC-M
4) DVB-T/T2
3 Channel Storage ATV – 135EA, DTV – 1000EA
► DVB-T
- Guard Interval (Bitrate_Mbit/s) : 1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
Analog : Upper Heterodyne ► DVB-T2
4 Receiving system
Digital : COFDM(DVB-T) - Guard Interval (Bitrate_Mbit/s) : 1/4, 1/8, 1/16, 1/32,
1/128, 19/128, 19/256
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
5 Video(Composite) Input PAL, SECAM, NTSC
6 Component Input(1EA) Y/Cb/Cr, Y/Pb/Pr
7 HDMI Input (2EA) HDMI1/2-DTV
8 SDPIF Out (1EA) SPDIF Out
9 Earphone Out(1EA) Antenna, AV,
For My Media
10 USB (2EA)
(Movie/Photo/Music List) and SVC
11 DVB DVB-T/T2
12 Ethernet (2EA)
13 RS232C(1EA)
14 Ext. Speaker Out (1EA) Ext. Speaker out
15 Ext.Volume Control(1EA) Ext. volume control
5. HDMI input
5.1. DTV mode
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock Remarks
1. 720*480 31.469 / 31.5 59.94 / 60 SDTV 480P
2. 720*576 31.25 50 SDTV 576P
3. 720*576 15.625 50 SDTV 576I
4. 1280*720 37.500 50 HDTV 720P
5. 1280*720 44.96 / 45 59.94 / 60 HDTV 720P
6. 1920*1080 33.72 / 33.75 59.94 / 60 HDTV 1080I
7. 1920*1080 28.125 50.00 HDTV 1080I
8. 1920*1080 26.97 / 27 23.97 / 24 HDTV 1080P
9. 1920*1080 33.716 / 33.75 29.976 / 30.00 HDTV 1080P
10. 1920*1080 56.250 50 HDTV 1080P
11. 1920*1080 67.43 / 67.5 59.94 / 60 HDTV 1080P
5.2. DVI-PC mode

No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock Remarks
1. 640*350 31.468 70.09
2. 720*400 31.469 70.08
3. 640*480 31.469 59.94
4. 800*600 37.879 60.31
5. 1024*768 48.363 60.00
6. 1152*864 54.348 60.053
7. 1280*1024 63.981 60.020
8. 1360*768 47.712 60.015
9. 1920*1080 67.5 60
ADJUSTMENT INSTRUCTION
1. Application Range 4. Automatic Adjustment
This specification sheet is applied to all of the LED LCD TV 4.1. ADC Adjustment
with LB4BC chassis. (MTK12 Model don’t need to Adjust ADC, because there is data
in OTP and adjusted initially)
2. Designation
(1) Because this is not a hot chassis, it is not necessary to 4.1.1. Overview
use an isolation transformer. However, the use of isolation ADC adjustment is needed to find the optimum black level
transformer will help protect test instrument. and gain in Analog-to-Digital device and to compensate RGB
(2) Adjustment must be done in the correct order. deviation.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative 4.1.2. Equipment & Condition
humidity if there is no specific designation. (1) USB to RS-232C Jig
(4) The input voltage of the receiver must keep AC 100-240 (2) MSPG-925 Series Pattern Generator
V~, 50/60 Hz. (MSPG-925FA, pattern -65)
(5) The receiver must be operated for about 5 minutes prior to - Resolution: 1080P Comp1
the adjustment when module is in the circumstance of over 1920*1080P RGB
15. - Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.7±0.1 Vp-p
In case of keeping module is in the circumstance of 0 °C, it - Image
should be placed in the circumstance of above 15 °C for 2
hours. 4.1.3. Adjustment method
4.1.3.1. Check ADC adjustment
In case of keeping module is in the circumstance of below (1) Press In start key on the Adj. R/C, then Adjust ADC(OTP)
-20 °C, it should be placed in the circumstance of above 15 status is displayed on “1.Adjustment check”. Select “2.
°C for 3 hours. ADC Data”, then ADC data is displayed.
(2) P ress Adj. key on the Adj. R/C, and select “9.ADC
[Caution] Calibration”. Set up the ADC Type to OTP, then Select
When still image is displayed for a period of 20 minutes or [Start] button by pressing Enter key, Component and RGB
longer (Especially where W/B scale is strong. Digital pattern are Writed and display Success or NG.
13ch and/or Cross hatch pattern 09ch), there can some (3) Adj. protocol
afterimage in the black level area.
Protocol Command Set ACK
Enter adj. aa 00 00 a 00 OK00x
3. Adjustment items mode
3.1. Main PCB Check Process
(1) MAC Address Download Source xb 00 04 b 00 OK04x (Adjust 480i, 1080p Comp1 )
change xb 00 06 b 00 OK06x (Adjust 1920*1080 RGB)
(2) CI+ Key Download(spec out)
(3) Widevine Key Download Begin adj. ad 00 10
(4) ESN Key Download Return adj. OKx (Case of Success)
(5) EDID downloads for HDMI (Option) result NGx (Case of Fail)
Read adj. ( main ) (main)
* Remark data ad 00 20 000000000000000000000000007c007b006dx
Above adjustment items can be also performed in Final (sub ) (Sub)
Assembly if needed. Both Board-level and Final assembly ad 00 21 000000070000000000000000007c00830077x
adjustment items can be check using In-Start Menu Confirm adj. ad 00 99 NG 03 00x (Fail)
‘1.ADJUST CHECK’. NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)
3.2. Final Assembly adjustment End adj. ad 00 90 a 00 OK90x
(1) White Balance adjustment
(2) Adjust ADC (Option) Ref.) ADC Adj. RS232C Protocol_Ver1.0
(3) RS-232C functionality check
(4) PING Test Adj. order
(5) Factory Option setting per destination ▪aa 00 00 [Enter ADC adj. mode]
(6) Ship-out mode setting (IN-STOP) ▪xb 00 04 [Change input source to Component1(480i&1080p)]
(7) GND and HI-POT test ▪ad 00 10 [Adjust 480i&1080p Comp1]
▪xb 00 06 [Change input source to RGB(1024*768)]
▪ad 00 10 [Adjust 1920*1080 RGB]
3.3. Etc ▪aa 00 90 End adj.
(1) Ship-out mode
(2) Service Option Default Ref) ADC adj. RS232C Protocol_Ver1.0
(3) USB Download (S/W Update, Option, Service only)
(4) ISP Download (Option)
4.2. M
AC address D/L , CI+ key D/L, Widevine ▪ Setting state confirmation
- If automatic setting is finished, you confirm IP and MAC
key D/L, ESN D/L Address at ‘in start’ menu mode.
Connect: USB port
Communication Prot connection
▪ Com 1,2,3,4 and 115200(Baudrate)
Mode check: Online Only
▪ Check the test process: DETECT -> MAC -> CI -> Widevine
-> ESN
▪ Play: Start
▪ Result: Ready, Test, OK or NG
▪ Printer Out (MAC Address Label)
4.3.3. WIDEVINE key Inspection

- Confirm key input data at the "IN START" MENU Mode.
Play : Start
4.3. LAN Inspection

4.3.1. Equipment & Condition 4.4. LAN PORT INSPECTION(PING TEST)
▪ Each other connection to LAN Port of IP Hub and Jig Connect SET → LAN port == PC → LAN Port
SET PC
4.4.1. Equipment setting

(1) Play the LAN Port Test PROGRAM.
(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2
4.3.2. LAN inspection solution 4.4.2. LAN PORT inspection(PING TEST)

(1) Play the LAN Port Test Program.
▪ LAN Port connection with PCB
(2) Connect each other LAN Port Jack.
▪ Setting automatic IP
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.
▪ If you want manual connection, Instart→ menu→ Network

Setup→ Network Setting→Press OK
Press Wired or Wireless connection key, then Network will
be connected.
4.5. Model name & Serial number Download 4.6.1. Check the method of CI+ Key value
4.5.1. Model name & Serial number D/L (1) Check the method on Instart menu
▪ Press "Power on" key of service remote control. (2) Check the method of RS232C Command
(Baud rate : 115200 bps) 1) Into the main ass’y mode(RS232: aa 00 00)
▪ Connect RS-232C Signal to USB Cable to USB. CMD 1 CMD 2 Data 0
▪ Write Serial number by use USB port.
A A 0 0
▪ Must check the serial number at Instart menu.
2) Check the key download for transmitted command

4.5.2. Method & notice
(RS232: ci 00 10)
(1) Serial number D/L is using of scan equipment.
(2) Setting of scan equipment operated by Manufacturing CMD 1 CMD 2 Data 0
Technology Group. C I 1 0
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
3) Result value
by D-book 4.0.
- Normally status for download : OKx
- Abnormally status for download : NGx
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or service man, sometimes
model name or serial number is initialized.(Not always) 4.6.2. Check the method of CI+ key value(RS232)
It is impossible to download by bar code scan, so It need 1) Into the main ass’y mode(RS232: aa 00 00)
Manual download. CMD 1 CMD 2 Data 0
1) Press the "Instart" key of Adjustment remote control. A A 0 0
2) Go to the menu "7.Model Number D/L" like below photo.
3) Input the Factory model name(ex 42LP860H-ZA) or Serial 2) Check the mothed of CI+ key by command
number like photo. (RS232: ci 00 20)
CMD 1 CMD 2 Data 0
C I 2 0
3) Result value
i 01 OK 1d1852d21c1ed5dcx
CI+ Key Value
4.7. WIFI MAC ADDRESS CHECK

(1) Using RS232 Command
H-freq(kHz) V-freq.(Hz)
Transmission [A][I][][Set ID][][20][Cr] [O][K][X] or [NG]
4) Check the model name Instart menu. → Factory name
displayed. (ex 42LY750H-ZA) (2) Check the menu on in-start
5) C heck the Diagnostics.(DTV country only) → Buyer
model displayed. (ex 42LY750H-ZA)
4.6. CI+ Key checking method

Check whether the key was downloaded or not at ‘In Start’
menu. (Refer to below).
=> Check the Download to CI+ Key value in LGset.
Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
5. Manual Adjustment 5.3. White Balance Adjustment
* ADC adjustment is not needed because of OTP(Auto ADC 5.3.1. Overview
adjustment) ▪ W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panel's W/B deviation
5.1. EDID DATA (2) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
5.1.1. 2D EDID prevent saturation of Full Dynamic range and data, one
- RGB
of R/G/B is fixed at 192, and the other two is lowered to
find the desired value.
(3) Adjustment condition : normal temperature
1) Surrounding Temperature : 25 °C ± 5 °C
2) Warm-up time: About 5 Min
3) Surrounding Humidity : 20 % ~ 80 %
5.3.2. Equipment
(1) Color Analyzer: CA-210 (LED Module : CH 14)
(2) Adjustment Computer(During auto adj., RS-232C protocol
- HDMI is needed)
(3) Adjustment Remote control
(4) Video Signal Generator MSPG-925F 720p/204-Gray
(Model: 217, Pattern: 49)
→ Only when internal pattern is not available
▪ Color Analyzer Matrix should be calibrated using CS-100.
5.3.3. Equipment connection MAP
Co lo r Analyzer
Probe RS -232C
Co m p ut er
▪ Reference RS -232C
RS -232C
- HDMI1 ~ HDMI2 Pat t ern Generat o r
- In the data of EDID, bellows may be different by S/W or Signal Source
Input mode. * If TV internal pattern is used, not needed
ⓐ Product ID
HEX EDID Table DDC Function
0001 0100 Analog 5.3.4. Adj. Command (Protocol)
0001 0100 Digital <Command Format>
START 6E A 50 A LEN A 03 A CMD A 00 A VAL A CS STOP
ⓑ Serial No: Controlled on production line.

ⓒ Month, Year: Controlled on production line: - LEN: Number of Data Byte to be sent
ex) Monthly : ‘01’ → ‘01’ - CMD: Command
Year : ‘2014’ → ‘18’ - VAL: FOS Data value
ⓓ Model Name(Hex): LGTV - CS: Checksum of sent data
Chassis MODEL NAME(HEX) - A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
LB3BC 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
ⓔ Checksum(LG TV): Changeable by total EDID data. ▪ RS-232C Command used during auto-adjustment.
ⓔ1 ⓔ2 ⓔ3 RS-232C COMMAND
Explanation
HDMI1 43 15 X [CMD ID DATA]
wb 00 00 Begin White Balance adjustment
HDMI2 43 05 X
wb 00 10 Gain adjustment(internal white pattern)
ⓕ Vendor Specific(HDMI) wb 00 1f Gain adjustment completed
INPUT MODEL NAME(HEX) wb 00 20 Offset adjustment(internal white pattern)
HDMI1 67 03 0C 00 10 00 80 2D wb 00 2f Offset adjustment completed
HDMI2 67 03 0C 00 20 00 80 2D End White Balance adjustment
wb 00 ff
(internal pattern disappears )
Ex) wb 00 00 -> Begin white balance auto-adj. ▪ Adjustment condition and cautionary items
wb 00 10 -> Gain adj. 1) Lighting condition in surrounding area
ja 00 ff -> Adj. data Surrounding lighting should be lower 10 lux. Try to isolate
jb 00 c0 adj. area into dark surrounding.
... 2) Probe location
... : Color Analyzer(CA-210) probe should be within 10 cm and
wb 00 1f → Gain adj. completed perpendicular of the module surface (80° ~ 100°)
*(wb 00 20(Start), wb 00 2f(end)) → Off-set adj.
wb 00 ff → End white balance auto-adj.
5.3.6. Reference (White balance Adj. coordinate and
▪ Adj. Map color temperature)
Command Data Range Default
▪ Standard color coordinate and temperature using CA-210
Adj. item (CH 14)
(lower caseASCII) (Hex.) (Decimal)
CMD1 CMD2 MIN MAX (1) LGD, AUO, CMI
R Gain j g 00 C0 TBD Coordinate
G Gain j h 00 C0 TBD Mode Temp ∆uv
B Gain j i 00 C0 TBD x y
Cool
R Cut TBD Cool 0.271 ± 0.002 0.270 ± 0.002 13,000 K 0.0000
G Cut TBD
Medium 0.286 ± 0.002 0.289 ± 0.002 9,300 K 0.0000
B Cut TBD
R Gain j a 00 C0 TBD Warm 0.313 ± 0.002 0.329 ± 0.002 6,500 K 0.0000
G Gain j b 00 C0 TBD
B Gain j c 00 C0 TBD
Medium
R Cut TBD
G Cut TBD
5.3.7. LED White balance table
B Cut TBD
(1) Normal Line (March ~ December for GUMI, Global)
R Gain j d 00 C0 TBD Aging Cool Medium Warm
G Gain j e 00 C0 TBD MTK time(Min) X y x y x y
Warm B Gain j f 00 C0 TBD
Target 271 270 286 289 313 329
R Cut TBD
1 0-2 281 287 296 306 320 342
G Cut TBD
2 3-5 280 285 295 304 319 340
3 6-9 278 284 293 303 317 339
5.3.5. Adj. method 4 10-19 276 281 291 300 315 336
(1) Auto adj. method 5 20-35 275 277 290 296 314 332
1) Set TV in adj. mode using P-ONLY key(or POWER ON 6 36-49 274 274 289 293 313 329
key). 7 50-79 273 272 288 291 312 327
2) Zero calibrate probe then place it on the center of the 8 80-149 272 271 287 290 311 326
Display.
9 Over 150 271 270 286 289 310 325
3) Connect Cable.(RS-232C to USB)
4) Select mode in adj. Program and begin adj.
5) When adj. is complete (OK Sign), check adj. status pre (2) Normal Line (January ~ February for GUMI, Global)
mode. (Cool, Medium, Warm) Aging Cool Medium Warm
6) Remove probe and RS-232C cable to complete adj. MTK time(Min) X y x y x y
▪ W/B Adj. must begin as start command “wb 00 00” , and Target 271 270 286 289 313 329
finish as end command “wb 00 ff”, and Adj. offset if need. 1 0-2 283 292 296 306 322 347
2 3-5 282 290 295 304 321 345
(2) Manual adjustment. method
1) Set TV in Adj. mode using P-Only key. 3 6-9 280 288 293 303 319 343
2) Zero Calibrate the probe of Color Analyzer, then place it 4 10-19 277 284 291 300 316 339
on the center of LCD module within 10 cm of the surface. 5 20-35 275 279 290 296 314 334
3) Press ADJ key → EZ adjust using adj. R/C → 7. White- 6 36-49 274 275 289 293 313 330
Balance then press the cursor to the right(key ►). 7 50-79 273 272 288 291 312 327
(When right key(►) is pressed 204 Gray internal pattern 8 80-149 272 271 287 290 311 326
will be displayed) 9 Over 150 271 270 286 289 310 325
4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
5) Adjustment is performed in COOL, MEDIUM, WARM 3
modes of color temperature.
- If internal pattern is not available, use RF input. In EZ
Adj. menu 7.White Balance, you can select one of 2 Test-
pattern: ON, OFF. Default is inner(ON). By selecting
OFF, you can adjust using RF signal in 204 Gray pattern.
(3) Aging Chamber Step 4) If the system finds any AP like blow PIC, it is working
Aging Cool Medium Warm well.
MTK time(Min) X y x y x y
Target 271 270 286 289 313 329
1 0-2 280 285 296 306 319 340
2 3-5 276 280 295 304 315 335
3 6-9 272 275 293 303 311 330
4 10-19 269 272 291 300 308 327
5 20-35 267 268 290 296 306 323
6 36-49 266 265 289 293 305 320
7 50-79 265 263 288 291 304 318 5.6. HDMI ARC Function Inspection
8 80-149 264 261 287 290 303 316 5.6.1. Test equipment
9 Over 150 264 260 286 289 303 315 - Optic Receiver Speaker
- MSHG-600 (SW: 1220 ↑)
- HDMI Cable (for 1.4 version)
5.4. Tool Option selection
▪ Method: Press Adj. key on the Adj. R/C, then select Tool 5.6.2. Test method
option. (1) Insert the HDMI Cable to the HDMI ARC port from the
Model 42LY750H-TA master equipment (HDMI IN2)
Module LGD
Tool option 1 54
Tool option 2 9167 (2) Check the sound from the TV Set.
Tool option 3 541

Tool option 4 12908
Tool option 5 4187
Tool option 6 1305
Tool option 7 4267
(3) Check the Sound from the Speaker or using AV & Optic
Commercial 60946 TEST program. (It’s connected to MSHG-600)
Tool Option
4.4. Wi-Fi Test

Step 1) Turn on TV
Step 2) Select Network Connection option in Network Menu.
Instart menu → Menu → Network Setup (Network
Setting>Press OK) * Remark: Inspect in Power Only Mode and check SW version
in a master equipment
5.8. Magic Motion Remote control test

(1) Equipment : RF Remote control for test, IR-KEY-Code
Remote control for test
(2) You must confirm the battery power of RF-Remote control
before test.(recommend that change the battery per every lot)
Step 3) Select Start Connection button in Network Connection. (3) Sequence (test)
1) if you select the "Start(Wheel)" key on the Adjustment
remote control, you can pairing with the TV SET.
2) You can check the cursor on the TV Screen, when select
the "Wheel" key on the Adjustment remote control.
3) You must remove the pairing with the TV Set by select
"Mute" key on the Adjustment remote control.
6. Check Commercial features (2) DC Power Outlet Equipment & Condition
▪ Simple Jig (commercial check JIG)
Mode info. Commercial Feature
IR DC Power Ext SPK
Name inch CLOCK Pro:Idiom
Out Out (5V/ 12V) Out
LY750H-ZA 32/39/42/47/55 O O O X O
6.1. External SPK Out

#1
1) Connect JIG for inspection to RS-232C port on TV as

below.
2) Enter the Configuration Setup mode in pressing Remote
control keys.
6.1.1. Equipment & Condition T he method to enter Configuration Setup mode :
▪ Jig (Speaker out JIG) or Oscilloscope IN-START → MENU → Configuration Setup → OK
2-1) Select 5V DC Power Outlet and change the setting
6.1.2. Check the speaker out : No → Yes. After that, check LED color in JIG.
1) Connect the External Speaker : check the sound (LED #1)
Connect oscilloscope, you can see this waveform. 2-2) After checking 5V DC Power Outlet, change the
setting : Yes → No.
2-3) Please check 12V DC Power Outlet in the same
procedure.
(3) Pro:Idiom Check

1) Connect the RF Cable
2) Turn to the Pro:Idiom channel (No. 333)
3) Check the video & sound
** Only displayed at “POWER ONLY” mode
6.2. IR Out and DC Power Outlet (5V/12V)
(1) Equipment & Condition
▪ Simple Jig (commercial check JIG)
▪ Power only mode
#1
1) Connect each other RS232C port on the Commercial

Check JIG.
2) Press any key on SVC Remote-control.
3) Check the LED status of the Check JIG.
- IR LED(OK condition: blinking) (LED #1)
7. Audio 9. USB S/W Download(Service only)
No. Item Min Typ Max Unit Remark
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick
Audio practical 9 10 12 W
max Output, L/R
- I f your downloaded program version in USB Stick is
1. EQ Off Lower, it didn’t work.
(Distortion=10% 8.10 10.8 Vrms
max Output) AVL Off B ut your downloaded version is Higher, USB data is
Clear Voice Off
Speaker (8 Ω automatically detecting (Download Version High & Power
2. 9 10 12 W
Impedance) only mode, Set is automatically Download)
(3) Show the message “Copying files from memory”
Measurement condition:
(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
(2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms
8. GND and HI-POT Test

8.1. Tool Option selection
▪ Method: Press Adj. key on the Adjustment Remote control,
then select Tool option.
8.1. Ship-out mode check (In-stop)

▪ After final inspection, press In-Stop key of the Adjustment
(4) Updating is starting.
Remote control and check that the unit goes to Stand-by mode.
8.2 GND and Hi-pot auto-check

8.2.1 Method
(1) GND & Hi-pot auto-check preparation
- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)
(2) Perform GND & Hi-pot auto-check
- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
8.2.2. Checkpoint
▪ TEST voltage
- GND: 1.5 KV / min at 100 mA
- SIGNAL: 3 KV / min at 100 mA
▪ TEST time: 1 second
▪ TEST POINT (5) Updating Completed, the TV will restart automatically.
- GND TEST = POWER CORD GND & SIGNAL CABLE (6) If your TV is turned on, check your updated version and
METAL GND Tool option. (explain the Tool option, next stage)
- Hi-pot TEST = POWER CORD GND & LIVE & NEUTRAL * If downloading version is more high than your TV have,
▪ LEAKAGE CURRENT: At 0.5 mArms TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line.
* After downloading, have to adjust Tool Option again.

(1) Push "IN-START" key in service remote control.
(2) Select "Tool Option 1" and push "OK" key.
(3) Punch in the number. (Each model has their number)
TROUBLESHOOTING GUIDE
1. Power-Up Boot Fail Trouble Shooting guide
N N
Check P2401 All Check power connector and
Replace Power Board.
Voltage Level (3.5V, 12V, 24V). RL_ON signal OK?
N
Check Q2407 output Check Q2407 application circuit
Voltage(12V). Or replace Q2407.
N
Check LVDS Cable. Replace Cable.
Check LCD Module

Control board
2. No OSD Trouble Shooting guide

N N
Check P2401 All Check power connector and
Replace Power Board.
Voltage Level (3.5V, 12V, 24V). RL_ON signal OK?
N
Check IC8700 RESET pin. Check switch SW8700.
N
Check X8701 Clock Check X8701 application circuit
10MHz. or Replace X8701.
N
Check IC8700 IIC Check IIC line or replace
Communication status. IC8700.
N
Check IR input state of IC8700
Check IR board.
13pin.
Re-download NEC Micom
3. Analog RF Video Trouble Shooting guide
Check RF cable & signal.
N
Check TU6500 Pin8.
Replace Tuner.
(Video output)
N N
Check tuner 5V power L6501. Check IC2404. Replace IC2404.
N
Check tuner 3.3V power L6502. Replace L6502.
N
Check tuner 1.8V power IC6501
Replace IC6501.
2pin : 1.8V
N
Check MTK LVDS output. Replace IC105.
4. Digital RF Trouble Shooting guide
N N
Check tuner 5V power L6501. Check IC2404. Replace IC2404.
N
Check IIC Signal
Replace TU6500.
TU6500 Pin#3,4.
N
Check DIF Signal
Replace TU6500.
TU6500 Pin#10,11.
N
Check X100 and application
Replace X100.
circuit.
Replace IC105.
5. AV Video Trouble Shooting guide
Check input signal format.
Is it supported?
Check AC cable for damage

For damage or open conductor.
Check JK4600. N
Can you see the normal Replace JK4600.
waveform?
Check the input of MTK(IC105).

Measure waveform at C616 because it’s more easy to check.
Can you see the normal waveform?
This board has big problem because Main chip (MTK) have some troubles.
After checking thoroughly all path once again, You should decide to replace MTK or not.
6. HDMI Video Trouble Shooting guide
Is it supported?

For damage or open conductor
N
Check JK3301/JK3302
Replace JK3301, JK3302.
N
Check HDCP key NVRAM(IC100)
Replace IC100.
Power & I2C signal

Measure waveform at R3314, R3315, R3308, R3309 because it’s more easy to check.
7. Analog RF Audio Trouble Shooting guide
N
Check TU6500 Pin6.
Replace Tuner.
(SIF output)
N
Check Audio AMP output L5402,
Replace L5402, L5403, L5404, L5405.
L5403, L5404, L5405.
N
Check IC5400. Replace IC5400.
Check C352.
(SIF signal to IC105)
Replace IC105.
8. AV / RGB-PC Audio in Trouble Shooting guide
Is it supported?

For damage or open conductor
N
Check JK4600
Replace JK4600.

Measure waveform at C610, C611 because it’s more easy to check.
N
Check Audio AMP output L5402, Replace L5402, L5403, L5404,
L5403, L5404, L5405. L5405.
9. HDMI Audio in Trouble Shooting guide
Is it supported?

For damage or open conductor.
N
Check JK3301/JK3302.
Replace JK3301, JK3302.
N
Check Audio AMP output L5402, Replace L5402, L5403, L5404,
L5403, L5404, L5405. L5405.
X-tal
27MHz
Copyright ©
NIM
Parallel TS
(CAN) LVDS
TU_CVBS 51P
(60Hz/FHD)
SIF

PCM_A[0:7] eMMC NAND Flash
Rear (4G)
148.5MHz TMDS SDIN5D2-4G-974L1
HDMI1
DDR3 2G DDR3 2G
Y, Pb, Pr DDR2 Add.
Component Phone jack Hynix Hynix
DDR2 Data H5TQ2G63DFR-PBC H5TQ2G63DFR-PBC
LG Electronics. Inc. All rights reserved.

R/L
Audio In 800MHz 800MHz
RGB/H/V
RGB PC DDR3 2G DDR3 2G
DDR2 Add.
Hynix Hynix
DDR2 Data H5TQ2G63DFR-PBC H5TQ2G63DFR-PBC
SPDIF out R/L
- 24 -
LGE 800MHz 800MHz
RJP
RJP EEPROM
I2C
M24M01-HRMN6TP
Only US model
RS232C 1MBIT
BLOCK DIAGRAM
MAX3232
RS-232C
2112 HDCP EEPROM
IRout-Path I2C
M24C16-R
TX/RX RS232C 16KBIT
LAN1(AUX)
TX/RX
LAN2
L/R
TI AMP H/P
External SPK Out L/R
DP/DM
External SPK ctrl VOL+,VOL-,TX/RX USB2.0 Wi-Fi
DP/DM
&DBG OUT USB2.0
TMDS
A. AMP I2S HDMI2_MHL
SPK L/R NTP-7500L L/R Side
LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
400
420
900
410
121
521
570
120
540
310
530
LV1
501
820
AW1
Set + Stand
500
A2 A10
200
EXT_SPEAKER_AMP EXT_SPK OUT(Single End)
+24V_AMP
L8600
BLM18PG121SN1D L8604
BLM18PG121SN1D JK8600
PEJ034-01
C8609 3 E_SPRING
C8610
C8606 0.1uF 4.7uF
50V 50V
EXT_OUT_R
0.1uF OPT
R8603 50V R8611
C8618 470K
100 100pF
MAIN_AMP_RESET 50V OPT
IC8600 R_SPRING
TPA3124D2PWPR 4
+3.5V_ST
5 T_SPRING
PVCCL_1 PGNDL_2 EXT_OUT_L
R8602 1 24 +3.3V_NORMAL OPT
C8616 7B B_TERMINAL2 R8614
10K 100uF C8619
R8600 25V 470K
100 SD PGNDL_1 100pF
2 23 T_TERMINAL2 50V OPT
EXT_OUT_L 6B
C L8602 R8612
R8601 R8608 C8612 C8614 15K
PVCCL_2 LOUT 22.0uH
10K B Q8600 4.7K 1uF 0.47uF
3 22
EXT_SPK_MUTE MMBT3904(NXP) 50V 50V
OPT C8607 EXT_SPK_DET
OPT
E MUTE BSL 0.22uF
4 21 50V C8613 C8615 C8672
R8609 C8617
C8600 L8603 1uF 0.47uF 1uF
4.7K 100uF
1uF 22.0uH 50V 50V 25V 10V
10V LIN AVCC_2
EXT_SPK_LOUT_MAIN 5 20 EXT_OUT_R EXT_SPK_DET
RIN AVCC_1 Connected Disconnected

EXT_SPK_ROUT_MAIN 6 19
C8601 R8604
1uF 10K High Low
BYPASS GAIN0 R8606
10V 7 18 OPT
10K
OPT
C8602 AGND_1 GAIN1
1uF 8 17
50V
R8605 R8607
AGND_2 BSR 10K 10K
9 16
C8608
0.22uF
PVCCR_1 ROUT 50V
10 15
VCLAMP PGNDR_2
11 14
C8603 PVCCR_2 PGNDR_1

1uF 12 13
50V
C8604 C8605
4.7uF 0.1uF
50V 50V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES base model : LY750H-ZA / EAX65743101
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS xxLY750H-TA 2014.02.12
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. External SPK. 86
Copyright © 2014 LG Electronics Inc. All rights reserved. LGE Internal Use Only
FROM LIPS & POWER B/D
+3.5V_ST
POWER TP POINT JIG POINT for GND PANEL_POWER TYP 1450mA
+3.3V_NORMAL
+3.5V_ST
MMBT3906(NXP)
+12V
Q2401
R2461 R2420
JP2421
JP2418
JP2419
JP2420
UBW2012-121F
10K 1K PANEL_VCC
OPT R2408 R2425
1 3 POWER_24P OPT INV_CTL
RL_ON R2401 100
L2408
10K P2400 POWER_ON/OFF1
2 POWER_ON/OFF2_1 Q2407
10K SMAW200-H24S5 R2426
R2453 POWER_ON/OFF2_2 PMV48XP
10K 10K
D
POWER_ON/OFF2_3
OPT
VA2400
5.6V
POWER_ON/OFF2_4
PANEL_DISCHARGE_REG
PANEL_DISCHARGE_REG
PWR ON INV ON C2432 C2433 C2435 C2440
1 2 R2442
0.01uF 0.1uF 4.7uF 1uF R2451 R2452 C2443
3.5V PDIM#1 33K G
3 4 PWM_DIM1 +24V 50V 50V 50V 25V 2K 2K 0.1uF
3.5V 3.5V OPT 1/8W 1/8W
5 6 50V
+3.5V_ST L2402 L2403
GND 7 8 PDIM#2
UBW2012-121F PWM_DIM2 UBW2012-121F
24V 9 10 24V R2441
GND GND 5.6K
11 12 C2413
C2406 ZD2403 12V 12V
0.1uF 13 14 0.1uF
5V 12V 24V 50V C
16V OPT 15 16 R2437
GND 17 18 GND 10K B Q2406
GND GND PANEL_CTL MMBT3904(NXP)
19 20
+12V GND 21 22 L/DIMO_VS R2460
19 E
L2401 L/DIM0_MOSI L/DIM0_SCLK 10K
UBW2012-121F 23 24
C2401
25
0.1uF
50V SMAW200-H18S5
P2401
POWER_18P
IC2402-*1
Power_DET(12V) APX803D29
Diodes_NEW
VCC 3 2 RESET
1
GND
+12V +5V_Normal +5V_NORMAL
+12V IC2401-*1 L2407

+3.5V_ST R2417
+3.5V_ST APX803D29 BLM18PG121SN1D
100K
R2421 Diodes_NEW
PD_12V OPT RESET_IC_ROHM VCC RESET
R2410 R2413 10K 3 2
0 IC2402
2.7K OPT 1
1% 5% BD48K28G
GND C2415
R2419 POWER_DET 10uF IC2404
VDD VOUT 100 16V
3 2 TPS54327DDAR [EP]GND
C2411 1 POWER_ON/OFF2_3
PD_12V R2435
0.1uF GND 10K
R2409 EN VIN
16V 1 8
1.2K C24001
THERMAL
1% C2412 0.1uF
0.1uF R1 1% 16V VFB VBST C2429
9
16V 2 7
R2415 0.1uF L2409
16V 3.6uH
56K VREG5 SW
12V-->3.58V C2416
3 6
ST_3.5V-->3.5V 100pF NR8040T3R6N
50V
24V-->3.48V OPT SS GND C2430
+24V +3.5V_ST R2416
100K
not to RESET at 8kV ESD
R2439
4
3A 5
22uF
10V
R2 10K C2417 C2428

PD_3.5V IC2401 1uF 3300pF
PD_24V 1%
R2429 10V 50V
R2412 0 BD48K28G
8.2K
1% 5% R2418
VDD VOUT 100
3 2
1 OPT
PD_24V C2410
R2411 0.1uF GND
1.5K 16V OPT
1% OPT
DDR MAIN 1.5V

+3.3V_NORMAL
+12V
MAX 3.4 A
POWER_ON/OFF2_1
R2430
10K
MTK CORE 1.2V +1.2V_MTK_CORE C2420

L2410
BLM18PG121SN1D [EP]PGND
IC2405
TPS54425PWPR +3.3V_NORMAL
+12V 0.1uF
+3.5V_ST 16V C2423 VIN2 VO
14 1
L2404 0.1uF R2
THERMAL
+1.5V_DDR
L2400 IC2400 2uH
EP[GND]
AOZ1038PI [EP]LX R2428

BLM18PG121SN1D
PWRGD
15
16V VIN1 VFB 10K
VIN_3
13 2
BOOT
*NOTE 17 L2405 C2431

PGND NC_2
10uF 1%
EN
1 8
OPT BLM18PG121SN1D
R2404
C2407 C2408 C2409 C2414 C2441 16V

THERMAL
Placed on SMD-TOP R2400 0

1%
VBST VREG5
5.6K
VIN NC_1 10uF 10uF 10uF 10uF 3300pF

9
2 7
10V 10V 10V 10V 50V L2406 12 3
16
15
14
13
C2405 OPT 3.6uH C2438

C2400
10uF
C2402
10uF
C2403
0.1uF
AGND
3 6
EN
R2402
4700pF
50V R1 ZD2401
2.5V
VIN_1 1
THERMAL
12 PH_3
SW2
4A SS
1uF
10V
FB COMP 3.3K VIN_2 PH_2 NR8040T3R6N C2434 11 4
16V 16V 16V 4 5 2 17 11
OPT C2448 C2418 C2419 C2427 0.1uF R1
10uF 10uF 0.1uF C2424 C2425 C2446 C2447 0.1uF 50V C2445
GND_1 3 IC2403 10 PH_1 SW1 GND R2427
10V 10V 16V 10uF 10uF 10uF 10uF 16V 22pF
TPS54319TRE 10 5 33K
R2406
C2422 10V 10V 10V 10V R2407 C2439 1% 50V

GND_2 SS/TR
4
3A 9
10K
1%
100K 3300pF
47K 1%
R2403 0.01uF C2426 PGND2 PG 50V

R2434
POWER_ON/OFF1 R2 9 6
5
10K 50V
C2404 100pF
0.1uF 50V
RT/CLK
AGND
COMP
VSENSE
16V R2432 PGND1 EN R2414 10K

1/16W 330K 5% ZD2402 8 7
R1 2.5V C2437 POWER_ON/OFF2_2
R2431 C2421 0.1uF +3.3V_NORMAL
15K 4700pF
L2411
1/16W 5% 50V 2uH
C2442
Vout=0.8*(1+R1/R2) R2433
56K R2 22uF
C2444
22uF ZD2400
1/16W 10V 10V
3A $ 0.145 1%
Vout=0.827*(1+R1/R2)=1.521V Vout=(0.763+0.0017*Vout.set)*(1+R1/R2)
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER 24
+24V Instant_Power_On
AUDIO AMP(NTP-7500L)
L5406 +24V_AMP
MLB-201209-0120P-N2
Q5401
AO3407B
C5440 C5441
S
0.01uF 0.1uF
50V 50V R5423 C5442 C5443
33K 4.7uF 1uF
G 25V
50V C5444
OPT
0.1uF
50V
R5424
47K
+3.3V_NORMAL
R5429 C
10K R5425
10K B Q5402
AMP_EN MMBT3904(NXP)
33
From SOC MAIN_AMP_RESET
R5421 R5422 C5415
10K 1000pF
50V
+3.3V_NORMAL
50V
L5401
BLM18PG121SN1D +24V_AMP
22000pF
C5416
OPT
R5406
AUD_MASTER_CLK 3.3
OPT
C5424
OUT1A_2
OUT1A_1
PVDD1_3
PVDD1_2
PVDD1_1
C5418 C5420 C5422
PGND1A
0.01uF
VDD_IO
GND_IO
0.1uF 0.1uF 10uF

/RESET
C5413 C5414 50V
BST1A 50V 50V 35V
CLK_I
10uF
0.1uF
10V
[EP]
16V SPK_L+
D5400
AD
1N4148W R5407 R5414 L5404

100V 12 12 R5415
10.0uH C5436
C5409 C5411 OPT 0.1uF 5.1K
C5405 C5407 10uF 0.1uF C5429 NRS6045T100MMGK 50V
10uF 4.7uF 10V 390pF
10V 16V 50V C5434
10V L5405 0.47uF
48
47
46
45
44
43
42
41
40
39
38
37
C5403
1000pF
50V
10.0uH 50V
SPEAKER_L
C5402 C5430 C5437
100pF R5404 AGND_PLL 1 36 OUT1B_2 D5401
390pF
50V
NRS6045T100MMGK 0.1uF
50V
R5416
50V 3.3K 1N4148W R5408 R5412 5.1K
AVDD_PLL 2 35 OUT1B_1 100V
OPT 12 12
THERMAL SPK_L-
DVDD_PLL 3 34 PGND1B
49 C5425
22000pF
LF 4 33 BST1B 50V
DGND_PLL 5
IC5400 32 VDR1
OPT
C5410
10uF
GND_1 6 NTP-7500L 31 VCC_5
C5412
10V 0.1uF
16V DGND 7 30 AGND
DVDD 8 29 VDR2
SDATA
0x54 BST2A
C5427
1uF
C5428
1uF
C5433
1uF
AUD_LRCH 9 28 25V 25V 25V
WCK 10 27 PGND2A C5426

AUD_LRCK 22000pF
50V
BCK 11 26 OUT2A_2
AUD_SCK
R5402 100 SDA 12 25 OUT2A_1

I2C_SDA1
13
14
15
16
17
18
19
20
21
22
23
24
R5403 100
I2C_SCL1
C5406 C5408
33pF 33pF
50V 50V SPK_R+
SCL
/FAULT
BST2B
OUT2B_1
OUT2B_2
PVDD2_1
PVDD2_2
PVDD2_3
PGND2B
MONITOR0
MONITOR1
MONITOR2
+24V_AMP D5402 R5409 R5413

1N4148W 12 12 L5402
100V 10.0uH
C5438 R5417
+3.5V_ST OPT
C5431 NRS6045T100MMGK 0.1uF 5.1K
390pF C5435 50V
50V 0.47uF
C5419 C5421 C5423
L5403
10.0uH
50V
SPEAKER_R
R5401 0.1uF 0.1uF 10uF C5432
10K 390pF NRS6045T100MMGK
50V 50V 35V D5403 50V C5439 R5418
R5405 C5417 1N4148W R5410 R5411 0.1uF 5.1K
22000pF 100V 12 12 50V
C 100 C5404 OPT
50V
R5400 B 1000pF SPK_R-
MAIN_AMP_MUTE Q5400 50V
10K MMBT3904(NXP)
E
WAFER-ANGLE
SPK_L+
4
SPK_L-
3
SPK_R+
2
SPK_R-
1
P5400
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Audio_AMP 54
Ethernet HUB(RTL8305N-CG)
STRAPPING PIN CONFIG

Place Close To RTL8305N
Xtal_matching
Xtal_matching
Xtal_Old
Xtal_Old
C8440-*1
C8441-*1
18pF
18pF
C8440 C8441
50V
50V
Ethernet Power SOC 27pF
50V
X8400
27pF
50V
ETNHUB_EPHY_RXIP0
ETNHUB_EPHY_RXIN0
ETNHUB_EPHY_TXOP0
ETNHUB_EPHY_TXON0
25MHz
R8415 1M
OPT
ETNHUB_AVDD18
LAN_ACT0
ETNHUB_AVDD33 LAN_ACT2
LAN_ACT3
ETNHUB_ENDEFER
ETHERNET_RESET
+3.5V_ST
GYSPD
ETNHUB_DVDD33 ETNHUB_AVDD33 ETNHUB_DVDD18
FET_ROHM
1K OPT
1K OPT
1K OPT
1K OPT
1K OPT
1K OPT
Q8400 L8401 R8424 R8423 Place Close To RTL8305N
L8403
AVDD18_6
AVDD18_5
RSR025P03
[EP]GND
TXON[0]
TXOP[0]
BLM18PG121SN1D
RXIN[0]
RXIP[0]
BLM18PG121SN1D
AVDD33
D
1.69K 270
S
VCTRL
IBREF
1% 1%
OSCI
C8419 C8425
X2
X1
C8401 OPT 0.1uF 1.96K
R8444
R8446
R8448
R8450
R8451
R8454
22uF ETNHUB_DVDD33
G
0.1uF R8405 16V 10V

16V 10K
48
47
46
45
44
43
42
41
40
39
38
37
R8404 FET_2.5V_AOS
10K FET_2.5V_NXP
AVDD18_1 1 36 LED_ACT[0]/BCINDROP
Q8400-*1 Q8400-*2 LAN_ACT0
+3.5V_ST PMV48XP TXON[1] 2 35 LED_ACT[1]/GYSPD100
AO3435 ETNHUB_EPHY_RXIN1 THERMAL GYSPD
D
TXOP[1] LED_ACT[2]/P4ANEG
S
S
ETNHUB_EPHY_RXIP1 3 49 34 LAN_ACT2
LAN1 RXIP[1] 4 33 P4FLCTRL/CPU_INTT R8440 100
R8487 ETNHUB_EPHY_TXOP1 IC8401 ETNHUB_INT
C RXIN[1] 5 32 RESET Realtek WOL
10K ETNHUB_EPHY_TXON1 ETHERNET_RESET
G
AVDD18_2 RTL8305N_REALTEK
6 31 DVDD18_4
Q8401 B
2SC3052 ETNHUB_PWR_ON/OFF RXIN[2] 7 30 LED_ACT[3]/EN48PASS1
R8486 ETNHUB_EPHY_TXON2 LAN_ACT3 LED_ACT[2]/P4ANEG : Auto-negotiation Enable/Disable
10K RXIP[2] 8 29 LED_ACT[4]
E ETNHUB_EPHY_TXOP2
TO PHY Chip TXOP[2] 9 28 DVDD33 All Strapping Pins are internal pull-up
ETNHUB_EPHY_RXIP2
TXON[2] 10 27 SDA_MDIO R8434 33
ETNHUB_EPHY_RXIN2 ETHERNET_MDIO
TXON[3] 11 26 SCL_MDC R8435 33
ETNHUB_EPHY_RXIN3 ETHERNET_MDC
LAN2 TXOP[3] 12 25 ENEEPROM
ETNHUB_EPHY_RXIP3
R8436 1K
13
14
15
16
17
18
19
20
21
22
23
24
RXIP[3]
RXIP[4]
RXIN[3]
RXIN[4]
TXOP[4]
Differential 100 ohm
TXON[4]
LDIND/DISLD
AVDD18_3
DVDD18_1
AVDD18_4
DVDD18_2
DVDD18_3
No Via
Close to
ETNHUB_AVDD33
IC8400
MP20045DQ-LF-Z
EP[GND]
R8407
VIN_1 EN 10K ETNHUB_DVDD33
Realtek WOL
1 8
22
C8400
THERMAL
2.2uF R8408
VIN_2 PG 100K
9
25V 2 7
R8427
VOUT_1 GND ETNHUB_DVDD18 ETNHUB_AVDD18 R8458 R8465
3 6 1.5K 1.5K
$0.13
R8409 L8406 L8407
VOUT_2 FB 10K
4 5 BLM18PG121SN1D ETHERNET_MDC
BLM18PG121SN1D
Vout
R2
ETHERNET_MDIO
ETNHUB_ENDEFER
R8406 C8430 C8435 C8438
R1 0.1uF 22uF
ETNHUB_EPHY_TXOP3
ETNHUB_EPHY_TXON3
2K 2.2uF
16V 10V
Vout=1.5*(1+R1/R2) 25V
OPT
LAN2
ETNHUB_AVDD33 ETNHUB_DVDD33
L8404-*1
MTK TO RTL matching UBW2012-121F PHY TO RTL matching
L8408-*1
ETNHUB_AVDD18
C8402 C8405 C8416 C8422 C8426 C8429 SHENCHEN_NEW UBW2012-121F
OPT 22uF 0.1uF OPT 22uF 0.1uF 0.1uF 0.1uF ETNHUB_AVDD18
10V 10V L8404-*2
SS_OLD MLB-201209-0120P-N2 SHENCHEN_NEW
CIS21J121
L8404 L8408-*2
MAG_NEW MLB-201209-0120P-N2
L8408
EPHY_RDP ETNHUB_EPHY_TXOP0 CIS21J121
C8412 SS_OLD MAG_NEW
R8411
0.1uF 49.9
TR0P ETNHUB_EPHY_TXOP2
1%
C8442
0.1uF R8416
ETNHUB_AVDD18 C8420 49.9
0.1uF R8412
49.9
1% C8446 R8417
EPHY_RDN ETNHUB_EPHY_TXON0 0.1uF 49.9
C8404 C8407 C8411 C8418 C8424 C8427 C8432 C8433 C8436 C8413
OPT 22uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
TR0N ETNHUB_EPHY_TXON2
10V
C8443
0.1uF
EPHY_TDP ETNHUB_EPHY_RXIP0
C8414
R8413
0.1uF
49.9 TR1P ETNHUB_EPHY_RXIP2
1%
C8444
R8418
0.1uF
C8421 49.9
R8414
ETNHUB_DVDD18 0.1uF 49.9
1%
C8447
EPHY_TDN ETNHUB_EPHY_RXIN0 R8419
0.1uF 49.9
C8403 C8406 C8410 C8417 C8423 C8415
OPT 22uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
TR1N ETNHUB_EPHY_RXIN2
10V
C8445
0.1uF
Place close to chip
Place to center position between two chips
Place close to chip
Place to center position between two chips
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Ethernet HUB 8
EAX6430790* : LD22* / LC22*
EAX6443420* : LT22* / LJ22* / LA22* / LB22*
LY750H-ZA / EAX65743101
Chassis : LD4FC
Write Protection
NVRAM - Low : Normal Operation
Close to eMMC Flash
(IC8100)
X-TAL(27Mhz)
+3.5V_ST
+3.5V_ST - High : Write Protection
NVRAM_ST NVRAM_ATMEL
IC104-*1
IC104 AT24CM01-SSHM-T X100
R103 M24M01-HRMN6TP C102
4.7K 0.1uF 27MHz
NC VCC X-TAL_1 GND_2 +3.3V_NORMAL
MTK12 1 8 EMMC_CLK MT5369_XTAL_IN 1 4
R104 NC VCC A1 WP C113
0 1 8 2 7 GND_1 X-TAL_2
R174 2.7pF 2 3 MT5369_XTAL_OUT
M14 A2
3 6
SCL
10K 50V C115
E1 WP MT5369_NON_RM
2 7 GND SDA 2.7pF
4 5
50V IC105
10K
10K
10K
10K
R105 0 E2
3 6
SCL R136 33
SCL_NVRAM
LGE2112
M14
VSS SDA R137 33
R143
R145
R146
R149
4 5 SDA_NVRAM
AP14 AR18
JTCK U0TX SOC_TX
AM14 AP18
JTDI U0RX SOC_RX
AR14
JTDO
AR15 AU16
JTMS U1RX MTK_NEC_RX
R144 10K AN14 AT16
JTRST U1TX MTK_NEC_TX
HDCP EEPROM HDCP_EEPROM_MICRO

IC100-*1
24LC16B
Boot Option OSDA0
AP12
AN12
OSDA0 POWE
A35
C33
EMMC_CMD
OSCL0 OSCL0 POOE
B34 EMMC_DATA[2-7]
A0 VCC POCE1
1 8 AP15 D33
+3.3V_NORMAL +3.3V_NORMAL OSDA1 OSDA1 POCE0 EMMC_DATA[7]
A1 WP AN15 D29
HDCP_EEPROM_ST 2 7 OSCL1 OSCL1 PDD7 EMMC_DATA[6]
IC100 C30
M24C16-R A2 SCL PDD6 EMMC_DATA[5]
C101 3 6 AT34 D30
0.1uF MT5369_XTAL_IN XTALI PDD5 EMMC_DATA[4]
16V VSS SDA STRAPPING LED_PWM0 LED_PWM1 OPCTRL3 AU34 B31
NC_1 VCC 4 5 MT5369_XTAL_OUT XTALO PDD4 +3.3V_NORMAL
1 8 R147 R150 R153 AVDD_33SB A31 EMMC_DATA[3]
1K 1K 1K ICE mode + 27M + Serial boot 0 0 0 PDD3
NC_2 WC AK27 B32 EMMC_DATA[2]
2 7 R181 4.7K OPT OPT
AVDD33_XTAL_STB PDD2 R157
LED_PWM0 ICE mode + 27M + ROM to Nand boot 0 0 1 C116 AH26 A32
NC_3 SCL R191 22 AVSS33_XTAL_STB PDD1 4.7K
3 6 I2C_SCL1 0.1uF C32
LED_PWM1 ICE mode + 27M + Rom to eMMC boot 0 1 0 OPT
PDD0
VSS 4 5 SDA R192 22 from eMMC pins (share pins w/s NAND) D32
I2C_SDA1 OPCTRL3 PARB
R151 AVDD_33SB A34 R178
R148 R154 PACLE EMMC_DATA[1] 4.7K
1K 1K 1K ICE mode + 27M + ROM to eMMC boot 0 1 1 AK18 C34
OPT from SDIO pins AVDD33_VGA_STB PAALE EMMC_DATA[0] OPT
C117 AK17 C29
0.1uF AVSS33_VGA_STB EMMC_CLK EMMC_CLK
AM20
VDD3V3 OPWRSB
AK23 AM22 R172 22

AVDD33_PLLGP ORESET SOC_RESET
C118 AM27
0.1uF AVSS33_PLLGP C114
AU21
OIRI 0.1uF
16V
AJ20 D27 R159 4.7K
AVDD10_LDO FSRC_WR
C107 C108
2.2uF 2.2uF AT21
10V 10V STB_SCL STB_SCL
AR21
CI_ADDR[0-14] STB_SDA STB_SDA
Place Close to MTK5369(IC105)
CI_ADDR[0] H32 T34
GPIO0 DEMOD_RST PCM_RST
CI_ADDR[1] F37 T32
I2C_1 : AMP,HDCP KEY R1021 22 GPIO1 DEMOD_TSCLK
MT5369_MCLKI_SW CI_ADDR[2] F36 T36 SOC <- P:I
I2C_2 : EYE_Q
I2C I2C_3 : Pro:Idiom TS_S_OUT_VAL
TS_S_OUT_SYNC
R1034
R1035
22
22
CI_ADDR[3]
CI_ADDR[4]
G37
G36
GPIO2
GPIO3
DEMOD_TSDATA0
DEMOD_TSDATA1
U36
T33
TS_S_IN_0_CLK
I2C_4 : OPT(S/Demod,T2/Demod,LNB) R1036 22 GPIO4 DEMOD_TSDATA2 TS_S_IN_0_VAL
TS_S_OUT_DATA CI_ADDR[5] G35 T30
+3.3V_NORMAL
I2C_5 : NVRAM Pro:Idiom/CI CLK S/W GPIO5 DEMOD_TSDATA3 TS_S_IN_0_SYNC
CI_ADDR[6] G34 V33
I2C_6 : TUNER_MOPLL(T/C,ATV) +3.3V_NORMAL GPIO6 DEMOD_TSDATA4 TS_S_IN_0_DATA
- TCLK_SEL HIGH : Pro:Idiom(Default) CI_ADDR[7] H34 V32
GPIO7 DEMOD_TSDATA5
- TCLK_SEL LOW : CI CI_ADDR[8] L34 V31
I2C_SCL4 GPIO8 DEMOD_TSDATA6
R1028 CI_ADDR[9] L32 V30
I2C_SDA4 IC106 10K GPIO9 DEMOD_TSDATA7
CI_ADDR[10] K33 T35
NLASB3157DFT2G GPIO10 DEMOD_TSSYNC
MT5369_MIVAL_ERR CI_ADDR[11] K32 T31
R128 R131 R134 R139 R142 R173 R185 R188 R156 R160 TCLK_SEL
R164 R177 GPIO11 DEMOD_TSVAL
1.2K 1.2K 2.7K 2.7K 2.7K 2.7K 2.7K 2.7K 2.7K 2.7K MT5369_MISTRT CI_ADDR[12] H33
2.7K 2.7K GPIO12
R1027 B1 SELECT +3.3V_NORMAL CI_ADDR[13] L35 N36
1 6 MT5369_TS_OUT[0-7] /PCM_REG
R110 33 TS_S_OUT_CLK GPIO13 CI_INT
STB_SCL I2C_SCL1 22 CI_ADDR[14] K36 T37
GPIO14 CI_TSCLK /PCM_CE1
STB_SDA R111 33 I2C_SDA1 J32 R35
GND VCC GPIO15 CI_TSDATA0 MT5369_TS_SYNC
R112 33 2 5 J34 R37 CI SLOT -> SOC
OPCTRL_11_SCL I2C_SCL2 GPIO16 CI_TSSYNC /PCM_WE
R113 33 C121 K34 R36
OPCTRL_10_SDA I2C_SDA2 0.1uF GPIO17 CI_TSVAL /PCM_OE
B0 A MT5369_TS_OUT[0] K35
OSCL1 R114 33 I2C_SCL3 3 4
MT5369_MCLKI MT5369_MCLKI_SW GPIO18
R115 33 MT5369_TS_OUT[1] K37 R34
OSDA1 I2C_SDA3 GPIO19 PVR_TSCLK MT5369_TS_VAL CI SLOT -> SOC
R116 33 MT5369_TS_OUT[2] J36 R32
OSCL2 I2C_SCL4 GPIO20 PVR_TSVAL CI_A_VS1
R117 33 MT5369_TS_OUT[3] J37 R33
OSDA2 I2C_SDA4 GPIO21 PVR_TSSYNC MT5369_TS_CLK CI SLOT -> SOC
R118 33 MT5369_TS_OUT[4] J35 P33
OSCL0 I2C_SCL5 GPIO22 PVR_TSDATA0 /PCM_IRQA
R121 33 MT5369_TS_OUT[5] J33 P34
OSDA0 I2C_SDA5 CI_DATA[0-7] GPIO23 PVR_TSDATA1 /PCM_WAIT
R122 33 MT5369_TS_OUT[6] G33
OPCTRL_1_SCL I2C_SCL6 GPIO24
OPCTRL_0_SDA R123 33 MT5369_TS_OUT[7] H35 N37
I2C_SDA6 GPIO25 SPI_CLK1 /CI_CD2
CI_DATA[0] H31 P35
GPIO26 SPI_CLK /CI_CD1
CI_DATA[1] F34 N34
GPIO27 SPI_DATA /PCM_IORD
CI_DATA[2] E36 N35
GPIO28 SPI_CLE /PCM_IOWR
CI_DATA[3] N33
GPIO29
CI_DATA[4] P32 AU12 R195 22
GPIO30 OPWM2 PWM_DIM2
CI_DATA[5] M35 AT12 R196 22
GPIO31 OPWM1 PWM_DIM1
CI_DATA[6] M37 AR12
GPIO32 OPWM0
CI_DATA[7] M33 R197 R198
GPIO33 1K 1K
F35 A37
MT5369_TS_IN[0] GPIO34 SD_D0
E35 C35
+3.3V_NORMAL MT5369_TS_IN[1] GPIO35 SD_D1
Model Option MT5369_RM
IC105-*1
LGE2112-AL
MT5369_TS_IN[2]
MT5369_TS_IN[3]
E37
N32
GPIO36
GPIO37
SD_D2
SD_D3
A36
B35
PWM2_PULL_DOWN_1K
PWM1_PULL_DOWN_1K
M34 B36
MT5369_TS_IN[4] GPIO38 SD_CMD
AC1
DDRV_44 ARDQM0
C19 M36 B37
AC2
DDRV_45 ARDQS0
C21 MT5369_TS_IN[5] GPIO39 SD_CLK
MTK_Int_FRC/URSA5
A3 B21 M32
MTK_OPTIC_Tx_IC
DDRV_1 ARDQS0
MTK_DVB_T2_TUNER
MTK_DVB_C2_TUNER
MTK_3D_DEPTH_IC
A4 C23 MT5369_TS_IN[6] GPIO40

MTK_DVB_S_TUNER
MTK_FRC3/URSA5
DDRV_2 ARDQ0
B4
DDRV_5 ARDQ1
B17 L33
MTK_DDR_768MB
SoC C4 D23 MT5369_TS_IN[7] GPIO41

MTK_CP_BOX
DDRV_8 ARDQ2
NO_FRC internal LG FRC2 Reserved
D4 C17 E33 AT11
DDRV_10 ARDQ3
/USB_OCD2
MTK_EPI
B3 D24
GPIO42 LDM_CS
MTK_FHD
R140
DDRV_4 ARDQ4
R135
R175
R130
4.7K
4.7K
4.7K
4.7K
FRC E32 AU11

R186
R132
R125
4.7K
4.7K
4.7K
C3 C16
R106
R108
R189
4.7K
4.7K
4.7K
R101
4.7K
AC3
DDRV_7
DDRV_46
ARDQ5
ARDQ6
C24 /USB_OCD1 GPIO43 LDM_CLK
MODEL_OPT_0 0 0 1 1
AC4 D15 F32 AR10
DDRV_47 ARDQ7
NEC_WOL GPIO44 LDM_VSYNC
G10
MEMTP ARDQM1
D21
USB_CTL2 A29 AM9
MODEL_OPT_1 0 1 0 1
G9
MEMTN ARDQS1
B20
GPIO45 LDM_DO
C20
USB_CTL1 D31 AP10
G13
RVREF_B
ARDQS1
ARDQ8
A17 For TA model GPIO46 LDM_DI
MODEL_OPT_0 G21 A23 C31
RVREF_A ARDQ9
D17 OPT EXT_SPK_VOL- GPIO47
ARDQ10
ARDQ11
B23 R194 0 E30
MODEL_OPT_1 F10
ARCKE ARDQ12
D20 COMP1_DET GPIO48
HIGH LOW ARDQ13
D22 E31 AN22
D9
ARCLK1 ARDQ14
D19 MODEL_OPT_0 GPIO49 LED_PWM1 LED_PWM1
MODEL_OPT_2 C9
ARCLK1 ARDQ15
C22 F31 AP21
MODEL_OPT_1 GPIO50 LED_PWM0 LED_PWM0
MODEL_OPT_2 FHD HD A20
ARCLK0 ARDQM2
A7 E29
MODEL_OPT_3 A21
ARCLK0 ARDQS2
B9
GPIO51
ARDQS2
A9 AP9
MODEL_OPT_3 OPTIC NON_OPTIC E18 C12 MODEL_OPT_3 GPIO52
/S2_RESETMODEL_OPT_4 F17
ARODT ARDQ16
D6 AT9
E17
ARRAS ARDQ17
B12 MODEL_OPT_7 GPIO53 5V Tolerance
MODEL_OPT_4 3D DEPTH 3D_Depth_IC NON_3D_Depth_IC E16
ARCAS ARDQ18
C5 AR9 AU20
MODEL_OPT_5 D14
ARCS
ARWE
ARDQ19
ARDQ20
C13 MODEL_OPT_5 GPIO54 OPCTRL11 OPCTRL_11_SCL
A5 SC_ID_SOC AU9 AT20
MODEL_OPT_5 DDR DDR_768MB DDR_Default B14
ARDQ21
A12 MODEL_OPT_6 GPIO55 OPCTRL10 OPCTRL_10_SDA
MODEL_OPT_6 ARRESET ARDQ22
ARDQ23
B5 AN18
A13
OPCTRL9 EDID_WP_MTK
MODEL_OPT_7 MODEL_OPT_6 CP BOX Enable Disable G11
ARBA0
E10
NON_EU AP20
ARBA1 ARDQM3
D16 C8
OPCTRL8 SC_DET
ARBA2 ARDQS3
ARDQS3
D8 R193 10K AN23 AM18
MODEL_OPT_8 MODEL_OPT_7 T2 Tuner Support Not Support
F18
ARCSX ARDQ24
C6
ADIN0_SRV OPCTRL7 DSUB_DET
10K AN24 AN19
MTK_NON_OPTIC_Tx_IC
MTK_NON_DVB_T2_TUNER
MTK_NON_DVB_C2_TUNER
D10
R176
MTK_NON_3D_DEPTH_IC
ARDQ25
MTK_NO_FRC/Int_FRC
TCLK_SEL
MTK_NON_DVB_S_TUNER
MODEL_OPT_9
C15
ARA14 ARDQ26
D7
ADIN1_SRV OPCTRL6
MODEL_OPT_8 S Tuner Support A15 C11 R162 10K AP23 AP19
Not Support F13
ARA13 ARDQ27
C7
ADIN2_SRV OPCTRL5 HP_DET
MTK_NO_FRC/FRC3
ARA12 ARDQ28
C14 C10
R163 10K AR23 AR19
MTK_DDR_DEFAULT
MODEL_OPT_10 ARA11 ARDQ29

ADIN3_SRV LAN2_DET
F11 B7
OPCTRL4
MTK_NON_CP_BOX
ARA10 ARDQ30
MODEL_OPT_9 AU23 AN21
MTK_NON_EPI
Reserved Default
E15
ARA9 ARDQ31
B10
D13
ARA8 LAN1_DET ADIN4_SRV OPCTRL3 OPCTRL3
AT23 AM19
MTK_HD
B15
R133
R102
4.7K
4.7K
R107
4.7K
R129
R127
R109
ARA7
4.7K
R141
R138
R184
R187
R190
4.7K
4.7K
4.7K
4.7K
4.7K
4.7K
4.7K
MODEL_OPT_10 EPI Support Not Support

E14
ARA6 AVDD33_MEMPLL
N14 OPC_EN ADIN5_SRV OPCTRL2 EXT_SPK_DET
F16
ARA5 AVSS33_MEMPLL
N15 AM24 AN20
E13
ARA4 /TU_RESET ADIN6_SRV OPCTRL1 OPCTRL_1_SCL
B13
ARA3
AM23 AR20
A14
ARA2 DVSS_50
R1
MODEL_OPT_4 /S2_RESET ADIN7_SRV OPCTRL0 OPCTRL_0_SDA
F14 P21
MODEL OPTION 8 is just for CP Box F15
ARA1 DVSS_48
ARA0
It should not be appiled at MP
Modify for TA model

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MID_MAIN_1 8
LED CLOCK/SPDIF/HP
remove LED clock option for TA model
RGB_5V RGB_5V +5V_NORMAL

RGB PC
SPDIF OUT
A1
C
A2
MMBD6100
D3620
R3641 R3642
IC3600
M24C02-RMN6T 2.7K 2.7K
JK3602
E0
1 8
VCC +3.3V_NORMAL JST1223-001
E1 WC JP3605
2 7
GND
1
E2 SCL R3643 22
3 6
Fiber Optic
RGB_DDC_SCL
R3644 22 OPT
VSS
4 5
SDA
R3620 JP3606 VCC
RGB_DDC_SDA
2
2.7K
C3633 C3634 R3616
18pF 18pF 33 JP3607 VINPUT
3
SPDIF_OUT
50V 50V
D3613 C3615
4
5.5V 0.1uF
FIX_POLE
OPT 16V
ADUC 5S 02 0R5L
DSUB_VSYNC OPT D3613-*1

D3615 D3621 5.5V
ADUC 5S 02 0R5L ADUC 5S 02 0R5L
30V 5.5V
OPT ESD_MTK
DSUB_HSYNC OPT D3622

ADUC 5S 02 0R5L
D3616 5.5V
30V OPT
DSUB_B+
HEADPHONE JACK
HP_OUT
JK3605
PEJ038-3B6
+3.3V_NORMAL GND 5
DSUB_G+
L 4
R3646 HP_LOUT
10K
DETECT 3
DSUB_DET R 1
HP_ROUT
+3.3V_NORMAL
D3623
5.6V
DSUB_R+ R3617
10K
HP_OUT
HP_DET
GREEN_GND
DDC_CLOCK
D3601
DDC_DATA
SYNC_GND
BLUE_GND
5.6V
DDC_GND
RED_GND
H_SYNC
V_SYNC
OPT
GREEN
GND_2
GND_1
BLUE
RED
NC
Closed to JACK
SPG09-DB-010
SHILED
11
12
13
14
15
JK3603
16
10
6
9
1
Modify for TA model

ESSENTIAL
CopyrightTHAT ONLYLG
© 2014 MANUFACTURES SPECIFIED
Electronics Inc. PARTS
All rights BE USED FOR
reserved. LGE Internal Use Only
THE CRITICAL
Only COMPONENTS
for training IN THE
and service SYMBOL MARK OF THE SCHEMETIC.
purposes RGB/HP/SPDIF 36
RS232C EXT UART SWITCH
DBG_SWCONNECTION UART_SW2CONNECTION UART_SW3CONNECTION

1A@5V /1A@12V FOR COMMERCIAL(RS-232C POWER) L B0 - A MTK - RS232C ADJ. L B0 - A RS232C - NEC_UART3,INTERACTIVE L B0 - A MTK - NEC_URAT0,NORMAL COMM.
H B1 - A MTK - PHONE JK. DEBUG H B1 - A MTK - NEC_UART3,NEC USB D/L H B1 - A MTK - NEC_UART3,NEC USB D/L
EXT_12V
EXT_5V
10
5 UART_SW1 UART_SW2
L3801
9 IC3811 IC3802 IC3813 UART_SW3
NLASB3157DFT2G NLASB3157DFT2G NLASB3157DFT2G
+3.5V_ST IR_OUT_RS232C 4 +3.5V_ST
+3.5V_ST +3.5V_ST
IC3800 8 SELECT B1 B1 SELECT B1 SELECT
6 1 MTK_DBG_TX 1 6 1 6
MAX3232CDR R3820 100
3 ON SEMICONDUCTOR ON SEMICONDUCTOR ON SEMICONDUCTOR
L3802 VCC ANALOG SWITCH GND GND ANALOG SWITCH VCC R3864 GND ANALOG SWITCH VCC
7 5 2 2 5 2 NEW_UART 5
0
C3800 0 . 1 u F C1+ VCC R3821 100 C3822 C3811 OLD_UART C3824 NEW_UART
1 16 2 0.1uF
0 . 1 u FA R3843 0.1uF
C3804 B0 22 B0 A B0 A
SOC_TX 4 3 3 4 NEC_TX3 NEC_TX0 3 4 MTK_NEC_RX
C3801 0.1uF V+ GND 6
2 15 0.1uF D3804 D3805
20V 20V EAN38256201 EAN38256201 EAN38256201
1
OPT OPT
C1- DOUT1 R3866
3 14 RS232_TX 0
+3.5V_ST
SPG09-DB-009 OLD_UART
C3802 0.1uF C2+ RIN1
4 13 JK3803 IC3812 IC3804 IC3814
R3834
50V NLASB3157DFT2G NLASB3157DFT2G NLASB3157DFT2G
1K
C2- ROUT1
5 12
BAP70-02 SELECT B1 B1 SELECT B1 SELECT
+3.5V_ST 6 1 1 6 1 6
D3803 MTK_DBG_RX
C3803 0.1uF V- DIN1
6 11 ON SEMICONDUCTOR ON SEMICONDUCTOR ON SEMICONDUCTOR
VCC ANALOG SWITCH GND GND ANALOG SWITCH VCC R3867 GND ANALOG SWITCH VCC
5 2 2 5 2 NEW_UART 5
DOUT2 DIN2 R3811 R3814 C3813 0 C3825 NEW_UART
7 10 4.7K 4.7K C3823 OLD_UART
0.1uF A R3846 0.1uF 0.1uF
B0 22 B0 A B0 A
RS232_RX SOC_RX 4 3 3 4 NEC_RX3 NEC_RX0 3 4 MTK_NEC_TX
RIN2 ROUT2
8 9
EAN38256201 EAN38256201 EAN38256201
EAN41348201 RS232_TX
RS232_RX R3868
0
OLD_UART
NVRAM I2C SWITCH

UART_SW2CONNECTION
L B0 - A NVRAM - NEC UART DBG SWITCH EXT_SPK_CONTROL & DBG OUT
H B1 - A NVRAM - MTK
PC_R_IN
UART_DBG_SW CONNECTION
DBG_SWCONNECTION
L B0 - A Debug NEC +3.3V_NORMAL L B0 - A DEBUG_NEC/MTK
DBG_SW
H B1 - A Debug MTK IC3806 H B1 - A EXT.SPK VOL Control
EEPROM_SW R3855
0 NLASB3157DFT2G +3.5V_ST
IC3809 +3.5V_ST UART_DBG_SW R3849 OPT
NLASB3157DFT2G 3.6K
IC3805 EXT_SPK
R3844 NLASB3157DFT2G R3854 B1 SELECT
4.7K EXT_SPK_VOL+ 1 6
+3.5V_ST
SELECT B1 0 ON SEMICONDUCTOR
6 1 I2C_SCL5 +3.5V_ST ANALOG SWITCH
B1 SELECT GND VCC
ON SEMICONDUCTOR +3.5V_ST MTK_DBG_TX 1 6 2 5
VCC ANALOG SWITCH GND
5 2 ON SEMICONDUCTOR C3816
GND ANALOG SWITCH VCC B0 A 0.1uF
R3815
C3820 2 5 JK_DBG_TX 3 4
2.7K
0 . 1 u FA B0 C3814
SCL_NVRAM 4 3 NEC_EEPROM_SCL EAN38256201
B0 A 0.1uF
NEC_DBG_TXD 3 4 JK_DBG_TX
EAN38256201 JK3801
EAN38256201 PEJ027-04
PC_L_IN E_SPRING 3
+3.3V_NORMAL
+3.5V_ST
JP3801
IC3808 T_TERMINAL1
IC3810 R3853 6A
NLASB3157DFT2G +3.5V_ST
NLASB3157DFT2G R3851 0
IC3807 3.6K
R3845 OPT B_TERMINAL1
NLASB3157DFT2G 7A
4.7K EXT_SPK
R3852 B1 SELECT OPT OPT
SELECT B1 EXT_SPK_VOL- 1 6 C3818
6 1 I2C_SDA5 D3806 R_SPRING 4
B1 SELECT 0 ON SEMICONDUCTOR 1000pF
1 6 C3817 50V 5.6V
ON SEMICONDUCTOR +3.5V_ST MTK_DBG_RX ANALOG SWITCH 0.1uF
ANALOG SWITCH GND VCC
VCC GND 2 5 T_SPRING
JP3802
5 2 ON SEMICONDUCTOR 5
R3816 GND ANALOG SWITCH VCC
C3821 2 5
2.7K C3815 B0 A B_TERMINAL2
0.1uF A B0 3 4 7B
4 3 0.1uF JK_DBG_RX
SDA_NVRAM NEC_EEPROM_SDA B0 A OPT
NEC_DBG_RXD 3 4 JK_DBG_RX EAN38256201 C3819 D3807 T_TERMINAL2 6B
EAN38256201 1000pF 5.6V
50V OPT
EAN38256201
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. UART 38
eMMC NAND FLASH Interface
EMMC_VCCQ
R8117
R8116
AR8103
AR8104
1/16W
1/16W
10K
10K
EMMC DATA LINE
10K
10K
10K PULL/UP
IC8100 HYNIX_EMMC_2GB
SAMSUNG_EMMC_2GB
IC8100-*1
SDIN5D2-4G-974L1 H26M21001ECR IC8100-*2
KLM2G1HE3F-B001
AR8100
EMMC_DATA[0-7] 22 A3 C8
DAT0 NC_25
1/16W A4
DAT1 NC_26
C9 A3
DAT0 NC_25
C8
A5 C10 A4 C9
EMMC_DATA[0] A3 C8 B2
DAT2 NC_27
C11 A5
DAT1 NC_26
C10
DAT0 NC_25 B3
DAT3 NC_28
C12 B2
DAT2 NC_27
C11
DAT4 NC_29
C13 B3
DAT3 NC_28
C12
DAT1 NC_26 B5
DAT5 NC_30
C14 B4
DAT4 NC_29
C13
DAT6 NC_31
D1 B5
DAT5 NC_30
C14
DAT2 NC_27 DAT7 NC_32
D2 B6
DAT6 NC_31
D1
EMMC_DATA[3] B2 C11 NC_33
D3
DAT7 NC_32
D2
EMMC_DATA[4] DAT3 NC_28 M6
NC_34
D4
NC_33
D3
B3 C12 M5
CLK NC_35
D12 M6
NC_34
D4
EMMC_DATA[5] DAT4 NC_29 CMD NC_36
D13 M5
CLK NC_35
D12
B4 C13 NC_37
D14
CMD NC_36
D13
EMMC_DATA[6] DAT5 NC_30 A6
NC_38
E1
NC_37
D14
B5 C14 A7
NC_3 NC_39
E2 A6
NC_38
E1
EMMC_DATA[7] AR8101 DAT6 NC_31 C5
NC_4 NC_40
E3 A7
NC_3 NC_39
E2
22 B6 D1 E5
NC_23 NC_41
E12 C5
NC_4 NC_40
E3
1/16W DAT7 NC_32 DAT5 E8
NC_42 NC_46
E13 E5
NC_23 NC_41
E12
D2 E9
NC_43 NC_47
E14 E8
NC_42 NC_46
E13
NC_33 E10
NC_44 NC_48
F1 E9
NC_43 NC_47
E14
D3 F10
NC_45 NC_49
F2 E10
NC_44 NC_48
F1
NC_34 G3
NC_52 NC_50
F3 F10
NC_45 NC_49
F2
M6 D4 G10
NC_58 NC_51
F12 G3
NC_52 NC_50
F3
CLK NC_35 H5
NC_59 NC_53
F13 G10
NC_58 NC_51
F12
M5 D12 J5
NC_66 NC_54
F14 H5
NC_59 NC_53
F13
CMD NC_36 K6
NC_73 NC_55
G1 J5
NC_66 NC_54
F14
D13 K7
NC_80 NC_56
G2 K6
NC_73 NC_55
G1
NC_37 K10
NC_81 NC_57
G12 K7
NC_80 NC_56
G2
D14 P7
NC_82 NC_60
G13 K10
NC_81 NC_57
G12
NC_38 P10
NC_116 NC_61
G14 P7
NC_82 NC_60
G13
A6 E1 NC_119 NC_62
H1 P10
NC_116 NC_61
G14
NC_3 NC_39 NC_63
H2
NC_119 NC_62
H1
A7 E2 K5
NC_64
H3
NC_63
H2
NC_4 NC_40 RESET NC_65
H12 K5
NC_64
H3
C5 E3 NC_67
H13
RSTN NC_65
H12
NC_23 NC_41 C6
NC_68
H14
NC_67
H13
E5 E12 M4
VCCQ_1 NC_69
J1 C6
NC_68
H14
NC_42 NC_46 N4
VCCQ_2 NC_70
J2 M4
VDD_1 NC_69
J1
E8 E13 P3
VCCQ_3 NC_71
J3 N4
VDD_2 NC_70
J2
NC_43 NC_47 P5
VCCQ_4 NC_72
J12 P3
VDD_3 NC_71
J3
AR8102 22 E9 E14 VCCQ_5 NC_74
J13 P5
VDD_4 NC_72
J12
EMMC_CLK NC_44 NC_48 NC_75
J14
VDD_5 NC_74
J13
E10 F1 E6
NC_76
K1
NC_75
J14
EMMC_CMD NC_45 NC_49 DAT6 F5
VCC_1 NC_77
K2 E6
NC_76
K1
F10 F2 J10
VCC_2 NC_78
K3 F5
VDDF_1 NC_77
K2
EMMC_RST NC_52 NC_50 K9
VCC_3 NC_79
K12 J10
VDDF_2 NC_78
K3
G3 F3 VCC_4 NC_83
K13 K9
VDDF_3 NC_79
K12
NC_58 NC_51 NC_84
K14
VDDF_4 NC_83
K13
G10 F12 C2
NC_85
L1
NC_84
K14
NC_59 NC_53 VDDI NC_86
L2 C2
NC_85
L1
H5 F13 NC_87
L3
VDDI NC_86
L2
NC_66 NC_54 E7
NC_88
L12
NC_87
L3
J5 F14 G5
VSS_1 NC_89
L13 C4
NC_88
L12
C8107 NC_73 NC_55 H10
VSS_2 NC_90
L14 E7
VSS_1 NC_89
L13
10pF K6 G1 VSS_3 NC_91 VSS_2 NC_90
OPT NC_80 NC_56
K8
C4
VSS_4 NC_92
M1
M2
G5
H10
VSS_3 NC_91
L14
M1
50V K7 G2 N2
VSSQ_1 NC_93
M3 K8
VSS_4 NC_92
M2
NC_81 NC_57 N5
VSSQ_2 NC_94
M7 N2
VSS_5 NC_93
M3
K10 G12 P4
VSSQ_3 NC_95
M8 N5
VSS_6 NC_94
M7
NC_82 NC_60 P6
VSSQ_4 NC_96
M9 P4
VSS_7 NC_95
M8
P7 G13 VSSQ_5 NC_97
M10 P6
VSS_8 NC_96
M9
NC_116 NC_61 NC_98
M11
VSS_9 NC_97
M10
P10 G14 NC_99
M12
NC_98
M11
NC_119 NC_62 NC_100 NC_99
SANDISK_EMMC_4GB
A1 M13 M12
H1 A2
NC_1 NC_101
M14 A1
NC_100
M13
NC_63 A8
NC_2 NC_102
N1 A2
NC_1 NC_101
M14
H2 A9
NC_5 NC_103
N3 A8
NC_2 NC_102
N1
NC_64 A10
NC_6 NC_104
N6 A9
NC_5 NC_103
N3
K5 H3 A11
NC_7 NC_105
N7 A10
NC_6 NC_104
N6
RESET NC_65 A12
NC_8 NC_106
N8 A11
NC_7 NC_105
N7
H12 A13
NC_9 NC_107
N9 A12
NC_8 NC_106
N8
C8100 NC_67 A14
NC_10 NC_108
N10 A13
NC_9 NC_107
N9
0.1uF H13 NC_11 NC_109 NC_10 NC_108
OPT NC_68
B1
B7
NC_12 NC_110
N11
N12
A14
B1
NC_11 NC_109
N10
N11
16V C6 H14 B8
NC_13 NC_111
N13 B7
NC_12 NC_110
N12
VCCQ_1 NC_69 B9
NC_14 NC_112
N14 B8
NC_13 NC_111
N13
EMMC_VCCQ 3.3V_EMMC M4 J1 B10
NC_15 NC_113
P1 B9
NC_14 NC_112
N14
VCCQ_2 NC_70 B11
NC_16 NC_114
P2 B10
NC_15 NC_113
P1
N4 J2 B12
NC_17 NC_115
P8 B11
NC_16 NC_114
P2
VCCQ_3 NC_71 B13
NC_18 NC_117
P9 B12
NC_17 NC_115
P8
P3 J3 B14
NC_19 NC_118
P11 B13
NC_18 NC_117
P9
VCCQ_4 NC_72 C1
NC_20 NC_120
P12 B14
NC_19 NC_118
P11
P5 J12 C3
NC_21 NC_121
P13 C1
NC_20 NC_120
P12
VCCQ_5 NC_74 C7
NC_22 NC_122
P14 C3
NC_21 NC_121
P13
J13 NC_24 NC_123 NC_22 NC_122
DAT3
DAT4
DAT5
DAT6
C7 P14
C8105 C8106 NC_75 NC_24 NC_123
EMMC_RESET_BALL
EMMC_CLK_BALL
J14
EMMC_CMD_BALL
0.1uF 2.2uF NC_76

16V 10V E6 K1
VCC_1 NC_77 EMMC_RESET_BALL
F5 K2
VCC_2 NC_78
J10 K3
VCC_3 NC_79
K9 K12
VCC_4 NC_83
K13
NC_84
EMMC_VDDI K14
NC_85
C2 L1
VDDI NC_86
L2 DEV_HYNIX_EMMC_4GB TOSHIBA_EMMC_4GB
C8104 NC_87 IC8100-*3 IC8100-*4
0.1uF L3 H26M31001EFR THGBMAG5A1JBAIR
NC_88
16V E7 L12
VSS_1 NC_89 A3 C8 A3 C8
G5 L13 A4
DAT0 NC_25
C9 A4
DAT0 NC_23
C9
VSS_2 NC_90 A5
DAT1 NC_26
C10 A5
DAT1 NC_24
C10
H10 L14 B2
DAT2 NC_27
C11 B2
DAT2 NC_25
C11
VSS_3 NC_91 B3
DAT3 NC_28
C12 B3
DAT3 NC_26
C12
K8 M1 B4
DAT4 NC_29
C13 B4
DAT4 NC_27
C13
VSS_4 NC_92 B5
DAT5 NC_30
C14 B5
DAT5 NC_28
C14
C8102 C8103 C4 M2 B6
DAT6 NC_31
D1 B6
DAT6 NC_29
D1
0.1uF 2.2uF VSSQ_1 NC_93 DAT7 NC_32
D2
DAT7 NC_30
D2
N2 M3 NC_33
D3
NC_31
D3
16V 10V VSSQ_2 NC_94 M6
NC_34
D4 M6
NC_32
D4
N5 M7 M5
CLK NC_35
D12 M5
CLK NC_33
D12
VSSQ_3 NC_95 CMD NC_36
D13
CMD NC_34
D13
P4 M8 NC_37
D14
NC_35
D14
VSSQ_4 NC_96 A6
NC_38
E1 A6
NC_36
E1
P6 M9 A7
NC_3 NC_39
E2 A7
RFU_1 NC_37
E2
VSSQ_5 NC_97 C5
NC_4 NC_40
E3 C5
RFU_2 NC_38
E3
M10 E5
NC_23 NC_41
E12 E5
NC_21 NC_39
E12
NC_98 E8
NC_42 NC_46
E13 E8
RFU_3 NC_40
E13
M11 E9
NC_43 NC_47
E14 E9
RFU_4 NC_41
E14
NC_99 E10
NC_44 NC_48
F1 E10
RFU_5 NC_42
F1
M12 F10
NC_45 NC_49
F2 F10
RFU_6 NC_43
F2
NC_100 G3
NC_52 NC_50
F3 G3
RFU_7 NC_44
F3
A1 M13 G10
NC_58 NC_51
F12 G10
RFU_8 NC_45
F12
DAT3 NC_1 NC_101 H5
NC_59 NC_53
F13 H5
RFU_9 NC_46
F13
A2 M14 J5
NC_66 NC_54
F14 J5
RFU_10 NC_47
F14
DAT4 NC_2 NC_102 K6
NC_73 NC_55
G1 K6
RFU_11 NC_48
G1
A8 N1 K7
NC_80 NC_56
G2 K7
RFU_12 NC_49
G2
NC_5 NC_103 K10
NC_81 NC_57
G12 K10
RFU_13 NC_50
G12
A9 N3 P7
NC_82 NC_60
G13 P7
RFU_14 NC_51
G13
NC_6 NC_104 P10
NC_116 NC_61
G14 P10
RFU_15 NC_52
G14
A10 N6 NC_119 NC_62
H1
RFU_16 NC_53
H1
NC_7 NC_105 EMMC_CMD_BALL NC_63
H2
NC_54
H2
A11 N7 K5
NC_64
H3 K5
NC_55
H3
NC_8 NC_106 RESET NC_65
H12
RST_N NC_56
H12
A12 N8 NC_67
H13
NC_57
H13
NC_9 NC_107 C6
NC_68
H14 C6
NC_58
H14
A13 N9 M4
VCCQ_1 NC_69
J1 M4
VCCQ_1 NC_59
J1
NC_10 NC_108 N4
VCCQ_2 NC_70
J2 N4
VCCQ_2 NC_60
J2
A14 N10 P3
VCCQ_3 NC_71
J3 P3
VCCQ_3 NC_61
J3
NC_11 NC_109 P5
VCCQ_4 NC_72
J12 P5
VCCQ_4 NC_62
J12
B1 N11 VCCQ_5 NC_74
J13
VCCQ_5 NC_63
J13
NC_12 NC_110 NC_75
J14
NC_64
J14
B7 N12 E6
NC_76
K1 E6
NC_65
K1
NC_13 NC_111 F5
VCC_1 NC_77
K2 F5
VCC_1 NC_66
K2
B8 N13 J10
VCC_2 NC_78
K3 J10
VCC_2 NC_67
K3
NC_14 NC_112 K9
VCC_3 NC_79
K12 K9
VCC_3 NC_68
K12
B9 N14 VCC_4 NC_83
K13
VCC_4 NC_69
K13
NC_15 NC_113 NC_84
K14
NC_70
K14
B10 P1 C2
NC_85
L1 C2
NC_71
L1
NC_16 NC_114 VDDI NC_86
L2
VDDI NC_72
L2
B11 P2 NC_87
L3
NC_73
L3
NC_17 NC_115 E7
NC_88
L12 E7
NC_74
L12
B12 P8 G5
VSS_1 NC_89
L13 G5
VSS_1 NC_75
L13
NC_18 NC_117 EMMC_CLK_BALL VSS_2 NC_90 VSS_2 NC_76
Don’t Connect Power At VDDI

H10 L14 H10 L14
EMMC_VDDI B13 P9 K8
VSS_3 NC_91
M1 K8
VSS_3 NC_77
M1
NC_19 NC_118 C4
VSS_4 NC_92
M2 C4
VSS_4 NC_78
M2
B14 P11 N2
VSSQ_1 NC_93
M3 N2
VSSQ_1 NC_79
M3
NC_20 NC_120 N5
VSSQ_2 NC_94
M7 N5
VSSQ_2 NC_80
M7
C1 P12 P4
VSSQ_3 NC_95
M8 P4
VSSQ_3 NC_81
M8
NC_21 NC_121 P6
VSSQ_4 NC_96
M9 P6
VSSQ_4 NC_82
M9
(Just Interal LDO Capacitor) DAT5

C3
C7
NC_22 NC_122
P13
P14
VSSQ_5 NC_97
NC_98
NC_99
M10
M11
M12
VSSQ_5 NC_83
NC_84
NC_85
M10
M11
M12
NC_24 NC_123 A1
NC_100
M13 A1
NC_86
M13
NC_1 NC_101 NC_1 NC_87
A2 M14 A2 M14
NC_2 NC_102 NC_2 NC_88
A8 N1 A8 N1
NC_5 NC_103 NC_3 NC_89
A9 N3 A9 N3
NC_6 NC_104 NC_4 NC_90
A10 N6 A10 N6
NC_7 NC_105 NC_5 NC_91
A11 N7 A11 N7
NC_8 NC_106 NC_6 NC_92
A12 N8 A12 N8
NC_9 NC_107 NC_7 NC_93
A13 N9 A13 N9
NC_10 NC_108 NC_8 NC_94
A14 N10 A14 N10
DU1 DU9 B1
NC_11 NC_109
N11 B1
NC_9 NC_95
N11
DUMMY_1 DUMMY_9 B7
NC_12 NC_110
N12 B7
NC_10 NC_96
N12
DU2 DU10 B8
NC_13 NC_111
N13 B8
NC_11 NC_97
N13
DUMMY_2 DUMMY_10 B9
NC_14 NC_112
N14 B9
NC_12 NC_98
N14
DU3 DU11 B10
NC_15 NC_113
P1 B10
NC_13 NC_99
P1
DUMMY_3 DUMMY_11 B11
NC_16 NC_114
P2 B11
NC_14 NC_100
P2
DU4 DU12 B12
NC_17 NC_115
P8 B12
NC_15 NC_101
P8
DUMMY_4 DUMMY_12 B13
NC_18 NC_117
P9 B13
NC_16 NC_102
P9
DU5 DU13 B14
NC_19 NC_118
P11 B14
NC_17 NC_103
P11
DUMMY_5 DUMMY_13 C1
NC_20 NC_120
P12 C1
NC_18 NC_104
P12
DU6 DU14 C3
NC_21 NC_121
P13 C3
NC_19 NC_105
P13
DUMMY_6 DUMMY_14 C7
NC_22 NC_122
P14 C7
NC_20 NC_106
P14
DU7 DU15 NC_24 NC_123 NC_22 NC_107
DUMMY_7 DUMMY_15
DU8 DU16
DUMMY_8 DUMMY_16
DU1 DU9
DUMMY_1 DUMMY_9
DU2 DU10
DUMMY_2 DUMMY_10
DU3 DU11
DUMMY_3 DUMMY_11
DU4 DU12
DUMMY_4 DUMMY_12
DU5 DU13
DUMMY_5 DUMMY_13
DU6 DU14
DUMMY_6 DUMMY_14
DU7 DU15
DUMMY_7 DUMMY_15
DU8 DU16
DUMMY_8 DUMMY_16
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FLASH_EMMC 81
PLACE AT JACK SIDE 1.0Vpp 1608 sizs For EMI
0 R374
COMP1_Y COMP1_Y_SOC
+5V_NORMAL ZD302 C388 C344

R355 C384
27pF 27pF
5.48VTO5.76V 75 10pF
50V 50V
50V
C319 ZD303 OPT OPT 1%
1608 sizs For EMI R308
10uF 1.2K 5.48VTO5.76V
R314 16V OPT
R302 C311
PC_L_IN PC_L_IN_SOC 180
0 DSUB_VSYNC DSUB_VSYNC_SOC ARC HDMI_ARC 1608 sizs For EMI
R300 C329 R324 22 1uF 0 R373
C300 C314 R325 R303 COMP1_Pb COMP1_Pb_SOC
470K 5pF 82 10V R309
560pF 100pF 2K 100K
OPT 50V OPT
50V 50V C386 C342
OPT R354 C379
OPT OPT ZD304 27pF 27pF
5.48VTO5.76V 50V 50V 75 10pF
C320 OPT OPT 1% 50V
DSUB_HSYNC DSUB_HSYNC_SOC ZD305
1608 sizs For EMI 10uF C330 R323 22 R326 5.48VTO5.76V
R336 16V 5pF 2K
PC_R_IN PC_R_IN_SOC 50V OPT
0 OPT
1608 sizs For EMI
R301 C301 C315 0 R372
COMP1_Pr COMP1_Pr_SOC
470K 560pF 100pF
OPT 50V 50V
C385 C343 C378
OPT OPT ZD306 R353
27pF 27pF 75 10pF
5.48VTO5.76V 50V FOR EMI 50V 50V
OPT 1%
ZD307 OPT
5.48VTO5.76V
For TA model
IC105 IC105
LGE2112 LGE2112
CHANGE SYMBOL
AG3
AA32 AG35 AO3N
HDMI_CEC HDMI_0_RX_0 D0+_HDMI2_JACK AG4
AG34 AO3P
HDMI_0_RX_0B D0-_HDMI2_JACK AG1
AG33 AG37 AO4N
DDC_SCL_2_JACK HDMI_0_SCL HDMI_0_RX_1 D1+_HDMI2_JACK AG2
AE33 AG36 AO4P
HDMI_1_SCL HDMI_0_RX_1B D1-_HDMI2_JACK AF3
AC33 AF35 AOCLKN
HDMI_2_SCL HDMI_0_RX_2 D2+_HDMI2_JACK AF4
AH32 AF34 AOCLKP
DDC_SCL_4_JACK HDMI_3_SCL HDMI_0_RX_2B D2-_HDMI2_JACK AE3
AH35 AO2N
HDMI_0_RX_C CK+_HDMI2_JACK AE4
AF33 AH34 AO2P
DDC_SDA_2_JACK HDMI_0_SDA HDMI_0_RX_CB CK-_HDMI2_JACK AE1
AD33 AO1N
HDMI_1_SDA F27 AE2
AB33 AE37 MODEL_OPT_8 TCON0 AO1P
HDMI_2_SDA HDMI_1_RX_0 E27 AD1
AH33 AE36 MODEL_OPT_9 TCON1 AO0N
DDC_SDA_4_JACK HDMI_3_SDA HDMI_1_RX_0B F30 AD2
AD35 MODEL_OPT_10 TCON2 AO0P
HDMI_1_RX_1 F29
R304 1K AG31 AD34 TCON3
5V_HDMI_2_JACK HDMI_0_PWR5V HDMI_1_RX_1B B27 AL3
AE31 AC35 TCON4 AE4N
HDMI_1_PWR5V HDMI_1_RX_2 A27 AL4
AC31 AC34 TCON5 AE4P
HDMI_2_PWR5V HDMI_1_RX_2B B28 AL1
5V_HDMI_4_JACK R307 1K AH31 AE35 For TA model TCON6 AE3N
HDMI_3_PWR5V HDMI_1_RX_C A28 AL2
AE34 TCON7 AE3P
HDMI_1_RX_CB R391 0 C28 AK3
AG32 COMP1_DET TCON8 AECLKN
MTK_HPD_2 HDMI_0_HPD D28 AK4
AE32 AB35 EXT_SPK_VOL+ TCON9 AECLKP
HDMI_1_HPD HDMI_2_RX_0 E28 AJ3
AC32 AB34 MODEL_OPT_2 TCON10 AE2N
HDMI_2_HPD HDMI_2_RX_0B F28 AJ4
AJ32 AA35 PCM_5V_CTL TCON11 AE2P
+1.2V_MTK_AVDD MTK_HPD_4 HDMI_3_HPD HDMI_2_RX_1 B29 AJ1
AA34 EMMC_RST TCON12 AE1N
HDMI_2_RX_1B AJ2
AA24 AA37 AE1P
AVDD12_HDMI_0_RX HDMI_2_RX_2 +1.2V_MTK_AVDD AH3
C356 Y24 AA36 AE0N
AVDD12_HDMI_1_RX HDMI_2_RX_2B AH4
10uF W24 AC37 AE0P
10V AVDD12_HDMI_2_RX HDMI_2_RX_C AG6
AB24 AC36 AVDD12_LVDS_1
AVDD12_HDMI_3_RX HDMI_2_RX_CB AJ6 AT2
AVDD12_LVDS_2 BO4N TXA4N CI_ADDR[0-14]
C350 C354 VDD3V3 AF6 AU2
AB29 AK35 0.1uF 0.1uF AVDD12_VPLL BO4P TXA4P
AVDD33_HDMI_0_RX HDMI_3_RX_0 D0+_HDMI4_JACK AE6 AT1 CI_ADDR[0]
VDD3V3 AA29 AK34 AVDD33_LVDSB BO3N TXA3N TP312
AVDD33_HDMI_1_RX HDMI_3_RX_0B D0-_HDMI4_JACK AH7 AU1 CI_ADDR[1]
Y29 AJ35 C347 AVDD33_LVDSA BO3P TXA3P TP313
AVDD33_HDMI_2_RX HDMI_3_RX_1 D1+_HDMI4_JACK AR1 CI_ADDR[2]
AC29 AJ34 0.1uF BOCLKN TXACLKN TP314
AVDD33_HDMI_3_RX HDMI_3_RX_1B D1-_HDMI4_JACK AJ5 AR2 CI_ADDR[3]
AJ37 AVSS12_LVDS_2 BOCLKP TXACLKP TP315
HDMI_3_RX_2 D2+_HDMI4_JACK AG5 AP1 CI_ADDR[4]
C304 C307 AB30 AJ36 AVSS12_LVDS_1 BO2N TXA2N TP316
AVSS33_HDMI_RX_1 HDMI_3_RX_2B D2-_HDMI4_JACK AF5 AP2 CI_ADDR[5]
0.1uF 0.1uF AD30 AJ33 AVSS12_VPLL BO2P TXA2P TP317
AVSS33_HDMI_RX_2 HDMI_3_RX_C CK+_HDMI4_JACK AE5 AN1 CI_ADDR[6]
AF31 AK33 AVSS33_LVDSB BO1N TXA1N TP318
AVSS33_HDMI_RX_3 HDMI_3_RX_CB CK-_HDMI4_JACK AH5 AN2 CI_ADDR[7]
AF32 AVSS33_LVDSA BO1P TXA1P TP319
AVSS33_HDMI_RX_4 AM3 CI_ADDR[8]
BO0N TXA0N TP320
AG7 AM4 CI_ADDR[9]
C36 REXT_VPLL BO0P TXA0P TP321
USB_DP1 USB_DP_P0 CI_ADDR[10]
USB2 W/O HUB C37 R343 TP322
USB_DM1 USB_DM_P0 24K AT6 CI_ADDR[11]
BE4N TXB4N TP323
USB Port was changed !!!! 1% AU6 CI_ADDR[12]
D36 BE4P TXB4P TP324
USB_DP2 USB_DP_P1 AP6 CI_ADDR[13]
USB1 W/ HUB D37 BE3N TXB3N TP325
USB_DM2 USB_DM_P1 AR6 CI_ADDR[14]
BE3P TXB3P For PCB Pattern TP326
AP5
R380 0 WIFI AT13 BECLKN TXBCLKN HP_OUT HP_OUT
WIFI_DP USB_DP_P2 AR5 R351 1.2K R369 1.2K
R381 0 WIFI AU13 BECLKP TXBCLKP HP_ROUT_MAIN
WIFI_DM USB_DM_P2 AT4 R352 1.2K R370 1.2K
BE2N TXB2N HP_LOUT_MAIN
C391 C392 AU4
5pF AT14 BE2P TXB2P HP_OUT C377 C383 HP_OUT C390 C395
5pF USB_DP_P3 SC_R_IN_SOC AP4 1200pF 1200pF
50V VDD3V3 AU14 BE1N TXB1N 1200pF 1200pF
50V SC_L_IN_SOC HP_OUT
WIFI USB_DM_P3 AR4 HP_OUT HP_OUT HP_OUT
WIFI BE1P TXB1P
AP3
D35 BE0N TXB0N
AVDD33_USB_P0P1 AR3 SCART_ROUT_SOC
AP13 BE0P TXB0P
AVDD33_USB_P2P3 For PCB Pattern SCART_LOUT_SOC
C302 CI_DATA[0-7]
AU37 AN35
0.1uF D34 AIN0_R_AADC AR0_ADAC
AVSS33_USB_P1 AU35 AN34 EXT_SPK_ROUT_MAIN
AR13 AIN0_L_AADC AL0_ADAC
AVSS33_USB_P2 R311 30K AT35 CI_DATA[0]
PC_R_IN_SOC AIN1_R_AADC EXT_SPK_LOUT_MAIN TP338
R310 30K AT37 AM32 CI_DATA[1]
W35 AT18 PC_L_IN_SOC AIN1_L_AADC AR1_ADAC TP339
PCIE11_TXP TXVP_0 EPHY_TDP AU36 AM34 CI_DATA[2]
W34 AU18 AIN2_R_AADC AL1_ADAC TP340
+1.2V_MTK_AVDD PCIE11_TXN TXVN_0 EPHY_TDN AP34 CI_DATA[3]
Y34 AIN2_L_AADC TP341
PCIE11_RXN AT36 AM37 CI_DATA[4]
Y35 AU17 AIN3_R_AADC AR2_ADAC TP342
PCIE11_RXP RXVN_1 EPHY_RDN AR37 AM33 CI_DATA[5]
VDD3V3 C316 AT17 AIN3_L_AADC AL2_ADAC TP343
RXVP_1 EPHY_RDP AR33 CI_DATA[6]
0.1uF U24 AIN4_R_AADC TP344
AVDD12_PCIE11 AP32 AM36 R376 1.2K R378 1.2K CI_DATA[7]
V24 AN16 AIN4_L_AADC AR3_ADAC TP345
AVDD33_PCIE11 PHYLED1 AR36 AM35 R377 1.2K R379 1.2K
C308 AM16 AIN5_R_AADC AL3_ADAC
0.1uF PHYLED0 AP37 C398 C399 C3001
W30 AIN5_L_AADC C397 1200pF 1200pF
AVSS12_PCIE11 AR35 AG30 1200pF 1200pF
AD15 24K R315 AIN6_R_AADC AVDD33_DAC
REXT AP36 AF30
W36 +1.2V_MTK_AVDD AIN6_L_AADC AVDD33_DAC1
PCIE11_REFCKN DAC_3V3
W37 AD14
PCIE11_REFCKP AVDD12_REC VDD3V3 AK30
C321 VDD3V3_ETN AVSS33_DAC C365 C380
AE30
AD16 10uF AVSS33_DAC1 0.01uF 0.1uF
AVDD33_COM 10V AL31 SPDIF_OUT
AD17 TUNER_SIF C305 C362 AVDD33_AADC
AVDD33_LD 1uF AJ28 Y33 ARC
0.1uF AVSS33_AADC ALIN SC_ID_SOC TP354
25V AR16
AL16 C327 C328 Place Close To MTK5369(IC105) ASPDIF0 /CI_CD2 TP355
AVSS33_LD
AVSS33_COM
AL15
1uF 0.1uF AJ27
VMID_AADC ASPDIF1
Y32
AR11 R366 100
PLACE AT JACK SIDE /CI_CD1 TP356
AL14 AOBCK AUD_SCK /PCM_IORD TP357
AVSS12_REC C352 0.01uF AN28 AP11 R367 100
MPXP AOLRCK AUD_LRCK /PCM_IOWR TP358
C312 AM12 R368 100
AOMCLK AUD_MASTER_CLK
R339 C358 C363 AM10 R371 100 PCM_RST TP307
0.01uF 1uF AOSDATA4 AUD_LRCH /PCM_REG
2.2K AM11 TP308
33pF OPT 50V 25V AOSDATA3 C387 C389 C393 C396 L300
IF_T AN11 Don’t use as GPIO /PCM_CE1 TP309
AOSDATA2 22pF 22pF 22pF 33pF
R346 1K R334 51 DSUB_R+
IF_P AN10 OPT OPT OPT
AOSDATA1 OPT BLM15BD121SN1
C336 1uF AN9 /PCM_WE TP311
C333 R322
10V AOSDATA0 /PCM_OE
Close to Tuner C309 47pF 75 TP359
Close to MT5369 50V D301
0.1uF AU32 AN25 R360 0 ADLC 5S 02 015
IF_T OPT ADCINP_DEMOD HSYNC DSUB_HSYNC_SOC
R331 1K C337 1uF R335 51 AT32 AM25 R361 0 5.5V
IF_N ADCINN_DEMOD VSYNC DSUB_VSYNC_SOC
AR25 0.01uF C366 100 R356
10V VDD3V3 RP
C310 AD22 AR24 0.01uF C367 100 R357
AVDD33_DEMOD GP
IF_F IF_F +1.2V_MTK_AVDD C364 AU24 0.01uF C368 100 R358 L301 /PCM_WAIT TP364
0.1uF BP
R346-*1 0 R331-*1 0 AP24 0.01uF C369 100 R359 DSUB_G+
33pF COM SC_R_IN_SOC TP365
AL27 AT24 0.01uF C370 BLM15BD121SN1 SC_L_IN_SOC
AVDD12_DEMOD SOG C335 TP366
C353 AR22 R321 D300
10uF C351 VGA_SDA RGB_DDC_SDA 47pF 75 SC_CVBS_IN_SOC TP367
Place at JACK SIDE R332 10K
10V 0.1uF
R342 10K
AM28
AJ26
AVSS33_DEMOD
AVSS12_DEMOD
VGA_SCL
AP22
RGB_DDC_SCL
50V ADLC 5S 02 015
5.5V SC_COM_SOC TP368
SC_G_SOC TP369
IF_AGC AT26
COM1 SC_COM_SOC SC_R_SOC TP370
Close to Tuner 0.047uF AR26
C341 PB1P SC_G_SOC L304 SC_B_SOC TP371
0.047uF C355 AP26 DSUB_B+
PR1P SC_R_SOC SC_FB_SOC TP372
U35 AU26
IF_AGC Y1P SC_B_SOC BLM15BD121SN1 DTV/MNT_V_OUT_SOC
U34 AP25 C334 TP373
For PCB Pattern R320 D302
C l o s e t o M T 5 3 6 9TP300 RF_AGC SOY1 SC_FB_SOC 47pF SCART_ROUT_SOC TP374
AU28 0.01uF C371 100 R362 75 ADLC 5S 02 015
COM0 50V SCART_LOUT_SOC TP375
AP31 AT28 0.01uF C372 100 R363 5.5V
HP_OUT LOUTN PB0P
AN30 AR28 0.01uF C373 100 R364
L303 LOUTP PR0P PCM_5V_CTL TP377
BLM18PG121SN1D AP27 0.01uF C374 100 R365
Y0P COMP1_Pb_SOC
V35 AR27 1500pF C375 SC_DET TP378
HP_LOUT_AMP HP_LOUT OSCL2 OSCL2 SOY0 COMP1_Pr_SOC
V34
HP_OUT OSDA2 OSDA2 COMP1_Y_SOC
AU30
C332 VDACX_OUT
AP28 AP29
0.22uF
10V AR29
SC0 VDACY_OUT DTV/MNT_V_OUT_SOC For TA model
SC_CVBS_IN_SOC SY0 VDD3V3
AD20
AVDD33_VDAC_BG
AT30 AD21
For PCB Pattern CVBS3P AVDD33_VDAC
AR30
CVBS2P
R340 100 C359 0.047uF AR31 AD19
TU_CVBS CVBS1P AVDD12_RGB
AN29 +1.2V_MTK_AVDD
CVBS0P
C361 1uF AP30
HP_OUT CVBS_COM
L302 AJ22
BLM18PG121SN1D VDD3V3 AVSS33_VDAC_BG
AK24 AJ21
HP_ROUT_AMP HP_ROUT AVDD33_CVBS_1 AVSS12_RGB C382
AK25 AL24 0.1uF
HP_OUT AVDD33_CVBS_2 AVSS33_VDAC
C331
0.22uF AL25
10V AVSS33_CVBS_1
AM26
AVSS33_CVBS_2
Modify for TA model

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
base model : LY750H-ZA / EAX6574310
+3.3V_NORMAL VDD3V3 +1.2V_MTK_CORE 5600mA
60mA
L500
BLM18PG121SN1D
C524 C506 C505 C529 C532 C535

IC105 IC105
C500 C503 C510 C504 10uF 10uF 10uF 0.1uF 0.1uF 0.1uF LGE2112 LGE2112
10uF 10uF 0.1uF 2.2uF
+1.2V_MTK_CORE
+1.2V_MTK_CORE
AR7 AC22
VCCK_43 VCCK_31 R2 R6
AT7 AC23 DVSS_51 DVSS_55
VCCK_45 VCCK_32 R3 R20
AU7 AD24 DVSS_52 DVSS_62
VCCK_47 VCCK_36 J4 T20
AP8 P23 DVSS_37 DVSS_73
VCCK_42 VCCK_8 R4 U20
AR8 R24 DVSS_53 DVSS_83
+1.2V_MTK_CORE VCCK_44 VCCK_10 Y4 V20
AT8 T24 DVSS_107 DVSS_92
VCCK_46 VCCK_12 F5 W20
AU8 AC24 DVSS_20 DVSS_104
VCCK_48 VCCK_33 J5 Y20
AM7 AC21 DVSS_38 DVSS_117
VCCK_37 VCCK_30 R5 AA20
VDD3V3 C539 C543 C546 C548 C550 C552 C553 AN7 P20 DVSS_54 DVSS_127
AVDD_33SB VCCK_39 VCCK_7 Y5 AB20
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF AP7 AC20 DVSS_108 DVSS_137
VCCK_41 VCCK_29 W5 G16
L501 AM8 P19 DVSS_95 DVSS_29
VCCK_38 VCCK_6 L7 R21
BLM18PG121SN1D AN8 AC18 DVSS_44 DVSS_63
VCCK_40 VCCK_27 M7 T21
P14 P18 DVSS_46 DVSS_74
C509 C501 VCCK_1 VCCK_5 R7 U21
10uF R14 AC17 DVSS_56 DVSS_84
0.1uF VCCK_9 VCCK_26 AA5 V21
10V T14 P17 DVSS_120 DVSS_93
VCCK_11 VCCK_4 AB5 W21
U14 AD18 DVSS_130 DVSS_105
VCCK_13 VCCK_34 K7 Y21
V14 AD23 DVSS_43 DVSS_118
VCCK_14 VCCK_35 U7 AA21
W14 DVSS_77 DVSS_128
VCCK_16 VDD3V3 W7 AB21
Y14 DVSS_97 DVSS_138
VCCK_18 E9 R22
AA14 DVSS_13 DVSS_64
+1.2V_MTK_CORE +1.2V_MTK_AVDD VCCK_20 E8 T22
AB14 AL9 DVSS_12 DVSS_75
VCCK_22 VCC3IO_B_4 F9 U22
L502 AC14 AK10 DVSS_22 DVSS_85
VCCK_23 VCC3IO_B_2 G14 V22
BLM18PG121SN1D AC19 AK9 DVSS_28 DVSS_94
VDD3V3 VCCK_28 VCC3IO_B_1 J6 W22
VDD3V3_ETN P15 AK11 DVSS_39 DVSS_106
C525 VCCK_2 VCC3IO_B_3 R15 Y22
L507 AC15 H29 DVSS_57 DVSS_119
10uF VCCK_24 VCC3IO_A_5 T15 AA22
BLM18PG121SN1D P16 J29 DVSS_68 DVSS_129
VCCK_3 VCC3IO_A_7 U15 AB22
AC16 H30 DVSS_78 DVSS_139
VCCK_25 VCC3IO_A_6 V15 R23
V23 J30 DVSS_87 DVSS_65
VCCK_15 VCC3IO_A_8 W15 T23
W23 G31 DVSS_99 DVSS_76
VCCK_17 VCC3IO_A_3 Y15 U23
Y23 G32 DVSS_112 DVSS_86
VCCK_19 VCC3IO_A_4 AA15 AB23
AA23 F33 DVSS_122 DVSS_140
VCCK_21 VCC3IO_A_2 AB15 W6
E34 DVSS_132 DVSS_96
VCC3IO_A_1 H11 G17
DVSS_34 DVSS_30
R16 F25
DVSS_58 DVSS_27
T16 Y6
DVSS_69 DVSS_109
U16 E21
DVSS_79 DVSS_17
+5V_NORMAL DAC_3V3 V16 F21
DVSS_88 DVSS_25
W16 L8
IC501 DVSS_100 DVSS_45
Y16 T7
AP1117E33G-13 DVSS_113 DVSS_66
AA16 D11
DVSS_123 DVSS_7
AB16 E11
INADJ/GND DVSS_133 DVSS_14
R17 D12
DVSS_59 DVSS_8
OUT T17 E22
POWER_ON/OFF1 DVSS_70 DVSS_18
TP500 C526 U17 F22
10uF DVSS_80 DVSS_26
V17 G25
10V DVSS_89 DVSS_33
Y17 AB19
DVSS_114 DVSS_136
T18 AA19
DVSS_71 DVSS_126
V18 P22
DVSS_90 DVSS_49
Y18 W19
DVSS_115 DVSS_103
R500 T19 U19
1 DVSS_72 DVSS_82
V19 R19
DVSS_91 DVSS_61
Y19 Y7
DVSS_116 DVSS_110
C540 C544 W17 AB18
10uF 0.1uF DVSS_101 DVSS_135
AA17 AA18
10V 16V DVSS_124 DVSS_125
AB17 W18
DVSS_134 DVSS_102
R18 U18
DVSS_60 DVSS_81
AB6 AA7
DVSS_131 DVSS_121
H19 N22
DVSS_35 DVSS_47
H22 T8
DVSS_36 DVSS_67
J11 W8
DVSS_40 DVSS_98
J12 Y8
DVSS_41 DVSS_111
J22 E7
DVSS_42 DVSS_11
F8
DVSS_21
+3.3V_NORMAL 3.3V_EMMC +3.3V_NORMAL EMMC_VCCQ
L504 L506
BLM18PG121SN1D BLM18PG121SN1D
C512 C522
0.1uF 0.1uF
16V 16V
DECAP FOR SOC (HIDDEN - UCC) DECAP FOR SOC (BOTTOM)
+1.2V_MTK_CORE +1.2V_MTK_CORE
C514 C520 C527 C531 C537 C545

0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
+1.5V_DDR +1.5V_DDR
C508 C523 C533 C536 C547

0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
remove SCART jack for TA model
Modify for TA model

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Blank 11
DDR3 SDRAM
+1.5V_DDR
IC701 IC703
H5TQ2G63DFR-PBC H5TQ2G63DFR-PBC
A_RVREF2 C703 C701
+1.5V_DDR C750 C752 C754 C756 C758
A_RVREF4 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF 10uF
ARA[0-13] 10V
ARA[0-13]
+1.5V_DDR ARA[0] ARA[0] N3 M8
M8 N3 A0 VREFCA A_RVREF2
VREFCA A0 ARA[1] ARA[1] P7 C735
P7 A1 R720 0.1uF
A1 ARA[2] P3 A_RVREF3 1K
A_RVREF1 P3 ARA[2] 1%
A_RVREF1 C713 A2
A2 ARA[3] ARA[3] N2 H1
R706 0.1uF H1 N2 A3 VREFDQ
1K VREFDQ A3 ARA[4] P8
1% P8 ARA[4]
A4 1% R721
1% A4 ARA[5] ARA[5] P2 240
P2 A5 R716 1K C736
R710 240 A5 ARA[6] ARA[6] R8 L8 1% 0.1uF
L8 R8 A6 ZQ +1.5V_DDR
R707 ZQ A6 ARA[7] R2
1K C714 R2 ARA[7] +1.5V_DDR
1% +1.5V_DDR A7
0.1uF A7 ARA[8] ARA[8] T8
T8 A8
A8 ARA[9] ARA[9] R3 B2
B2 R3 A9 VDD_1 C704
VDD_1 A9 ARA[10] ARA[10] L7 D9 C745 C751 C753 C755 C757 C702
D9 L7 +1.5V_DDR 10uF
A10/AP VDD_2 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF
VDD_2 A10/AP ARA[11] ARA[11]R7 G7 10V
+1.5V_DDR G7 R7 A11 VDD_3
VDD_3 A11 ARA[12] ARA[12]N7 K2
K2 N7 A12/BC VDD_4
VDD_4 A12/BC ARA[13] T3 K8 A_RVREF3 C733
K8 T3 ARA[13]
A13 VDD_5 R718 0.1uF
A_RVREF4 VDD_5 A13 N1 1K
C715 N1 VDD_6 1%
R708 0.1uF VDD_6 M7 N9
1K N9 M7 NC_5 VDD_7
1% VDD_7 NC_5 R1
R1 VDD_8
VDD_8 M2 R9 R719
R9 M2 ARBA0 BA0 VDD_9 1K C734
VDD_9 BA0 ARBA0 N8 1%
R709 N8 ARBA1 0.1uF
1K C716 ARBA1 ARCLK1 BA1
BA1 M3
1% 0.1uF M3 ARBA2 BA2
BA2 ARBA2 ARCLK0 A1
A1 VDDQ_1
VDDQ_1 J7 A8
A8 J7 R714 CK VDDQ_2
VDDQ_2 CK R712 100 K7 C1
C1 K7 100 5% CK VDDQ_3
VDDQ_3 CK 5% K9 C9
C9 K9 ARCKE CKE VDDQ_4
VDDQ_4 CKE ARCKE D2
D2
VDDQ_5 /ARCLK0 /ARCLK1 L2
VDDQ_5
E9 IC105
E9 L2 /ARCS
VDDQ_6 CS /ARCS K1
CS VDDQ_6
F1 LGE2112
F1 K1 ARODT ODT VDDQ_7
VDDQ_7 ODT ARODT J3 H2
H2 J3 /ARRAS VDDQ_8 +1.5V_DDR
/ARRAS RAS
IC701-*1 IC701-*2 IC701-*3 VDDQ_8 RAS K3 H9
NT5CB128M16BP-DI K4B2G1646C-HCK0 K4B2G1646E-BCK0 H9 K3 /ARCAS CAS VDDQ_9
VDDQ_9 CAS /ARCAS L3 AC1 C19
L3 IC703-*1 IC703-*2 IC703-*3
/ARWE WE NT5CB128M16BP-DI DDRV_44 ARDQM0 ARDQM0
M8 N3 N3 M8 N3 M8 WE /ARWE J1 K4B2G1646C-HCK0 K4B2G1646E-BCK0 AC2 C21
VREFCA A0
P7 P7
A0 VREFCA
P7
A0 VREFCA J1 NC_1 DDRV_45 ARDQS0 ARDQS0
A1
P3 P3
A1
P3
A1 NC_1 T2 J9 A3 B21
H1
A2
N2 N2
A2
H1 N2
A2
H1
J9 T2 ARREST RESET NC_2
N3
A0 VREFCA
M8 N3 M8 N3
A0 VREFCA
M8
DDRV_1 ARDQS0 /ARDQS0 ARDQ[0-7]
VREFDQ A3
P8 P8
A3 VREFDQ
P8
A3 VREFDQ NC_2 RESET ARREST L1 P7
A1 P7
A0 VREFCA P7
A1 A4 C23
A4
P2 P2
A4
P2
A4 L1 NC_3
P3
A2 P3
A1
A2
P3
A2 DDRV_2 ARDQ0
L8
A5
R8 R8
A5
L8 R8
A5
L8 NC_3 L9 N2
A3 VREFDQ
H1 N2 H1 N2
A3 VREFDQ
H1
B4 B17
ZQ A6
R2 R2
A6 ZQ
R2
A6 ZQ L9 NC_4
P8
A4 P8
A3
A4
VREFDQ P8
A4 DDRV_5 ARDQ1
A7
T8 T8
A7
T8
A7 NC_4 F3 T7 P2
A5 P2 P2
A5 C4 D23
B2
A8
R3 R3
A8
B2 R3
A8
B2
T7 F3 ARDQS2 DQSL NC_6 ARA[14] R8
A6 ZQ
L8 R8
A5
L8 R8
A6 ZQ
L8
DDRV_8 ARDQ2
D9
VDD_1 A9
L7 L7
A9 VDD_1
D9 L7
A9 VDD_1
D9
ARA[14] NC_6 DQSL ARDQS0 G3 R2
A7 R2
A6 ZQ R2
A7 D4 C17
G7
VDD_2 A10/AP
R7 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7
G3 /ARDQS2 DQSL
T8
A8 T8
A7 T8
A8 DDRV_10 ARDQ3
K2
VDD_3 A11
N7 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 DQSL /ARDQS0 R3
A9 VDD_1
B2 R3
A8
A9 VDD_1
B2 R3
A9 VDD_1
B2
B3 D24
VDD_4 A12 A12/BC VDD_4 A12/BC VDD_4 L7 D9 L7 D9
K8
VDD_5 NC_6
T3 T3
A13 VDD_5
K8 T3 K8
R7
A10/AP VDD_2
G7
L7
A10/AP VDD_2
D9
A10/AP VDD_2 DDRV_4 ARDQ4
N1 N1 A13 VDD_5
N1 C7 A9 A11 VDD_3 R7 G7 R7
A11 VDD_3
G7
C3 C16
N9
VDD_6
M7 M7
VDD_6
N9 M7
VDD_6
N9
A9 C7 ARDQS3 DQSU VSS_1
N7
A12 VDD_4
K2 N7
A11 VDD_3
K2 N7
A12/BC VDD_4
K2
DDRV_7 ARDQ5
R1
VDD_7 NC_5 NC_5 VDD_7
R1 NC_5 VDD_7
R1 VSS_1 DQSU ARDQS1 B7 B3 T3
NC_6 VDD_5
K8 T3
A12/BC VDD_4
K8 T3
A13 VDD_5
K8
AC3 C24
R9
VDD_8
M2 M2
VDD_8
R9 M2
VDD_8
R9
B3 B7 /ARDQS3 DQSU VSS_2 VDD_6
N1 A13 VDD_5
N1
VDD_6
N1
DDRV_46 ARDQ6
VDD_9 BA0
N8 N8
BA0 VDD_9
N8
BA0 VDD_9 VSS_2 DQSU /ARDQS1 E1 M7
NC_5 VDD_7
N9 M7
VDD_6
N9 M7
NC_5 VDD_7
N9
AC4 D15
BA1
M3 M3
BA1
M3
BA1 E1 VSS_3 VDD_8
R1 NC_5 VDD_7
VDD_8
R1
VDD_8
R1
DDRV_47 ARDQ7
A1
BA2 BA2
A1 BA2
A1 VSS_3 E7 G8 M2
BA0 VDD_9
R9 M2 R9 M2
BA0 VDD_9
R9
A8
VDDQ_1
J7 J7
VDDQ_1
A8 J7
VDDQ_1
A8
G8 E7 ARDQM2 DML VSS_4
N8
BA1 N8
BA0 VDD_9 N8
BA1
C1
VDDQ_2 CK
K7 K7
CK VDDQ_2
C1 K7
CK VDDQ_2
C1 VSS_4 DML ARDQM0 D3 J2 M3
BA2 M3
BA1 M3
BA2 G10 D21
C9
VDDQ_3 CK
K9 K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9
J2 D3 ARDQM3 DMU VSS_5 VDDQ_1
A1 BA2
A1
VDDQ_1
A1
TP700 MEMTP ARDQM1 ARDQM1
D2
VDDQ_4 CKE CKE VDDQ_4
D2 CKE VDDQ_4
D2 VSS_5 DMU ARDQM1 J8 J7
CK VDDQ_2
A8 J7
VDDQ_1
A8 J7
CK VDDQ_2
A8
G9 B20
E9
VDDQ_5
L2 L2
VDDQ_5
E9 VDDQ_5 J8 ARDQ[16-23] VSS_6
K7 C1 K7
CK VDDQ_2
C1 K7 C1
TP701 MEMTN ARDQS1 ARDQS1
F1
VDDQ_6 CS
K1 K1
CS VDDQ_6
F1
L2
CS VDDQ_6
E9
VSS_6 ARDQ[0-7] ARDQ[16] E3 M1 K9
CK
CKE
VDDQ_3
VDDQ_4
C9 K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9
RVREF_A RVREF_B C20
VDDQ_7 ODT ODT VDDQ_7
K1
ODT VDDQ_7
F1
M1 E3 DQL0 VSS_7
D2 CKE VDDQ_4 CKE VDDQ_4
D2
/ARDQS1 ARDQ[8-15]
H2 J3 J3 H2 J3 H2
ARDQ[17] VDDQ_5 VDDQ_5
D2
VDDQ_5 ARDQS1
H9
VDDQ_8 RAS
K3 K3
RAS VDDQ_8
H9 K3
RAS VDDQ_8
H9 VSS_7 DQL0 F7 M9 L2
CS VDDQ_6
E9 L2 E9 L2
CS VDDQ_6
E9
G13 A17
VDDQ_9 CAS
L3 L3
CAS VDDQ_9 CAS VDDQ_9 M9 F7 DQL1 VSS_8
K1
ODT VDDQ_7
F1 K1
CS VDDQ_6
F1 K1 F1
RVREF_B ARDQ8
J1
WE WE
J1
L3
WE
J1 VSS_8 DQL1 ARDQ[18] F2 P1 J3
RAS VDDQ_8
H2 J3
ODT VDDQ_7
H2 J3
ODT
RAS
VDDQ_7
VDDQ_8
H2
G21 A23
J9
NC_1
T2 T2
NC_1
J9 NC_1 P1 F2 DQL2 VSS_9
K3
CAS VDDQ_9
H9 K3
RAS VDDQ_8
H9 K3 H9
RVREF_A ARDQ9
L1
NC_2 RESET RESET NC_2
L1
T2
RESET NC_2
J9
L1 VSS_9 DQL2 ARDQ[19] F8 P9 L3
WE L3
CAS VDDQ_9 L3
CAS
WE
VDDQ_9
D17
L9
NC_3 NC_3
L9 NC_3 P9 F8 DQL3 VSS_10 NC_1
J1 WE
J1 J1
ARDQ10
T7
NC_4
F3 F3
NC_4
T7 F3
NC_4
L9
T7 VSS_10 DQL3 ARDQ[20] H3 T1 T2
RESET NC_2
J9 T2
NC_1
J9 T2
RESET
NC_1
NC_2
J9
B23
NC_7 DQSL
G3 G3
DQSL NC_6 DQSL NC_6 T1 H3 DQL4 VSS_11 NC_3
L1 RESET NC_2
L1 L1
ARDQ11
DQSL DQSL
G3
DQSL VSS_11 DQL4 ARDQ[21] H8 T9 NC_4
L9 NC_3
L9
NC_3
NC_4
L9
F10 D20
A9 C7 C7 A9 T9 H8 DQL5 VSS_12
F3
DQSL NC_7
T7 F3
NC_4
T7 F3 T7
ARCKE ARCKE ARDQ12
B3
VSS_1 DQSU
B7 B7
DQSU VSS_1
B3
C7
B7
DQSU VSS_1
A9
B3 VSS_12 DQL5 ARDQ[22] G2 G3
DQSL G3
DQSL NC_6 G3
DQSL
DQSL
NC_6
D22
E1
VSS_2 DQSU DQSU VSS_2
E1 DQSU VSS_2 G2 DQL6
DQSL
ARDQ13
G8
VSS_3
E7 E7
VSS_3
G8 E7
VSS_3
E1
G8 DQL6 ARDQ[23] H7 C7
DQSU VSS_1
A9 C7 A9 C7
DQSU VSS_1
A9
D9 D19
J2
VSS_4 DML
D3 D3
DML VSS_4
J2 D3
DML VSS_4
J2
H7 DQL7
B7
DQSU VSS_2
B3 B7
DQSU
DQSU
VSS_1
VSS_2
B3 B7
DQSU VSS_2
B3
ARCLK1 ARCLK1 ARDQ14
J8
VSS_5 DMU DMU VSS_5
J8 DMU VSS_5 DQL7 B1 VSS_3
E1 E1 E1
C9 C22
VSS_6 VSS_6 VSS_6
J8
B1 ARDQ[24-31] VSSQ_1
E7 G8 E7
VSS_3
G8 E7
VSS_3
G8
/ARCLK1 ARCLK1 ARDQ15
M1
VSS_7 DQL0
E3 E3
DQL0 VSS_7
M1 E3 M1
VSSQ_1 ARDQ[8-15] ARDQ[24] D3
DML VSS_4
J2 DML VSS_4 DML VSS_4
M9 F7 F7 M9 F7
DQL0 VSS_7
M9 D7 B9 DMU VSS_5 D3 J2 D3
DMU VSS_5
J2
P1
VSS_8 DQL1
F2 F2
DQL1 VSS_8
P1 DQL1 VSS_8 B9 D7 DQU0 VSSQ_2 VSS_6
J8 DMU VSS_5
J8 J8
P9
VSS_9 DQL2
F8 F8
DQL2 VSS_9
P9
F2
F8
DQL2 VSS_9
P1
P9 VSSQ_2 DQU0 ARDQ[25] C3 D1 E3
DQL0 VSS_7
M1 E3
VSS_6
M1 E3
DQL0
VSS_6
VSS_7
M1
A20 A7
T1
VSS_10 DQL3
H3 H3
DQL3 VSS_10
T1 DQL3 VSS_10 D1 C3 DQU1 VSSQ_3
F7
DQL1 VSS_8
M9 F7
DQL0 VSS_7
M9 F7 M9
ARCLK0 ARCLK0 ARDQM2 ARDQM2
T9
VSS_11 DQL4
H8 H8
DQL4 VSS_11
T9
H3
H8
DQL4 VSS_11
T1
T9 VSSQ_3 DQU1 ARDQ[26] C8 D8 F2
DQL2 VSS_9
P1 F2
DQL1 VSS_8
P1 F2
DQL1
DQL2
VSS_8
VSS_9
P1
A21 B9
VSS_12 DQL5
G2 G2
DQL5 VSS_12 DQL5 VSS_12 D8 C8 DQU2 VSSQ_4
F8
DQL3 VSS_10
P9 F8
DQL2 VSS_9
P9 F8 P9
/ARCLK0 ARCLK0 ARDQS2 ARDQS2
DQL6
H7 H7
DQL6
G2
H7
DQL6 VSSQ_4 DQU2 ARDQ[27] C2 E2 H3
DQL4 VSS_11
T1 H3
DQL3 VSS_10
T1 H3
DQL3
DQL4
VSS_10
VSS_11
T1
A9
B1
DQL7 DQL7
B1 DQL7 E2 C2 DQU3 VSSQ_5
H8
DQL5 VSS_12
T9 H8
DQL4 VSS_11
T9 H8 T9
ARDQS2 /ARDQS2
B9
VSSQ_1
D7 D7
VSSQ_1
B9 D7
VSSQ_1
B1
B9 VSSQ_5 DQU3 ARDQ[28] A7 E8 G2
DQL6 G2
DQL5 VSS_12 G2
DQL5
DQL6
VSS_12
E18 C12 ARDQ[16-23]
D1
VSSQ_2 DQU0
C3 C3
DQU0 VSSQ_2
D1 DQU0 VSSQ_2 E8 A7 DQU4 VSSQ_6
H7
DQL7 H7
DQL6 H7
ARODT ARODT ARDQ16
D8
VSSQ_3 DQU1
C8 C8
DQU1 VSSQ_3
D8
C3
C8
DQU1 VSSQ_3
D1
D8 VSSQ_6 DQU4 ARDQ[29] A2 F9 VSSQ_1
B1 DQL7
B1
DQL7
VSSQ_1
B1 +1.5V_DDR F17 D6
E2
VSSQ_4 DQU2
C2 C2
DQU2 VSSQ_4
E2 DQU2 VSSQ_4 F9 A2 DQU5 VSSQ_7
D7
DQU0 VSSQ_2
B9 D7
VSSQ_1
B9 D7 B9
/ARRAS ARRAS ARDQ17
E8
VSSQ_5 DQU3
A7 A7
DQU3 VSSQ_5
E8
C2
A7
DQU3 VSSQ_5
E2
E8 VSSQ_7 DQU5 ARDQ[30] B8 G1 C3
DQU1 VSSQ_3
D1 C3
DQU0 VSSQ_2
D1 C3
DQU0
DQU1
VSSQ_2
VSSQ_3
D1
E17 B12
F9
VSSQ_6 DQU4
A2 A2
DQU4 VSSQ_6
F9 DQU4 VSSQ_6 G1 B8 DQU6 VSSQ_8
C8
DQU2 VSSQ_4
D8 C8
DQU1 VSSQ_3
D8 C8 D8
/ARCAS ARCAS ARDQ18
G1
VSSQ_7 DQU5
B8 B8
DQU5 VSSQ_7
G1
A2
B8
DQU5 VSSQ_7
F9
G1 VSSQ_8 DQU6 ARDQ[31] A3 G9 C2
DQU3 VSSQ_5
E2 C2
DQU2 VSSQ_4
E2 C2
DQU2
DQU3
VSSQ_4
VSSQ_5
E2
E16 C5
G9
VSSQ_8 DQU6
A3 A3
DQU6 VSSQ_8
G9 A3
DQU6 VSSQ_8
G9
G9 A3 DQU7 VSSQ_9
A7
DQU4 VSSQ_6
E8 A7
DQU3 VSSQ_5
VSSQ_6
E8 A7
DQU4 VSSQ_6
E8 RVREF_A C746 /ARCS ARCS ARDQ19
DQU4
VSSQ_9 DQU7 DQU7 VSSQ_9 DQU7 VSSQ_9 VSSQ_9 DQU7 A2
DQU5 VSSQ_7
F9 A2 F9 A2
DQU5 VSSQ_7
F9
R730 D14 C13
B8
DQU6 VSSQ_8
G1 B8
DQU5
DQU6
VSSQ_7
VSSQ_8
G1 B8
DQU6 VSSQ_8
G1
1K 0.1uF /ARWE ARWE ARDQ20
A3 G9 A3 G9
DQU7 VSSQ_9 A3
DQU7 VSSQ_9
G9
DQU7 VSSQ_9 1% A5
ARDQ21
DDR_NANYA DDR_SS SS_27NM B14 A12
ARREST ARRESET ARDQ22
B5
DDR_HYNIX DDR_HYNIX DDR_NANYA DDR_SS SS_27NM
R731 C760 ARDQ23
1K C747 A13
1% 1uF ARBA0 ARBA0
0.1uF G11 E10
10V ARBA1 ARBA1 ARDQM3 ARDQM3
D16 C8
ARBA2 ARBA2 ARDQS3 ARDQS3
D8 ARDQ[24-31]
ARDQS3 /ARDQS3
F18 C6
+1.5V_DDR ARCSX ARDQ24
D10
ARA[14]C15 ARDQ25
D7
ARA[13] ARA14 ARDQ26
A15 C11
RVREF_B C748 ARA13 ARDQ27
ARA[12]F13 C7
R732 0.1uF
1K ARA[11]C14 ARA12 ARDQ28
1% C10
ARA[10]F11 ARA11 ARDQ29
B7
ARA[9] E15 ARA10 ARDQ30
B10
R733 C761 ARA[8] D13 ARA9 ARDQ31
1K C749 AVDD3V3_MEMPLL
1% 0.1uF 1uF ARA[7] B15 ARA8
+1.5V_DDR 10V ARA7
ARA[6] E14 N14 +3.3V_NORMAL
ARA[5] F16 ARA6 AVDD33_MEMPLL AVDD3V3_MEMPLL
N15
ARA[4] E13 ARA5 AVSS33_MEMPLL L700
C718 C720 C722 C724 C726 C728 C705 C707 ARA[3] B13 ARA4 BLM18PG121SN1D
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF 10uF ARA3
10V ARA[2] A14 R1
ARA[1] F14 ARA2 DVSS_50 C700 C759
P21 0.1uF 10uF
ARA[0] F15 ARA1 DVSS_48
10V
ARA0
ARA[0-14]
+1.5V_DDR
C717 C719 C721 C723 C725 C727 C706 C708

1uF 10uF
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
10V IC105
LGE2112
RVREF_C
RVREF_D
P13 G2
RVREF_C BRDQM0 BRDQM0
V7 E4
RVREF_D BRDQS0 BRDQS0
E3
BRDQS0 /BRDQS0 BRDQ[0-7]
F4 A1
BRCLK0 BRCLK0 BRDQ0
F3 J1
/BRCLK0 BRCLK0 BRDQ1
B2
BRDQ2
V4 J2
BRCLK1 BRCLK1 BRDQ3
V3 C2
/BRCLK1 BRCLK1 BRDQ4
K1
BRDQ5
P6 A2
BRCKE BRCKE BRDQ6
+1.5V_DDR K2
IC702 H6
BRDQ7
H5TQ2G63DFR-PBC IC704 BRODT BRODT
H4 D1
+1.5V_DDR RVREF_C /BRRAS BRDQM1
B_RVREF6
H5TQ2G63DFR-PBC B_RVREF8 R726
C741
H5
BRRAS BRDQM1
F1
1K 0.1uF /BRCAS BRCAS BRDQS1 BRDQS1
+1.5V_DDR BRA[0-13] 1% K3 F2
/BRCS BRCS BRDQS1 /BRDQS1 BRDQ[8-15]
M8 N3 BRA[0] BRA[0-13] J3
VREFCA B_RVREF7 C739
A0 BRA[0] N3 BRDQ8
P7 BRA[1] M8 R724 N1 B1
A1 A0 VREFCA 1K 0.1uF
B_RVREF5 C709 B_RVREF5 BRA[2] BRA[1] P7 R727 BRBA0 BRBA0 BRDQ9
P3 B_RVREF7 1% C762 P5 H3
R702 0.1uF A2 A1 1K C742
1K H1 N2 BRA[3] BRA[2] P3 1% 1uF BRBA1 BRBA1 BRDQ10
1% 0.1uF K4 D3
VREFDQ A3 A2 10V BRBA2 BRBA2 BRDQ11
P8 BRA[4] BRA[3] N2 H1
VREFDQ R725 G3
A4 A3 BRDQ12
1% P2 BRA[5] BRA[4] P8 1K C740
1% L4 C1
A5 A4 1% 0.1uF /BRWE BRWE BRDQ13
R703 R711 240 L8 R8 BRA[6] BRA[5] P2 240 BRA[0-14]
1K C710 G4
ZQ A6 A5 R717 BRDQ14
1% 0.1uF R2 BRA[7] BRA[6] R8 L8 +1.5V_DDR BRA[14]
+1.5V_DDR ZQ L5 D2
A7 A6 BRA14 BRDQ15
T8 BRA[8] BRA[7] R2 BRA[13]
A7 +1.5V_DDR M4
A8 BRA[8] T8 BRA13
B2 R3 BRA[9] BRA[12] N5 Y1
VDD_1 A9 A8 +1.5V_DDR RVREF_D BRA12 BRDQM2 BRDQM2
D9 L7 BRA[10] BRA[9] R3 B2 C743 BRA[11] BRDQ[16-23]
VDD_1 R728 M5 V2
+1.5V_DDR VDD_2 A10/AP A9 0.1uF BRA11 BRDQS2 BRDQS2
G7 R7 BRA[11] BRA[10]L7 D9 1K BRA[10]
A10/AP VDD_2 1% P4 V1
VDD_3 A11 BRA[11]R7 BRA10 BRDQS2 /BRDQS2
K2 N7 BRA[12] G7 BRA[9] M3 T4
VDD_4 A12/BC A11 VDD_3 B_RVREF8 C737
K8 T3 BRA[13] BRA[12]N7 K2 BRA[8] BRA9 BRDQ16
B_RVREF6 R722 0.1uF L6 AB4
C711 VDD_5 A13 A12/BC VDD_4 1K BRA8 BRDQ17
R704 N1 BRA[13]T3 K8 1% R729 C763 BRA[7]
1K 0.1uF VDD_5 1K C744 L3 P2
VDD_6 A13 BRA7 BRDQ18
1% N9 M7 N1 1% 0.1uF 1uF BRA[6]
VDD_6 N4 AB3
VDD_7 NC_5 10V BRA6 BRDQ19
R1 M7 N9 BRA[5] K5 P3
VDD_8 NC_5 VDD_7 R723 BRA5 BRDQ20
R9 M2 R1 1K C738 BRA[4] N6 AB1
R705 VDD_9 BA0 BRBA0 VDD_8 1% BRA4 BRDQ21
1K C712 N8 M2 R9 0.1uF BRA[3]
1% BRBA1 BRBA0 VDD_9 N2 P1
0.1uF BA1 BA0 BRA3 BRDQ22
M3 N8 BRA[2] M1 AB2
BA2 BRBA2 BRCLK0 BRBA1 BA1 BRA2 BRDQ23
A1 M3 BRA[1] N3
VDDQ_1 BRCLK1 BRBA2 BA2 BRA1
A8 J7 A1 BRA[0] K6 U1
VDDQ_2 CK R713 VDDQ_1 BRA0 BRDQM3 BRDQM3
C1 K7 100 J7 A8 W3
VDDQ_3 CK 5% R715 CK VDDQ_2 BRDQS3
C9 K9 100 K7 C1 BRDQS3
BRCKE 5% VDDQ_3 +1.5V_DDR G5 W4 BRDQ[24-31]
VDDQ_4 CKE CK BRCSX BRDQS3 /BRDQS3
D2 K9 C9 AA3
VDDQ_5 /BRCLK0 BRCKE CKE VDDQ_4 BRDQ24
E9 L2 D2 D5 U4
VDDQ_6 CS /BRCS /BRCLK1 VDDQ_5 DDRV_11 BRDQ25
F1 K1 L2 E9 E5 AA4
VDDQ_7 ODT BRODT /BRCS CS VDDQ_6 DDRV_13 BRDQ26
H2 J3 K1 F1 T5 T3
VDDQ_8 RAS /BRRAS BRODT ODT VDDQ_7 DDRV_38 BRDQ27
H9 K3 J3 H2 V5 Y3
VDDQ_9 CAS /BRCAS /BRRAS RAS VDDQ_8 DDRV_42 BRDQ28
IC702-*1 L3 K3 H9 U5 U3
NT5CB128M16BP-DI IC702-*2 IC702-*3 WE /BRWE /BRCAS CAS VDDQ_9 DDRV_40 BRDQ29
K4B2G1646C-HCK0 K4B2G1646E-BCK0 J1 L3 IC704-*1 IC704-*2 IC704-*3 E6 Y2
NC_1 /BRWE WE NT5CB128M16BP-DI K4B2G1646C-HCK0 K4B2G1646E-BCK0 DDRV_14 BRDQ30
M8 N3 J9 T2 J1 F6 U2
VREFCA A0
P7 N3 M8 N3
A0 VREFCA
M8
NC_2 RESET BRREST NC_1 DDRV_18 BRDQ31 +1.5V_DDR
A1
P3 P7
A0 VREFCA P7
A1
L1 T2 J9 N3 M8 N3 M8 N3 M8 G6
H1
A2
N2 P3
A1 P3
A2 NC_3 BRREST RESET NC_2 P7
A0 VREFCA
P7
A0 VREFCA
P7
A0 VREFCA
DDRV_23
VREFDQ A3
P8 N2
A2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 L9 L1 P3
A1
P3
A1
P3
A1
U6 M2
A4
P2 P8 P8
A4 NC_4 NC_3 N2
A2
H1 N2
A2
H1 N2
A2
H1 DDRV_41 BRRESET BRREST
L8
A5
R8 P2
A4
A5
P2
A5
T7 F3 L9 P8
A3 VREFDQ
P8
A3 VREFDQ
P8
A3 VREFDQ
T6
ZQ A6
R2 R8 L8 R8
A6 ZQ
L8 BRA[14] NC_6 DQSL BRDQS0 NC_4 P2
A4
P2
A4
P2
A4
DDRV_39
A7
T8 R2
A6 ZQ R2
A7 G3 F3 T7 R8
A5
L8 R8
A5
L8 R8
A5
L8 AC5 E23
B2
A8
R3 T8
A7 T8
A8 DQSL /BRDQS0 BRDQS2 DQSL NC_6 BRA[14] R2
A6 ZQ
R2
A6 ZQ
R2
A6 ZQ
DDRV_48 DDRV_16
D9
VDD_1 A9
L7 R3
A8
B2 R3
A9 VDD_1
B2 G3 T8
A7
T8
A7
T8
A7
F7 F24
G7
VDD_2 A10/AP
R7 L7
A9
A10/AP
VDD_1
VDD_2
D9 L7
A10/AP VDD_2
D9 /BRDQS2 DQSL R3
A8
B2 R3
A8
B2 R3
A8
B2 DDRV_19 DDRV_22
K2
VDD_3 A11
N7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 A9 C7 L7
A9 VDD_1
D9 L7
A9 VDD_1
D9 L7
A9 VDD_1
D9 G7 G24
K8
VDD_4 A12
T3 N7 K2 N7
A12/BC VDD_4
K2
VSS_1 DQSU BRDQS1 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7 DDRV_24 DDRV_29
N1
VDD_5 NC_6
T3
A12/BC VDD_4
K8 T3
A13 VDD_5
K8 B3 B7 C7 A9 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 AC6 F23
N9
VDD_6
M7
A13 VDD_5
N1
VDD_6
N1
VSS_2 DQSU /BRDQS1 BRDQS3 DQSU VSS_1 T3
A12 VDD_4
K8 T3
A12/BC VDD_4
K8 T3
A12/BC VDD_4
K8 DDRV_49 DDRV_21
R1
VDD_7 NC_5
M7
VDD_6
N9 M7
NC_5 VDD_7
N9 E1 B7 B3 NC_6 VDD_5
N1 A13 VDD_5
N1 A13 VDD_5
N1 N7 G23
R9
VDD_8
M2
NC_5 VDD_7
R1
VDD_8
R1
VSS_3 /BRDQS3 DQSU VSS_2 M7
VDD_6
N9 M7
VDD_6
N9 M7
VDD_6
N9 DDRV_36 DDRV_28
VDD_9 BA0
N8 M2
VDD_8
VDD_9
R9 M2
BA0 VDD_9
R9 G8 E7 E1 NC_5 VDD_7
R1 NC_5 VDD_7
R1 NC_5 VDD_7
R1 P7 E24
BA0
BA1
M3 N8 N8
BA1 VSS_4 DML BRDQM0 VSS_3 M2
VDD_8
R9 M2
VDD_8
R9 M2
VDD_8
R9 DDRV_37 DDRV_17
A1
BA2
M3
BA1 M3
BA2
J2 D3 E7 G8 N8
BA0 VDD_9
N8
BA0 VDD_9
N8
BA0 VDD_9
V6 E12
A8
VDDQ_1
J7
BA2
A1
VDDQ_1
A1
VSS_5 DMU BRDQM1 BRDQM2 DML VSS_4 M3
BA1
M3
BA1
M3
BA1
DDRV_43 DVSS_15
C1
VDDQ_2 CK
K7 J7
VDDQ_1
A8 J7 A8 J8 D3 J2 BA2
A1 BA2
A1 BA2
J10 F12
C9
VDDQ_3 CK
K9 K7
CK VDDQ_2
C1 K7
CK VDDQ_2
C1
VSS_6 BRDQ[0-7] BRDQM3 DMU VSS_5 VDDQ_1 VDDQ_1 VDDQ_1
A1
VDDQ_4 CKE CK VDDQ_3
C9 K9
CK VDDQ_3
C9 M1 E3 J8
J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 DDRV_35 DVSS_23
D2
VDDQ_5
K9
CKE VDDQ_4 CKE VDDQ_4 BRDQ[16-23] VSS_6
K7 C1 K7 C1 K7 C1 H10 A18
E9 L2 D2
VDDQ_5
D2
VSS_7 DQL0 BRDQ[16] K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9 DDRV_32 DVSS_1
F1
VDDQ_6 CS
K1 L2
VDDQ_5
VDDQ_6
E9 L2
CS VDDQ_6
E9 M9 F7 E3 M1 CKE VDDQ_4
D2 CKE VDDQ_4
D2 CKE VDDQ_4
D2 H13 B18
VDDQ_7 ODT CS
H2 J3 K1 F1 K1
ODT VDDQ_7
F1
VSS_8 DQL1 BRDQ[17] DQL0 VSS_7 L2
VDDQ_5
E9 L2
VDDQ_5
E9 L2
VDDQ_5
E9 DDRV_33 DVSS_3
H9
VDDQ_8 RAS
K3 J3
ODT VDDQ_7
VDDQ_8
H2 J3
RAS VDDQ_8
H2 P1 F2 F7 M9 K1
CS VDDQ_6
F1 K1
CS VDDQ_6
F1 K1
CS VDDQ_6
F1 E20 C18
VDDQ_9 CAS RAS
L3 K3 H9 K3
CAS VDDQ_9
H9
VSS_9 DQL2 BRDQ[18] DQL1 VSS_8 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 DDRV_15 DVSS_5
J1
WE
L3
CAS VDDQ_9 L3
WE
P9 F8 F2 P1 K3
RAS VDDQ_8
H9 K3
RAS VDDQ_8
H9 K3
RAS VDDQ_8
H9 F20 D18
NC_1 WE
J9 T2 J1
NC_1
J1
VSS_10 DQL3 BRDQ[19] DQL2 VSS_9 L3
CAS VDDQ_9
L3
CAS VDDQ_9
L3
CAS VDDQ_9
DDRV_20 DVSS_9
L1
NC_2 RESET
T2
NC_1
NC_2
J9 T2
RESET NC_2
J9 T1 H3 F8 P9 WE
J1 WE
J1 WE
J1 G20 E19
NC_3 RESET
L9 L1
NC_3
L1
VSS_11 DQL4 BRDQ[20] DQL3 VSS_10 T2
NC_1
J9 T2
NC_1
J9 T2
NC_1
J9 DDRV_27 DVSS_16
T7
NC_4
F3
NC_3
NC_4
L9
NC_4
L9 T9 H8 H3 T1 RESET NC_2
L1 RESET NC_2
L1 RESET NC_2
L1 G15 F19
NC_7 DQSL
G3 F3 T7 F3
DQSL NC_6
T7
VSS_12 DQL5 BRDQ[21] DQL4 VSS_11 NC_3
L9 NC_3
L9 NC_3
L9 DDRV_25 DVSS_24
DQSL
G3
DQSL NC_6 G3
DQSL
G2 H8 T9 F3
NC_4
T7 F3
NC_4
T7 F3
NC_4
T7 G18 G19
DQSL
A9 C7 DQL6 BRDQ[22] DQL5 VSS_12 G3
DQSL NC_7
G3
DQSL NC_6
G3
DQSL NC_6
DDRV_26 DVSS_31
B3
VSS_1 DQSU
B7 C7
DQSU VSS_1
A9 C7
DQSU VSS_1
A9 H7 G2 DQSL DQSL DQSL
D25 G22
VSS_2 DQSU
E1 B7 B3 B7
DQSU VSS_2
B3
DQL7 BRDQ[23] DQL6 C7 A9 C7 A9 C7 A9 DDRV_12 DVSS_32
G8
VSS_3
E7
DQSU VSS_2
VSS_3
E1
VSS_3
E1 B1 BRDQ[8-15] H7 B7
DQSU VSS_1
B3 B7
DQSU VSS_1
B3 B7
DQSU VSS_1
B3 C25 E25
VSS_4 DML
J2 D3 E7 G8 E7
DML VSS_4
G8
VSSQ_1 DQL7 DQSU VSS_2
E1 DQSU VSS_2
E1 DQSU VSS_2
E1 DDRV_9 DVSS_19
J8
VSS_5 DMU
D3
DML VSS_4
VSS_5
J2 D3
DMU VSS_5
J2 B9 D7 BRDQ[24-31] B1 E7
VSS_3
G8 E7
VSS_3
G8 E7
VSS_3
G8 B25 A26
VSS_6 DMU
M1 E3 J8
VSS_6
J8
VSSQ_2 DQU0 BRDQ[24] VSSQ_1 D3
DML VSS_4
J2 D3
DML VSS_4
J2 D3
DML VSS_4
J2 DDRV_6 DVSS_2
M9
VSS_7 DQL0
F7 E3
VSS_6
VSS_7
M1 E3
DQL0 VSS_7
M1 D1 C3 D7 B9 DMU VSS_5
J8 DMU VSS_5
J8 DMU VSS_5
J8 A25 B26
VSS_8 DQL1 DQL0
P1 F2 F7 M9 F7
DQL1 VSS_8
M9
VSSQ_3 DQU1 BRDQ[25] DQU0 VSSQ_2 E3
VSS_6
M1 E3
VSS_6
M1 E3
VSS_6
M1 DDRV_3 DVSS_4
P9
VSS_9 DQL2
F8 F2
DQL1 VSS_8
VSS_9
P1 F2
DQL2 VSS_9
P1 D8 C8 C3 D1 F7
DQL0 VSS_7
M9 F7
DQL0 VSS_7
M9 F7
DQL0 VSS_7
M9 H7 C26
VSS_10 DQL3 DQL2
T1 H3 F8 P9 F8
DQL3 VSS_10
P9
VSSQ_4 DQU2 BRDQ[26] DQU1 VSSQ_3 F2
DQL1 VSS_8
P1 F2
DQL1 VSS_8
P1 F2
DQL1 VSS_8
P1 DDRV_30 DVSS_6
T9
VSS_11 DQL4
H8 H3
DQL3 VSS_10
VSS_11
T1 H3
DQL4 VSS_11
T1 E2 C2 C8 D8 F8
DQL2 VSS_9
P9 F8
DQL2 VSS_9
P9 F8
DQL2 VSS_9
P9 H8 D26
VSS_12 DQL5 DQL4
G2 H8 T9 H8
DQL5 VSS_12
T9
VSSQ_5 DQU3 BRDQ[27] DQU2 VSSQ_4 H3
DQL3 VSS_10
T1 H3
DQL3 VSS_10
T1 H3
DQL3 VSS_10
T1 DDRV_31 DVSS_10
DQL6
H7 G2
DQL5 VSS_12 G2
DQL6
E8 A7 C2 E2 H8
DQL4 VSS_11
T9 H8
DQL4 VSS_11
T9 H8
DQL4 VSS_11
T9 J8
DQL7 DQL6
B1 H7 H7
DQL7 VSSQ_6 DQU4 BRDQ[28] DQU3 VSSQ_5 G2
DQL5 VSS_12
G2
DQL5 VSS_12
G2
DQL5 VSS_12
DDRV_34
B9
VSSQ_1
D7
DQL7
VSSQ_1
B1
VSSQ_1
B1 F9 A2 A7 E8 H7
DQL6
H7
DQL6
H7
DQL6
VSSQ_2 DQU0
D1 C3 D7 B9 D7
DQU0 VSSQ_2
B9
VSSQ_7 DQU5 BRDQ[29] DQU4 VSSQ_6 DQL7
B1 DQL7
B1 DQL7
B1
D8
VSSQ_3 DQU1
C8 C3
DQU0 VSSQ_2
VSSQ_3
D1 C3
DQU1 VSSQ_3
D1 G1 B8 A2 F9 D7
VSSQ_1
B9 D7
VSSQ_1
B9 D7
VSSQ_1
B9
VSSQ_4 DQU2 DQU1
E2 C2 C8 D8 C8
DQU2 VSSQ_4
D8
VSSQ_8 DQU6 BRDQ[30] DQU5 VSSQ_7 C3
DQU0 VSSQ_2
D1 C3
DQU0 VSSQ_2
D1 C3
DQU0 VSSQ_2
D1
E8
VSSQ_5 DQU3
A7 C2
DQU2 VSSQ_4
VSSQ_5
E2 C2
DQU3 VSSQ_5
E2 G9 A3 B8 G1 C8
DQU1 VSSQ_3
D8 C8
DQU1 VSSQ_3
D8 C8
DQU1 VSSQ_3
D8
VSSQ_6 DQU4 DQU3
F9 A2 A7 E8 A7
DQU4 VSSQ_6
E8
VSSQ_9 DQU7 BRDQ[31] DQU6 VSSQ_8 C2
DQU2 VSSQ_4
E2 C2
DQU2 VSSQ_4
E2 C2
DQU2 VSSQ_4
E2
G1
VSSQ_7 DQU5
B8 A2
DQU4 VSSQ_6
VSSQ_7
F9 A2
DQU5 VSSQ_7
F9 A3 G9 A7
DQU3 VSSQ_5
E8 A7
DQU3 VSSQ_5
E8 A7
DQU3 VSSQ_5
E8
VSSQ_8 DQU6 DQU5
G9
VSSQ_9 DQU7
A3 B8
DQU6 VSSQ_8
G1 B8
DQU6 VSSQ_8
G1 DQU7 VSSQ_9 A2
DQU4 VSSQ_6
F9 A2
DQU4 VSSQ_6
F9 A2
DQU4 VSSQ_6
F9
A3 G9 A3 G9 DQU5 VSSQ_7 DQU5 VSSQ_7 DQU5 VSSQ_7
DQU7 VSSQ_9 B8 G1 B8 G1 B8 G1
DQU7 VSSQ_9 DQU6 VSSQ_8 DQU6 VSSQ_8
A3 G9 G9 DQU6 VSSQ_8
A3 A3 G9
DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9
DDR_NANYA DDR_SS SS_27NM DDR_HYNIX

DDR_HYNIX DDR_NANYA DDR_SS SS_27NM
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR 12
CI TS INPUT
Close to MT5369
MT5369_TS_OUT[0-7] AR902 CI_MDI[0-7] CI DETECT +5V_CI_ON
47
MT5369_TS_OUT[0] CI_SLOT CI_MDI[0]
CI_A_DATA[0-7] CI_DATA[0-7]
MT5369_TS_OUT[1] CI_MDI[1]
+3.3V_NORMAL
MT5369_TS_OUT[2] CI_MDI[2] R929 R930
10K R933 R934 R935 R936 CI_A_DATA[0] CI_DATA[0]
MT5369_TS_OUT[3] CI_MDI[3] 47K 10K AR904 0CI_SLOT
10K 10K 10K
CI_SLOT CI_SLOT CI_A_DATA[1] CI_DATA[1]
CI_SLOTCI_SLOTCI_SLOT
CI_SLOT
R910 R914 CI_A_DATA[2] CI_DATA[2]
MT5369_TS_OUT[4] CI_SLOT CI_MDI[4] 10K 10K CI_A_DATA[3] CI_DATA[3]
MT5369_TS_OUT[5] CI_MDI[5] CI_SLOT CI_SLOT /PCM_WAIT
CI_A_DATA[4] AR905 0CI_SLOT CI_DATA[4]
MT5369_TS_OUT[6] CI_MDI[6] PCM_INPACK CI_A_DATA[5] CI_DATA[5]
MT5369_TS_OUT[7] CI_MDI[7]
/CI_CD1 CI_A_DATA[6] CI_DATA[6]
CI_VS1
AR903 CI_A_DATA[7] CI_DATA[7]
47 /CI_CD2
/PCM_REG
R907 /PCM_CE2
CI_SLOT
47 +3.3V_NORMAL
MT5369_MISTRT CI_IN_TS_SYNC
R908 CI_SLOT
47 CI_IN_TS_VAL /PCM_IRQA
MT5369_MIVAL_ERR
MT5369_MCLKI R909 CI_SLOT
47
CI_IN_TS_CLK
R906 R913 R918 R919 R923 R924
10K 47K 47K 47K 10K
C902 10K
Close to MT5369 12pF CI_SLOT CI_SLOT CI_SLOT CI_SLOT CI_SLOT
CI_SLOT
50V PCM_RST
CI_SLOT
Close to CI Slot R900 22 R931 CI_A_ADDR[0-14]
CI_VS1 CI_ADDR[0-14]
10K CI_A_VS1
CI_SLOT CI_SLOT
CI_A_ADDR[0] AR906 0CI_SLOT CI_ADDR[0]
R932 22 CI_A_ADDR[1] CI_ADDR[1]
/PCM_IORD /PCM_A_REG /PCM_REG
CI TS OUTPUT CI_A_ADDR[2] CI_ADDR[2]
CI_SLOT
/PCM_IOWR CI_A_ADDR[3] CI_ADDR[3]
/PCM_OE CI_A_ADDR[4] AR907 0CI_SLOT CI_ADDR[4]
MT5369_TS_IN[0-7] Close to CI Slot CI_TS_DATA[0-7] CI_A_ADDR[5] CI_ADDR[5]
/PCM_WE
MT5369_TS_IN[0] AR900 47
CI_SLOT CI_TS_DATA[0] CI_A_ADDR[6] CI_ADDR[6]
MT5369_TS_IN[1] /PCM_CE1 CI_A_ADDR[7] CI_ADDR[7]
CI_TS_DATA[1]
MT5369_TS_IN[2] CI_A_ADDR[8] AR908 0CI_SLOT CI_ADDR[8]
CI_TS_DATA[2]
MT5369_TS_IN[3] CI_A_ADDR[9] CI_ADDR[9]
CI_TS_DATA[3]
CI_A_ADDR[10] CI_ADDR[10]
MT5369_TS_IN[4] AR901 CI_SLOT CI_TS_DATA[4]
47 CI_A_ADDR[11] CI_ADDR[11]
MT5369_TS_IN[5] CI_TS_DATA[5] CI_A_ADDR[12]AR909 0CI_SLOT CI_ADDR[12]
MT5369_TS_IN[6] CI_TS_DATA[6] CI_A_ADDR[13] CI_ADDR[13]
MT5369_TS_IN[7] CI_A_ADDR[14] CI_ADDR[14]
CI_TS_DATA[7]
Close to CI Slot
R915 CI_SLOT
47
MT5369_TS_CLK CI_TS_CLK
R916 CI_SLOT
47
MT5369_TS_VAL CI_TS_VAL
R917 CI_SLOT
47
MT5369_TS_SYNC CI_TS_SYNC
C900
12pF
50V
Close to MT5369 CI_SLOT
CI POWER ENABLE CONTROL

+5V_CI_ON
CI_SLOT +5V_CI_ON
+5V_NORMAL
Q901
PMV48XP
S
C904 C905 CI_A_DATA[0-7]

C908 R950 0.1uF 10uF
0.1uF 10K 10V
G CI_SLOT JK900
16V C909 CI_SLOT CI_SLOT
CI_SLOT CI_SLOTR948 C910 10067972-000LF
22K 4.7uF 1uF
R946 10V 25V
CI_SLOT 35 1 CI_SLOT
10K CI_SLOT
R927 100 36 2 CI_A_DATA[3]
CI_SLOT /CI_CD1 /PCM_CE1
CI_SLOT 37 3 CI_A_DATA[4]
CI_TS_DATA[3]
R949 38 4 CI_A_DATA[5]
CI_TS_DATA[4]
2.2K CI_A_DATA[6]
CI_TS_DATA[5] 39 5
C 40 6 CI_A_DATA[7]
CI_TS_DATA[6]
R947 CI_SLOTR939 22
4.7K CI_TS_DATA[7] 41 7
B Q902 R911 22
PCM_5V_CTL 42 8
MMBT3904(NXP) /PCM_IORD R912 /PCM_CE2 CI_A_ADDR[10]
CI_SLOT 22
R945 CI_SLOT /PCM_IOWR CI_VS1 43 9
E CI_SLOT
10K 44 10 CI_A_ADDR[11]
CI_SLOT CI_SLOT CI_MDI[0-7] 45 11 CI_A_ADDR[9]
46 12 CI_A_ADDR[8]
CI_MDI[0] 47 13 CI_A_ADDR[13] R941 22
CI_MDI[1] 48 14 CI_A_ADDR[14] /PCM_OE
CI_MDI[2] R942 22
49 15
/PCM_WE
CI_MDI[3] 50 16 R940 22
CI_SLOT CI_SLOT
/PCM_IRQA
51 17 C906 0.1uF CI_SLOT C907 CI_SLOT
R926 R938 CI_SLOT 0.1uF
0CI_SLOT 52 18 0CI_SLOT 16V
CI_MDI[4] 53 19
CI_MDI[5] 54 20
CI_MDI[6] 55 21 CI_A_ADDR[12]
CI_MDI[7] 56 22 CI_A_ADDR[7]
CI_TS_CLK 57 23 CI_A_ADDR[6]
R921 CI_SLOT
22 58 24
PCM_RST CI_A_ADDR[5]
R922 CI_SLOT
22 59 25
/PCM_WAIT CI_A_ADDR[4]
R920 CI_SLOT
22 60 26
PCM_INPACK CI_A_ADDR[3]
61 27 CI_A_ADDR[2]
/PCM_A_REG
CI_TS_VAL 62 28 CI_A_ADDR[1]
CI_TS_SYNC 63 29 CI_A_ADDR[0]
64 30 CI_A_DATA[0]
CI_TS_DATA[0]
65 31 CI_A_DATA[1] +5V_CI_ON
CI_TS_DATA[1]
66 32 CI_A_DATA[2]
CI_TS_DATA[2] CI_SLOT
R928 100 67 33 R937 10K
/CI_CD2
68 34 CI_SLOT
R925 0CI_SLOT G2 69 G1
CI_IN_TS_VAL
CI_IN_TS_CLK
CI_IN_TS_SYNC
Modify for TA model

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. CI_SLOT 13
EDID
R3343 22
HDMI_HPD_2_JACK MTK_HPD_2
R3377 22
HDMI_HPD_4_JACK MTK_HPD_4
HDMI1(Rear)
IR_OUT Support
5V_HDMI_4_JACK
+3.3V_NORMAL
R3310
VA3300 1K R3321 R3312
ESD_HDMI 4.7K 4.7K 5V_HDMI_2_JACK +5V_NORMAL
SHIELD
HDMI_EXT_EDID NON_HDMI_EXT_EDID
C 5V_HDMI_4_JACK +5V_NORMAL
20 ESD_HDMI R3311
VA3301 R3307 B 1K
100K HDMI_HPD_4_JACK
A1
A2
19
HPD Q3301 R3372 IC3305
E MMBD6100
MMBT3904(NXP) 10K
A1
A2
18 M24C02-RMN6T D3301
+5V_POWER OPT IC3304 MMBD6100
C
17 M24C02-RMN6T D3303
DDC/CEC_GND R3308 100
C
DDC_SDA_4_JACK E0 VCC
16 1 8
SDA R3309 100
DDC_SCL_4_JACK E0 VCC C3301
15 1 8 R3380 0.1uF
SCL E1 WC 22 16V
IR_OUT_HDMI1 C3303 2 7 EDID_WP2 R3324 R3326
14 R3347 0.1uF 47K 47K
NC E1 WC 22 16V HDMI_EXT_EDID
ESD_HDMI
ESD_HDMI
CEC_REMOTE 2 7 R3338 R3340 HDMI_EXT_EDID R3378

VA3304
13 EDID_WP1
VA3303
47K 47K E2 SCL 22

CEC HDMI_EXT_EDID 3 6
R3319 DDC_SCL_2_JACK
12 HDMI_EXT_EDID HDMI_EXT_EDID
E2 SCL 22
CLK- D3305 3 6 R3379
DDC_SCL_4_JACK VSS SDA 22
11 RCLAMP0524PA HDMI_EXT_EDID 4 5
CLK_SHIELD Diode_OLD R3320 DDC_SDA_2_JACK
1 10 VSS SDA 22 HDMI_EXT_EDID
10 CK-_HDMI4_JACK 4 5
HDMI_EXT_EDID
CLK+ 2 9 DDC_SDA_4_JACK
CK+_HDMI4_JACK HDMI_EXT_EDID
HDMI_EXT_EDID
9 3 8
DATA0-
R3393
4 7
8
22K
D0-_HDMI4_JACK
R3392
DATA0_SHIELD 5 6
D0+_HDMI4_JACK
22K
7 EDID_WP2
DATA0+
C
6 EDID_WP1
DATA1- D3306 C B R3394 10K
Q3309
5 RCLAMP0524PA MMBT3904(NXP) EDID_WP_MTK
DATA1_SHIELD Diode_OLD Q3308 B R3389 10K HDMI_EXT_EDID
EDID_WP_MTK HDMI_EXT_EDID R3398
1 10 MMBT3904(NXP) E
4 D1-_HDMI4_JACK HDMI_EXT_EDID 100K
DATA1+ 2 9 HDMI_EXT_EDID R3391
D1+_HDMI4_JACK HDMI_EXT_EDID
E 100K
3 3 8
DATA2- HDMI_EXT_EDID
4 7
2 D2-_HDMI4_JACK
DATA2_SHIELD 5 6
D2+_HDMI4_JACK
1
DATA2+
D3305-*1 D3306-*1
IP4294CZ10-TBR IP4294CZ10-TBR
Diode_NEW Diode_NEW
YKF45-7058V 1 10 1 10
JK3301 2 9 2 9
3 8 3 8
4 7 4 7
5 6 5 6
HDMI2(Side) For CEC

5V_HDMI_2_JACK ARC Support
+3.3V_NORMAL
+3.5V_ST
VA3305 R3316
1K R3322 R3318
ESD_HDMI 4.7K 4.7K
GND NON_HDMI_EXT_EDID
HDMI_EXT_EDID
C
20 ESD_HDMI R3317
B 1K R3302 R3303
HP_DET VA3306 R3313
100K HDMI_HPD_2_JACK 27K 120K
R3374
G
19
5V Q3302 10K D3304
E MMBT3904(NXP)
18 OPT BAT54_SUZHO
GND From HDMI Connector CEC_REMOTE HDMI_CEC To NEC
S
17
DDC_DATA R3314 100 Q3300
DDC_SDA_2_JACK RUE003N02
16
DDC_CLK R3315 100 HDMI_CEC_FET_ROHM
G
15 DDC_SCL_2_JACK
NC Q3300-*1
14 HDMI_ARC SI1012CR-T1-GE3
CE_REMOTE HDMI_CEC_FET_VISHAY
ESD_HDMI
S
ESD_HDMI
CEC_REMOTE
VA3308
VA3307
13
CK-
12
CK_GND D3308
11 RCLAMP0524PA
CK+ Diode_OLD
1 10
10 CK-_HDMI2_JACK
D0- 2 9
CK+_HDMI2_JACK
9 3 8
D0_GND
4 7
8 D0-_HDMI2_JACK
D0+ 5 6
D0+_HDMI2_JACK
7
D1-
6
D1_GND D3307
5 RCLAMP0524PA
D1+ Doide_OLD
1 10
4 D1-_HDMI2_JACK
D2- 2 9
D1+_HDMI2_JACK
3 3 8
D2_GND
4 7
2 D2-_HDMI2_JACK
D2+ 5 6
D2+_HDMI2_JACK
1
D3307-*1 D3308-*1
IP4294CZ10-TBR IP4294CZ10-TBR
51U019S-312HFN-E-R-B-LG Diode_NEW Diode_NEW
1 10 1 10
JK3302 2 9 2 9
3 8 3 8
4 7 4 7
5 6 5 6
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 33
IR & KEY
+3.5V_ST
R4117 R4118
10K 10K
1% 1%
R4113
100
KEY1 NON_EYE_Q_8P
P4101
R4114 12507WR-08L
100
KEY2
C4100 C4102 D4101
0.1uF 0.1uF D4100 GND
5.6V 5.6V 1
OPT OPT
KEY1
2
KEY2
+3.5V_ST 3
L4100
BLM18PG121SN1D
+3.5V_ST
4
C4104
1000pF GND
50V 5
R4125 10K LOGO/LED_R

LED_R 6
R4100 22 +3.5V_ST
IR IR
7
R4107 D4104
3.3K 5.6V GND
8
R4137
100 9
+3.5V_ST 9
I2C_SCL2
EYE_Q_10P
C4107
+3.5V_ST 100pF R4138
50V 100
I2C_SDA2 10
R4130 EYE_Q_10P
4.7K
R4103 11
R4129 47K
22 P4102
IR_OUT_RS232C 12507WR-10L
R4104 D4106 EYE_Q_10P
R4145 D4105
C 10K C 47K OPT
Q4102 OPT
B B
2SC3052 E E
Q4101
2SC3052
+3.5V_ST
R4142
4.7K
R4141
22
IR_OUT_HDMI1
R4148
C 10K
Q4107 B
2SC3052 E
R4143
30K C
IR_OUT_CTRL B Q4108
E 2SC3052
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR/KEY 41
WIFI(Netcast 4.0 WIFI Module)
+3.5V_ST_WIFI +3.5V_ST_WIFI
MAX 0.4A +3.5V_ST
Q4301
L4301 PMV48XP
BLM18PG121SN1D
USB1
D
P4301
C4301 C4302 C4304 +3.3V_NORMAL
12507WR-06L C4303 0.1uF
10uF 10uF 0.1uF G
16V
(HUB)
R4302
10V 10V 16V C4311
10K
C4310 0.1uF
ZD4300
1 4.7uF 16V
5V
10V OPT R4311
R4312
For EMI 10K
OPT
10K
OPT
2 WIFI_DM NON_CRUISE
IC4306
3 WIFI_DP TPS2554 [EP]
+5V_USB
ZD4301 ZD4302
R4303
1.8K
4 ADLC 5S 02 015 ADLC 5S 02 015 GND FAULT
WIFI_ESD 1 10
WIFI_ESD
THERMAL
R4301
11
5 WOL/WIFI_POWER_ON IN_1 OUT_2
2 9
22 C
R4304
10K B Q4302 NON_CRUISE
6 WIFI_EN IN_2 OUT_1 C4340
MMBT3904(NXP) 3 8
10uF
E +5V_CRUISE
7 C4312 10V
ILIM_SEL ILIM0
USB DOWN STREAM

4.7uF 4 7 CRUISE
10V /USB_OCD2 L4306
OPT BLM18PG121SN1D
EN ILIM1
USB_CTL2 5 6
NON_CRUISE
3AU04S-305-ZC-(LG)
1/10W
R4314
1/10W
R4313
JK4304
27K
27K
OPT
NON_CRUISE
1
2
USB_DM2
(Support WOWL)
3
USB_DP2
RCLAMP0502BA
USB_DIODE
D4304
4
5
To SOC
USB POWER(+24V->P_12V->+5V_USB)
USB2 +3.3V_NORMAL
P_12V R4327
10K R4323
OPT 10K
OPT L4305
R4332 BLM18PG121SN1D IC4305 IC4303
[EP]PGND TPS54425PWPR +5V_USB
100K TPS2554 [EP]
OPT Switching noise reducing [MPS recommend] +5V_USB

C4335 0.1uF VIN2 VO
14 1 GND FAULT
50V 1 10
THERMAL
OPT
THERMAL
IC4307 R4333 R4331
15
+24V VIN1 VFB 22K
11
MP4460DQ-LF-Z EP_GND 22 IN_1 OUT_2
C4324 13 2 2 9
close to pin 10uF 1%
OPT SW_1 BST 16V R2
1 10 VBST VREG5 IN_2 OUT_1
12 3 3 8 C4323
THERMAL
D4305
C4327 10uF
OPT
4A
11
MBRA340T3G SW_2 VIN_2

2 9 1uF
OPT SW2 SS 10V 10V
ILIM_SEL ILIM0
USB DOWN STREAM

C4337 C4338 C4326 11 4 4 7
EN VIN_1 3.3uF 0.1uF /USB_OCD1
3 8
OPT
0.1uF R1
OPT 50V 50V 50V R4330 C4332
R4336 SW1 GND EN ILIM1
OPT COMP FREQ 200K 10 5 +3.5V_ST 120K 22pF
4 $0.21 7 R4328 C4329 USB_CTL1 5 6
P_12V 1% 50V
R4334 C4336 1/8W 100K 3300pF 3AU04S-305-ZC-(LG)
1/10W
R4300
1/10W
R4341
R4344
18K 150pF FB GND 1% PGND2 PG 50V

10K
9 6 JK4303
27K
5 6
27K
OPT
OPT 50V OPT OPT L4304
R4335 R4338 R4339 CB3216PA501E
1
270K 10K PGND1 EN R4329 10K
150K 8 7
OPT 1/16W 1/16W C4328 POWER_ON/OFF2_4
OPT 0.1uF +5V_USB
OPT 1% 1%
2
OPT USB_DM1
L4308
L4303 OPT OPT 2uH
C4339 R4337
22UH
3
22uF C4341 20K USB_DP1
RCLAMP0502BA
25V 0.1uF 1/16W
USB_DIODE
50V 1% C4333 C4334
D4303
22uF 22uF
4
10V 10V
5
To SOC
Vout=(0.763+0.0017*Vout.set)*(1+R1/R2)=4.98V
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB/WIFI 43
remove SCART jack for TA model
Add component jack & AUDIO IN
COMPONENT 1 PHONE JACK AUDIO IN (PC / COMPONENT)

JK3604
PEJ027-04
3 E_SPRING
JK3802
PEJ029-02
6A T_TERMINAL1
8 G_SPRING
7A B_TERMINAL1
E_SPRING PC_R_IN
3 COMP1_Pr
4 R_SPRING Diode_OLD
4 R_SPRING D3624 for EMI_Cap
COMP1_Pb
T_SPRING 5.6V D3624-*1
5
T_SPRING 18pF
5 COMP1_Y 50V
7B B_TERMINAL2
7 B_TERMINAL
6B T_TERMINAL2
6 T_TERMINAL
+3.3V_NORMAL PC_L_IN
Diode_OLD
Close to the jack for EMI_Cap
D3625
D3811 C3805 D3625-*1
5.6V
5.6V 18pF 18pF
R3806 OPT 50V 50V
10K ESD_MTK
COMP1_DET
D3810
5.6V
OPT
Modify for TA model

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Component/audio in 46
HEADPHONE AMP
R6102-*1
36K
R6103-*1 IC6100 HP_36K
36K TPA6138A2
HP_36K R6102-*2
R6103-*2 43K
43K +INR +INL HP_43K
C6104 1 14 C6109
HP_43K 180pF 180pF
C6100 C6101
1uF R6100 R6106 R6104 R6101 1uF
10V 10K 43K -INR -INL 43K 10K 10V
HP_ROUT_MAIN 2 13
HP_LOUT_MAIN
1% C6108 C6106 1%
R6103 R6102
33K 10pF OUTR OUTL 10pF 33K
50V 3 12 50V
HP_ROUT_AMP HP_LOUT_AMP
GND_1 UVP +3.3V_NORMAL
+3.3V_NORMAL 4 11
MUTE GND_2
R6105 5 10 L6100
4.7K 120-ohm
SIDE_HP_MUTE VSS VDD BLM18PG121SN1D
6 9
CN CP C6105
C6102 7 8 C6107
1uF 0.1uF
1uF 10V 16V
10V
C6103
1uF
10V

Copyright
ESSENTIAL THAT © 2014
ONLY LG Electronics
MANUFACTURES Inc. All PARTS
SPECIFIED rights BE
reserved.
USED FOR LGE Internal Use Only
H/P_AMP 61
Only for COMPONENTS
THE CRITICAL training and service
IN THE purposes
SYMBOL MARK OF THE SCHEMETIC.
H/NIM for Commercial (EU)
TU6500
TDSS-G101D(B)
NC
1
RESET
2
SCL
3
SDA
4
+3.3V C6501
5 OPT 18pF
R6500
SIF 50V +5V_TU
6 C6500 33
I2C_SCL6 +5V_TU
OPT
+1.8V 18pF R6501
7 50V R6503
I2C_SDA6 470 R6504
CVBS 33 R6508 R6510 2012 perallel
8 82
IF_AGC
close to TUNER E
TUNER_SIF 220 220 because of derating
9
DIF[P] TU_CVBS
10 C6505
B E
DIF[N] 0.1uF 16V Q6500 Max 240mA
11 C
R6502 MMBT3906(NXP)
4.7K B Q6501
B1 A1 MMBT3906(NXP) +3.3V_TU
B1 A1 R6507 C +1.8V_TU
1K
IC6501
12 OPT
AZ1117BH-1.8TRE1
SHIELD
+3.3V_TU IN 3 2 OUT
OPT 1
R6511
100K ADJ/GND
+3.3V_TU C6511 /TU_RESET C6524 C6523
0.1uF 0.1uF 10uF
16V
16V 10V
C6509 C6510
100pF 0.1uF
50V 16V
R6506
100
close to Tuner 1. should be guarded by ground

100
C6507 R6505
IF_AGC 2. No via on both of them
0.1uF
3. Signal Width >= 12mils
16V Signal to Signal Width = 12mils
Ground Width >= 24mils
should be guarded by groumd
IF_N
IF_P
L6503
+1.8V_TU
BLM18PG121SN1D
C6525 C6526 C6527
100pF 0.1uF 0.1uF
50V 16V 16V
close to Tuner‘
150mA(MAX)
260mA(MAX)
+3.3V_NORMAL +3.3V_TU
+5V_NORMAL +5V_TU
L6501
BLM18PG121SN1D
L6502
BLM18PG121SN1D
C6518 C6519
0.1uF 22uF C6520 C6521
22uF 0.1uF
C6513 C6515 16V 10V 16V
C6517 10V
0.1uF 22uF 0.1uF
16V 10V 16V
Close to the tuner

Close to the tuner
ESSENTIAL THAT
Copyright ONLYLG
© 2014 MANUFACTURES SPECIFIED
Electronics Inc. PARTS
All rights BE USED FOR
reserved. LGE Internal Use Only
THE CRITICAL
Only COMPONENTS
for training IN THE
and service SYMBOL MARK OF THE SCHEMETIC.
purposes TUNER 65
REAL TIME CLOCK(RTC)
+3.5V_ST
RTC P8701
IC8702 12507WS-06L
M41T83RMY6F
NC_1 NC_4 1
1 18 R8709 R8710
4.7K 4.7K
NF_1 NV_4 MICOM_RESET 2
2 17
+3.5V_ST 3
NF_2 NF_3 TOOL0
3 16
MICOM_RESET
NC_2 VCC 4
4 15
RTC
C8703
+3.5V_ST RST IRQ2 0.1uF 5
TOOL1
5 14 16V +3.5V_ST
FLMD0
DU NC_3 FLMD0 6
6 13
R8783
47K 7
SQW IRQ1/FT/OUT
7 12 Closed to Crystal R8798 SW8700
RTC 1K JTP-1127WEM
R8706
C8711
C8710
2 1
13pF
13pF
1K VBAT SCL C8715
8 11 CLOCK_SCL
1
RTC 2.2uF
10V 4 3
BA8700 VSS SDA
BATTERY 9 10 CLOCK_SDA
X8701
10MHz
2
+3.5V_ST
LAN2_LINK
100
R8793
MODEL1_OPT_0
MODEL1_OPT_2
TOOL0
TOOL1
R8784
MODEL1_OPT_1
R8786 LAN1_LINK
1M 22
100
R8792
P46/INTP1/TI05/TO05
+3.5V_ST C8712
0.1uF R8785
P120/INTP0/EXLVI
C8713 100K
0.1uF
P122/X2/EXCLK
P42/TI04/TO04
4.7K
R8717 RTC4.7K
10K
10K
P40/TOOL0
P41/TOOL1
P43/SCK01
P47/INTP2
P123/XT1
P124/XT2
P45/SO01
P44/SI01
RTC
P121/X1
EVDD0
FLMD0
RESET
EVSS0
REGC
CLOCK_SCL
VDD
R8716
VSS
R8714
R8715
CLOCK_SDA
RTC
MICOM MODEL OPTION
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
RTC 22
R87014 P60/SCL0 P140/PCLBUZ0/INTP6
CLOCK_SCL 1 80
REMOVE clock option R87015 22 P61/SDA0 2 79 P141/PCLBUZ1/INTP7
CLOCK_SDA
P62 3 78 P142/SCK20/SCL20
+3.5V_ST POWER_ON/OFF2_3
P63
4 77 P143/SI20/RXD2/SDA20 R8772 22
POWER_ON/OFF2_4 NEC_DBG_RXD
P31/TI03/TO03/INTP45 76 P144/SO20/TXD2 R8771 22
HDMI_CEC NEC_DBG_TXD
P64/RD 6 75 P145/TI07/TO07
10K
ETHERNET_MDC
10K
10K
10K
NON_CLOCK
P65/WR0 7 74 P00/TI00
ETHERNET_MDIO
OPT
P66/WR1 P01/TO00
OPT
OPT
5V_ON/OFF 8 73 EXT_SPK_MUTE
R87013 22 P67/ASTB 9 72 P02/SO10/TXD1
NEC_WOL WOL/WIFI_POWER_ON
R8736
R8780
R8779
R8735
CLOCK_DET P77/EX23/KR7/INTP11 10 P03/SI10/RXD1/SDA10

71
MODEL1_OPT_0 MAGIC_WOL
P76/EX22/KR6/INTP10 11 IC8700 70 P04/SCK10/SCL10
NEC_EEPROM_SDA
NEC_EEPROM_SCL
P75/EX21/KR5/INTP9 12 69 P131/TI06/TO06
MODEL1_OPT_1 ETNHUB_ENDEFER EXT_SPK_DET
P74/EX20/KR4/INTP8 13 68 P130 R8764 22
MODEL1_OPT_2 IR MAIN_AMP_MUTE
10K
10K
10K
P73/EX19/KR3 14 67 P20/ANI0
LED_R
CLOCK
P72/EX18/KR2 P21/ANI1
OPT
OPT
UART_SW3 15 66
P71/EX17/KR1 16 65 P22/ANI2
UART_SW2
R8781
R8782
R8701
P70/EX16/KR0 17 64 P23/ANI3
RL_ON
R8746 22 P06/WAIT 18 63 P24/ANI4
CLOCK_DET
POWER_ON/OFF2_2
P05/CLKOUT
EVSS1
19
20
62
61
P25/ANI5
P26/ANI6
REMOVE clock option
+3.5V_ST P80/EX0 21 60 P27/ANI7 100 R8707
UART_SW1 AMP_EN
P81/EX1 22 59 P150/ANI8
UART_DBG_SW
OPT P82/EX2 23 58 P151/ANI9
R8745 DBG_SW
PIN NAME PIN NO. HIGH LOW P83/EX3 P152/ANI10
10K INV_CTL 24 57
P84/EX4 25 56 P153/ANI11
PANEL_CTL
P85/EX5 26 55 P154/ANI12
MODEL1_OPT_0 87 OPT OPT POWER_ON/OFF1
P86/EX6 27 54 P155/ANI13
SOC_RESET WIFI_EN
P87/EX7 28 53 P156/ANI14
ETNHUB_PWR_ON/OFF KEY1
MODEL1_OPT_1 86 TOUCH KEY TACT KEY P30/INTP3/RTC1HZ P157/ANI15
POWER_DET 29 52 KEY2
EVDD1 30 51 AVSS
MODEL1_OPT_2 85 NON_CLOCK CLOCK

31
32
33
34
35
36
37
38
P17/EX31/TI02/TO02 39
P16/EX30/TI01/TO01/INTP540
P15/EX29/RTCDIV/RTCCL 41
42
43
P12/EX26/SO00/TXD0 44
P11/EX25/SI00/RXD0 45
P10/EX24/SCK00 46
47
48
49
50
+3.5V_ST
22 P52/EX10
OPT 22 P53/EX11
P54/EX12
P55/EX13
P56/EX14
P57/EX15
P13/EX27/TXD3
P14/EX28/RXD3
P50/EX8
P51/EX9
P110/ANO0
P111/ANO1
AVREF1
AVREF0
CLOCK_DET 18 CLOCK OPT
C8708 +3.5V_ST
0.1uF
OPT
C8709
R8763
R8765
0.1uF
16V
22
22
22
22
R8755
R8756
R8757
R8758
IR_OUT_CTRL
PHY_STATE
EXT12V_CTRL
ETNHUB_INT
SIDE_HP_MUTE
EXT5V_CTRL
ETHERNET_RESET
SCART_MUTE
EEPROM_SW
MAIN_AMP_RESET
NEC_RX3
NEC_TX3
NEC_TX0
NEC_RX0
+3.5V_ST
R8754 10K
OPT
SCART_MUTE
POWER_ON/OFF2_1
Modify for TA model

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. NEC_MICOM 87
Ethernet PHY(RTL8201FN)/RJ45
LAN 1 ETNHUB_AVDD18
BLM18PG121SN1D
(AUX LAN)
L9002
JK9000
RJ45VT-01SN002
LAN_AVDD33 1
+3.5V_ST_LAN +3.5V_ST_LAN
+3.5V_ST ETNHUB_EPHY_TXOP1 1
MTK pin no Status R9039
49.9
L9000
LAN1_DET 1%
2
2
BLM18PG121SN1D G37 Input C9015 R9040
49.9
0.1uF 3
1% 3
ETNHUB_EPHY_TXON1
C9012
Q9000 0.1uF 4
PMV48XP 16V ETNHUB_EPHY_RXIP1 4
S
LAN1_DET LAN1_LINK R9041

49.9
5
1% 5
LAN_DVDD33
G Connected High Low C9016 R9042
49.9
R9002 0.1uF 6
R9008 1% 6
10K L9001 ETNHUB_EPHY_RXIN1
1K Disconnected Low High
D9006 5.5V
D9008 5.5V
D9010 5.5V
BLM18PG121SN1D
LAN_DIODE
LAN_DIODE
LAN_DIODE
LAN_DIODE
D9004
C9021 7
5.5V
7
0.1uF
C9013 16V
0.1uF
16V 8
8
C
B Q9003 LAN1 Detect 9
ETNHUB_PWR_ON/OFF 2SC3052
R9065 ETNHUB_DVDD33
10K 9
E
R9069
R9068 10K
100
LAN1_DET
C
TO Soc R9070
Q9001 B 10K
MMBT3904(NXP) LAN1_LINK
E
From MICOM
50V 50V
15pF 15pF
C9003-*1 C9005-*1
Xtal_Old Xtal_Old PHY ADDRESS CONFIG
TP9000
50V 50V LAN_DVDD33

12pF
12pF
C9003 C9005 CONFIG PHY_ADDRESS = 111
Xtal_matching Xtal_matching 0
1 2
25.0MHz R9026 R9027 R9032
X9000 4.7K 4.7K 4.7K
TO RJ45
R9010
1M 1%
TR1P
TR1N
TR0P
TR0N
R9011
R9009 Place Closed
LAN_AVDD33
2.49K OPT 4.7K

C9014
1% C9004 0.1uF
0.1uF 16V
C9002 LAN_DVDD33
16V
0.1uF
16V
AVDD10OUT
DVDD10OUT
RXER/FXEN
AVDD33_2
DVDD33_3
LAN 2
CKXTAL2
CKXTAL1
[EP]GND
LAN_DVDD33 ETNHUB_AVDD18
RSET
NC_8
NC_7
NC_6
C9007
COL
0.1uF
BLM18PG121SN1D
16V
R9025
4.7K
48
47
46
45
44
43
42
41
40
39
38
37
L9003
LAN_AVDD33 JK9001
MDI+[0] 1 36 CRS/CRS_DV
LAN_DVDD33 RJ45VT-01SN002
MDI-[0] 2 35 LED1/PHYAD[1]
THERMAL
NC_1 3 34 LED0/PHYAD[0]
49
MDI+[1] 4 33 PMEB 1
MDI-[1] 5
IC9000 32 LED2/PHYAD[2] R9038 ETNHUB_EPHY_TXOP3 1
4.7K MTK pin no Status R9051
AVDD33_1 6 RTL8201FN 31 MDIO 49.9
ETHERNET_MDIO 2
NC_2 7 30 MDC LAN2_DET 1% 2
LAN_DVDD33 ETHERNET_MDC C9024
NC_3 8 29 PHYRSTB R9030 22 G36 Input R9052
C9000 0.1uF 49.9
0.1uF NC_4 9 28 DVDD10 3
1% 3
16V NC_5 TXEN ETNHUB_EPHY_TXON3
10 27
R9001 4.7K EN_LDO_OUT TXD[3] C9010 C9011
11 26
0.1uF 0.1uF 4
TXER 12 25 TXD[2] 4
16V 16V ETNHUB_EPHY_RXIP3
R9053
13
14
15
16
17
18
19
20
21
22
23
24
LAN2_DET LAN2_LINK 49.9

5
1% 5
TXD[0]
TXD[1]
RXD[0]
RXD[1]
RXD[2]
RXD[3]/CLK_CTL
INTB
TXC
RXC
RXDV
DVDD33_1
DVDD33_2
C9025 R9054
Connected High Low 0.1uF 49.9
1% 6
ETNHUB_EPHY_RXIN3 6
D9007 5.5V
D9011 5.5V
D9009 5.5V
LAN_DIODE
Disconnected High
LAN_DIODE
LAN_DIODE
Low
LAN_DIODE
D9005
C9022 7
5.5V
0.1uF 7
16V
R9067
LAN_DVDD33
C9008 8
8
10pF OPT
50V
MCU PORT TO BE ASSIGNED!!
OPT
9
4.7K
LAN_DVDD33 C9006
R9012 0.1uF LAN2 Detect
4.7K 16V ETHERNET_RESET
TO MCU ETNHUB_DVDD33 9
MAGIC_WOL
R9013
100
PHY_STATE TO SOC/ MCU R9072
R9071 10K
C9001 100
0.1uF LAN2_DET
16V C
TO Soc R9073
Q9002 B 10K
MMBT3904(NXP) LAN2_LINK
From MICOM
E
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. ETHERNET/RH45 90
EXTERNAL_POWER OUT 5V/12V
R9104
R9117 75
100K
IC9102
Switching noise reducing [MPS recommend] MP5000DQ
C9117 0.1uF
50V
IC9101 GND SOURCE_5
R9118 1 10
MP4460DQ-LF-Z EP_GND 22 +24V EXT_12V
C9105
close to pin 470pF
DV/DT SOURCE_4
SW_1 BST 50V 2 9
1 10
L9101
THERMAL
D9102 R9101 CB3216PA501E
11
MBRA340T3G SW_2 VIN_2 ENABLE/FAULT SOURCE_3
2 9 1K
EXT12V_CTRL 3 8
C9121 C9122
EN VIN_1 3.3uF 0.1uF C9109
3 8 I-LIMIT SOURCE_2 0.1uF
50V 50V 4 7 50V
R9121
COMP FREQ 200K
4 $0.21 7 P_12V
R9119 C9118 1/8W NC SOURCE_1
5 6
18K 150pF FB GND 1% P_12V
5 6
50V L9106
R9122 R9123 CB3216PA501E 11
R9120
150K 270K 10K
1/16W 1/16W VCC

1% 1%
L9105 C9119 R9124

22UH 22uF C9120 20K
25V 0.1uF 1/16W
50V 1%
P_12V
close IC1800
IC9103
R9103 C9111
10K TPS54327DDAR [EP]GND
EXT5V_CTRL 10uF
25V EXT_5V
BLM18PG121SN1D
EN VIN +5V_CRUISE
NON_CRUISE
1 8
L9102
THERMAL
R9113 R9112 C9107

56K 11K VFB VBST 0.1uF
9
2 7 CRUISE
1% 1% 50V L9104 L9107
3.6uH BLM18PG121SN1D
C9112 VREG5 SW
100pF 3 6
NR8040T3R6N C9103 C9101
SS GND 22uF 22uF
4 5
16V 16V
R9116
12K
1%
C9108
C9115
1uF
3300pF
10V
50V
Vout=(1+R1/R2)*0.765=5.03V
Copyright
ESSENTIAL THAT © 2014
ONLY LG Electronics
MANUFACTURES Inc. All PARTS
SPECIFIED rights BE
reserved.
USED FOR LGE Internal Use Only
Only for COMPONENTS
THE CRITICAL training and service
IN THE purposes
SYMBOL MARK OF THE SCHEMETIC. EXT. POWER OUT 87
Pro:Idiom (XMARK)
Power
+3.3V_NORMAL +3.3V_PROIDIOM +3.3V_PROIDIOM

+3.3V_PROIDIOM +3.3V_VCCINT
+3.3V_VCCINT
1uF 10V
L9201 L9202 +3.3V_PROIDIOM
IC9203
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
BLM18PG121SN1D
BLM18PG121SN1D
BLM18PG121SN1D
BLM18PG121SN1D
74LVC1G08GW
MLB-201209-0120P-N2 MLB-201209-0120P-N2
C9205
L9207
L9208
L9209
L9210
10uF
1 5
C9219
C9220
C9221
C9222
C9223
C9224
C9225
C9226
C9227
C9228
C9229
C9230
C9231
10V
C9250
2 0.1uF
3 4
SOC -> P:I Serial
GNDG_PLL2
GNDA_PLL2
GNDG_PLL1
GNDA_PLL1
VCCA_PLL2
VCCA_PLL1
VCCINT_12
VCCINT_11
VCCINT_10
VCCINT_9
VCCINT_8
VCCINT_7
VCCINT_6
VCCINT_5
VCCINT_4
VCCINT_3
VCCINT_2
VCCINT_1
VCCIO2_4
VCCIO2_3
VCCIO2_2
VCCIO2_1
VCCIO3_3
VCCIO3_2
VCCIO3_1
VCCIO4_4
VCCIO4_3
VCCIO4_2
VCCIO4_1
VCCIO1_3
VCCIO1_2
VCCIO1_1
C9252 C9253
TS_S_OUT_CLK 10uF 10uF
GND_26
GND_25
GND_24
GND_23
GND_22
GND_21
GND_20
GND_19
GND_18
GND_17
GND_16
GND_15
GND_14
GND_13
GND_12
GND_11
GND_10
IO2_40
IO2_39
IO2_38
IO2_37
IO2_42
IO2_35
10V 10V
GND_9
GND_8
GND_7
GND_6
GND_5
GND_4
GND_3
GND_2
GND_1
TS_S_OUT_VAL
TS_S_OUT_SYNC
J12
J11
J10
J5
J6
J9
J7
J8
F11
F10
P16
T16
T12
L11
T14
L10
T10
F9
F8
F6
F7
P1
C16
E5
E6
T5
T1
L9
L8
L6
L7
T3
T7
B5
B6
H11
K10
H10
G11
A12
A16
A14
K11
C1
G10
A10
D5
D6
H6
K8
K6
H8
G9
G7
A5
A1
A3
G6
K9
K7
H9
H7
G8
A7
TS_S_OUT_DATA Only Inner Layer(GND) routing
IC9204 R9266 22 CLK1 H1 R11 IO4_34/CH_CLK
+3.3V_PROIDIOM TS_S_IN_0_CLK
74LVC1G08GW IO2_29/TP_SOP B8 IO4_20/CH_VALID
R8 TS_S_IN_0_VAL
IO2_21/TP_VALID B9 R9 IO4_26/CH_SOP
TS_S_IN_0_SYNC
27MHz(200ppm) 1 5
IO2_17/TP_ERR B10 R10 IO4_30/CH_ERR
IO4_8/CH_DATA[0]
+3.3V_PROIDIOM R9271 22 IO2_41/TP_DATA[7] C5 P5 TS_S_IN_0_DATA
0.1uF
C9251
IO2_36/TP_DATA[6] C6 P6 IO4_13/CH_DATA[1]
2 IO2_31/TP_DATA[5] C7 P7 IO4_18/CH_DATA[2]
IO2_25/TP_DATA[4] C8 P8 IO4_24/CH_DATA[3]
X9200 R9206
47K IO2_23/TP_DATA[3] C9 P9 IO4_28/CH-DATA[4]
27MHz 3 4 IO2_18/TP_DATA[2] C10 P10 IO4_33/CH_DATA[5]
6 1 IO2_14/TP_DATA[1] C11 P11 IO4_35/CH_DATA[6]
C9202 C9204 R9207 IO2_8/TP_DATA[0] C12 P12 IO4_41/CH_DATA[7]
10uF 0.1uF 5 2 47K IO1_29 IO2_34
M1 E7
6.3V XMARK_1.8V
4 3 IO1_2 C3 A6 IO2_33
IO1_3 IO2_32 C9232
C2 B7 0.1uF
XMARK_1.8V IO1_4 B1 A4 IO2_43
R9201 IO1_5 G5 D7 IO2_30
22 L9203 IO1_6 IO2_28
PROIDIOM_SYSCLK BLM18PG121SN1D F4 A8
IO1_7 D3 E8 IO2_27 C9233
IO1_8 IO2_26 0.1uF
+3.3V_PROIDIOM E4 D8
C9210 IO1_9 F5
IC9202 B4 IO2_44
R9211 10K
4.7uF IO1_10 IO2_24

E3 E10
Close to IC IO1_11 IO2_45
OPT
D2 C4
LGDT1001
IO1_12 E2 D9 IO2_22
CLK0 G1 A9 IO2_20
PROIDIOM_SYSCLK
R9224 22 IO2_48/RESET
B2 D10 IO2_19 C9234
PROIDIOM_RESET
Cap close to IC
R9225 22 IO3_37/I2C_SCK D14 IO2_16 0.1uF
I2C_SCL3 A11
C9209
0.1uF I2C_SDA3 R9226 22 IO3_34/I2C_SDA E14
DCLK
I2C : 0x47 B11 IO2_15
IO2_46
K4 B3
XMARK_1.8V Close to IC CONF_DONE K13 D11 IO2_13
NCONFIG H3 D12 IO2_12
NCE J4 E9 IO2_11
XMARK_1.8V DATA0 H2 E11 IO2_10
+3.3V_PROIDIOM
IO1_21SO G4 E12 IO2_9
MLB-201209-0120P-N2
IC9201 IO1_22/ASDO
NCEO
K3 A2 IO2_47
IO2_7
H4 B12
0.1uF
C9245
AZ1117H-1.8TRE1(EH13A) NSTATUS
MSEL0
J13 A13 IO2_6
IO2_5
L9200
J3 B13
XMARK_1.8V MSEL1 J2 C13 IO2_4
TCK J14 B14 IO2_3
INPUT 3 1 ADJ/GND TDO H15 A15 IO2_2
TMS J15 B15 IO2_1
TDI H14 D13 IO3_43
C9200 C9201 2 IO1_1/INIT_DONE D4 C14 IO3_42

0.1uF IO1_13 D1 C15 IO3_41
22uF
16V 16V OUTPUT IO1_14 F3 B16 IO3_40 C9235
0.1uF
C9244
0.1uF
IO1_15 G3 G12 IO3_39
IO1_16 F2 H13 IO3_38
IO1_17 IO3_36 +3.3V_PROIDIOM
C9206 E1 E13
C9208
0.1uF IO1_18 G2 F12 IO3_35
22uF
16V 16V IO1_19 F1 D15 IO3_33 R9256 4.7K
IO1_20 H5 D16 IO3_32 R9257 4.7K
IO1_23 J1 E15 IO3_31
IO1_24 K2 E16 IO3_30
IO1_25 L3 F15 IO3_29
IO1_26 K1 F13 IO3_28
IO1_27 L1 F14 IO3_27
IO1_28 L2 F16 IO3_26
IO1_30 N1 G15 IO3_25
IO1_31 M2 G13 IO3_24
IO1_32 N2 G14 IO3_23
IO1_33 M3 H12 IO3_22
IO1_34 L5 G16 CLK2
IO1_35 M4 H16 CLK3
M10
M11
M12
M13
M14
M15
M16
N10
N11
N12
N13
N15
N16
K12
K14
N14
K16
K15
R12
R13
R14
R15
R16
T11
T13
T15
L12
L13
L14
L15
L16
P13
P14
P15
J16
M5
M6
M7
M8
M9
N3
K5
N4
N5
N6
N7
N8
N9
R1
R2
R3
R4
R5
R6
R7
L4
T2
T4
T6
T8
T9
P2
P3
P4
RESET
IO1_36
IO1_37
IO1_38
IO1_39
IO1_40
IO1_41
IO1_42
IO4_10
IO4_11
IO4_12
IO4_14
IO4_15
IO4_16
IO4_17
IO4_19
IO4_21
IO4_22
IO4_23
IO4_25
IO4_27
IO4_29
IO4_31
IO4_32
IO4_36
IO4_37
IO4_38
IO4_39
IO4_40
IO4_42
IO4_43
IO4_44
IO4_45
IO4_46
IO4_47
IO4_48
IO3_10
IO3_11
IO3_12
IO3_13
IO3_14
IO3_15
IO3_16
IO3_17
IO3_18
IO3_19
IO3_20
IO3_21
+3.3V_PROIDIOM
IO4_1
IO4_2
IO4_3
IO4_4
IO4_5
IO4_6
IO4_7
IO4_9
IO3_1
IO3_2
IO3_3
IO3_4
IO3_5
IO3_6
IO3_7
IO3_8
IO3_9
Onsemi_PI_OLD
IC9200
MAX809RTR XMARK_1.8V
+3.3V_PROIDIOM
R9203 C9243
100 RESET VCC
PROIDIOM_RESET 2 3 C9238 C9239 C9240 C9241 C9242 0.1uF
0.1uF
0.1uF
C9236
C9237
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

1
C9203 GND C9207
DIODES_PI_NEW R9200 1uF
25V 0.1uF
IC9200-*1 4.7K R9258 4.7K
OPT
APX809-26SAG-7 R9259 4.7K
Cap close to IC R9260 4.7K
RESET 2 3 VCC
1
GND
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PRO:IDIOM 92
LVDS
LVDS_51PIN
P7701
FI-RE51S-HF-J-R1500 [51Pin LVDS OUTPUT Connector]
NC
1
NC
2
LVDS_SEL
NC
3
NC +3.3V_NORMAL
4
NC
5
R7706
NC
6 3.3K
LVDS_SEL LVDS_SEL_HIGH
7 LVDS_SEL
LVDS_SEL
NC R7702 33 R7707
8 PWM_DIM1
10K
NC LGD_T-Con_Scanning
9 LVDS_SEL_LOW
R7703 33
L/DIM_ENABLE
10 AUO_L/D_EN
GND R7704 33
11 OPC_EN
RA0N OPC_EN
12 TXA0N
RA0P
13 TXA0P
RA1N
14 TXA1N
RA1P
15 TXA1P
RA2N
16 TXA2N
RA2P
17 TXA2P
GND
18
RACLKN
19 TXACLKN
RACLKP
20 TXACLKP
GND
21
RA3N
22 TXA3N
RA3P
23 TXA3P
RA4N
24 TXA4N
RA4P
25 TXA4P
GND
26
BIT_SEL BIT_SEL
27
RB0N
28 TXB0N R7705
RB0P 10K
29 TXB0P BIT_SEL_LOW
RB1N
30 TXB1N
RB1P
31 TXB1P
RB2N
32 TXB2N
RB2P
33 TXB2P
GND
34
RBCLKN
35 TXBCLKN
RBCLKP
36 TXBCLKP
GND
37
RB3N
38 TXB3N
RB3P
39 TXB3P
RB4N
40 TXB4N
RB4P
41 TXB4P
GND
42
GND
43
GND
44
PANEL_VCC
GND
45
GND
46
L7701
NC
47 BLM18SG121TN1D
VLCD
48
VLCD
49
VLCD C7701 C7702 C7703
50 10uF 1000pF 0.1uF
VLCD 16V 50V 50V
51 OPT OPT OPT
52
GND
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS 77

Led TV: Service Manual

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Led TV: Service Manual

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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 42LY750H 42LY750H-TA

P/NO : MFL68104712 (1406-REV00) Printed in Korea

SAFETY PRECAUTIONS ......................................................................... 3

BLOCK DIAGRAM ................................................................................. 24

EXPLODED VIEW .................................................................................. 25

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

Leakage Current Cold Check(Antenna Cold Check)

Fuse and Conventional Resistor

1. Application range 3. Test method

1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C

4. Model General Specification

5.2. DVI-PC mode

4.3.3. WIDEVINE key Inspection

4.3. LAN Inspection

4.4.1. Equipment setting

4.3.2. LAN inspection solution 4.4.2. LAN PORT inspection(PING TEST)

▪ If you want manual connection, Instart→ menu→ Network

2) Check the key download for transmitted command

4.7. WIFI MAC ADDRESS CHECK

4.6. CI+ Key checking method

=> Check the Download to CI+ Key value in LGset.

5.3.3. Equipment connection MAP

ⓑ Serial No: Controlled on production line.

Tool option 3 541

4.4. Wi-Fi Test

5.8. Magic Motion Remote control test

6.1. External SPK Out

1) Connect JIG for inspection to RS-232C port on TV as

(3) Pro:Idiom Check

1) Connect each other RS232C port on the Commercial

8. GND and HI-POT Test

8.1. Ship-out mode check (In-stop)

8.2 GND and Hi-pot auto-check

* After downloading, have to adjust Tool Option again.

Check LCD Module

2. No OSD Trouble Shooting guide

Re-download NEC Micom

Check RF cable & signal.

Check RF cable & signal.

Check AC cable for damage

Check the input of MTK(IC105).

Check AC cable for damage

Check the input of MTK(IC105).

Check RF cable & signal.

Check AC cable for damage

Check the input of MTK(IC105).

Check AC cable for damage

Only for training and service purposes

LG Electronics. Inc. All rights reserved.

LGE Internal Use Only

RIN AVCC_1 Connected Disconnected

C8603 PVCCR_2 PGNDR_1

+12V IC2401-*1 L2407

R2 10K C2417 C2428

DDR MAIN 1.5V

MTK CORE 1.2V +1.2V_MTK_CORE C2420

AOZ1038PI [EP]LX R2428

▪ If you want manual connection, Instart→ menu→ Network

1) Connect JIG for inspection to RS-232C port on TV as

1) Connect each other RS232C port on the Commercial