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LED TV
SERVICE MANUAL
CHASSIS : LD43M
CONTENTS . ............................................................................................. 2
SPECIFICATION ....................................................................................... 6
Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
Copyright © LG Electronics. Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder
on page 3 of this publication, always follow the safety precau- ES devices.
tions. Remember: Safety First. 4. Use only an anti-static type solder removal device. Some sol-
der removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board 6. Do not remove a replacement ES device from its protective
module or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug (Most replacement ES devices are packaged with leads elec-
or other electrical connection. trically shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective mate-
installation of electrolytic capacitors may result in an explo- rial to the chassis or circuit assembly into which the device will
sion hazard. be installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or cir-
high voltage meter or other voltage measuring device (DVM, cuit, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropri-
(by volume) isopropyl alcohol (90 % - 99 % strength) ate tip size and shape that will maintain tip temperature within
CAUTION: This is a flammable mixture. the range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication 2. Use an appropriate gauge of RMA resin-core solder composed
of contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks Do not use freon-propelled spray-on cleaners.
are correctly installed. 5. U se the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Q
uickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand
ily by static electricity. Such components commonly are called against the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Q uickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharg-
ing wrist strap device, which should be removed to prevent
potential shock reasons prior to applying power to the unit
under test.
Copyright © LG Electronics. Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed when-
gently prying up on the lead with the soldering iron tip as the ever this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. Carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remain- good copper pattern. Solder the overlapped area and clip off
ing on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. C onnect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the
lead of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and
if necessary, apply additional solder.
Copyright © LG Electronics. Inc. All rights reserved. -5- LGE Internal Use Only
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
Copyright © LG Electronics. Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
No. Item Specification Remarks
Analogue TV
1) PAL-B/G/D/K/I
2) SECAM-B/G/D/K/I
SECAM L/L’ Analogue TV : (RF) VHF: E2 to E12, UHF : E21 to E69
(CATV) S1 to S20, HYPER: S21 to S47
Digital TV
2 Broadcasting system 1) DVB-T Digital TV : VHF, UHF
2) DVB-C
Satellite TV : VHF, UHF,
Satellite Digital TV C-Band, Ku-Band
1) DVB-T/T2
2) DVB-C
3) DVB-S/S2
► DVB-T
- Guard Interval(Bitrate_Mbit/s) : 1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
► DVB-T2
- Guard Interval(Bitrate_Mbit/s)
: 1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
Analog : Upper Heterodyne 16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
3 Receiving system Digital : COFDM, QAM 64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
► DVB-C
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s
- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM
► DVB-S
- symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
4 Scart Jack (1EA) PAL, SECAM Scart 1 Jack is Full scart and support RF-OUT(analog).
Video Input RCA
4 System : PAL, SECAM, NTSC, PAL60
Component & AV (PAL, SECAM, NTSC)
5
Common port (1EA) Component Input
(Y/Cb/Cr, Y/Pb/Pr)
6 HDMI Input (2EA) HDMI1/2-DTV Support HDCP
7 Audio Input (1EA) Component & AV Component & AV’s audio input is used by common port.
8 SDPIF out (1EA) SPDIF out
Antenna, AV1, AV2, Component,
9 Earphone out (1EA) LB62 &LB56 Series
HDMI1, HDMI2, USB
10 USB (1EA) EMF, DivX HD, For SVC (download) JPEG, MP3, DivX HD
CI : U
K, Finland, Denmark, Norway, Sweden, Russia, Spain,
DVB-T Ireland, Luxemburg, Belgium, Netherland
CI+ : France(Canal+), Italy(DGTVi)
11 DVB CI : Switzerland, Austria, Slovenia, Hungary, Bulgaria
DVB-C CI+ : S
witzerland(UPC,Cablecom), Netherland(Ziggo),
Germany(KDG,CWB), Finland(labwise)
DVB-S CI + : Germany(Astra HD+)
12 Ethernet (1EA) Wired, DMP only Only UK T2 Model ( LB62, LB56, LB55 ) : for MHEG
Copyright © LG Electronics. Inc. All rights reserved. -7- LGE Internal Use Only
Only for training and service purposes
5. Video resolutions (2D)
5.1. Component Input (Y, CB/PB, CR/PR)
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed
1 720*576 15.625 50.00 13.5 SDTV ,DVD 576I
2 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
3 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
4 720*576 31.25 50.00 27.00 SDTV 576P
5 720*480 31.50 60.00 27.027 SDTV 480P
6 720*480 31.47 59.94 27.00 SDTV 480P
7 1280*720 37.50 50.00 74.25 HDTV 720P
8 1280*720 45.00 60.00 74.25 HDTV 720P
9 1280*720 44.96 59.94 74.176 HDTV 720P
10 1920*1080 28.125 50.00 74.25 HDTV 1080I
11 1920*1080 33.75 60.00 74.25 HDTV 1080I
12 1920*1080 33.72 59.94 74.176 HDTV 1080I
13 1920*1080 56.25 50.00 148.50 HDTV 1080P
14 1920*1080 67.50 60.00 148.50 HDTV 1080P
15 1920*1080 67.432 59.94 148.352 HDTV 1080P
16 1920*1080 27.00 24.00 74.25 HDTV 1080P
17 1920*1080 26.97 23.94 74.176 HDTV 1080P
18 1920*1080 33.75 30.00 74.25 HDTV 1080P
19 1920*1080 33.71 29.97 74.176 HDTV 1080P
Copyright © LG Electronics. Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
6. Video resolutions (3D)
6.1. HDMI Input
No. Resolution H-freq(kHz) V-freq(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1 1280*720 37.5 50 74.25 HDTV 720P Side by Side(half), Top and Bottom,
2 1280*720 45 60 74.25 HDTV 720P Side by Side(half), Top and Bottom,
3 1280*720 75 50 148.5 HDTV 720P Frame packing
4 1280*720 89.9 / 90 59.94/60 148.35/148.5 HDTV 720P Frame packing
5 1920*1080 28.125 50 74.25 HDTV 1080i Side by Side(half), Top and Bottom
6 1920*1080 33.7 60 74.25 HDTV 1080i Side by Side(half), Top and Bottom
7 1920*1080 27 24 74.25 HDTV 1080P Side by Side(half), Top and Bottom,
8 1920*1080 33.7 30 89.1 HDTV 1080P Side by Side(half), Top and Bottom
9 1920*1080 53.95 / 54 23.98 / 24 148.35/148.5 HDTV 1080P Frame packing
1920*1080 56.3 50 148.5 HDTV 1080P Side by Side(half), Top and bottom,
10
Single frame sequential
1920*1080 67.5 60 148.5 HDTV 1080P Side by Side(half), Top and bottom,
11
Single frame sequential
Copyright © LG Electronics. Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range (4) Click "Connect" tab. If "Can't" is displayed, check connection
between computer, jig, and set.
This specification sheet is applied to all of the LED TV with
LD43B/LD43M/LD44B chassis.
(2) (3)
2. Designation
(1) The adjustment is according to the order which is designated
and which must be followed, according to the plan which
can be changed only on agreeing.
(2) Power adjustment : Free Voltage.
(3) Magnetic Field Condition: Nil.
(4) Input signal Unit: Product Specification Standard.
(5) Reserve after operation : Above 5 Minutes (Heat Run) Please Check the Speed :
Temperature : at 25 °C ± 5 °C To use speed between
Relative humidity : 65 ± 10 % from 200KHz to 400KHz
Input voltage : 220 V, 60 Hz
(6) Adjustment equipments: Color Analyzer(CA-210 or CA-110), (5) Click "Auto" tab and set as below.
DDC Adjustment Jig, Service remote control. (6) Click "Run".
(7) Push the "IN STOP" key - For memory initialization. (7) After downloading, check "OK" message.
Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
* After downloading, have to adjust Tool Option again. 3.3. EDID data
(1) Push "IN-START" key in service remote control. (1) FHD HDMI EDID data (2D model)
(2) Select "Tool Option 1" and push "OK" key. 0 1 2 3 4 5 6 7 8 9 A B C D E F
(3) Punch in the number. (Each model has their number) 00 00 FF FF FF FF FF FF 00 1E 6D a b
(4) Completed selecting Tool option. 10 c 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
3.1. ADC Process 40 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
* If ADC processes as OTP, There is no need to proceed 50 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
internal ADC. 60 3E 1E 53 10 00 0A 20 20 20 20 20 20 d
- Enter Service Mode by pushing "ADJ" key, 70 d 01 e
- Enter Internal ADC mode by pushing "►" key at "8. ADC 80 02 03 22 F1 4E 10 9F 04 13 05 14 03 02 12 20 21
Calibration". 90 22 15 01 26 15 07 50 09 57 07 f
EZ ADJUST
A0 f 01 1D 80 18 71 1C 16 20 58 2C 25 00 20 C2
ADC Calibration
0. Tool Option1
B0 31 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00
ADC Comp 480i OK
1. Tool Option2 ADC Comp 1080p OK
C0 20 C2 31 00 00 1E 02 3A 80 18 71 38 2D 40 58 2C
2. Tool Option3 ADC Type ◄ OTP ► D0 45 00 A0 5A 00 00 00 1E 01 1D 00 BC 52 D0 1E 20
3. Tool Option4
4. Tool Option5 Start Reset E0 B8 28 55 40 C4 8E 21 00 00 1E 00 00 00 00 00 00
5. Tool Option Commercial F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e
6. Country Group
7. Area Option
8.ADC Calibration ►
9. White Balance (3) Detail EDID Options are below
10. 10 Point WB
11. Test Pattern
a. Product ID
12 EDID D/L
MODEL NAME HEX EDID Table DDC Function
13. Sub B/C
14. Ext. Input Adjust
HD/FHD Model 0001 01 00 Analog/Digital
<Caution> U sing "P-ONLY" key of the Adjustment remote b. Serial No: Controlled on production line.
control, power on TV. c. Month, Year:
ex) Week : '01' -> '01'
* ADC Calibration Protocol (RS232) Year : '2014' -> '18' fix
NO Item CMD 1 CMD 2 Data 0
d. Model Name(Hex):
Enter Adjust Adjust When transfer the ‘Mode In’,
MODE ‘Mode In’
A A 0 0
Carry the command. cf) TV set’s model name in EDID data is below.
ADC Automatically adjustment Model name MODEL NAME(HEX)
ADC adjust A D 1 0
Adjust (The use of a internal pattern) LG TV 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)
Copyright © LG Electronics. Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
4. Total Assembly line process ▪ Use only AUO/Sharp/CSOT(Cool temp Spec is 13000 K)
Cool Medium Warm
4.1. White Balance adjustment X y x y x y
▪ W/B Equipment condition
CA210 : LED -> CH14, Test signal: Inner pattern(80IRE) spec 271 270 285 293 313 329
▪ Above 5 minutes H/run in the inner pattern. (“power on” key target 278 280 293 299 320 339
of adjust remote control)
▪ If it is executed W/B adjustment in 2~3 minutes H/run, it is ▪ W/B information
adjusted by Target data. Model information W/B information
Mode Temp Coordinate spec Target Model Module Panel Backlight Type Using W/B table
X=0.271 (± 0.002) X=0.278 All All All Direct LED O
Cool 13,000 K
Y=0.270 (± 0.002) Y=0.280
X=0.286 (± 0.002) X=0.293
Medium 9,300 K * Connecting picture of the measuring instrument
Y=0.289 (± 0.002) Y=0.299
X=0.313 (± 0.002) X=0.320 (On Automatic control)
Warm 6,500 K Inside PATTERN is used when W/B is controlled. Connect to
Y=0.329 (± 0.002) Y=0.339
auto controller or push Adjustment R/C P-ONLY → Enter the
▪ Normal line(LGD/CMI, March ~ December for Gumi, Global) mode of White-Balance, the pattern will come out.
Cool Medium Warm
Aging time
NetCase5 X y x y x y
(Min)
271 270 286 289 313 329 Full White Pattern CA-210
1 0-2 282 289 297 308 324 348
COLOR
2 3-5 281 287 296 306 323 346 ANALYZER
TYPE : CA-210
3 6-9 279 284 294 303 321 343
4 10-19 277 280 292 299 319 339
5 20-35 275 277 290 296 317 336 RS-232C Communication
6 36-49 274 274 289 293 316 333
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330 * Auto-control interface and directions
9 Over 120 271 270 286 289 313 329 (1) Adjust in the place where the influx of light like floodlight
around is blocked. (illumination is less than 10 lux).
▪ Normal line(LGD/CMI, January ~ February for Gumi, Apply (2) Adhere closely the Color analyzer(CA210) to the module
not Cinema Screen) less than 10 cm distance, keep it with the surface of the
Cool Medium Warm Module and Color analyzer's prove vertically.(80° ~ 100°).
Aging time
NetCase5 X y x y x y (3) Aging time
(Min)
271 270 286 289 313 329 - After aging start, keep the power on (no suspension of
1 0-2 286 295 301 314 328 354 power supply) and heat-run over 5 minutes.
2 3-5 284 290 299 309 326 349 - Using 'no signal' or 'POWER ONLY' or the others, check
3 6-9 282 287 297 306 324 346 the back light on.
4 10-19 279 283 294 302 321 342
▪ Auto adjustment Map(using RS-232C to USB cable)
5 20-35 276 278 291 297 318 337
RS-232C COMMAND
6 36-49 274 275 289 294 316 334 [CMD ID DATA]
7 50-79 273 272 288 291 315 331 Wb 00 00 White Balance Start
8 80-119 272 271 287 290 314 330 Wb 00 ff White Balance End
9 Over 120 271 270 286 289 313 329 RS-232C COMMAND CENTER
▪ Aging chamber(LGD/CMI) [CMD ID DATA] MIN (DEFAULT) MAX
Cool Medium Warm Cool Mid Warm Cool Mid Warm
Aging time R Gain jg Ja jd 00 172 192 192 254
NetCase4 X y x y x y
(Min)
271 270 285 293 313 329 G Gain jh Jb je 00 172 192 192 192
1 0-5 280 285 294 308 319 340 B Gain ji Jc jf 00 192 192 172 254
2 6-10 276 280 290 303 315 335 R Cut 64 64 64 128
3 11-20 272 275 286 298 311 330 G Cut 64 64 64 128
4 21-30 269 272 283 295 308 327 B Cut 64 64 64 128
5 31-40 267 268 281 291 306 323
6 41-50 266 265 280 288 305 320 <Caution>
7 51-80 265 263 279 286 304 318 Color Temperature : COOL, Medium, Warm.
8 81-119 264 261 278 284 303 316 One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
9 Over 120 264 260 278 283 303 315 adjust other two lower than C0.(When R/G/B Gain are all
C0, it is the FULL Dynamic Range of Module)
Copyright © LG Electronics. Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
* Manual W/B process using adjust Remote control. 5. GND and HI-POT Test
▪ After enter Service Mode by pushing "ADJ" key,
▪ E nter White Balance by pushing " ► " key at "9. White 5.1. HI-POT auto-check preparation
Balance". - Check the POWER cable and SIGNAL cable insertion condition
EZ ADJUST
0. Tool Option1
1. Tool Option2
Whit Balance 5.2. HI-POT auto-check
2. Tool Option3 Color Temp. ◄ Cool ► (1) Pallet moves in the station. (POWER CORD / AV CORD is
3. Tool Option4 R-Gain 172 tightly inserted)
G-Gain 172
(2) Connect the AV JACK Tester.
4. Tool Option5
5. Tool Option Commercial B-Gain 192
Copyright © LG Electronics. Inc. All rights reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
6.2. Command Set 7. MAC Address & CI+ key download
Adjust mode CMD(hex) LENGTH(hex) Description 7.1 MAC Address
EEPROM WRITE A0h 84h+n n-bytes Write (n = 1~16) 7.1.1 Equipment & Condition
* Description ▪ Play file : Serial.exe
FOS Default write : <7mode data> write ▪ MAC Address edit
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0, ▪ Input Start / End MAC address
Phase
Data write : Model Name and Serial Number write in EEPROM,. 7.1.2 Download method
(1) Communication Prot connection
6.3. Method & notice
(1) Serial number D/L is using of scan equipment.
(2) S etting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced in
production line, because serial number D/L is mandatory by
D-book 4.0. Connection: PCBA(USB Port) → USB to Serial Adapter(UC-
232A) → RS-232C cable → PC(RS-232C port)
* Manual Download(Model Name and Serial Number) * Caution: LJ21* chassis support only UC-232A driver. (only
If the TV set is downloaded by OTA or Service man, sometimes
use this one.)
model name or serial number is initialized.(Not always)
There is impossible to download by bar code scan, so It need
Manual download. (2) MAC Address & CI+ Key Download
1) Press the "Instart" key of Adjustment remote control. ▪ Set CI+ Key path Directory at Start Mac & CI+ Download
2) Go to the menu "6.Model Number D/L" like below photo. Programme
3) Input the Factory model name or Serial number like photo. ▪ Com 1,2,3,4 and 115200(Baudrate)
GP4_LOW
4) Check the model name Instart menu. → Factory name displayed.
ex 47LB560V-ZA)
5) C heck the Diagnostics.(DTV country only) → Buyer model
displayed.(ex 47LB560V-ZA)
Copyright © LG Electronics. Inc. All rights reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
7.2. LAN Inspection
7.2.1. Equipment & Condition
▪ Each other connection to LAN Port of IP Hub and Jig
SET PC
Copyright © LG Electronics. Inc. All rights reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
Copyright ©
[T2/C/S2]
IC1300
USB SIDE_USB_DM/DP SPI_SCK/SDI/SDO/CS
(JK700)
Serial Flash
(8Mbit)
USB1_OCP/CTL
+5V_USB
TPS65282 AVDD5V_MHL,MHL_OCP IC104
SIDE 5V_HDMI_4 I2C_SCL/SDA
System EEPROM
CK+/ -, D0+/-, D1+/-, D2+/-,_HDMI4, DDC_SCL/SDA_4, HDMI_CEC (256Kbit)
HDMI2(MHL)
CI Slot(P1900)
TS_DATA[0:7]
Main SOC
FE_TS_DATA[0:7] M1A -256MB ͳΦΚΝΥ͞ΚΟ
AUD_MASTER_CLK,
- 16 -
(IC101)
LNB_TX AUD_LRCH,
AUD_LRCK, SPK_L
LNB_OUT, DEMOD_RESET AUD_SCK
STA380BW
DEMOD_SCL/SDA
AMP_SCL/SDA (IC3401)
IF_N/P
SPK_R
TU_SCL / SDA
BLOCK DIAGRAM
F/NIM IF_AGC
KEY1/2, LED_R, IR
Connector
CK+/ -, D0+/-, D1+/-, D2+/-_HDMI2
HDMI1 (P4600)
(JK800) DDC_SCL/SDA_2, HDMI_CEC
SPDIF_OUT (P1100)
SPDIF(Optic) (P1101)
(JK1001)
LAN EPHY
RXA0+/-~RXA4+/
(JK2100) -,
REAR RXACK+/
SC1_R+/G+/B+, -
SC1/AV2_CVBS_IN, RXB0+/ -~RXB4+/
COM1_Y+/Pb+/Pr+ -, LGE7438
F-SCART RXBCK+/
-
(JK2801) DTV/MNT_OUT, DTV/MNT_L/R_OUT (IC6101)
URSA8
COMPONENT COMP2_Y+/AV_CVBS_IN, COMP2_Pb+/Pr+
(JK2802)
COMP2_L/R_IN
30P HD LVDS wafer
Copyright ©
IC1300
USB SIDE_USB_DM/DP SPI_SCK/SDI/SDO/CS
(JK700)
Serial Flash
USB1_OCP/CT (8Mbit)
L
+5V_USB
TPS65282 AVDD5V_MHL,MHL_OCP IC104
SIDE 5V_HDMI_4 I2C_SCL/SDA
System EEPROM
CK+/-, D0+/-, D1+/-, D2+/-,_HDMI4, DDC_SCL/SDA_4, HDMI_CEC (256Kbit)
HDMI2(MHL)
CI Slot(P1900)
TS_DATA[0:7]
Main SOC
M1A -256MB Built-in
FE_TS_DATA[0:7] AUD_MASTER_CLK,
- 17 -
(IC101) AUD_LRCH,
AUD_LRCK, SPK_L
IF_P AUD_SCK
STA380BW
IF_N
AMP_SCL/SDA (IC3401)
TU_SCL / SDA
SPK_R
IF_AGC
oVupt
KEY1/2, LED_R, IR
Connector
CK+/-, D0+/-, D1+/-, D2+/-_HDMI2 (P4600)
HDMI1
(JK800) DDC_SCL/SDA_2, HDMI_CEC
SPDIF_OUT (P1100)
SPDIF(Optic) (P1101)
(JK1001)
LAN EPHY
RXA0+/-~RXA4+/-,
REAR (JK2100) RXACK+/-
SC1_R+/G+/B+, RXB0+/-~RXB4+/-,
SC1/AV2_CVBS_IN,
F-SCART COM1_Y+/Pb+/Pr+ RXBCK+/- LGE7438
(JK2801) DTV/MNT_OUT, DTV/MNT_L/R_OUT (IC6101)
URSA8
COMPONENT COMP2_Y+/AV_CVBS_IN, COMP2_Pb+/Pr+
(JK2802)
COMP2_L/R_IN
30P HD LVDS wafer
400
521
310
900
540
530
501
820
500
LV2
121
410
LV1
120
200T
Set + Stand
A10
200
A2
Copyright © LG Electronics. Inc. All rights reserved. - 18 - LGE Internal Use Only
Only for training and service purposes
L14 POWER BLOCK (POWER DETECT 2)
D
300 OPT
R457 R430 R432 R438
Q401 8.2K 2.7K 0
1% 5% 5% 4.7K
MMBT3906(NXP) 1% RESET_IC_ROHM
IC401
G
BD48K28G PD_+12V
R454 L408 FET_Diode
1 3 100 5% UBW2012-121F Q405
OPT VDD 3 2 VOUT
POWER_DET 120OHM DMP2130L
R412 RESET_IC_DIODES
R406
D
10K 2 33K C415 1 IC401-*1
R431 C422
+3.5V_ST 0.1uF 1.2K GND APX803D29 OPT
R404 16V POWER_DET_RESET 0.1uF C425 R445 C427 R451 R452
1% 10uF 5.6K 5.6K
4.7K 0.1uF 33K G
VCC RESET 25V 16V
OPT OPT 3 2
R400 +3.5V_POWER_DET R436
10K C Q400 +24V 1
100K
R402 R446
10K B MMBT3904(NXP) GND
12K
RL_ON OPT OPT
OPT OPT
R401 R455 R427 R458 IC402 IC402-*1
E +3.3V_Normal 27K 0 BD48K28G OPT R442 C
10K 0 R437 APX803D29
1% 5% 100 5% 10K B Q403
OPT VDD 3 2 VOUT PANEL_CTL
R456 MMBT3904(NXP)
0 +3.5V_ST VCC 3 2 RESET
R420 OPT OPT 1 R441 E
1K C413 R428 GND 1 10K
ZD404 0.1uF 5.1K
5V R419 16V 1% GND
100 R426
+3.5V_POWER_DET 10K
P401
SMAW200-H18S5
C
R425 Ready - Dual Power Det Power Detect activity
B 10K
L400 INV_CTL
CB2012PK501T
+3.5V_ST Detect Valtage Now is Use Circuit Designator FET_2.5V_DIODE
E Q402 FET_NXP
PWR ON 1 2 DRV ON MMBT3904(NXP) Q406-*1
L401
C407
10uF
10V
C400
1uF
10V
ZD400
5V
CB2012PK501T 3.5V
3.5V
3 4 PDIM#1
3.5V
PWM_DIM Power Detect +3.5V R432, R454-*1, R438 +3.3V_Normal DMP2130L
Q406-*2
PMV48XP
D
2012 1005 5 6
OPT GND PDMI#2
L402 7 8 PWM1 * Notice Power Detect +12V O R430, R431, R454
MLB-201209-0120P-N2 24V 24V
+24V 9 10 PWM_DIM_PULL_DOWN PWM2_2CH_POWER
OPT
- Applying all inch models for LCD L14 +3.5V_ST +3.3V_Normal
G
+24V_CAP GND GND R424 R423
C401 11 12
100
R467 - Dual Power Det is used Power Detect +24V R457, R454
C432 12V 12V 3.9K 1K
4.7uF 0.1uF 13 14 for detecting two kinds of voltage
50V 12V NC FET_2.5V_AOS
50V 15 16
Q406 L410
3216 GND 17 18 GND
L403 AO3435 BLM18PG121SN1D
MLB-201209-0120P-N2
+12V
D
+12V_CAP
C433
4.7uF
C402
0.1uF
19
+1.10V_VDDC
.
G
16V 16V R443 R447 ZD402
+3.5V_ST 10K 22K 2.2uF 0.1uF 22uF
3216 5V
IC403 +3.3V_Normal 10V 16V 10V
L406 TPS5432DDAR [EP]GND
CB2012PK501T
C418
OPT 0.01uF
C437 C436 C414 C435 BOOT SS R429 R448
1 8 2.2K
0.1uF 10uF 10uF 0.1uF 10K
THERMAL
16V 10V 10V 16V
+1.10V_VDDC VIN EN
9
2 7 C
1%
Vout=0.808*(1+R1/R2)
C405 C406
10uF 10uF
16V
[EP]GND
PGND_2
PGND_1
PGOOD
VIN_2
VIN_1
OPT R410
V7V
100K
C403
100pF +5V_Normal
50V C409 L405
24
23
22
21
20
19
0.047uF 4.7uH
EN BST 25V
C404
R408 4700pF 1 18
4.7K 50V THERMAL
+3.3V_Normal COMP 25
LX_2 R421 C411 C412
2 17 18K 82pF 22uF
+3.3V_Normal OPT SS LX_1 1% 50V 16V
R459 3 16
OPT OPT 0 IC400 R1
ROSC FB
R403 R405 4 15
4.7K 4.7K TPS65282REGR
EN_SW2 SW_IN_2 R2
MHL_5V_EN 5 14
MHL_SW_TR
R463
MHL_SW_TR
R464
USB1_CTL
EN_SW1
6
4A 13
SW_IN_1
R422
3.3K
2.7K 10K 1%
10
11
12
7
FAULT1
SW_OUT2
RLIM
AGND
SW_OUT1
E C
MHL_5V_EN R407 R409
MHL_SW_TR 10K 10K
C
R461 R415 5V_HDMI_4 AVDD5V_MHL
10K B R466
B 15K
/VBUS_EN 20K
5%
D401 R418
(Active Low) MHL_SW_TR MBR230LSFT1G
E MHL_SW_TR
Q407 R465 30V 10
10K
MHL_SW_TR C OPT C408
R462 R416 10uF
10K
/MHL_OCP_DET
USB1_OCD
B 100K 10V
MHL_OCP_EN
MHL_SW_TR
(Active High) Q409 E
Vout=0.8*(1+R1/R2)
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
USB 3216 CAP(SIDE)
+5V_USB
JK700
ZD700 C703 C704
SD05 C700
3AU04S-305-ZC-(LG)
5V
OPT 16V 16V 16V
USB DOWN STREAM
SIDE_USB1_DM
R700
0
USB_DM/DP_0ohm
3
SIDE_USB1_DP
OPT OPT R701
C701 C702 0
5pF 5pF USB_DM/DP_0ohm R700-*1
2.2
4
50V 50V
USB_DM/DP_2.2ohm
5
OPT
D700
RCLAMP0502BA R701-*1
2.2
USB_DM/DP_2.2ohm
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
HDMI (REAR 1 / SIDE 1 MHL)
HDMI_1 HDMI_2 MHL
VA805
5V_HDMI_2 5V_DET_HDMI_2 5V_HDMI_4 5V_DET_HDMI_4
ESD_HDMI2
R808
HDMI-2
10K R814
HPD4
33
SHIELD ESD_HDMI2
R803 GND VA808
C HDMI-2
20 R809 R815 100
1K 10K 20
Q800 B DDC_SDA_4
MMBT3904(NXP) HPD2
19 HP_DET R816 100
19 DDC_SCL_4
R802 E R810 100 HDMI-2
VA802 DDC_SDA_2 5V R812
18 1.8K 18
ESD_HDMI1 VA809 VA810
R805
3.3K
EAG62611204
D803 12 CK-
12
1 10 D805
CK-_HDMI2
11 CK_GND 1 10
11 CK-_HDMI4
CK+ 2 9
10 CK+_HDMI2
10
CK+ 2 9
CK+_HDMI4
D0- 3 8
9
9
D0- 3 8
D0_GND 4 7
8 D0-_HDMI2
8
D0_GND 4 7
D0-_HDMI4
D0+ 5 6
7 D0+_HDMI2
7
D0+ 5 6
D1- D0+_HDMI4
6 ESD_HDMI1_IP4294 BODY_SHIELD
D1-
6 ESD_HDMI2_IP4294
D1_GND IP4294CZ10-TBR
5 20
D1_GND IP4294CZ10-TBR
19
HOT_PLUG_DETECT 5
D1+ D804 18
VDD[+5V]
4 17
D1+ D806
1 10 D1-_HDMI2
16
DDC/CEC_GND
SDA
4
3
D2-
15
14
SCL
RESERVED
D2-
1 10
2 9 D1+_HDMI2
13
12
CEC
3 D1-_HDMI4
2
D2_GND 11
TMDS_CLK-
TMDS_CLK_SHIELD
D2_GND
2 9
3 8 10
9
TMDS_CLK+
TMDS_DATA0- 2 D1+_HDMI4
1
D2+ 8
7
TMDS_DATA0_SHIELD
D2+
3 8
4 7 D2-_HDMI2
6
TMDS_DATA0+
TMDS_DATA1-
1
5
4
TMDS_DATA1_SHIELD
TMDS_DATA1+
4 7
VA801 5 6 D2+_HDMI2
3
2
TMDS_DATA2- D2-_HDMI4
ESD_HDMI1_VARISTOR 1
TMDS_DATA2_SHIELD
TMDS_DATA2+ 5 6
JK800 D2+_HDMI4
ESD_HDMI1_IP4294 JK801-*1 JK801 ESD_HDMI2
VA800-*1 DAADR019A HDMI-2 VA806
IP4294CZ10-TBR ESD_HDMI2_IP4294
1uF HDMI-2_EMI_FOOSUNG
10V IP4294CZ10-TBR
ESD_HDMI1_CAP MHL_CD_SENSE
VA801-*1
1uF C800
10V VA807 0.047uF R817
5.6V 25V 300K
ESD_HDMI1_CAP
OPT
MHL Spec
HDMI-2 HDMI-2
CEC TMDS_CH1+
GND_1
1
2
10
9
NC_3
GND_2
TMDS_CH1+
GND_1
1
2
10
9
NC_3
GND_2
TMDS_CH1+
GND_1
1
2
10
9
NC_3
GND_2
TMDS_CH1+
GND_1
1
2
10
9
NC_3
GND_2
3 8 3 8 3 8 3 8
100
HDMI_CEC CEC_REMOTE_S7 ESD_HDMI1_IP4283 ESD_HDMI1_IP4283 ESD_HDMI2_IP4283 ESD_HDMI2_IP4283
IP4283CZ10-TBA IP4283CZ10-TBA IP4283CZ10-TBA IP4283CZ10-TBA
A2
A1
A2
A1
A2
5 6 5 6 5 6 5 6
MMBD6100 MMBD6100
MMBD6100 D801 D802
D800 ESD_HDMI1_SEMTECH ESD_HDMI1_SEMTECH ESD_HDMI2_SEMTECH ESD_HDMI2_SEMTECH
C
DDC_SCL_4
DDC_SCL_2
SPDIF_OPTIC
JK1001
JST1223-001
GND
Fiber Optic
VCC
2
VINPUT
3
SPDIF_OUT
4
SPDIF_CAP_47pF
C1001 C1002
FIX_POLE
OPT 1uF 47pF
10V 50V
SPDIF_CAP_18pF
C1002-*1
ESD Ready 18pF
50V
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
+1.5V_DDR +1.5V_DDR Option : Ripple Check !!!
R12011K1%
R1205 1K 1% R1204 1K 1%
+1.5V_DDR +1.5V_DDR
DDR_EXT
DDR_EXT
C1202 1000pF
A-MVREFDQ A-MVREFCA
1K1%
C1201 0.1uF
C1213 0.1uF
C12141000pF
10uF 10V
C1219
C1220
C1221
C1222
C1223
DDR_EXT
DDR_EXT
DDR_EXT
DDR_EXT
0.1uF
0.1uF
0.1uF
C1217
C1218
C1224
DDR_EXT
DDR_EXT
C1216
1uF
1uF
1uF
1uF
1uF
R1202
DDR_1600_1G_HYNIX
IC1201 M1A_256M M1A_128M
H5TQ1G63EFR-PBC IC101 IC101-*1
DDR_1600_1G_SS DDR_1600_2G_HYNIX_OLD DDR_1600_2G_HYNIX_NEW DDR_1600_2G_SS LGE2132(M1A_256M) LGE2131(M1A_128M)
EAN61829003
IC1201-*1 IC1201-*2 IC1201-*3 IC1201-*4
M8 N3
K4B1G1646G-BCK0 H5TQ2G63DFR-PBC H5TQ2G63FFR-PBC K4B2G1646Q-BCK0 A-MVREFCA VREFCA A0 A-MA0
EAN61836301 EAN61829203 EAN61829204 EAN61848803 P7
A1 A-MA1 E11 E11
N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 P3 A-MA0 B_DDR3_A[0] B_DDR3_A[0]
P7
A1
P7
A1
P7
A1
P7
A1 A2 A-MA2 F12 F12
P3
A2
P3
A2
P3
A2
P3
A2 H1 N2 A-MA1 B_DDR3_A[1] B_DDR3_A[1]
N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 A-MVREFDQ VREFDQ A3 A-MA3 D10 D10
P8
A4
P8
A4
P8
A4
P8
A4 P8 A-MA2 B_DDR3_A[2] B_DDR3_A[2]
P2
A5
P2
A5
P2
A5
P2
A5 A4 A-MA4 B10 B10
R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8
DDR_EXT P2 A-MA3 B_DDR3_A[3] B_DDR3_A[3]
R2
A7
R2
A7
R2
A7
R2
A7 R1203 A5 A-MA5 E15 E15
T8
A8
T8
A8
T8
A8
T8
A8 L8 R8 A-MA4 B_DDR3_A[4] B_DDR3_A[4]
R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2
ZQ A6 A-MA6 B11 B11
L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9
240 R2 A-MA5 B_DDR3_A[5] B_DDR3_A[5]
R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 +1.5V_DDR A7 A-MA7 F14 F14
N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 1% T8 A-MA6 B_DDR3_A[6] B_DDR3_A[6]
T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8
A8 A-MA8 C11 C11
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1 B2 R3 A-MA7 B_DDR3_A[7] B_DDR3_A[7]
M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9
VDD_1 A9 A-MA9 D14 D14
DDR_EXT 10V C1203 D9 L7 A-MA8 B_DDR3_A[8] B_DDR3_A[8]
R1 R1 R1 R1
VDD_8 VDD_8 VDD_8 VDD_8 10uF A-MA10 A12 A12
M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9
VDD_2 A10/AP
N8
BA1
N8
BA1
N8
BA1
N8
BA1 DDR_EXT C1204 0.1uF G7 R7 A-MA9 B_DDR3_A[9] B_DDR3_A[9]
M3
BA2
M3
BA2
M3
BA2
M3
BA2 VDD_3 A11 A-MA11 F16 F16
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
DDR_EXT C1205 0.1uF K2 N7 A-MA10 B_DDR3_A[10] B_DDR3_A[10]
J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8
VDD_4 A12/BC A-MA12 D13 D13
K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1
DDR_EXT C1206 0.1uF K8 T3 A-MA11 B_DDR3_A[11] B_DDR3_A[11]
K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9
VDD_5 NC_7 A-MA13 D15 D15
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
DDR_EXT C1207 0.1uF N1 A-MA12 B_DDR3_A[12] B_DDR3_A[12]
L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9
VDD_6 C12 C12
K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1
DDR_EXT C1208 0.1uF N9 M7 A-MA13 B_DDR3_A[13] B_DDR3_A[13]
J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2
VDD_7 NC_5 E13 E13
K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9
DDR_EXT C1209 0.1uF R1 A-MA14 B_DDR3_A[14] B_DDR3_A[14]
L3
WE
L3
WE
L3
WE
L3
WE VDD_8
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
DDR_EXT C1210 0.1uF R9 M2
T2 J9 T2 J9 T2 J9 T2 J9
VDD_9 BA0 A-MBA0 A-MCK A9 A9
1%
DDR_EXT DDR_EXT
RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2
R1207
NC_3
L1
NC_3
L1
NC_3
L1
NC_3
L1
DDR_EXT C1211 0.1uF N8 A-MBA0 B_DDR3_BA[0] B_DDR3_BA[0]
NC_4
L9
NC_4
L9
NC_4
L9
NC_4
L9
BA1 A-MBA1 D16 D16
F3 T7 F3 T7 F3 T7 F3 T7
C1212 0.1uF M3 A-MBA1 B_DDR3_BA[1] B_DDR3_BA[1]
56
G3
DQSL NC_6
G3
DQSL NC_6
G3
DQSL NC_6
G3
DQSL NC_6
DDR_EXT BA2 A-MBA2 DDR_EXT A10 A10
DQSL DQSL DQSL DQSL
A1 C1215 A-MBA2 B_DDR3_BA[2] B_DDR3_BA[2]
C7
DQSU VSS_1
A9 C7
DQSU VSS_1
A9 C7
DQSU VSS_1
A9 C7
DQSU VSS_1
A9
VDDQ_1
A8 J7
1%
B7 B3 B7 B3 B7 B3 B7 B3
R1208
DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2
VSS_3
E1
VSS_3
E1
VSS_3
E1
VSS_3
E1
VDDQ_2 CK 0.01uF C13 C13
E7
DML VSS_4
G8 E7
DML VSS_4
G8 E7
DML VSS_4
G8 E7
DML VSS_4
G8 C1 K7 50V A-MCK B_DDR3_MCLK B_DDR3_MCLK
B13 B13
56
D3 J2 D3 J2 D3 J2 D3 J2
DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 VDDQ_3 CK
VSS_6
J8
VSS_6
J8
VSS_6
J8
VSS_6
J8 C9 K9 A-MCKB B_DDR3_MCLKZ B_DDR3_MCLKZ
E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1 E3
DQL0 VSS_7
M1
VDDQ_4 CKE A-MCKE E17 E17
F7
DQL1 VSS_8
M9 F7
DQL1 VSS_8
M9 F7
DQL1 VSS_8
M9 F7
DQL1 VSS_8
M9 D2 A-MCKE B_DDR3_MCLKE B_DDR3_MCLKE
F2
DQL2 VSS_9
P1 F2
DQL2 VSS_9
P1 F2
DQL2 VSS_9
P1 F2
DQL2 VSS_9
P1
VDDQ_5 A-MCKB
F8
DQL3 VSS_10
P9 F8
DQL3 VSS_10
P9 F8
DQL3 VSS_10
P9 F8
DQL3 VSS_10
P9 E9 L2
H3
DQL4 VSS_11
T1 H3
DQL4 VSS_11
T1 H3
DQL4 VSS_11
T1 H3
DQL4 VSS_11
T1
VDDQ_6 CS A/B_DDR3_CS B8 B8
H8
DQL5 VSS_12
T9 H8
DQL5 VSS_12
T9 H8
DQL5 VSS_12
T9 H8
DQL5 VSS_12
T9 F1 K1 A-MODT B_DDR3_ODT B_DDR3_ODT
G2
DQL6
G2
DQL6
G2
DQL6
G2
DQL6 VDDQ_7 ODT A-MODT C8 C8
H7
DQL7
H7
DQL7
H7
DQL7
H7
DQL7 H2 J3 A-MRASB B_DDR3_RASZ B_DDR3_RASZ
VSSQ_1
B1
VSSQ_1
B1
VSSQ_1
B1
VSSQ_1
B1
VDDQ_8 RAS A-MRASB +1.5V_DDR B9 B9
D7
DQU0 VSSQ_2
B9 D7
DQU0 VSSQ_2
B9 D7
DQU0 VSSQ_2
B9 D7
DQU0 VSSQ_2
B9 H9 K3 A-MCASB B_DDR3_CASZ B_DDR3_CASZ
C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1 C3
DQU1 VSSQ_3
D1
VDDQ_9 CAS A-MCASB DDR_EXT D11 D11
L3 A-MWEB
A-MDQSU
A-MDQSL
C8 D8 C8 D8 C8 D8 C8 D8
B_DDR3_WEZ B_DDR3_WEZ
A-MWEB R1206
DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4
C2
DQU3 VSSQ_5
E2 C2
DQU3 VSSQ_5
E2 C2
DQU3 VSSQ_5
E2 C2
DQU3 VSSQ_5
E2
WE
A7
DQU4 VSSQ_6
E8 A7
DQU4 VSSQ_6
E8 A7
DQU4 VSSQ_6
E8 A7
DQU4 VSSQ_6
E8 J1
A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9 A2
DQU5 VSSQ_7
F9
NC_1 10K F10 F10
B8 G1 B8 G1 B8 G1 B8 G1 J9 T2 A-MRESETB B_RESET B_RESET
A-MDQSUB
A-MDQSLB
DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8
A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9 A3
DQU7 VSSQ_9
G9
NC_2 RESET A-MRESETB
L1
NC_3 D12 D12
L9 A/B_DDR3_CS B_DDR3_CS0 B_DDR3_CS0
NC_4
T7 F3
A-MA14 NC_6 DQSL A-MDQSL A19 A19
G3 B_DDR3_DQSL B_DDR3_DQSL
DQSL A-MDQSLB B18 B18
B_DDR3_DQSU B_DDR3_DQSU
A9 C7
VSS_1 DQSU A-MDQSU C16 C16
B3 B7 A-MDML B_DDR3_DQML B_DDR3_DQML
VSS_2 DQSU A-MDQSUB D21 D21
E1 A-MDMU B_DDR3_DQMU B_DDR3_DQMU
VSS_3
G8 E7
VSS_4 DML A-MDML C18 C18
J2 D3 B_DDR3_DQSBL B_DDR3_DQSBL
VSS_5 DMU A-MDMU C17 C17
J8 B_DDR3_DQSBU B_DDR3_DQSBU
VSS_6
M1 E3
VSS_7 DQL0 A-MDQL0 A20 A20
M9 F7 A-MDQL0 B_DDR3_DQL[0] B_DDR3_DQL[0]
VSS_8 DQL1 A-MDQL1 A16 A16
P1 F2 A-MDQL1 B_DDR3_DQL[1] B_DDR3_DQL[1]
VSS_9 DQL2 A-MDQL2 C19 C19
P9 F8 A-MDQL2 B_DDR3_DQL[2] B_DDR3_DQL[2]
VSS_10 DQL3 A-MDQL3 C15 C15
T1 H3 A-MDQL3 B_DDR3_DQL[3] B_DDR3_DQL[3]
VSS_11 DQL4 A-MDQL4 C20 C20
T9 H8 A-MDQL4 B_DDR3_DQL[4] B_DDR3_DQL[4]
VSS_12 DQL5 A-MDQL5 C14 C14
G2 A-MDQL5 B_DDR3_DQL[5] B_DDR3_DQL[5]
DQL6 A-MDQL6 B21 B21
H7 A-MDQL6 B_DDR3_DQL[6] B_DDR3_DQL[6]
DQL7 A-MDQL7 B15 B15
B1 A-MDQL7 B_DDR3_DQL[7] B_DDR3_DQL[7]
VSSQ_1 F18 F18
B9 D7 A-MDQU0 B_DDR3_DQU[0] B_DDR3_DQU[0]
VSSQ_2 DQU0 A-MDQU0 D19 D19
D1 C3 A-MDQU1 B_DDR3_DQU[1] B_DDR3_DQU[1]
VSSQ_3 DQU1 A-MDQU1 D17 D17
D8 C8 A-MDQU2 B_DDR3_DQU[2] B_DDR3_DQU[2]
VSSQ_4 DQU2 A-MDQU2 E21 E21
E2 C2 A-MDQU3 B_DDR3_DQU[3] B_DDR3_DQU[3]
VSSQ_5 DQU3 A-MDQU3 E19 E19
E8 A7 A-MDQU4 B_DDR3_DQU[4] B_DDR3_DQU[4]
VSSQ_6 DQU4 A-MDQU4 D20 D20
F9 A2 A-MDQU5 B_DDR3_DQU[5] B_DDR3_DQU[5]
VSSQ_7 DQU5 A-MDQU5 D18 D18
G1 B8 A-MDQU6 B_DDR3_DQU[6] B_DDR3_DQU[6]
VSSQ_8 DQU6 A-MDQU6 F20 F20
G9 A3 A-MDQU7 B_DDR3_DQU[7] B_DDR3_DQU[7]
VSSQ_9 DQU7 A-MDQU7
R1209
E9 E9
ZQ ZQ
240
1%
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Serial Flash for SPI boot
+3.5V_ST +3.5V_ST
SPI_FLASH_MACRONIX
OPT IC1300
R1301
+3.5V_ST 4.7K MX25L8006EM2I-12G
C1300
CS# VCC 0.1uF
/SPI_CS 1 8
OPT
R1300
10K SO/SIO1 HOLD#
SPI_SDO 2 7
WP# SCLK
/FLASH_WP 3 6 SPI_SCK
R1302
GND SI/SIO0 33
4 5 SPI_SDI
SPI_FLASH_WINBOND
IC1300-*1
W25Q80BVSSIG
CS VCC
1 8
DO[IO1] HOLD[IO3]
2 7
%WP[IO2] CLK
3 6
GND DI[IO0]
4 5
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
CI Region * Option name of this page : CI_SLOT
(because of Hong Kong)
CI SLOT
+5V_CI_ON
CI_DATA[0-7]
CI TS INPUT
CI_DATA[0-7]
+5V_Normal AR1903 33
C1903 FE_TS_DATA[7]
CI_MDI[7]
10uF FE_TS_DATA[6]
10V CI_MDI[6]
FE_TS_DATA[0-7]
R1908 FE_TS_DATA[5]
CI_MDI[5]
10K FE_TS_DATA[4]
CI_SLOT_JACK CI_MDI[4]
/CI_CD1 P1900
10067972-000LF
AR1904 33 FE_TS_DATA[3]
R1914 35 1 CI_MDI[3]
100 CI_DATA[3] FE_TS_DATA[2]
36 2 CI_MDI[2] FE_TS_DATA[1]
AR1900 CI_DATA[4]
CI_DATA[0-7]
33 37 3 CI_MDI[1] FE_TS_DATA[0]
CI_DATA[5] R1919
CI_TS_DATA[4] 38 4 10K CI_MDI[0]
CI_DATA[6]
CI_TS_DATA[5] 39 5
CI_DATA[7] FE_TS_DATA[0-7]
CI_TS_DATA[6] 40 6
R1917 R1921 33
CI_TS_DATA[7] 41 7 47 CI_MISTRT FE_TS_SYNC
CI_ADDR[10] /PCM_CE R1922 33
42 8 CI_MIVAL_ERR FE_TS_VAL_ERR
R1910 10K R1923 100
43 9 CI_OE CI_MCLKI FE_TS_CLK
CI_ADDR[11]
CI_IORD 44 10 +5V_Normal
CI_ADDR[9]
CI_IOWR 45 11
CI_ADDR[8]
46 12 R1920
CI_ADDR[13] 10K
CI_MDI[0] 47 13
CI_ADDR[14]
CI_MDI[1] 48 14
CI_MDI[2] 49 15 CI_WE
50 16 R1918 100
CI_MDI[3] /PCM_IRQA
51 17
GND
C1901
0.1uF
52
53
18
19
C1904
0.1uF
C1905
0.1uF
CI HOST I/F
CI_MDI[4]
GND
CI_MDI[5] 54 20
+5V_Normal CI_ADDR[12]
CI_MDI[6] 55 21 CLOSE TO MSTAR
CI_ADDR[7]
R1900 CI_MDI[7] 56 22 GND +3.3V_Normal
10K R1911 10K CI_ADDR[6]
57 23
R1903 CI_ADDR[5]
47 58 24
PCM_RST CI_ADDR[4]
R1904 47 CI_DET
/PCM_WAIT 59 25 IC1902
CLOSE TO MSTAR CI_ADDR[3]
REG 60 26 C1906
R1905 100 CI_ADDR[2]
CI_TS_CLK 61 27 0.1uF
R1906 33 CI_ADDR[1] 1OE BUFFER_ORG VCC 16V
CI_TS_VAL 62 28 1 20
R1907 33 CI_ADDR[0]
CI_TS_SYNC 63 29
CI_DATA[0]
64 30 1A1 2OE
AR1901 33 CI_DATA[1] 2 19
65 31 CI_ADDR[0-14] PCM_A[0]
CI_TS_DATA[0] CI_DATA[2] AR1902 AR1910
66 32 100
CI_TS_DATA[1] 2Y4 1Y1 100
67 33 3 18
CI_TS_DATA[2] CI_ADDR[7] CI_ADDR[0]
68 34
CI_TS_DATA[3] CI_ADDR[6] CI_ADDR[1]
G2 69 G1 CI_ADDR[5] 1A2 2A4 CI_ADDR[2]
PCM_A[1] 4 17 PCM_A[7]
R1912 CI_ADDR[4] CI_ADDR[3]
100
/CI_CD2 2Y3 1Y2
TC74LCX244FT
+5V_Normal GND 5 16
2Y1 1Y4
CI_MISTRT 9 12
CI_MIVAL_ERR
GND 2A1
10 11 PCM_A[4]
CI_MCLKI
CI DETECT +3.3V_Normal
OR_GATE_CI_PHILIPS
IC1900
74LVC1G32GW +3.3V_Normal
B 1 5 VCC
/CI_CD2
A 2
/CI_CD1 AR1905 33
GND 3 4 Y R1913 CI_DATA[0] PCM_D[0]
10K CI_DATA[1] PCM_D[1]
CI_DATA[0-7]
CI_DATA[2] PCM_D[2]
OR_GATE_CI_TI OR_GATE_CI_TOSHIBA R1924 CI_DATA[3] PCM_D[3]
IC1900-*1 IC1900-*2 0
SN74LVC1G32DCKR TOSHIBA ELECTRONICS KOREA CORPORATION
CI_DET
IC1902-*1
PCM_D[0-7]
A VCC IN_B VCC
1 5 1 5
/PCM_CD AR1906 33
B IN_A R1915 CI_DATA[4] PCM_D[4] 74LCX244FT
2 2
47 CI_DATA[5] PCM_D[5]
GND Y GND OUT_Y
3 4 3 4
CI_DATA[6] PCM_D[6]
1OE BUFFER_CI VCC
CI_DATA[7] PCM_D[7] 1 20
1A1 2OE
2 19
PCM_D[0-7]
CI_DATA[0-7] 2Y4 1Y1
CI POWER ENABLE CONTROL 3 18
1A2 2A4
4 17
AR1908 33
CI_ADDR[8] PCM_A[8] 2Y3 1Y2
CI_ADDR[9] PCM_A[9] 5 16
+5V_Normal IC1901
AP2151WG-7 +5V_CI_ON CI_ADDR[10] PCM_A[10]
L1900 CI_ADDR[11] PCM_A[11] 1A3 2A3
6 15
BLM18PG121SN1D
IN OUT
5 1
2Y2 1Y3
7 14
GND AR1909 33
2 CI_ADDR[12] PCM_A[12]
R1916 1A4 2A2
C1902 8 13
100K CI_ADDR[13] PCM_A[13]
R1902 1uF
100 EN FLG 10V CI_ADDR[14] PCM_A[14]
PCM_5V_CTL 4 3
/PCM_REG 2Y1 1Y4
REG 9 12
R1901
10K
GND 2A1
10 11
AR1907 33
CI_OE /PCM_OE
CI_WE /PCM_WE
CI_IORD /PCM_IORD
CI_IOWR /PCM_IOWR
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
ETHERNET
* H/W option : ETHERNET
JK2100
RJ45VT-01SN002
1
1
EPHY_TP
ETHERNET
2
2
3
3
EPHY_TN
4
4
EPHY_RP
5
5
6
6
EPHY_RN
7
7
8
8
ETHERNET ETHERNET
C2105 C2104
0.01uF 0.01uF
50V 50V
3A
+12V_LNB
2A LNB_SX34
D2705-*1
40V
LNB
Max 1.3A
L2702
SP-7850_15
D2705 15uH
LNB LNB_SMAB34
D2703 40V 3.5A
30V
LNB
C2708
LNB LNB LNB 10uF
LNB
C2703 C2704 C2705 C2706 25V
0.01uF 10uF 10uF 10uF
50V 25V 25V 25V
[EP]GND
LNB
LNB C2709
BOOST
GNDLX
NC_3
NC_2
C2707 0.1uF
50V
LX
0.1uF
20
19
18
17
16
LNB
D2702 VCP 1 15 VIN
close to TUNER MBR230LSFT1G
LNB
THERMAL
GND
LNB_OUT 2 21 14
LNB
30V NC_1 VREG R2703
3 13 36K
LNB
LNB LNB LNB TDI ISET 1/16W 1%
R2702 C2712 LNB_SMAB34 4 IC2701 12
LNB LNB LNB LNB C2713
C2714 C2701 C2702 D2701
2.2K 0.22uF 0.1uF D2704 TDO A8303SESTR-T TCAP
1W 25V 50V 40V 5 11
18pF 18pF 33pF
10
LNB
6
9
LNB_SX34 C2710
D2704-*1 0.1uF
IRQ
SCL
SDA
ADD
A_GND A_GND
R2706
0
LNB LNB
R2704 R2705
33 33
R2701
0
DEMOD_SCL
DEMOD_SDA
LNB_TX
A_GND
Max 1.3A
+12V +12V_LNB
LNB
L2701
BLM18PG121SN1D
+12V
JK2802
PPJ245N2-01
R2811 EU
6E [RD2]E-LUG 10K C2808
COMP2_R_IN
VA2804 R2803 330pF R2816 IC2801 0.1uF
[RD2]O-SPRING 5.6V 470K C2802 12K 50V
5E AZ4580MTR-E1
OPT
R2810 EU
4E [RD2]CONTACT 10K R2831
COMP2_L_IN 2.2K OUT1 8 VCC
330pF R2815 DTV/MNT_L_OUT 1
[WH]O-SPRING
VA2803 R2802
470K C2803 12K +3.3V_Normal EU EU EU
5D 5.6V EU R2834 R2844
OPT C2804 OPT IN1- OUT2
10uF 33K 7 2.2K
R2817 R2818 R2832 2
[RD1]CONTACT 10K 1K 16V DTV/MNT_R_OUT
4C 470K EU
COMP2_DET R2841 EU
EU IN1+ IN2- 33K C2812
[RD1]O-SPRING VA2816 EU 3 6 OPT 10uF
5C R2836
5.6V C2807 10K EU R2843 16V
33pF 470K
OPT R2839
7C [RD1]E-LUG-S VEE 5 IN2+ 10K
4 EU
COMP2_Pr+ C2810
[BL]O-SPRING ZD2806 VA2802 R2801 EU 33pF
5B ESD_COMP_ZENER_ROHM 5.5V 75 R2835
5.6K EU
[GN/YL]CONTACT ZD2807 OPT SCART1_Lout R2840
4A 5.6K
ZD2806-*1 ESD_COMP_ZENER_ROHM SCART1_Rout
ESD_COMP_ZENER_KEC 330pF 220K
[GN/YL]O-SPRING C2806 R2833
5A EU EU
ZD2807-*1 EU EU
R2842 C2811
ESD_COMP_ZENER_KEC 220K 330pF
6A [GN/YL]E-LUG
COMP2_Pb+
VA2801 R2800
ZD2804-*1 ZD2804 5.5V 75 CLOSE TO MSTAR
ESD_COMP_ZENER_KECESD_COMP_ZENER_ROHM OPT
ZD2805-*1 ZD2805 CLOSE TO MSTAR
ESD_COMP_ZENER_KECESD_COMP_ZENER_ROHM
+3.3V_Normal
R2812 R2814
10K 1K
AV_CVBS_DET
VA2800 OPT
5.6V C2800
OPT 0.1uF
16V
COMP2_Y+/AV_CVBS_IN
R2804 R2859
ZD2802-*1 ZD2802 75 75
ESD_COMP_ZENER_ROHM 1608 3216
ESD_COMP_ZENER_KEC OPT
ZD2803-*1 ZD2803
ESD_COMP_ZENER_KEC ESD_COMP_ZENER_ROHM
SCART/AV2
2 R2806 R2829
AUDIO_R_OUT VA2813 470K C2818 12K
5.6V 1000pF
1 50V
ESD_SCART/AV2 OPT AV2_L_IN
R2846
0
AV2_L_IN_A AV2
EU SCART/AV2
JK2801 R2825
10K
PSC008-01 SC1/COMP1_R_IN
VA2809
SCART/AV2
SCART/AV2
5.6V C2817
ESD_SCART/AV2 R2809 1000pF R2830
470K 50V 12K
OPT AV2_R_IN
R2849
0
AV2_R_IN_A AV2
AV2
DTV/MNT_L_OUT
EU
VA2806 C2813
5.6V 1000pF
OPT 50V
DTV/MNT_R_OUT
EU
VA2805 C2814
5.6V 1000pF
OPT 50V
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Headphone
*Option : HEAD_PHONE_EU
Close to the Main IC
HEAD_PHONE
L3000
5.6uH HEAD_PHONE
HP_LOUT
HEAD_PHONE C3000 OPT C
C3004 HEAD_PHONE E
10uF C3002 R3002
4.7uF 16V 1000pF Q3002 B Q3004
1K MMBT3904(NXP)
10V 50V MMBT3904(NXP) B OPT HEAD_PHONE_6pie HEAD_PHONE_5pie
OPT JK3000 JK3000-*1
+3.5V_ST E +3.3V_Normal PEJ038-3B6
C KJA-PH-0-0177
GND 5 GND 5
E
OPT OPT HEAD_PHONE
Q3001 R3005
10K L 4 L 4
OPT MMBT3906(NXP)
C R3001 B
R3000 3.3K
1K B C DETECT 3 DETECT 3
SIDE_HP_MUTE HP_DET
Q3000 R3004
MMBT3904(NXP) 1K
E HEAD_PHONE R 1 R 1
OPT
HEAD_PHONE
L3001 HEAD_PHONE
5.6uH
HP_ROUT
HEAD_PHONE C3001 OPT HEAD_PHONE C E
C3005 10uF C3003 R3003
4.7uF 16V 1000pF Q3003 B Q3005
1K MMBT3904(NXP) MMBT3904(NXP)
10V 50V B
OPT OPT
E C
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
RS-232C 4PIN & MSTAR DEBUG 4PIN
RS-232C 4PIN
RS232C_DEBUG_4P
+3.5V_ST P4000
12507WS-04L
R4001
100 VCC
1
PM_TXD
R4000
100 PM_RXD
2
PM_RXD
GND
3
RM_TXD
4
GND
MSTAR_DEBUG_4P
P4001
JP_GND1
JP_GND2
JP_GND3
JP_GND4
12505WS-04A00
3 RGB_DDC_SCL
4 RGB_DDC_SDA
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
TP for EU
+3.5V_ST
R4603 R4604
10K 10K
1% 1%
R4601
100 P4600 OPT
KEY1
KEY_CAP 12507WR-10L P4601
C4602 12507WR-08L
0.1uF
16V
R4602 1
100 1
KEY2
KEY_CAP
C4603 2
0.1uF 2
+3.5V_ST 16V
3
L4600 3
BLM18PG121SN1D
4
4
R4606
+3.5V_ST C4600 C4601 1.8K
0.1uF 1000pF LED_R/BUZZ 5
16V 50V 5
VA4600
LED_R_Zener
R4600 6
3.3K 6
IR 7
C4604 7
100pF ZD4601
50V 5V 8
IR_Zener 8
9 9
+3.3V_Normal
10
R4609 100
SENSOR_SDA
Digital Eye Digital Eye
C4606
18pF
50V
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
NAND FLASH MEMORY +3.5V_ST PM MODEL OPTION
<CHIP Config>
IC102 (SPI_SDI, PM_LED, PWM_PM)
H27U1G8F2CTR-BC R177
LG-NonOS SB51_ExtSPI 3’b000 51boot from SPI 10K PM_MODEL_OPT_0
LG-OS HEMCU_ExtSPI 3’b001 MIPS boot from SPI LCD - HIGH : LCD
+3.3V_Normal +3.3V_Normal +3.5V_ST PM_MODEL_OPT_0
NC_1 NC_29 R176 - LOW :: PDP
1 NAND_FLASH_1G_HYNIX
48 10K
PDP PM_MODEL_OPT_1
NC_2 NC_28 M1A_256M
2 EAN35669103 47 M1A_128M
- Not Use (Ready) IC101
NC_3 NC_27 PCM_A[0-7] IC101-*1
4.7K
LGE2132(M1A_256M)
4.7K
2.7K
3 46 LGE2131(M1A_128M)
22
NC_4 NC_26 I2C
OPT
OPT
4 45 AR101 +3.3V_Normal
NC_5 I/O7 PCM_A[7]
R115
R117
R165
5 44 U19 D5
RXA4+ LVA4P/TTL_B[0]/HCONV/GPIO170 KEY1 U19 D5
NC_6 I/O6 PCM_A[6] SAR0/GPIO35 LVA4P/TTL_B[0]/HCONV/GPIO170 SAR0/GPIO35
6 43 R140 R141 R144 R145 T20 F8 T20 F8
AR103 R107 R109 1K 1K 2.2K 2.2K RXA4- LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36 KEY2
22 T21 E7 LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36
1K 3.9K R/B I/O5 PCM_A[5] LED_R/BUZZ RXA3+ T21 E7
7 42 I2C_SDA LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37 PM_MODEL_OPT_0 LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37
T19 E6 T19 E6
RE I/O4 PCM_A[4] PM_LED I2C_SCL RXA3- LVA3M/TTL_B[3]/OPT_P/GPIO173 SAR3/GPIO38 PANEL_CTL LVA3M/TTL_B[3]/OPT_P/GPIO173
/F_RB R21 D6 SAR3/GPIO38
8 41 RXACK+ R21 D6
AMP_SDA LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39 SCART1_MUTE LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39
/PF_OE CE NC_25 SPI_SDI R20 R20
9 40 AMP_SCL RXACK- LVACKM/TTL_B[5]/GCLK/GPIO175
/PF_CE0 R19 W10 LVACKM/TTL_B[5]/GCLK/GPIO175
4.7K
4.7K
2.7K
RXA2+ R19 W10
NC_7 NC_24 LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20 MHL_CD_SENSE LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20
10 39 C102 P20 Y10 P20 Y10
R108 10uF RXA2- LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21 /VBUS_EN
OPT
1K P3 LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21
OPT
NC_8
11 38
NC_23 10V DIMMING PM_LED/GPIO4 PM_LED
P3
C101 P19 Y3 PM_LED/GPIO4
R116
R118
R121
RXA1+ P19 Y3
0.1uF VCC_1 VCC_2 LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7 POWER_DET LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7
12 37 N20 Y5 N20 Y5
RXA1- LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17 AMP_MUTE
C103 N21 W11 LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17
VSS_1 VSS_2 R157 100 RXA0+ N21 W11
13 36 0.1uF PWM_DIM PWM2 LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22 INV_CTL LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22
R156 10K N19 D3 N19 D3
NC_9 NC_22 PWM0 RXA0- LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11 POWER_ON/OFF_1
M21 AA3 LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11
+3.3V_Normal 14 35 R103 10K RXB4+ M21 AA3
PWM3 LVB4P/TTL_G[4]/EPI2+/GPIO182 GPIO_PM[7]/GPIO14 RL_ON LVB4P/TTL_G[4]/EPI2+/GPIO182 GPIO_PM[7]/GPIO14
NC_10 NC_21 M20 W5 M20 W5
R105 15 34 RXB4- LVB4M/TTL_G[5]/EPI2-/GPIO183 GPIO_PM[8]/GPIO15 /FLASH_WP
NVRAM_RHOM M19 D4 LVB4M/TTL_G[5]/EPI2-/GPIO183 GPIO_PM[8]/GPIO15
1K RXB3+ M19 D4
OPT CLE NC_20 LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200 LED_R/BUZZ LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200
16 33 IC104 L20 L15 L20 L15
AR104
22
AR102 BR24G256FJ-3
RXB3- LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8
Y11
PM_TXD LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8
ALE I/O3 PCM_A[3] Y11
17 32 PM_UART_RX/GPIO_PM[5]/GPIO12 PM_RXD PM_UART_RX/GPIO_PM[5]/GPIO12
/PF_CE1 +3.3V_Normal EEPROM L19 L19
WE I/O2 PCM_A[2] RXBCK+ LVBCKP/TTL_R[0]/EPI4+/GPIO186
PF_ALE K20 LVBCKP/TTL_R[0]/EPI4+/GPIO186
18 31 A0 VCC RXBCK- K20
LVBCKM/TTL_R[1]/EPI4-/GPIO187 LVBCKM/TTL_R[1]/EPI4-/GPIO187
/PF_WE WP I/O1 PCM_A[1] 1 8 K21 K21
19 30 C105 RXB2+ LVB2P/TTL_R[2]/EPI5+/GPIO188
/PF_WP K19 LVB2P/TTL_R[2]/EPI5+/GPIO188
0.1uF RXB2- K19
R102 R106 NC_11 I/O0 PCM_A[0] LVB2M/TTL_R[3]/EPI5-/GPIO189 LVB2M/TTL_R[3]/EPI5-/GPIO189
3.3K 1K 20 29 A1 WP J21 J21
2 7 RXB1+ LVB1P/TTL_R[4]/EPI6+/GPIO190
J20 LVB1P/TTL_R[4]/EPI6+/GPIO190
NC_12 NC_19 22 RXB1- LVB1M/TTL_R[5]/EPI6-/GPIO191 J20
21 28 J19 LVB1M/TTL_R[5]/EPI6-/GPIO191
A2 A0’h SCL RXB0+ LVB0P/TTL_R[6]/EPI7+/GPIO192 J19
NC_13 NC_18 3 6 R111 22 H20 LVB0P/TTL_R[6]/EPI7+/GPIO192
22 27 I2C_SCL H20
RXB0- LVB0M/TTL_R[7]/EPI7-/GPIO193 LVB0M/TTL_R[7]/EPI7-/GPIO193
NC_14 NC_17
23 26 GND SDA
4 5 R112 22
NC_15 NC_16 I2C_SDA
24 25 C104 C106
8pF 8pF
OPT OPT
EAN62389502
NAND_FLASH_2G_HYNIX NAND_FLASH_1G_TOSHIBA
EAN60708702 EAN61508001 NVRAM_ATMEL
IC102-*1 IC102-*2 IC104-*1
H27U2G8F2CTR TC58NVG0S3ETA0BBBH AT24C256C-SSHL-T M1A_256M M1A_128M
IC101 IC101-*1
A0 VCC LGE2132(M1A_256M) from CI SLOT LGE2131(M1A_128M)
NC_1 NC_29 NC_1 NC_29 1 8
1 48 1 48
NC_2 NC_28 NC_2 NC_28 A1 WP CI_TS_CLK
2 47 2 47 2 7 CI_TS_DATA[0-7]
NC_3 NC_27 NC_3 NC_27 Y1 V10 Y1 V10
3 46 3 46 GPIO78 TS0CLK/GPIO92 CI_TS_DATA[0] CI_TS_SYNC GPIO78 TS0CLK/GPIO92
A2 SCL W4 T14 W4 T14
3 6 CI_TS_VAL
NC_4 NC_26 NC_4 NC_26 5V_DET_HDMI_4 GPIO79 TS0DATA[0]/GPIO82 CI_TS_DATA[1] GPIO79 TS0DATA[0]/GPIO82
4 45 4 45 T13 T13
GND SDA
TS0DATA[1]/GPIO83 CI_TS_DATA[2] TS0DATA[1]/GPIO83
NC_5 I/O7 NC_5 I/O8 4 5 R184 22 K17 U13 K17 U13
5 44 5 44 I2C_SCL I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84 CI_TS_DATA[3] I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84
R183 22 J15 V15 J15 V15
NC_6 I/O6 NC_6 I/O7 I2C_SDA I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85 CI_TS_DATA[4] I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85
6 43 6 43 U8 U12 U8 U12
URSA/VCOM_SDA SDAM2/GPIO55 TS0DATA[4]/GPIO86 CI_TS_DATA[5] SDAM2/GPIO55 TS0DATA[4]/GPIO86
R/B I/O5 RY/BY I/O6 EAN61133501 T7 V13 T7 V13
7 42 7 42 URSA/VCOM_SCL SCKM2/GPIO56 TS0DATA[5]/GPIO87 CI_TS_DATA[6] SCKM2/GPIO56 TS0DATA[5]/GPIO87
U7 U14 U7 U14
RE I/O4 RE I/O5 SENSOR_SCL SCKM0/GPIO58 TS0DATA[6]/GPIO88 CI_TS_DATA[7] SCKM0/GPIO58 TS0DATA[6]/GPIO88
8 41 8 41 V7 T11 Internal demod out V7 T11
SENSOR_SDA SDAM0/GPIO59 TS0DATA[7]/GPIO89 SDAM0/GPIO59 TS0DATA[7]/GPIO89
CE NC_25 CE NC_25 T2_OR_CHINA F6 T12 F6 T12
9 40 9 40 R113 22 AMP_SCL I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91 FE_TS_CLK I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91
DEMOD_SCL G6 V12 G6 V12
R114 22 AMP_SDA I2S_IN_SD/GPIO160 TS0VALID/GPIO90 FE_TS_DATA[0-7] I2S_IN_SD/GPIO160 TS0VALID/GPIO90
NC_7 NC_24 NC_7 NC_24 AA4 Y14 AA4 Y14
10 39 10 39 DEMOD_SDA
T2_OR_CHINA TU_SCL I2C_SCKM1/GPIO80 TS1CLK/GPIO103 FE_TS_DATA[0] FE_TS_SYNC I2C_SCKM1/GPIO80 TS1CLK/GPIO103
NC_8 NC_23 NC_8 NC_23 Y4 Y16 Y4 Y16
11 38 11 38 TU_SDA I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93 FE_TS_DATA[1] FE_TS_VAL_ERR I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93
AA15 AA15
VCC_1 VCC_2 VCC_1 VCC_2 TS1DATA[1]/GPIO94 FE_TS_DATA[2] TS1DATA[1]/GPIO94
12 37 12 37 J6 Y13 J6 Y13
AV_CVBS_DET ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95 FE_TS_DATA[3] ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95
VSS_1 VSS_2 VSS_1 VSS_2 K6 AA16 K6 AA16
13 36 13 36 AV2_CVBS_DET EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96 FE_TS_DATA[4] FE_TS_DATA[0] EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96
W12 W12
TS1DATA[4]/GPIO97 FE_TS_DATA[0] TS1DATA[4]/GPIO97
NC_9 NC_22 NC_9 NC_22 G7 AA13 FE_TS_DATA[5] G7 AA13
14 35 14 35
COMP2_DET I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98 FE_TS_DATA[6] I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98
NC_10 NC_21 NC_10 NC_21 W14 W14
15 34 15 34 TS1DATA[6]/GPIO99 FE_TS_DATA[7] TS1DATA[6]/GPIO99
J4 W13 J4 W13
CLE NC_20 CLE NC_20 DEMOD_RESET ET_COL/GPIO60 TS1DATA[7]/GPIO100 ET_COL/GPIO60 TS1DATA[7]/GPIO100
16 33 16 33 J5 Y15 J5 Y15
MODEL_OPT_0 ET_TXD[1]/GPIO61 TS1SYNC/GPIO102 ET_TXD[1]/GPIO61 TS1SYNC/GPIO102
ALE I/O3 ALE I/O4 W15 W15
17 32 17 32 TS1VALID/GPIO101 TS1VALID/GPIO101
H19 H19
WE I/O2 WE I/O3 MODEL_OPT_1 LCK/GPIO194 LCK/GPIO194
18 31 18 31 G20 B3 R189 33 G20 B3
MODEL_OPT_2 LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13 /SPI_CS LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13
WP I/O1 WP I/O2 G19 A3 R188 33 G19 A3
19 30 19 30 /MHL_OCP_DET LHSYNC/GPIO196 PM_SPI_SCK/GPIO1 SPI_SCK LHSYNC/GPIO196 PM_SPI_SCK/GPIO1
G21 A4 G21 A4
NC_11 I/O0 NC_11 I/O1 FRC_RESET LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0 SIDE_HP_MUTE LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0
20 29 20 29 33 R182 C3 C3
PM_SPI_SDI/GPIO2 SPI_SDI PM_SPI_SDI/GPIO2
NC_12 NC_19 NC_12 NC_19 J17 A2 R190 33 J17 A2
21 28 21 28 HP_DET UART2_RX/GPIO69 PM_SPI_SDO/GPIO3 SPI_SDO UART2_RX/GPIO69 PM_SPI_SDO/GPIO3
J16 J16
NC_13 NC_18 NC_13 NC_18 SC1/COMP1_DET UART2_TX/GPIO70 UART2_TX/GPIO70
22 27 22 27 E8 B1 E8 B1
MHL_OCP_EN UART3_TX/GPIO52 RP EPHY_RP UART3_TX/GPIO52 RP
NC_14 NC_17 NC_14 NC_17 D7 C2 D7 C2
23 26 23 26 AMP_RESET UART3_RX/GPIO53 TN EPHY_TN UART3_RX/GPIO53 TN
U6 C1 U6 C1
NC_15 NC_16 NC_15 NC_16 MODEL_OPT_4 GPIO46[CTS] TP EPHY_TP GPIO46[CTS] TP
24 25 24 25 V6 B2 V6 B2
RF_SWITCH_CTL GPIO47[RTS] RN EPHY_RN GPIO47[RTS] RN
33 R181 K15 K15
/CI_CD1 UART1_TX/GPIO48 UART1_TX/GPIO48
L16 D2 L16 D2
/CI_CD2 UART1_RX/GPIO49 SPDIF_IN/GPIO161 5V_DET_HDMI_2 UART1_RX/GPIO49 SPDIF_IN/GPIO161
D1 R192 100 D1
+3.3V_Normal SPDIF_OUT/GPIO162 SPDIF_OUT SPDIF_OUT/GPIO162
NAND_FLASH_2G_TOSHIBA NAND_FLASH_1G_SS H5 SPDIF_OPTIC H5
USB1_CTL ET_TX_EN/GPIO63 ET_TX_EN/GPIO63
EAN60991001 EAN61857001 R180 K5 D8 K5 D8
IC102-*3 IC102-*4 10K MODEL_OPT_5 ET_RXD[0]/GPIO65 HWRESET SOC_RESET ET_RXD[0]/GPIO65 HWRESET
K4 E5 K4 E5
TC58NVG1S3ETA00 K9F1G08U0D-SCB0 R197 0 MODEL_OPT_6 ET_MDC/GPIO66 IRIN/GPIO5 IR ET_MDC/GPIO66 IRIN/GPIO5
CI_DET H6 G4 H6 G4
R178 22 USB1_OCD ET_MDIO/GPIO67 DDCA_CK/UART0_RX RGB_DDC_SCL ET_MDIO/GPIO67 DDCA_CK/UART0_RX
/PCM_CD L5 G5 L5 G5
PCM_A[0-14] ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX RGB_DDC_SDA ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX
NC_1 NC_29 NC_1 NC_29
1 48 1 48 PCM_A[0] U17 J18 U17 J18
NC_2 NC_28 NC_2 NC_28 PCM_A[1] PCMADR[0]/NF_AD[0]/GPIO130 PWM0/GPIO71 PWM0 PCMADR[0]/NF_AD[0]/GPIO130 PWM0/GPIO71
2 47 2 47 R18 K18 R18 K18
PCM_A[2] PCMADR[1]/NF_AD[1]/GPIO129 PWM1/GPIO72 PWM1 PCMADR[1]/NF_AD[1]/GPIO129 PWM1/GPIO72
NC_3 NC_27 NC_3 NC_27 V17 K16 V17 K16
3 46 3 46 PCM_A[3] PCMADR[2]/NF_AD[2]/GPIO127 PWM2/GPIO73 PWM2 PCMADR[2]/NF_AD[2]/GPIO127 PWM2/GPIO73
R16 L18 R16 L18
NC_4 NC_26 NC_4 NC_26 PCM_A[4] PCMADR[3]/NF_AD[3]/GPIO126 PWM3/GPIO74 PWM3 PCMADR[3]/NF_AD[3]/GPIO126 PWM3/GPIO74
4 45 4 45 U16 L17 U16 L17
PCM_A[5] PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75 PCM_5V_CTL PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75
NC_5 I/O8 NC_5 I/O7 T17 T17
5 44 5 44 PCM_A[6] PCMADR[5]/NF_AD[5]/GPIO106 PCMADR[5]/NF_AD[5]/GPIO106
W18 T8 +3.3V_Normal W18 T8
NC_6 I/O7 NC_6 I/O6 PCM_A[7] PCMADR[6]/NF_AD[6]/GPIO107 NF_ALE/GPIO146 PF_ALE PCMADR[6]/NF_AD[6]/GPIO107 NF_ALE/GPIO146
6 43 6 43 U20 T9 U20 T9
PCM_A[8] PCMADR[7]/NF_AD[7]/GPIO108 NF_CEZ/GPIO142 /PF_CE0 PCMADR[7]/NF_AD[7]/GPIO108 NF_CEZ/GPIO142
RY/BY I/O6 R/B I/O5 Y19 U9 IF_AGC Y19 U9
7 42 7 42 PCM_A[9] PCMADR[8]/GPIO113 NF_CLE/GPIO141 /PF_CE1 L101 PCMADR[8]/GPIO113 NF_CLE/GPIO141
AA19 U11 BLM18PG121SN1D AA19 U11
RE I/O5 RE I/O4 PCM_A[10] PCMADR[9]/GPIO115 NF_RBZ/GPIO147 /F_RB PCMADR[9]/GPIO115 NF_RBZ/GPIO147
8 41 8 41 AA20 V9 AA20 V9
PCM_A[11] PCMADR[10]/GPIO119 NF_REZ/GPIO144 /PF_OE IF_AGC IF_AGC PCMADR[10]/GPIO119 NF_REZ/GPIO144
CE NC_25 CE NC_25 W21 U10 R193 C119 W21 U10
9 40 9 40 PCM_A[12] PCMADR[11]/GPIO117 NF_WEZ/GPIO145 /PF_WE 10K 0.1uF PCMADR[11]/GPIO117 NF_WEZ/GPIO145
V20 T10 IF_AGC V20 T10
NC_7 NC_24 NC_7 NC_24 PCM_A[13] PCMADR[12]/GPIO109 NF_WPZ/GPIO199 /PF_WP R196 PCMADR[12]/GPIO109 NF_WPZ/GPIO199
10 39 10 39 Y17 0 Y17
PCM_A[14] PCMADR[13]/GPIO112 IF_AGC_MAIN PCMADR[13]/GPIO112
NC_8 NC_23 NC_8 NC_23 V18 W2 C120 V18 W2
11 38 11 38 PCMADR[14]/GPIO111 IF_AGC CHINA 0.047uF PCMADR[14]/GPIO111 IF_AGC
V19 W1 C115 0.1uF R198 CHINA47 V19 W1
VCC_1 VCC_2 VCC_1 VCC_2 PCM_D[0-7] /PCM_CD PCMCD_N/GPIO135 SIFM 25V PCMCD_N/GPIO135 SIFM
12 37 12 37 W19 W3 C116 0.1uF R199 47 IF_AGC W19 W3
/PCM_CE PCMCE_N/GPIO120 SIFP C123 PCMCE_N/GPIO120 SIFP
VSS_1 VSS_2 VSS_1 VSS_2 PCM_D[0] U18 V2 CHINA CHINA 1000pF U18 V2
13 36 13 36 PCMDATA[0]/GPIO131 IM PCMDATA[0]/GPIO131 IM
PCM_D[1] V16 V1 ANALOG SIF CHINA V16 V1
NC_9 NC_22 NC_9 NC_22 PCMDATA[1]/GPIO132 IP PCMDATA[1]/GPIO132 IP
14 35 14 35 PCM_D[2] W17 Close to MSTAR TU_SIF W17
PCMDATA[2]/GPIO133 R194-*1 PCMDATA[2]/GPIO133
NC_10 NC_21 NC_10 NC_21 PCM_D[3] Y20 AA2 R194 0 TUNER_IF_100_ohm Y20 AA2
15 34 15 34 PCMDATA[3]/GPIO125 XIN IF_N_MSTAR PCMDATA[3]/GPIO125 XIN
PCM_D[4] R15 Y2 TUNER_IF_0_ohm IF OPT 100 R15 Y2
CLE NC_20 CLE NC_20 PCMDATA[4]/GPIO124 XOUT C117 C121 PCMDATA[4]/GPIO124 XOUT
16 33 16 33 PCM_D[5] AA18 0.1uF 100pF DTV_IF AA18
PCMDATA[5]/GPIO123 R195 0 R195-*1 PCMDATA[5]/GPIO123
ALE I/O4 ALE I/O3 PCM_D[6] T15 IF_P_MSTAR TUNER_IF_100_ohm T15
17 32 17 32 PCMDATA[6]/GPIO122 TUNER_IF_0_ohm IF
C118 C122 C124 PCMDATA[6]/GPIO122
PCM_D[7] Y21 0.1uF 33pF 33pF 100 Y21
WE I/O3 WE I/O2 PCMDATA[7]/GPIO121 TU_IF_CAP TU_IF_CAP PCMDATA[7]/GPIO121
18 31 18 31 W20 W20
/PCM_IORD PCMIORD_N/GPIO116 For KR/US models PCMIORD_N/GPIO116
WP I/O2 WP I/O1 V21 Close to MSTAR V21
19 30 19 30 /PCM_IOWR PCMIOWR_N/GPIO114 PCMIOWR_N/GPIO114
Y18 Y18
NC_11 I/O1 NC_11 I/O0 /PCM_IRQA PCMIRQA_N/GPIO110 XTAL_LOAD_22pF PCMIRQA_N/GPIO110
20 29 20 29 T16 T16
/PCM_OE PCMOE_N/GPIO118 PCMOE_N/GPIO118
R17 R17
R187
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
MODEL OPTION +3.3V_Normal
MO_DVB_T2/C/S2 SOC_RESET +3.5V_ST
STby 3.5V Normal Power 3.3V DDR3 1.5V VDDC 1.05V +1.10V_VDDC
+1.10V_VDDC
MO_DUALSTREAM
MO_S/W_EU/AJ
DDR_EXT:256
DDR_EXT:128
1K
1K
1K
1K
1K
1K
1K
L206
1K
MO_S/W_AJ
BLM18PG121SN1D AVDD_NODIE +1.5V_DDR VDDC : 2026mA
MO_M120
+3.3V_Normal VDD33
MO_HD
+1.10V_VDDC +1.10V_VDDC
POWER_DET_RESET C289 C286 C252
+3.5V_ST 10uF 0.1uF 0.1uF AVDD_DDR0:55mA
C296 C210 C279
L204 10uF 0.1uF 0.1uF
R291
R222
R221
R206
R208
R211
R226
R290
0.1uF
0.1uF
0.1uF
BLM18PG121SN1D 10V
10uF
0.1uF
10V
1uF
OPT
0.1uF
0.1uF
0.1uF
0.1uF
10V
10V
0.1uF
1uF
1uF
R201 OPT 100 R266 L207
IF_AGC_SEL MODEL_OPT_0 470
10V
10V
R202 BLM18PG121SN1D AVDD_DMPLL
OPT 100
MODEL_OPT_1
C275
C248
C207
C254
C278
C228
C266
R203 OPT 100
10uF
10uF
OPT C288 C205
C277
C280
C283
MODEL_OPT_2
C284
10uF
C204
10uF
C202 C200 10uF 0.1uF
C209
C235
C245
R204 OPT 100
C255
C259
AUD_LRCH 4.7uF 4.7uF R217
R225 OPT 100 10V 10V 0
MODEL_OPT_4
R228 OPT 100 L208 AVDD_DDR1:55mA
MODEL_OPT_5 SOC_RESET BLM18PG121SN1D AVDD_AU33
R230 OPT 100
MODEL_OPT_6
OPT 100
DDR_EXT:128 or NON
DDR_EXT:256 or NON
1K
1K
1K
1K
1K
MO_DVB_T/C
MO_M120_NON
MO_FHD
R212
R294
R293
R224
R223
R207
R209
R227
MODEL OPTION
PIN NAME PIN NO. LOW HIGH
MODEL_OPT_0 J5 MO_FHD MO_HD
MODEL_OPT_1 H19 MO_S/W_NON_AJ MO_S/W_AJ
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
AUDIO AMP(TI)
R5610
L5600
470
UBW2012-121F
C5611 4700pF
AMP_COIL_ABCO Close to Speaker
0.047uF
C5612
L5605
C5601 10uH
0.1uF
C5613 2200pF
SPK_L+
50V
C5616
0.033uF
50V
R5611
C5609 4700pF +24V_AMP 18
50V
C5608 R5609 C5626 OPT
330pF C5632 C5636
+24V_AMP_CAP
0.047uF 470 C5640 50V 0.1uF 2200pF
C5618 C5620
PVDD_AB_2
PVDD_AB_1
0.1uF 10uF 4.7uF 50V 50V
PLL_FLTP
PLL_FLTM
+3.3V_Normal 50V 35V 50V AMP_LC_0.33uF AMP_LC_0.47uF
SSTIMER
VR_ANA
3216 C5630-*1 C5630
BST_A
OUT_A
0.33uF 0.47uF
AVSS
PBTL
NC_2
NC_1
OPT
C5627
50V 50V C5637 SPEAKER_L
C5633 2200pF
330pF 50V
0.1uF
[EP] 50V
12
11
10
9
8
7
6
5
4
3
2
1
50V
AVDD 13 48 PGND_AB_2 R5612
+3.5V_ST 18
C5604 R5608 2K A_SEL_FAULT PGND_AB_1
THERMAL
14 47
0.1uF MCLK OUT_B
46
49
16V 15 SPK_L-
18K OSC_RES NC_6
16 45 50V L5606
TAS5733
IC5600
R5601 R5607 1% DVSSO 17 44 NC_5 0.033uF 10uH
10K VR_DIG BST_B C5624
AUD_MASTER_CLK 18 43 AMP_COIL_ABCO
R5603 PDN BST_C
19 42
C 100 LRCLK 20 41 NC_4 AMP_COIL_ABCO
OPT C5602 50V
OPT SCLK 40 NC_3 L5604
R5600 B 1000pF C5607 21 0.033uF 10uH
AMP_MUTE Q5600 50V SDIN OUT_C
0.1uF 22 39 C5625
10K MMBT3904(NXP) SPK_R+
SDA 23 38 PGND_CD_2
E
SCL PGND_CD_1 OPT SPEAKER_R
R5613
1/16W
24 37 AMP_LC_0.33uF AMP_LC_0.47uF C5634 C5638
C5631-*1 C5631
25
26
27
28
29
30
31
32
33
34
35
36
0.1uF 2200pF
18
AUD_LRCK 0.33uF
OPT 0.47uF 50V
AUD_SCK 50V 50V 50V
R3405
RESET
STEST
DVDD
DVSS
GND
AGND
VREG
GVDD_OUT
BST_D
PVDD_CD_1
PVDD_CD_2
OUT_D
0 AUD_LRCH C5628
OPT
POWER_DET AMP_SDA 330pF C5639
+24V_AMP 50V 2200pF
AMP_SCL C5635
0.1uF 50V
C5629 50V
C5614
C56151uF 25V
R5614
1/16W
50V 35V 50V
3216
18
C5606 SPK_R-
ZD5600
10uH
OPT
C5610 AMP_COIL_ABCO
0.1uF
16V
WAFER-ANGLE
SPK_L+
4
SPK_L-
3
SPK_R+
2
SPK_R-
1
P5600
DVDD_DDR_CMD/DATA
AVDD_LVDSRX/VDDP
AVDDIO_CMD/DATA/MCLK
1.15V FRC CORE POWER
+1.15V_FRC
+1.15V_FRC
AVDD_MOD
+1.15V_FRC AVDD12_LVDSRX IC6102
Typ 763mA R6146 R6148 MX25L8006EM2I-12G
GPIO1_CFG
GPIO2_CFG
SPI_SCLK
L6103 4.7K 10K
TXB2P
TXB2N
TXBCLKP
TXBCLKN
BLM18SG121TN1D
SPI_DO
SPI_CS
SPI_DI
TXB4P
TXB4N
TXB3P
TXB3N
CS# VCC
C6140 C6141 C6162 C6167 1 8
C6146 C6153 C6161 C6173 C6174 C6180 C6181 SPI_CS
22uF 22uF 2.2uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
10V 10V SO/SIO1 HOLD# R6151
OPT OPT 2 7
SPI_DO
3.3K
GPIO1/SPI1_DI
GPIO2/SPI2_CK
GPIO3/SPI2_DI
GPIO4/SPI3_CK
GPIO5/SPI3_DI
DVDD_DDR_DATA
AVDDL_MOD AVDDL_PREDRV
R6152
WP# SCLK
L6101 L6102 3 6
1%
39K
SPI_SCLK
BLM18SG121TN1D BLM18SG121TN1D
AVDD_DATA0
AVDD_DATA1
R6147
R6145
R6144
R6143
33
GND SI/SIO0
33
33
33
C6145 C6152 C6159 C6160 C6166 C6172 C6176 C6177 C6179 C6182 4 5 SPI_DI
2.2uF 0.1uF 0.1uF 0.1uF 0.1uF 2.2uF 0.1uF 0.1uF 0.1uF 0.1uF
OPT OPT OPT OPT OPT
SPI_DO
SPI_CZ
SPI_CK
SPI_DI
VDDP_2
DVDD_6
DVDD_5
LVACKP
LVACKM
GPIO6
GND_2
LVA0P
LVA0M
LVA1P
LVA1M
LVA2P
LVA2M
URSA8_FLASH_MACRONIX_8M
[EP]
REXT
DVDD_DDR_CMD/DATA
R6153
URSA8_FLASH_WINBOND_8M
0
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
C6144 C6151 C6158 IC6102-*1
2.2uF 0.1uF 0.1uF
W25Q80BVSSIG
GPIO0/SPI1_CK 1 102 LVA3P
GPIO0_CFG TXB1P
DIM0 2 101 LVA3M CS
1 8
VCC
THERMAL TXB1N
DIM1 3 129 100 LVA4P DO[IO1] HOLD[IO3]
TXB0P 2 7
DIM2 4 99 LVA4M
TXB0N %WP[IO2] CLK
3 6
DIM3 5 98 AVDD_MOD_3
AVDD_MOD
GND DI[IO0]
AVDD_LVDSRX/VDDP
AVDD_LVDSRX_1 6 97 AVDDL_MOD_2 AVDDL_MOD
4 5
AVDDIO_CMD/DATA/MCLK
RA1N 9 94 LVB0M
+1.8V_FRC_DDR Typ 235mA RXB1- R6135
TXA4N
100
OPT RA1P 10 93 LVB1P
RXB1+ TXA3P
C6139 C6143
R6154
0
C6150 C6157 C6165 C6171 C6175 C6178 RXB2- R6136
RA2N 11 IC6101 92 LVB1M
TXA3N
22uF
10V
22uF
10V
2.2uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
100
OPT RA2P 12 91 LVB2P TXACLKP
RXB2+
RACKN LVB2M
RXBCK-
RXBCK+
R6137
100
OPT RACKP
13
14
LGE7438(URSA8) 90
89 LVBCKP
TXACLKN
TXA2P
R6158
AVDD_LVDSRX/VDDP
AVDD_LVDSRX_2 20 83 AVDDL_PREDRV_2 AVDDL_PREDRV
0
C6138
22uF
C6142
22uF
C6149 C6156
0.1uF
C6164
0.1uF
C6169
0.1uF
C6170
0.1uF
RB0N 21 82 AVDD_MOD_2 AVDD_MOD
2.2uF RXA0-
10V 10V R6127
100
OPT RB0P 22 81 AVDDL_PREDRV_1 AVDDL_PREDRV
RXA0+
AVDD_MOD RB1N 23 80 LVC0P
RXA1- TXD4P
R6128
R6157 100
OPT RB1P 24 79 LVC0M
RXA1+ TXD4N
0
C6148 C6155 C6163 C6168 RB2N 25 78 LVC1P
0.1uF 0.1uF 0.1uF RXA2- TXD3P
2.2uF R6129
100
OPT RB2P 26 77 LVC1M
RXA2+ TXD3N
RBCKN 27 76 LVC2P TXDCLKP
RXACK- R6130
AVDD_MPLL 100
OPT RBCKP 28 75 LVC2M TXDCLKN
RXACK+
RB3N 29 74 LVCCKP TXD2P
RXA3- R6131
R6156
100
OPT RB3P 30 73 LVCCKM TXD2N
0 RXA3+
C6147 C6154
2.2uF 0.1uF RB4N 31 72 LVC3P
RXA4- TXD1P
R6132
100
OPT RB4P 32 71 LVC3M
RXA4+ TXD1N
AVDD12_LVDSRX
AVDD12_LVDSRX_2 33 70 LVC4P
TXD0P
GPIO29/VSYNC_LIKESPI3 34 69 LVC4M
URSA_MODEL_OPT_0 TXD0N
{PAD_GPIO[2:0]} Debug Slave Address: B8
BOOT_SPI 3b’111 ISP Slave Address: 94 GPIO30/VSYNC_LIKESPI2 35 68 DVDD_3 +1.15V_FRC
URSA_MODEL_OPT_1
GPIO31/VSYNC_LIKESPI1 36 67 AVDDL_MOD_1
URSA8 CONFIGURATION URSA_MODEL_OPT_2 AVDDL_MOD
+3.3V_FRC GPIO32/VSYNC_LIKESPI0 37 66 AVDD_MOD_1
URSA_MODEL_OPT_3 AVDD_MOD
VDDP_1 38 65 LVD0P
AVDD_LVDSRX/VDDP TXC4P
10K
10K
10K
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
R6107
R6111
R6103
GPIO0_CFG
I2CS_SCL
I2CS_SDA
RESET
GND_1
GPIO22/SPI4_CK
GPIO23/SPI4_DI
DVDD_1
AVDD_CMD0
AVDD_CMD1
AVDD_MCLK
DVDD_DDR_CMD
DVDD_2
AVDD_MPLL
XTALO
XTALI
LVD4M
LVD4P
LVD3M
LVD3P
LVDCKM
LVDCKP
LVD2M
LVD2P
LVD1M
LVD1P
LVD0M
GPIO1_CFG
GPIO2_CFG
+3.3V_FRC URSA8_XTAL_LOAD_30pF URSA8_XTAL_LOAD_22pF
C6136-*1 30pF C6136-*2 22pF
URSA8_XTAL_LOAD_30pF URSA8_XTAL_LOAD_22pF
5%
1/16W
2.2K
R6123
5%
1/16W
2.2K
R6124
URSA8_XTAL_LOAD_27pF
URSA8_XTAL_LOAD_27pF
33 R6125
P6101 SCL2_+3.3V_URSA
33 R6126
12505WS-04A00 SDA2_+3.3V_URSA
27pF
27pF
R6109 10K
R6113 10K
R6117 10K
R6105 10K
+3.3V_FRC
OPT
OPT
OPT
URSA5_DEBUG
OPT
1 SW6101
C6136
C6137
JS2235S
R6133
10K URSA_MODEL_OPT_0
2
1 6 URSA_MODEL_OPT_1
URSA/VCOM_SCL URSA/VCOM_SDA
URSA5_DEBUG FRC_RESET URSA_MODEL_OPT_2
R6119 R6121 24MHz
AVDDIO_CMD/DATA/MCLK
DVDD_DDR_CMD/DATA
R6102 22
+1.15V_FRC
+1.15V_FRC
0
AVDD_MPLL
3 SCL2_+3.3V_DB 0 X6101
TXC0N
TXC0P
TXC1N
TXC1P
TXC2N
TXC2P
TXCCLKN
TXC3N
TXC4N
TXCCLKP
TXC3P
10K
10K
R6120 URSA5_DEBUG R6122
4 R6101 22 0 0 1M
SDA2_+3.3V_DB OPT OPT
OPT
OPT
3 4 SDA2_+3.3V_DB R6141
SCL2_+3.3V_DB
R6106
R6114
5
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
CORE +1.15V_FRC +1.8V_FRC TYPICAL 235mA
+3.3V_FRC +1.8V_FRC_DDR
+12V
TYPICAL 763mA +1.15V_FRC
L6302 IC6303
BLM18PG121SN1D AP7173-SPG-13 HF(DIODES)
[EP]
1 8 R1
+3.3V_FRC
THERMAL
C6302 IN OUT R6313
6.2K
10uF IC6302 1%
9
10K 2 7
16V R6309 TPS54327DDAR [EP]GND
POWER_ON/OFF_1 OPT PG FB
R6305 C6308 3 6 R6314
10K R6310 EN VIN 3.9K
330K 1uF 1 8 SS 1%
OPT VCC
R1 10V R6312
THERMAL
5V
12K
C6306 C6310
1%
1uF 3300pF
10V 50V
Vout=0.8*(1+R1/R2)
Switching freq: 700K Vout=0.765*(1+R1/R2)
L6301
EN_FRC_BY_+12V
BLM18PG121SN1D
10K
R6311
C6301
10uF
+3.3V_Normal
IC6301
16V TPS54327DDAR [EP]GND
R6316
10K C6307
EN_FRC_BY_+3.3V_Normal 1uF
EN VIN
25V 1 8
R1
THERMAL
R6302 R6304
33K 220 VFB VBST C6311
9
2 7
1% 1% 0.1uF L6303
16V 3.6uH
VREG5 SW
3 6
C6303
27pF LPB8040T-3R6N
50V OPT OPT
SS GND C6313
R6307
4
3A 5
22uF
10V
C6315
22uF
10V
D6302
5V
4
R6405 0
45 FHD_BEAD_SAMSUNG FHD_BEAD_CSG
46 L6401 L6401-*1
60_SHARP 120 120OHM RXB4+ RXB4+ RXB4- RXB0-
47 R6406 CIS21J121 UBW2012-121F RXB4- RXB4- RXB4+ RXB0+
0
48 RXB3+ RXB0+ RXB0- RXB1-
FHD
49 C6401 RXB3- RXB0- RXB0+ RXB1+
0.1uF
50 16V RXBCK+ RXB1+ RXB1- RXB2-
51 RXBCK- RXB1- RXB1+ RXB2+
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
L14 TUNER_EU T/C_T2/C/S2_CHINA
RF_SW_CSA TU_I2C Multi option
R2603-*1
T3705 TU3704 TU3702 TU3703 TU3701 1K
TU_I2C_FILTER
TDJK-T101F TDJM-K101F TDJM-G105D TDJM-C301D TDJM-G101D RF_SW_NON_CSA
R2603
0
TU_ATSC
C3705-*1
18pF
TU_ATSC
1.8K
R3738-*1
R3716-*1 MLG1005SR27JT
RF_SWITCH_CTL TU_ATSC
TUNER_CSA_H/NIM TUNER_CSA_T2 TUNER_AJ_T2 TUNER_CHINA TUNER_T2/C/S2 +3.3V_LNA TU_ATSC R3717-*1 TU_I2C_FILTER
1.8K R3739-*1
C2603 R3722 C3707-*1 MLG1005SR27JT
0.1uF 20K 18pF
B1[+3.3V] B1[+3.3V] B1[+3.3V] B1[+3.3V] B1[+3.3V] 16V
RF_SW_OPT RF_SW_CSA
1 1 1 1 1
C3708 C3714
RF_S/W_CTL RF_SW_CTL NC_1 RF_SW_CTL NC_1 100pF 0.1uF Close to TUNER
50V 16V
2 2 2 2 2 +3.3V_TU
IF_AGC_CSA
R3714-*1 100
IF_AGC AIF_AGC AIF_AGC NC_1 AIF_AGC should be guarded by ground
3 3 3 3 3 C3703 R3714 IF_AGC_MAIN TU_NON_ATSC TU_NON_ATSC
0.1uF 0
16V IF_AGC_NON_CSA R3716 R3717
SCL SCL_RF SCL_RF SCL_RF SCL_RF IF_AGC TU_I2C_NON_FILTER
R3738 33
1K 1K
4 4 4 4 4 TU_SCL
close to TUNER
NC_3 NC_4 NC_4 NC_4
10 10 10 10 CHINA
AR3700-*1 47
TU_GND_B
B1[+3.3V] D1 D1 D1 D1 FE_TS_DATA[2]
1 18 18 18 18 FE_TS_DATA[3]
T2
NC_1 D2 D2 D2 D2
2 19 19 19 19
IF_AGC D3 D3 D3 D3
3 20 20 20 20
AR3702
0
SCL D4 D4 D4 D4 1/16W
4 21 21 21 21 FE_TS_DATA[4]
+3.3V_LNA +3.3V_TU +3.3V_Normal
FE_TS_DATA[5]
SDA D5 D5 D5 D5 FE_TS_DATA[6]
5 22 22 22 22 FE_TS_DATA[7]
T2 L3701 L3704
7 24 24 24 24
T2_OR_CHINA
NC_2 RESET_DEMOD RESET_DEMOD RESET_DEMOD RESET_DEMOD R3719 IC3701
AP7361-Y-13
8 25 25 25 25 10
DEMOD_RESET
+3.3V_TU +1.2V_DEMOD
T2_OR_CHINA T2_OR_CHINA
C3716 +3.3V_DEMOD R3723
NC_3 B2[+3.3V] B3[+3.3V] B2[+3.3V] B3[+3.3V] 0.1uF 3.3K EN
1 T2_OR_CHINA 5
OUT
9 26 26 26 26 16V
T2_OR_CHINA
T2_OR_CHINA C3725
C3721 C3723 1uF GND T2_OR_CHINA
SCL_DEMOD SCL_DEMOD SCL_DEMOD SCL_DEMOD T2_OR_CHINA 100pF 0.1uF 10V 2 T2_OR_CHINA R3737
1
27 27 27 27 R3711
C3702
22
DEMOD_SCL
50V 16V
T2_OR_CHINA
R3733
12K T2_OR_CHINA
ADJ/NC IN 1% C3737
20pF 3 4 R1
A1 B1 B3[+1.1V] B4[+1.1V] B3[+1.1V] B4[+1.1V] 50V
T2_OR_CHINA
+1.2V_DEMOD 10uF
10V
A1 B1 28 28 28 28 C3713 C3729 T2_OR_CHINA
100pF 0.1uF C3732
T2 50V 16V
47 NC_5 F22_OUTPUT NC_6 F22_OUTPUT R3707 T2_OR_CHINAT2_OR_CHINA
0.1uF
16V
29 29 29 29 0
LNB_TX
TU_GND_A
TU_GND_B
T2_OR_CHINA
SDA_DEMOD SDA_DEMOD SDA_DEMOD SDA_DEMOD T2_OR_CHINA
R3712 22
R3734
TU_GND_A
T2_OR_CHINA
A1 B1 A1 B1 A1 B1 32
TU_GND_B
TU3700-*1
47 47 47
NON_CHINA
NON_CHINA
NON_CHINA
NON_CHINA
NON_CHINA
NON_CHINA
TDJH-H101F
TU_GND_A
TU_GND_B
TU_GND_A
TU_GND_B
TU_GND_A
TU_GND_B
R3708
R3713
R3715
R3718
R3720
R3721
C3712 C3701
TUNER_NTSC 1000pF 1000pF
A1 B1 630V
0
B1[+3.3V] CHINA
630V
1 SHIELD SHIELD SHIELD A1 B1 CHINA_TU_GND_B
NC_1
2
IF_AGC 47
3
TU_GND_A
TU_GND_B
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
L14 Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Contents of LCD TV Standard Repair Process
No. Error symptom (High category) Error symptom (Mid category) Page Remarks
1 No video/Normal audio 1
2 No video/No audio 2
4 Color error 5
* First of all, Check whether there is SVC Bulletin in GCSC System for these model.
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error A. Video error date 2012. 01 .14
LCD TV symptom
No video/ Normal audio Revised date 1/14
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D↔ Power B/D, LVDS Cable, Speaker Cable, IR B/D Cable,,,)
☞A1 ☞A4
Y Y Check Power Y
No video Normal Check Back Light Normal Replace T-con
On Board
Normal audio Audio On with naked eye Voltage Board or module
3.5V, 12V, 24V etc.
N N N
☞A2
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error A. Video error date 2012 . 01 .14
LCD TV symptom
No video/ No audio Revised date 2/14
☞A4
Check various Check and
No Video/ Normal Y
voltages of Power replace
No audio Voltage
Board ( 3.5V,12V, 24V) MAIN B/D
N End
Replace Power
Board and repair
parts
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error A. Video error date 2012. 01 .14
LCD TV symptom
Picture broken/ Freezing Revised date 3/14
N
☞ A6
Check RF Cable
Connection Normal Y Check SVC N Check Normal Y
End
1. Reconnection Picture S/W Version Bulletin Tuner soldering Picture
2. Install Booster
N Y N
Normal N
End
Picture
End
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error A. Video error date 2012. 01 .14
LCD TV symptom
Tuning fail, Picture broken/ Freezing Revised date 4/14
Normal N Normal N
Picture Picture
End Y Y
End End
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error A. Video error date 2012. 01 .14
LCD TV symptom
Color error Revised date 5/14
☞ A8/ A9
☞A7
※ Check and Y
Check color by input
replace Link Y
-External Input Y
Color Cable Color Color
-COMPONENT Replace Main B/D Replace module
error (LVDS) and error error
-RGB
contact
-HDMI/DVI N N N
condition
External Y
Check external
HDMI device/Cable
device and Replace Main B/D
error Normal
cable
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error B. Power error date 2012. 01 .14
LCD TV symptom
No power Revised date 7/14
☞A11 ☞A13
DC Power on Normal N Replace
Check Power Y Check Power Y
by pressing Power Key Operati OK Power
Power LED LED On On ‘”High”
On Remote control on B/D
Stand-By : Red N Y
N
Normal Y
☞A12
※ Normal Normal Y
Y Check ST-BY 3.5V Replace Main B/D
Voltage Voltage
N N
End
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error B. Power error date 2012. 01 .14
LCD TV symptom
Off when on, off while viewing, power auto on/off Revised date 8/14
Check outlet
☞A14
CPU Y
N Check Power Off
Check A/C cord Error Abnorm Replace Main B/D Normal End
Mode
al
Check for all 3- phase Y N
power out Abnorm
al1 Replace Power B/D
☞A13
* Please refer to the all cases which Status Power off List Explanation
can be displayed on power off mode. "POWEROFF_REMOTEKEY" Power off by REMOTE CONTROL
"POWEROFF_OFFTIMER" Power off by OFF TIMER
"POWEROFF_SLEEPTIMER" Power off by SLEEP TIMER
"POWEROFF_INSTOP" Power off by INSTOP KEY
"POWEROFF_AUTOOFF" Power off by AUTO OFF
Normal "POWEROFF_ONTIMER" Power off by ON TIMER
"POWEROFF_RS232C" Power off by RS232C
"POWEROFF_RESREC" Power off by Reservated Record
"POWEROFF_RECEND" Power off by End of Recording
"POWEROFF_SWDOWN" Power off by S/W Download
"POWEROFF_UNKNOWN" Power off by unknown status except listed case
"POWEROFF_ABNORMAL1" Power off by abnormal status except CPU trouble
Abnormal
"POWEROFF_CPUABNORMAL" Power off by CPU Abnormal
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error C. Audio error date 2012. 01 .14
LCD TV symptom
No audio/ Normal video Revised date 9/14
☞A15 ☞A16
Check
Disconn N
Speaker Replace MAIN Board End
ection
disconnection
Y
Replace Speaker
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process
Established
Error C. Audio error date 2012. 01 .14
LCD TV symptom
Wrecked audio/ discontinuation/noise Revised date 10/14
Wrecked Audio/
Discontinuation/Noise Replace Power B/D
only for Analog
Wrecked Audio/
Connect and check
Discontinuation/
other external Replace Main B/D End
Noise only for
device
External Input
(When RF signal is not
received) N
Normal
Request repair to external Audio
cable/ANT provider
Y
(In case of
External Input
signal error) Check and fix external device
Check and fix
external device
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Standard Repair Process
☞A17 Y
☞A17 ☞A17
Replace R/C
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Standard Repair Process
Established
Error D. Function error date 2012. 01 .14
LCD TV symptom
External device recognition error Revised date 12/14
Fix in
Check and fix accordance HDMI, Optical
with technical Replace Main B/D
external device/cable Recognition error
information
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Only for training and service purposes
Standard Repair Process
Established
Error E. Noise date 2012. 01 .14
LCD TV symptom
Circuit noise, mechanical noise Revised date 13/14
※ Mechanical noise is a natural ※ When the nose is severe, replace the module
phenomenon, and apply the 1st level (For models with fix information, upgrade the S/W or
description. When the customer does not provide the description)
agree, apply the process by stage.
OR
※ Describe the basis of the description in ※ If there is a “Tak Tak” noise from the cabinet,
“Part related to nose” in the Owner’s Manual. refer to the KMS fix information and then proceed
as shown in the solution manual
(For models without any fix information, provide
the description)
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Only for training and service purposes
Standard Repair Process
Established
Error F. Exterior defect date 2012. 01 .14
LCD TV symptom
Exterior defect Revised date 14/14
Cabinet
Replace cabinet
damage
Remote
Controller Replace remote controller
damage
Stand
Replace stand
damage
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Contents of LCD TV Standard Repair Process Detail Technical Manual
No. Error symptom Content Page Remarks
1 Check LCD back light with naked eye A1
2 LED driver B+ 24V measuring method A2
A. Video error_ No video/Normal audio
3 Check White Balance value A3
4 Power Board voltage measuring method A4
6 TUNER input signal strength checking method A5
A. Video error_ No video/Video lag/stop
7 LCD-TV Version checking method A6
9
LCD TV connection diagram A7
10
A. Video error_Color error Check Link Cable (LVDS) reconnection A8
11
condition A9
12 Adjustment Test pattern - ADJ Key A10
13 LCD TV connection diagram A8
A. Video error_Vertical/Horizontal bar, Check Link Cable (LVDS) reconnection A8
14
residual image, light spot condition A9
15 Adjustment Test pattern - ADJ Key A10
16 Exchange T-Con Board (1) A-1/5
25
B. Power error_Off when on, off while
26 POWER OFF MODE checking method A14
viewing
Checking method in menu when there is no
28 A15
audio
C. Audio error_No audio/Normal video
Voltage and speaker checking method when
29 A16
there is no audio
C. Audio error_Wrecked Voltage and speaker checking method in
30 A16
audio/discontinuation case of audio error
D. Function error_ No response in
31 Remote controller operation checking method A17
remote controller, key error
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Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/Normal audio date
2012. 01.14
LCD TV Revised
Content Check Back Light On with naked eye date A1
<ALL MODELS>
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Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/Normal audio date
2012. 01 .14
LCD TV Revised
Content Inverter B+ 24V measuring method date A2
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Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/Normal audio date
2012. 01 .14
LCD TV Revised
Content Check White Balance value date A3
<ALL MODELS>
Entry
Entry method
method
1.
1. Press
Press the
the ADJ
ADJ button
button on
on the
the remote
remote controller
controller for
for adjustment.
adjustment.
2.
2. Enter
Enter into
into White
White Balance
Balance of
of item
item 6.
7.
3. After
3. After recording
recording the
the R,
R, G,
G, B
B (GAIN,
(GAIN, Cut)
Cut) value
value of
of Color
Color Temp
Temp (Cool/Medium/Warm),
(Cool/Medium/Warm), re-
re-
enter the value after replacing the MAIN BOARD.
enter the value after replacing the MAIN BOARD.
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/ Audio date
2012. 01 .14
LCD TV Revised
Content Power Board voltage measuring method date A4
SMAW200-H18S5
1 Power on 2 DRV ON
3 3.5V 4 PDIM#1
5 3.5V 6 3.5V
7 GND 8 PDIM#2
9 24V 10 24V
11 GND 12 GND
13 12V 14 12V
15 12V 16 NC
17 GND 18 GND
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_Video error, video lag/stop date
2012. 01 .14
LCD TV Revised
Content TUNER input signal strength checking method A5
date
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_Video error, video lag/stop date
2012. 01 .14
LCD TV Revised
Content LCD-TV Version checking method A6
date
Version
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error A. Video error _Vertical/Horizontal bar, residual Established
symptom 2012. 01 .14
LCD TV image, light spot date
Revised
Content LCD TV connection diagram (1) date A7
<ALL MODELS>
<ALL MODELS>
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom
A. Video error_Color error 2012. 01 .14
LCD TV date
Adjustment Test pattern - ADJ Key Revised
Content date A10
Checking item : 1. Defective pixel 2. Residual image 3. MODULE error (ADD-BAR,SCAN BAR..)
4.Video error (Classification of MODULE or Main-B/D!)
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Appendix : Exchange T-Con Board (1)
Solder defect, CNT Broken Solder defect, CNT Broken Solder defect, CNT Broken
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Only for training and service purposes
Appendix : Exchange T-Con Board (2)
Solder defect, Short/Crack Fuse Open, Abnormal power section Abnormal Display
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Appendix : Exchange PSU(LED driver)
No picture/Sound Ok
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Only for training and service purposes
Appendix : Exchange the Module (1)
Panel Mura, Light leakage Panel Mura, Light leakage Press damage
Un-repairable Cases
In this case please exchange the module.
Press damage
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Only for training and service purposes
Appendix : Exchange the Module (2)
Un-repairable Cases
In this case please exchange the module.
Horizontal Block
Gate TAB IC Defect
Gate TAB IC Defect
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Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom B. Power error _No power date
2012. 01 .14
LCD TV Revised
Content Check front display LED date A11
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Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom B. Power error _No power date
2012. 01 .14
LCD TV Revised
Content Check power input voltage and ST-BY 5V A12
date
SMAW200-H18S5
1 Power on 2 DRV ON
3 3.5V 4 PDIM#1
5 3.5V 6 3.5V
7 GND 8 PDIM#2
9 24V 10 24V
11 GND 12 GND
13 12V 14 12V
15 12V 16 NC
17 GND 18 GND
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Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom B. Power error _No power date
2012. 01 .14
LCD TV Revised
Content Checking method when power is ON date A13
SMAW200-H18S5
1 Power on 2 DRV ON
3 3.5V 4 PDIM#1
5 3.5V 6 3.5V
7 GND 8 PDIM#2
9 24V 10 24V
11 GND 12 GND
13 12V 14 12V
15 12V 16 NC
17 GND 18 GND
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom B. Power error _Off when on, off whiling viewing date
2012. 01 .14
LCD TV Revised
Content POWER OFF MODE checking method date A14
<ALL MODELS>
Checking order
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Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom C. Audio error_No audio/Normal video 2012. 01 .14
LCD TV date
Revised
Content Checking method in menu when there is no audio date A15
<ALL MODELS>
Checking order
1. Press the MENU button on the remote controller
2. Select the AUDIO function of the Menu
3. Select TV Speaker Check
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Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error Established
symptom C. Audio error_No audio/Normal video date
2012. 01 .14
LCD TV Revised
Content Voltage and speaker checking method A16
when there is no audio date
<ALL MODELS>
② SMAW200-H18S5
①
1 Power on 2 DRV ON
3 3.5V 4 PDIM#1
5 3.5V 6 3.5V
7 GND 8 PDIM#2
9 24V 10 24V
11 GND 12 GND ③
13 12V 14 12V
15 12V 16 NC
17 GND 18 GND
< Main Ass’y>
Checking order
1. Check the contact condition of or 24V connector of Main Board
2. Measure the 24V input voltage supplied from Power Board
(If there is no input voltage, remove and check the connector)
3. Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound
when you touch the GND and output terminal, the speaker is normal.
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Only for training and service purposes
Standard Repair Process Detail Technical Manual
Error D. Function error_ No response in remote controller, Established
symptom key error 2012. 01 .14
LCD TV date
Revised
Content Remote controller operation checking method date A17
<ALL MODELS>
P4600
1 GND
2 KEY1
3 KEY2
③
4 3.5V_ST
5 GND
6 LED_R
④ 7 IR
② 8 GND
① < Sub Ass’y>
9 SCL
10 SDA
Checking order
1, 2. Check IR cable condition between IR & Main board.
3. Check the st-by 3.3V on the terminal 4.
4. When checking the Pre-Amp when the power is in ON condition, it is normal when the Analog
Tester needle moves slowly, and defective when it does not move at all.
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