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1 1

Compal Confidential
2 2

VAL40 MB Schematic Document


LA-8226P
www.rosefix.com
3 3

Rev: 1.0
2012.07.06

4 4

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 1 of 58
A B C D E
1 2 3 4 5

Compal Confidential
ZZZ1 VAL40
PCB-MB
PCB P/N for Load BOM
DDR3 1333/1600MHz 1.5V DDR3-SO-DIMM X 2
A
DA80000V100 Intel BANK 0, 1, 2, 3
+1.5V, +0.75VS A

NV Dual Channel Page 10, 11


PEG 16X Ivy Bridge ULV
N13M-GE1
Gb1B-64 Processor
BGA 1023
23x23mm
Page 4 ~ 9
Page 20 ~ 28 +VCC_CORE, +VCCP,
+VCC_GFXCORE_AVG, +1.5V_CPU_VDDQ,
+1.8VS, _VCCSA port 2
USB conn x1
USB Board Page 33
FDI x8
DMI x4
(UMA) 100MHz port 11
100MHz Camera
5GB/s
2.7GT/s Page 30

LCD conn LVDS, EDID, DISPOFF#, PWM USB2.0


Page 30
port 3 Card Reader Memory Card Slot
SD/MMC
RTS5137 Page 34
RGB, HV Sync, DDC Page 34
CRT Conn
B
Page 30 Intel port 10
B

MiniCard-1
HDMI, DDC
PANTHER-POINT Page 40

HDMI PCH
Page 35
port 0,1
USB3.0 conn x2
USB3.0 port 1,2
Page 36
HM76
Audio Jack (HP)
Page 33

Azalia Realtek
FCBGA 989 Balls ALC269 Page 33 Audio Jack (MIC)
Page 33

Page 12 ~ 19 SATA
Speaker Connector
Page 33
C C
port 0
PCI-e 2.5" SATA HDD Connector
Page 31
+1.05VS, +1.8VS, +3VS,
port 1 port 2 +3V_PCH, +5V_PCH, +RTCVCC,
+VCCAFDI_VRM
LAN/CRT Board Mini Card-1 port 2
SATA ODD Connector
10/100/1000 LAN WLAN Page 31
Realtek GbE Bluetooth
RTL8111F Page 32 Page 40

SPI SPI ROM 8MB


Page 12

LPC BUS

External board Click Pad CONN. ENE KB9012QF Int. KBD


D D
Page 38 Page 38
+3VLP/+3VALW page 39
DC/DC Interface CKT. LS-8221P

www.vinafix.vn
Page 29,41 USB/B Page 33

LS-8227P
Security Classification Compal Secret Data Compal Electronics, Inc.
Fan Control Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

Page 37 MIC/B Page 30 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 2 of 58
1 2 3 4 5
A

BTO Option Table VRAMX8X8


BOM Structure BTO Item ZZZ7 X76L07@ CLKOUT DESTINATION USB3 PORT DESTINATION USB2 PORT DESTINATION
DIS@ VGA componet
GE8@ N13M-GE1_GB1b-64
PCI0 PCH_LOOPBACK 1 USB2.0+3.0 0 USB2.0+3.0
X76L07@ VRAM Hynix 2Gbx8 256Mx8
VRAM 2G HYN
GCLK@ G-CLK
PCI1 EC PCH 2 USB2.0+3.0 1 USB2.0+3.0
GCLKDIS@ G-CLK + SLG3NB300 N13M-GE1 x8
GCLKUMA@ G-CLK + SLG3NB244 U10 GE8@ PCI2 None 3 None 2 USB2
NONGCLK@ NONE G-CLK
AI@ AI Charger
PCI3 LPC Debug Port 4 None 3 Card Reader
NAI@ Non AI Charger
N13M-GE1 GB1b x8
46@ HDMI royalty rule
PCI4 None 4 None
I33110@ CPU BGA i3-3110M 2.4G/3M
I32370@ CPU BGA i3-2370M 2.4G/3M
5 None
I32350@ CPU BGA i3-2350M 2.3G/3M
Voltage Rails
CPU 6 None
Power Plane Description S0 S3 Deep S5
S3
CPU BOM Config UCPU1 I33110@ VIN Adapter power supply (19V) N/A N/A N/A N/A PCH 7 None
BATT+ Battery power supply (12.6V) N/A N/A N/A N/A
I33310@ i3-3110M CR 2.4G SA00005M830 (INT I3-3110M 2.4G/3M SR0N2 BGA) B+ AC or battery power rail for power circuit N/A N/A N/A N/A 8 None
I32370@ i3-2370M HR 2.4G SA000059I60 (INT I3-2370M 2.4G/3M SR0DQ BGA) i3-3110M +3VLP 3.3V power rail for 51ON power management ON ON ON ON
I32350@ i3-2350M HR 2.3G SA00004QXA0 (INT I3-2350M 2.3G/3M SR0DQ BGA) +3VALW 3.3V always on power rail ON ON ON AC/ON; DC/OFF 9 None
UCPU1 I32370@ +LAN_IO 3.3V power rail for ethernet ON ON OFF OFF

BOM Config : DIS +3VS_WLAN 3.3V power rail for WLAN/BT Combo ON OFF OFF OFF 10 JMINI1 (WLAN) Bluetooth
+3V_PCH 3.3V power rail for PCH suspend well plane ON ON OFF OFF
K45B(i3-3110M) DIS@/GE8@/X7607@/GCLK@/GCLKDIS@/I33110@/NAI@ i3-2370M 11 CAMERA
+3VS 3.3V power rail for DDR SPI,PCH,HDD,Audio,Card Reader ON OFF OFF OFF
* K45B(i3-2370M) DIS@/GE8@/X7607@/GCLK@/GCLKDIS@/I32370@/NAI@ UCPU1 I32350@
+3VSG 3.3V power rail for VGA ON OFF OFF OFF
+LCDVDD 3.3V power rail for LCD ON OFF OFF OFF 12 None
+5VALW 5V always on power rail ON ON ON AC/ON; DC/OFF
BOM Config : UMA +5V_PCH 5V power rail for PCH suspend well plane ON ON OFF OFF 13 None
i3-2350M
+5VS 5V power rail for HDD,AUDIO,FAN,Touch PAD ON OFF OFF OFF
K45B(i3-3110M) GCLK@/GCLKUMA@/I33110@/NAI@
+5VS_ODD 5V power rail for SATA ODD ON OFF OFF OFF
K45B(i3-2370M) GCLK@/GCLKUMA@/I32370@/NAI@ +1.8VS 1.8V power rail for CPU,PCH ON OFF OFF OFF
+1.05VS 1.05V power rail for PCH ON OFF OFF OFF
* K45B(i3-2350M) GCLK@/GCLKUMA@/I32350@/NAI@
+VCCP 1.05V power rail for CPU VCCIO,PCH ON OFF OFF OFF
+1.05VSG 1.05V power rail for N13P ON OFF OFF OFF
1 1

+1.5V 1.5V power rail for DDR3 system memory ON ON ON OFF


+1.5V_CPU_VDDQ 1.5V power rail CPU VDDQ ON OFF OFF OFF
+1.5VSG 1.5V power rail for N13P,VRAM ON OFF OFF OFF
SMBUS Control Table
+1.5VS 1.5V power rail for PCH,WLAN/BT combo ON OFF OFF OFF
+0.75VS 0.75V power rail for DDR VREF ON OFF OFF OFF
SOURCE MINI1 BATT PCH EC SODIMM DGPU
+VCCSA VCCSA for CPU system agent ON OFF OFF OFF
+VCC_CORE CORE Voltage for CPU ON OFF OFF OFF
EC_SMB_CK1
EC_SMB_DA1
KB930 X V X X X X +VCC_GFXCORE_AXG 1.5V power rail for N13P,VRAM ON OFF OFF OFF
+VGA_CORE CORE Voltage for N13P Graphics ON OFF OFF ON OFF OFF OFF
EC_SMB_CK2
EC_SMB_DA2
KB930 X X V X X V
PCH_SMBCLK PCI EXPRESS DESTINATION
PCH_SMBDATA PCH
V X X X V X SATA DESTINATION

SATA0 HDD Lane 1 10/100/1G LAN


PCH_SMLCLK
PCH_SMLDATA PCH
X X X V X V Lane 2 MINI CARD WLAN
SATA1 None
Lane 3 None
DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION SATA2 ODD

CLKOUT_PCIE0 10/100/1G LAN CLKOUTFLEX0 CLK_SD_48M SATA3 None Lane 4 USB3.0 controller

Lane 5 None
CLKOUT_PCIE1 MINI CARD WLAN CLKOUTFLEX1 None SATA4 None
Lane 6 None
CLKOUT_PCIE2 None CLKOUTFLEX2 None SATA5 None
Lane 7 None
CLK CLKOUT_PCIE3 USB3.0 controller CLKOUTFLEX3 None
Lane 8 None
CLKOUT_PCIE4 None

CLKOUT_PCIE5 None

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CLKOUT_PCIE6 None

CLKOUT_PCIE7 None Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

CLKOUT_PEG_B None THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 3 of 58
A
5 4 3 2 1

+1.05VS

1
UCPU1I
R1 PEG_ICOMPI and RCOMPO signals should be shorted and routed
24.9_0402_1% with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
BG17 M4
- typical impedance = 14.5 mohms

2
UCPU1A BG21 VSS[181] VSS[250] M58
D G3 PEG_COMP BG24 VSS[182] VSS[251] M6 D
PEG_ICOMPI G1 BG28 VSS[183] VSS[252] N1
M2 PEG_ICOMPO G4 12 mils BG37 VSS[184] VSS[253] N17
14 DMI_CRX_PTX_N0 DMI_RX#[0] PEG_RCOMPO VSS[185] VSS[254]
P6 BG41 N21
14 DMI_CRX_PTX_N1 DMI_RX#[1] VSS[186] VSS[255]
P1 BG45 N25
14 DMI_CRX_PTX_N2 DMI_RX#[2] 20
PCIE_GTX_C_CRX_N[0..15] VSS[187] VSS[256]
P10 H22 PCIE_GTX_CRX_N15 DIS@ C1 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N15 BG49 N28
14 DMI_CRX_PTX_N3 DMI_RX#[3] PEG_RX#[0] VSS[188] VSS[257]
J21 PCIE_GTX_CRX_N14 DIS@ C2 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N14 BG53 N33
N3 PEG_RX#[1] B22 PCIE_GTX_CRX_N13 DIS@ C3 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N13 BG9 VSS[189] VSS[258] N36
14 DMI_CRX_PTX_P0 DMI_RX[0] PEG_RX#[2] VSS[190] VSS[259]
P7 D21 PCIE_GTX_CRX_N12 DIS@ C4 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N12 C29 N40
14 DMI_CRX_PTX_P1 DMI_RX[1] PEG_RX#[3] VSS[191] VSS[260]

DMI
P3 A19 PCIE_GTX_CRX_N11 DIS@ C5 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N11 C35 N43
14 DMI_CRX_PTX_P2 DMI_RX[2] PEG_RX#[4] VSS[192] VSS[261]
P11 D17 PCIE_GTX_CRX_N10 DIS@ C6 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N10 C40 N47
14 DMI_CRX_PTX_P3 DMI_RX[3] PEG_RX#[5] VSS[193] VSS[262]
B14 PCIE_GTX_CRX_N9 DIS@ C7 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N9 D10 N48
K1 PEG_RX#[6] D13 PCIE_GTX_CRX_N8 DIS@ C8 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N8 D14 VSS[194] VSS[263] N51
14 DMI_CTX_PRX_N0 DMI_TX#[0] PEG_RX#[7] VSS[195] VSS[264]
M8 A11 PCIE_GTX_CRX_N7 DIS@ C9 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N7 D18 N52
14 DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8] VSS[196] VSS[265]
N4 B10 PCIE_GTX_CRX_N6 DIS@ C10 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N6 D22 N56
14 DMI_CTX_PRX_N2 DMI_TX#[2] PEG_RX#[9] VSS[197] VSS[266]
R2 G8 PCIE_GTX_CRX_N5 DIS@ C11 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N5 D26 N61
14 DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] VSS[198] VSS[267]
A8 PCIE_GTX_CRX_N4 DIS@ C12 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N4 D29 P14
K3 PEG_RX#[11] B6 PCIE_GTX_CRX_N3 DIS@ C13 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N3 D35 VSS[199] VSS[268] P16
14 DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12] VSS[200] VSS[269]
M7 H8 PCIE_GTX_CRX_N2 DIS@ C14 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N2 D4 P18
14 DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13] VSS[201] VSS[270]
P4 E5 PCIE_GTX_CRX_N1 DIS@ C15 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N1 D40 P21
14 DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] VSS[202] VSS[271]
T3 K7 PCIE_GTX_CRX_N0 DIS@ C16 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_N0 D43 P58
14 DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15]

PEG_RX[0]
K22 PCIE_GTX_CRX_P15 DIS@ C17 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P15
20
PCIE_GTX_C_CRX_P[0..15]
D46
D50
VSS[203]
VSS[204]
VSS[205]
VSS VSS[272]
VSS[273]
VSS[274]
P59
P9
K19 PCIE_GTX_CRX_P14 DIS@ C18 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P14 D54 R17
PEG_RX[1] C21 PCIE_GTX_CRX_P13 DIS@ C19 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P13 D58 VSS[206] VSS[275] R20
FDI_CTX_PRX_N0 U7 PEG_RX[2] D19 PCIE_GTX_CRX_P12 DIS@ C20 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P12 D6 VSS[207] VSS[276] R4
14 FDI_CTX_PRX_N0 FDI0_TX#[0] PEG_RX[3] VSS[208] VSS[277]
FDI_CTX_PRX_N1 W11 C19 PCIE_GTX_CRX_P11 DIS@ C21 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P11 E25 R46
14 FDI_CTX_PRX_N1 FDI0_TX#[1] PEG_RX[4] VSS[209] VSS[278]
FDI_CTX_PRX_N2 W1 D16 PCIE_GTX_CRX_P10 DIS@ C22 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P10 E29 T1
14 FDI_CTX_PRX_N2 FDI0_TX#[2] PEG_RX[5] VSS[210] VSS[279]
FDI_CTX_PRX_N3 AA6 C13 PCIE_GTX_CRX_P9 DIS@ C23 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P9 E3 T47
14 FDI_CTX_PRX_N3 FDI0_TX#[3] PEG_RX[6] VSS[211] VSS[280]
FDI_CTX_PRX_N4 W6 D12 PCIE_GTX_CRX_P8 DIS@ C24 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P8 E35 T50
14 FDI_CTX_PRX_N4 FDI1_TX#[0] PEG_RX[7] VSS[212] VSS[281]
FDI_CTX_PRX_N5 V4 C11 PCIE_GTX_CRX_P7 DIS@ C25 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P7 E40 T51

PCI EXPRESS -- GRAPHICS


14 FDI_CTX_PRX_N5 FDI1_TX#[1] PEG_RX[8] VSS[213] VSS[282]
FDI_CTX_PRX_N6 Y2 C9 PCIE_GTX_CRX_P6 DIS@ C26 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P6 F13 T52
C 14 FDI_CTX_PRX_N6 FDI1_TX#[2] PEG_RX[9] VSS[214] VSS[283] C
FDI_CTX_PRX_N7 AC9 F8 PCIE_GTX_CRX_P5 DIS@ C27 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P5 F15 T53
14 FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10] VSS[215] VSS[284]
Intel(R) FDI
C8 PCIE_GTX_CRX_P4 DIS@ C28 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P4 F19 T55
PEG_RX[11] C5 PCIE_GTX_CRX_P3 DIS@ C29 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P3 F29 VSS[216] VSS[285] T56
FDI_CTX_PRX_P0 U6 PEG_RX[12] H6 PCIE_GTX_CRX_P2 DIS@ C30 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P2 F35 VSS[217] VSS[286] U13
14 FDI_CTX_PRX_P0 FDI0_TX[0] PEG_RX[13] VSS[218] VSS[287]
FDI_CTX_PRX_P1 W10 F6 PCIE_GTX_CRX_P1 DIS@ C31 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P1 F40 U8
14 FDI_CTX_PRX_P1 FDI0_TX[1] PEG_RX[14] VSS[219] VSS[288]
FDI_CTX_PRX_P2 W3 K6 PCIE_GTX_CRX_P0 DIS@ C32 1 2 0.22U_0402_10V6K PCIE_GTX_C_CRX_P0 F55 V20
14 FDI_CTX_PRX_P2 FDI0_TX[2] PEG_RX[15] VSS[220] VSS[289]
FDI_CTX_PRX_P3 AA7 G51 V61
14 FDI_CTX_PRX_P3 FDI0_TX[3] 20
PCIE_CTX_C_GRX_N[0..15] VSS[221] VSS[290]
FDI_CTX_PRX_P4 W7 G22 PCIE_CTX_GRX_N15 DIS@ C33 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N15 G6 W13
14 FDI_CTX_PRX_P4 FDI1_TX[0] PEG_TX#[0] VSS[222] VSS[291]
FDI_CTX_PRX_P5 T4 C23 PCIE_CTX_GRX_N14 DIS@ C34 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N14 G61 W15
14 FDI_CTX_PRX_P5 FDI1_TX[1] PEG_TX#[1] VSS[223] VSS[292]
FDI_CTX_PRX_P6 AA3 D23 PCIE_CTX_GRX_N13 DIS@ C35 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N13 H10 W18
14 FDI_CTX_PRX_P6 FDI1_TX[2] PEG_TX#[2] VSS[224] VSS[293]
FDI_CTX_PRX_P7 AC8 F21 PCIE_CTX_GRX_N12 DIS@ C36 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N12 H14 W21
14 FDI_CTX_PRX_P7 FDI1_TX[3] PEG_TX#[3] VSS[225] VSS[294]
H19 PCIE_CTX_GRX_N11 DIS@ C37 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N11 H17 W46
+1.05VS FDI_FSYNC0 AA11 PEG_TX#[4] C17 PCIE_CTX_GRX_N10 DIS@ C38 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N10 H21 VSS[226] VSS[295] W8
14 FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5] VSS[227] VSS[296]
FDI_FSYNC1 AC12 K15 PCIE_CTX_GRX_N9 DIS@ C39 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N9 H4 Y4
14 FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] VSS[228] VSS[297]
F17 PCIE_CTX_GRX_N8 DIS@ C40 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N8 H53 Y47
FDI_INT U11 PEG_TX#[7] F14 PCIE_CTX_GRX_N7 DIS@ C41 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N7 H58 VSS[229] VSS[298] Y58
14 FDI_INT FDI_INT PEG_TX#[8] VSS[230] VSS[299]
A15 PCIE_CTX_GRX_N6 DIS@ C42 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N6 J1 Y59
PEG_TX#[9] VSS[231] VSS[300]
1

FDI_LSYNC0 AA10 J14 PCIE_CTX_GRX_N5 DIS@ C43 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N5 J49 G48
14 FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] VSS[232] VSS[301]
R2 FDI_LSYNC1 AG8 H13 PCIE_CTX_GRX_N4 DIS@ C44 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N4 J55
14 FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] VSS[233]
M10 PCIE_CTX_GRX_N3 DIS@ C45 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N3 K11
24.9_0402_1% PEG_TX#[12] F10 PCIE_CTX_GRX_N2 DIS@ C46 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N2 K21 VSS[234]
PEG_TX#[13] D9 PCIE_CTX_GRX_N1 DIS@ C47 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N1 K51 VSS[235]
2

PEG_TX#[14] J4 PCIE_CTX_GRX_N0 DIS@ C48 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_N0 K8 VSS[236] A5


EDP_COMP AF3 PEG_TX#[15] L16 VSS[237] VSS_NCTF_1 A57
eDP_COMPIO 20
PCIE_CTX_C_GRX_P[0..15] VSS[238] VSS_NCTF_2
AD2 F22 PCIE_CTX_GRX_P15 DIS@ C49 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P15 L20 BC61
AG11 eDP_ICOMPO PEG_TX[0] A23 PCIE_CTX_GRX_P14 DIS@ C50 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P14 L22 VSS[239] VSS_NCTF_3 BD3
eDP_HPD# PEG_TX[1] D24 PCIE_CTX_GRX_P13 DIS@ C51 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P13 L26 VSS[240] VSS_NCTF_4 BD59
eDP_COMPIO PEG_TX[2] E21 PCIE_CTX_GRX_P12 DIS@ C52 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P12 L30 VSS[241] VSS_NCTF_5 BE4

NCTF
AG4 PEG_TX[3] G19 PCIE_CTX_GRX_P11 DIS@ C53 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P11 L34 VSS[242] VSS_NCTF_6 BE58
and ICOMPO eDP_AUX# PEG_TX[4] VSS[243] VSS_NCTF_7
signals AF4 B18 PCIE_CTX_GRX_P10 DIS@ C54 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P10 L38 BG5
eDP_AUX PEG_TX[5] K17 PCIE_CTX_GRX_P9 DIS@ C55 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P9 L43 VSS[244] VSS_NCTF_8 BG57
should be PEG_TX[6] VSS[245] VSS_NCTF_9
eDP

G17 PCIE_CTX_GRX_P8 DIS@ C56 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P8 L48 C3


B shorted AC3 PEG_TX[7] E14 PCIE_CTX_GRX_P7 DIS@ C57 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P7 L61 VSS[246] VSS_NCTF_10 C58 B
near balls AC4 eDP_TX#[0] PEG_TX[8] C15 PCIE_CTX_GRX_P6 DIS@ C58 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P6 M11 VSS[247] VSS_NCTF_11 D59
and routed AE11 eDP_TX#[1] PEG_TX[9] K13 PCIE_CTX_GRX_P5 DIS@ C59 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P5 M15 VSS[248] VSS_NCTF_12 E1
AE7 eDP_TX#[2] PEG_TX[10] G13 PCIE_CTX_GRX_P4 DIS@ C60 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P4 VSS[249] VSS_NCTF_13 E61
with eDP_TX#[3] PEG_TX[11] VSS_NCTF_14
typical K10 PCIE_CTX_GRX_P3 DIS@ C61 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P3
AC1 PEG_TX[12] G10 PCIE_CTX_GRX_P2 DIS@ C62 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P2
impedance AA4 eDP_TX[0] PEG_TX[13] D8 PCIE_CTX_GRX_P1 DIS@ C63 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P1
<25 mohms AE10 eDP_TX[1] PEG_TX[14] K4 PCIE_CTX_GRX_P0 DIS@ C64 1 2 0.22U_0402_10V6K PCIE_CTX_C_GRX_P0
AE6 eDP_TX[2] PEG_TX[15]
eDP_TX[3] IVY-BRIDGE_BGA1023
@
IVY-BRIDGE_BGA1023
@
ER01

ER01

A A

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(1/6) DMI,FDI,PEG
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 4 of 58
5 4 3 2 1
5 4 3 2 1

+3V_PCH

Processor Pullups ER03

+1.05VS

0_0402_5%
R576
1
H_PROCHOT# 62_0402_5% 2 R16
D D

1
+3VS
+1.5V_CPU_VDDQ

0.1U_0402_16V4Z~D
1
1

1
C65
@ 1 2 H_PECI R3
C68 100P_0402_50V8J 10K_0402_5% R4
200_0402_1%
2

5
U1

2
Reserve for EMI please close to JCPU1 R9 1 2 S_PWG 1

P
14 SYSTEM_PWROK A
@ 0_0402_5% 4 VDDPWRGOOD
1 2 D_PWG 2 O
14 PM_DRAM_PWRGD B

G
R11 0_0402_5%
R14 74AHC1G09GW TSSOP 5P

3
1 2
+3V_PCH
200_0402_1%

+3VS +1.05VS

UCPU1B

0.1U_0402_16V4Z

1
J3 CLK_CPU_DMI_R R18 1 2 0_0402_5% 1
BCLK H2 CLK_CPU_DMI#_R 1 2 0_0402_5% CLK_CPU_DMI 13
R19 R15
BCLK# CLK_CPU_DMI# 13

MISC

C69
75_0402_5%

CLOCKS
F49
16 H_SNB_IVB# PROC_SELECT# 2
AG3 CLK_CPU_DPLL_R

2
DPLL_REF_CLK AG1 CLK_CPU_DPLL#_R
DPLL_REF_CLK#

1
C C57 C
PROC_DETECT# U2 R17

P
NC
2 4 BUFO_CPU_RST# 1 2 BUF_CPU_RST#
15,32,39,40 PLT_RST# A Y 43_0402_1%

G
PAD T1 @ H_CATERR# C49 SN74LVC1G07DCKR_SC70-5

3
CATERR#

1
@

THERMAL
R20
0_0402_5%
H_PECI A48 AT30 H_DRAMRST#
39 H_PECI PECI SM_DRAMRST# H_DRAMRST# 6

2
R23 BF44 SM_RCOMP0
SM_RCOMP[0]

DDR3
MISC
1 2 H_PROCHOT#_R C45 BE43 SM_RCOMP1
39 H_PROCHOT# PROCHOT# SM_RCOMP[1]
56_0402_5% BG43 SM_RCOMP2
SM_RCOMP[2]

H_THERMTRIP# D45 +1.05VS


16 H_THERMTRIP# THERMTRIP# R21
CLK_CPU_DPLL#_R 1 2 1K_0402_1%
N53 XDP_PRDY# CLK_CPU_DPLL_R 1 2 1K_0402_1%
PRDY# N55 XDP_PREQ# R22
PREQ#
L56 XDP_TCK
TCK L55 XDP_TMS
TMS
PWR MANAGEMENT

J58 XDP_TRST#
TRST#
JTAG & BPM

H_PM_SYNC C48 M60 XDP_TDI_R


14 H_PM_SYNC PM_SYNC TDI L59 XDP_TDO_R
TDO
R684
H_CPUPWRGD1 2 H_CPUPWRGD_R B46
B 16 H_CPUPWRGD UNCOREPWRGOOD +3VS B
33_0402_5% K58 XDP_DBRESET#_R11 R37 2 0_0402_5% PU/PD for JTAG signals
DBR# 14
XDP_DBRESET#_R
R36 XDP_DBRESET#_R11K_0402_5% 1 2 R24 +1.05VS
VDDPWRGOOD 1 2 VDDPWRGOOD_R BE45 G58
130_0402_1% SM_DRAMPWROK BPM#[0] E55
BPM#[1] E59
BPM#[2] G55 H_CPUPWRGD_R 10K_0402_5%
10K_0402_5%1 2 R25 XDP_TMS 51_0402_5% 1 2 R26
BPM#[3] G59
BUF_CPU_RST# D44 BPM#[4] H60 XDP_TDI_R 51_0402_5% 1 2 R27
RESET# BPM#[5] J59
BPM#[6] J61 XDP_PREQ# 51_0402_5% 1 @ 2 R28
BPM#[7]
XDP_TDO_R 51_0402_5% 1 2 R29

DDR3 Compensation Signals


XDP_TCK 51_0402_5% 1 2 R32
IVY-BRIDGE_BGA1023
@ XDP_TRST# 51_0402_5% 1 2 R33
ER01 SM_RCOMP0 140_0402_1%
140_0402_1%1 2 R34
@ 1 2 H_DRAMRST#
C70 100P_0402_50V8J SM_RCOMP1 25.5_0402_1%1 2 R38

SM_RCOMP2 200_0402_1%
200_0402_1%1 2 R39

Reserve for EMI please close to JCPU1

@ 1 2 VDDPWRGOOD_R
C72 100P_0402_50V8J @ 1 2 XDP_DBRESET#_R1
C71 100P_0402_50V8J
A A

Reserve for EMI please close to JCPU1


Reserve for EMI please close to JCPU1

www.vinafix.vn
@ 1 2 BUF_CPU_RST#
1 2 H_CPUPWRGD_R C426 100P_0402_50V8J
C421 100P_0402_50V8J
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title
Reserve for EMI please close to JCPU1
Reserve for EMI please close to JCPU1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(2/6) PM,XDP,CLK
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 5 of 58
5 4 3 2 1
5 4 3 2 1

UCPU1C
10 DDR_A_D[0..63]
UCPU1D
D DDR_A_D0 AG6 11 D
SA_DQ[0] DDR_B_D[0..63]
DDR_A_D1 AJ6 AU36 10
SA_DQ[1] SA_CK[0] DDRA_CLK0
DDR_A_D2 AP11 AV36 10 DDR_B_D0 AL4
SA_DQ[2] SA_CK#[0] DDRA_CLK0# SB_DQ[0]
DDR_A_D3 AL6 AY26 10 DDR_B_D1 AL1 BA34 11
SA_DQ[3] SA_CKE[0] DDRA_CKE0 SB_DQ[1] SB_CK[0] DDRB_CLK0
DDR_A_D4 AJ10 DDR_B_D2 AN3 AY34 11
SA_DQ[4] SB_DQ[2] SB_CK#[0] DDRB_CLK0#
DDR_A_D5 AJ8 DDR_B_D3 AR4 AR22 11
SA_DQ[5] SB_DQ[3] SB_CKE[0] DDRB_CKE0
DDR_A_D6 AL8 DDR_B_D4 AK4
DDR_A_D7 AL7 SA_DQ[6] DDR_B_D5 AK3 SB_DQ[4]
DDR_A_D8 AR11 SA_DQ[7] DDR_B_D6 AN4 SB_DQ[5]
DDR_A_D9 AP6 SA_DQ[8] AT40 DDR_B_D7 AR1 SB_DQ[6]
SA_DQ[9] SA_CK[1] DDRA_CLK1 10 SB_DQ[7]
DDR_A_D10 AU6 AU40 10 DDR_B_D8 AU4
SA_DQ[10] SA_CK#[1] DDRA_CLK1# SB_DQ[8]
DDR_A_D11 AV9 BB26 10 DDR_B_D9 AT2 BA36 11
SA_DQ[11] SA_CKE[1] DDRA_CKE1 SB_DQ[9] SB_CK[1] DDRB_CLK1
DDR_A_D12 AR6 DDR_B_D10 AV4 BB36 11
SA_DQ[12] SB_DQ[10] SB_CK#[1] DDRB_CLK1#
DDR_A_D13 AP8 DDR_B_D11 BA4 BF27 11
SA_DQ[13] SB_DQ[11] SB_CKE[1] DDRB_CKE1
DDR_A_D14 AT13 DDR_B_D12 AU3
DDR_A_D15 AU13 SA_DQ[14] DDR_B_D13 AR3 SB_DQ[12]
DDR_A_D16 BC7 SA_DQ[15] DDR_B_D14 AY2 SB_DQ[13]
DDR_A_D17 BB7 SA_DQ[16] BB40 DDR_B_D15 BA3 SB_DQ[14]
SA_DQ[17] SA_CS#[0] DDRA_SCS0# 10 SB_DQ[15]
DDR_A_D18 BA13 BC41 10 DDR_B_D16 BE9
SA_DQ[18] SA_CS#[1] DDRA_SCS1# SB_DQ[16]
DDR_A_D19 BB11 DDR_B_D17 BD9 BE41 11
SA_DQ[19] SB_DQ[17] SB_CS#[0] DDRB_SCS0#
DDR_A_D20 BA7 DDR_B_D18 BD13 BE47 11
SA_DQ[20] SB_DQ[18] SB_CS#[1] DDRB_SCS1#
DDR_A_D21 BA9 DDR_B_D19 BF12
DDR_A_D22 BB9 SA_DQ[21] DDR_B_D20 BF8 SB_DQ[19]
DDR_A_D23 AY13 SA_DQ[22] DDR_B_D21 BD10 SB_DQ[20]
DDR_A_D24 AV14 SA_DQ[23] AY40 DDR_B_D22 BD14 SB_DQ[21]
SA_DQ[24] SA_ODT[0] DDRA_ODT0 10 SB_DQ[22]
DDR_A_D25 AR14 BA41 10 DDR_B_D23 BE13
SA_DQ[25] SA_ODT[1] DDRA_ODT1 SB_DQ[23]
DDR_A_D26 AY17 DDR_B_D24 BF16 AT43 11
SA_DQ[26] SB_DQ[24] SB_ODT[0] DDRB_ODT0
DDR_A_D27 AR19 DDR_B_D25 BE17 BG47 11
SA_DQ[27] SB_DQ[25] SB_ODT[1] DDRB_ODT1
DDR_A_D28 BA14 DDR_B_D26 BE18
DDR_A_D29 AU14 SA_DQ[28] DDR_B_D27 BE21 SB_DQ[26]
DDR_A_D30 BB14 SA_DQ[29] DDR_B_D28 BE14 SB_DQ[27]
SA_DQ[30] 10
DDR_A_DQS#[0..7] SB_DQ[28]
DDR_A_D31 BB17 AL11 DDR_A_DQS#0 DDR_B_D29 BG14
DDR_A_D32 BA45 SA_DQ[31] SA_DQS#[0] AR8 DDR_A_DQS#1 DDR_B_D30 BG18 SB_DQ[29]
SA_DQ[32] SA_DQS#[1] SB_DQ[30] 11
DDR_B_DQS#[0..7]
DDR_A_D33 AR43 AV11 DDR_A_DQS#2 DDR_B_D31 BF19 AL3 DDR_B_DQS#0
DDR_A_D34 AW48 SA_DQ[33] SA_DQS#[2] AT17 DDR_A_DQS#3 DDR_B_D32 BD50 SB_DQ[31] SB_DQS#[0] AV3 DDR_B_DQS#1
C
DDR_A_D35 BC48 SA_DQ[34] SA_DQS#[3] AV45 DDR_A_DQS#4 DDR_B_D33 BF48 SB_DQ[32] SB_DQS#[1] BG11 DDR_B_DQS#2 C

DDR_A_D36 BC45 SA_DQ[35] SA_DQS#[4] AY51 DDR_A_DQS#5 DDR_B_D34 BD53 SB_DQ[33] SB_DQS#[2] BD17 DDR_B_DQS#3
DDR_A_D37 AR45 SA_DQ[36] SA_DQS#[5] AT55 DDR_A_DQS#6 DDR_B_D35 BF52 SB_DQ[34] SB_DQS#[3] BG51 DDR_B_DQS#4
SA_DQ[37] SA_DQS#[6] SB_DQ[35] SB_DQS#[4]
DDR SYSTEM MEMORY A

DDR_A_D38 AT48 AK55 DDR_A_DQS#7 DDR_B_D36 BD49 BA59 DDR_B_DQS#5


DDR_A_D39 AY48 SA_DQ[38] SA_DQS#[7] DDR_B_D37 BE49 SB_DQ[36] SB_DQS#[5] AT60 DDR_B_DQS#6
BA49 SA_DQ[39] BD54 SB_DQ[37] SB_DQS#[6] AK59

DDR SYSTEM MEMORY B


DDR_A_D40 DDR_B_D38 DDR_B_DQS#7
DDR_A_D41 AV49 SA_DQ[40] DDR_B_D39 BE53 SB_DQ[38] SB_DQS#[7]
DDR_A_D42 BB51 SA_DQ[41] DDR_B_D40 BF56 SB_DQ[39]
DDR_A_D43 AY53 SA_DQ[42] DDR_B_D41 BE57 SB_DQ[40]
DDR_A_D44 BB49 SA_DQ[43] DDR_B_D42 BC59 SB_DQ[41]
SA_DQ[44] 10
DDR_A_DQS[0..7] SB_DQ[42]
DDR_A_D45 AU49 AJ11 DDR_A_DQS0 DDR_B_D43 AY60
DDR_A_D46 BA53 SA_DQ[45] SA_DQS[0] AR10 DDR_A_DQS1 DDR_B_D44 BE54 SB_DQ[43]
DDR_A_D47 BB55 SA_DQ[46] SA_DQS[1] AY11 DDR_A_DQS2 DDR_B_D45 BG54 SB_DQ[44]
SA_DQ[47] SA_DQS[2] SB_DQ[45] 11
DDR_B_DQS[0..7]
DDR_A_D48 BA55 AU17 DDR_A_DQS3 DDR_B_D46 BA58 AM2 DDR_B_DQS0
DDR_A_D49 AV56 SA_DQ[48] SA_DQS[3] AW45 DDR_A_DQS4 DDR_B_D47 AW59 SB_DQ[46] SB_DQS[0] AV1 DDR_B_DQS1
DDR_A_D50 AP50 SA_DQ[49] SA_DQS[4] AV51 DDR_A_DQS5 DDR_B_D48 AW58 SB_DQ[47] SB_DQS[1] BE11 DDR_B_DQS2
DDR_A_D51 AP53 SA_DQ[50] SA_DQS[5] AT56 DDR_A_DQS6 DDR_B_D49 AU58 SB_DQ[48] SB_DQS[2] BD18 DDR_B_DQS3
DDR_A_D52 AV54 SA_DQ[51] SA_DQS[6] AK54 DDR_A_DQS7 DDR_B_D50 AN61 SB_DQ[49] SB_DQS[3] BE51 DDR_B_DQS4
DDR_A_D53 AT54 SA_DQ[52] SA_DQS[7] DDR_B_D51 AN59 SB_DQ[50] SB_DQS[4] BA61 DDR_B_DQS5
DDR_A_D54 AP56 SA_DQ[53] DDR_B_D52 AU59 SB_DQ[51] SB_DQS[5] AR59 DDR_B_DQS6
DDR_A_D55 AP52 SA_DQ[54] DDR_B_D53 AU61 SB_DQ[52] SB_DQS[6] AK61 DDR_B_DQS7
DDR_A_D56 AN57 SA_DQ[55] DDR_B_D54 AN58 SB_DQ[53] SB_DQS[7]
DDR_A_D57 AN53 SA_DQ[56] DDR_B_D55 AR58 SB_DQ[54]
DDR_A_D58 AG56 SA_DQ[57] DDR_B_D56 AK58 SB_DQ[55]
DDR_A_D59 AG53 SA_DQ[58] DDR_B_D57 AL58 SB_DQ[56]
DDR_A_D60 AN55 SA_DQ[59] DDR_B_D58 AG58 SB_DQ[57]
SA_DQ[60] DDR_A_MA[0..15]10 SB_DQ[58]
DDR_A_D61 AN52 BG35 DDR_A_MA0 DDR_B_D59 AG59
DDR_A_D62 AG55 SA_DQ[61] SA_MA[0] BB34 DDR_A_MA1 DDR_B_D60 AM60 SB_DQ[59]
SA_DQ[62] SA_MA[1] SB_DQ[60] DDR_B_MA[0..15]11
DDR_A_D63 AK56 BE35 DDR_A_MA2 DDR_B_D61 AL59 BF32 DDR_B_MA0
SA_DQ[63] SA_MA[2] BD35 DDR_A_MA3 DDR_B_D62 AF61 SB_DQ[61] SB_MA[0] BE33 DDR_B_MA1
SA_MA[3] AT34 DDR_A_MA4 DDR_B_D63 AH60 SB_DQ[62] SB_MA[1] BD33 DDR_B_MA2
SA_MA[4] AU34 DDR_A_MA5 SB_DQ[63] SB_MA[2] AU30 DDR_B_MA3
SA_MA[5] BB32 DDR_A_MA6 SB_MA[3] BD30 DDR_B_MA4
BD37 SA_MA[6] AT32 DDR_A_MA7 SB_MA[4] AV30 DDR_B_MA5
10 DDR_A_BS0 SA_BS[0] SA_MA[7] SB_MA[5]
B 10 BF36 AY32 DDR_A_MA8 BG30 DDR_B_MA6 B
DDR_A_BS1 SA_BS[1] SA_MA[8] SB_MA[6]
10 BA28 AV32 DDR_A_MA9 11 BG39 BD29 DDR_B_MA7
DDR_A_BS2 SA_BS[2] SA_MA[9] DDR_B_BS0 SB_BS[0] SB_MA[7]
BE37 DDR_A_MA10 11 BD42 BE30 DDR_B_MA8
SA_MA[10] DDR_B_BS1 SB_BS[1] SB_MA[8]
BA30 DDR_A_MA11 11 AT22 BE28 DDR_B_MA9
SA_MA[11] DDR_B_BS2 SB_BS[2] SB_MA[9]
BC30 DDR_A_MA12 BD43 DDR_B_MA10
BE39 SA_MA[12] AW41 DDR_A_MA13 SB_MA[10] AT28 DDR_B_MA11
10 DDR_A_CAS# SA_CAS# SA_MA[13] SB_MA[11]
10 BD39 AY28 DDR_A_MA14 AV28 DDR_B_MA12
DDR_A_RAS# SA_RAS# SA_MA[14] SB_MA[12]
10 AT41 AU26 DDR_A_MA15 11 AV43 BD46 DDR_B_MA13
DDR_A_WE# SA_WE# SA_MA[15] DDR_B_CAS# SB_CAS# SB_MA[13]
11 BF40 AT26 DDR_B_MA14
DDR_B_RAS# SB_RAS# SB_MA[14]
11 BD45 AU22 DDR_B_MA15
DDR_B_WE# SB_WE# SB_MA[15]

IVY-BRIDGE_BGA1023
@
IVY-BRIDGE_BGA1023
ER01 @

ER01

+1.5V
1

R40
1K_0402_5%
Q6
BSS138_SOT23
2

3 1 1 2
S

5 H_DRAMRST# H_DRAMRST# DDR3_DRAMRST#_R


A DDR3_DRAMRST#10,11 A
R41 1K_0402_5%
G

www.vinafix.vn
2
1

ER03
R42
4.99K_0402_1%
1 2 EC_DRAMRST_CNTRL_PCH
39
0_0402_5% R44
2

1
C73
Instant ON Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title
0.047U_0402_16V4Z
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(3/6) DDRIII
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 6 of 58
5 4 3 2 1
5 4 3 2 1

CFG Straps for Processor


D D
CFG2

1
UCPU1E R45
1K_0402_1%

2
CFG0 B50 N59
C51 CFG[0] BCLK_ITP N58
CFG2 B54 CFG[1] BCLK_ITP#
D53 CFG[2]
CFG4 A51 CFG[3] N42
CFG5 C53 CFG[4] RSVD30 L42
CFG6 C55 CFG[5] RSVD31 L45
CFG[6] RSVD32 PEG Static Lane Reversal - CFG2 is for the 16x
H49 L47
A55 CFG[7] RSVD33
H51 CFG[8]
CFG[9] 1:(Default) Normal Operation; Lane #
K49 M13 CFG2
+VCC_CORE PAD T38 @ CFG10 K53 CFG[10] RSVD34 M14 definition matches socket pin map definition
+VCC_GFXCORE_AXG PAD T39 @ CFG11 F53 CFG[11] RSVD35 U14
CFG[12] RSVD36 0:Lane Reversed
PAD T40 @ CFG12 G53 W14
PAD T41 @ CFG13 L51 CFG[13] RSVD37 P13
CFG[14] RSVD38
1

R48 PAD T42 @ CFG14 F51


PAD T43 @ CFG15 D52 CFG[15] CFG4
49.9_0402_1% PAD T10 @ CFG16 L53 CFG[16] AT49
CFG[17] RSVD39

1
PR02 @ PAD T11 @ CFG17 K24
RSVD40 @R47
@ R47
2
1

VCC_VAL_SENSE H43 1K_0402_1%

RESERVED
R46 VSS_VAL_SENSE K43 VCC_VAL_SENSE AH2
49.9_0402_1% VSS_VAL_SENSE RSVD41 AG13

2
@ RSVD42 AM14
VCC_AXG_VAL_SENSE H45 RSVD43 AM15
2

VSS_AXG_VAL_SENSE K45 VAXG_VAL_SENSE RSVD44


VSSAXG_VAL_SENSE
C C
Please place as close as JCPU1 N50
F48 RSVD45
VCC_DIE_SENSE
Display Port Presence Strap
H48
K48 RSVD6
RSVD7 1 : Disabled; No Physical Display Port
A4 CFG4
DC_TEST_A4 C4 ER01 attached to Embedded Display Port
BA19 DC_TEST_C4 D3 DC_TEST_C4_D3
AV19 RSVD8 DC_TEST_D3 D1
VSS_AXG_VAL_SENSE
RSVD9 DC_TEST_D1 These pins are for solder joint 0 : Enabled; An external Display Port device is
AT21 A58
BB21 RSVD10 DC_TEST_A58 A59 reliability and non-critical to connected to the Embedded Display Port
VSS_VAL_SENSE BB19 RSVD11 DC_TEST_A59 C59 DC_TEST_A59_C59
AY21 RSVD12 DC_TEST_C59 A61 function. For BGA only.
BA22 RSVD13 DC_TEST_A61 C61 DC_TEST_A61_C61
RSVD14 DC_TEST_C61
1

AY22 D61 CFG6


R51 R52 AU19 RSVD15 DC_TEST_D61 BD61
49.9_0402_1% AU21 RSVD16 DC_TEST_BD61 BE61 CFG5
49.9_0402_1% BD21 RSVD17 DC_TEST_BE61 BE59 DC_TEST_BE59_BE61
RSVD18 DC_TEST_BE59

1
@ BD22 BG61
2

@ BD25 RSVD19 DC_TEST_BG61 BG59 DC_TEST_BG59_BG61 R49 @ R50


BD26 RSVD20 DC_TEST_BG59 BG58 1K_0402_1% 1K_0402_1%
BG22 RSVD21 DC_TEST_BG58 BG4 @
BE22 RSVD22 DC_TEST_BG4 BG3

2
BG26 RSVD23 DC_TEST_BG3 BE3 DC_TEST_BE3_BG3
BE26 RSVD24 DC_TEST_BE3 BG1
BF23 RSVD25 DC_TEST_BG1 BE1
Please place as close as JCPU1 RSVD26 DC_TEST_BE1
DC_TEST_BE1_BG1
BE24 BD1
RSVD27 DC_TEST_BD1

IVY-BRIDGE_BGA1023 PCIE Port Bifurcation Straps


@
B B
11: (Default) x16 - Device 1 functions 1 and 2 disabled
ER01 CFG[6:5] 10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

A A

5
www.vinafix.vn
4
Security Classification
Issued Date 2011/07/12
Compal Secret Data
Deciphered Date 2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3 2
Title

Date:
LA-8226P
Compal Electronics, Inc.
PROCESSOR(4/6) RSVD,CFG
Size Document Number
Custom

Monday, July 09, 2012


1
Sheet 7 of 58
Rev
1.0
5 4 3 2 1

ULV type UCPU1F POWER +1.05VS

DC 33A 8.5A
+VCC_CORE AF46
VCCIO[1] AG48
D VCCIO[3]
VCCIO[4]
AG50 INTEL Recommend VCCIO D
A26 AG51
A29
A31
VCC[1]
VCC[2]
VCCIO[5]
VCCIO[6]
AJ17
AJ21
2*330UF,10*10uF(0603) and 26*1uF(0402)
VCC[3] VCCIO[7]
A34
A35 VCC[4] VCCIO[8]
AJ25
AJ43
PD0.8
INTEL Recommend VCC A38 VCC[5]
VCC[6]
VCCIO[9]
VCCIO[10]
AJ47
CAP at P.51
A39 AK50
4*470UF,12*22uF(0805) and 35*2.2uF(0402) A42
C26
VCC[7]
VCC[8]
VCCIO[11]
VCCIO[12]
AK51
AL14
VCC[9] VCCIO[13]
PD0.8 C27
C32 VCC[10] VCCIO[14]
AL15
AL16
VCC[11] VCCIO[15]
CAP at P.51 C34
C37 VCC[12] VCCIO[16]
AL20
AL22
C39 VCC[13] VCCIO[17] AL26
C42 VCC[14] VCCIO[18] AL45
D27 VCC[15] VCCIO[19] AL48
D32 VCC[16] VCCIO[20] AM16
D34 VCC[17] VCCIO[21] AM17
D37 VCC[18] VCCIO[22] AM21
D39 VCC[19] VCCIO[23] AM43

PEG IO AND DDR IO


D42 VCC[20] VCCIO[24] AM47
E26 VCC[21] VCCIO[25] AN20
E28 VCC[22] VCCIO[26] AN42
E32 VCC[23] VCCIO[27] AN45
E34 VCC[24] VCCIO[28] AN48
E37 VCC[25] VCCIO[29]
E38 VCC[26]
VCC[27]

CORE SUPPLY
F25
F26 VCC[28]
F28 VCC[29]
F32 VCC[30]
F34 VCC[31]
F37 VCC[32] AA14
F38 VCC[33] VCCIO[30] AA15
F42 VCC[34] VCCIO[31] AB17
C VCC[35] VCCIO[32] C
G42 AB20
H25 VCC[36] VCCIO[33] AC13
H26 VCC[37] VCCIO[34] AD16
H28 VCC[38] VCCIO[35] AD18
H29 VCC[39] VCCIO[36] AD21
H32 VCC[40] VCCIO[37] AE14
H34 VCC[41] VCCIO[38] AE15
H35 VCC[42] VCCIO[39] AF16
H37 VCC[43] VCCIO[40] AF18
H38 VCC[44] VCCIO[41] AF20
H40 VCC[45] VCCIO[42] AG15
J25 VCC[46] VCCIO[43] AG16
J26 VCC[47] VCCIO[44] AG17
J28 VCC[48] VCCIO[45] AG20
J29 VCC[49] VCCIO[46] AG21
J32 VCC[50] VCCIO[47] AJ14
J34 VCC[51] VCCIO[48] AJ15
J35 VCC[52] VCCIO[49]
J37 VCC[53]
J38 VCC[54] +1.05VS
J40 VCC[55]
J42 VCC[56] VCCIO_SEL after Ivy bridge ES2 Voltage support
K26 VCC[57] W16
K27 VCC[58] VCCIO50 W17 1/NC : (Default) +1.05VS_VTT
K29
K32
VCC[59]
VCC[60]
VCC[61]
VCCIO51
BC22 * 0: +1.0VS_VTT
K34
K35 VCC[62]
K37 VCC[63]
K39 VCC[64] @
K42 VCC[66] BC22 VCCIO_SEL R75 1 2 10K_0402_5%
VCC[67] VCCIO_SEL +3VS
L25
L28 VCC[68]
L33 VCC[69]
L36 VCC[70] +1.05VS ER01
L40 VCC[71]
B B
N26 VCC[72]
N30 VCC[73] AM25

QUIET
RAILS
N34 VCC[74] VCCPQE[1] AN22 +1.05VS +1.05VS
VCC[75] VCCPQE[2] Place the PU
N38
VCC[76] resistors close to CPU

1
1 2

1
C74 R56 ER01
1U_0402_6.3V6K 130_0402_1% R54
<BOM Structure> 75_0402_5%

2
A44 H_CPU_SVIDALRT# R55 1 2 43_0402_1%
VIDALERT# B43 H_CPU_SVIDCLK 1 2 0_0402_5% VR_SVID_ALRT# 51
R53 51
VIDSCLK VR_SVID_CLK

SVID
C44 VR_SVID_DAT
VIDSOUT VR_SVID_DAT 51
+VCC_CORE
Place the PU
resistors close to CPU

1
R57
100_0402_1%

2
F43 VCCSENSE_R R58 1 2 0_0402_5%
VCC_SENSE VCCSENSE 51
G43 VSSSENSE_R 1 2 0_0402_5%
SENSE LINES

R59 51
VSS_SENSE VSSSENSE

1
R60 2 1 10_0402_1%
+1.05VS
R61
AN16 100_0402_1%
VCCIO_SENSE VCCIO_SENSE 48
AN17
VSS_SENSE_VCCIO

2
1
R62
10_0402_1%
A IVY-BRIDGE_BGA1023 A
@ 2

ER01

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(5/6) PWR,BYPASS
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 8 of 58
5 4 3 2 1
5 4 3 2 1

+1.5V_CPU_VDDQ 5A
+1.5V Q7 +1.5V_CPU_VDDQ
+5VALW +5VALW AO4304L_SO8
8 1
7 2

20K_0402_5%
6 3 1

10U_0805_10V4Z~D
5

C76

R64
R63
R65 36.5K_0402_1%

4
100K_0402_5% 2 UCPU1H

2
RUN_ON_CPU1.5VS3

3
Q4B A13 AM38
VSS[1] VSS[91]

2
RUN_ON_CPU1.5VS3# 5 A17 AM4
C77 A21 VSS[2] VSS[92] AM42
D D
2N7002KDWH_SOT363-6 A25 VSS[3] VSS[93] AM45
2200P_0402_50V7K

1
A28 VSS[4] VSS[94] AM48

<BOM Structure>
VSS[5] VSS[95]

6
A33 AM58
A37 VSS[6] VSS[96] AN1
Q4A A40 VSS[7] VSS[97] AN21
1 2 2 A45 VSS[8] VSS[98] AN25
39 CPU1.5V_S3_GATE VSS[9] VSS[99]
R66 0_0402_5% 2N7002KDWH_SOT363-6 A49 AN28
A53 VSS[10] VSS[100] AN33

1
A9 VSS[11] VSS[101] AN36
41
RUN_ON_CPU1.5VS3# VSS[12] VSS[102]
AA1 AN40
AA13 VSS[13] VSS[103] AN43
AA50 VSS[14] VSS[104] AN47
AA51 VSS[15] VSS[105] AN50
AA52 VSS[16] VSS[106] AN54
AA53 VSS[17] VSS[107] AP10
AA55 VSS[18] VSS[108] AP51
AA56 VSS[19] VSS[109] AP55
AA8 VSS[20] VSS[110] AP7
+V_SM_VREF should VSS[21] VSS[111]
have 10 mil trace width AB16 AR13
AB18 VSS[22] VSS[112] AR17
AB21 VSS[23] VSS[113] AR21
+1.5V_CPU_VDDQ +1.5V AB48 VSS[24] VSS[114] AR41
AB61 VSS[25] VSS[115] AR48
AC10 VSS[26] VSS[116] AR61
2 1 AC14 VSS[27] VSS[117] AR7

POWER VSS[28] VSS[118]

1
+VCC_GFXCORE_AXG 0_0402_5% R69 @ AC46 AT14
UCPU1G R70 R71 AC6 VSS[29] VSS[119] AT19
1K_0402_1% 1K_0402_1% AD17 VSS[30] VSS[120] AT36
Q8 @ AD20 VSS[31] VSS[121] AT4
AD4 VSS[32] VSS[122] AT45
DC 29A @
VSS

2
AY43 +V_SM_VREF_CNT 3 VSS[33] VSS[123]

D
1 +V_SM_VREF AD61 AT52
SM_VREF VSS[34] VSS[124]

0.1U_0402_16V4Z
AA46 AE13 AT58

VREF
VAXG[1] VSS[35] VSS[125]

1
AB47 1 AE8 AU1
VAXG[2] VSS[36] VSS[126]

1
AB50 BE7 +V_DDR_REFA_R R72 PMV45EN_SOT23-3 AF1 AU11

G
2
VAXG[3] SA_DIMM_VREFDQ VSS[37] VSS[127]

C149
AB51 BG7 +V_DDR_REFB_R 1K_0402_1% R73 AF17 AU28
AB52 VAXG[4] SB_DIMM_VREFDQ @ 1K_0402_1% AF21 VSS[38] VSS[128] AU32
AB53 VAXG[5] 2 AF47 VSS[39] VSS[129] AU51

2
AB55 VAXG[6] RUN_ON_CPU1.5VS3 AF48 VSS[40] VSS[130] AU7

2
AB56 VAXG[7] AF50 VSS[41] VSS[131] AV17
AB58 VAXG[8] AF51 VSS[42] VSS[132] AV21
C AB59 VAXG[9] AF52 VSS[43] VSS[133] AV22 C
AC61 VAXG[10] AF53 VSS[44] VSS[134] AV34
AD47 VAXG[11] +1.5V_CPU_VDDQ AF55 VSS[45] VSS[135] AV40
AD48 VAXG[12] AF56 VSS[46] VSS[136] AV48
AD50 VAXG[13] Place TOP IN BGA AF58 VSS[47] VSS[137] AV55
AD51 VAXG[14] AJ28 5A AF59 VSS[48] VSS[138] AW13

- 1.5V RAILS
AD52 VAXG[15] VDDQ[1] AJ33 C243 C239 C151 C197 C219 C157 C181 C237 C153 C192 AG10 VSS[49] VSS[139] AW43
VAXG[16] VDDQ[2] VSS[50] VSS[140]

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

330U_D2_2VM_R6M
AD53 AJ36 1 AG14 AW61
AD55 VAXG[17] VDDQ[3] AJ40 AG18 VSS[51] VSS[141] AW7
VAXG[18] VDDQ[4] VSS[52] VSS[142]

C78
AD56 AL30 + AG47 AY14
AD58 VAXG[19] VDDQ[5] AL34 AG52 VSS[53] VSS[143] AY19
AD59 VAXG[20] VDDQ[6] AL38 AG61 VSS[54] VSS[144] AY30

2
AE46 VAXG[21] VDDQ[7] AL42 @ 2 3 AG7 VSS[55] VSS[145] AY36
N45 VAXG[22] VDDQ[8] AM33 AH4 VSS[56] VSS[146] AY4
P47 VAXG[23] VDDQ[9] AM36 AH58 VSS[57] VSS[147] AY41
P48 VAXG[24] VDDQ[10] AM40 AJ13 VSS[58] VSS[148] AY45
P50 VAXG[25] VDDQ[11] AN30 AJ16 VSS[59] VSS[149] AY49
P51 VAXG[26] VDDQ[12] AN34
Place BOT OUT BGA AJ20 VSS[60] VSS[150] AY55
P52 VAXG[27] VDDQ[13] AN38 AJ22 VSS[61] VSS[151] AY58
P53 VAXG[28] VDDQ[14] AR26 AJ26 VSS[62] VSS[152] AY9

DDR3
P55 VAXG[29] VDDQ[15] AR28 C238 C241 C240 C236 C156 C244 C242 C143 AJ30 VSS[63] VSS[153] BA1
VAXG[30] GRAPHICS VDDQ[16] VSS[64] VSS[154]

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
P56 AR30 AJ34 BA11
VAXG[31] VDDQ[17] VSS[65] VSS[155]

1
P61 AR32 AJ38 BA17
T48 VAXG[32] VDDQ[18] AR34 AJ42 VSS[66] VSS[156] BA21
T58 VAXG[33] VDDQ[19] AR36 AJ45 VSS[67] VSS[157] BA26

2
T59 VAXG[34] VDDQ[20] AR40 AJ48 VSS[68] VSS[158] BA32
T61 VAXG[35] VDDQ[21] AV41 AJ7 VSS[69] VSS[159] BA48
U46 VAXG[36] VDDQ[22] AW26 AK1 VSS[70] VSS[160] BA51
V47 VAXG[37] VDDQ[23] BA40 AK52 VSS[71] VSS[161] BB53
V48 VAXG[38] VDDQ[24] BB28 AL10 VSS[72] VSS[162] BC13
V50 VAXG[39] VDDQ[25] BG33 ER01 AL13 VSS[73] VSS[163] BC5
V51 VAXG[40] VDDQ[26] AL17 VSS[74] VSS[164] BC57
V52 VAXG[41] AL21 VSS[75] VSS[165] BD12
V53 VAXG[42] AL25 VSS[76] VSS[166] BD16
V55 VAXG[43] AL28 VSS[77] VSS[167] BD19
V56 VAXG[44] AL33 VSS[78] VSS[168] BD23
V58 VAXG[45] AL36 VSS[79] VSS[169] BD27
V59 VAXG[46] AL40 VSS[80] VSS[170] BD32
W50 VAXG[47] AL43 VSS[81] VSS[171] BD36
W51 VAXG[48] AL47 VSS[82] VSS[172] BD40
W52 VAXG[49] AL61 VSS[83] VSS[173] BD44
B W53 VAXG[50] AM13 VSS[84] VSS[174] BD48 B
W55 VAXG[51] AM20 VSS[85] VSS[175] BD52
W56 VAXG[52] AM22 VSS[86] VSS[176] BD56
W61 VAXG[53] AM26 VSS[87] VSS[177] BD8
Y48 VAXG[54] ER01 AM30 VSS[88] VSS[178] BE5
+VCC_GFXCORE_AXG Y61 VAXG[55] +1.5V_CPU_VDDQ +1.5V AM34 VSS[89] VSS[179] BG13
VAXG[56] VSS[90] VSS[180]
1

R67 +1.5V_CPU_VDDQ C90 2 1 0.1U_0402_10V7K


Place near CPU 100_0402_1%
QUIET RAILS

AM28 C91 2 1 0.1U_0402_10V7K IVY-BRIDGE_BGA1023


SENSE
LINES
2

F45 VCCDQ[1] AN26 @


51 VCC_AXG_SENSE VAXG_SENSE VCCDQ[2]
1

G45
51 VSS_AXG_SENSE VSSAXG_SENSE C75 C92 2 1 0.1U_0402_10V7K ER01
R68 1U_0402_6.3V6K
2

2 1
2 1 0.1U_0402_10V7K
+1.8VS 100_0402_1%
<BOM Structure>
C93
1.2A
1.8V RAIL

R242 ER08 C262 C263


1 2 +1.8VS_VCCPLL BB3
BC1 VCCPLL[1]
1 VCCPLL[2]
330U_D2_2VM_R6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

0_0805_5% 1 1 BC4
VCCPLL[3]
1

1
C97

+
C95

C96

Place BOT OUT Conn


2

@ 2 3 2 2 BC43
VDDQ_SENSE BA43 Q9
VSS_SENSE_VDDQ

1
SENSE LINES

D BSS138_SOT23
6A L17 2
DRAMRST_CNTRL_PCH
13,39
L21 VCCSA[1] +V_DDR_REFA G
N16 VCCSA[2] +V_DDR_REFB
Place TOP IN BGA S

3
N20 VCCSA[3] R77 1 @ 2 0_0402_5% +V_DDR_REFA_R
+VCCSA VCCSA[4]
N22 R78 1 @ 2 0_0402_5% +V_DDR_REFB_R
SA RAIL

C245 C246 C254 C248 C249 P17 VCCSA[5]


VCCSA[6]
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

P20 U10
VCCSA[7] VCCSA_SENSE +VCCSA_SENSE 50
1

1
R16
VCCSA[8]

1
R18 D
VCCSA[9]
1

ER08 R21 DRAMRST_CNTRL_PCH 2 Q10 R79 R80


2

U15 VCCSA[10] @ R74 G 1K_0402_1% 1K_0402_1%


VCCSA VID

1 VCCSA[11]
330U_D2_2VM_R6M

V16 0_0402_5% S BSS138_SOT23 @ @

2
A VCCSA[12] A
@ + V17 D48
VCCSA[13] VCCSA_VID[0] H_VCCSA_VID0 50
lines
C85

V18 D49
H_VCCSA_VID1 50
2

V21 VCCSA[14] VCCSA_VID[1]


2 3 VCCSA[15]

www.vinafix.vn
W20
VCCSA[16]
Place BOT OUT BGA M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

C253 C250 C252 C251 C247 IVY-BRIDGE_BGA1023


10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

@
1

ER01
Security Classification Compal Secret Data Compal Electronics, Inc.
2

Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title


ER01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(6/6) PWR,VSS
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 9 of 58
5 4 3 2 1
5 4 3 2 1

+1.5V 3.56A
+1.5V +1.5V 6 DDR_A_D[0..63]

1
6 DDR_A_DQS[0..7]
R81
1K_0402_1% DDR3 SO-DIMM A 6 DDR_A_DQS#[0..7]
JDIMM1 6 DDR_A_MA[0..15]

2
1 2
+V_DDR_REFA VREF_DQ VSS1
3 4 DDR_A_D4
VSS2 DQ4

0.1U_0402_10V6K
DDR_A_D0 5 6 DDR_A_D5
DQ0 DQ5

C98
1 DDR_A_D1 7 8
DQ1 VSS3

1
2.2U_0402_6.3V6M
9 10 DDR_A_DQS#0
VSS4 DQS#0

C99
R82 11 12 DDR_A_DQS0
D 13 DM0 DQS0 14 D

2
1K_0402_1% 2 DDR_A_D2 15 VSS5 VSS6 16 DDR_A_D6
DDR_A_D3 17 DQ2 DQ6 18 DDR_A_D7
2

19 DQ3 DQ7 20
DDR_A_D8 21 VSS7 VSS8 22 DDR_A_D12
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13
25 DQ9 DQ13 26
DDR_A_DQS#1 27 VSS9 VSS10 28
DDR_A_DQS1 29 DQS#1 DM1 30 DDR3_DRAMRST#
DQS1 RESET# 11,6
DDR3_DRAMRST#
31 32
DDR_A_D10 33 VSS11 VSS12 34 DDR_A_D14
DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15
37 DQ11 DQ15 38
DDR_A_D16 39 VSS13 VSS14 40 DDR_A_D20
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21
43 DQ17 DQ21 44
DDR_A_DQS#2 45 VSS15 VSS16 46
DDR_A_DQS2 47 DQS#2 DM2 48
49 DQS2 VSS17 50 DDR_A_D22
DDR_A_D18 51 VSS18 DQ22 52 DDR_A_D23
DDR_A_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_A_D28
DDR_A_D24 57 VSS20 DQ28 58 DDR_A_D29
DDR_A_D25 59 DQ24 DQ29 60
61 DQ25 VSS21 62 DDR_A_DQS#3
63 VSS22 DQS#3 64 DDR_A_DQS3
65 DM3 DQS3 66
DDR_A_D26 67 VSS23 VSS24 68 DDR_A_D30
DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31
71 DQ27 DQ31 72
VSS25 VSS26
Layout Note:
C Place near JDDRL C
DDRA_CKE0 73 74 DDRA_CKE1 +1.5V
6 DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 6
75 76
77 VDD1 VDD2 78 DDR_A_MA15
NC1 A15

330U_B2_2.5VM_R15M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
DDR_A_BS2 79 80 DDR_A_MA14
6 DDR_A_BS2 BA2 A14

C100
81 82 1
VDD3 VDD4

C101

C102

C103

C104

C105

C106

C107
DDR_A_MA12 83 84 DDR_A_MA11 1 1 1 1 1 1 1
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7 +
87 A9 A7 88
DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6 @
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4 2 2 2 2 2 2 2 2
93 A5 A4 94
DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
99 A1 A0 100
DDRA_CLK0 101 VDD9 VDD10 102 DDRA_CLK1
6 DDRA_CLK0 CK0 CK1 DDRA_CLK1 6
DDRA_CLK0# 103 104 DDRA_CLK1#
6 DDRA_CLK0# CK0# CK1# DDRA_CLK1# 6 +1.5V
105 106
DDR_A_MA10 107 VDD11 VDD12 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 6
DDR_A_BS0 109 110 DDR_A_RAS#
6 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 6

1
111 112
DDR_A_WE# 113 VDD13 VDD14 114 DDRA_SCS0# R83
6 DDR_A_WE# WE# S0# DDRA_SCS0# 6
DDR_A_CAS# 115 116 DDRA_ODT0 1K_0402_1% Layout Note: Place these 4 Caps near
6 DDR_A_CAS# CAS# ODT0 DDRA_ODT0 6
117 118
DDR_A_MA13 119 VDD15 VDD16 120 DDRA_ODT1
Command and Control signals of JDDRL
DDRA_ODT1 6

2
DDRA_SCS1# 121 A13 ODT1 122
6 DDRA_SCS1# S1# NC2 +1.5V
123 124
125 VDD17 VDD18 126 +VREF_CA
127 NCTEST VREF_CA 128
VSS27 VSS28

0.1U_0402_10V6K
DDR_A_D32 129 130 DDR_A_D36
DQ32 DQ36

1
C108

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
DDR_A_D33 131 132 DDR_A_D37 1
DQ33 DQ37

1
2.2U_0402_6.3V6M

C110

C111

C112

C113
133 134 1 1 1 1
VSS29 VSS30

C109
B DDR_A_DQS#4 135 136 R84 B
DDR_A_DQS4 137 DQS#4 DM4 138 1K_0402_1%

2
139 DQS4 VSS31 140 DDR_A_D38 2

2
DDR_A_D34 141 VSS32 DQ38 142 DDR_A_D39 2 2 2 2
DDR_A_D35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDR_A_D44
DDR_A_D40 147 VSS34 DQ44 148 DDR_A_D45
DDR_A_D41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_A_DQS#5
153 VSS36 DQS#5 154 DDR_A_DQS5
155 DM5 DQS5 156
DDR_A_D42 157 VSS37 VSS38 158 DDR_A_D46
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
161 DQ43 DQ47 162
DDR_A_D48 163 VSS39 VSS40 164 DDR_A_D52
DQ48 DQ52 Layout Note:
DDR_A_D49 165 166 DDR_A_D53
167 DQ49 DQ53 168 Place near JDDRL.203,204
DDR_A_DQS#6 169 VSS41 VSS42 170
DDR_A_DQS6 171 DQS#6 DM6 172
173 DQS6 VSS43 174 DDR_A_D54
DDR_A_D50 175 VSS44 DQ54 176 DDR_A_D55 +0.75VS
DDR_A_D51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDR_A_D60
DDR_A_D56 181 VSS46 DQ60 182 DDR_A_D61
DDR_A_D57 183 DQ56 DQ61 184
DQ57 VSS47

1U_0402_6.3V6K
C114

1U_0402_6.3V6K
C115

1U_0402_6.3V6K
C116

1U_0402_6.3V6K
C117
185 186 DDR_A_DQS#7
187 VSS48 DQS#7 188 DDR_A_DQS7
DM7 DQS7 1 1 1 1
189 190
DDR_A_D58 191 VSS49 VSS50 192 DDR_A_D62
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196 2 2 2 2
197 VSS51 VSS52 198
A 199 SA0 EVENT# 200 PCH_SMBDATA A
+3VS VDDSPD SDA PCH_SMBDATA11,13,38,40
0.1U_0402_10V6K

201 202 PCH_SMBCLK


SA1 SCL PCH_SMBCLK 11,13,38,40
C119

1 203 204
VTT1 VTT2 +0.75VS
1

1
2.2U_0402_6.3V6M

10K_0402_5%
R85

10K_0402_5%
R86

www.vinafix.vn
C118

205 206
G1 G2
2

2
TYCO 2-1932323-1
Security Classification Compal Secret Data Compal Electronics, Inc.
2

PR01 2011/07/12 2012/12/31 Title


Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-DDRL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 10 of 58
5 4 3 2 1
5 4 3 2 1

+1.5V
+1.5V +1.5V

3.56A

1
R87 6 DDR_B_DQS#[0..7]
+V_DDR_REFB 1K_0402_1%
JDIMM2 6
1 2 DDR_B_D[0..63]

2
3 VREF_DQ VSS1 4 DDR_B_D4
VSS2 DQ4 6 DDR_B_DQS[0..7]

0.1U_0402_10V6K
R88 DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 7 DQ0 DQ5 8
1 DQ1 VSS3 6 DDR_B_MA[0..15]
1

1
2.2U_0402_6.3V6M 9 10 DDR_B_DQS#0
VSS4 DQS#0
C120

C121
11 12 DDR_B_DQS0
13 DM0 DQS0 14
2

2 DDR_B_D2 15 VSS5 VSS6 16 DDR_B_D6


DQ2 DQ6

1K_0402_1%
D DDR_B_D3 17 18 DDR_B_D7 D

2
19 DQ3 DQ7 20
DDR_B_D8 21 VSS7 VSS8 22 DDR_B_D12
DDR_B_D9 23 DQ8 DQ12 24 DDR_B_D13
25 DQ9 DQ13 26
DDR_B_DQS#1 27 VSS9 VSS10 28
DDR_B_DQS1 29 DQS#1 DM1 30 DDR3_DRAMRST#
DQS1 RESET# 10,6
DDR3_DRAMRST#
31 32
DDR_B_D10 33 VSS11 VSS12 34 DDR_B_D14
DDR_B_D11 35 DQ10 DQ14 36 DDR_B_D15
37 DQ11 DQ15 38
DDR_B_D16 39 VSS13 VSS14 40 DDR_B_D20
DDR_B_D17 41 DQ16 DQ20 42 DDR_B_D21
43 DQ17 DQ21 44
VSS15 VSS16 Layout Note: Place these 4 Caps near Layout Note:
DDR_B_DQS#2 45 46
DDR_B_DQS2 47 DQS#2 DM2 48
Command and Control signals of JDDRH Place near JDDRH
49 DQS2 VSS17 50 DDR_B_D22
DDR_B_D18 51 VSS18 DQ22 52 DDR_B_D23 +1.5V +1.5V
DDR_B_D19 53 DQ18 DQ23 54
DQ19 VSS19

330U_B2_2.5VM_R15M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
55 56 DDR_B_D28 @
VSS20 DQ28

C122
DDR_B_D24 57 58 DDR_B_D29 1
DQ24 DQ29

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C123

C124

C125

C126

C127

C128

C129

C130
DDR_B_D25 59 60 1 1 1 1 1 1 1 1
DQ25 VSS21

C131

C132

C133

C134
61 62 DDR_B_DQS#3 +
VSS22 DQS#3 1 1 1 1
63 64 DDR_B_DQS3
65 DM3 DQS3 66 @ @
DDR_B_D26 67 VSS23 VSS24 68 DDR_B_D30 2 2 2 2 2 2 2 2 2
DDR_B_D27 69 DQ26 DQ30 70 DDR_B_D31 2 2 2 2
71 DQ27 DQ31 72
VSS25 VSS26

DDRB_CKE0 73 74 DDRB_CKE1
C 6 DDRB_CKE0 CKE0 CKE1 DDRB_CKE1 6 C
75 76
77 VDD1 VDD2 78 DDR_B_MA15
DDR_B_BS2 79 NC1 A15 80 DDR_B_MA14
6 DDR_B_BS2 BA2 A14
81 82
DDR_B_MA12 83 VDD3 VDD4 84 DDR_B_MA11
DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
87 A9 A7 88
DDR_B_MA8 89 VDD5 VDD6 90 DDR_B_MA6
DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
A5 A4 Layout Note:
93 94
DDR_B_MA3 95 VDD7 VDD8 96 DDR_B_MA2
Place near JDDRH.203 and 204
DDR_B_MA1 97 A3 A2 98 DDR_B_MA0
99 A1 A0 100 +0.75VS
DDRB_CLK0 101 VDD9 VDD10 102 DDRB_CLK1
6 DDRB_CLK0 CK0 CK1 DDRB_CLK1 6
DDRB_CLK0# 103 104 DDRB_CLK1#
6 DDRB_CLK0# CK0# CK1# DDRB_CLK1# 6
105 106
DDR_B_MA10 107 VDD11 VDD12 108 DDR_B_BS1
A10/AP BA1 DDR_B_BS1 6 +1.5V

1U_0603_10V4Z

1U_0603_10V4Z

1U_0603_10V4Z

1U_0603_10V4Z
DDR_B_BS0 109 110 DDR_B_RAS#
6 DDR_B_BS0 BA0 RAS# DDR_B_RAS# 6

C135

C136

C137

C138
111 112 1 1 1 1
DDR_B_WE# 113 VDD13 VDD14 114 DDRB_SCS0#
6 DDR_B_WE# WE# S0# DDRB_SCS0# 6

1
DDR_B_CAS# 115 116 DDRB_ODT0
6 DDR_B_CAS# CAS# ODT0 DDRB_ODT0 6
117 118 R89
DDR_B_MA13 119 VDD15 VDD16 120 DDRB_ODT1 1K_0402_1% 2 2 2 2
A13 ODT1 DDRB_ODT1 6
DDRB_SCS1# 121 122
6 DDRB_SCS1# S1# NC2
123 124

2
125 VDD17 VDD18 126 +VREF_CB
NCTEST VREF_CA

0.1U_0402_10V6K
127 128
DDR_B_D32 129 VSS27 VSS28 130 DDR_B_D36
DQ32 DQ36
C139
DDR_B_D33 131 132 DDR_B_D37 1
DQ33 DQ37

1
2.2U_0402_6.3V6M
133 134
VSS29 VSS30

C140
DDR_B_DQS#4 135 136 R90
DDR_B_DQS4 137 DQS#4 DM4 138

2
B 139 DQS4 VSS31 140 DDR_B_D38 2 1K_0402_1% B
DDR_B_D34 141 VSS32 DQ38 142 DDR_B_D39

2
DDR_B_D35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDR_B_D44
DDR_B_D40 147 VSS34 DQ44 148 DDR_B_D45
DDR_B_D41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_B_DQS#5
153 VSS36 DQS#5 154 DDR_B_DQS5
155 DM5 DQS5 156
DDR_B_D42 157 VSS37 VSS38 158 DDR_B_D46
DDR_B_D43 159 DQ42 DQ46 160 DDR_B_D47
161 DQ43 DQ47 162
DDR_B_D48 163 VSS39 VSS40 164 DDR_B_D52
DDR_B_D49 165 DQ48 DQ52 166 DDR_B_D53
167 DQ49 DQ53 168
DDR_B_DQS#6 169 VSS41 VSS42 170
DDR_B_DQS6 171 DQS#6 DM6 172
173 DQS6 VSS43 174 DDR_B_D54
DDR_B_D50 175 VSS44 DQ54 176 DDR_B_D55
DDR_B_D51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDR_B_D60
DDR_B_D56 181 VSS46 DQ60 182 DDR_B_D61
DDR_B_D57 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDR_B_DQS#7
187 VSS48 DQS#7 188 DDR_B_DQS7
189 DM7 DQS7 190
DDR_B_D58 191 VSS49 VSS50 192 DDR_B_D62
DDR_B_D59 193 DQ58 DQ62 194 DDR_B_D63
1 R91 2 195 DQ59 DQ63 196
10K_0402_5% 197 VSS51 VSS52 198
199 SA0 EVENT# 200 PCH_SMBDATA
+3VS VDDSPD SDA PCH_SMBDATA10,13,38,40
0.1U_0402_10V6K

201 202 PCH_SMBCLK


SA1 SCL PCH_SMBCLK 10,13,38,40
C142

A 1 2 203 204 A
1 VTT1 VTT2 +0.75VS
1
2.2U_0402_6.3V6M

R92 10K_0402_5%
C141

205 206
G1 G2
2

www.vinafix.vn
2 TYCO_2-2013287-1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-DDRH
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 11 of 58
5 4 3 2 1
5 4 3 2 1

PCH_RTCX1 +RTCVCC
NONGCLK@
1 2 PCH_RTCX2 1 2 SM_INTRUDER#
R93 10M_0402_5% R94 1M_0402_5%
Y1
1 2

32.768KHZ_12.5PF_9H03200019
NONGCLK@

1 1
C144 C145
18P_0402_50V8J 18P_0402_50V8J PCH_RTCX1 R683 1 2 0_0402_5% 42
CLK_32K_RTC_XIN
NONGCLK@
2 2 NONGCLK@
D GCLK@ D
ER02

ER02 CLRP1 & CLRP2 place near DIMM


U3A
far away hot spot
+RTCVCC PCH_RTCX1 A20 C38 LPC_AD0
1 RTCX1 FWH0 / LAD0 LPC_AD0 39,40

1
CMOS A38 LPC_AD1 39,40
C20 FWH1 / LAD1 B37 LPC_AD1

LPC
C146 CLRP1 PCH_RTCX2 LPC_AD2 39,40
RTCX2 FWH2 / LAD2 C37 LPC_AD2
1U_0603_10V4Z SHORT PADS LPC_AD3 39,40
LPC_AD3

2
1 2 2 PCH_RTCRST# D20 FWH3 / LAD3
R99 20K_0402_5% RTCRST# D36 LPC_FRAME#
FWH4 / LFRAME# LPC_FRAME# 39,40
1 2 PCH_SRTCRST# G22
R100 20K_0402_5% SRTCRST# E36 LPC_LDRQ0#
1 LDRQ0# @ T12 PAD~D

1
SM_INTRUDER# K22 K36 LPC_LDRQ1#

RTC
INTRUDER# LDRQ1# / GPIO23 @ T13 PAD~D
C147 CLRP2
1U_0603_10V4Z SHORT PADS PCH_INTVRMEN C17 V5 SERIRQ SERIRQ 39

2
2 ME CMOS INTVRMEN SERIRQ
39 HDA_SDO
1 2 HDA_SDOUT
R101 0_0402_5% AM3 SATA_PRX_DTX_N0
31
HDA_BIT_CLK N34 SATA0RXN AM1
HDA_BCLK SATA0RXP SATA_PRX_DTX_P0
31 HDD1 +3VS
HDA for AUDIO AP7

SATA 6G
SATA0TXN 31
SATA_PTX_DRX_N0
HDA_SYNC L34 AP5
HDA_SYNC SATA0TXP 31
SATA_PTX_DRX_P0
1 2 HDA_BIT_CLK
33 HDA_BITCLK_AUDIO
R102 33_0402_5% HDA_SPKR T10 AM10 SERIRQ R103 2 1 10K_0402_5%
SPKR SATA1RXN AM8
HDA_RST# K34 SATA1RXP AP11 +RTCVCC PCH_GPIO21 R104 2 1 10K_0402_5%
1 HDA_RST# SATA1TXN
@ C148 AP10
10P_0402_50V8J SATA1TXP PCH_SATALED#R105 2 1 10K_0402_5%
33 HDA_SDIN0 E34 AD7 SATA_PRX_DTX_N2
31 PCH_INTVRMEN R106 2 1 330K_0402_5%
2 HDA_SDIN0 HDA_SDIN0 SATA2RXN AD5 2 1 10K_0402_5%
SATA_PRX_DTX_P2
31 BBS_BIT0_R R107
G34 SATA2RXP AH5
Reserve for EMI HDA_SDIN1 SATA2TXN 31
SATA_PTX_DRX_N2 ODD
please close to R102 AH4 31
C34 SATA2TXP SATA_PTX_DRX_P2
HDA_SDIN2 AB8 INTVRMEN

IHDA
C SATA3RXN C

33 HDA_RST_AUDIO#
1 2 HDA_RST#
A34
HDA_SDIN3 SATA3RXP
AB10
AF3
* LH Integrated VRM enable
Integrated VRM disable +3VS
R108 33_0402_5% SATA3TXN AF1
1 2 HDA_SDOUT SATA3TXP
33 HDA_SDOUT_AUDIO HDA_SDOUT A36
R109 33_0402_5% HDA_SDO Y7 2 1 1K_0402_5%
HDA_SPKR R110 @

SATA
SATA4RXN Y5
PCH_SPI_WP C36 SATA4RXP AD3
+3V_PCH +3V_PCH +3V_PCH HDA_DOCK_EN# / GPIO33 SATA4TXN
SATA4TXP
AD1 *LOW=Default
HIGH=No Reboot
N32
HDA_DOCK_RST# / GPIO13 Y3
SATA5RXN
1

@ R111 @ R112 @ R113 Y1


SATA5RXP AB3
PCH_JTAG_TCK J3 SATA5TXN AB1
200_0402_5% 200_0402_5% 200_0402_5% PAD T45 @ JTAG_TCK SATA5TXP PCH_SATALED# C653 1 2 0.1U_0402_10V7K close to U3_P3
T46 PCH_JTAG_TMS H7 Y11 +1.05VS_VCC_SATA
PAD @
2

JTAG_TMS SATAICOMPO

JTAG
PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI
PAD T47 @ PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2
JTAG_TDI SATAICOMPI
1

R116 R117 R118 R114 37.4_0402_1%


PAD T48 @ PCH_JTAG_TDO H1
JTAG_TDO AB12 +1.05VS_SATA3
100_0402_1% 100_0402_1% 100_0402_1%
SATA3RCOMPO
Reserve for ESD please close to U3
AB13 SATA3_COMP 1 2
2

SATA3COMPI R115 49.9_0402_1%

PCH_SPI_CLK_RR T3 AH1 RBIAS_SATA3 1 2


SPI_CLK SATA3RBIAS R120 750_0402_1%
R124 2 1 PCH_JTAG_TCK PCH_SPI_CS#_RR Y14
51_0402_5% SPI_CS0# R123
T1 2 1 FLASH_EN HDA_SYNC
SPI_CS1# P3
SPI

PCH_SATALED# 38
SATALED# PCH_SATALED#
10K_0402_5% This signal has a weak internal pull-down
PCH_SPI_SI_RR V4 V14 PCH_GPIO21 On Die PLL VR is supplied by
SPI_MOSI SATA0GP / GPIO21
PCH_SPI_SO_RR U3 P1 BBS_BIT0_R
1.5V when smapled high
+5VS SPI_MISO SATA1GP / GPIO19 1.8V when sampled low
Needs to be pulled High for Chief River platfrom
PANTHER-POINT_FCBGA989 +3V_PCH
B B
+3V_PCH
2
G

U4
1
1 2 3 1 HDA_SYNC 4 VDD 12 FLASH_EN HDA_SYNC R128 2 1 1K_0402_5%
33 HDA_SYNC_AUDIO VDD SEL FLASH_EN 39
R127 33_0402_5% 9
S

19 VDD 2
VDD YA +3V_SPI
BSS138_SOT23 5 PCH_SPI_CS#_R
YB
1

Q11 +3V_SPI 24 6 PCH_SPI_CLK 1 2 PCH_SPI_CLK_R


+3VS A0 YC
R129 R131 PCH_SPI_CS#_RR 22 0_0402_5%
1M_0402_5% PCH_SPI_CLK_RR 1 2 PCH_SPI_CLK_RRR 18 B0 8 PCH_SPI_SI_R R133
PCH_SPI_SI_RR 17 C0 YD 11 PCH_SPI_SO_R
0_0402_5%
D0 YE
EMI
+3V_SPI
0.1U_0402_16V4Z

EMI PCH_SPI_SO_RR 14
2

E0
1
C150 23 3
+3VALW A1 GND
38,39 KSI4 KSI4 21 7
R132 1 2 PCH_SPI_WP# KSI5 16 B1 GND 10
2 38,39 KSI5 C1 GND
3.3K_0402_5% ER01
38,39 KSI6 KSI6 15 20
KSI7 13 D1 GND
38,39 KSI7 E1
R134 1 2 PCH_SPI_HOLD# U5
3.3K_0402_5% 8 4 PI3V512QE_QSOP24 +RTCBATT
C152 R139 VCC VSS
2 1 1 2PCH_SPI_CLK_RRR PCH_SPI_WP# 3
W
RTC Battery

1
@ 33_0402_5% @
22P_0402_50V8J PCH_SPI_HOLD# 7 R136
HOLD
Reserve for EMI please close to U4 MAX. 8000mil 1K_0402_5%
PCH_SPI_CS#_R 1
S NONGCLK@
D1

2
PCH_SPI_CLK_R 6 +RTCVCC
C 2 W=20mils
PCH_SPI_SI_R 5 2 PCH_SPI_SO_R W=20mils 1
C155 D Q 3
R142
2 1 1 2PCH_SPI_CLK_R W25Q64FVSSIG_SO8 W=20mils +CHGRTC

0.1U_0402_16V4Z
@ 0_0402_5% @ 1 DAN202UT106_SC70-3
10P_0402_50V8J 8M ROM=SA000039A20 C154
Reserve for EMI please close to U5 NONGCLK@
2
A A

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PCH_SPI_WP#

@
PCH_SPI_WP 1 2 PCH_WP
1

R137 0_0402_5% D
1 2 2 Q63
39 EC_SPI_WP
R135 0_0402_5% G SSM3K7002BFU_SC70-3
S
Security Classification Compal Secret Data Compal Electronics, Inc.
3

Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (1/8) SATA,HDA,SPI, LPC
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8226P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 12 of 58
5 4 3 2 1
5 4 3 2 1

SMBALERT# 2 1 +3V_PCH
R149 10K_0402_5%
SMBCLK 1 2
R150 2.2K_0402_5%
U3B SMBDATA 1 2
R151 2.2K_0402_5%
SML0CLK 1 2
D PCIE_PRX_GLANTX_N1 BG34 R152 2.2K_0402_5% D
PCIE_PRX_GLANTX_N1
32 PERN1
PCIE_PRX_GLANTX_P1 BJ34 E12 SMBALERT# SML0DATA 1 2
PCIE_PRX_GLANTX_P1
32 PERP1 SMBALERT# / GPIO11 SMBALERT# 38
10/100/1G LAN ---> 32 C158 1 2 0.1U_0402_10V7K PCIE_PTX_GLANRX_N1_C AV32 R153 2.2K_0402_5%
PCIE_PTX_GLANRX_N1 PETN1
32 C159 1 2 0.1U_0402_10V7K PCIE_PTX_GLANRX_P1_C AU32 H14 SMBCLK PCH_SMLCLK 1 2
PCIE_PTX_GLANRX_P1 PETP1 SMBCLK
MEMORY R154 2.2K_0402_5%
PCIE_PRX_WLANTX_N2
40 PCIE_PRX_WLANTX_N2 BE34 C9 SMBDATA PCH_SMLDATA 1 2
PCIE_PRX_WLANTX_P2 BF34 PERN2 SMBDATA R155 2.2K_0402_5%
PCIE_PRX_WLANTX_P2
40 PERP2
MiniWLAN (Mini Card 1)---> 40 C160 1 2 0.1U_0402_10V7K PCIE_PTX_WLANRX_N2_C BB32
PCIE_PTX_WLANRX_N2 PETN2
40 C161 1 2 0.1U_0402_10V7K PCIE_PTX_WLANRX_P2_C AY32 PCH_HOT# 1 2
PCIE_PTX_WLANRX_P2 PETP2

SMBUS
A12 DRAMRST_CNTRL_PCH 39,9 R156 10K_0402_5%
SML0ALERT# / GPIO60 DRAMRST_CNTRL_PCH
BG36
BJ36 PERN3 C8 SML0CLK DRAMRST_CNTRL_PCH 1 2
AV34 PERP3 SML0CLK R157 1K_0402_1%
AU34 PETN3 G12 SML0DATA
PETP3 SML0DATA
BF36 ER03
BE36 PERN4
ER04 AY34 PERP4 C13 PCH_HOT#
BB34 PETN4 SML1ALERT# / PCHHOT# / GPIO74
PETP4 E14 PCH_SMLCLK
SML1CLK / GPIO58 PCH_SMLCLK 20,39
BG37

PCI-E*
BH37 PERN5 M16 PCH_SMLDATA
EC
PERP5 SML1DATA / GPIO75 PCH_SMLDATA 20,39
AY36
BB36 PETN5
PETP5
BJ38
BG38 PERN6
AU36 PERP6 M7 @ T14 PAD CLKIN_DMI2# R158 1 2 10K_0402_5%

Controller
AV36 PETN6 CL_CLK1 CLKIN_DMI2 R159 1 2 10K_0402_5%
PETP6 CLKIN_DMI# R160 1 2 10K_0402_5%

Link
BG40 T11 @ T15 PAD CLKIN_DMI R161 1 2 10K_0402_5%
BJ40 PERN7 CL_DATA1 CLKIN_DOT96# R162 1 2 10K_0402_5%
C AY40 PERP7 CLKIN_DOT96 R163 1 2 10K_0402_5% C
BB40 PETN7 P10 @ T16 PAD CLKIN_SATA# R164 1 2 10K_0402_5%
PETP7 CL_RST1# CLKIN_SATA R165 1 2 10K_0402_5%
BE38 CLK_PCH_14M R166 1 2 10K_0402_5%
BC38 PERN8
AW38 PERP8
AY38 PETN8 If use extenal CLK gen, please place close to CLK gen
PETP8 else, please place close to PCH
M10 PEG_CLKREQ#_R
PEG_A_CLKRQ# / GPIO47 PEG_CLKREQ#_R20
32 R167 1 2 0_0402_5% PCIE_LAN# Y40
CLK_PCIE_LAN# CLKOUT_PCIE0N
10/100/1G LAN ---> 32 R168 1 2 0_0402_5% PCIE_LAN Y39
CLK_PCIE_LAN CLKOUT_PCIE0P AB37 CLK_PCIE_VGA#
CLKOUT_PEG_A_N CLK_PCIE_VGA# 20
R169 1 2 10K_0402_5% LANCLK_REQ# J2 AB38 CLK_PCIE_VGA VGA

CLOCKS
+3V_PCH PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P CLK_PCIE_VGA 20
32 LANCLK_REQ#

40 R170 2 1 0_0402_5% PCIE_WLAN# AB49 AV22 CLK_CPU_DMI#


CLK_PCIE_WLAN# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI# 5 +3VS +3VS
40 R171 2 1 0_0402_5% PCIE_WLAN AB47 AU22 CLK_CPU_DMI
CLK_PCIE_WLAN CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI 5
MiniWLAN (Mini Card 1)---> +3VS R172 2 1 10K_0402_5%
40 WLANCLK_REQ# WLANCLK_REQ# M1
PCIECLKRQ1# / GPIO18 AM12
CLKOUT_DP_N AM13
CLKOUT_DP_P

2
AA48
AA47 CLKOUT_PCIE2N R173 R174
CLKOUT_PCIE2P BF18 CLKIN_DMI#
CLKIN_DMI_N 2.2K_0402_5% 2.2K_0402_5%
R175 1 2 10K_0402_5% V10 BE18 CLKIN_DMI
+3VS PCIECLKRQ2# / GPIO20 CLKIN_DMI_P

1
2
@ @ Y37 BJ30 CLKIN_DMI2#
R180 C162 ER04 Y36 CLKOUT_PCIE3N CLKIN_GND1_N BG30 CLKIN_DMI2 SMBCLK 6 1
CLKOUT_PCIE3P CLKIN_GND1_P PCH_SMBCLK 10,11,38,40
CLK_PCI_LPBACK 2 1 1 2
33_0402_5% 22P_0402_50V8J R176 2 1 10K_0402_5% A8 2N7002DW-T/R7_SOT363-6
+3V_PCH PCIECLKRQ3# / GPIO25
Reserve for EMI please close to G24 CLKIN_DOT96# Q2A
B CLKIN_DOT_96N E24 CLKIN_DOT96 B
U3 CLKIN_DOT_96P
Y43
CLKOUT_PCIE4N

5
Y45
CLKOUT_PCIE4P AK7 CLKIN_SATA#
XTAL25_IN R177 2 1 10K_0402_5% L12 CLKIN_SATA_N AK5 CLKIN_SATA SMBDATA 3 4
+3V_PCH PCIECLKRQ4# / GPIO26 CLKIN_SATA_P PCH_SMBDATA 10,11,38,40
2 1 XTAL25_OUT 2N7002DW-T/R7_SOT363-6
1M_0402_5% R183 V45 K45 CLK_PCH_14M Q2B
V46 CLKOUT_PCIE5N REFCLK14IN
NONGCLK@ CLKOUT_PCIE5P
Y2 R178 2 1 10K_0402_5% L14 H45 CLK_PCI_LPBACK
+3V_PCH PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK 15
CLK_PCI_LPBACK
1 3
1 3 AB42 V47 XTAL25_IN
GND GND NONGCLK@ AB40 CLKOUT_PEG_B_N XTAL25_IN V49 XTAL25_OUT
25MHZ_10PF_7V25000014 CLKOUT_PEG_B_P XTAL25_OUT
2 2 4 2
C163 C164 +3V_PCH R179 1 2 10K_0402_5% PEG_B_CLKREQ# E6 +3V_PCH C672 1 2 0.1U_0402_10V7K
12P_0402_50V8J 12P_0402_50V8J PEG_B_CLKRQ# / GPIO56
NONGCLK@ Y47 XCLK_RCOMP 1 2 +1.05VS_VCCDIFFCLKN
1 1 NONGCLK@ V40 XCLK_RCOMP R181 90.9_0402_1% EMI close to R178
V42 CLKOUT_PCIE6N
CLKOUT_PCIE6P

+3V_PCH R182 1 2 10K_0402_5% PCIE_CLKREQ6# T13


PCIECLKRQ6# / GPIO45 @ @
V38 K43 CLK_SD_48M_R 2 1 CLK_SD_48M 34 R189 C165
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 CLK_SD_48M
ER02 V37 R277 0_0402_5% CLK_PCH_14M 2 1 1 2
FLEX CLOCKS

CLKOUT_PCIE7P F47 @ T17 PAD 33_0402_5% 22P_0402_50V8J


R184 1 2 10K_0402_5% GPIO46 K12 CLKOUTFLEX1 / GPIO65
+3V_PCH PCIECLKRQ7# / GPIO46 H47 @ T18 PAD
CLK_BCLK_ITP# AK14 CLKOUTFLEX2 / GPIO66
CLK_BCLK_ITP AK13 CLKOUT_ITPXDP_N K49 @ T19 PAD
CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67
A A
PANTHER-POINT_FCBGA989
<BOM Structure>
@ @
R185 C255
CLK_25M_PCH_XIN 2 1 1 2
33_0402_5% 22P_0402_50V8J XTAL25_IN R637 1 2 0_0402_5% CLK_25M_PCH_XIN
CLK_25M_PCH_XIN42
Security Classification Compal Secret Data Compal Electronics, Inc.

www.vinafix.vn
Reserve for EMI. GCLK@
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title
ER02
ER04
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (2/8) PCIE, SMBUS, CLK
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 13 of 58
5 4 3 2 1
5 4 3 2 1

U3C 39 PCH_ENBKL
PCH_ENBKL
U3D

4 DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0 FDI_CTX_PRX_N0


4 1 R190 2 J47 AP43
DMI_CTX_PRX_N1 BE20 DMI0RXN FDI_RXN0 AY14 FDI_CTX_PRX_N1 100K_0402_5% M45 L_BKLTEN SDVO_TVCLKINN AP45
4 DMI_CTX_PRX_N1 DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1
4 30 PCH_ENVDD L_VDD_EN SDVO_TVCLKINP
4 DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2 FDI_CTX_PRX_N2
4
DMI_CTX_PRX_N3 BG20 DMI2RXN FDI_RXN2 BH13 FDI_CTX_PRX_N3 P45 AM42
4 DMI_CTX_PRX_N3 DMI3RXN FDI_RXN3 FDI_CTX_PRX_N3
4 30 PCH_INV_PWM L_BKLTCTL SDVO_STALLN
BC12 FDI_CTX_PRX_N4 FDI_CTX_PRX_N4
4 AM40
DMI_CTX_PRX_P0 BE24 FDI_RXN4 BJ12 FDI_CTX_PRX_N5 T40 SDVO_STALLP
4 DMI_CTX_PRX_P0 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5
4 30 PCH_LCD_CLK L_DDC_CLK
4 DMI_CTX_PRX_P1 DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6 FDI_CTX_PRX_N6
4 30 K47 AP39
DMI1RXP FDI_RXN6 PCH_LCD_DATA L_DDC_DATA SDVO_INTN
4 DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7 FDI_CTX_PRX_N7
4 AP40
DMI_CTX_PRX_P3 BJ20 DMI2RXP FDI_RXN7 CTRL_CLK T45 SDVO_INTP
D 4 DMI_CTX_PRX_P3 D
DMI3RXP BG14 FDI_CTX_PRX_P0 CTRL_DATA P39 L_CTRL_CLK
FDI_RXP0 FDI_CTX_PRX_P0
4 L_CTRL_DATA
4 DMI_CRX_PTX_N0 AW24 BB14 FDI_CTX_PRX_P1 FDI_CTX_PRX_P1
4
DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1
4 DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2 FDI_CTX_PRX_P2
4 2 1 LVDS_IBG AF37 P38 HDMICLK_NB 35
DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 LVD_IBG SDVO_CTRLCLK HDMICLK_NB
4 DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3 FDI_CTX_PRX_P3
4 R191 2.37K_0402_1% AF36 M39 HDMIDAT_NB 35
DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3 LVD_VBG SDVO_CTRLDATA HDMIDAT_NB
DMI_CRX_PTX_N3 AV18 BE12 FDI_CTX_PRX_P4 T20
4 DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4
4

DMI
FDI
BG12 FDI_CTX_PRX_P5 FDI_CTX_PRX_P5
4 PAD AE48
DMI_CRX_PTX_P0 AY24 FDI_RXP5 BJ10 FDI_CTX_PRX_P6 AE47 LVD_VREFH AT49
4 DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6
4 LVD_VREFL DDPB_AUXN
4 DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7 FDI_CTX_PRX_P7
4 AT47
DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 DDPB_AUXP
4 DMI_CRX_PTX_P2 AY18 AT40 TMDS_B_HPD 35
DMI_CRX_PTX_P2 DMI2TXP DDPB_HPD TMDS_B_HPD
DMI_CRX_PTX_P3 AU18 PCH_TXCLK- AK39
4 DMI_CRX_PTX_P3 DMI3TXP 30 PCH_TXCLK- LVDSA_CLK#
AW16 AK40

LVDS
FDI_INT 4 30 PCH_TXCLK+ AV42 TMDS_B_DATA2#
FDI_INT FDI_INT PCH_TXCLK+ LVDSA_CLK DDPB_0N TMDS_B_DATA2#35
AV40 TMDS_B_DATA2
+1.05VS_VCC_EXP DDPB_0P TMDS_B_DATA2 35
BJ24 AV12 FDI_FSYNC0 4 30 PCH_TXOUT0- AN48 AV45 TMDS_B_DATA1#
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 PCH_TXOUT0- LVDSA_DATA#0 DDPB_1N TMDS_B_DATA1#35
30 PCH_TXOUT1- AM47 AV46 TMDS_B_DATA1
PCH_TXOUT1- LVDSA_DATA#1 DDPB_1P TMDS_B_DATA1 35

Digital Display Interface


1 2 DMI_IRCOMP BG25 BC10 FDI_FSYNC1 PCH_TXOUT2- AK47 AU48 TMDS_B_DATA0#
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 4 30 PCH_TXOUT2- LVDSA_DATA#2 DDPB_2N TMDS_B_DATA0#35
R192 49.9_0402_1% AJ48 AU47 TMDS_B_DATA0
LVDSA_DATA#3 DDPB_2P TMDS_B_DATA0 35
1 2 RBIAS_CPY BH21 AV14 FDI_LSYNC0 4 AV47 TMDS_B_CLK#
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 DDPB_3N TMDS_B_CLK# 35
R193 750_0402_1% 30 PCH_TXOUT0+ AN47 AV49 TMDS_B_CLK
PCH_TXOUT0+ LVDSA_DATA0 DDPB_3P TMDS_B_CLK 35
4mil width and place BB10 FDI_LSYNC1 4 30 PCH_TXOUT1+ AM49
FDI_LSYNC1 FDI_LSYNC1 PCH_TXOUT1+ LVDSA_DATA1
PCH_TXOUT2+ AK49
within 500mil of the PCH 30 PCH_TXOUT2+
AJ47 LVDSA_DATA2 P46
LVDSA_DATA3 DDPC_CTRLCLK P42
A18 DSWODVREN DDPC_CTRLDATA
DSWVRMEN AF40
R800 1 @ 2 0_0402_5% PCH_DPWROK AF39 LVDSB_CLK# AP47

System Power Management


PCH_DPWROK 39 LVDSB_CLK DDPC_AUXN
39 SUSACK# R802 1 @ 2 SUSACK#_R C12 E22 PCH_DPWROK_R AP49
0_0402_5% SUSACK# DPWROK 1 2 PCH_RSMRST#_R AH45 DDPC_AUXP AT38
R194 0_0402_5% AH47 LVDSB_DATA#0 DDPC_HPD
XDP_DBRESET#_R K3 B9 WAKE# 1 2 AF49 LVDSB_DATA#1 AY47
5 XDP_DBRESET#_R SYS_RESET# WAKE# PCIE_WAKE# 32,40 LVDSB_DATA#2 DDPC_0N
R195 0_0402_5% AF45 AY49
LVDSB_DATA#3 DDPC_0P AY43
SYSTEM_PWROK 1 2 SYSTEM_PWROK_I P12 N3 PM_CLKRUN# 1 R529 2 AH43 DDPC_1N AY45
SYS_PWROK CLKRUN# / GPIO32 PM_CLKRUNEC#39 LVDSB_DATA0 DDPC_1P
R196 0_0402_5% 0_0402_5% @ AH49 BA47
AF47 LVDSB_DATA1 DDPC_2N BA48
C
1 2PM_PWROK_R L22 G8 SUS_STAT# T22 PAD AF43 LVDSB_DATA2 DDPC_2P BB47 C
39 PCH_PWROK PWROK SUS_STAT# / GPIO61 LVDSB_DATA3 DDPC_3N
R197 0_0402_5% BB49
DDPC_3P
1 2 L10 N14 SUSCLK 2 R199 1 39
APWROK SUSCLK / GPIO62 SUSCLK_R
R198 0_0402_5% 0_0402_5% 30 PCH_CRT_BLU N48 M43
PCH_CRT_BLU CRT_BLUE DDPD_CTRLCLK
PCH_CRT_GRN P49 M36
30 PCH_CRT_GRN CRT_GREEN DDPD_CTRLDATA
5 PM_DRAM_PWRGD B13 D10 PM_SLP_S5# PCH_CRT_RED T49
PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 PM_SLP_S5# 39 30 PCH_CRT_RED CRT_RED
AT45
DDPD_AUXN

CRT
39 PCH_RSMRST# 1 2 PCH_RSMRST#_R C21 H4 PM_SLP_S4# PCH_CRT_DDC_CLK T39 AT43
RSMRST# SLP_S4# PM_SLP_S4# 39 30 PCH_CRT_DDC_CLK CRT_DDC_CLK DDPD_AUXP
R200 0_0402_5% PCH_CRT_DDC_DAT M40 BH41
30 PCH_CRT_DDC_DAT CRT_DDC_DATA DDPD_HPD

39 R801 1 @ 2SUSWARN#_R K16 F4 PM_SLP_S3# R201 33_0402_5% BB43


SUSWARN# SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# PM_SLP_S3# 39 DDPD_0N
0_0402_5% 30 PCH_CRT_HSYNC 1 2 HSYNC_PCH M47 BB45
1 2 VSYNC_PCH M49 CRT_HSYNC DDPD_0P BF44
30 PCH_CRT_VSYNC CRT_VSYNC DDPD_1N
1 2 PBTN_OUT#_R E20 G10 T23 PAD R202 33_0402_5% BE44
39 PBTN_OUT# PWRBTN# SLP_A# DDPD_1P
R203 0_0402_5% BF42
D2 @ CRT_IREF T43 DDPD_2N BE42
1 2 AC_PRESENT_R H20 G16 T24 PAD T42 DAC_IREF DDPD_2P BJ42
39,44 ACIN ACPRESENT / GPIO31 SLP_SUS# CRT_IRTN DDPD_3N BG42
DDPD_3P

1
RB751V-40_SOD323-2
Reserve PCH_GPIO72 E10 AP14 H_PM_SYNC 5 PANTHER-POINT_FCBGA989
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC
39 AC_PRESENT 1 2 R204 <BOM Structure>
R751 0_0402_5% 1K_0402_0.5%
RI# A10 K14 PCH_GPIO29 T25 PAD

2
RI# SLP_LAN# / GPIO29

PANTHER-POINT_FCBGA989
@ 1 2 XDP_DBRESET#_R
C166 100P_0402_50V8J

Reserve for EMI please close to U3


B +3VS B

1 2 PCH_CRT_DDC_CLK
R206 2.2K_0402_5%
1 2 PCH_CRT_DDC_DAT
R207 2.2K_0402_5%
+3VS 1 2 CTRL_CLK
R208 2.2K_0402_5%
5

U7 1 2 CTRL_DATA +3VS
1 2 2 +RTCVCC R209 2.2K_0402_5%
P

51 VGATE
R210 0_0402_5% B 4 SYSTEM_PWROK R211 1 2 2.2K_0402_5% PCH_LCD_CLK
Y SYSTEM_PWROK 5
PCH_PWROK 1 R212 1 2 2.2K_0402_5% PCH_LCD_DATA
A
G

DSWODVREN R213 2 1 330K_0402_5%


NC7SZ08P5X_NL_SC70-5
3

DSWODVREN R214 2 @ 1 330K_0402_5%

+3V_PCH
DSWODVREN - On Die DSW VR Enable
PCH_GPIO29 R230 1 2 10K_0402_5%
* H Enable
L Disable 1 2 PCH_CRT_BLU
R215 150_0402_1%~D
1 2 PCH_CRT_GRN
R216 150_0402_1%~D
PCH_GPIO72 R217 1 2 10K_0402_5% 1 2 PCH_CRT_RED
R218 150_0402_1%~D
RI# R219 1 2 10K_0402_5% 1 2 PCH_ENVDD
R220 @ 100K_0402_5%~D
WAKE# R221 1 2 10K_0402_5% +3VS

AC_PRESENT_R R222 1 2 200K_0402_5%


1

SUSWARN#_R R223 1 2 10K_0402_5%


@ R224
8.2K_0402_5%
A A
PCH_DPWROK R803 2 @ 1 100K_0402_5%
2

PCH_RSMRST# R225 1 2 10K_0402_5% PM_CLKRUN#

www.vinafix.vn
2

R130
PM_PWROK_R 2 1 10K_0402_5%

SYSTEM_PWROK_I
R226
2
10K_0402_5%
1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title
1

@ R227 100K_0402_5% Intel CRB EMRLDLKE2 Rev1.0


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (3/8) DMI,FDI,PM,GFX,DP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 14 of 58
5 4 3 2 1
5 4 3 2 1

U3E
AY7
RSVD1 AV7
BG26 RSVD2 AU3
BJ26 TP1 RSVD3 BG4
BH25 TP2 RSVD4
BJ16 TP3 AT10
GPIO19 => BBS_BIT0
BG16 TP4 RSVD5 BC8
AH38 TP5 RSVD6 GPIO51 => BBS_BIT1
AH37 TP6 AU2
TP7 RSVD7 Boot BIOS Strap
AK43 AT4
AK45 TP8 RSVD8 AT3
TP9 RSVD9 BBS_BIT0 BBS_BIT1 Boot BIOS
C18 AT1
N30 TP10 RSVD10 AY3 Location
H3 TP11 RSVD11 AT5
D TP12 RSVD12 0 0 LPC D
AH12 AV3
AM4 TP13 RSVD13 AV1
TP14 RSVD14 0 1 Reserved(NAND)
AM5 BB1
Y13 TP15 RSVD15 BA3
TP16 RSVD16 Panther Point USB Port Mapping 1 0 Reserved
K24 BB5
L24 TP17 RSVD17 BB3
TP18 RSVD18 1 1 SPI *
AB46 BB7
AB45 TP19 RSVD19 BE8
TP20 RSVD20

RSVD
BD4
RSVD21 BF6
RSVD22
B21 AV5 NV_ALE
M20 TP21 RSVD23 AV10
AY16 TP22 RSVD24
Intel Anti-Theft Techonlogy
BG46 TP23 AT8
TP24 RSVD25
High=Endabled
AY5 NV_ALE
RSVD26 BA2 Low=Disable(floating)
36 USB3_RX1_N BE28
USB3Rn1
RSVD27 *
36 USB3_RX2_N BC30 AT12
BE32 USB3Rn2 RSVD28 BF3 +1.8VS
BJ32 USB3Rn3 RSVD29
BC28 USB3Rn4 NV_ALE @ R228 1 2 1K_0402_5%
36 USB3_RX1_P USB3Rp1
36 USB3_RX2_P BE30
BF32 USB3Rp2
BG32 USB3Rp3 C24 USB20_N0
USB3Rp4 USBP0N USB20_N0 36
AV26 A24 USB20_P0
USB3_TX1_N 36
BB26 USB3Tn1 USBP0P C25 USB20_N1
USB20_P0 36 USB2/3 port 1
USB3_TX2_N 36 USB3Tn2 USBP1N USB20_N1 36
AU28 B25 USB20_P1 36 USB2/3 port 2
USB3Tn3 USBP1P USB20_P1
AY30 C26 USB20_N2 33
USB3Tn4 USBP2N USB20_N2
36 AU26 A26 USB20_P2 33 USB2 Conn. R
USB3_TX1_P USB3Tp1 USBP2P USB20_P2
AY26 K28 USB20_N3
C USB3_TX2_P 36 USB3Tp2 USBP3N USB20_N3 34 C
AV28 H28 USB20_P3 34 Card Reader
USB3Tp3 USBP3P USB20_P3
AW30 E28
USB3Tp4 USBP4N D28
USBP4P C28 USB20_N5
USBP5N USB20_N5 33
A28 USB20_P5
USBP5P C29
USB20_P5 33 USB2 Conn. R Reserve
USBP6N B29
PCI_PIRQA# K40 USBP6P N28
PIRQA# USBP7N HM76 not Support USB Port6,7
PCI_PIRQB# K38 M28
PIRQB# USBP7P

PCI
PCI_PIRQC# H38 L30
PCI_PIRQD# G38 PIRQC# USBP8N K30 +3V_PCH
PIRQD# USBP8P G30
Over Current Pin Default Usage
DGPU_HOLD_RST# C46 USBP9N E30
REQ1# / GPIO50 USBP9P

USB
PCH_GPIO52 C44 C30 USB20_N10 40 USB_OC0# 10K_0402_5% 1 2 R776
REQ2# / GPIO52 USBP10N USB20_N10
DGPU_PWR_EN E40 A30 USB20_P10 USB_OC2# 10K_0402_5% 1 2 R777
20,29,54
DGPU_PWR_EN REQ3# / GPIO54 USBP10P L32 USB20_N11
USB20_P10 40 Mini Card(BT) USB_OC7# 10K_0402_5% 1 2 R778
USBP11N USB20_N11 30
D47 K32 USB20_P11 30 Camera USB_OC5# 10K_0402_5% 1 2 R779
GNT1# / GPIO51 USBP11P USB20_P11
E42 G32
PCH_WAN_RADIO_OFF# F46 GNT2# / GPIO53 USBP12N E32
PCH_WAN_RADIO_OFF#
40 GNT3# / GPIO55 USBP12P C32
USBP13N A32 USB_OC6# 10K_0402_5% 1 2 R780
PCH_GPIO2 G42 USBP13P USB_OC4# 10K_0402_5% 1 2 R781
C167 ODD_DA# G40 PIRQE# / GPIO2 USB_OC3# 10K_0402_5% 1 2 R782
@ 1 2 ODD_DA#
31 ODD_DA#
PCH_GPIO4 C42 PIRQF# / GPIO3 C33 USBRBIAS
Within
1
500 2mils USB_OC1# 10K_0402_5% 1 2 R783
0.1U_0402_16V4Z~D PCH_GPIO5 D44 PIRQG# / GPIO4 USBRBIAS# R231 22.6_0402_1%
PIRQH# / GPIO5
Reserve for EMI please close to U3 B33
PAD T26 @ K10 USBRBIAS
PME#
PCH_PLTRST# C6 A14 USB_OC0#
PLTRST# OC0# / GPIO59 USB_OC0# 36 (For USB Port0, 1)
K20 USB_OC1# 36 (For USB Port2) +3V_PCH C673 1 2 0.1U_0402_10V7K
OC1# / GPIO40 USB_OC1#
B17 USB_OC2#
B CLK_PCI_LPBACK 13 R232 2 1 22_0402_5% CLK_PCI0 H49 OC2# / GPIO41 C16 USB_OC3# B
CLK_PCI_LPBACK CLKOUT_PCI0 OC3# / GPIO42
39 CLK_PCI_LPC R233 1 2 22_0402_5% CLK_PCI1 H43 L16 USB_OC4# EMI close to R776
CLK_PCI_LPC CLKOUT_PCI1 OC4# / GPIO43
CLK_LPC_DEBUG1 R234 1 2 22_0402_5% CLK_PCI3 J48 A16 USB_OC5#
40 CLK_LPC_DEBUG1 CLKOUT_PCI2 OC5# / GPIO9
K42 D14 USB_OC6#
ER06 H40 CLKOUT_PCI3 OC6# / GPIO10 C14 USB_OC7#
CLKOUT_PCI4 OC7# / GPIO14

PANTHER-POINT_FCBGA989 1 @ 2
<BOM Structure> R235 0_0402_5%

+3VS
+3V_PCH +3VS 1 @ 2
R236 0_0402_5%
PCH_GPIO4 8.2K_0402_5% 1 2 R784
1

PCI_PIRQB# 8.2K_0402_5% 1 2 R785 +3VS


PCI_PIRQD# 8.2K_0402_5% 1 2 R786 R626 R631
PCI_PIRQC# 8.2K_0402_5% 1 2 R787 0_0402_5% 0_0402_5% C169 DIS@
@ 1 2
+3VS 0.1U_0402_16V4Z~D
2

5
U9
2

@ C168 DIS@ 2 PCH_PLTRST#

P
PCH_WAN_RADIO_OFF# 8.2K_0402_5% 1 2 R788 R238 1 2 2 1 R240 4 B
20 DGPU_RST# Y
PCI_PIRQA# 8.2K_0402_5% 1 2 R789 10K_0402_5% 0.1U_0402_16V4Z~D 100_0402_5% 1 DGPU_HOLD_RST#
A
5

G
ODD_DA# 8.2K_0402_5% 1 2 R790 U8

1
PCH_GPIO5 8.2K_0402_5% 1 2 R791 DIS@ NC7SZ08P5X_NL_SC70-5
VCC
1

3
1 PCH_PLTRST# R241
4 IN1 100K_0402_5%
32,39,40,5 PLT_RST# OUT 2 DIS@
GND

IN2

2
PCH_GPIO52 8.2K_0402_5% 1 2 R792
PCH_GPIO2 8.2K_0402_5% 1 2 R793
3

A MC74VHC1G08DFT2G_SC70-5 A

DGPU_HOLD_RST# 1 R244 2 10K_0402_5%


1

@
DGPU_PWR_EN 1 R288 2 10K_0402_5%
@ R243
100K_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
2

www.vinafix.vn
DGPU_HOLD_RST# 1 R811 2 10K_0402_5%
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (4/8) PCI, USB, NVRAM
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 15 of 58
5 4 3 2 1
5 4 3 2 1

+3VS

CRT_DET 1 @ 2 10K_0402_5%
R245 U3F
ODD_DETECT# 1 2 200K_0402_5%
R246 CRT_DET T7 C40 ODD_EN# 31
BMBUSY# / GPIO0 TACH4 / GPIO68 ODD_EN#
PCH_GPIO16 1 2 10K_0402_5% DMI Termination Voltage
R247 PCH_GPIO1 A42 B41 PCH_GPIO69
PCH_BT_ON 1 2 10K_0402_5% TACH1 / GPIO1 TACH5 / GPIO69
Set to Vcc when HIGH
R248 ER04 USB30_SMI# H36 C41 GPIO70 @ T28 PAD +3VS DF_TVS
KB_RST# 1 2 10K_0402_5% TACH2 / GPIO6 TACH6 / GPIO70
Set to Vss when LOW
R249 39 EC_SCI# EC_SCI# E38 A40 GPIO71 @ T29 PAD
TACH3 / GPIO7 TACH7 / GPIO71

2
D PCH_GPIO48 1 2 10K_0402_5% D
R250 EC_SMI# C10 R251 +1.8VS
39 EC_SMI# GPIO8
PCH_GPIO22 1 @ 2 10K_0402_5% 10K_0402_5%
R252 C4
LAN_PHY_PWR_CTRL / GPIO12

1
ODD_EN# 1 2 10K_0402_5%

1
R253 EC_LID_OUT# 1 39 2 PCH_LID_SW_IN# G2 P4 GATEA20 39
EC_LID_OUT# GPIO15 A20GATE GATEA20
DGPU_PWROK 1 2 10K_0402_5% R498 0_0402_5% R254
R255 AU16 2.2K_0402_5%
PCH_GPIO16 U2 PECI

2
SATA4GP / GPIO16 P5 DF_TVS 2 1
RCIN# KB_RST# 39 H_SNB_IVB# 5
1 2 PCH_GPIO22 1K_0402_5% R256
D40

GPIO
R812 10K_0402_5% DGPU_PWROK 39 AY11
DGPU_PWROK TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD 5
CLOSE TO THE BRANCHING POINT

CPU/MISC
PCH_GPIO22 T5 AY10 H_THERMTRIP#_C 1 2 H_THERMTRIP# H_THERMTRIP# 5
SCLOCK / GPIO22 THRMTRIP# 390_0402_5% R258
E8 T14
GPIO24 INIT3_3V#
+3VS
DS_WAKE#
DS_WAKE# 39 1 @ 2 PCH_GPIO27 E16
GPIO27 DF_TVS
AY1 DF_TVS
R804 0_0402_5%
1 2 PCH_GPIO69 PCH_GPIO28 P8 H_THERMTRIP# C663 1 2 100P_0402_50V8J Close to R258
10K_0402_5% R807 GPIO28 AH8
PCH_BT_ON K1 TS_VSS1
PCH_BT_ON 40 STP_PCI# / GPIO34
2 1 PCH_GPIO1 AK11
10K_0402_5% R257 K4 TS_VSS2
1 @ 2 PCH_GPIO37 GPIO35 AH10
TS_VSS3
Reserve for ESD please close to U3
10K_0402_5% R259 31 ODD_DETECT# V8
ODD_DETECT# SATA2GP / GPIO36
2 1 PCH_GPIO38 AK10
10K_0402_5% R260 PCH_GPIO37 M5 TS_VSS4
2 1 PCH_GPIO39 SATA3GP / GPIO37 @ 1 2 H_CPUPWRGD
10K_0402_5% R261 PCH_GPIO38 N2 P37 @ T30 PAD C170 100P_0402_50V8J
1 2 PCH_GPIO49 SLOAD / GPIO38 NC_1
10K_0402_5% R262 PCH_GPIO39 M3
C 2 1 USB30_SMI# SDATAOUT0 / GPIO39 C
10K_0402_5% R263 PCH_GPIO48 V13 BG2 Reserve for EMI please close to U3
SDATAOUT1 / GPIO48 VSS_NCTF_15

30 2 R265 1 0_0402_5% PCH_GPIO49 V3 BG48


CABC_SAVING SATA5GP / GPIO49 / TEMP_ALERT# VSS_NCTF_16
@
HDD2_DETECT# D6 BH3
R264 2 1 PCH_GPIO37 GPIO57 VSS_NCTF_17
100K_0402_5% BH47
VSS_NCTF_18
A4 BJ4
VSS_NCTF_1 VSS_NCTF_19
A44 BJ44
VSS_NCTF_2 VSS_NCTF_20
A45 BJ45
+3VALW VSS_NCTF_3 VSS_NCTF_21
A46

NCTF
BJ46
VSS_NCTF_4 VSS_NCTF_22
1 @ 2 DS_WAKE# A5 BJ5
10K_0402_5% R805 VSS_NCTF_5 VSS_NCTF_23
A6 BJ6
1 2 PCH_GPIO27 VSS_NCTF_6 VSS_NCTF_24
@ R266 10K_0402_5% B3 C2
VSS_NCTF_7 VSS_NCTF_25
B47 C48
VSS_NCTF_8 VSS_NCTF_26
BD1 D1
+3V_PCH VSS_NCTF_9 VSS_NCTF_27
BD49 D49
VSS_NCTF_10 VSS_NCTF_28
BE1 E1
PCH_GPIO28 1 2 10K_0402_5% VSS_NCTF_11 VSS_NCTF_29
R268 BE49 E49
B VSS_NCTF_12 VSS_NCTF_30 B
BF1 F1
HDD2_DETECT# 1 2 10K_0402_5% VSS_NCTF_13 VSS_NCTF_31
R269 BF49 F49
VSS_NCTF_14 VSS_NCTF_32

PCH_LID_SW_IN# 1 2 1K_0402_5% PANTHER-POINT_FCBGA989


R270 <BOM Structure>
EC_SMI# 1 2 10K_0402_5%
R271
GPIO28
On-Die PLL Voltage Regulator
This signal has a weak internal pull up
H On-Die voltage regulator enable
* L On-Die PLL Voltage Regulator disable
1 2 PCH_GPIO28

@ R272 1K_0402_5%

+3VS
2

High: CRT Plugged R273


10K_0402_5%
A A
1

CRT_DET
1

D
2 Q12
30
CRT_DET#
G SSM3K7002BFU_SC70-3
S
3

Security Classification Compal Secret Data Compal Electronics, Inc.

www.vinafix.vn
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (5/8) GPIO, CPU, MISC
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 16 of 58
5 4 3 2 1
5 4 3 2 1

PCH Power Rail Table


+1.05VS Refer to CPU EDS R1.5
U3G POWER +3VS S0 Iccmax
Voltage Rail Voltage Current (A)
1300mA L1

0.01U_0402_16V7K

0.1U_0402_10V7K
AA23 U48 +VCCADAC 2 1
AC23 VCCCORE[1] 1mA VCCADAC
VCCCORE[2] 1 1 1 BLM18PG181SN1_0603 V_PROC_IO 1.05 0.001

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 1 1 AD21

CRT
VCCCORE[3]

C171

C172
AD23 U47 C173
VCCCORE[4] VSSADAC

C175

C176

C177
C174 AF21 10U_0805_6.3V6M V5REF 5 0.001

VCC CORE
10U_0805_6.3V6M AF23 VCCCORE[5] 2 2 2
D 2 2 2 2 AG21 VCCCORE[6] +3VS D
AG23 VCCCORE[7]
VCCCORE[8]
V5REF_Sus 5 0.001
AG24 AK36
AG26 VCCCORE[9] 1mAVCCALVDS
AG27 VCCCORE[10] AK37 +1.8VS
VCCCORE[11] VSSALVDS
Vcc3_3 3.3 0.228
AG29
AJ23 VCCCORE[12]
VCCCORE[13] Near AP43 L2
AJ26 AM37 2 1

LVDS
+VCCTX_LVDS VccADAC 3.3 0.001
AJ27 VCCCORE[14] VCCTX_LVDS[1] C178 1 0.1UH_MLF1608DR10KT_10%_1608
VCCCORE[15] 1 1
+1.05VS AJ29 AM38 0.01U_0402_16V7K C180 0.1uH inductor, 200mA
VCCCORE[16] VCCTX_LVDS[2]

22U_0805_6.3V6M
AJ31 C179 VccADPLLA 1.05 0.075
VCCCORE[17] AP36
40mAVCCTX_LVDS[3] 0.01U_0402_16V7K
2 2 2
AP37 ER06 VccADPLLB 1.05 0.075
AN19 VCCTX_LVDS[4]
VCCIO[28]
VccCore 1.05 1.3
BJ22
VCCAPLLEXP
V33 VccDMI 1.05 0.042
VCC3_3[6] +3VS
AN16

HVCMOS
VCCIO[15]
1
+1.05VS AN17 VccIO 1.05 3.709
VCCIO[16] V34 C182
VCC3_3[7]
0.1U_0402_10V7K
AN21 2 VccASW 1.05 0.903
VCCIO[17]
1

AN26 +1.5VS
VCCIO[18]
R274 R275 VccSPI 3.3 0.01
AN27 3709mA AT16
0_0805_5% +1.05VS_VCC_EXP VCCIO[19] VCCVRM[3]
0_0805_5%
AP21 +VCCP_VCCDMI +1.05VS VccDSW 3.3 0.001
VCCIO[20] R276
2

C C
+1.05VS_VCC_EXP AP23 AT20 +VCCP_VCCDMI 1 2
VCCIO[21] VCCDMI[1]
1 VccDFTERM 1.8 0.002

DMI
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 1 1 AP24
VCCIO[22] R387 0_0805_5%

VCCIO
C183
C185

C186

C187

C188

C184 AP26 75mA VCCCLKDMI AB36 +1.05VS_VCC_DMI_CCI 1 2 VccRTC 3.3 6 uA


VCCIO[23] +1.05VS 2
10U_0805_6.3V6M 1 1U_0402_6.3V6K
2 2 2 2 2 AT24
VCCIO[24] 0_0805_5%
C189 VccSus3_3 3.3 0.065
+3VS AN33 2 1U_0402_6.3V6K
VCCIO[25]
VccSusHDA 3.3 / 1.5 0.01
AN34 AG16
VCCIO[26] VCCDFTERM[1]
VccVRM 1.8 / 1.5 0.167
BH29 AG17
VCC3_3[3] 2mA VCCDFTERM[2] +1.8VS

DFT / SPI
1

0.1U_0402_10V7K
C190 +1.5VS VccCLKDMI 1.05 0.075
AJ16 1
0.1U_0402_10V7K VCCDFTERM[3]
2

C191
AP16 VccSSC 1.05 0.095
VCCVRM[2] AJ17
VCCDFTERM[4] 2
BG6 VccDIFFCLKN 1.05 0.055
VccAFDIPLL

AP17 VccALVDS 3.3 0.001


+1.05VS VCCIO[27]
10mA VCCSPI V1 +3V_VCCPSPI ER03
FDI

AU20 1 VccTX_LVDS 1.8 0.04


+VCCP_VCCDMI VCCDMI[2] 2 1
+3VS
C193 R279 0_0603_5%
B PANTHER-POINT_FCBGA989 1U_0402_6.3V6K B
2
<BOM Structure>

A A

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (6/8) PWR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 17 of 58
5 4 3 2 1
5 4 3 2 1

+1.05VS

2 @ 1 +VCCACLK
+3V_PCH R280 0_0603_5%
U3J POWER
1 2
R281 0_0603_5% 1 AD49 N26
VCCACLK VCCIO[29] +1.05VS
C194 P26 1
0.1U_0402_10V7K +VCCPDSW T16 VCCIO[30]
D ER03 2 VCCDSW3_33mA P28 C195 D
VCCIO[31] 1U_0402_6.3V6K
+PCH_VCCDSW V12 T27 2
DCPSUSBYP VCCIO[32]
1
T29
@ C196 +3VS_VCC_CLKF33 T38 VCCIO[33]
0.1U_0402_10V7K VCC3_3[5]
2 T23
+1.05VS 119mA VCCSUS3_3[7] +3V_PCH

0.1U_0402_10V7K
BH23
VCCAPLLDMI2 T24
VCCSUS3_3[8] 1 +3V_PCH +5V_PCH +3V_PCH

0.1U_0402_10V7K
AL29
VCCIO[14]

C198
V23 1
VCCSUS3_3[9]

USB

2
2

C199
+VCCSUS1 AL24 V24 +VCCA_USBSUS
DCPSUS[3] VCCSUS3_3[10]

1U_0402_6.3V6K
1 R282 D3
@ P24 2
VCCSUS3_3[6] 1 10_0402_5% RB751V40_SC76-2

@ C201
C200
1U_0402_6.3V6K AA19

1
2 VCCASW[1] T26 +PCH_V5REF_SUS
VCCIO[34] +1.05VS 2
AA21 903mA 1
VCCASW[2]
AA24 M26 +PCH_V5REF_SUS C202
VCCASW[3] 1mA V5REF_SUS 0.1U_0603_25V7K
1 1 +3V_PCH 2

0.1U_0402_10V7K
AA26

Clock and Miscellaneous


C203 C204 VCCASW[4] AN23 +VCCA_USBSUS
DCPSUS[4] 1
22U_0805_6.3V6M 22U_0805_6.3V6M AA27
2 2 VCCASW[5]

C205
AN24
AA29 VCCSUS3_3[1]
VCCASW[6] 2
+1.05VS AA31 +5VS +3VS
VCCASW[7]
AC26 P34 +PCH_V5REF_RUN
VCCASW[8] 1mA V5REF

2
C C

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D
1 1 1
AC27 R283 D4
VCCASW[9]
C206

C207

C208
N20 10_0402_5% RB751V40_SC76-2
VCCSUS3_3[2] +3V_PCH
AC29

PCI/GPIO/LPC
2 2 2 VCCASW[10] 1
N22

1
AC31 VCCSUS3_3[3] C209 +PCH_V5REF_RUN
VCCASW[11] P20 1U_0402_6.3V +3VS
VCCSUS3_3[4] 2 1
AD29
VCCASW[12] P22 C210
AD31 VCCSUS3_3[5] 1U_0603_10V6K
VCCASW[13] 1 2
+3VS W21 AA16 C211
VCCASW[14] VCC3_3[1] 0.1U_0402_10V7K
R289 W23 W16 2 +3VS
1 2 +3VS_VCC_CLKF33 VCCASW[15] VCC3_3[8]
10U_0805_10V4Z

1U_0402_6.3V6K

1 1 W24 T34
VCCASW[16] VCC3_3[4]
0_0805_5% 1
C212

C213

W26
@ VCCASW[17] C214
2 2 W29 +3VS 0.1U_0402_10V7K
VCCASW[18] 2
W31 AJ2
VCCASW[19] VCC3_3[2] +1.05VS_SATA3
1 R284
W33
VCCASW[20] AF13 C215 2 1
VCCIO[5] +1.05VS
0.1U_0402_10V7K 1
+1.05VS +VCCRTCEXT N16 2 0_0805_5%
+1.5VS DCPRTC AH13 C216
1 VCCIO[12]
2 @ 1 +1.05VM_VCCSUS 1U_0402_6.3V6K
R285 0_0603_5% C217 Y49 AH14 +1.05VS_SATA3 2
0.1U_0402_10V7K VCCVRM[4] VCCIO[13]
2
B +1.05VS AF14 B
+1.05VS_VCCA_A_DPL BD47 VCCIO[6]
VCCADPLLA75mA AK1

SATA
+1.05VS_VCCA_B_DPL BF47 VCCAPLLSATA +1.5VS
VCCADPLLB75mA
1
C218 AF11
AF17 VCCVRM[1] +1.05VS_VCC_SATA
+1.05VS +1.05VS_VCCDIFFCLKN AF33 VCCIO[7] R286
1U_0402_6.3V6K
2 AF34 VCCDIFFCLKN[1] AC16 +1.05VS_VCC_SATA 2 1
18mil VCCDIFFCLKN[2]
55mA VCCIO[2] +1.05VS
2 1 +1.05VS_VCCDIFFCLKN AG34
VCCDIFFCLKN[3]

1U_0402_6.3V6K
R287 0_0603_5%
1 AC17 1 0_0805_5%
VCCIO[3]
18mil

C221
C220 AG33 AD17
1U_0402_6.3V6K VCCSSC95mA VCCIO[4]
+1.05VS 2 2 +1.05VS
+VCCSST V16
DCPSST
1 1 +1.05VM_VCCSUS
C223 1 T17 T21
C222 0.1U_0402_10V7K @ V19 DCPSUS[1] VCCASW[22]
1U_0402_6.3V6K C224 DCPSUS[2]
MISC

+1.05VS 2 2 1U_0402_6.3V6K V21


2 VCCASW[23]
0.1U_0402_10V7K

0.1U_0402_10V7K

CPU

BJ8 1mA
V_PROC_IO T19
1 1 1 VCCASW[21]
+RTCVCC
C226

C227

C225
4.7U_0603_6.3V6K
2 2 2 A22 P32 +VCCSUSHDA 1 2
RTC

VCCRTC 10mA VCCSUSHDA +3V_PCH


0.1U_0402_10V7K

0.1U_0402_10V7K

1U_0402_6.3V6K

0.1U_0402_10V7K
HDA

R291 0_0402_5%
1 1 1 1

150_0402_1%
L8 PANTHER-POINT_FCBGA989 If it support 3.3V audio signals

1
A
C228

C229

C230

C231

10UH_LBR2012T100M_20%~D POP:RH12 (0ohm) A


<BOM Structure>
1 2 +1.05VS_VCCA_A_DPL
+1.05VS 2 2 2 2

R292
@
If it support 1.5V audio signals

www.vinafix.vn
220U_B2_2.5VM_R35M

1 2 +1.05VS_VCCA_B_DPL POP:RH12 (180 ohm)/RH13 (150 ohm)

2
220U_B2_2.5VM_R35M

L9
1U_0402_6.3V6K

1U_0402_6.3V6K

10UH_LBR2012T100M_20%~D 1 1
1 1 Security Classification Compal Secret Data Compal Electronics, Inc.
C232

C233

+ +
C234

C235

Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title


2 2 2 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (7/8) PWR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 18 of 58
5 4 3 2 1
5 4 3 2 1

U3I

AY4 H46
AY42 VSS[159] VSS[259] K18
AY46 VSS[160] VSS[260] K26
U3H AY8 VSS[161] VSS[261] K39
D H5 B11 VSS[162] VSS[262] K46 D
VSS[0] B15 VSS[163] VSS[263] K7
AA17 AK38 B19 VSS[164] VSS[264] L18
AA2 VSS[1] VSS[80] AK4 B23 VSS[165] VSS[265] L2
AA3 VSS[2] VSS[81] AK42 B27 VSS[166] VSS[266] L20
AA33 VSS[3] VSS[82] AK46 B31 VSS[167] VSS[267] L26
AA34 VSS[4] VSS[83] AK8 B35 VSS[168] VSS[268] L28
AB11 VSS[5] VSS[84] AL16 B39 VSS[169] VSS[269] L36
AB14 VSS[6] VSS[85] AL17 B7 VSS[170] VSS[270] L48
AB39 VSS[7] VSS[86] AL19 F45 VSS[171] VSS[271] M12
AB4 VSS[8] VSS[87] AL2 BB12 VSS[172] VSS[272] P16
AB43 VSS[9] VSS[88] AL21 BB16 VSS[173] VSS[273] M18
AB5 VSS[10] VSS[89] AL23 BB20 VSS[174] VSS[274] M22
AB7 VSS[11] VSS[90] AL26 BB22 VSS[175] VSS[275] M24
AC19 VSS[12] VSS[91] AL27 BB24 VSS[176] VSS[276] M30
AC2 VSS[13] VSS[92] AL31 BB28 VSS[177] VSS[277] M32
AC21 VSS[14] VSS[93] AL33 BB30 VSS[178] VSS[278] M34
AC24 VSS[15] VSS[94] AL34 BB38 VSS[179] VSS[279] M38
AC33 VSS[16] VSS[95] AL48 BB4 VSS[180] VSS[280] M4
AC34 VSS[17] VSS[96] AM11 BB46 VSS[181] VSS[281] M42
AC48 VSS[18] VSS[97] AM14 BC14 VSS[182] VSS[282] M46
AD10 VSS[19] VSS[98] AM36 BC18 VSS[183] VSS[283] M8
AD11 VSS[20] VSS[99] AM39 BC2 VSS[184] VSS[284] N18
AD12 VSS[21] VSS[100] AM43 BC22 VSS[185] VSS[285] P30
AD13 VSS[22] VSS[101] AM45 BC26 VSS[186] VSS[286] N47
AD19 VSS[23] VSS[102] AM46 BC32 VSS[187] VSS[287] P11
AD24 VSS[24] VSS[103] AM7 BC34 VSS[188] VSS[288] P18
AD26 VSS[25] VSS[104] AN2 BC36 VSS[189] VSS[289] T33
AD27 VSS[26] VSS[105] AN29 BC40 VSS[190] VSS[290] P40
AD33 VSS[27] VSS[106] AN3 BC42 VSS[191] VSS[291] P43
AD34 VSS[28] VSS[107] AN31 BC48 VSS[192] VSS[292] P47
AD36 VSS[29] VSS[108] AP12 BD46 VSS[193] VSS[293] P7
C AD37 VSS[30] VSS[109] AP19 BD5 VSS[194] VSS[294] R2 C
AD38 VSS[31] VSS[110] AP28 BE22 VSS[195] VSS[295] R48
AD39 VSS[32] VSS[111] AP30 BE26 VSS[196] VSS[296] T12
AD4 VSS[33] VSS[112] AP32 BE40 VSS[197] VSS[297] T31
AD40 VSS[34] VSS[113] AP38 BF10 VSS[198] VSS[298] T37
AD42 VSS[35] VSS[114] AP4 BF12 VSS[199] VSS[299] T4
AD43 VSS[36] VSS[115] AP42 BF16 VSS[200] VSS[300] W34
AD45 VSS[37] VSS[116] AP46 BF20 VSS[201] VSS[301] T46
AD46 VSS[38] VSS[117] AP8 BF22 VSS[202] VSS[302] T47
AD8 VSS[39] VSS[118] AR2 BF24 VSS[203] VSS[303] T8
AE2 VSS[40] VSS[119] AR48 BF26 VSS[204] VSS[304] V11
AE3 VSS[41] VSS[120] AT11 BF28 VSS[205] VSS[305] V17
AF10 VSS[42] VSS[121] AT13 BD3 VSS[206] VSS[306] V26
AF12 VSS[43] VSS[122] AT18 BF30 VSS[207] VSS[307] V27
AD14 VSS[44] VSS[123] AT22 BF38 VSS[208] VSS[308] V29
AD16 VSS[45] VSS[124] AT26 BF40 VSS[209] VSS[309] V31
AF16 VSS[46] VSS[125] AT28 BF8 VSS[210] VSS[310] V36
AF19 VSS[47] VSS[126] AT30 BG17 VSS[211] VSS[311] V39
AF24 VSS[48] VSS[127] AT32 BG21 VSS[212] VSS[312] V43
AF26 VSS[49] VSS[128] AT34 BG33 VSS[213] VSS[313] V7
AF27 VSS[50] VSS[129] AT39 BG44 VSS[214] VSS[314] W17
AF29 VSS[51] VSS[130] AT42 BG8 VSS[215] VSS[315] W19
AF31 VSS[52] VSS[131] AT46 BH11 VSS[216] VSS[316] W2
AF38 VSS[53] VSS[132] AT7 BH15 VSS[217] VSS[317] W27
AF4 VSS[54] VSS[133] AU24 BH17 VSS[218] VSS[318] W48
AF42 VSS[55] VSS[134] AU30 BH19 VSS[219] VSS[319] Y12
AF46 VSS[56] VSS[135] AV16 H10 VSS[220] VSS[320] Y38
AF5 VSS[57] VSS[136] AV20 BH27 VSS[221] VSS[321] Y4
AF7 VSS[58] VSS[137] AV24 BH31 VSS[222] VSS[322] Y42
AF8 VSS[59] VSS[138] AV30 BH33 VSS[223] VSS[323] Y46
AG19 VSS[60] VSS[139] AV38 BH35 VSS[224] VSS[324] Y8
AG2 VSS[61] VSS[140] AV4 BH39 VSS[225] VSS[325] BG29
B AG31 VSS[62] VSS[141] AV43 BH43 VSS[226] VSS[328] N24 B
AG48 VSS[63] VSS[142] AV8 BH7 VSS[227] VSS[329] AJ3
AH11 VSS[64] VSS[143] AW14 D3 VSS[228] VSS[330] AD47
AH3 VSS[65] VSS[144] AW18 D12 VSS[229] VSS[331] B43
AH36 VSS[66] VSS[145] AW2 D16 VSS[230] VSS[333] BE10
AH39 VSS[67] VSS[146] AW22 D18 VSS[231] VSS[334] BG41
AH40 VSS[68] VSS[147] AW26 D22 VSS[232] VSS[335] G14
AH42 VSS[69] VSS[148] AW28 D24 VSS[233] VSS[337] H16
AH46 VSS[70] VSS[149] AW32 D26 VSS[234] VSS[338] T36
AH7 VSS[71] VSS[150] AW34 D30 VSS[235] VSS[340] BG22
AJ19 VSS[72] VSS[151] AW36 D32 VSS[236] VSS[342] BG24
AJ21 VSS[73] VSS[152] AW40 D34 VSS[237] VSS[343] C22
AJ24 VSS[74] VSS[153] AW48 D38 VSS[238] VSS[344] AP13
AJ33 VSS[75] VSS[154] AV11 D42 VSS[239] VSS[345] M14
AJ34 VSS[76] VSS[155] AY12 D8 VSS[240] VSS[346] AP3
AK12 VSS[77] VSS[156] AY22 E18 VSS[241] VSS[347] AP1
AK3 VSS[78] VSS[157] AY28 E26 VSS[242] VSS[348] BE16
VSS[79] VSS[158] G18 VSS[243] VSS[349] BC16
PANTHER-POINT_FCBGA989 G20 VSS[244] VSS[350] BG28
G26 VSS[245] VSS[351] BJ28
<BOM Structure> VSS[246] VSS[352]
G28
G36 VSS[247]
G48 VSS[248]
H12 VSS[249]
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
A VSS[258] A

PANTHER-POINT_FCBGA989

www.vinafix.vn
<BOM Structure>

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (8/8) VSS
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 19 of 58
5 4 3 2 1
A B C D E

for GS4, the boot voltage is 0.975V +3VSG


PCIE_GTX_C_CRX_P[0..15]
4
PCIE_GTX_C_CRX_P[0..15] for GV4, the boot voltage is 0.85V GPIO I/O USAGE
PCIE_GTX_C_CRX_N[0..15]
4
PCIE_GTX_C_CRX_N[0..15]
PCIE_CTX_C_GRX_P[0..15]
GPIO0 O GPU_VID4

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%
PCIE_CTX_C_GRX_P[0..15] 4
PCIE_CTX_C_GRX_N[0..15]
PCIE_CTX_C_GRX_N[0..15] 4 GPIO1 O GPU_VID3

@ 1

@ 1

@ 1

2 DIS@ 1

@ 1

2 DIS@ 1
GPIO2 O LCD_BL_PWM

R901

R902

R903

R904

R905

R906
GPIO3 O LCD_VDD

2
U10A
Part 1 of 5
PCIE_CTX_C_GRX_P0 AE12 N1 VID_4 VID_0 R907 1 DIS@ 2 0_0402_5% 54 GPIO4 O LCD_BLEN
1 PEX_RX0 GPIO0 GPU_VID0 1
PCIE_CTX_C_GRX_N0 AF12 G1 VID_3 VID_1 R908 1 DIS@ 2 0_0402_5%
PEX_RX0_N GPIO1 GPU_VID1 54
PCIE_CTX_C_GRX_P1 AG12 C1 VID_2 R909 1 DIS@ 2 0_0402_5%
PEX_RX1 GPIO2 GPU_VID2 54
PCIE_CTX_C_GRX_N1 AG13 M2 VID_3 R910 1 DIS@ 2 0_0402_5% 54 GPIO5 O GPU_VID1
AF13 PEX_RX1_N GPIO3 M3 1 2 GPU_VID3
PCIE_CTX_C_GRX_P2 VID_4 R911 DIS@ 0_0402_5% 54
PEX_RX2 GPIO4 GPU_VID4
PCIE_CTX_C_GRX_N2 AE13 K3 VID_1 VID_5 R912 1 DIS@ 2 0_0402_5% 54
PEX_RX2_N GPIO5 GPU_VID5
PCIE_CTX_C_GRX_P3 AE15 K2 VID_2 GPIO6 O GPU_VID2
PCIE_CTX_C_GRX_N3 AF15 PEX_RX3 GPIO6 J2 +3VSG

R915

R916

R917

R918

R919

R920
PEX_RX3_N GPIO7

DIS@ 1

@ 1

DIS@ 1

@ 1
PCIE_CTX_C_GRX_P4 AG15 C2 R913 2 DIS@ 1 10K_0402_5%

GPIO
PCIE_CTX_C_GRX_N4 AG16 PEX_RX4 GPIO8 M1 R914 2 DIS@ 1 10K_0402_5%

DIS@

DIS@
PCIE_CTX_C_GRX_P5 AF16 PEX_RX4_N GPIO9 D2
GPIO7 O 3D Vision
PCIE_CTX_C_GRX_N5 AE16 PEX_RX5 GPIO10 D1 VID_0
PCIE_CTX_C_GRX_P6 AE18 PEX_RX5_N GPIO11 J3 ACIN_BUF_VGA GPIO8 I/O OVERT#

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%
2

2
PCIE_CTX_C_GRX_N6 AF18 PEX_RX6 GPIO12 J1 VID_5
PCIE_CTX_C_GRX_P7 AG18 PEX_RX6_N GPIO13 K1
PCIE_CTX_C_GRX_N7 AG19 PEX_RX7 GPIO14 F3
PCIE_CTX_C_GRX_P8 AF19 PEX_RX7_N GPIO15 G3
GPIO9 I/O ALERT#
PCIE_CTX_C_GRX_N8 AE19 PEX_RX8 GPIO16 G2
PCIE_CTX_C_GRX_P9 AE21 PEX_RX8_N GPIO17 F1
PCIE_CTX_C_GRX_N9 AF21 PEX_RX9 GPIO18 F2
GPIO10 O MEM_VREF_CTL
PCIE_CTX_C_GRX_P10 AG21 PEX_RX9_N GPIO19
PCIE_CTX_C_GRX_N10 AG22 PEX_RX10 AD2
PCIE_CTX_C_GRX_P11 AF22 PEX_RX10_N DACA_HSYNC AD1
GPIO11 O GPU_VID0
PCIE_CTX_C_GRX_N11 AE22 PEX_RX11 DACA_VSYNC

DACA
PCIE_CTX_C_GRX_P12 AE24 PEX_RX11_N AE2
PCIE_CTX_C_GRX_N12 AF24 PEX_RX12 DACA_RED AD3 +3VSG GPIO12 I PWR_LEVEL
PCIE_CTX_C_GRX_P13 AG24 PEX_RX12_N DACA_BLUE AE3
PCIE_CTX_C_GRX_N13 AF25 PEX_RX13 DACA_GREEN
PEX_RX13_N GPIO13 O GPU_VID5

1
PCIE_CTX_C_GRX_P14 AG25 AF1
PCIE_CTX_C_GRX_N14 AG26 PEX_RX14 DACA_VREF AE1 R315
PCIE_CTX_C_GRX_P15 AF27 PEX_RX14_N DACA_RSET DIS@ GPIO14 I HPD_AB

PCI EXPRESS
PEX_RX15

5
PCIE_CTX_C_GRX_N15 AE27 U6 10K_0402_5% U11 NC7SZ08P5X_NL_SC70-5
PEX_RX15_N DACB_HSYNC U4 2

P
VGA_BUF# 39

2
PCIE_GTX_C_CRX_P0 AD10 DACB_VSYNC ACIN_BUF_VGA 4 B
GPIO15 I HPD_C

DACB
PCIE_GTX_C_CRX_N0 AD11 PEX_TX0 T5 Y 1
PEX_TX0_N DACB_RED A ACIN_BUF 54

G
PCIE_GTX_C_CRX_P1 AD12 R4
PEX_TX1 DACB_BLUE

2
PCIE_GTX_C_CRX_N1 AC12 T4 @ GPIO16 O MEM_VDD_CTL

3
PCIE_GTX_C_CRX_P2 AB11 PEX_TX1_N DACB_GREEN R428
PCIE_GTX_C_CRX_N2 AB12 PEX_TX2 R6
2 0_0402_5% 2
PCIE_GTX_C_CRX_P3 AD13 PEX_TX2_N DACB_VREF V6
PCIE_GTX_C_CRX_N3 AD14 PEX_TX3 DACB_RSET DIS@ GPIO17 I HPD_D
PEX_TX3_N

1
PCIE_GTX_C_CRX_P4 AD15 2 1
PCIE_GTX_C_CRX_N4 AC15 PEX_TX4 DIS@ D5
PCIE_GTX_C_CRX_P5 AB14 PEX_TX4_N AF3 GPU_JTAG_TCK CH751H-40PT_SOD323-2
GPIO18 I HPD_E
PCIE_GTX_C_CRX_N5 AB15 PEX_TX5 JTAG_TCK AG4 GPU_JTAG_TDI
PCIE_GTX_C_CRX_P6 AC16 PEX_TX5_N JTAG_TDI AE4 GPU_JTAG_TDO GPIO19 I HPD_F
TEST

PCIE_GTX_C_CRX_N6 AD16 PEX_TX6 JTAG_TDO AF4 GPU_JTAG_TMS DIS@


PCIE_GTX_C_CRX_P7 AD17 PEX_TX6_N JTAG_TMS AG3 R922 1 2 10K_0402_5% +3VSG
PCIE_GTX_C_CRX_N7 AD18 PEX_TX7 JTAG_TRST_N DIS@
AC18 PEX_TX7_N AD25 1 2 10K_0402_5%
GPIO20 Reserved
PCIE_GTX_C_CRX_P8 R923 VGA_DDC_CLK R924 1 DIS@ 2 2.2K_0402_5%
PCIE_GTX_C_CRX_N8 AB18 PEX_TX8 TESTMODE VGA_DDC_DATA R925 1 DIS@ 2 2.2K_0402_5%
PCIE_GTX_C_CRX_P9 AB19 PEX_TX8_N
PCIE_GTX_C_CRX_N9 AB20 PEX_TX9 I2CB_SCL R926 1 DIS@ 2 2.2K_0402_5%
GPIO21 Reserved
PCIE_GTX_C_CRX_P10 AD19 PEX_TX9_N R1 VGA_DDC_CLK I2CB_SDA R927 1 DIS@ 2 2.2K_0402_5%
PCIE_GTX_C_CRX_N10 AD20 PEX_TX10 I2CA_SCL T3 VGA_DDC_DATA
PCIE_GTX_C_CRX_P11 AD21 PEX_TX10_N I2CA_SDA VGA_LCD_CLK R928 1 DIS@ 2 2.2K_0402_5%
PCIE_GTX_C_CRX_N11 AC21 PEX_TX11 R2 I2CB_SCL VGA_LCD_DATA R929 1 DIS@ 2 2.2K_0402_5%
PCIE_GTX_C_CRX_P12 AB21 PEX_TX11_N I2CB_SCL R3 I2CB_SDA
PCIE_GTX_C_CRX_N12 AB22 PEX_TX12 I2CB_SDA I2CS_SCL R930 1 DIS@ 2 2.2K_0402_5%
PCIE_GTX_C_CRX_P13 AC22 PEX_TX12_N A2 VGA_LCD_CLK I2CS_SDA R931 1 DIS@ 2 2.2K_0402_5%
I2C

PCIE_GTX_C_CRX_N13 AD22 PEX_TX13 I2CC_SCL B1 VGA_LCD_DATA


PCIE_GTX_C_CRX_P14 AD23 PEX_TX13_N I2CC_SDA
PCIE_GTX_C_CRX_N14 AD24 PEX_TX14 A3
PCIE_GTX_C_CRX_P15 AE25 PEX_TX14_N GPIO20 A4
PCIE_GTX_C_CRX_N15 AE26 PEX_TX15 GPIO21
PEX_TX15_N T1 I2CS_SCL
AB10 I2CS_SCL T2 I2CS_SDA
13 CLK_PCIE_VGA PEX_REFCLK I2CS_SDA +3VSG
AC10
13 CLK_PCIE_VGA# PEX_REFCLK_N
PEX_TSTCLK_OUT+ AF10 DIS@
PEX_TSTCLK_OUT

2
2 1 PEX_TSTCLK_OUT- AE10 D11 XTAL_SSIN R934 1 2 10K_0402_5%
R933 DIS@ 200_0402_1% PEX_TSTCLK_OUT_N XTAL_SSIN DIS@
2 1 PEX_TREMP AG10 E9 XTAL_OUTBUFF R936 1 2 10K_0402_5% I2CS_SCL 1 6
PEX_TERMP XTAL_OUTBUFF PCH_SMLCLK 13,39
R935 DIS@ 2.49K_0402_1% @ @
AD9 E10 XTALOUT R187 C257 DMN66D0LDW-7_SOT363-6
CLK

15 DGPU_RST# PEX_RST_N XTAL_OUT CLK_27M_VGA_XIN 2 1 1 2 Q901A DIS@


3 3
PEG_CLKREQ# AE9 D10 XTALIN 33_0402_5% 22P_0402_50V8J
PEX_CLKREQ_N XTAL_IN +3VSG
+3VSG 1 DIS@ 2 Reserve for EMI.

5
R937 10K_0402_5% N13M-GE1-S-A1_BGA533
@
ER04 I2CS_SDA 4 3
PCH_SMLDATA 13,39
DMN66D0LDW-7_SOT363-6
ER02 Q901B DIS@
+3V_PCH +3VSG DGPU_PWR_EN 15,29,54
XTALIN 2 GCLK@ 1 CLK_27M_VGA_XIN
CLK_27M_VGA_XIN42
R96 0_0402_5%
1
1

@
R938 DIS@ R939
10K_0402_5% R685 10K_0402_5%
10K_0402_5% XTALOUT @ XTALIN
2

R932 1M_0402_5%
2

2 2

Q900
DIS@ SSM3K7002BFU_SC70-3 27MHZ_10PF_7V27000050
G

DIS@ 3 1
PEG_CLKREQ#_R 13 1 3 1 2 PEG_CLKREQ# 3 1
PEG_CLKREQ#_R GND GND
R900 0_0402_5%
D

1 1
1

NONGCLK@ C901 Y3
@ @ 4
NONGCLK@ 2 C900 NONGCLK@
for safe R940 R941 8.2P_0402_50V8D 8.2P_0402_50V8D
2.2K_0402_5% 2.2K_0402_5% 2 2
2

4 4

A
www.vinafix.vn
B C
Security Classification
Issued Date 2011/07/12
Compal Secret Data
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D
2012/12/31

C
Title

Size

Date:
LA-8226P
Compal Electronics, Inc.

Document Number
N13M PEG 1/9

Monday, July 09, 2012


E
Sheet 20 of 58
Rev
1.0
A

VRAM Interface MDA[15..0]

MDA[31..16]
MDA[15..0]

MDA[31..16]
26
25

MDA[47..32]
MDA[47..32] 27
MDA[63..48]
MDA[63..48] 28

U10B 25,26,27,28
CMDA[30..0]
Part 2 of 5
MDA0 D22 G24 CMDA0
MDA1 E24 FBA_D0 FBA_CMD0 F27 CMDA1
MDA2 E22 FBA_D1 FBA_CMD1 F25 CMDA2
MDA3 D24 FBA_D2 FBA_CMD2 F26 CMDA3
MDA4 B27 FBA_D3 FBA_CMD3 G26 CMDA4
MDA5 D27 FBA_D4 FBA_CMD4 G27 CMDA5
MDA6 C27 FBA_D5 FBA_CMD5 G25 CMDA6
MDA7 D26 FBA_D6 FBA_CMD6 J25 CMDA7
MDA8 A21 FBA_D7 FBA_CMD7 J24 CMDA8
MDA9 B21 FBA_D8 FBA_CMD8 H24 CMDA9
MDA10 C21 FBA_D9 FBA_CMD9 H22 CMDA10
MDA11 C19 FBA_D10 FBA_CMD10 J26 CMDA11
MDA12 C18 FBA_D11 FBA_CMD11 G22 CMDA12
MDA13 D18 FBA_D12 FBA_CMD12 G23 CMDA13
MDA14 B18 FBA_D13 FBA_CMD13 J22 CMDA14
MDA15 C16 FBA_D14 FBA_CMD14 J27 CMDA15
FBA_D15 FBA_CMD15

MEMORY INTERFACE
MDA16 E21 M24 CMDA16
MDA17 F20 FBA_D16 FBA_CMD16 L24 CMDA17
MDA18 D20 FBA_D17 FBA_CMD17 J23 CMDA18
MDA19 F21 FBA_D18 FBA_CMD18 K23 CMDA19
MDA20 D17 FBA_D19 FBA_CMD19 K22 CMDA20
MDA21 F18 FBA_D20 FBA_CMD20 M23 CMDA21
MDA22 D16 FBA_D21 FBA_CMD21 K24 CMDA22
MDA23 E16 FBA_D22 FBA_CMD22 M27 CMDA23
MDA24 A22 FBA_D23 FBA_CMD23 N27 CMDA24
MDA25 C24 FBA_D24 FBA_CMD24 M26 CMDA25
MDA26 D21 FBA_D25 FBA_CMD25 K26 CMDA26
MDA27 B22 FBA_D26 FBA_CMD26 K27 CMDA27
MDA28 C22 FBA_D27 FBA_CMD27 K25 CMDA28
MDA29 A25 FBA_D28 FBA_CMD28 M25 CMDA29
MDA30 B25 FBA_D29 FBA_CMD29 L22 CMDA30
MDA31 A26 FBA_D30 FBA_CMD30
FBA_D31 DQMA[3..0] 25,26
MDA32 U24 C26 DQMA0
MDA33 V24 FBA_D32 FBA_DQM0 B19 DQMA1
MDA34 V23 FBA_D33 FBA_DQM1 D19 DQMA2
MDA35 T23 FBA_D34 FBA_DQM2 D23 DQMA3
FBA_D35 FBA_DQM3 DQMA[7..4] 27,28
MDA36 R24 T24 DQMA4
MDA37 P24 FBA_D36 FBA_DQM4 AA23 DQMA5
MDA38 P22 FBA_D37 FBA_DQM5 AB27 DQMA6
1 MDA39 R23 FBA_D38 FBA_DQM6 T26 DQMA7 1

MDA40 AC24 FBA_D39 FBA_DQM7


FBA_D40 DQSA#[3..0] 25,26
MDA41 AB23 D25 DQSA#0
MDA42 AB24 FBA_D41 FBA_DQS_RN0 A18 DQSA#1
MDA43 W 24 FBA_D42 FBA_DQS_RN1 E18 DQSA#2 +1.5VSG
MDA44 AA22 FBA_D43 FBA_DQS_RN2 B24 DQSA#3
FBA_D44 FBA_DQS_RN3 DQSA#[7..4] 27,28
MDA45 W 23 R22 DQSA#4
FBA_D45 FBA_DQS_RN4

1
MDA46 W 22 Y24 DQSA#5
MDA47 V22 FBA_D46 FBA_DQS_RN5 AA27 DQSA#6 R947
MDA48 AA25 FBA_D47 FBA_DQS_RN6 R27 DQSA#7 1.1K_0402_1%
MDA49 W 27 FBA_D48 FBA_DQS_RN7 DIS@
FBA_D49 DQSA[3..0] 25,26
MDA50 W 26 C25 DQSA0

2
MDA51 W 25 FBA_D50 FBA_DQS_W P0 A19 DQSA1
MDA52 AD27 FBA_D51 FBA_DQS_W P1 E19 DQSA2 +FB_VREF
MDA53 AB26 FBA_D52 FBA_DQS_W P2 A24 DQSA3
FBA_D53 FBA_DQS_W P3 DQSA[7..4] 27,28
MDA54 AD26 T22 DQSA4
FBA_D54 FBA_DQS_W P4

1
MDA55 AB25 AA24 DQSA5

0.1U_0402_16V4Z
FBA_D55 FBA_DQS_W P5

DIS@ C902
MDA56 V25 AA26 DQSA6 1 R948
MDA57 R25 FBA_D56 FBA_DQS_W P6 T27 DQSA7 1.1K_0402_1%
MDA58 V26 FBA_D57 FBA_DQS_W P7 DIS@
MDA59 V27 FBA_D58 A16 +FB_VREF

2
MDA60 R26 FBA_D59 FB_VREF 2
MDA61 T25 FBA_D60 F24
FBA_D61 FBA_CLK0 CLKA0 25,26
MDA62 N25 F23 CLKA0# 25,26
MDA63 N26 FBA_D62 FBA_CLK0_N
FBA_D63 N24
FBA_CLK1 CLKA1 27,28
N23 CLKA1# 27,28
FBA_CLK1_N
M22 FBA_DEBUG0 1 2 +1.5VSG
FBA_DEBUG R949 10K_0402_5%
@
N13M-GE1-S-A1_BGA533
@

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Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M VRAM 2/9
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-8226P
Date: Monday, July 09, 2012 Sheet 21 of 58
A
5 4 3 2 1

D D

U10C
Part 3 of 5 MULTI LEVEL STRAPS
AC4 C15
AD4 IFPA_TXC NC D15 R950 10K_0402_5% +3VSG +3VSG
Straps

NC
V5 IFPA_TXC_N NC J5 1 DIS@ 2
V4 IFPA_TXD0 PGOOD
AA5 IFPA_TXD0_N
IFPA_TXD1

2 DIS@ 1

@ 1

@ 1

@ 1

@ 1

@ 1
10K_0402_1%

15K_0402_5%
45.3K_0402_1%

4.99K_0402_1%

34.8K_0402_1%

34.8K_0402_1%

4.99K_0402_1%

4.99K_0402_1%
AA4
IFPA_TXD1_N

@
W4
Y4 IFPA_TXD2 T6 MULTI_STRAP_REF0_GND 1 DIS@ 2
AB4 IFPA_TXD2_N MULTI_STRAP_REF2_GND W6 R954 40.2K_0402_1%
IFPA_TXD3 DBG_DATA1

R340

R341

R342

R343

R344

R345

R346

R347
AB5 Y6

2
DBG
IFPA_TXD3_N DBG_DATA2 AA6
DBG_DATA3 N3 STRAP0 ROM_SI
AB3 DBG_DATA4 STRAP1 STRAP3 ROM_SO
AB2 IFPB_TXC STRAP2 STRAP4 ROM_SCLK
W1 IFPB_TXC_N
V1 IFPB_TXD4 C7 STRAP0
IFPB_TXD4_N STRAP0

@ 1

@ 1

@ 1

@ 1

@ 1

@ 1
10K_0402_1%

10K_0402_1%
4.99K_0402_1%

45.3K_0402_1%

4.99K_0402_1%

4.99K_0402_1%

34.8K_0402_1%

34.8K_0402_1%
W3
STRAP
LVDS / TMDS

IFPB_TXD5

@
W2 B9 STRAP1
AA2 IFPB_TXD5_N STRAP1
AA3 IFPB_TXD6 A9 STRAP2
IFPB_TXD6_N STRAP2

R348

R349

R350

R351

R352

R353

R354

R355
AB1

2
AA1 IFPB_TXD7
IFPB_TXD7_N
100K_0402_5%
G4 N5 R968 1 DIS@ 2
C G5 IFPC_AUX_I2CW_SCL BUFRST_N C
P4 IFPC_AUX_I2CW_SDA_N
N4 IFPC_L0
M5 IFPC_L0_N D8 same QCL-40
GENERAL

M4 IFPC_L1 THERMDN
L4 IFPC_L1_N D9
K4 IFPC_L2 THERMDP
H4 IFPC_L2_N Need check with NVIDIA
J4 IFPC_L3
IFPC_L3_N N2 STRAP4
For N13M-GE1 GB1b-64_256Mx8 strap table
STRAP4
D3 F9 STRAP3 GPU Frenq. Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
D4 IFPD_AUX_I2CX_SCL STRAP3
F5 IFPD_AUX_I2CX_SDA_N 256M* 8* 8 ELPIDA SA000056P00 R R R R R R R R
F4 IFPD_L0 R969 10K_0402_5% Cancel N13M-GE1 800 MHz 2GB EDJ2108BCSE-DJ-F PU 45K PD 45K PU 5K PD 5K PD 10K PD 5K PU 10K PU 5K
E4 IFPD_L0_N B10 ROM_CS# 1 DIS@ 2
IFPD_L1 ROM_CS_N +3VSG
D5 256M* 8* 8 HYNIX SA000056O00 R R R R R R R R
C3 IFPD_L1_N C9 ROM_SCLK X76 L07 N13M-GE1 800 MHz 2GB H5TQ2G83CFR-H9C PU 45K PD 45K PU 5K PD 5K PD 10K PD 10K PU 10K PU 5K
SERIAL

C4 IFPD_L2 ROM_SCLK
B3 IFPD_L2_N A10 ROM_SI
B4 IFPD_L3 ROM_SI
IFPD_L3_N C10 ROM_SO
ROM_SO
F7
G6 IFPE_AUX_I2CY_SCL
D6 IFPE_AUX_I2CY_SDA_N
C6 IFPE_L0 AB6 R970 1 @ 2 1K_0402_1%
A6 IFPE_L0_N IFPAB_RSET
A7 IFPE_L1 R5 R971 1 @ 2 1K_0402_1%
B6 IFPE_L1_N IFPC_RSET
B7 IFPE_L2 M6 R972 1 @ 2 1K_0402_1%
IFPE_L2_N IFPD_RSET SA000056A10 256M*8*8
E6
IFPE_L3 C.S N13M-GE1-S-A1 FCBGA533
B E7
IFPE_L3_N IFPE_RSET
F8 R973 1 @ 2 1K_0402_1%
NVIDIA GB1b-64 GF119-660-A1 ( )
1.SA000056O00 B

VRAM 256*8*8 DDR3 1600 256*8 1.5V FBGA78


N13M-GE1-S-A1_BGA533
@ HYNIX/H5TQ2G83CFR-PBC
2.SA000056P00
DDR3 1600 256*8 1.5V FBGA78
ELPIDA/EDJ2108BDBG-GN-F

A A

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Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M LVDS 3/9
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 22 of 58
5 4 3 2 1
5 4 3 2 1

+VGA_CORE

U10D Under GPU +1.5VSG


D Part 4 of 5 Near GPU D
50A 8A
J9 A13
VDD FBVDDQ

10U_0603_6.3V6M

10U_0603_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1U_0402_6.3V6K
J10 B13

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
4.7U_0603_6.3V6K
VDD FBVDDQ

DIS@ C903

DIS@ C904

DIS@ C905

DIS@ C906

DIS@ C907

DIS@ C908

DIS@ C909

DIS@ C910

DIS@ C911

DIS@ C912
J12 C13 1 1 1 1 1 1 1 1 1 1
J13 VDD FBVDDQ D13
L9 VDD FBVDDQ D14
M9 VDD FBVDDQ E13
M11 VDD FBVDDQ F13 2 2 2 2 2 2 2 2 2 2
M17 VDD FBVDDQ F14
N9 VDD FBVDDQ F15
N11 VDD FBVDDQ F16
N12 VDD FBVDDQ F17
N13 VDD FBVDDQ F19
N14 VDD FBVDDQ F22
N15 VDD FBVDDQ H23
N16 VDD FBVDDQ H26
N17 VDD FBVDDQ J15
N19 VDD FBVDDQ J16
P11 VDD FBVDDQ J18
P12 VDD FBVDDQ J19
P13 VDD FBVDDQ L19
P14 VDD FBVDDQ L23
P15 VDD FBVDDQ L26
P16 VDD FBVDDQ M19
P17 VDD FBVDDQ N22 Under GPU Near GPU +1.05VSG
R9 VDD FBVDDQ U22
R11 VDD FBVDDQ Y22
VDD FBVDDQ

10U_0603_6.3V6M

10U_0603_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1U_0402_6.3V6K

1U_0402_6.3V6K
R12

POWER

4.7U_0603_6.3V6K
VDD

DIS@ C913

DIS@ C914

DIS@ C915

DIS@ C916

DIS@ C917

DIS@ C918

DIS@ C919
R13 AG6 1 1 1 1 1 1 1
R14 VDD PEX_IOVDDQ AF6
R15 VDD PEX_IOVDDQ AE6
R16 VDD PEX_IOVDDQ AD6
C +3VSG Under GPU (one per pin) R17 VDD PEX_IOVDDQ AC13 2 2 2 2 2 2 2 C
T9 VDD PEX_IOVDDQ AC7
1 2
120mA T11 VDD PEX_IOVDDQ AB17
DIS@
VDD PEX_IOVDDQ
1U_0402_6.3V6K

1U_0402_6.3V6K

T17 AB16
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

VDD PEX_IOVDDQ 3.5A +1.05VSG


DIS@ C921

DIS@ C922

DIS@ C923

DIS@ C924

DIS@ C925

DIS@ C926

U9 AB13
0.1U_0402_16V4Z

R974 1 1 1 1 1 1 VDD PEX_IOVDDQ


Under GPU Near GPU
DIS@ C920

0_0603_5% 1 U19 AB9


W9 VDD PEX_IOVDDQ AB8
VDD PEX_IOVDDQ

10U_0603_6.3V6M

10U_0603_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1U_0402_6.3V6K

1U_0402_6.3V6K
W10 AB7

4.7U_0603_6.3V6K
2 2 2 2 2 2 VDD PEX_IOVDDQ

DIS@ C927

DIS@ C928

DIS@ C929

DIS@ C930

DIS@ C931

DIS@C932
C932

DIS@C933
C933
W12 1 1 1 1 1 1 1
2 W13 VDD AG7
VDD PEX_IOVDD

DIS@

DIS@
W18 AF7
W19 VDD PEX_IOVDD AE7 +1.05VSG
VDD PEX_IOVDD AD8 2 2 2 2 2 2 2 Under GPU Near GPU L900 DIS@
+3VSG PEX_IOVDD AD7 +PEX_PLLVDD 2 1
Near GPU
PEX_IOVDD

1U_0402_6.3V6K
A12 AC9

0.1U_0402_16V4Z

4.7U_0603_6.3V6K
210mA BLM18PG121SN1D_0603
VDD33 PEX_IOVDD

DIS@ C934

DIS@ C935

DIS@ C936
B12 150mA 1 1 1
C12 VDD33 AF9
0.1U_0402_16V4Z

+PEX_PLLVDD
4.7U_0603_6.3V6K

Place Near GPU Balls


VDD33 PEX_PLLVDD
DIS@ C937

DIS@ C938

1 1 D12
E12 VDD33 K6 L901 +1.05VSG
F12 VDD33 VID_PLLVDD C939 1 2DIS@ BLM18PG181SN1D_2P 2 2 2
VDD33 L6 0.1U_0402_16V4Z
150mA 1 2
2 2 SP_PLLVDD

22U_0805_6.3V6M
C940 1 2

4.7U_0603_6.3V6K
DIS@ 150mA DIS@

DIS@ C941

DIS@ C942
AG9 K5 0.1U_0402_16V4Z +PLLVDD 1 1
PEX_SVDD_3V3 PLLVDD
R19 +FB_ADD
110mA
V3 FB_PLLAVDD
IFPA_IOVDD AC19 DIS@ 1 2 2 2 Place Near GPU Balls
10K_0402_5% 2 DIS@ 1 R975 +IFPAB_IOVDD V2 FB_PLLAVDD C943 0.1U_0402_16V4Z
IFPB_IOVDD T19 Under GPU +1.05VSG
FB_DLLAVDD 100mA
10K_0402_5% 2 DIS@ 1 R976 +IFPCD_IOVDD J6 L902 DIS@
IFPCD_IOVDD +PLLVDD 1 2

22U_0805_6.3V6M
10K_0402_5% 2 DIS@ 1 R977 H6 AG2 R978 1 DIS@ 2 10K_0402_5%

0.1U_0402_16V4Z
+IFPE_IOVDD BLM18PG300SN1D_2P
IFPE_IOVDD DACA_VDD

DIS@ C944

DIS@ C945
B B
1 1
W5
10K_0402_5% 2 DIS@ 1 R979 +IFPAB_PLLVDD AD5 DACB_VDD +1.5VSG
IFPAB_PLLVDD
10K_0402_5% 2 DIS@ 1 R980 +IFPC_PLLVDD P6 B15 FB_CAL_PD_VDDQ 1 DIS@ 2 2 2
IFPC_PLLVDD FB_CAL_PD_VDDQ 40.2_0402_1% R981
10K_0402_5% 2 DIS@ 1 R982 +IFPD_PLLVDD N6 W15 VCCSENSE_VGA_R 1 DIS@ 2
IFPD_PLLVDD VDD_SENSE R983 0_0402_5% VCCSENSE_VGA 54
10K_0402_5% 2 DIS@ 1 R984 +IFPE_PLLVDD D7 E15
IFPE_PLLVDD VDD_SENSE VCCSENSE_VGA // VSSSENSE_VGA

N13M-GE1-S-A1_BGA533
@
+1.05VSG
L903 DIS@
+FB_ADD 1 2
BLM18PG300SN1D_2P

22U_0805_6.3V6M
1U_0402_6.3V6K
DIS@ C946

DIS@ C947
1 1

2 2

A A

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M POWER & GND 4/9
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 23 of 58
5 4 3 2 1
5 4 3 2 1

U10E
B2 Part 5 of 5 U2
B5 GND GND U5
D B8 GND GND U11 D
B11 GND GND U12
B14 GND GND U13
B17 GND GND U14
B20 GND GND U15
B23 GND GND U16
B26 GND GND U17
E2 GND GND U23
E5 GND GND U26
E8 GND GND V9
E11 GND GND V19
E17 GND GND W11
E20 GND GND W14
E23 GND GND W17
E26 GND GND Y2
H2 GND GND Y5
H5 GND GND Y23

GND
J11 GND GND Y26
J14 GND GND AC2
J17 GND GND AC5
K9 GND GND AC6
K19 GND GND AC8
L2 GND GND AC11
L5 GND GND AC14
L11 GND GND AC17
L12 GND GND AC20
L13 GND GND AC23
L14 GND GND AC26
L15 GND GND AF2
L16 GND GND AF5
L17 GND GND AF8
M12 GND GND AF11
C M13 GND GND AF14 C
M14 GND GND AF17
M15 GND GND AF20
M16 GND GND AF23
P2 GND GND AF26
P5 GND GND T16
P9 GND GND T15
P19 GND GND T14
P23 GND GND F6
P26 GND GND
T12 GND A15 R985 1 2 42.2_0402_1%
T13 GND FB_CAL_PU_GND DIS@
GND B16 R986 1 2 51.1_0402_1%
FB_CAL_TERM_GND DIS@
2 DIS@ 1 VSSSENSE_VGA_R W16 F11 R988 1 2 40.2K_0402_1%
VSSSENSE_VGA 54 GND_SENSE MULTI_STRAP_REF0_GND
0_0402_5% R987 DIS@
E14 F10 R989 1 2 40.2K_0402_1%
GND_SENSE MULTI_STRAP_REF1_GND DIS@
VCCSENSE_VGA // VSSSENSE_VGA
N13M-GE1-S-A1_BGA533
@

B B

A A

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M POWER & GND 5/9
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 24 of 58
5 4 3 2 1
5 4 3 2 1

VRAM DDR3 chips Mode D


Address 0..31 32..63
256Mx8 DDR3 *8==>2GB CMD0 CS0_L#
CMD1

D
CMD2 ODT_L D

CMD3 CKE
CMD4 A14 A14
CMD5 RST RST
CMD6 A9 A9
DQSA[7..0]
21,26,27,28 DQSA[7..0] +1.5VSG +1.5VSG
U12 U13 CMD7 A7 A7
DQSA#[7..0]
21,26,27,28 DQSA#[7..0]
DQSA0 C3 C1 DQSA1 C3 C1 CMD8 A2 A2
DQMA[7..0] DQSA#0 D3 DQS VDDQ E2 DQSA#1 D3 DQS VDDQ E2
DQMA[7..0] 21,26,27,28 DQS# VDDQ DQS# VDDQ
B9 B9 CMD9 A0 A0
MDA[63..0] MDA1 B3 VDDQ E9 +1.5VSG MDA11 B3 VDDQ E9 +1.5VSG
MDA[63..0] 21,26,27,28 DQ0 VDDQ DQ0 VDDQ
MDA6 C7 MDA14 C7 CMD10 A4 A4
CMDA[30..0] MDA3 C2 DQ1 A2 MDA10 C2 DQ1 A2
CMDA[30..0] 21,26,27,28 DQ2 VDD DQ2 VDD
MDA5 C8 A9 MDA13 C8 A9 CMD11 A1 A1
Group0 MDA0 E3 DQ3 VDD D7 Group1 MDA8 E3 DQ3 VDD D7
MDA4 E8 DQ4 VDD G2 MDA12 E8 DQ4 VDD G2
DQ5 VDD DQ5 VDD CMD12 BA0 BA0
MDA2 D2 G8 MDA9 D2 G8
MDA7 E7 DQ6 VDD K1 MDA15 E7 DQ6 VDD K1
+1.5VSG
DQ7 VDD DQ7 VDD CMD13 WE* WE*
K9 K9
A7 VDD M1 A7 VDD M1
NF/TDQS# VDD NF/TDQS# VDD CMD14 A15 A15
DQMA0 B7 M9 DQMA1 B7 M9
ZQ0 H8 DM/TDQS VDD ZQ1 H8 DM/TDQS VDD
DIS@
ZQ ZQ CMD15 CAS* CAS*
R990 G1 CMDA2 G1 CMDA2
ODT ODT
1

1
240_0402_1% +MEM_VREF0 E1 F7 CLKA0 +MEM_VREF1 E1 F7 CLKA0 CMD16 CS0_H#
DIS@ J8 VREFDQ CK G7 CLKA0# DIS@ J8 VREFDQ CK G7 CLKA0#
VREFCA CK# G9 CMDA3 VREFCA CK# G9 CMDA3
R991
CKE
R992
CKE CMD17
+MEM_VREF0 243_0402_1% CMDA26 J3 243_0402_1% CMDA26 J3
CMDA27 K8 BA2 CMDA27 K8 BA2
CMD18 ODT_H
2

2
C BA1 BA1 C
DIS@

J2 H2 J2 H2
0.1U_0402_16V4Z

1 CMDA12 CMDA0 CMDA12 CMDA0


BA0 CS# F3 CMDA30 BA0 CS# F3 CMDA30
DIS@
RAS# RAS# CMD19 CKE_H
R993 G3 CMDA15 G3 CMDA15
CMDA9 K3 CAS# H3 CMDA13 CMDA9 K3 CAS# H3 CMDA13
240_0402_1%
2 A0 WE# A0 WE# CMD20 A13 A13
C948

CMDA11 L7 N2 CMDA5 CMDA11 L7 N2 CMDA5


CMDA8 L3 A1 RESET# CMDA8 L3 A1 RESET#
A2 A2 CMD21 A8 A8
CMDA25 K2 CMDA25 K2
CMDA10 L8 A3 B2 CMDA10 L8 A3 B2
A4 VSSQ A4 VSSQ CMD22 A6 A6
CMDA24 L2 B8 CMDA24 L2 B8
CMDA22 M8 A5 VSSQ C9 CMDA22 M8 A5 VSSQ C9
A6 VSSQ A6 VSSQ CMD23 A11 A11
CMDA7 M2 D1 CMDA7 M2 D1
CMDA21 N8 A7 VSSQ D9 CMDA21 N8 A7 VSSQ D9
+1.5VSG
A8 VSSQ A8 VSSQ CMD24 A5 A5
CMDA6 M3 CMDA6 M3
CMDA29 H7 A9 CMDA29 H7 A9
A10/AP A10/AP CMD25 A3 A3
CMDA23 M7 A1 CMDA23 M7 A1
CMDA28 K7 A11 VSS A8 CMDA28 K7 A11 VSS A8
DIS@
A12/BC# VSS A12/BC# VSS CMD26 BA2 BA2
R994 CMDA20 N3 B1 CMDA20 N3 B1
CMDA4 N7 A13 VSS D8 CMDA4 N7 A13 VSS D8
240_0402_1%
A14 VSS A14 VSS CMD27 BA1 BA1
F2 F2
VSS F8 VSS F8
VSS VSS CMD28 A12 A12
+MEM_VREF1 F1 J1 F1 J1
H1 NC VSS J9 H1 NC VSS J9
NC VSS NC VSS CMD29 A10 A10
DIS@

A3 L1 A3 L1
0.1U_0402_16V4Z

1 NC VSS NC VSS
DIS@ J7 L9 J7 L9 CMD30 RAS* RAS*
R995 F9 NC VSS N1 F9 NC VSS N1
240_0402_1% H9 NC VSS N9 H9 NC VSS N9
2 NC VSS NC VSS Not Available
C949

LOW HIGH
H5TQ2G83CFR-H9C_FBGA78 H5TQ2G83CFR-H9C_FBGA78
@ @

B place on 1st T trunk B

CLKA0
21,26 CLKA0
CMDA2 R996 1 DIS@ 2 10K_0402_5%
Command Bit Default Pull-down
1

CMDA3 R998 1 DIS@ 2 10K_0402_5%


DIS@ ODTx 10k
R997 CMDA5 R999 1 DIS@ 2 10K_0402_5%
160_0402_1% DDR3 CKEx 10k
RST 10k
2

CLKA0#
21,26 CLKA0# CS* No Termination

+1.5VSG
+1.5VSG
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Hynix : SA000054600 (S IC D3 256MX8/1333 H5TQ2G83CFR-H9C FBGA )


DIS@ C952

DIS@ C953

DIS@ C954

DIS@ C955
1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1 1 1 1 1 1
DIS@ C950

DIS@ C951

DIS@ C958

DIS@ C959

DIS@ C960

DIS@ C961
1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 1 1 1
DIS@ C956

DIS@ C957

Elpida : SAxxxxxxxxx (S IC D3 256MX8/1333 xxxxxxxxxxxxxxx )


2 2 2 2 2 2
2 2 2 2 2 2

A A

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M DDR3 6/9
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 25 of 58
5 4 3 2 1
5 4 3 2 1

VRAM DDR3 chips


256Mx8 DDR3 *8==>2GB
D Mode D D

Address 0..31 32..63


CMD0 CS0_L#
DQMA[7..0] CMD1
DQMA[7..0] 21,25,27,28
CMDA[30..0] U14 +1.5VSG U15 +1.5VSG CMD2 ODT_L
CMDA[30..0] 21,25,27,28
DQSA#[7..0] DQSA2 C3 C1 DQSA3 C3 C1 CMD3 CKE
21,25,27,28 DQSA#[7..0] DQS VDDQ DQS VDDQ
DQSA#2 D3 E2 DQSA#3 D3 E2
DQSA[7..0] DQS# VDDQ B9 DQS# VDDQ B9
21,25,27,28 DQSA[7..0] VDDQ +1.5VSG VDDQ +1.5VSG
CMD4 A14 A14
MDA22 B3 E9 MDA29 B3 E9
MDA[63..0] MDA17 C7 DQ0 VDDQ MDA28 C7 DQ0 VDDQ
MDA[63..0] 21,25,27,28 DQ1 DQ1 CMD5 RST RST
MDA23 C2 A2 MDA30 C2 A2
MDA19 C8 DQ2 VDD A9 MDA27 C8 DQ2 VDD A9
DQ3 VDD DQ3 VDD CMD6 A9 A9
Group2 MDA21 E3 D7 Group3 MDA25 E3 D7
MDA16 E8 DQ4 VDD G2 MDA26 E8 DQ4 VDD G2
DQ5 VDD DQ5 VDD CMD7 A7 A7
MDA20 D2 G8 MDA31 D2 G8
MDA18 E7 DQ6 VDD K1 MDA24 E7 DQ6 VDD K1
+1.5VSG
DQ7 VDD DQ7 VDD CMD8 A2 A2
K9 K9
A7 VDD M1 A7 VDD M1
NF/TDQS# VDD NF/TDQS# VDD CMD9 A0 A0
DIS@ DQMA2 B7 M9 DQMA3 B7 M9
ZQ2 H8 DM/TDQS VDD ZQ3 H8 DM/TDQS VDD
R1000
ZQ ZQ CMD10 A4 A4
240_0402_1% G1 CMDA2 G1 CMDA2
ODT ODT

1
+MEM_VREF2 E1 F7 CLKA0 DIS@ +MEM_VREF3 E1 F7 CLKA0 CMD11 A1 A1
DIS@ J8 VREFDQ CK G7 CLKA0# R1002 J8 VREFDQ CK G7 CLKA0#
VREFCA CK# G9 CMDA3 VREFCA CK# G9 CMDA3
R1001
CKE
243_0402_1%
CKE CMD12 BA0 BA0
+MEM_VREF2 243_0402_1% CMDA26 J3 CMDA26 J3
CMDA27 K8 BA2 CMDA27 K8 BA2
CMD13 WE* WE*
2

2
BA1 BA1
DIS@

J2 H2 J2 H2
0.1U_0402_16V4Z

DIS@ 1 CMDA12 CMDA0 CMDA12 CMDA0


BA0 CS# F3 CMDA30 BA0 CS# F3 CMDA30
C
R1003
RAS# RAS# CMD14 A15 A15 C
240_0402_1% G3 CMDA15 G3 CMDA15
CMDA9 K3 CAS# H3 CMDA13 CMDA9 K3 CAS# H3 CMDA13
2 A0 WE# A0 WE# CMD15 CAS* CAS*
C962

CMDA11 L7 N2 CMDA5 CMDA11 L7 N2 CMDA5


CMDA8 L3 A1 RESET# CMDA8 L3 A1 RESET#
A2 A2 CMD16 CS0_H#
CMDA25 K2 CMDA25 K2
CMDA10 L8 A3 B2 CMDA10 L8 A3 B2
A4 VSSQ A4 VSSQ CMD17
CMDA24 L2 B8 CMDA24 L2 B8
CMDA22 M8 A5 VSSQ C9 CMDA22 M8 A5 VSSQ C9
A6 VSSQ A6 VSSQ CMD18 ODT_H
CMDA7 M2 D1 CMDA7 M2 D1
CMDA21 N8 A7 VSSQ D9 CMDA21 N8 A7 VSSQ D9
+1.5VSG
A8 VSSQ A8 VSSQ CMD19 CKE_H
CMDA6 M3 CMDA6 M3
CMDA29 H7 A9 CMDA29 H7 A9
A10/AP A10/AP CMD20 A13 A13
DIS@ CMDA23 M7 A1 CMDA23 M7 A1
CMDA28 K7 A11 VSS A8 CMDA28 K7 A11 VSS A8
R1004
A12/BC# VSS A12/BC# VSS CMD21 A8 A8
240_0402_1% CMDA20 N3 B1 CMDA20 N3 B1
CMDA4 N7 A13 VSS D8 CMDA4 N7 A13 VSS D8
A14 VSS A14 VSS CMD22 A6 A6
F2 F2
VSS F8 VSS F8
VSS VSS CMD23 A11 A11
+MEM_VREF3 F1 J1 F1 J1
H1 NC VSS J9 H1 NC VSS J9
NC VSS NC VSS CMD24 A5 A5
DIS@

A3 L1 A3 L1
0.1U_0402_16V4Z

DIS@ 1
J7 NC VSS L9 J7 NC VSS L9
R1005
NC VSS NC VSS CMD25 A3 A3
240_0402_1% F9 N1 F9 N1
H9 NC VSS N9 H9 NC VSS N9
2 NC VSS NC VSS CMD26 BA2 BA2
C963

CMD27 BA1 BA1


H5TQ2G83CFR-H9C_FBGA78 H5TQ2G83CFR-H9C_FBGA78
@ @ CMD28 A12 A12
CMD29 A10 A10
B
CMD30 RAS* RAS* B
CLKA0 Not Available
21,25 CLKA0
CLKA0# LOW HIGH
21,25 CLKA0#

+1.5VSG +1.5VSG
C966

C967

C968

C969
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
DIS@ C972

DIS@ C973

DIS@ C974

DIS@ C975
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1
DIS@ C964

DIS@ C965

DIS@ C970

DIS@ C971
DIS@

DIS@

DIS@

DIS@

2 2 2 2 2 2 2 2 2 2 2 2

A A

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M DDR3 7/9
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 26 of 58
5 4 3 2 1
5 4 3 2 1

VRAM DDR3 chips


Mode D
256Mx8 DDR3 *8==>2GB Address 0..31 32..63
CMD0 CS0_L#
D
CMD1 D

CMD2 ODT_L
CMD3 CKE
CMD4 A14 A14
CMD5 RST RST
DQSA[7..0]
21,25,26,28 DQSA[7..0] +1.5VSG +1.5VSG
U16 U17 CMD6 A9 A9
DQSA#[7..0]
21,25,26,28 DQSA#[7..0]
DQSA4 C3 C1 DQSA5 C3 C1 CMD7 A7 A7
DQMA[7..0] DQSA#4 D3 DQS VDDQ E2 DQSA#5 D3 DQS VDDQ E2
DQMA[7..0] 21,25,26,28 DQS# VDDQ DQS# VDDQ
B9 B9 CMD8 A2 A2
MDA[63..0] MDA37 B3 VDDQ E9 +1.5VSG MDA45 B3 VDDQ E9 +1.5VSG
MDA[63..0] 21,25,26,28 DQ0 VDDQ DQ0 VDDQ
MDA32 C7 MDA40 C7 CMD9 A0 A0
CMDA[30..0] MDA38 C2 DQ1 A2 MDA46 C2 DQ1 A2
CMDA[30..0] 21,25,26,28 DQ2 VDD DQ2 VDD
MDA33 C8 A9 MDA44 C8 A9 CMD10 A4 A4
Group4 MDA39 E3 DQ3 VDD D7 Group5 MDA47 E3 DQ3 VDD D7
MDA35 E8 DQ4 VDD G2 MDA41 E8 DQ4 VDD G2
DQ5 VDD DQ5 VDD CMD11 A1 A1
MDA36 D2 G8 MDA43 D2 G8
MDA34 E7 DQ6 VDD K1 MDA42 E7 DQ6 VDD K1
+1.5VSG
DQ7 VDD DQ7 VDD CMD12 BA0 BA0
K9 K9
A7 VDD M1 A7 VDD M1
NF/TDQS# VDD NF/TDQS# VDD CMD13 WE* WE*
DQMA4 B7 M9 DQMA5 B7 M9
ZQ4 H8 DM/TDQS VDD ZQ5 H8 DM/TDQS VDD
DIS@
ZQ ZQ CMD14 A15 A15
R1006 G1 CMDA18 G1 CMDA18
ODT ODT
1

1
240_0402_1% +MEM_VREF4 E1 F7 CLKA1 +MEM_VREF5 E1 F7 CLKA1 CMD15 CAS* CAS*
DIS@ J8 VREFDQ CK G7 CLKA1# DIS@ J8 VREFDQ CK G7 CLKA1#
VREFCA CK# G9 CMDA19 VREFCA CK# G9 CMDA19
R1007
CKE
R1008
CKE CMD16 CS0_H#
+MEM_VREF4 243_0402_1% CMDA26 J3 243_0402_1% CMDA26 J3
CMDA27 K8 BA2 CMDA27 K8 BA2
CMD17
2

2
C BA1 BA1 C
DIS@

J2 H2 J2 H2
0.1U_0402_16V4Z

1 CMDA12 CMDA16 CMDA12 CMDA16


BA0 CS# F3 CMDA30 BA0 CS# F3 CMDA30
DIS@
RAS# RAS# CMD18 ODT_H
R1009 G3 CMDA15 G3 CMDA15
CMDA9 K3 CAS# H3 CMDA13 CMDA9 K3 CAS# H3 CMDA13
240_0402_1%
2 A0 WE# A0 WE# CMD19 CKE_H
C976

CMDA11 L7 N2 CMDA5 CMDA11 L7 N2 CMDA5


CMDA8 L3 A1 RESET# CMDA8 L3 A1 RESET#
A2 A2 CMD20 A13 A13
CMDA25 K2 CMDA25 K2
CMDA10 L8 A3 B2 CMDA10 L8 A3 B2
A4 VSSQ A4 VSSQ CMD21 A8 A8
CMDA24 L2 B8 CMDA24 L2 B8
CMDA22 M8 A5 VSSQ C9 CMDA22 M8 A5 VSSQ C9
A6 VSSQ A6 VSSQ CMD22 A6 A6
CMDA7 M2 D1 CMDA7 M2 D1
CMDA21 N8 A7 VSSQ D9 CMDA21 N8 A7 VSSQ D9
+1.5VSG
A8 VSSQ A8 VSSQ CMD23 A11 A11
CMDA6 M3 CMDA6 M3
CMDA29 H7 A9 CMDA29 H7 A9
A10/AP A10/AP CMD24 A5 A5
CMDA23 M7 A1 CMDA23 M7 A1
CMDA28 K7 A11 VSS A8 CMDA28 K7 A11 VSS A8
DIS@
A12/BC# VSS A12/BC# VSS CMD25 A3 A3
R1010 CMDA20 N3 B1 CMDA20 N3 B1
CMDA4 N7 A13 VSS D8 CMDA4 N7 A13 VSS D8
240_0402_1%
A14 VSS A14 VSS CMD26 BA2 BA2
F2 F2
VSS F8 VSS F8
VSS VSS CMD27 BA1 BA1
+MEM_VREF5 F1 J1 F1 J1
H1 NC VSS J9 H1 NC VSS J9
NC VSS NC VSS CMD28 A12 A12
DIS@

A3 L1 A3 L1
0.1U_0402_16V4Z

1 NC VSS NC VSS
DIS@ J7 L9 J7 L9 CMD29 A10 A10
R1011 F9 NC VSS N1 F9 NC VSS N1
H9 NC VSS N9 H9 NC VSS N9
240_0402_1%
2 NC VSS NC VSS CMD30 RAS* RAS*
C977

Not Available
H5TQ2G83CFR-H9C_FBGA78 H5TQ2G83CFR-H9C_FBGA78
@ @ LOW HIGH
B place on 1st T trunk B

CLKA1
21,28 CLKA1
1

DIS@
R1012 DIS@
160_0402_1% CMDA18 R1013 1 2 10K_0402_5%
CMDA19 R1014 1 DIS@ 2 10K_0402_5%
2

CLKA1#
21,28 CLKA1#

+1.5VSG +1.5VSG
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
DIS@ C980

DIS@ C981

DIS@ C982

DIS@ C983

DIS@ C986

DIS@ C987

DIS@ C988

DIS@ C989
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 1 1 1 1 1 1 1 1 1 Hynix : SA000054600 (S IC D3 256MX8/1333 H5TQ2G83CFR-H9C FBGA )


DIS@ C978

DIS@ C979

DIS@ C984

DIS@ C985

2 2 2 2 2 2 2 2 2 2 2 2 Elpida : SAxxxxxxxxx (S IC D3 256MX8/1333 xxxxxxxxxxxxxxx )

A A

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M DDR3 8/9
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 27 of 58
5 4 3 2 1
5 4 3 2 1

VRAM DDR3 chips


256Mx8 DDR3 *8==>2GB
Mode D
D
Address 0..31 32..63 D

CMD0 CS0_L#
CMD1
DQMA[7..0] CMD2 ODT_L
DQMA[7..0] 21,25,26,27
CMDA[30..0] U18 +1.5VSG U19 +1.5VSG CMD3 CKE
CMDA[30..0] 21,25,26,27
DQSA#[7..0] DQSA6 C3 C1 DQSA7 C3 C1 CMD4 A14 A14
21,25,26,27 DQSA#[7..0] DQS VDDQ DQS VDDQ
DQSA#6 D3 E2 DQSA#7 D3 E2
DQSA[7..0] DQS# VDDQ B9 DQS# VDDQ B9
21,25,26,27 DQSA[7..0] VDDQ +1.5VSG VDDQ +1.5VSG
CMD5 RST RST
MDA53 B3 E9 MDA61 B3 E9
MDA[63..0] MDA50 C7 DQ0 VDDQ MDA60 C7 DQ0 VDDQ
MDA[63..0] 21,25,26,27 DQ1 DQ1 CMD6 A9 A9
MDA55 C2 A2 MDA56 C2 A2
MDA51 C8 DQ2 VDD A9 MDA57 C8 DQ2 VDD A9
DQ3 VDD DQ3 VDD CMD7 A7 A7
Group6 MDA54 E3 D7 Group7 MDA58 E3 D7
MDA49 E8 DQ4 VDD G2 MDA63 E8 DQ4 VDD G2
DQ5 VDD DQ5 VDD CMD8 A2 A2
MDA52 D2 G8 MDA59 D2 G8
MDA48 E7 DQ6 VDD K1 MDA62 E7 DQ6 VDD K1
+1.5VSG
DQ7 VDD DQ7 VDD CMD9 A0 A0
K9 K9
A7 VDD M1 A7 VDD M1
NF/TDQS# VDD NF/TDQS# VDD CMD10 A4 A4
DIS@ DQMA6 B7 M9 DQMA7 B7 M9
ZQ6 H8 DM/TDQS VDD ZQ7 H8 DM/TDQS VDD
R1015
ZQ ZQ CMD11 A1 A1
240_0402_1% G1 CMDA18 G1 CMDA18
ODT ODT

1
+MEM_VREF6 E1 F7 CLKA1 DIS@ +MEM_VREF7 E1 F7 CLKA1 CMD12 BA0 BA0
DIS@ J8 VREFDQ CK G7 CLKA1# R1017 J8 VREFDQ CK G7 CLKA1#
VREFCA CK# G9 CMDA19 VREFCA CK# G9 CMDA19
R1016
CKE
243_0402_1%
CKE CMD13 WE* WE*
+MEM_VREF6 243_0402_1% CMDA26 J3 CMDA26 J3
CMDA27 K8 BA2 CMDA27 K8 BA2
CMD14 A15 A15
2

2
BA1 BA1
DIS@

J2 H2 J2 H2
0.1U_0402_16V4Z

DIS@ 1 CMDA12 CMDA16 CMDA12 CMDA16


BA0 CS# F3 CMDA30 BA0 CS# F3 CMDA30
C
R1018
RAS# RAS# CMD15 CAS* CAS* C
240_0402_1% G3 CMDA15 G3 CMDA15
CMDA9 K3 CAS# H3 CMDA13 CMDA9 K3 CAS# H3 CMDA13
2 A0 WE# A0 WE# CMD16 CS0_H#
C990

CMDA11 L7 N2 CMDA5 CMDA11 L7 N2 CMDA5


CMDA8 L3 A1 RESET# CMDA8 L3 A1 RESET#
A2 A2 CMD17
CMDA25 K2 CMDA25 K2
CMDA10 L8 A3 B2 CMDA10 L8 A3 B2
A4 VSSQ A4 VSSQ CMD18 ODT_H
CMDA24 L2 B8 CMDA24 L2 B8
CMDA22 M8 A5 VSSQ C9 CMDA22 M8 A5 VSSQ C9
A6 VSSQ A6 VSSQ CMD19 CKE_H
CMDA7 M2 D1 CMDA7 M2 D1
CMDA21 N8 A7 VSSQ D9 CMDA21 N8 A7 VSSQ D9
+1.5VSG
A8 VSSQ A8 VSSQ CMD20 A13 A13
CMDA6 M3 CMDA6 M3
CMDA29 H7 A9 CMDA29 H7 A9
A10/AP A10/AP CMD21 A8 A8
DIS@ CMDA23 M7 A1 CMDA23 M7 A1
CMDA28 K7 A11 VSS A8 CMDA28 K7 A11 VSS A8
R1019
A12/BC# VSS A12/BC# VSS CMD22 A6 A6
240_0402_1% CMDA20 N3 B1 CMDA20 N3 B1
CMDA4 N7 A13 VSS D8 CMDA4 N7 A13 VSS D8
A14 VSS A14 VSS CMD23 A11 A11
F2 F2
VSS F8 VSS F8
VSS VSS CMD24 A5 A5
+MEM_VREF7 F1 J1 F1 J1
H1 NC VSS J9 H1 NC VSS J9
NC VSS NC VSS CMD25 A3 A3
DIS@

A3 L1 A3 L1
0.1U_0402_16V4Z

DIS@ 1
J7 NC VSS L9 J7 NC VSS L9
R1020
NC VSS NC VSS CMD26 BA2 BA2
240_0402_1% F9 N1 F9 N1
H9 NC VSS N9 H9 NC VSS N9
2 NC VSS NC VSS CMD27 BA1 BA1
C991

CMD28 A12 A12


H5TQ2G83CFR-H9C_FBGA78 H5TQ2G83CFR-H9C_FBGA78
@ @ CMD29 A10 A10
CMD30 RAS* RAS*
B
Not Available B

LOW HIGH

21,27 CLKA1
CLKA1
CLKA1#
21,27 CLKA1# +1.5VSG +1.5VSG
C994

C995

C996

C997
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
DIS@ C1000

DIS@ C1001

DIS@ C1002

DIS@ C1003
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1
DIS@ C992

DIS@ C993

DIS@ C998

DIS@ C999
DIS@

DIS@

DIS@

DIS@

2 2 2 2 2 2 2 2 2 2 2 2

A A

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M DDR3 9/9
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 28 of 58
5 4 3 2 1
5 4 3 2 1

+1.5V to +1.5VSG +VCCP to +1.05VSG


+1.05VS +1.05VSG
+1.5V +1.5VSG U20 DIS@
U21 DIS@ AO4304L_SO8
AO4304L_SO8 8 1
8 1 7 2

2
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C386

1U_0402_6.3V6K
C387 DIS@
7 2 6 3 1 1

2
10U_0603_6.3V6M

C392
10U_0603_6.3V6M

C393

10U_0603_6.3V6M

C388

1U_0402_6.3V6K
C389 DIS@

C390 DIS@

C391
6 3 1 1 +1.5VSG 1 1 5 R429DIS@
D 1 1 5 DIS@ 10_0603_5% D

DIS@
R430

4
2 2

DIS@

DIS@
10_0603_5%

1
2 2 2 2

DIS@

DIS@

1
2 2

3
1 DIS@

3
Q14B
Q15B + C300 100K_0402_5% 2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6 150U_B2_6.3VM_R35M 1 2 1.05VSG_GATE DIS@ 5 VGA_PWROK#
+VSBP
+VSBP 1 2 1.5VSG_GATE DIS@ 5 VGA_PWROK# R431 DIS@
R432 DIS@ 100K_0402_5% 2 DIS@

4
R445
470K_0402_5%
DIS@ 1

1
R443
470K_0402_5%

C394
1

0.1U_0402_25V6
6

1
Q14A

C395

0.1U_0402_25V6
Q15A DIS@
DIS@ VGA_PWROK# 2 DIS@ 1 2 2
VGA_PWROK# 2 DIS@ 1 2 2 R433 0_0402_5%

2
2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6
R434 0_0402_5%

DIS@
1

DIS@
1
C396
C397 0.1U_0402_16V7K
0.1U_0402_16V7K @ @ 2
2

+3VS to +3VSG
+3VS Q3 DIS@ +3VSG +3VALW +3VALW
AO3404AL_SOT23
C C
1 3

1
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C398

C399 DIS@
1 1
C400

C401

1U_0402_6.3V6K
1 1 R435 DIS@
G
2
200_0603_5% R665 DIS@ R667 DIS@

DIS@
100K_0402_5% 100K_0402_5%
2 2
DIS@

2
2 2
DIS@

VGA_PWROK# DGPU_PWR_EN#

3
Q18B Q58A Q58B
100K_0402_5% 2N7002DW-T/R7_SOT363-6 DIS@ 2N7002DW-T/R7_SOT363-6
+VSBP 1 2 3VSG_GATE DIS@ 5 DGPU_PWR_EN# 39,54 VGA_PWROK VGA_PWROK 2 2N7002DW-T/R7_SOT363-6 15,20,54DGPU_PWR_EN DGPU_PWR_EN 5 DIS@
R436 DIS@ DIS@

4
1

1
R444
470K_0402_5%

1
0.01U_0402_25V7K
6

R666 R668
C402

Q18A 10K_0402_5% 10K_0402_5%


DIS@ DIS@ DIS@
DGPU_PWR_EN# 2 DIS@ 1 2 2

2
2N7002DW-T/R7_SOT363-6

R437 0_0402_5%
2
1

DIS@

1
C403
0.1U_0402_16V7K @
2

B B

A A

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (2/8) PCIE, SMBUS, CLK
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 29 of 58
5 4 3 2 1
5 4 3 2 1

D6
BLUE 2
1
GREEN 3

L30ESDL5V0C3-2 C/A SOT-23

CRT RED 2
D7

1 +5VS W=40mils
+CRT_VCC

3 L14 @ W=40mils
+CRT_VCC
2 1+5VS_CRTVCC 1 2

L15 L30ESDL5V0C3-2 C/A SOT-23 D8 SMD1812P075TF .75A 13.2V

0.1U_0402_16V4Z
14 PCH_CRT_RED 1 2 RED RB491D_SOT23-3 1 1
PCH_CRT_RED

0.1U_0402_16V4Z
D D
CHILISIN NBQ160808T-800Y-N 0603 C404 C405
D9
@
L16 HSYNC_L 2 @
PCH_CRT_GRN 1 2 GREEN 1 2 2
PCH_CRT_GRN 14
CHILISIN NBQ160808T-800Y-N 0603 VSYNC_L 3

L17
PCH_CRT_BLU 1 2 BLUE L30ESDL5V0C3-2 C/A SOT-23
PCH_CRT_BLU 14
CHILISIN NBQ160808T-800Y-N 0603
D10

150_0402_1%

150_0402_1%

150_0402_1%

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J
1

1
1 1 1 1 1 1 VGA_DDC_DATA_C 2
R438 R439 R440 C406 C407 C408 C409 C410 C411 1
VGA_DDC_CLK_C 3
2 2 2 2 2 2

2
L30ESDL5V0C3-2 C/A SOT-23
+CRT_VCC

+5VS
ESD T36 CRTTEST
6
11
JCRT1

RED 1
2
7
VGA_DDC_DATA_C 12
R678 +3VS GREEN 2
0_0402_5% 8 G 16
+5VS_CRTVCC +5VS_CRTVCC HSYNC_L 13 17
G
1

1 2 R441 10K_0402_5% BLUE 3


C412 2 1 9

2
0.1U_0402_16V4Z VSYNC_L 14
5
1

2
R679 4
10
OE#
P

4.7K_0402_5%
14 PCH_CRT_HSYNC 2 4 D_CRT_HSYNC 1 2 HSYNC_L R680 VGA_DDC_CLK_C 15
PCH_CRT_HSYNC A Y

4.7K_0402_5%
R442 10_0402_5% 5
CRT_DET# 16

1
G

U23

1
SN74AHCT1G125GW_SOT353-5 SUYIN_070546FR015S251ZR
3

2
CONN@

100P_0402_50V8J
2
G
C R682 1 C

C414
100K_0402_5%
1 2 14 PCH_CRT_DDC_DAT PCH_CRT_DDC_DAT 3 1 VGA_DDC_DATA_C
C413

1
5
1

2
2

G
0.1U_0402_16V4Z BSS138_SOT23
OE#
P

PCH_CRT_VSYNC 2 4 D_CRT_VSYNC 1 2 VSYNC_L PCH_CRT_DDC_CLK 3 1 Q21 VGA_DDC_CLK_C


14 PCH_CRT_VSYNC A Y 14 PCH_CRT_DDC_CLK
R446 10_0402_5%

D
1 1 +5VS
G

U24 1 1 BSS138_SOT23
SN74AHCT1G125GW_SOT353-5 @ C417 @ C418

10P_0402_50V8J

10P_0402_50V8J
3

@ C419 @ C420 Q22 470P_0402_50V8J 470P_0402_50V8J


1 1 2 2
33P_0402_50V8K 33P_0402_50V8K
@ C415 @ C416 2 2

2 2

LCD POWER CIRCUIT +3VS


+LCDVDD +LCDVDD +3VS
+5VALW Q23 Panel PWM Control
PJ2301 1P SOT23-3 For EMI, close to JLVDS1.

1
For EMI, close to JLVDS1. 680P_0402_50V7K @ C523
1

+LCDVDD 1 3 R454 1 2
S
D

R448 1 4.7K_0402_5%
R447 47K_0402_5% C422 W=80mils 4.7U_0603_6.3V6K @ W=60mils JLVDS1
100_0805_5% 1 L36 1 2 B+_L 1
G

B+
2

2
4.7U_0603_6.3V6K C423 FBMA-L11-201209-221LMA30T_0805 2 1
6 2

2 0_0402_5% R457 3 2
1 1 3
C424 C425 1 2 INVTPWM 4
2 EC_INV_PWM 39 @ @ 4
@ 2 2 22P_0402_50V8J14 5
22P_0402_50V8J PCH_TXOUT0- 6 5
0.1U_0402_16V4Z 0.1U_0402_16V4Z R449 14
2 2 C428 C429 PCH_TXOUT0+ 6
2 2 1 0.047U_0402_16V7K PCH_INV_PWM 2 141 7
B
220K_0402_1% 0_0402_5% R458 8 7 B
1 1 14 PCH_TXOUT1- 8
2N7002DW-7-F_SOT363-6 C427 9
14 PCH_TXOUT1+
1

9
3

Q1A 10
11 10
14 PCH_TXOUT2- 11

1
Q1B @ @ 14 12
PCH_TXOUT2+ 12
1 2 5 2N7002DW-7-F_SOT363-6 13
14 PCH_ENVDD
R450 0_0402_5% Panel Backlight Control 33_0402_5%
R452
33_0402_5%
R453 14 PCH_TXCLK-
14 13
14
14 15
PCH_TXCLK+
4

15
1

16

2
R451 17 16
33 DMIC_CLK 17
R455 33_0402_5% 18
33 DMIC_DATA 18
100K_0402_5% BKOFF# 1 2 DISPOFF# Camera 19
39 BKOFF# 19
USB20_N11_C 20
2

20
1

USB20_P11_C 21
R456 +3VS 22 21
10K_0402_5%
W=80mils 23 22
+LCDVDD 23
24
25 24
2

26 25
+3VS 26
INVTPWM 27

0.1U_0402_16V4Z
27

1
@ 1 DISPOFF# 28

2.2K_0402_5%

2.2K_0402_5%
R738 R739 C640 29 28
60mil Q54
@ @ @ 16 CABC_SAVING
CABC_SAVING 30 29
30
31
B+ SI3457BDV-T1-E3_TSOP6~D 60mil 2 32 31

2
+B+_Q R676 1 @ 2 0_0805_5% 33 32
B+_L
D

6 34 33
S

14 PCH_LCD_CLK 34
4 5 14 PCH_LCD_DATA 35
2 36 35 41
36 G1
1000P_0402_50V7K
C613

100K_0402_5%~D
R675

1 +3VS 37 42
37 G2
1

1 1 38 43
2 R820 1 0_0402_5% 39 38 G3 44
3

@ @ C637 @ 40 39 G4 45
0.1U_0603_50V_X7R 40 G5
2 2 L40 @ ACES_50398-04071-001
2

USB20_N11 USB20_N11 4 3 USB20_N11_C CONN@


15 4 3
PWR_SRC_ON
A A
1

USB20_P11 USB20_P11 1 2 USB20_P11_C


15 1 2
R76 @
100K_0402_5% WCM-2012HS-900T

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2 R821 1 0_0402_5% EMI
2

R674
1

0_0402_5% D
2 1 2 Q31 @
+LCDVDD
@ G SSM3K7002BFU_SC70-3
S
Security Classification Compal Secret Data Compal Electronics, Inc.
3

Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS/CRT CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 30 of 58
5 4 3 2 1
A B C D E F G H

SATA HDD Conn.


BELLW_80039-1022
1
SATA_PTX_DRX_P0 C430 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND
12 SATA_PTX_DRX_P0 RX+
12 SATA_PTX_DRX_N0 SATA_PTX_DRX_N0 C431 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3
4 RX-
1 SATA_PRX_DTX_N0 C432 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 GND 1
SATA_PRX_DTX_N0 12 TX-
SATA_PRX_DTX_P0
12 C433 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6
SATA_PRX_DTX_P0 7 TX+
GND

8
+3VS 9 3.3V
1 3.3V
C434 10
11 3.3V
0.1U_0402_16V4Z 12 GND
2 13 GND
14 GND
15 5V
1 2 +5VS_HDD 16 5V
+5VS 17 5V
R459 0_0805_5%
18 GND
10U_0603_6.3V6M 0.1U_0402_16V4Z 19 Rsv
20 GND 24
21 12V GND
1 1 C436 1 1 12V
C435 C437 C438 22 23
12V GND

1U_0402_6.3V6K
2 2 2 2
JHDD1
1000P_0402_50V7K CONN@

2 2

+5VS Q24
SI3456DDV-T1-GE3_TSOP6
R460
D

6
SATA ODD Conn.
S

1 5 4 +5VS_ODD_R 1 2 +5VS_ODD
C439 2
1U_0402_6.3V6K 1 0_1206_5%
G

2
3

+VSBP
JODD1
2

1
C440 1 2 0.01U_0402_16V7K SATA_PTX_DRX_P2_C 2 GND
330K_0402_5% 12
SATA_PTX_DRX_P2 A+
12
SATA_PTX_DRX_N2 C441 1 2 0.01U_0402_16V7K SATA_PTX_DRX_N2_C 3
R461 4 A-
C442 1 2 0.01U_0402_16V7K SATA_PRX_DTX_N2_C 5 GND
12
SATA_PRX_DTX_N2
1

ODD_EN C443 1 2 0.01U_0402_16V7K SATA_PRX_DTX_P2_C 6 B-


12
SATA_PRX_DTX_P2 B+
7
GND
1

D
1.5M_0402_5%

0.1U_0402_25V6

Q25 1
2
ODD_EN# 16
G R462 C444 1 2 ODD_DETECT#_R 8
16 ODD_DETECT# DP
S R463 0_0402_5% 9
3

SSM3K7002BFU_SC70-3 2 +5VS_ODD 10 +5V


80mils
1

1 2 ODD_DA#_R 11 +5V
15 ODD_DA# MD
R464 0_0402_5% 12 15
13 GND GND 14
GND GND
3 3
SANTA_204901-1

Placea caps. near ODD CONN.


+5VS_ODD 0.1U_0402_16V4Z 10U_0805_10V4Z

1 1 1 C447 1
C445 C446 C448
1U_0402_6.3V6K

2 2 2 2

1000P_0402_50V7K

4 4

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Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD & ODD CONN
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 31 of 58
A B C D E F G H
5 4 3 2 1

+LAN_IO +LAN_VDD
W=60mils W=60mils

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
<BOM Structure>

<BOM Structure>

<BOM Structure>

<BOM Structure>

<BOM Structure>

<BOM Structure>

<BOM Structure>
+3VALW
+LAN_IO 1.5A R465 1 1 1 1 1 1 1
Q26 470_0603_5%
3 1

D
W=20mils C449 C450 C451 C452 C453 C454 C455

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
1

1
C456 +LAN_IO_DISC 2 2 2 2 2 2 2
1 1 1 1 1 1
1U_0402_6.3V6K AO3419L 1P SOT23-3

G
2

1
C457 C458 C459 C460 C461 C462 D Q27
+5VALW 2 2 EN_WOL#
D 2 2 2 2 2 2 G D
S These caps close to Pin 3,6,9,13,29,41,45

3
2
SSM3K7002BFU_SC70-3
R466
100K_0402_5%

1 R467 These caps close to Pin 12,27,39,42,47,48


1 2 EN_WOL#
220K_0402_5%~N +LAN_IO W=40mils W=20mils
1

Q28 D R468 +LAN_VDD


1
2 C463 +LAN_IO 1 2 +LAN_VDDREG R469
EN_WOL 39

0.1U_0402_16V7K
1 2 +LAN_EVDD10

4.7U_0603_6.3V6K
G 0.1U_0603_25V7K

0.1U_0402_16V7K

1U_0402_6.3V6K
S 0_0603_5% 1 1
3
2

SSM3K7002BFU_SC70-3 2 0_0603_5%

2
R470 C464 C465 1 1
10K_0402_5% R471
10K_0402_5% 2 2 C466 C467
1

2
2 2

1
1 3 LAN_WAKE#
PCIE_WAKE# 14,40

S
U25
Q29
C468 1 20.1U_0402_16V7K PCIE_PRX_C_GLANTX_P1 22 31 SSM3K7002BFU_SC70-3 R472
13
PCIE_PRX_GLANTX_P1 HSOP LED3/EEDO 37 1 2 2 1 XTLI
C470 1 20.1U_0402_16V7K PCIE_PRX_C_GLANTX_N1 23 LED1/EESK 40 C469
13
PCIE_PRX_GLANTX_N1 HSON LED0 3
0_0402_5%
17 30 R473 1 2 10K_0402_5% 12P_0402_50V8J NONGCLK@
13
PCIE_PTX_GLANRX_P1 HSIP EECS/SCL 3
18 32 R474 1 2 10K_0402_5% +LAN_VDD NONGCLK@
13
PCIE_PTX_GLANRX_N1 HSIN EEDI/SDA L19 4
C +LAN_SROUT1.05 1 2 GND C
W=60mils W=60mils

0.1U_0402_16V7K
16 1 LAN_MDIP0

4.7U_0603_6.3V6K
13 Y4
LANCLK_REQ# CLKREQB MDIP0 2 LAN_MDIN0 2.2UH +-5% NLC252018T-2R2J-N 1 1
25 MDIN0 4 LAN_MDIP1 2
15,39,40,5 PLT_RST# PERSTB MDIP1 GND
5 LAN_MDIN1 C471 C472
19 MDIN1 7 LAN_MDIP2 25MHZ_10PF_7V25000014
13 CLK_PCIE_LAN REFCLK_P NC/MDIP2 2 2 1
20 8 LAN_MDIN2 NONGCLK@
13 CLK_PCIE_LAN# REFCLK_N NC/MDIN2 10 LAN_MDIP3
NC/MDIP3 11 LAN_MDIN3 1
XTLO 43 NC/MDIN3 1 2 XTLO
CKXTAL1 C473
XTLI 44 13 These components close to Pin 36 12P_0402_50V8J
CKXTAL2 DVDD10 +LAN_VDD
29 ( Should be place within 200 mils ) NONGCLK@
DVDD10 41
LAN_WAKE# 28 DVDD10
R475 LANWAKEB
1 2 ISOLATEB 26 27
+3VS ISOLATEB DVDD33 R555
39
1K_0402_5% DVDD33 @ @ XTLI 2 1 CLK_25M_LAN_XIN
14 12 CLK_25M_LAN_XIN42
+LAN_IO C256 R186
NC/SMBCLK AVDD33
2

R476 1 2 10K_0402_5% 15 42 CLK_25M_LAN_XIN 2 1 1 2 0_0402_5%


R477 R478 1 2 1K_0402_5% 38 NC/SMBDATA AVDD33 47 33_0402_5% 22P_0402_50V8J GCLK@
+LAN_IO GPO/SMBALERT AVDD33
15K_0402_5% 48 ER02
AVDD33
Reserve for EMI.
1 2 33
+LAN_IO
1

R479 0_0402_5% ENSWREG 21 +LAN_EVDD10


3.3V : Enable switching regulator 34 EVDD10 ER04 JLAN1
0V : Disable switching regulator +LAN_VDDREG 35 VDDREG 3
VDDREG AVDD10 +LAN_VDD
6 9
AVDD10 9 RJ45_TX3- 8 SHLD1
R480 1 2 2.49K_0402_1% 46 AVDD10 45 PR4-
RSET AVDD10 RJ45_TX3+ 7
B 24 36 +LAN_SROUT1.05 PR4+ B
49 GND REGOUT RJ45_RX1- 6
PGND PR2-
RJ45_TX2- 5
RTL8111F-CGT QFN 48P PR3-
<BOM Structure> RJ45_TX2+ 4
TS1 PR3+
RJ45_RX1+ 3
+V_DAC 1 24 R481 1 2 75_0603_1% PR2+
LAN_MDIP0 2 TCT1 MCT1 23 RJ45_TX0+ R482 1 2 75_0603_1% RJ45_TX0- 2
LAN_MDIN0 3 TD1+ MX1+ 22 RJ45_TX0- R483 1 2 75_0603_1% PR1-
TD1- MX1- R484 1 2 75_0603_1% RJ45_TX0+ 1 10
+V_DAC 4 21 PR1+ SHLD2
LAN_MDIP1 5 TCT2 MCT2 20 RJ45_RX1+
C474 1 2 LAN_MDIN1 6 TD2+ MX2+ 19 RJ45_RX1- C475
TD2- MX2- 2

2
10P_1206_2KV8J SANTA_130452-07
0.01U_0402_16V7K +V_DAC 7 18 CONN@ D15

2
LAN_MDIP2 8 TCT3 MCT3 17 RJ45_TX2+ @
LAN_MDIN2 9 TD3+ MX3+ 16 RJ45_TX2- 1 EMI
TD3- MX3-

1
AZC199-02SPR7G_SOT23-3
+V_DAC 10 15
ESD

1
LAN_MDIP3 11 TCT4 MCT4 14 RJ45_TX3+ D16 D17
LAN_MDIN3 12 TD4+ MX4+ 13 RJ45_TX3- LAN_MDIP1 6 3 LAN_MDIP0 LAN_MDIP3 6 3 LAN_MDIP2
TD4- MX4- I/O4 I/O2 I/O4 I/O2

NS892409 LAN D18 @ LSE-200NX3216TRLF_1206-2 5 2 5 2


+LAN_IO VDD GND +LAN_IO VDD GND
1 2

D19 @ LSE-200NX3216TRLF_1206-2
1 2 LAN_MDIN1 4 1 LAN_MDIN0 LAN_MDIN3 4 1 LAN_MDIN2
R485 I/O3 I/O1 I/O3 I/O1
A 2 1 LANGAN D20 @ LSE-200NX3216TRLF_1206-2 AZC099-04S.R7G_SOT23-6 AZC099-04S.R7G_SOT23-6 A
@ 1 2
0.1U_0603_25V7K D21 @ LSE-200NX3216TRLF_1206-2

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1 2
R486
2 1 LANGAN
@
Security Classification Compal Secret Data Compal Electronics, Inc.
0.1U_0603_25V7K
ESD Issued Date 2011/07/12 Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
2012/12/31 Title
LAN RTL8111F
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 32 of 58
5 4 3 2 1
A B C D E F G H

+5VS_PVDD
EMI close to JSPK1

SPKOUT_L1 R487 1 2 0_0603_5% SPK_L1 1 2


R488 1 C476 0.22U_0603_16V7K
2 1 @
+5VS

10U_0805_10V6K

0.1U_0402_16V7K

0.1U_0402_16V7K
@ C477 1U_0603_10V6K
0_0805_5% 1 1 1
SPKOUT_L2 R489 1 2 0_0603_5% SPK_L2 2 1 2
C479 C480 C481 C478 0.22U_0603_16V7K
@
2 2
<BOM Structure> 2 JSPK1
R491 SPK_R1 1
1 SPKOUT_R1 R490 1 2 0_0603_5% SPK_R1 1 2 SPK_R2 2 1 1
2 1 +3VS_DVDD_R SPK_L1 3 2
+3VS_DVDD 1 C482 0.22U_0603_16V7K
3

10U_0603_6.3V6M
@ SPK_L2 4
<BOM Structure>
<BOM Structure> 4

0.1U_0402_16V7K
0_0603_5% 1 1 @ C483 1U_0603_10V6K
E&T_3801-Q04N-01R
C484 C485 SPKOUT_R2 R492 1 2 0_0603_5% SPK_R2 2 1 2 CONN@
C486 0.22U_0603_16V7K
DMIC_DATA 2 2
@
+5VS_PVDD +VDDA
1 L20
R493 2 1
+5VS

2
+3VS_DVDD

10U_0805_10V6K
0.1U_0402_16V7K

0.1U_0402_16V7K
C487 1 1 1 MBK1608800YZF 0603
22P_0402_50V8J 2 1 D22 D23
2 +3VS

10U_0603_6.3V6M

0.1U_0402_16V7K
@ C488 C489 C490
0_0603_5% 1 1 2 2 2
EMI C491 C492

1
YSDA0502C 3P C/A SOT-23 YSDA0502C 3P C/A SOT-23
2 2

10P_0402_50V8J
DMIC_CLK

39

46

25

38
1

9
U26 HDA_SDOUT_AUDIO HDA_BITCLK_AUDIO
1 2
ESD @ @

DVDD_IO

PVDD1

PVDD2

AVDD1

AVDD2
DVDD

0_0402_5%
C493 C494

1
22P_0402_50V8J
2 @ 1 R494
@
23 40 SPKOUT_L1 @
24 LINE1_L SPK_OUT_L+ 41 SPKOUT_L2
LINE1_R SPK_OUT_L- EMI

22P_0402_50V8J
14 45 SPKOUT_R1
LINE2_L SPK_OUT_R+

10P_0402_50V8J
15 44 SPKOUT_R2 1
LINE2_R SPK_OUT_R- HDA_SYNC_AUDIO
MIC1 1 R495 2 MIC1_R 1 2 C495 4.7U_0603_6.3V6K MIC1_C 21 32 HP_OUTL 2 C496
2 1K_0402_5% MIC2_C 22 MIC1_L HP_OUT_L 33 HP_OUTR USB20_N2_C C664 1 2 0.5P_0402_50V8 2
MIC2 1 R496 2 MIC2_R 1 2 C497 4.7U_0603_6.3V6K MIC1_R HP_OUT_R C498 @ 2
1K_0402_5% 16
17 MIC2_L @ 1 USB20_P2_C C665 1 2 0.5P_0402_50V8
MIC2_R 10 HDA_SYNC_AUDIO
SYNC 12
HDA_SYNC_AUDIO

30 DMIC_DATA R499 1 2 0_0402_5% DMIC_DATA_CODEC 2 6 HDA_BITCLK_AUDIO 12


DMIC_DATA GPIO0/DMIC_DATA BCLK HDA_BITCLK_AUDIO
DMIC_CLK 1 2 DMIC_CLK_CODEC 3
30 DMIC_CLK
L21 FBMA-L10-160808-301LMT_2P GPIO1/DMIC_CLK 5 HDA_SDOUT_AUDIO
EMI
SDATA_OUT 12
HDA_SDOUT_AUDIO

39
EC_MUTE# R500 1 2 0_0402_5% PD# 4 8 HDA_SDIN_AUDIO1 R501 2
HDA_SDIN0 12
EC_MUTE# PD# SDATA_IN 33_0402_5%
R502
HDA_RST_AUDIO# 11 47 1 2
12 HDA_RST_AUDIO# RESET# EAPD EAPD 39
48 0_0402_5%
EMI
12 SPDIFO @
MIC_JD 1 R503 2 PCBEEP 20 2 R552 1 0_0402_5%
20K_0402_1% MONO_OUT
HP_JD 2 R504 1 SENSE_A 13 L18
39.2K_0402_1% SENSE A 29 1 2 USB20_N2_C
18 MIC2_VREFO 1 2
SENSE B 30
MIC1_VREFO_R +MIC1_VREFO_R 15 USB20_N2 CONN@
36 28 4 3 USB20_P2_C
CBP LDO_CAP 15 USB20_P2 4 3 +USB_VCCC ACES_51524-0160N-001

10U_0805_10V6K
1 2 35 27 AC97_VREF WCM-2012HS-670T 18
CBN VREF GND

10U_0805_10V6K

0.1U_0402_16V7K
C499 2.2U_0603_16V6K 1 17
31 19 AC_JDREF 1 R505 2 2 R553 1 0_0402_5% GND
+MIC1_VREFO_L MIC1_VREFO_L JDREF 1 1
20K_0402_1% C500 @ 16
43 34 1 2 C502 C503 15 16
42 PVSS2 CPVEE C501 2 14 15
PVSS1 2 2 14

@
3 49 26 2.2U_0603_16V6K USB20_N2_C 13 3
+3VS 7 DVSS2 AVSS1 37 USB20_P2_C 12 13
DVSS1 AVSS2 11 12
ALC269Q-VB5-GR_QFN48_7X7 10 11
R736 2 1 2.2K_0402_1% 9 10
+MIC1_VREFO_R 9
1

R737 2 1 2.2K_0402_1% 8
+MIC1_VREFO_L 8
7
4.7K_0402_5% L34 MIC_JD 6 7
R506 @ MIC2 1 2 MIC-2 5 6
L35 BLM18PG121SN1D_0603 4 5
2

MIC1 1 2 MIC-1 HP_JD 3 4


HDA_RST_AUDIO# BLM18PG121SN1D_0603 HP_OUTR 2 3
HP_OUTL 1 2
@ 1 1 1
1 0.1U_0402_16V7K
C638 C639 JAU1
C508 220P_0402_50V7K 220P_0402_50V7K
ER03 2 2
2

R507 1 2 0_0402_5%

R508 1 2 0_0402_5%
Close to JAU1
R509 1 2 0_0402_5%

R510 1 2 0_0402_5%
15 USB20_N5 @ T49 PAD

15 USB20_P5 @ T50 PAD

4 4

For EMI (on MIC and Headphone AGND to connected with


DGND)

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Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD CODEC ALC269
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 33 of 58
A B C D E F G H
5 4 3 2 1

+CARDPWR

JCR1

5
SDCMD 3 VDD
SDCLK 6 CMD
4 CLK
7 VSS
D VSS D
SDD0 8
SDD1 9 DAT0
SDD2 1 DAT1
SDD3 2 DAT2
CD/DAT3
+3VS +3VS_CR 12
SDWP# 10 GND SW 13
R633 SDCD 11 WP SW GND SW
2 1
30mil CD SW

0_0603_5% T-SOL_156-2000302604
2 1 @ 10mil CONN@
C615 100P_0402_50V8J U40
R497 1 2 +RREF 1
6.2K_0603_1% REFE 17 1 @ 2 1 2
USB20_N3_C 2 GPIO0 R636 10_0402_5% @ C614 10P_0402_50V8J
USB20_P3_C 3 DM 24 CLK_SD_48M
DP CLK_IN CLK_SD_48M 13
+3VS_CR 4 23 +3VS_CR +3VS_CR
+CARDPWR 5 3V3_IN NC
+VREG
30mil 6 CARD_3V3 22
C619 1 2
C623 V18 SP14 21 SDD2
1 10mil 7 SP13 20 SDD3
4.7U_0603_6.3V6K C616
NC SP12

1
1U_0402_6.3V6K 19 @ @
2 1 SDWP 8 SP11 18 SDCMD
0.1U_0402_16V4Z 2 9 SP1 SP10 16 R774 100K_0402_5%
SP2 SP9

1
SDD1 10 15 1 2 SDCLK 100K_0402_5% R768
SP3 SP8

EPAD
SDD0 11 14 0_0402_5% R634 EMI

2
12 SP4 SP7 13 SDCD# R775 SDWP R773 SDCD#
SP5 SP6 100K_0402_5% 100K_0402_5%

6
RTS5137-GR_QFN24_4X4

25

2
C C

SDWP# 5 SDCD 2

2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6

1
Q20B Q20A

2 R818 1 0_0402_5%

L39 @
USB20_N3 1 2 USB20_N3_C
15 USB20_N3 1 2

USB20_P3 4 3 USB20_P3_C
15 USB20_P3 4 3
WCM-2012HS-900T

2 R819 1 0_0402_5% EMI

SDCLK

C612 R632
+CARDPWR 2 1 1 2 SDCLK
B

30mil
EMI @
22P_0402_50V8J
33_0402_5% @ B

close JCR1

22P_0402_50V8J
1 EMI
2

@ 1 1 1
C621
R635 C617 C618 C622
100K_0402_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z @ 2
2 2 2 close U40
1

Close to connector

A A

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Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RTS5137 Media Card Controller
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 34 of 58
5 4 3 2 1
5 4 3 2 1

+3VS

1
D24 D25 R663
HDMI_R_D1- 1 9 HDMI_R_D1- HDMI_R_D0+ 1 9 HDMI_R_D0+ 1M_0402_5%

2
G
HDMI_R_D1+ 2 8 HDMI_R_D1+ HDMI_R_D0- 2 8 HDMI_R_D0-

2
HDMI_R_D2- 4 7 HDMI_R_D2- HDMI_R_CK+ 4 7 HDMI_R_CK+ TMDS_B_HPD 3 1 HDMI_DETECT
14 TMDS_B_HPD

D
HDMI_R_D2+ 5 6 HDMI_R_D2+ HDMI_R_CK- 5 6 HDMI_R_CK-

1
D Q57 R638
D
SSM3K7002BFU_SC70-3 20K_0402_5%
3 3

2
L05ESDL5V0NA-4 L05ESDL5V0NA-4

For ESD request.

D26
HDMI_DETECT 6 3 HDMI_SDATA
I/O4 I/O2
AP2330W-7_SC59-3 +HDMI_5V_OUT
+5VS W=40mils
+5VS 5 2 3
VDD GND OUT
W=40mils 1
IN
1

0.1U_0402_16V7K
4 1 HDMI_SCLK 1 2 C635
+HDMI_5V_OUT

0.1U_0402_16V7K
I/O3 I/O1 C636 GND
AZC099-04S.R7G_SOT23-6
U41 2
For ESD request. 2

TMDS_B_CLK 2 1 HDMI_CK+ 2.2P_0402_50V8C 2 1 C655 HDMI_SDATA ER03


14 TMDS_B_CLK
14 TMDS_B_CLK# 0.1U_0402_16V7K 2 1 C625 HDMI_CK-
TMDS_B_CLK#
0.1U_0402_16V7K C624 2.2P_0402_50V8C 2 1 C656 HDMI_SCLK
TMDS_B_DATA0 2 1 HDMI_D0+
14 TMDS_B_DATA0
C 14 TMDS_B_DATA0# 0.1U_0402_16V7K 2 1 C630 HDMI_D0- 2.2P_0402_50V8C 2 1 C674 HDMI_DETECT C
TMDS_B_DATA0#
0.1U_0402_16V7K C631
14 TMDS_B_DATA1 2 1 HDMI_D1+
TMDS_B_DATA1
14 TMDS_B_DATA1# 0.1U_0402_16V7K 2 1 C633 HDMI_D1-
TMDS_B_DATA1# PR03
0.1U_0402_16V7K C627
TMDS_B_DATA2 2 1 HDMI_D2+
For EMI request.
14 TMDS_B_DATA2
14 TMDS_B_DATA2# 0.1U_0402_16V7K 2 1 C629 HDMI_D2-
TMDS_B_DATA2#
0.1U_0402_16V7K C632
EMI

TMDS_GND R645 1 2 470_0402_5% HDMI_R_D2-

R649 1 2 470_0402_5% HDMI_R_D2+

R646 1 2 470_0402_5% HDMI_R_D1-

R653 1 2 470_0402_5% HDMI_R_D1+


HDMI 46@
R659 1 2 470_0402_5% HDMI_R_D0-

R647 1 2 470_0402_5% HDMI_R_D0+

R651 1 2 470_0402_5% HDMI_R_CK-


HDMI_CK- 1 2 HDMI_R_CK- HDMI ROYATY
R652 1 2 470_0402_5% HDMI_R_CK+ R644 @ 0_0402_5%
L32 WCM-2012-121T _0805
1 2
1 2 +HDMI_5V_OUT
1

D Q55 R656
2 1 2 +5VS 4 3
G 10K_0402_5% 4 3
S JHDMI1
3

SSM3K7002BFU_SC70-3 HDMI_DETECT 19
HDMI_CK+ 1 2 HDMI_R_CK+ 18 HP_DET
R648 @ 0_0402_5% 17 +5V
HDMI_SDATA 16 DDC/CEC_GND
HDMI_SCLK 15 SDA
B
HDMI_D0+ 1 2 HDMI_R_D0+ 14 SCL B

R658 @ 0_0402_5% 13 Reserved


HDMI_R_CK- 12 CEC 20
L31 WCM-2012-121T _0805 11 CK- GND 21
4 3 HDMI_R_CK+ 10 CK_shield GND 22
4 3 HDMI_R_D0- 9 CK+ GND 23
8 D0- GND
1 2 HDMI_R_D0+ 7 D0_shield
1 2 HDMI_R_D1- 6 D0+
5 D1-
HDMI HDMI_R_D1+ 4 D1_shield
HDMI_D0- 1 2 HDMI_R_D0- HDMI_R_D2- 3 D1+
R657 @ 0_0402_5% 2 D2-
+3VS +3VS +HDMI_5V_OUT HDMI_R_D2+ 1 D2_shield
2.2K_0402_5% D2+
R650
HDMI_D1+ 1 2 HDMI_R_D1+ SUYIN_100042GR019M26DZL
1 2 R660 R641 R639 @ 0_0402_5% CONN@
2
1
2.2K_0402_5%

2.2K_0402_5%

1 2
1 2

EMI
1
2

4 3
4 3
5

Q52B L33 WCM-2012-121T _0805 2.2P_0402_50V8C 2 1 C641 HDMI_R_CK-


HDMICLK_NB 1 2 HDMI_L_SCLK 4 3 HDMI_SCLK RV91, RV92 place near JHDMI connect
14 HDMICLK_NB
R654 0_0402_5% HDMI_D1- 1 2 HDMI_R_D1- 2.2P_0402_50V8C 2 1 C642 HDMI_R_CK+
2N7002DW-T/R7_SOT363-6 R662 @ 0_0402_5%
1 2 2.2P_0402_50V8C 2 1 C643 HDMI_R_D0+

R640 HDMI_D2+ 1 2 HDMI_R_D2+ 2.2P_0402_50V8C 2 1 C644 HDMI_R_D0-


2.2K_0402_5% R661 @ 0_0402_5%
2.2P_0402_50V8C 2 1 C645 HDMI_R_D1+
2

1 2 2.2P_0402_50V8C 2 1 C646 HDMI_R_D1-


Q52A 1 2
HDMIDAT_NB 1 2 HDMI_L_SDATA 1 6 HDMI_SDATA 2.2P_0402_50V8C 2 1 C647 HDMI_R_D2+
14 HDMIDAT_NB
A R642 0_0402_5% 4 3 A
2N7002DW-T/R7_SOT363-6 4 3 2.2P_0402_50V8C 2 1 C648 HDMI_R_D2-
L30 WCM-2012-121T _0805
5V PULL UP IN CONNECTER SIDE
HDMI_D2- 1 2 HDMI_R_D2-

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R655 @ 0_0402_5% close to JHDMI

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 35 of 58
5 4 3 2 1
1 2 3 4 5

+5VALW

U27 +USB_VCCA AI CHARGER +5VALW

C509 @ 1 2 2.2U_0402_6.3V6M

2
1 8 AI@ AI@ U28
2 GND OUT 7 R512 1 2 0_0402_5% 8 1 CEN#
IN OUT USBAI_EN 39 CB CEN @ T44 PAD
C510 2 1 0.22U_0603_16V7K 3 6 R515 7 2 R672 AI@
IN OUT TDM DM

4.7K_0402_5%
4 5 1 2 USB_OC0# 6 3
EN# OC# USB_OC0# 15 TDP DP
USBAI_PEN#_R 5 4 SELCDP
+5VALW

1
0_0402_5% R516 VDD SELCDP 9
2 Thermal Pad
AP2301MPG-13 MSOP 8P ER04 100K_0402_5% SELCDP
1 AI@ C511 SLG55584AVTR_TDFN8_2X2

2
Low Active C512 0.1U_0402_16V7K~N
A 1 A
1 AI@ 2 0_0402_5% @ 1000P_0402_50V7K AI@
39 USBAI_PEN#

2
R809 L22 DLP11TB800UL2L_4P
2 2 1 USB3_RX1_P_R
USB3_RX1_P 15
R673 @

4.7K_0402_5%
USBSW_EN# 1 NAI@ 2 0_0402_5% ER04
39 USBSW_EN#
R810 3 4 USB3_RX1_N_R
15

1
USB3_RX1_N
15 USB20_N0 R745 1 NAI@ 2 0_0402_5% USB20_N0_CON

15 USB20_P0 R746 1 NAI@ 2 0_0402_5% USB20_P0_CON

ER04 U28
L23 DLP11TB800UL2L_4P
2 1 USB3_TX1_P_C 2 1 USB3_TX1_P_R CB SELCDP Function
15 USB3_TX1_P
C524 0.1U_0402_10V7K
0 X DCP autodetect charger mode
2 1 USB3_TX1_N_C 3 4 USB3_TX1_N_R
15 USB3_TX1_N
C525 0.1U_0402_10V7K 1 0 S0 charging with SDP only
1 1 S0 charging with SDP or CDP
+5VALW

U29 +USB_VCCB
C515 @ 1 2 2.2U_0402_6.3V6M ER04
1 8
2 GND OUT 7
C516 2 1 0.22U_0603_16V7K 3 IN OUT 6 R523
USBSW_EN# 4 IN OUT 5 1 2 USB_OC0# L24 DLP11TB800UL2L_4P
EN# OC# 2 1 USB3_RX2_P_R
USB3_RX2_P 15
0_0402_5%
AP2301MPG-13 MSOP 8P
3 4 USB3_RX2_N_R L26
Low Active
1
C517
@ 1000P_0402_50V7K
USB3_RX2_N 15
USB20_N0_CON 1
1 2
2 USB20_N0_C charger port: left side & near user
+USB_VCCA
2 USB20_P0_CON 4 3 USB20_P0_C JUSB1
B
4 3 W=80mils 1
B

ER04 WCM-2012HS-900T USB20_N0_C 2 VBUS


USB20_P0_C 3 D-
1 1 D+
4
L25 DLP11TB800UL2L_4P C513 C514 USB3_RX1_N_R 5 GND
2 1 USB3_TX2_P_C 2 1 USB3_TX2_P_R 470P_0402_50V7K 47U_0805_6.3V USB3_RX1_P_R 6 StdA-SSRX- 10
15 USB3_TX2_P 2 2 StdA-SSRX+ GND
C580 0.1U_0402_10V7K 7 11
USB3_TX1_N_R 8 GND-DRAIN GND 12
2 1 USB3_TX2_N_C 3 4 USB3_TX2_N_R USB3_TX1_P_R 9 StdA-SSTX- GND 13
15 USB3_TX2_N StdA-SSTX+ GND
C581 0.1U_0402_10V7K
SANTA_373280-1
+5VALW CONN@
ER04
L27
U30 +USB_VCCC 1 2 USB20_N1_C
15 USB20_N1 1 2
C518 @ 1 2 2.2U_0402_6.3V6M
1 8
2 GND OUT 7 4 3 USB20_P1_C
IN OUT 15 USB20_P1 4 3
C519 2 1 0.22U_0603_16V7K 3 6 R527
USBSW_EN# 4 IN OUT 5 1 2 D27 WCM-2012HS-900T
EN# OC# USB_OC1# 15
USB3_RX1_P_R 1 9 USB3_RX1_P_R
0_0402_5%
AP2301MPG-13 MSOP 8P USB3_RX1_N_R 2 8 USB3_RX1_N_R
1
Low Active C522 USB3_TX1_P_R 4 7 USB3_TX1_P_R
@ 1000P_0402_50V7K
USB3_TX1_N_R 5 6 USB3_TX1_N_R
2

3
Co-lay USB3.0 ( PCH & ASM1042) +USB_VCCB
L05ESDL5V0NA-4 W=80mils JUSB2
1
USB20_N1_C 2 VBUS
D28 USB20_P1_C 3 D-
C 1 1 D+ C
USB20_N0_C 6 3 USB20_N1_C 4
I/O4 I/O2 C520 C521 USB3_RX2_N_R 5 GND
470P_0402_50V7K 47U_0805_6.3V USB3_RX2_P_R 6 StdA-SSRX- 10
2 2 7 StdA-SSRX+ GND 11
5 2 USB3_TX2_N_R 8 GND-DRAIN GND 12
D29 +5VALW VDD GND StdA-SSTX- GND
USB3_TX2_P_R 9 13
USB3_RX2_P_R 1 9 USB3_RX2_P_R StdA-SSTX+ GND
SANTA_373280-1
USB3_RX2_N_R 2 8 USB3_RX2_N_R USB20_P0_C 4 1 USB20_P1_C CONN@
I/O3 I/O1
USB3_TX2_P_R 4 7 USB3_TX2_P_R AZC099-04S.R7G_SOT23-6

USB3_TX2_N_R 5 6 USB3_TX2_N_R

L05ESDL5V0NA-4

D D

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Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB2.0/USB3.0 CONN
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 36 of 58
1 2 3 4 5
A B C D E

Power Button Screw Hole


H11
2.7 H_2P7
ON/OFF switch

1
@
1
+3VL H3 H5 H6 H7 H12 H9 H20
1

3.0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0

1
2
R531
@ @ @ @ @ @ @
100K_0402_5%

1
SW 5 H17 H18 H10
1 2 ON/OFFBTN# R513 1 2 0_0402_5%

3 4
ON/OFF 39
3.1 H_3P1 H_3P1 H_3P1

1
DTSGZML-63N-Q-T-R_5P
5

PW R_ON_LED1# @ @ @

H16
ER03 ON/OFFBTN#
3.3 H_3P3

1
@

3
PJSOT24CH_SOT23-3
2
Bottom Side D31
H2 2

SW 1
3.8

1
@ SMT1-05-A_4P H_3P8

1
1 3 ON/OFFBTN#
@
2 4 @
6
5

H1 H4

3.8 H_3P8 H_3P8

1
LED6

1 2 2 1 PW R_ON_LED1# @ @
+5VALW PW R_ON_LED1# 39
R669 300_0402_5%

19-213A-T1D-CP2Q2HY-3T_W HITE H13 H14 H15 H19

4.3 H_4P3 H_4P3 H_4P3 H_4P3

1
@ @ @ @

3
Fan Control Circuit 3

FD1 FD2 FD3 FD4

+5VS @ @ @ @

1
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
+3VS
1

1
C526
2

2.2U_0402_6.3V6M C527
2

R533 U32 1000P_0402_50V7K


10K_0402_5% 8 1 2
7 GND EN 2 JFAN1
6 GND VIN 3 +5VS_FAN 1
1

5 GND VOUT 4 FAN_SPEED 2 1 4


GND VSET 1 2 GND
39 FAN_SPEED 3 5
FAN_SPEED 3 GND
APL5607KI-TRG_SO8 C528
1 10U_0603_6.3V6M
C529 2 ACES_88231-03041
1000P_0402_50V7K CONN@
2 39 FAN_SET

place as close as EC

4 4

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWRBTN/ FAN / Screws
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 37 of 58
A B C D E
Touch/B Connector

+3VS
C564
1 2
TP_CLK PCH_SMBDATA
KSO10 @ C553 1
@C553 2 100P_0402_50V8J INT_KBD Conn. 0.1U_0402_16V4Z TP_DATA PCH_SMBCLK
KSO11 C554 1
@C554
@ 2 100P_0402_50V8J
JTP1

2
KSO12 C555 1
@C555
@ 2 100P_0402_50V8J 8
10 8 7 D33 D34
KSO15 C556 1
@C556
@ 2 100P_0402_50V8J 9 G2 7 6
G1 6 TP_CLK 39
KSI[0..7] 5
KSI[0..7] 12,39 5 TP_DATA 39
KSI7 C557 1
@C557
@ 2 10P_0402_25V8J 10P 4 1 1
KSO[0..15] 4 3 PCH_SMBDATA @ @
KSO[0..15] 39

1
3

100P_0402_50V8J
C570

100P_0402_50V8J
C571
KSI2 C558 1
@C558
@ 2 100P_0402_50V8J 2 PCH_SMBCLK
2 1 GP_INT L30ESDL5V0C3-2 C/A SOT-23 L30ESDL5V0C3-2 C/A SOT-23
KSI3 C559 1
@C559
@ 2 100P_0402_50V8J 1 2 2
ACES_51522-00801-001
KSI4 C560 1
@C560
@ 2 10P_0402_25V8J 10P CONN@
CONN@
KSI0 C561 1
@C561
@ 2 100P_0402_50V8J ACES_88514-02401-071 +3VS
26
KSI5 C562 1
@C562
@ 2 10P_0402_25V8J 10P 25 GND2
GND1

2
KSI6 C563 1
@C563
@ 2 10P_0402_25V8J 10P KSO14 24
KSO9 23 24 R808
KSI1 C565 1
@C565
@ 2 100P_0402_50V8J KSO3 22 23 PCH_SMBDATA
22 PCH_SMBDATA 10,11,13,40 2.2K_0402_5%

2
G
KSO1 21 PCH_SMBCLK Q64
21 PCH_SMBCLK 10,11,13,40
KSO2 C566 1
@C566
@ 2 100P_0402_50V8J KSO13 20

1
KSI5 19 20 GP_INT 3 1 SMBALERT#
19 SMBALERT# 13
KSO1 C567 1
@C567
@ 2 100P_0402_50V8J KSI1 18

D
KSI7 17 18
17 1
KSO0 C568 1
@C568
@ 2 100P_0402_50V8J KSI6 16 BSS138_SOT23
KSI4 15 16 ER03 C261
KSO4 C569 1
@C569
@ 2 100P_0402_50V8J KSI2 14 15
14 10P_0402_25V8J
KSI0 13 2
13 @
KSO3 C572 1
@C572
@ 2 100P_0402_50V8J KSI3 12
KSO12 11 12
KSO5 C573 1
@C573
@ 2 100P_0402_50V8J KSO10 10 11 ER07
KSO11 9 10 C659 1 2 0.1U_0402_10V7K Close to R619
9 +5VALW
KSO14 C574 1
@C574
@ 2 100P_0402_50V8J KSO6 8
KSO8 7 8 C660 1 2 0.1U_0402_10V7K Close to R579
7 +3VALW
KSO6 C575 1
@C575
@ 2 100P_0402_50V8J KSO4 6
KSO2 5 6 C661 1 2 0.1U_0402_10V7K Close to R681
5 +5VALW
KSO7 C576 1
@C576
@ 2 100P_0402_50V8J KSO5 4
KSO7 3 4 C662 1 2 0.1U_0402_10V7K Close to LED3
3 +3VALW
KSO13 C577 1
@C577
@ 2 100P_0402_50V8J KSO0 2
KSO15 1 2
KSO8 C578 1
@C578
@ 2 100P_0402_50V8J 1
JKB1 Reserve for ESD
KSO9 C579 1
@C579
@ 2 100P_0402_50V8J

LED D35
@
ER03 PCH_SATALED# 2
1
LED2 Green PWR_ON_LED# 3

1 2 1 2
+3VALW PWR_ON_LED# 39 YSDA0502C 3P C/A SOT-23
R579 200_0402_5%3
G YG
HT-121UYG_YELLOW-GREEN
BATT_CHG_LOW_LED# 2
D36
@ Lid Switch
Green
<BOM Structure>
1
LED1 BATT_CHG_LED# 3 (Hall Effect Switch)
1 2 1 2 +3VALW
+3VS PCH_SATALED# 12 YSDA0502C 3P C/A SOT-23
R577 200_0402_5% 3
G YG D37
@
HT-121UYG_YELLOW-GREEN WL_BT_LED# 2
<BOM Structure> 1
HT-210UD-UYG_AMB-GREEN CAPS_LED# 3

1
2 2 1
Green 2
C582 R578
BATT_CHG_LED#
39
ESD YSDA0502C 3P C/A SOT-23

2
UYG

100_0402_5% R581 0.1U_0402_16V4Z U36 47K_0402_5%


1

VDD
+3VALW 1

2
3 2 1
BATT_CHG_LOW_LED#
39
UD

300_0402_5% R580 3
VOUT LID_SW_IN# 39
LED3
Amber
1

GND
C583
LED5 10P_0402_50V8J
Green

1
1 2 1 2 C671 1 2 0.1U_0402_10V7K APX9131AAI-TRG_SOT23-3 2 @
+3VS WL_BT_LED# 39 +3VS
R582 200_0402_5% 3
G YG C670 1 2 0.1U_0402_10V7K
+3VS
HT-121UYG_YELLOW-GREEN
<BOM Structure>
BT/WLAN LED EMI close to R582
LED8 Green

www.vinafix.vn
1 2 1 2
+3VS CAPS_LED# 39
R671 200_0402_5% 3
G YG Security Classification Compal Secret Data Compal Electronics, Inc.
HT-121UYG_YELLOW-GREEN Issued Date 2011/07/12 2012/12/31 Title
Deciphered Date
<BOM Structure>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/EC ROM/TP/FUN/LED
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 38 of 58
5 4 3 2 1

VAL40/VAL41 x8 14" - N13M-GE1_Gb1B-64


+3VALW L28
FBMA-L11-160808-800LMT_0603 KSI[0..7]
1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z +3VALW_EC 1 2 +EC_VCCA
KSI[0..7] 12,38 ID BRD ID Ra Rb Vab Board ID
R534 KSO[0..15] +3VALW
1 1 1 1 2 2 KSO[0..15] 38
0_0805_5% C530 C531 C532 C533 C534 C535 1 VAL40/41
0.1U_0402_16V4Z 100K 0 0V

2
1000P_0402_50V7K ER03 C536
2 2 2 2 1 1 ECAGND R536
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K +3VLP_EC 2
R537 1 2 100K_0402_1%
+3VL Ra
0_0402_5%

1
D AD_BID0 D

111
125

1
R538

22
33
96

67
U33 1

9
C537
0_0402_5%
Rb

EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC

EC_VDD/VCC

EC_VDD/AVCC
EC_VDD0
2

2
+3VALW 0.1U_0402_16V4Z
GATEA20 1 21 USBSW_EN#
16 GATEA20 GATEA20/GPIO00 GPIO0F USBSW_EN# 36
16 KB_RST# 2 23 VGA_PWROK
KB_RST# KBRST#/GPIO01 BEEP#/GPIO10 VGA_PWROK 29,54
12 SERIRQ 3 26 DGPU_PWROK 16 USBSW_EN# 1 2
SERIRQ SERIRQ GPIO12 DGPU_PWROK
12,40 LPC_FRAME# 4 27 DS_WAKE# 16 10K_0402_5% R744
LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 DS_WAKE#
C539 12,40 LPC_AD3 5 USBAI_PEN# 1 2
LPC_AD3 LPC_AD3
@ 22P_0402_50V8J LPC_AD2 7 PWM Output 10K_0402_5% AI@ R743 Co-lay KB930/KB9012 PECI
12,40 LPC_AD2 LPC_AD2
2 1 R539 2 1 @ 33_0402_5%
12,40 LPC_AD1 8 63 BATT_TEMP 43
LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMPA
12,40 LPC_AD0 10 LPC & MISC 64 Stuff
LPC_AD0 LPC_AD0 GPIO39 65 ADP_I 43,44
ADP_I/GPIO3A ADP_I
15 12 AD Input 66 AD_BID0 2 1 ECAGND KB930 R559
CLK_PCI_LPC CLK_PCI_EC GPIO3B
13 75 C538 100P_0402_50V8J
15,32,40,5 PLT_RST# PCIRST#/GPIO05 GPIO42
+3VALW R540 2 1 47K_0402_5% EC_RST# 37 76 DRAMRST_CNTRL_PCH
13,9 KB9012 R571
EC_SCI# 20 EC_RST# IMON/GPIO43
16 EC_SCI# EC_SCII#/GPIO0E
C540 2 1 0.1U_0402_16V4Z 14 38 +3VS
PM_CLKRUNEC# GPIO1D 68 USBAI_PEN# 36
DAC_BRIG/GPIO3C USBAI_PEN# C541
70 FAN_SET
EN_DFAN1/GPIO3D FAN_SET 37
DA Output 71 PCH_DPWROK 14 TP_CLK 2 1 SA_PGOOD 1 2 0.1U_0402_16V4Z
IREF/GPIO3E PCH_DPWROK
KSI0 55 72 6 4.7K_0402_5% R541
+3VALW KSI0/GPIO30 CHGVADJ/GPIO3F EC_DRAMRST_CNTRL_PCH
KSI1 56 TP_DATA 2 1
KSI2 57 KSI1/GPIO31 4.7K_0402_5% R542
1 2 EC_SMB_CK1_R KSI3 58 KSI2/GPIO32 83 EC_MUTE_R R544 2 1 0_0402_5% EC_MUTE#
KSI3/GPIO33 EC_MUTE#/GPIO4A EC_MUTE# 33
C R543 2.2K_0402_5% KSI4 59 84 USBAI_EN 36 EC_MUTE# 1 2 C
KSI4/GPIO34 USB_EN#/GPIO4B USBAI_EN
1 2 EC_SMB_DA1_R KSI5 60 85 40
KSI5/GPIO35 CAP_INT#/GPIO4C BT_ON
R546 2.2K_0402_5% KSI6 61 PS2 Interface 86 EAPD 33 1 @ 2 +3VL R545 10K_0402_5%
KSI6/GPIO36 EAPD/GPIO4D EAPD
1 2 FLASH_EN KSI7 62 87 TP_CLK 38 R547 100K_0402_5%
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK
R548 @ 10K_0402_5% KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA 38
KSO1 40 ER03 C542 100P_0402_50V8J
KSO2 41 KSO1/GPIO21 ACIN 2 1
KSO3 42 KSO2/GPIO22 97 CPU1.5V_S3_GATE
+3VS KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 CPU1.5V_S3_GATE9
KSO4 43 98 EN_WOL 32 D32 @
KSO4/GPIO24 WOL_EN/GPXIOA01 EN_WOL
KSO5 44 99 HDA_SDO ACIN_D 2 1
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 R550 2 1 0_0402_5%
HDA_SDO 12 ACIN 14,44
KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 NTC_V 43
KSO7 46 SPI Device Interface RB751V-40_SOD323-2
1 2 EC_SCI# KSO8 47 KSO7/GPIO27
R551 10K_0402_5% KSO9 48 KSO8/GPIO28 119 1 2
KSO9/GPIO29 SPIDI/GPIO5B PWR_ON_LED1# 37
KSO10 49 120 R752 0_0402_5%
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126 ER04
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
KSO12 51 128 @ 1 2 EC_SPI_WP
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A C543 100P_0402_50V8J
1 2 VGA_BUF# KSO14 53 KSO13/GPIO2D
R677 10K_0402_5% KSO15 54 KSO14/GPIO2E 73 R558 1 2 0_0402_5% PCH_ENBKL
KSO15/GPIO2F ENBKL/GPIO40 PCH_ENBKL 14
@ 81 74 EC_SPI_WP 12
KSO16/GPIO48 PECI_KB930/GPIO41 EC_SPI_WP
82 89 @ T37 PAD Reserve for EMI please close to U4
KSO17/GPIO49 FSTCHG/GPIO50 90 BATT_CHG_LED# ER03
BATT_CHG_LED#/GPIO52 BATT_CHG_LED# 38
91 CAPS_LED# 38 C544
CAPS_LED#/GPIO53 CAPS_LED#
EC_SMB_CK1 1 R560 2 0_0402_5% EC_SMB_CK1_R 77 GPIO 92 SUSACK# 2 1 SPI_CLK
EC_SMB_CK1 43,44 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 SUSACK# 14
EC_SMB_DA1 143,44
R561 2 0_0402_5% EC_SMB_DA1_R 78 93 BATT_CHG_LOW_LED# 38 @
EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_CHG_LOW_LED#
1 R562 2 0_0402_5%
13,20 EC_SMB_CK2 79 SM Bus 95 SYSON 41,49 22P_0402_50V8J
PCH_SMLCLK EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON
1 R563 2 0_0402_5%
13,20 EC_SMB_DA2 80 121 VR_ON 51
PCH_SMLDATA EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON
127 PM_SLP_S4# 14 EMI
B PM_SLP_S4#/GPIO59 PM_SLP_S4# B

14 1 R564 2 0_0402_5% PM_SLP_S3#_R 6 100 PCH_RSMRST#


PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 PCH_RSMRST# 14 C547
14 1 R565 2 0_0402_5% PM_SLP_S5#_R 14 101 EC_LID_OUT# 16 R567
PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT#
16 EC_SMI# 15 102 R566 2 1 0_0402_5% 43 2 1 1 2SPI_CLK
EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 Turbo_V
PCH_PWR_EN 41 16 103 PROCHOT ER03 @ 33_0402_5% @
PCH_PWR_EN GPIO0A H_PROCHOT#_EC/GPXIOA06
12 FLASH_EN 17 104 R568 2 1 0_0402_5% 45 22P_0402_50V8J
FLASH_EN GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON
14 AC_PRESENT 18 GPO 105 BKOFF# 30 Reserve for EMI please close to U6
AC_PRESENT GPIO0C BKOFF#/GPXIOA08 BKOFF#
20 VGA_BUF# 19 GPIO 106 PBTN_OUT# 14
VGA_BUF# GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT#
30 EC_INV_PWM 25 107 WL_BT_LED# 38
EC_INV_PWM EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 WL_BT_LED#
FAN_SPEED 28 108 SA_PGOOD
37 FAN_SPEED FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 SA_PGOOD 50
14 SUSWARN# 29
SUSWARN# E51TXD_P80DATA 30 EC_PME#/GPIO15 PCH_PWROK 1 2
E51TXD_P80DATA 40 EC_TX/GPIO16
51 VR_HOT# E51RXD_P80CLK40 31 110 ACIN_D R554 @ 10K_0402_5%
VR_HOT# E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01
R570 1 142 0_0402_5% 32 112 EC_ON 45
PCH_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON
PWR_ON_LED# 34 114 ON/OFF
+3VS PWR_ON_LED# 38 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFF 37
0.1U_0402_16V4Z~D

36 GPI 115 LID_SW_IN# 38


NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW_IN#
116 SUSP# 41,46,48,49
ER03
SUSP#/GPXIOD05 SUSP#
R572

1@ 117 40
GPXIOD06 WL_OFF#
C548

118 R571 1 2 H_PECI 5


PECI_KB9012/GPXIOD07 H_PECI
1

AGND/AGND

122 43_0402_1%
XCLKI/GPIO5D
0_0402_5%

123 124 +V18R SUSP# C649 1 2 0.1U_0402_10V7K


GND/GND
GND/GND
GND/GND
GND/GND

2 14 SUSCLK_R XCLKO/GPIO5E V18R


1
@
GND0

2 R573 1 100K_0402_5% C550 PWR_ON_LED# C654 1 2 @ 0.1U_0402_10V7K Close to U33

10P_0402_50V8J
1
5
2

U34 1 2 4.7U_0805_10V4Z C666 WL_BT_LED# C657 1 2 @ 0.1U_0402_10V7K Close to U33


P

H_PROCHOT# 4 2 PROCHOT C551 20P_0402_50V8 KB9012QF-A3_LQFP128_14X14 2


H_PROCHOT# 5
11
24
35
94
113

69

Y A 2 EMI CAPS_LED# C658 1 2 @ 0.1U_0402_10V7K Close to U33


NC

20mil
G

L29
A A
SN74LVC1G06DCKR_SC70-5
1 R575 ECAGND 2 1
1

100K_0402_5% <BOM Structure>


FBMA-L11-160808-800LMT_0603 Reserve for ESD
C552
47P_0402_50V8J
1

Close to IMVP7 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB930/Co-lay 9012
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8226P

www.vinafix.vn
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 39 of 58
5 4 3 2 1
A B C D E

+3VS
+1.5VS
WLAN/BT combo R583 2 1 0_1206_5%

1
R584 +3VALW U37 @ +3VS_WLAN
0_0805_5% SI4178DY-T1-GE3_SO8
+3VS_WLAN +3VS_WLAN
80mil

10U_0603_6.3V6M

22U_0805_6.3V6M
8 1

2
+1.5VS_WLAN 7 2
1 1 1 1 1 1 1 6 3 1

1
C591
C584 C585 C586 C587 C588 C589 C590 5
1 0.1U_0402_16V4Z 1
4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z @ R585 @

4
2 2 2 2 2 2 2 2@ 100_0603_5%

2 3VS_WLAN_CHG
14,32 PCIE_WAKE#
PCIE_WAKE#
@
JMINI1 1 2 3VSWLAN_GATE
+VSBP
R586 1 @ 2 0_0402_5% 1 2 +3VS_WLAN R670 390K_0402_5%
3 1 2 4
PCH_BT_ON R587 1 @ 2 5 3 4 6
5 6 +1.5VS_WLAN

1
0_0402_5% 7 8 LPC_FRAME#_R Q60 D @ D Q32
WLANCLK_REQ# 13 7 8
9 10 LPC_AD3_R 41 SUSP SUSP 2 1 2 SUSP
11 9 10 12 LPC_AD2_R
13 CLK_PCIE_WLAN# G G
13 11 12 14 LPC_AD1_R C592 @
13 CLK_PCIE_WLAN S S

3
15 13 14 16 LPC_AD0_R SSM3K7002BFU_SC70-3 0.01U_0402_25V7K SSM3K7002BFU_SC70-3
PCI_RST#_R 17 15 16 18 0_0402_5% 1 2 R588 2 @
17 18 15
PCH_WAN_RADIO_OFF#
CLK_LPC_DEBUG1_R 19 20 0_0402_5%1 2@ R589 WL_OFF# 39
19 20 WL_OFF#
21 22 PLT_RST# 15,32,39,5
21 22 PLT_RST#
PCIE_PRX_WLANTX_N2 13 23 24 R590 1 2 0_0603_5% +3VS_WLAN
25 23 24 26 R591 1 @ 2 0_0603_5%
PCIE_PRX_WLANTX_P2 13 25 26 +3VALW
27 28 0_0402_5%
29 27 28 30 MINI1_SMBCLK R592 1 @ 2
29 30 PCH_SMBCLK 10,11,13,38
13 31 32 MINI1_SMBDATA 1 @ 2 PCH_SMBDATA 10,11,13,38
PCIE_PTX_WLANRX_N2 31 32
13PCIE_PTX_WLANRX_P2 33 34 R593 0_0402_5%
35 33 34 36
35 36 USB20_N10 15
37 38 15
37 38 USB20_P10
+3VS_WLAN 39 40
2 41 39 40 42 2
43 41 42 44
45 43 44 46
47 45 46 48
E51TXD_P80DATA R594 1 2 0_0402_5% 49 47 48 50
39 E51TXD_P80DATA 49 50
39 E51RXD_P80CLK R595 1 2 0_0402_5% 51 52
E51RXD_P80CLK 51 52
2 R596 1 53 54
GND1 GND2
100K_0402_5% ACES_88913-5204
CONN@
16 PCH_BT_ON R597 1 2 1K_0402_5%
PCH_BT_ON
BT_ON R598 1 2 @ 1K_0402_5%
39 BT_ON 5.2 mm High

Reserve for SW mini-pcie debug card.


Series resistors closed to KBC side.
LPC_FRAME#_R R599 1 2 0_0402_5% LPC_FRAME# 12,39
LPC_FRAME#
LPC_AD3_R R600 1 2 0_0402_5% LPC_AD3 12,39
LPC_AD3
LPC_AD2_R R601 1 2 0_0402_5% LPC_AD2 12,39
3 LPC_AD2 3
LPC_AD1_R R602 1 2 0_0402_5% LPC_AD1 12,39
LPC_AD1
LPC_AD0_R R603 1 2 0_0402_5% LPC_AD0 12,39
LPC_AD0
PCI_RST#_R R604 1 2 0_0402_5% PLT_RST#
CLK_LPC_DEBUG1_R R605 1 2 0_0402_5%
CLK_LPC_DEBUG1 CLK_LPC_DEBUG1
15

C593
R606
2 1 1 2CLK_LPC_DEBUG1_R
@ 33_0402_5% @
22P_0402_50V8J
Reserve for EMI please close to JMINI1

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN/ WWAN/ m-SATA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

www.vinafix.vn
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 40 of 58
A B C D E
A B C D E

+5VALW U38 +5VS


SI4178DY-T1-GE3_SO8 Q33
+1.5V AO3413L_SOT23-3 +1.5VS
8 1
7 2 3 1

D
2
10U_0805_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

1U_0603_10V6K
6 3 1

2
C594

C595

10U_0603_6.3V6M
1 1 5 1

G
C596

C598
2
R607

C597
R608 R609

2
2 10_0603_5% 100K_0402_5% 470_0603_5%

1
2 2 2

1
3
1 Q34B 1

3
2N7002DW-T/R7_SOT363-6 Q35B

6
1 2 5VS_GATE 5 SUSP
+VSBP
R610 390K_0402_5% Q35A 2N7002DW-T/R7_SOT363-6
1 R611 5 SUSP

4
SUSP# 2 1 2
C599 47K_0402_5% 1

4
6
0.01U_0402_25V7K 2N7002DW-T/R7_SOT363-6

1
Q34A 2 C600
0.22U_0603_16V4Z
SUSP 2 2

2N7002DW-T/R7_SOT363-6

1
+3VALW +3V_PCH
R612
2 @ 1
0_0805_5%
+5VALW +5V_PCH Q38
R613 AO3404AL_SOT23
+VSBP C667 1 2 0.1U_0402_25V6 @ 40mil
1 2 1 3

S
+5VALW C668 1 2 0.1U_0402_10V7K 0_0603_5% 1

2
10U_0805_10V4Z
C603

1
1U_0603_10V4Z
C606
C669 1 2 0.1U_0402_10V7K

G
+5VS

2
1
C607 R615
2 470_0603_5%
20mil

2
EMI close to Q34 Q39 10U_0805_10V4Z

1
3 1

0.1U_0402_16V7K~N
C608

20K_0402_5%
R617
1
AO3419L 1P SOT23-3 1

3
20mil 10mil Q41B

G
2
+3VALW U39 +3VS
SI4178DY-T1-GE3_SO8 R618 2 1 200K_0402_5% 3V_GATE 2N7002DW-T/R7_SOT363-6
2 +VSBP
PCH_PWR_EN# 5 PCH_PWR_EN#

R625
1M_0402_5%
8 1 1

1
7 2

C610

0.1U_0402_25V6

4
2

6
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
2
6 3 1 1 C602 2
1 1 5 Q41A
C601 R614 2
C604

C605

1U_0402_6.3V6K
220_0603_5% PCH_PWR_EN# 2
4

2
2 2

1
2 2

1
2N7002DW-T/R7_SOT363-6

3
Q40B
2 1 3VS_GATE
+VSBP
R616 200K_0402_5% 5 SUSP
2N7002DW-T/R7_SOT363-6
1 4
6

Q40A C609
0.01U_0402_25V7K
SUSP 2 2

2N7002DW-T/R7_SOT363-6
1

+1.05VS
+5VALW
+5VALW

1
R627

1
470_0402_5%
R718

2
R620 100K_0402_5%
100K_0402_5%

+V1.05S_D
2

2
SUSP 40 PCH_PWR_EN#
SUSP

1
D Q61 D
SUSP# 2 Q45
39,46,48,49 39 PCH_PWR_EN
2
SUSP#
G SSM3K7002BFU_SC70-3 G

1
SUSP# C650 1 2 0.1U_0402_10V7K close to PR404 Q47 D
S S

3
1

3 SUSP 2 SSM3K7002BFU_SC70-3 3
R622 G R735
SUSP C651 1 2 0.1U_0603_16V7K close to Q47 10K_0402_5% S 100K_0402_5%

3
SSM3K7002BFU_SC70-3

2
2

SUSP C652 1 2 0.1U_0402_10V7K close to Q34

Reserve for ESD


+1.5V_CPU_VDDQ +0.75VS

1
1

+1.5V R624 R623


220_0402_5%~D 22_0603_5%~D
+5VALW

2
1

R628
+1.5V_CPU_VDDQ_CHG

+DDR_CHG
470_0402_5%

1
2

2N7002DW-T/R7_SOT363-6

R619
100K_0402_5%
+1.5V_D

2
SYSON#
Q48B
3

6
Q44B
Q44A
6

2N7002DW-T/R7_SOT363-6
5 9 5 2
RUN_ON_CPU1.5VS3# SYSON 39,49
Q48A
SYSON# 2 2N7002DW-T/R7_SOT363-6
4

1
1
2N7002DW-T/R7_SOT363-6 R621
1

4 10K_0402_5% 4

2
R629 @ 0_0402_5%

www.vinafix.vn
SUSP R630 1 2 0_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC/DC Interface
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8226P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 41 of 58
A B C D E
A B C D E

1 1

U6 GCLKUMA@

+RTCBATT
ER02
GCLK@
R30 1 2 330_0402_5%
+CHGRTC SLG3NB244VTR
C81 1 2 22U_0603_6.3V6M
GCLK@
C84 U6 GCLK@ +3VSG
1 2
ER04 15 10 GCLK@
0.1U_0402_16V7K 2 +V3.3A VBAT 11 C82 1 2 0.1U_0402_16V7K
+3V_PCH VDD VDDIO_27M

+LAN_IO 8 9 GCLKDIS@ 12
VDDIO_25M_A 32K CLK_32K_RTC_XIN
+1.05VS 3 12 R5 1 2 22_0402_5% CLK_27M_VGA_XIN 20
VDDIO_25M_B 27M CLK_27M_VGA_XIN
ER07 25M_GREEN_XIN 1 5 R95 1 GCLK@ 2 0_0402_5% PR03 CLK_25M_PCH_XIN 13
XTAL_IN 25M_B CLK_25M_PCH_XIN
25M_GREEN_XOUT 16 6 1 GCLK@ 2 33_0402_5%

0.1U_0402_16V7K
1 R35 CLK_25M_LAN_XIN 32
XTAL_OUT 25M_A CLK_25M_LAN_XIN
0.1U_0402_16V7K

C79 1 C80 1 0.1U_0402_16V7K C83


4
VSS

GCLK@
7 ER07
2 VSS
GCLK@

GCLK@

13
2 2 17 VSS 14
Thermal Pad VDD_RTC_OUT +RTCVCC
2 2
1
C89
SLG3NB300VTR_TQFN16_2X3 GCLK@
GCLKDIS@ 2.2U_0402_6.3V6M
2

25M_GREEN_XIN
CLK_27M_VGA_XIN @ C258 1 2 10P_0402_25V8J
25M_GREEN_XOUT
ER07 CLK_25M_PCH_XIN @ C259 1 2 10P_0402_25V8J

CLK_25M_LAN_XIN @ C260 1 2 10P_0402_25V8J


Y5 25MHZ_10PF_7V25000014

1 3
1 3
GND GND ER05
2 GCLK@ 2
GCLK@ C87 2 4 C86 Reserve for EMI
3 GCLK@ 12P_0402_50V8J 3
15P_0402_50V8J
PR03 1 1

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/07/12 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Green CLK SLG3NB300VTR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

www.vinafix.vn
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Friday, July 13, 2012 Sheet 42 of 58
A B C D E
A B C D

PL1
DCIN jack P/N:DC301008L00, HCB2012KF-121T50_0805 PH1 under CPU botten side :
need doble confirm P/N with ME 1 2
VIN CPU thermal protection at 93 +-3 degree C
PL2
HCB2012KF-121T50_0805 Recovery at 56 +-3 degree C
ADPIN 1 2
PJPDC1
4
GND_1 1
+3VL

1000P_0402_50V7K

1000P_0402_50V7K
5 V- 49,57

100P_0402_50V8J

100P_0402_50V8J
GND_2

1
2 ADP_I
V+

2
PC1

PC2

PC3

PC5
6

1K_0402_1%

12.1K_0402_1%
GND_3

1
1 1
3

2
V-

PR2
7

PR56
GND_4
@SINGA_SDC2003-004111F

2
NTC_V

1
@ PC11

100K_0402_1%_NCP15WF104F03RC
1

PH1
0.1U_0402_10V7K

20K_0402_1%

2
PR7
49 Turbo_V

NTC_V

2
1
PL3

49
HCB2012KF-121T50_0805
1 2
PJP2
11 VMB
GND 10 PL4
GND 9 HCB2012KF-121T50_0805
9 8 1 2 3 1
8 7 BATT+
B+ +VSBP
7 6

100K_0402_1%
10U_0805_25V6K

0.1U_0603_25V7K
0.22U_0603_25V7K
6

1
5 EC_SMCA
5

1
PC8

PC9
4

PR13
EC_SMDA
4
2

1
3

PC128
2
TS_A PC6 PC7 2

3 2 PR27 1000P_0402_50V7K 0.01U_0402_25V7K

2
2 1 1K_0402_1%
@PJSOT24CW_SOT323-3

2
1
VL PQ3
1

PD1 PR14 TP0610K-T1-E3_SOT23-3


1

@SUYIN_200045GR009MX8SZR 22K_0402_1%
1 2 VSB_N_001
+3VL

1VSB_N_003
PR16
100K_0402_1%
PJ3
2

PR18 2 1

1
2 1
0_0402_5% D
+CHGRTC
1 2VSB_N_002 2 PQ4 JUMP_43X39
58 POK
G SSM3K7002FU_SC70-3
PD2

.1U_0402_16V7K
S
RTC Battery

3
1
2

PC10
1
3 PBJ1

2
PR28
100_0402_1% @PJSOT24CW _SOT323-3
1 2
EC_SMB_CK1 36 - +
1 2 2 1
EC_SMB_DA1 36 - +
PR31
100_0402_1%
PR29 +RTCBATT
1 2
+3VALW
100K_0402_5% @LOTES_AAA-BAT-054-K01
PR30
1 2
3
BATT_TEMPA 36 3

1K_0402_1%

4 4

A
www.vinafix.vn B
Security Classification
Issued Date 2009/01/23
Compal Secret Data
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Size
2010/01/23 Title

Date: Friday, July 13, 2012


Compal Electronics, Inc.
PWR-DCIN / BATT CONN / OTP
Document Number
LA-8226P
D
Sheet 43 of 56
Rev
1.0
A B C D

for reverse input protection

1
PQ106 D
2
G S TR 2N7002KW 1N SOT323-3
S

3
PR103 PR104 PL102
1 2 1 2 1 2

10U_0805_25V6K
1M_0402_5% 3M_0402_5% 1UH_NRS4018T1R0NDGJ_3.2A_30%

1
1 1

10U_0805_25V6K

PC130
PC129
2

2
VIN P1 P2 B+
S TR DMG4406LSS-13 1N SO8 1W 0.01 +-1% 1206 S TR DMG4406LSS-13 1N SO8
PQ102 PR101 PQ103
PQ101 1 1 8 1 4 8 1

0.1U_0402_25V6
10U_0805_25V6K
2 2 7 7 2

10U_0805_25V6K

@0.1U_0402_25V6
10U_0805_25V6K
5 3 @ 3 6 2 3 6 3

0.1U_0402_25V6

1
10U_0805_25V6K
0_0402_5%
5 5 @

0.01U_0402_50V7K
PC111

PC104

PC101
1

1
2200P_0402_50V7K

0_0402_5%
PC105

PC103
PR105

PC102
1

1
VIN

PC110

PR106
4

PC114
2

1
PC112

2
1

TPCA8057-H_PPAK56-8-5 2

2
0.1U_0402_25V6

2
PD101
2

BQ24725_ACDRV_1 BAS40CW_SOT323-3

1
BQ24725_BATDRV 1 2 BQ24725_BATDRV_1

PC115
0.047U_0402_25V7K PR107

4.12K_0603_1%

4.12K_0603_1%

1 1

10_1206_1%
1 2 4.12K_0603_1%
PC116

PR110
1

1
PC113 1 2
PR108

PR109
0.1U_0402_25V6

5
2 2.2_0603_5%
PR111
PQ104

0.1U_0603_25V7K

BQ24725_VCC2

1
S TR AON7408L 1N DFN
2

PD102

1
RB751V-40_SOD323-2

PC117

BQ24725_ACP

BQ24725_BST 2

BQ24725_REGN
1 2DH_CHG1
4
2
PC118 PR125 2

BQ24725_LX
2
1 2 DH_CHG BATT+
0_0402_5%

DH_CHG
PL101
1U_0603_25V6K PC119 4.7UH_ETQP3W4R7WFN_5.5A_20% PR102

3
2
1
1 2 0.02_1206_1%

BQ24725_ACN
BQ24725_LX 1 2 CHG 1 4
1U_0603_25V6K

5
6
7
8

4.7_1206_5%
2 3

20

19

18

17

16

CSOP1
PU101

2200P_0402_50V7K

0.01U_0402_50V7K
CSON1
1
PQ105

VCC

PHASE

HIDRV

BTST

REGN

PR114

@10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
21 AO4468L_SO8

0.1U_0402_25V6

0.1U_0402_25V6
PAD

PC108

PC109
PC120

PC106

PC107
1

1
1 15 DL_CHG 4
ACN LODRV

PC121

PC122
2

2
2 14

680P_0402_50V7K
ACP GND PR115

3
2
1

2
1
BQ24725RGRR_VQFN20_3P5X3P5 10_0603_1%

PC123
BQ24725_CMSRC 3 13 SRP12 CSOP1
CMSRC SRP

1
PR116

2
6.8_0603_5%
BQ24725_ACDRV 4 12 SRN 1 2 CSON1

2
ACDRV SRN

0.1U_0603_16V7K
PR117

PC124
1 2BQ24725_ACOK5 11 BQ24725_BATDRV
For KB930 --> Keep PR117 +3VALW ACOK BATDRV

ACDET
For KB9012 (Red square) --> Remove PR117 PR126 @10K_0402_1% Remember to change PC124 from SE000006S80

IOUT

SDA

SCL

ILIM
1 2
+3VLP to SE025104K80 (2011-02-22)
Keep PR126 10K_0402_1% PR118 Pre_chg +3VALW
6

10
1 2
<31,43> ACIN PR119
1

3 3

10K_0402_1% BQ24725_ILIM 1 2

0.01U_0402_25V7K
PD8

100K_0402_1%
PR120 @RB751V-40_SOD323-2 120K_0402_1%

1
VIN

PC125
PR121

1
BQ24725_ACDET
2

1 2
154K_0402_1%

2
2
255K_0402_1%
1

PR122

Vin Dectector
Min. Typ Max.
2

100_0402_5%

H-->L 17.23V
0.1U_0402_25V6

2
66.5K_0402_1%

L--> H 17.63V EC_SMB_CK1 <43,47>


1

PR124
PC126

PR123

ILIM and external DPM


2

EC_SMB_DA1 <43,47>
3.97A PC127
2

2 1 Please locate the RC


ADP_I <43,47>
Near EC chip
100P_0402_50V8J 2011-02-22

4 4

A
www.vinafix.vn B
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
2009/01/23
Compal Secret Data
Deciphered Date

C
2010/01/23 Title

Date:
Document Number
Compal Electronics, Inc.

Friday, July 13, 2012


PWR-CHARGER
LA-8226P
D
Sheet 44 of 56
Rev
1.0
A B C D E

1 1

PC345
100P_0402_50V8J PR350
1 2 30.9K_0402_1%
1 2
B+ PR330
3/5V_B+ 3/5V_B+
PL331 13.7K_0402_1%
HCB2012KF-121T50_0805 1 2

150K_0402_1%

115K_0402_1%
73.2K_0402_1%
2

2
1 2 PR331

PR337

PR342

PR357
20K_0402_1%

2200P_0402_50V7K

10U_0805_25V6K
0.1U_0402_25V6
1 2 FB_3V PR351
2200P_0402_50V7K
0.1U_0402_25V6

4.7U_0805_25V6-K
20K_0402_1%

1
680P_0603_50V7K

PC353

PC354

PC358
FB_5V 1 2

1
1

5
PC338

PC339

PC340
1
PC334

2
1U_0603_10V6K
2

AON7408L
2

5
PQ331

PC344
@
4

FB2

ENTRIP2

ENTRIP1

FB1
TON
<26,43> POK 21 PQ332

2
6 PAD
PC335 PR333 PGOOD 20 AON7408L
0.1U_0402_10V7K 0_0402_5% BYP1 PR355 PC355 4

1
2
3
1 2 BST1_3V 1 2 BST_3V 7 0_0402_5% 0.1U_0402_10V7K
BOOT2 19 BST_5V 1 2 BST1_5V 1 2
BOOT1
2 UG_3V 8 2

3
2
1
PL332 UGATE2 18 UG_5V
4.7UH_ETQP3W4R7WFN_5.5A_20% UGATE1 PL305
2 1 LX_3V 9 2.2UH_ETQP3W2R2WFN_8.5A_20%
+3VALWP PHASE2 17 LX_5V 1 2
PHASE1 +5VALWP

8
7
6
5
LG_3V 10
LGATE2
1
4.7_1206_5%

PQ304 16 LG_5V

ENLDO

SECFB
LGATE1

4.7_1206_5%
PR336

LDO5

LDO3
150U_D2_6.3VY_R18M

VIN

PR356

150U_D2_6.3VY_R18M
1
1
PC303

+ @ 4 PU330
1 SNUB_3V 2

11

12

13

14

15

PC305
S IC RT8243AZQW WQFN 20P PWM @ +

SNUB_5V 2
4
2
AO4468L_SO8 PR334 +3VLP 2
1
2
3
680P_0603_50V8J

680P_0603_50V8J
499K_0402_1%

1
1 2 PC341 PQ306
3/5V_B+ VL

3
2
1
@ PC336

4.7U_0805_10V6K

1
100K_0402_1%

1U_0603_10V6K

PC356
0.1U_0603_25V7K
S TR AON7702A 1N DFN

2
1
PC359
2

1
PC360

PR338

PC342
4.7U_0805_10V6K

2
@
3.3V

2
2
Peak Current 18A
OCP current ??A
PR340 5V
FSW=300kHz 2.2K_0402_1%
DCR 38mohm +/-5% 1 2 Peak Current 18A
3
<40> EC_ON OCP current ??A 3
TYP MAX PR341
0_0402_5%
H/S Rds(on) :11.2mohm , 14mohm 1 2 FSW=300kHz
<40> MAINPWON

4.7U_0805_25V6-K
L/S Rds(on) :6.2mohm , 7.8mohm DCR 13.2mohm +/-5%

@100K_0402_5%
1

PC343

PR332
TYP MAX
H/S Rds(on) :11.2mohm , 14mohm

2
L/S Rds(on) :6.2mohm , 7.8mohm

1
+3VLP +3VL
PJP307
2 1

PAD-OPEN 2x2m

VL
PJP308 PJP306
1 2 (5A,200mils ,Via NO.= 10) 2 1
+5VALWP +5VALW
PAD-OPEN 2x2m
PAD-OPEN 4x4m
PJP304
1 2 +3VALW (4A,120mils ,Via NO.= 8)
+3VALWP

PAD-OPEN 4x4m
4 4

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/03/13 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-3.3VALWP/5VALWP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 45 of 53
A B C D E
A B C D

1 1

PU401
PL401 SY8032ABC_SOT23-6 PL402
HCB1608KF-121T30_0603 1UH_NRS4018T1R0NDGJ_3.2A_30%
+5VALW 1 2 4 3 LX_1.8V 1 2
+1.8VSP
IN LX
5 2

68P_0402_50V8J
PG GND

1
4.7_0402_1%
1

1
6 1

PC402
PC401 FB EN

PR402
22U_0805_6.3VAM PR403
20K_0402_1%

22U_0805_6.3VAM

22U_0805_6.3VAM
2

2
2

PC404
PC403
1
2
FB_1.8V 2

2
1 PR401

680P_0603_50V7K
2 EN_1.8V
<40,42,47> SUSP#

1
PC405
0_0402_1%
PR404

2
10K_0402_1%

1
@ PR405 PC406

2
499K_0402_1% @ 0.1U_0402_10V7K

2
2

PJP401
1 2 (3A,120mils ,Via NO.= 6)
+1.8VSP +1.8VS
PAD-OPEN 4x4m

3 3

4 4

A
www.vinafix.vn B
Security Classification
Issued Date 2009/01/23
Compal Secret Data
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2012/12/31

Size
Title

Date:
Compal Electronics, Inc.
Document Number
PWR-1.8VSP
LA-8226P
Friday, July 13, 2012
D
Sheet 46 of 56
Rev
1.0
5 4 3 2 1

D D

C C

(8.5A,360mils ,Via NO.= 17)

PJP606,PJP607 , PU605

B B

A A

www.vinafix.vn
Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
Issued Date 2010/07/20 Deciphered Date 2012/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-V1.05S_VCCP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, July 13, 2012 Sheet 47 of 56
5 4 3 2 1
5 4 3 2 1

PL702
HCB1608KF-121T30_0603
+1.05VSP_B+ 2 1
B+
+3VS

@680P_0603_50V7K
2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K

1
PC711
0.1U_0402_25V6
D D

1
PC705
PC704

PC702

PC703

2
2

2
5
PR712
100K_0402_1% PQ701

1
PC706
0.22U_0402_10V6K 4
PR703
1 2 BST1_+1.05VSP 1 2
4.7_0402_5%
PU701
+V1.05S_VCCP_PWRGOOD 1 10 BST_+1.05VSP S TR AON7518 1N DFN

3
2
1
<IREF> PGOOD VBST
PR704 PR711
1 2 TRIP_+1.05VSP 2 9 UG_+1.05VSP 1 2 UG_+1.05VSP1 PL701
TRIP DRVH S COIL .47U 20% FDVE0630-H-R47M=P3 17.7A
80.6K_0402_1% 0_0402_5%
EN_+1.05VSP 3
EN SW
8 SW _+1.05VSP 1 2 +1.05VS

5
PR705 FB_+1.05VSP 4 7
0_0402_5% VFB V5IN
+5VALW PQ702

330U_2.5V_M
1
1 2 RF_+1.05VSP 5 6 LG_+1.05VSP 1
<9,32,38,44,48,49,51,56> SUSP# TST DRVL

1
11 PR706 +

PC701
TP
1

PC707 4 4.7_1206_5%
1

TPS51212DSCR_SON10_3X3 1U_0603_10V6K

SNUB_+1.05VSP2
PC708 PR707 2
@0.1U_0402_16V7K 470K_0402_1%
2

3
2
1
C MDU1512 C

1
PR710

1
PC710 PC709 0.1U 25V 0402
@1000P_0402_50V7K
PR709

2
1 2 +1.05VSP1 1 2 +1.05VS 680P_0402_50V7K

2
@1.2K_0402_1%
PR708
PR701 4.99K_0402_1% 100_0402_5%
2 1 VCCIO_SENSE1 2 1
VCCIO_SENSE <8,49>

PU601 ,PR708
2

PR702
10K_0402_1%
1

B
(12A,480mils ,Via NO.= 24) B

A A

www.vinafix.vn
Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
Issued Date 2010/07/20 Deciphered Date 2012/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-V1.05SP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, July 13, 2012 Sheet 48 of 56
5 4 3 2 1
5 4 3 2 1

0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
PL502
HCB1608KF-121T30_0603 OCP Current 0.9A
D B+ 1 2 1.5V_B+ D
PR504
BST_1.5V 1 2 BOOT_1.5V +1.5V
2.2_0402_5%
@680P_0603_50V7K

2200P_0402_50V7K

10U_0805_25V6K

@4.7U_0805_25V6-K
PR511
DH_1.5V_1 1 2 DH_1.5V +0.75VSP

0.1U_0402_25V6

0.22U_0402_10V6K
1

1
PC516

PC505
0_0402_5%

2
PC504

PC502

PC503

10U_0805_6.3V6K

10U_0805_6.3V6K

@10U_0805_6.3V6K
SW _1.5V

PC506
2

1
5

1
DL_1.5V

PC507

PC508

PC517
16

17

18

19

20
PQ501 PU501

VLDOIN
PHASE

UGATE

BOOT

VTT

2
21
PAD
4 15 1
LGATE VTTGND

PL501 PR505 14 2
1UH_VMPI0703AR-1R0M-Z01_11A_20% S TR AON7408L 1N DFN 20K_0402_1% PGND VTTSNS

1
2
3
1 2 CS_1.5V
2 1 13 3
+1.5VP PC509 CS RT8207MZQW _W QFN20_3X3 GND

5
1U_0603_10V6K
PQ502 PR507 1 2 12 4 VTTREF_1.5V
330U_D2_2.5VY_R15M

VDDP VTTREF
1
1 5.1_0603_5%

+ PR506 1 2 VDD_1.5V 11 5 +1.5VP


PC501

C C
VDD VDDQ

PGOOD
@4.7_1206_5% 4
+5VALW

1
TON
2

2 PC510 PC511

FB
S5

S3
1U_0603_10V6K 0.033U_0402_16V7K
SNUB_+1.5VP

2
1
2
3

10

6
S TR AON7702A 1N DFN +5VALW
PR501
10.2K_0402_1%
+1.5VP
1

PC512 FB_1.5V 2 1

TON_1.5V
@680P_0402_50V7K
2

1
Mode Level +0.75VSP VTTREF_1.5V PR502
PR503 10K_0402_1% PC513
S5 L off off 887K_0402_1% .1U_0402_16V7K

2
S3 L off on PR508 1.5V_B+ 1 2

1
0_0402_5%
S0 H on on 1 2 EN_1.5V
<32,38,39,44> SYSON

EN_0.75VSP
Note: S3 - sleep ; S5 - power off

1
PC514
B 2 @0.1U_0402_10V7K B

PR510
2 1
<9,32,38,44,48,49,50,56> SUSP#
PJP501
1 2 0_0402_5%

1
PAD-OPEN 4x4m
PC515

2
PJP502 @0.1U_0402_10V7K
1 2 +1.5V (9A,360mils ,Via NO.= 18)
+1.5VP
PAD-OPEN 4x4m

PJP503
1 2 +0.75VS (2A,80mils ,Via NO.= 4)
+0.75VSP

PAD-OPEN 3x3m

A A

www.vinafix.vn
Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
Issued Date 2010/07/20 Deciphered Date 2012/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-1.5VP / +0.75VSP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, July 13, 2012 Sheet 49 of 56
5 4 3 2 1
5 4 3 2 1

The 1k PD on the VCCSA VIDs are empty.


These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability. VID [0] VID[1] VCCSA Vout
0 0 0.9V
D D
0 1 0.8V
1 0 0.725V
1 1 0.675V
output voltage adjustable network

2
PC805
@680P_0402_50V7K

1
+VCC_SAP
TDC 4.2A
Peak Current 6A
OCP current 7.2A

2
PR801
@4.7_1206_5%
PL803
PU801 PL801

1
HCB1608KF-121T30_0603 SY8037BDCC_DFN12_3X3 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
+5VALW 1 2 +VCCSA_PWR_SRC 12
PVIN LX
1 +VCCSA_PHASE 1 2 +VCCSAP
11 2

22U_0805_6.3V6M
PVIN LX SA_PGOOD

22U_0805_6.3VAM

@22U_0805_6.3VAM
2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1

1
2200P_0402_50V7K

0.1U_0603_25V7K
PC815 10 3 PR804 <IREF>

PC818

PC819

PC820
SVIN LX

2
68P_0402_50V8J 100K_0402_5%

PC817

PC801

PC802

PC803

PC804
C +VCCSAP_FB 2 1 9 4 2 1 C
+3VS

2
1 FB PG

1
8 5 +VCCSA_EN 1 2
VOUT EN <IREF>

GND

@0.1U_0402_10V7K
7 6 0_0402_5%
VID1 VID0

1
PR806
+V1.05S_VCCP_PWRGOOD

2
PR812

PC809
1K_0402_5%

1K_0402_5%
13
100_0402_5%

PR802

PR805

2
2 1

1
PR811
0_0402_5%
2 1
H_VCCSA_VID0 <IREF> +VCCSA_SENSE <IREF>

H_VCCSA_VID1 <IREF>

PJP801
B +VCCSAP 1 2 +VCCSA B

PAD-OPEN 4x4m

A A

5
www.vinafix.vn
4 3
Security Classification
Issued Date 2010/07/20
Compal Secret Data
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2
2012/12/31 Title

Size
C

Date:
Compal Electronics, Inc.
Document Number
PWR-VCC_SAP
LA-8226P
Friday, July 13, 2012
1
Sheet 50 of 56
Rev
1.0
5 4 3 2 1

PR201 PC214 PC253


1 2 FBA3 1 2 1 2

1200P_0402_50V7K

560P_0402_50V7K
D PUT CLOSE D

75K_0402_1%
10_0402_1% 0.015U_0402_16V7K .1U_0402_16V7K
TO GT

1
PR203 PR204 1 PR202 2

PC261

PC250

PR205
TRBSTA# 1 2 FBA1 1 2 Inductor
2P: 24K 24.9K_0402_1% PH203 PR206 PC235

1
1
8.06K_0402_1% 806_0402_1% 220K_0402_5%_ERTJ0EV224J CSCOMPA 1 2 DROOPA 1 2 CSREFA
PC236 1P: 24.9K <BOM Structure>

2
PR208 PC240 PC244 2 PR207 1 NTC_PH203 1K_0402_1% 1000P_0402_50V7K

2
0.022U_0402_25V7K 1 2 FBA2 1 2 1 2
10_0402_1% 165K_0402_1% 2P: 1.65K
560P_0402_50V7K PR210 10P_0402_50V8J PC252
1 PR209 2 1 2 COMPA1 1 2 1P: 1K
1K_0402_1% 5.11K_0402_1% 1500P_0402_50V7K CSREFA
PC255 TSENSEA

2
1 PR212 2 SWN1A 0.047U_0402_16V7K

2P: 21.5K 68K_0603_1% PR213 6.98K_0402_1%

1
CSP1A 1 2
1P: 15.8K SWN1A 8

2
15.8K_0402_1%
CSCOMPA
PC257
9 VCC_AXG_SENSE

2
13.7K_0402_1%
1PR215
1000P_0402_50V7K

1
PC237 PH204

PR216
1000P_0402_50V7K
CSREFA 8

1
100K_0402_1%_TSM0B104F4251RZ
9 VSS_AXG_SENSE
PC264

1
CSP2A
CSP1A
1 2

TRBSTA#

DROOPA

CSSUMA

TSENSEA
COMPA
IMONA
FBA
.1U_0402_16V7K

DIFFA

ILIMA
PR220 2P: 36K
1 2 PUT CLOSE
26.1K_0402_1% 1P: 26.1K

61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
+5VS 1 PR221 2 PU201 TO V_GT
C C
2_0603_5% HOT SPOT

VSNA
VSPA
DIFFA

FBA
COMPA
IOUTA
ILIMA
DROOPA
CSCOMPA
CSSUMA
CSREFA
CSP2A
CSP1A
TSNSA
PAD

TRBSTA#
+1.05VS 6132_PWMA 49
PC259
1 2 6132_VCC
1 45
2.2U_0603_10V6K 2 VCC PWMA 44
VDDBP BSTA +5VS
54.9_0402_1%

PR228 3 43
VRDYA HGA
1

1
130_0402_1%

1 2VR_ON_CPU 4 42
49 VR_ON EN SWA
PR223

PR224

PC269 PC270 0_0402_5% VR_SVID_DAT1 5 41 PC267


.1U_0402_16V7K .1U_0402_16V7K VR_SVID_ALRT# 6 SDIO LGA 40 BST2 1 PR226 2 BST2_1 1 2 2Phase: @
2

PR232 PR227 VR_SVID_CLK 7 ALERT# BST2 39 2.2_0603_5% 0.22U_0402_10V6K


SCLK HG2 HG2 49 1Phase: install

1
95.3K_0402_1% 1 2 VBOOT 8 38 Option for
SW2 49
1

1 2VR_SVID_DAT1 1 2 10K_0402_1% ROSC_CPU 9 VBOOT NCP6132BMNR2G_QFN60_7X7 SW2 37 PC245 PR231


49 VR_SVID_DAT ROSC LG2 LG2 49 1 phase GFX
PR266 0_0402_5% CPU_B+ 1 2 VRMP 10 36 6132P_VCCP 1 PR274 2 1 2 0_0402_5%
49 VR_SVID_ALRT# VRMP PVCC
VR_HOT# 11 35 0_0402_5% 2.2U_0603_10V6K
49 VR_SVID_CLK VRHOT# PGND
0.01U_0402_25V7K
PR230 1K_0402_1% VGATE 12 34 1 PR265 2
LG1 49 +5VS

2
VRDY LG1
1

13 33 0_0402_5% CSP2A
+1.05VS VSN SW1 SW1 49
PC239 14 32 PC238
+3VS VSP HG1 HG1 49
DIFF_CPU 15 31 BST1 1 PR233 2 BST1_1 1 2

CSCOMP
2

DIFF BST1

TRBST#
2.2_0603_5% 0.22U_0402_10V6K

DROOP

CSSUM

DRVEN
CSREF
1

COMP

TSNS
CSP3
CSP2
CSP1

PWM
IOUT
ILIM
2

PC271 PR234

FB
47P_0402_50V8J 75_0402_1% PR235 +5VS
10K_0402_5%
1

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
3P: 73.2K
2

1 PR236 2
49 VR_HOT# 2P: 41.2K
2

COMP_CPU

1
41.2K_0402_1% Option for 3Phase: @

FB_CPU
TRBST#
49 VGATE
PR237 2 phase CPU PR264

DROOP

TSENSE
ILIM_CPU
1 2 VSN 3P: 22p 0_0402_5% 2Phase: install
8 VSSSENSE
1

0_0402_5%

IMON
PC246 2P: 10p
DRVEN 49

2
PR254 1000P_0402_50V7K CSP3
2

1 2 VSP PC254
8 VCCSENSE

2
PR250 12.4K_0402_1%
0_0402_5% 1 2

B .1U_0402_16V7K B
PR259 PC263 CSP1 TSENSE
3P: 330p 1 2 2 1 CSP2
1 CSP3 CSP2 1 PR2462
2P: 1000p SWN2 8

1
1K_0402_1% 10P_0402_50V8J 6.98K_0402_1%
PC260
PR247 PC262 PR249 PC256 3P: 21K 0.047U_0402_16V7K

2
1 2FB_CPU1 1 2 2 1COMP_CPU1 2 1 CSREF
PR248 PC242 49.9_0402_1% 6.34K_0402_1% 2P: 12.4K

13.7K_0402_1%
1 2FB_CPU3 1 2 560P_0402_50V7K 1800P_0402_50V7K

PR251 1

2
10_0402_1% 3P: 6.04K CSP1 1 PR2582
CSREF 8 SWN1 8
CSCOMP

1
0.033U_0402_25V7K 6.98K_0402_1% PH202
PR263 PR260 2P: 4.32K PC243 PC248
TRBST# 1 2 FB_CPU2 1 2 1000P_0402_50V7K 3P: 1500p 0.047U_0402_16V7K 100K_0402_1%_TSM0B104F4251RZ
1

2
0.015U_0402_16V7K

CSREF
2P: 1200p

1
1

8.06K_0402_1% 806_0402_1% 3P: 2200p


PC266
2P: 3300p CSSUM
2

3P: 348 3P: 3.65K PC258


1 2
2P: 1.21K 2P: 9.53K 1 PR261 2 SWN1
24.9K_0402_1%

1500P_0402_50V7K 143K_0603_1% PUT CLOSE


2

.1U_0402_16V7K

TO VCORE
PC247

3P: 23.7K 1 2 PC268 1 PR253 2 SWN2


220P_0402_50V7K
PR252

2P: 24.9K
143K_0603_1% HOT SPOT
1

1 PR262 2NTC_PH201 1 PR255 2


1

75K_0402_1%
PR257 PC251 165K_0402_1%
CSCOMP 1 2 DROOP 1 2 CSREF
PUT CLOSE
1K_0402_1% 1000P_0402_50V7K 2 1
3P: 806 TO VCORE
2P: 1K Phase 1 PH201 220K_0402_5%_ERTJ0EV224J
A Inductor A

5
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Security Classification
Issued Date 2009/12/01

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3
Compal Secret Data

Size Document Number


Custom
Deciphered Date

2
2010/12/31 Title

Date:
Compal Electronics, Inc.
PWR-CPU_CORE

Friday, July 13, 2012


LA-8226P
1
Sheet 51 of 56
Rev
1.0
5 4 3 2 1

PL208 @1UH_PCMB042T-1R0MS_4.5A_20%

2 1

CPU_B+ PL206 CPU_B+


HCB2012KF-121T50_0805
2 1

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
B+ CPU_B+

0.1U_0402_25V6

0.1U_0402_25V6
2200P_0402_25V7K

2200P_0402_25V7K
5

5
PL207
HCB2012KF-121T50_0805

1
2 1

PC201

PC202

PC280

PC281

PC203

PC204

PC282

PC283
AXG_B+

S TR AON7518 1N DFN

S TR AON7518 1N DFN
@S TR AON7518 1N DFN

@S TR AON7518 1N DFN
PR214 1 PR219
0_0603_5% 1 0_0603_5%

@680P_0603_50V7K
2

2
2 1 4 4 + 2 1 4 4

PQ201

@ PQ211

PQ203

@ PQ212
8 HG1 +VCC_CORE + PC212
8 HG2
+VCC_CORE

1
PC211 100U_25V_M
100U_25V_M 2

PC213
PL201 2

3
2
1

3
2
1

3
2
1

3
2
1
D D
0.36UH_VMPI1004AR-R36M-Z03_30A_20% PL202
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1 4 1 4
8 SW1 8 SW2

1
2 3 2 3

5
PR280 PR281
4.7_1206_5% 4.7_1206_5%

2
PQ202 PR282 PQ204 PR283
4 V1N_CPU 2 1 4 V2N_CPU 2 1
8 LG1 CSREF 49 8 LG2 CSREF 49

1SNUB_CPU1

SNUB_CPU2
S TR FDMS0308AS 1N POWER56-8 S TR FDMS0308AS 1N POWER56-8
10_0402_1% 10_0402_1%

SWN1 49 SWN2 49

3
2
1

3
2
1
PC284
680P_0402_50V7K

1
PC285

2
680P_0402_50V7K

2
QC 45W CPU
solution: 3+2
MOS: cpu_core --> 1(CSD17308) 1(TPCA8059)
C Gfx_core --> 1(CSD17308) 1(TPCA8059) C
QC 45W CPU DC 35W CPU
VID1=0.9V VID1=1.05V
IccMax=94A IccMax=53A
Icc_Dyn=66A Icc_Dyn=43A
Icc_TDC=56A Icc_TDC=33A
R_LL=1.9m ohm R_LL=1.9m ohm DC 35W CPU
OCP~110A OCP~65A solution: 2+1
MOS: cpu_core --> 1(CSD17308) 1(TPCA8059)
Gfx_core --> 1(CSD17308) 1(TPCA8057)

AXG_B+
B B
PR284
BSTA1 1 2 BSTA1_1
10U_0805_25V6K

10U_0805_25V6K

2.2_0603_5%
0.1U_0402_25V6

2200P_0402_25V7K
5

5
0.22U_0402_10V6K
1

1
S TR AON7518 1N DFN

PC286
PC205

PC206

PC287

PC288
@S TR AON7518 1N DFN
2

4 4
PQ205

@ PQ214

PU202
1
BST FLAG
9 PR225 +VCC_GFXCORE_AXG
0_0603_5%
3
2
1

3
2
1

2 8 HG1A 2 1 PL203
8 6132_PWMA PWM DRVH
PR285
2 1EN_GFX1 3 7 SW1A 1 4
8 DRVEN EN SW
2K_0402_1%
1

+5VS 2 1VCC_GFX1
2 1 4
VCC GND
6 2 3
5

PR272 PR275 0.36UH_VMPI1004AR-R36M-Z03_30A_20%


0_0402_5% 0_0402_5% 5 LG1A PR286
DRVL
V1N_GFX

PQ208 4.7_1206_5%
1

NCP5911MNTBG_DFN8_2X2
2

PC289 4 2 PR287 1
CSREFA 49
2

2.2U_0603_10V6K
SNUB_GFX1

10_0402_1%

SWN1A 49
3
2
1

S TR FDMS0308AS 1N POWER56-8
1

PC290
680P_0402_50V7K
2

A A

www.vinafix.vn
QC 45W GT2 DC 35W GT2
VID1=1.23V VID1=1.23V
IccMax=46A IccMax=33A
Icc_Dyn=37A Icc_Dyn=20.2A Security Classification Compal Secret Data Compal Electronics, Inc.
Icc_TDC=38A Icc_TDC=21.5A Issued Date 2009/12/01 Deciphered Date 2010/12/31 Title

R_LL=3.9m ohm R_LL=3.9m ohm THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CPU_CORE
Size Document Number Rev
OCP~55A OCP~40A AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8226P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, July 13, 2012 Sheet 52 of 56
5 4 3 2 1
5 4 3 2 1

+VCC_CORE
+1.05vs
1

1
PC1101 PC1102 PC1103 PC1104 PC1105 PC1168
2 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M +VCC_GFXCORE_AXG

2
+1.05vs

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1

PC779

PC778

PC751

PC752

PC753

PC754

PC755

PC756

PC757

PC758

PC759

PC760

PC761
1

1
2 2 2 2 2 2 2 2 2 2 2 2 2
D PC1106
2.2U_0402_6.3V6M
PC1107
2.2U_0402_6.3V6M
PC1110
2.2U_0402_6.3V6M
PC1108
2.2U_0402_6.3V6M
PC1109
2.2U_0402_6.3V6M
PC1169
2.2U_0402_6.3V6M
+VCC_GFXCORE_AXG D
2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1
1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1 1 1 1 1 1

PC1151

PC1152

PC1153

PC1154

PC1155

PC1156

PC780

PC776

PC777

PC775

PC773

PC774

PC772

PC770

PC771

PC769

PC767

PC768

PC766
PC1132 PC1133 PC1136 PC1134 PC1135 PC1170
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
2

2
2 2 2 2 2 2 2 2 2 2 2 2 2
2 2 2 2 2 2
1

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1
PC1137 PC1138 PC1141 PC1139 PC1140 PC1171

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

PC790

PC789

PC788

PC787

PC786

PC785

PC784

PC783

PC782

PC781
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 1 1 1 1 1 1
2

PC1159

PC1160

PC1161

PC1162

PC1182

PC1183
2 2 2 2 2 2 2 2 2 2

2 2 2 2 2 2
1

1
PC1142 PC1143 PC1146 PC1144 PC1145 PC1172
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
2

@22U_0805_6.3V6M
1 1 1

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

330U_D2_2V_Y

330U_D2_2V_Y

@330U_D2_2V_Y
1 1 1 1 1 1 1 1 1 1 1

PC1184

PC1185

PC1186

PC1187

PC1188

PC1189

PC1190

PC1191

PC1192

PC1193

PC1194

PC762

PC763

PC764

PC765
+ + +
1
C C
1

1
2 2 2 2 2 2 2 2 2 2 2 2 2 2
PC1147 PC1148 PC1167 PC1149 PC1150 2
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M
2

1 1 1 1

330U_D2_2V_Y

330U_D2_2V_Y

@330U_D2_2V_Y

@330U_D2_2V_Y
+VCC_CORE

PC1163

PC1164

PC1165

PC1166
+ + + +

2 2 2 2
1 1 1 1 1 1
PC1111 PC1112 PC1113 PC1114 PC1115 PC1179
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2

Chief River 330uF*9m 470uF*4.5m 22uF 10uF


1 1 1 1 1 1
PC1116 PC1117 PC1118 PC1119 PC1120 PC1180
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2
8layer for DC CPU 16 10
4
B B

1 1 1 1 1 1 8layer for QC CPU 5 16 10


PC1121 PC1122 PC1123 PC1124 PC1125 PC1126
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2
6layer for DC CPU 5 16 10

1 1 1 1 1 1 1
PC1176 PC1175 PC1174 PC1178 PC1173 PC1177 PC1181 6layer for QC CPU 4 1 16 10
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2 2

GFX_CORE DC 2 12

GFX_CORE QC 3 12

+VCC_CORE 1.05V_VCCP 2 12
A A

www.vinafix.vn
1 1 1 1 1
+ PC1127 + PC1128 + PC1129 + PC1130 + PC1131
330U_D2_2V_Y 330U_D2_2V_Y @390U_2.5V_M 330U_D2_2V_Y 330U_D2_2V_Y Security Classification Compal Secret Data Compal Electronics, Inc.
2 2 2 2 2 Issued Date 2008/09/15 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR - PROCESSOR DECOUPLING
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 53 of 56
5 4 3 2 1
A B C D

+VGA_B+
PL903
HCB2012KF-121T50_0805
1 2 B+
PL904
HCB2012KF-121T50_0805
1 2

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6

@680P_0603_50V7K
2200P_0402_50V7K
1P : @

1
2P: install

PC936

PC907

PC908
PC937

PC971
1 1
PQ903

2
5

5
1 2 AON7518 PQ905

2
PR945 PR902
68K_0402_1% 0_0402_5%
4 4

GPU_VID5
GPU_VID4
GPU_VID3
GPU_VID2
GPU_VID1
GPU_VID0
<20>
<20>
<20>
<20>
<20>
<20>
1
PR903
150K_0402_1% PR904 PC938
1 2VRON_VGA 2.2_0603_5% 0.22U_0603_10V7K @AON7518
1P : @

3
2
1

3
2
1
<9,32,38,44,48,49,50,51> DGPU_PWR_EN BOOT2_VGA 2 1 BOOT2_2_VGA 1 2 PR911
1 2
PR905 UGATE2_VGA
0_0603_5%
2 1 UGATE2_VGA1
PL902
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
2P: install
10K_0402_1% PC939 @.1U_0402_16V7K
1 2 DPRSLPVR_VGA PHASE2_VGA 1 4
+VGA_CORE

5
1P: @ LF2_VGA 2 3 V2N_VGA

GPU_VID5
GPU_VID4
GPU_VID3
GPU_VID2
GPU_VID1
GPU_VID0
PQ904

10K_0402_1%
3.65K_0805_1%
2P: 1.91K

1
+3VS PR910 PR909

PR907
1 1

GPU_VID6

330U_D2_2V_Y

330U_D2_2V_Y
1.91K_0402_1% 1_0402_1%

PR908
1 2 CLK_ENABLE#_VGA LGATE2_VGA 4 PR906 + +

PC903

PC904
2

2
1

4.7_1206_5%
HW PU PR915 2 2

SNUB2_VGA
1.91K_0402_1% S TR AON6504 1N DFN

3
2
1
PD901 VSUM-_VGA
@RB751V-40TE17_SOD323-2
2

2 1 VSUM+_VGA ISEN2_VGA
<44> VGA_PWROK
1P: @ PR918
100K_0402_5% PC940
2P: 100K

1
+3VS 1 2
680P_0402_50V7K

2
2 PR919
47K_0402_1%
+VGA_CORE Under VGA Core 2

2 1 +VGA_CORE Near VGA Core


1P : @ PC941
1 2 1U_0603_10V6K
40
39
38
37
36
35
34
33
32
31

+3VS 2P: install


PR912 PU901 1 2
100K_0402_5%
CLK_EN#

VID6
VID5
VID4
VID3
VID2
VID1
VID0
DPRSLPVR
VR_ON

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M
PSI#_VGA
RBIAS_VGA

1 2

1
<20> ACIN_BUF PR913 30

PC923

PC920

PC921

PC922

PC924

PC925

PC911

PC919
1 1 1 1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

@22U_0805_6.3V6M
BOOT2

1
0_0402_5% 29

PC930

PC929

PC928

PC927
1 UGATE2 28 PC926

2
PC909 @56P_0402_50V8 2 PGOOD PHASE2 27 47U_0805_6.3V6M

2
1 2 3 PSI# VSSP2 26 PR920 2 2 2 2
VGA_VR_TT# 4 RBIAS LGATE2 25 VCCP_VGA11 2 VCCP_VGA 1 2
VR_TT# VCCP +5VS
PR914 2.8K_0402_1% PH902 NTC_MOSFET_VGA 5 24 0_0402_5%
1 2NTC_MOS_VGA 1 2 VW_VGA 6 NTC PWM3 23 PR921
COMP_VGA 7 VW LGATE1 22 0_0402_5%
470K_0402_5%_TSM0B474J4702RE FB_VGA 8 COMP VSSP1 21

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M
1 2ISEN3_VGA 9 FB PHASE1
ISEN3

1
UGATE1

10 PC943

PC912

PC913

PC931

PC932

PC933

PC934

PC935
BOOT1
ISUM+

ISEN2
ISEN1

ISUM-
VSEN

IMON

PC942 1U_0603_10V6K
8.06K_0402_1%

VDD
1000P_0402_50V7K

RTN

VIN

@22P_0402_50V8J 41
@249K_0402_1%

2
AGND
2

PC944

ISL62883CHRTZ-T_TQFN40_5X5
PR922

PR923

11
12
13
14
15
16
17
18
19
20

PR924 PR946
2

499_0402_1% PC945 1 2
1 2FB1_VGA1 2 @0_0402_5%
ISUM-_VGA
1

VDD_VGA
RTN_VGA

680P_0402_50V7K
PC946 PR926 PR925 0_0402_5%

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K
47P_0402_50V8J 3.48K_0402_1% IMON_VGA 1 2
+5VS VGA (20W ~ 35W bulk cap 330uF_9m * 4)

1
1 2 1 2 VSEN_VGA

PC968

PC965

PC966

PC967
PR927 0_0402_5% 35W--> 5 * 0.1uF +15 * 4.7u + 22u * 3 + 330_9m * 4
VIN_VGA 1 2
+VGA_B+

2
ISEN2_VGA
1 2FB2_VGA1 2 PR929
ISEN1_VGA 1_0402_5%
3
PC947 PR928 1 2 +VGA_B+ 3
+5VS
0.22U_0402_10V6K

0.22U_0402_10V6K
1

150P_0402_50V8J 267K_0402_1%
1

1
PC948

PC949

PC950

PC951
1U_0603_10V6K

0.22U_0603_25V7K

1P: 120K PR930


249K_0402_1%

2200P_0402_50V7K
2

2P: @249K
2

PQ906
BOOT1_VGA
1P: 68nF

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6
2

5
PR944 PQ901
@0_0402_5% 2P: 0.022uF

1
@AON7518

PC952
1P: install PR916

PC953

PC905

PC906
1

1P: @ 0_0603_5%

2
2P: @ 2P: 0.22u VSUM+_VGA UGATE1_VGA 2 1 UGATE1_VGA1 4 4
+5VS VSUM-_VGA
1 2
@82.5_0402_5%

+VGA_CORE
PR934 PC954
1

PR931 2.2_0603_5% 0.22U_0603_10V7K


PR932

3
2
1

3
2
1
1

10_0402_5% 2 1 BOOT1_1_VGA 1 2
2.61K_0402_1%

AON7518 PL901
PR933

0.36UH_VMPI1004AR-R36M-Z03_30A_20%
<22> VCCSENSE_VGA 1 2
2

PHASE1_VGA 1 4
+VGA_CORE
2

5
PR935
VSUM_VGA_N001

0.22U_0603_10V7K

0.022U_0603_25V7K
1

0_0402_5% PQ902 LF1_VGA 2 3 V1N_VGA


NTC_VGA

PC955
1

1
@330P_0402_50V7K
PC956

PC957

10K_0402_1%
3.65K_0805_1%
2

1
PR937
1 1

330U_D2_2V_Y

330U_D2_2V_Y
LGATE1_VGA 4 PR939
2

PR936 1_0402_1% + +

PR938

PC901

PC902
@0.01U_0402_25V7K
@330P_0402_50V7K

2
1

4.7_1206_5%
PC959

PC960

11K_0402_1%

2
1

PC958 PH901 2 2
PR941

3
2
1
PR940 0.01U_0402_50V7K 10K_0402_1%_TSM0A103F34D1RZ S TR AON6504 1N DFN

SNUB1_VGA
0_0402_5%
2

1 2 1P : @ VSUM-_VGA
<22> VSSSENSE_VGA
2

Layout Note: VSUM+_VGA 2P: install


PR942 PR943 Place near Phase1 Choke ISEN1_VGA
10_0402_5% 1.58K_0402_1%

1
4
1 2 1 2 4

VSUM-_VGA
PC961
680P_0402_50V7K

2
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1

1P: @ 1P: 866 1P: 0.1uF PC962


0.1U_0402_16V7K
2P: 1.58K 2P: 0.22uF 20W 25W ~30W
2

solution:1P solution:2P
OCP:38A OCP:75A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR - VGA_COREP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 54 of 56
A B C D
5 4 3 2 1

Power block
CPU OTP
Page 56
D Turn Off D

Input B+
DC IN +3VALWP: TDC:6A
Switch Page 57 +5VALWP: TDC:6.1A Always

RT8205LZQW(2) WQFN Page 52

CHARGER
CC:0A~3.64A +1.8VP: TDC:1.2A SUSP#
CV:12.6V(6cell) SY8033BDBC
BQ24725RGRR Page 59

Page 57

C C
+VCCPP: TDC:8.5A SUSP#

Battery TPS51212DSCR Page 60

+V1.05SP: TDC:7.9A SUSP#


TPS51212DSCR Page 61

+1.5VP: TDC:16A SYSON


TPS51212DSCR
Page 62
+VGA_CORE
DGPU_PWR_EN
TDC:23A
B TPS51212DSCR B

Page 65 +0.75VSP: TDC:2A +3VALW


APL5331KAC-TRL
Page 62

+VCCSAP: TDC:4.2A +V1.05S_VCCP_PWRGOOD


+VCC_CORE TPS51461RGER
VR_ON
TDC: 52A Page 63

ISL95832HRTZ-T
Page 64

+VCC_GFXCORE_AXG
VR_ON
A TDC: 38A A

ISL95832HRTZ-T
Page 64

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Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/03 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
POWER BLOCK DIAGRAM
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Monday, July 09, 2012 Sheet 55 of 56
5 4 3 2 1
5 4 3 2 1

Version Change List ( P. I. R. List ) Page 1


Request
Item Page# Title Date Issue Description Solution Description Rev.
Owner
modify CPU soultion to 2+1
1. 51.52 20120522 daniel_kao only support BGA1023 35W
D D

daniel_kao
2 43 Delete 51_ON circuit 20120522 EC : 9012

change 1.8v to SY8032A


3 46 daniel_kao
20120522

change 3v/5v to RT8243A.


20120522
4 45 daniel_kao

delete G718 circuit.


5 43 20120522 daniel_kao follow EC 9012

change EMI ISN Choke (PL102) to


C SH00000MW00. daniel_kao C
6 44
20120522

Follow BGA1023 request, modify


output MLCC count. daniel_kao
7 53 20120522

8 44 change pr101 from 2512 to 1206 20120523 daniel_kao


Change pq304 from AON7406L to AON4468L
change
change
pq332
pq306
form AON7518 to AON7408L
from AON7212L to FDMC7692S
20120523
9 45 change pl305 to 2.2UH +-20% ETQP3W2R2WFN 8.5A daniel_kao

B B

A A

www.vinafix.vn
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2012/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR - PIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 56 of 56
5 4 3 2 1
5 4 3 2 1

Timing Diagram for G3 or S4-5/M-off (Suspend Well Off) to S0/M0 [non Deep S4/S5 Platform]

ACIN/BATT-IN

+5VALW/+3VALW

D
VCCSUS D

(+5V_PCH/+3V_PCH)

PCH_RSMRST#

PM_SLP_SUS# T3>0ms

T5<90ms
AC_PRESENT

PWRBTN_OUT# T0>16ms

PM_SLP_S5#

T9>30us
PM_SLP_S4#

T10>30us
PM_SLP_S3#
C C

CPU1.5V_S3_GATE CPU1.5V_S3_GATE may come up before SUSP# and come down after SUSP#

SUSP# T>?ms

+V1.05S_VCCP(CPU),
+V1.05S(VccASW) T=?ms

T11>1ms PCH_APWROK may come up anytime before PCH_PWROK, but not after PCH_PWROK assertion
PCH_APWROK

SA_PGOOD

T>?ms

VR_ON
T33<5ms

CPU SVID BUS

50<T36<2000us
+VCC_CORE
T37<5ms
B B

VGATE

PCH_PWROK T14>99ms

T20>2ms

H_CPUPWRGD
T18>0ms

PM_DRAM_PWRGD 2ms<T17<650ms

SYSTEM_PWROK

SM_DRAMPWROK

+1.8VS_VCCPLL

PLT_RST# T43>100ms H_CPUPWRGD to PLT_RST# 1ms<T25<100ms

A A

Color Command

Signal Names Timing of these signals is set by PCH or processor

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Signal Names Timing of these signals should be met by the platform (EC)

Signal Names Timing of these signals is set by IntelR MVP

Signal Names Voltage rails or chip-to-chip buses

Security Classification Compal Secret Data


Issued Date 2009/12/01 Deciphered Date 2011/12/31 Title
Power Sequence
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8226P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, July 09, 2012 Sheet 57 of 58
5 4 3 2 1
5 4 3 2 1

FM: LA-8224PR10_0416.DSN
Version Change List ( P. I. R. List ) Page 1/1
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
ER01 CPU change from socket to BGA 1023 0.1 4~9 CPU change to UCPU1(BGA1023) from JCPU1(socket). 5/28

Modify CPU Cap. 0.1 8,9 Change C74,C75 to 1uf/0402

D
Del C79,C80,C81,C82,C83,C84. 5/28 D

Add C243,C239,C151,C177,C219,C157,C181,C237,
C153,C192 to 1uf/0402
Add C238,C241,C240,C236,C156,C244,C242,C143
to 10uf/0603
Del C86,C87,C88,C89,C94.
Add C245,C246,C254,C248,C249, to 1uF/0402.
Add C253,C250,C252,C251,C247 to 10uf/0603.

ER02
For Green CLK 0.1 12 Add R683 0 ohm. (PCH_32K)
13 Add R637 0 ohm. (PCH_25M)
5/28
32 Add R555 0 ohm. (LAN_25M)
20 Add R96 0 ohm. (VGA_27M)
43 Add C89 2.2uF.
Add C86,C87 12pF.
Add C81 22uF.
C
Add C79,C83,C84,C82,C80 0.1uF. C

Add Y5 25M.
Add U6 SLG3NB300VTR.
Add R31 1M.
Add R5 22ohm.
Add R95,R35 33ohm.
Add R30 330ohm.
Add R97 0ohm.

ER03
Remove reserve components 0.1 33 Del C504,C505,C507.
5/29
39 Del C655,C656,R681.
35 Del C626,C628,C634,F1,Q53,Q56,R643,R664.
38 Del D30,Q30,R532,R530.
5,6,13, Del R267,R43,R750,R278,R290.
17,18

ER04
Remove ASM1042 ( Del page 36) 0.1 13,36,37 Del ASM1042 .
B
Green CLK VDD change 43 U6 VDD change to +3V_PCH from +LAN_IO. 5/30 B

EMI solution 13,32,20 Add R185,R186,R187.(reserve)


Add C255,C256,C257.(reserve)

ER05
EMI solution 0.1 42 Add C258,C259,C260.(reserve) 5/31

ER06
BOM modify 0.1 17 C180 change to 22uf (SE000000I10). 6/4
15 stuff R234 0 ohm

ER07
Green CLK modify 0.1 42 Del R31,R97.
6/4
Change U6 pin3 voltage to +1.05VS.
EMI solution 38 Add C261.(reserve)

ER08
Modify Cap. 0.1 09 Add C262,C263 to 10uf .
6/6
un-stuff C97,C85,C78 .

PR01
Change JDIMM1. footprint 1.0 10 Change JDIMM1 footprint.(TYCO_2-2013298-1_204P) 7/4
A A

PR02
Swap Resistor 1.0 07 Swap R48 & R46. 7/5

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PR03 EMI solution / GCLK 1.0 35,42 Add C655,C656,C674 to 2.2pf . C87 change to 15pf. R95 change to 0 ohm.
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/12/01 Deciphered Date 2011/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EE-PIR-1
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8226P
Date: Friday, July 13, 2012 Sheet 58 of 58
5 4 3 2 1

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