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Compal Confidential
2 2

PAV70 Schematics Document


Intel Pineview Processor with Tigerpoint + DDRII

3
2010-07-01 3

REV: 1.0

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Friday, July 02, 2010 Sheet 1 of 39
A B C D E
A B C D E

Clock Generator
Compal Confidential CK505 page 8

Model Name :
File Name : LA-6221P CRT Conn
page 10
1 1
ZZZ
RGB
Memory BUS(DDRII) DDRII-SO-DIMM
Pineview page 7
PCB PAV70@

DAZ0F300201 LCD Conn. LVDS FCBGA 559 1.8V DDRII 667

page 9 22x22mm
Thermal Sensor page 4,5,6
ZZZ
EMC1402
page 5
DMI
PCB PAV50@
X2 mode
GEN1
DAZ0F000300

USB USB Port X3


2
PCI-Express Tigerpoint HDA page 15
2

PCBGA360 BlueTooth
page 23
17x17mm SATA
page 11,12,13,14
CMOS CAM
page 9
MINI Card x1 MINI Card x1
3G WLAN 10/100 Ethernet HDD
AR8152L page 15 3G
page 17 page 18 page 16
page 17

LPC BUS
Transfermer WLAN
3 3
page 18

Aralia Codec
ALC272 page 19
Card Reader
RJ45
Power ON/OFF DC/DC Interface
page 27
ENE6252
page 26
3VALW/5VALW
page 27
ENE KBC SPI page 22

DC IN
page 27
KB926page 24
0.89VP/1.5VP
AMP & INT INT MIC HeadPhone & SD/MMC/MS
BATT IN 0.9VSP/2.5VSP
page 29 page 32 、33 Speaker MIC Jack
CONN
Int.KBD SPI ROM
page 25 page 25
CHARGER 1.8V/VCCP Touch Pad I/O Board
page 30
4
page 32 page 25 4

CPU_CORE
page 34
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 2 of 39
A B C D E
A B C D E

Voltage Rails
Power Plane Description S1 S3 S5 External PCI Devices
1
VIN Adapter power supply (19V) ON ON ON DEVICE IDSEL # REQ/GNT # PIRQ 1

B+ AC or battery power rail for power circuit. ON ON ON


+CPU_CORE Core voltage for CPU ON OFF OFF No PCI Device
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF
+VCCP VCCP switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF
+0.89V Graphic core power rail ON OFF OFF
EC SM Bus1 address EC SM Bus2 address
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF Device Address Device Address
+5VALW 5V always on power rail ON ON ON* Smart Battery 0001 011X b EMC1402 100_1100
+5VS 5V switched power rail ON OFF OFF
+VSB VSB always on power rail ON ON ON*
+RTCVCC RTC power ON ON ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. Tiger Point SM Bus address
2 2

SIGNAL Device Address


STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Clock Generator 1101 001Xb
Full ON HIGH HIGH HIGH ON ON ON ON (SLG8SP556VTR)
DDR DIMMA 1010 000Xb
S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW

S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF

USB table PCIE table


S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
Port0 MB USB Conn1.
S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF UHCI1 PCIE port1 LAN
Port1 MB USB Conn2.
Port2 MB USB Conn3. PCIE port2 Wireless Card
EHCI1 UHCI2
Port3 CMOS
PCIE port3 3G
BOARD ID Table(Page 17) Port4 Card Reader
UHCI3
Port5 WWAN PCIE port4
Vcc 3.3V +/- 5% Port6 BT
UHCI4 PCIE port5
Ra/Rc/Re 100K +/- 5% Port7 WLAN
3 Board ID 3
Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max EHCI2 Port8 PCIE port6
UHCI5
0(EVT) 0 0 V 0 V 0 V Port9
1(DVT) 8.2K +/- 5% 0.216 V 0.250 V 0.289 V Port10
UHCI6
2(PVT) 18K +/- 5% 0.436 V 0.503 V 0.538 V Port11
3(MP) 33K +/- 5% 0.712 V 0.819 V 0.875 V
4 56K +/- 5% 1.036 V 1.185 V 1.264 V SATA table
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
SATA port0 HDD
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V SATA port1
SATA port2
BOARD ID Table
SATA port3
Board ID PCB Revision
SATA port4
0 0.1
1 0.2 SATA port5
2
4 4
3
4
5
6
7
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 3 of 39
A B C D E
5 4 3 2 1

(7) DDR_A_DQS#[0..7]
PINEVIEW_M
PINEVIEW_M (7) DDR_A_D[0..63]
U71A U71B
REV = 1.1
(7) DDR_A_DM[0..7]
REV = 1.1 DDR_A_MA0 AH19 AD3 DDR_A_DQS0
DMI_RX0_C (7) DDR_A_DQS[0..7] DDR_A_MA1 DDR_A_MA_0 DDR_A_DQS_0 DDR_A_DQS#0
F3 DMI_RXP_0 DMI_TXP_0 G2 DMI_TX0 (12) AJ18 DDR_A_MA_1 DDR_A_DQS#_0 AD2
DMI_RX#0_C F2 G1 DDR_A_MA2 AK18 AD4 DDR_A_DM0
DMI_RXN_0 DMI_TXN_0 DMI_TX#0 (12) (7) DDR_A_MA[0..14] DDR_A_MA_2 DDR_A_DM_0
DMI_RX1_C H4 H3 DMI_TX1 (12) DDR_A_MA3 AK16
DMI_RX#1_C DMI_RXP_1 DMI_TXP_1 DDR_A_MA4 DDR_A_MA_3 DDR_A_D0
G3 DMI_RXN_1 DMI_TXN_1 J2 DMI_TX#1 (12) AJ14 DDR_A_MA_4 DDR_A_DQ_0 AC4
DDR_A_MA5 AH14 AC1 DDR_A_D1

DMI
DDR_A_MA6 DDR_A_MA_5 DDR_A_DQ_1 DDR_A_D2
AK14 DDR_A_MA_6 DDR_A_DQ_2 AF4
DDR_A_MA7 AJ12 AG2 DDR_A_D3
DDR_A_MA8 DDR_A_MA_7 DDR_A_DQ_3 DDR_A_D4
AH13 DDR_A_MA_8 DDR_A_DQ_4 AB2
D DDR_A_MA9 DDR_A_D5 D
AK12 DDR_A_MA_9 DDR_A_DQ_5 AB3
N7 L10 DDR_A_MA10 AK20 AE2 DDR_A_D6
(8) CLK_CPU_EXP# EXP_CLKINN EXP_RCOMPO DDR_A_MA_10 DDR_A_DQ_6
N6 L9 R162 DDR_A_MA11 AH12 AE3 DDR_A_D7
(8) CLK_CPU_EXP EXP_CLKINP EXP_ICOMPI DDR_A_MA_11 DDR_A_DQ_7
L8 R203 49.9_0402_1% DDR_A_MA12 AJ11
EXP_RBIAS 750_0402_1% DDR_A_MA13 DDR_A_MA_12 DDR_A_DQS1
R10 AJ24 AB8
EXP_TCLKINN DDR_A_MA14 DDR_A_MA_13 DDR_A_DQS_1 DDR_A_DQS#1
R9 EXP_TCLKINP RSVD_TP N11 T38 AJ10 DDR_A_MA_14 DDR_A_DQS#_1 AD7
N10 P11 AA9 DDR_A_DM1
RSVD RSVD_TP T39 Must be placed within 500 mils from Pineview-M pins DDR_A_DM_1
N9 RSVD DDR_A_WE# AK22 AB6 DDR_A_D8
(7) DDR_A_WE# DDR_A_WE# DDR_A_DQ_8
DDR_A_CAS# AJ22 AB7 DDR_A_D9
(7) DDR_A_CAS# DDR_A_RAS# DDR_A_CAS# DDR_A_DQ_9 DDR_A_D10
(7) DDR_A_RAS# AK21 DDR_A_RAS# DDR_A_DQ_10 AE5
K2 K3 AG5 DDR_A_D11
RSVD RSVD DDR_A_BS0 DDR_A_DQ_11 DDR_A_D12
J1 RSVD RSVD L2 (7) DDR_A_BS0 AJ20 DDR_A_BS_0 DDR_A_DQ_12 AA5
M4 M2 DDR_A_BS1 AH20 AB5 DDR_A_D13
RSVD RSVD (7) DDR_A_BS1 DDR_A_BS2 DDR_A_BS_1 DDR_A_DQ_13 DDR_A_D14
L3 N2 (7) DDR_A_BS2 AK11 AB9
RSVD RSVD DDR_A_BS_2 DDR_A_DQ_14 DDR_A_D15
AD6
DDR_A_DQ_15
1 OF 6 DDR_A_DQS2
PINEVIEW-M_FCBGA8559 AD8
DDR_CS#0 DDR_A_DQS_2 DDR_A_DQS#2
(7) DDR_CS#0 AH22 DDR_A_CS#_0 DDR_A_DQS#_2 AD10
DDR_CS#1 AK25 AE8 DDR_A_DM2
(7) DDR_CS#1 DDR_A_CS#_1 DDR_A_DM_2
JP16 AJ21
XDP_PREQ# CONN@ DDR_A_CS#_2 DDR_A_D16
(5) XDP_PREQ# 1 AJ25 AG8
XDP_PRDY# 1 DDR_A_CS#_3 DDR_A_DQ_16 DDR_A_D17
(5) XDP_PRDY# 2 2 DDR_A_DQ_17 AG7
3 DDR_CKE0 AH10 AF10 DDR_A_D18
XDP_BPM#3 3 (7) DDR_CKE0 DDR_CKE1 DDR_A_CKE_0 DDR_A_DQ_18 DDR_A_D19
(5) XDP_BPM#3 4 (7) DDR_CKE1 AH9 AG11
XDP_BPM#2 4 DDR_A_CKE_1 DDR_A_DQ_19 DDR_A_D20
(5) XDP_BPM#2 5 5 AK10 DDR_A_CKE_2 DDR_A_DQ_20 AF7
6 AJ8 AF8 DDR_A_D21
C435 XDP_BPM#1 6 DDR_A_CKE_3 DDR_A_DQ_21 DDR_A_D22
1 2 DMI_RX0_C (5) XDP_BPM#1 7 AD11
(12) DMI_RX0 7 DDR_A_DQ_22
(5) XDP_BPM#0 XDP_BPM#0 8 M_ODT0 AK24 AE10 DDR_A_D23
0.1U_0402_10V7K 8 (7) M_ODT0 DDR_A_ODT_0 DDR_A_DQ_23
9 M_ODT1 AH26
C436 9 (7) M_ODT1 DDR_A_ODT_1 DDR_A_DQS3
1 2 DMI_RX#0_C (5,13) H_PWRGD R354 1 2 1K_0402_5% 10 AH24 AK5
(12) DMI_RX#0 10 DDR_A_ODT_2 DDR_A_DQS_3 DDR_A_DQS#3
0.1U_0402_10V7K R347 1 2 1K_0402_5% 11 AK27 AK3
C (13) SLPIOVR# 11 DDR_A_ODT_3 DDR_A_DQS#_3 DDR_A_DM3 C
(8) CPU_ITP 12 12 DDR_A_DM_3 AJ3
C437 DMI_RX1_C 13
(12) DMI_RX1 1 2 (8) CPU_ITP# 13
14 AH1 DDR_A_D24
0.1U_0402_10V7K +VCCP 14 DDR_A_DQ_24
PLTRST# 1 R348 2 1K_0402_1% 15 M_CLK_DDR0 AG15 AJ2 DDR_A_D25
C438 DMI_RX#1_C (5,13,16,17,18,24,26) PLTRST# 15 (7) M_CLK_DDR0 M_CLK_DDR#0 DDR_A_CK_0 DDR_A_DQ_25 DDR_A_D26
(12) DMI_RX#1 1 2 16 AF15 AK6
16 (7) M_CLK_DDR#0 M_CLK_DDR1 DDR_A_CK_0# DDR_A_DQ_26 DDR_A_D27
0.1U_0402_10V7K 17 (7) M_CLK_DDR1 AD13 AJ7
XDP_TDO 17 M_CLK_DDR#1 DDR_A_CK_1 DDR_A_DQ_27 DDR_A_D28
(5) XDP_TDO 18 18 (7) M_CLK_DDR#1 AC13 DDR_A_CK_1# DDR_A_DQ_28 AF3
(5) XDP_TRST# XDP_TRST# 19 AH2 DDR_A_D29
19 DDR_A_DQ_29
Close to CPU (5) XDP_TDI
XDP_TDI
XDP_TMS
20
21
20
AC15
DDR_A_DQ_30 AL5
AJ6
DDR_A_D30
DDR_A_D31
(5) XDP_TMS 21 DDR_A_CK_3 DDR_A_DQ_31
22 22 AD15 DDR_A_CK_3#
23 AF13 AG22 DDR_A_DQS4
XDP_TCK 23 DDR_A_CK_4 DDR_A_DQS_4 DDR_A_DQS#4
(5) XDP_TCK 24 24 AG13 DDR_A_CK_4# DDR_A_DQS#_4 AG21
25 AD19 DDR_A_DM4
G1 DDR_A_DM_4
26
G2 DDR_A_D32
AE19
ACES_87151-24051 DDR_A_DQ_32 DDR_A_D33
+1.8V AD17 AG19
RSVD DDR_A_DQ_33 DDR_A_D34
AC17 AF22
RSVD DDR_A_DQ_34 DDR_A_D35
AB15 AD22
RSVD DDR_A_DQ_35 DDR_A_D36
AB17 RSVD DDR_A_DQ_36 AG17
AF19 DDR_A_D37
XDP Reserve +VCCP R369
10K_0402_5%
DDR_A_DQ_37
DDR_A_DQ_38
AE21
AD21
DDR_A_D38
DDR_A_D39
DDR_A_DQ_39
XDP_TDI R341 1 2 51 +-1% 0402 AE26 DDR_A_DQS5
+1.8V DDR_A_DQS_5
AB4 AG27 DDR_A_DQS#5
XDP_TMS R342 1 51 +-1% 0402 RSVD DDR_A_DQS#_5 DDR_A_DM5
2 AK8 RSVD DDR_A_DM_5 AJ27

1
XDP_TDO R370 DDR_A_D40
R343 1 2 51 +-1% 0402 AE24
R50 10K_0402_5% DDR_A_DQ_40 DDR_A_D41
AG25
XDP_PREQ# R344 1 51 +-1% 0402 @ T40 DDR_A_DQ_41 DDR_A_D42
2 AB11 AD25
1K_0402_1% RSVD_TP DDR_A_DQ_42 DDR_A_D43
T41 AB13 AD24
B RSVD_TP DDR_A_DQ_43 DDR_A_D44 B

2
DDR_A_DQ_44 AC22
AL28 AG24 DDR_A_D45
DDR_RPD DDR_VREF DDR_A_DQ_45 DDR_A_D46
AK28 AD27

1
XDP_TRST# R345 1 51 +-1% 0402 DDR_RPU DDR_RPD DDR_A_DQ_46 DDR_A_D47
2 1 AJ26 DDR_RPU DDR_A_DQ_47 AE27
+5VS R142
FAN1 Conn XDP_TCK R346 1 2 51 +-1% 0402
1K_0402_1%
C1221
0.1U_0402_16V4Z AK29
RSVD DDR_A_DQS_6
AE30 DDR_A_DQS6
AF29 DDR_A_DQS#6
Modify follow KAV60 schematic 06/12 2 DDR_A_DQS#_6 DDR_A_DM6

2
AF30
DDR_A_DM_6
+5VS DDR_A AG31 DDR_A_D48
C312 2.2U_0603_10V6K DDR_A_DQ_48 DDR_A_D49
DDR_A_DQ_49 AG30
1 2 +1.8V AD30 DDR_A_D50
DDR_A_DQ_50 DDR_A_D51
Modify D38 D39 D40 Pin define 08/13 DDR_A_DQ_51 AD29
AJ30 DDR_A_D52
DDR_A_DQ_52
3

U12 XDP_TMS AJ29 DDR_A_D53


D19@ XDP_TCK DDR_A_DQ_53 DDR_A_D54
1 8 AE29
EN GND R242 DDR_RPU DDR_A_DQ_54 DDR_A_D55
2 7 DAN217_SC59 AD28
VIN GND DDR_A_DQ_55
3
+VCC_FAN1 3
VOUT GND
6 XDP_PREQ# 2 1 80.6_0402_1%
1 2 4 5 XDP_TDO D38 AB27 DDR_A_DQS7
(24) EN_FAN1 VSET GND C1222 DDR_A_DQS_7 DDR_A_DQS#7
R47 330_0402_5% AA27
1

DDR_A_DQS#_7
3

APL5607KI-TRG_SO8 1 2 C314 0.01U_0402_16V7K AB26 DDR_A_DM7


D39 2 DDR_A_DM_7
1
PJDLC05C_SOT23-3
4.7U_0603_6.3V6K AA24 DDR_A_D56
PJDLC05C_SOT23-3

DDR_A_DQ_56 DDR_A_D57
C1151 DDR_A_DQ_57 AB25
C313 1 2 XDP_TRST# R243 DDR_RPD W24 DDR_A_D58
0.01U_0402_16V7K DDR_A_DQ_58
2 XDP_TDI 80.6_0402_1% W22 DDR_A_D59
1

4.7U_0603_6.3V6K DDR_A_DQ_59 DDR_A_D60


DDR_A_DQ_60 AB24
3

AB23 DDR_A_D61
+3VS C1150 D40 DDR_A_DQ_61 DDR_A_D62
AA23
1

1000P_0402_50V7K DDR_A_DQ_62 DDR_A_D63


W27
DDR_A_DQ_63
PJDLC05C_SOT23-3

1 2
1

A R256 A
2 OF 6
10K_0402_5% PINEVIEW-M_FCBGA8559
40mil Add 2009-6-17
JP12
2

+VCC_FAN1 1 1
(24) FAN_SPEED1 2 4
2 G1
3 3 G2 5
1
ACES_85204-03001 Security Classification Compal Secret Data Compal Electronics, Inc.
C311 CONN@ Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
2
100P_0402_50V8J
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Pineview(1/3)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Friday, July 02, 2010 Sheet 4 of 39
5 4 3 2 1
5 4 3 2 1

PINEVIEW_M R249 be placed <750 mils to U71.M30


U71C R247 be placed <750 mils to U71.M29

T2 D12 XDP_RSVD_00 REV = 1.1


T12 A7 M30 R249 1 2 10_0402_5%
XDP_RSVD_01 CRT_HSYNC GMCH_CRT_HSYNC (10)
T3 D6 M29 R247 1 2 10_0402_5% U71D PINEVIEW_M
XDP_RSVD_02 CRT_VSYNC GMCH_CRT_VSYNC (10)
T4 C5 XDP_RSVD_03
T13 C7 XDP_RSVD_04
C6 N31 GMCH_CRT_R REV = 1.1
D T5 GMCH_CRT_R (10) H_SMI# D
XDP_RSVD_05 CRT_RED GMCH_CRT_G (9) LVDS_ACLK# U25 E7 H_SMI# (11)
T6 D8 P30 GMCH_CRT_G (10) LA_CLKN SMI# H_A20M#
XDP_RSVD_06 CRT_GREEN GMCH_CRT_B (9) LVDS_ACLK U26 H7 H_A20M# (11)
T7 B7 P29 GMCH_CRT_B (10) LA_CLKP A20M# H_FERR#
XDP_RSVD_07 CRT_BLUE (9) LVDS_A0# R23 H6 H_FERR# (11)
T14 A9 N30 LA_DATAN_0 FERR# H_INTR
XDP_RSVD_09 D9 XDP_RSVD_08 CRT_IRTN (9) LVDS_A0 R24 F10 H_INTR (11)

VGA
LA_DATAP_0 LINT0 H_NMI
XDP_RSVD_09 (9) LVDS_A1# N26 F11 H_NMI (11)
T8 C8 LA_DATAN_1 LINT1 H_IGNNE#
XDP_RSVD_10 (9) LVDS_A1 N27 E5
T15 B8 XDP_RSVD_11
R201 be placed <500 mils to U71.P28 LA_DATAP_1 IGNNE# H_STPCLK#
H_IGNNE# (11)
(9) LVDS_A2# R26 LA_DATAN_2 STPCLK# F8 H_STPCLK# (11)
T9 C10 XDP_RSVD_12 CRT_DDC_DATA L31 GMCH_CRT_DATA (10)

ICH
(9) LVDS_A2 R27 LA_DATAP_2
T16 D10 XDP_RSVD_13 CRT_DDC_CLK L30 GMCH_CRT_CLK (10)
T10 B11 XDP_RSVD_14
R151 be placed U71.R22 H_DPRSTP#
R201 665_0402_1% DPRSTP# G6 H_DPRSTP# (13)
T17 B10 XDP_RSVD_15 DAC_IREF P28 R151 H_DPSLP#
R22 LIBG DPSLP# G10 H_DPSLP# (13)
T11 B12 XDP_RSVD_16 2.37K_0402_1% H_INIT#
CPU_DREFCLK J28 LVBG INIT# G8 H_INIT# (11)
T28 C11 XDP_RSVD_17 REFCLKINP Y30 CPU_DREFCLK (8) XDP_PRDY#
CPU_DREFCLK# N22 LVREFH PRDY# E11 XDP_PRDY# (4)
REFCLKINN Y29 CPU_DREFCLK# (8) XDP_PREQ#
CPU_SSCDREFCLK N23 LVREFL PREQ# F15 XDP_PREQ# (4)
REFSSCLKINP AA30 CPU_SSCDREFCLK (8) GMCH_ENBKL
CPU_SSCDREFCLK# (24) GMCH_ENBKL L27 LBKLT_EN
AA31

LVDS
REFSSCLKINN CPU_SSCDREFCLK# (8) (9) DPST_PW M L26 LBKLT_CTL H_THERMTRIP#
L23 LCTLA_CLK THERMTRIP# E13 H_THERMTRIP# (11)
T37 L11 RSVD K25 LCTLB_DATA
(9) LVDS_SCL K23 LDDC_CLK
0_0402_5% (9) LVDS_SDA K24
XDP_RSVD_09 LDDC_DATA
R200 H26
K29 PM_EXTTS#1 (9) GMCH_ENVDD LVDD_EN
PM_EXTTS#_1/DPRSLPVR PM_DPRSLPVR (13) H_PROCHOT#
2

PM_EXTTS#0 PROCHOT# C18


PM_EXTTS#_0 J30 PM_EXTTS#0 (7) H_PW RGD
R1378 H_PW ROK CPUPWRGOOD W1 H_PW RGD (4,13)
PWROK L5
1K_0402_5% AA3 PLTRST#
RSTIN# PLTRST# (4,13,16,17,18,24,26)

H_GTLREF
1

CLK_CPU_HPLCLK# GTLREF A13


HPL_CLKINN W8 CLK_CPU_HPLCLK# (8)
CLK_CPU_HPLCLK VSS H27
HPL_CLKINP W9 CLK_CPU_HPLCLK (8)
C C
AA7 Modify 08/04
MISC

T18 RSVD_TP
T19 AA6 RSVD_TP
RSVD L6
T20 R5 RSVD_TP
RSVD E17
T21 R6 RSVD_TP (4) XDP_BPM#0 G11 BPM_1_0#
E15 H10 CLK_CPU_BCLK#
T22 AA21 @ (4) XDP_BPM#1 BPM_1_1# BCLKN CLK_CPU_BCLK# (8)
RSVD_TP R305 G13 J10 CLK_CPU_BCLK
T23 W21 H_PW ROK 1 2 (4) XDP_BPM#2 BPM_1_2# BCLKP CLK_CPU_BCLK (8)
RSVD_TP VGATE (8,13,24,35) F13
T24 T21 (4) XDP_BPM#3 BPM_1_3#
RSVD_TP 0_0402_5% K5 CPU_BSEL0
T25 V21 BSEL_0 CPU_BSEL0 (8)
RSVD_TP R306 T48 B18 H5 CPU_BSEL1
1 2 BPM_2_0#/RSVD BSEL_1 CPU_BSEL1 (8)
EC_PW ROK (13,24) T49 B20 K6 CPU_BSEL2
BPM_2_1#/RSVD BSEL_2 CPU_BSEL2 (8)
0_0402_5%

CPU
T50 C20 BPM_2_2#/RSVD
T51 B21 H30 CPU_VID0
BPM_2_3#/RSVD VID_0 CPU_VID0 (35)
H29 CPU_VID1
VID_1 CPU_VID1 (35)
H28 CPU_VID2
VID_2 CPU_VID2 (35)
G30 CPU_VID3
VID_3 CPU_VID3 (35)
T55 G5 G29 CPU_VID4
RSVD VID_4 CPU_VID4 (35)
XDP_TDI D14 F29 CPU_VID5
(4) XDP_TDI TDI VID_5 CPU_VID5 (35)
XDP_TDO D13 E29 CPU_VID6
To be placed <250 mils to U71 ball (4) XDP_TDO
XDP_TCK TDO VID_6 CPU_VID6 (35)
(4) XDP_TCK B14 TCK
XDP_TMS C14 L7
(4) XDP_TMS TMS RSVD
R307 XDP_TRST# C16 D20
GMCH_CRT_R 1 2 (4) XDP_TRST# TRST# RSVD
150_0402_1% RSVD H13
GMCH_CRT_G D18
1 R308 2 H_THERMDA RSVD
150_0402_1% D30 THRMDA_1
H_THERMDC E30 K9 T26
GMCH_CRT_B 1 R309 2 THRMDC_1 RSVD_TP
150_0402_1% RSVD_TP D19 T27
K7 H_EXTBGREF
EXTBGREF
B XDP_TCK B
T58
GMCH_ENBKL R34
100K_0402_5% T59 XDP_TDI
3 OF 6

PINEVIEW-M_FCBGA8559 H_SMI# T60 XDP_TDO


C30 THRMDA_2/RSVD
1 D31
To be placed <500 mils to U71 ball T61 XDP_TMS THRMDC_2/RSVD
C1171
XDP_TRST# 4 OF 6
470P_0402_50V7K T62
2 PINEVIEW-M_FCBGA8559

T63 H_PW RGD


+VCCP
+VCCP
H_THERMDA, H_THERMDC routing together. Add 470PF on H_SMI# for known issue 07/08
Trace width / Spacing = 10 / 10 mil
R244
R144
+VCCP 976_0402_1%
1K_0402_1%
+3VS
+3VS H_EXTBGREF
CPU THERMAL SENSOR H_GTLREF
1

R202

1U_0603_10V6K

1U_0603_10V6K
R143 68_0402_5% 1 1 R156

C939

C940
1 10K_0402_5% R155
0.1U_0402_16V4Z

3.3K_0402_1%
2K_0402_1%
C80 H_PROCHOT#
2

U2 PM_EXTTS#0 2 2
2
A
1 8 EC_SMB_CK2
Close to Processor Close to Processor placed within 0.5" of processor placed within 0.5" of processor
A
VDD SMCLK EC_SMB_CK2 (24,26)
H_THERMDA EC_SMB_DA2
pin pin pin and 5 mils spacing. pin and 5 mils spacing.
2 DP SMDATA 7 EC_SMB_DA2 (24,26)
C79
1 2 H_THERMDC 3 6 2 R58 1 +3VS
2200P_0402_50V7K DN ALERT# 10K_0402_5%
4 5
Security Classification Compal Secret Data Compal Electronics, Inc.
THERM# GND
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Pineview(2/3)
EMC1402-1-ACZL-TR MSOP 8P SENSOR Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Address:100_1100 B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 5 of 39
5 4 3 2 1
5 4 3 2 1

U71F PINEVIEW_M

U71E +CPU_CORE A11 REV = 1.1


F24
GFX supply current: 1.38A PINEVIEW_M A16
VSS VSS
F28
1U_0402_6.3V6K 1U_0402_6.3V6K VSS VSS
Sustained GFX supply current: 1.05A VCC
A23 A19
VSS VSS
F4
VCC A25 A29 RSVD_NCTF VSS G15
+0.89V REV = 1.1
A27 A3 G17
VCC 1 1 1 1 RSVD_NCTF VSS
B23 C428 C429 C430 C431 A30 G22
D VCC RSVD_NCTF VSS D
T13 VCCGFX VCC B24 A4 RSVD_NCTF VSS G27
T14 VCCGFX VCC B25 AA13 VSS VSS G31
T16 B26 2 2 2 2 AA14 H11
VCCGFX VCC VSS VSS
T18 B27 AA16 H15
VCCGFX VCC 1U_0402_6.3V6K VSS VSS
T19 C24 1U_0402_6.3V6K AA18 H2
VCCGFX VCC VSS VSS
V13 VCCGFX VCC C26 AA2 VSS VSS H21
V19
VCCGFX VCC
D23 Please closed U71 AA22
VSS VSS
H25
W14 VCCGFX VCC D24 AA25 VSS VSS H8
W16 VCCGFX VCC D26 AA26 VSS VSS J11
W18 D28 AA29 J13
VCCGFX VCC VSS VSS

GFX/MCH
W19 VCCGFX VCC E22 AA8 VSS VSS J15
VCC
E24
+CPU_CORE
Change from SGA20331D20 to SGA20331E10 060810 AB19
VSS VSS
J4
E27 AB21 K11

CPU
VCC VSS VSS
VCC
F21 2 x 330uF(9mohm/2) AB28
VSS VSS
K13
F22 AB29 K19
VCC VSS VSS
F25 1 1 AB30 K26
VCC VSS VSS
VCC G19 +VCCP AC10 VSS VSS K27
G21 + C275 + C278 AC11 K28
VCC VSS VSS
VCC G24 AC19 VSS VSS K30
H17 330U 2.5V Y 330U 2.5V Y AC2 K4
DDR supply current 2.27A

GND
VCC 2 2 VSS VSS
H19 R20 AC21 K8
VCC +RING_EAST VSS VSS
H22 1 2 AC28 L1
+1.8V VCC VSS VSS
VCC H24 0_0603_5% 1 AC30 VSS VSS L13
2.2U_0603_10V6K2.2U_0603_10V6K VCC J17 AD26 VSS VSS L18
AK13 J19 C242 AD5 L22
VCCSM VCC 1U_0603_10V6K VSS VSS
AK19 VCCSM VCC J21 AE1 VSS VSS L24
AK9 J22 +CPU_CORE 2 AE11 L25
2 2 2 2 VCCSM VCC VSS VSS
AL11 K15 AE13 L29
C188 C187 C186 C85 VCCSM VCC VSS VSS
AL16 VCCSM VCC K17 R21 AE15 VSS VSS M28
AL21 VCCSM VCC K21 AE17 VSS VSS M3
1 1 1 1 +RING_WEST
2.2U_0603_10V6K 2.2U_0603_10V6K AL25 L14 1 1 1 1 2 AE22 N1
+1.8V VCCSM VCC C1154 C1152 C1153 VSS VSS
L16 0_0603_5% 1 1 AE31 N13
C VCC VSS VSS C
VCC L19 AF11 VSS VSS N18

22UF 6.3V M X5R 0805

22UF 6.3V M X5R 0805

22UF 6.3V M X5R 0805


L21 C64 C241 AF17 N24
VCC 2 2 2 1U_0603_10V6K 1U_0603_10V6K VSS VSS
N14 AF21 N25
VCC 2 2 VSS VSS
VCC N16 AF24 VSS VSS N28
22UF 6.3V M X5R 0805

AK7 VCCCK_DDR VCC N19 AF28 VSS VSS N4


1 AL7 N21 AG10 N5
+VCCP VCCCK_DDR VCC VSS VSS
R28 AG3 N8
DDR analog supply current: 1.32A VSS VSS
C267

1 2 +VCC_DMI AH18 P13


0_0805_5% VSS VSS
U10 VCCA_DDR 1 1 AH23 VSS VSS P14
2
DDR

U5 1U_0603_10V6K AH28 P16


VCCA_DDR C68 C237 VSS VSS
1 1 1 U6 VCCA_DDR AH4 VSS VSS P18
U7 1U_0603_10V6K AH6 P19
C55 C243 C236 VCCA_DDR 2 2 VSS VSS
POWER

U8 VCCA_DDR AH8 VSS VSS P21


U9 AJ1 P3
2 2 2 VCCA_DDR RSVD_NCTF VSS
1U_0603_10V6K
4.7U_0603_6.3V6K
22UF 6.3V M X5R 0805

V2 AJ16 P4
VCCA_DDR VSS VSS
V3 AJ31 R25
VCCA_DDR RSVD_NCTF VSS
V4 AK1 R7
VCCA_DDR RSVD_NCTF VSS
W10 AK2 R8
VCCA_DDR RSVD_NCTF VSS
W11 AK23 T11
VCCA_DDR VCCSENSE VSS VSS
VCCSENSE C29 VCCSENSE (35) AK30 RSVD_NCTF VSS U22
AA10 B29 VSSSENSE AK31 U23
VCCACK_DDR VSSSENSE VSSSENSE (35) RSVD_NCTF VSS
AA11 Y2 +1.5VS AL13 U24
VCCACK_DDR VCCA VSS VSS
+VCCPProcessor 1
Core analog supply current: 0.08A +CPU_CORE AL19 U27
VSS VSS
AL2 V14
RSVD_NCTF VSS
C243 to closed U71.U10 C391 R32 AL23
VSS VSS
V16
D4 VCCSENSE 1 2 AL29 V18
VCCP 2 0.01U_0402_16V7K RSVD_NCTF VSS
1 100_0402_1% AL3 RSVD_NCTF VSS V28
VCCP
B4 C1161 Please closed U71.Y2 AL30
RSVD_NCTF VSS
V29
B3 VSSSENSE R31 AL9 W13
Display PLL SFR and CRT DAC supply VCCP 0.1U_0402_10V6K 1 2 VSS VSS
100_0402_1% B13 W2
2 VSS VSS
current: 0.154A AA19 B16 W23
VCCD_AB_DPL VSS VSS
B19 W25
B VSS VSS B
B22 VSS VSS W26
B30 RSVD_NCTF VSS W28
+1.8VS change to 0402 size V11 Please closed U71.D4 B31 W30
VCCD_HMPLL RSVD_NCTF VSS
B5 W4
1U_0402_6.3V6K

1U_0402_6.3V6K

R321 VSS VSS


B9 W5
+1.8VS VSS VSS
2 1 AC31 C1 W6
VCCSFR_AB_DPL +VCC_ALVD RSVD_NCTF VSS
1 1 V30 C12 W7
0_0603_5% VCCALVDS +VCC_DLVD VSS VSS
W31 C21 Y28
C192

C189

VCCDLVDS R25 VSS VSS


LVDS supply current: 0.06A C22 Y3
+VCC_CRT_DAC VSS VSS
1 2 C25 Y4
LVDS

2 2 +VCC_CRT_DAC T30 MBK1608601YZF_2P 1 VSS VSS


VCCACRTDAC C31 RSVD_NCTF
EXP\CRT\PLL

D22
+3VS C239 VSS
E1 RSVD_NCTF
22UF 6.3V M X5R 0805 E10
GIO supply current: 0.006A T31 T1 +VCC_DMI 2 Change 22uF 0805 061010 E19
VSS
+RING_EAST VCC_GIO VCCA_DMI VSS
J31 T2 DMI analog supply current: 0.48A +DMI_HMPLL E21
+RING_WEST VCCRING_EAST VCCA_DMI 1 R18 2 VSS
C3 T3 E25 T29
DMI

VCCRING_WEST VCCA_DMI 0_0603_5% 1 VSS VSS


B2 E8
VCCRING_WEST VSS
C2 P2 T56 C69 F17
VCCRING_WEST RSVD +DMI_HMPLL VSS
+VCCP A21 AA1 1U_0603_10V6K F19
VCC_LGI VCCSFR_DMIHMPLL VSS
1 SFR & DMIHMPLL supply current: 0.104A 2
0.1U_0402_10V6K

C1160 E2 +VCCP R26 6 OF 6


VCCP +VCC_ALVD
DAC, GIO, LVDS, & LGIO, DPLL, HMPLL 1 1 2 PINEVIEW-M_FCBGA8559
supply current: 0.33A C1162 1 100NH +-5% LL1608-FSLR10J 1
@ 2
5 OF 6 0.1U_0402_10V6K C1155 C56
2 1U_0603_10V6K 22UF 6.3V M X5R 0805 H1.25
PINEVIEW-M_FCBGA8559
2 2
+0.89V

R27
1 2 +VCC_DLVD
0_0603_5% 1
A A
10U_0805_10V4Z
0.1U_0402_10V6K
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
2.2U_0603_10V6K

1 C235
2
C74

C81

C70

C76

C75

C78

C77

1
C71

2 1 1 1 1 1 1 1
C1223

1U_0603_10V6K
C1224

+ C1225 2
330U_B2_2.5VM_R15M
1 2 2
1 2 2 2 2 2 2 2

@ Security Classification Compal Secret Data Compal Electronics, Inc.


Modify to 2.2U 05/11
Close Chipset pin Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Pineview(3/3)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 6 of 39
5 4 3 2 1
5 4 3 2 1

+1.8V +1.8V
09/03 CONN@
JDIM1
Change to SP07F001720 04/30
20mils
(4) DDR_A_DQS#[0..7] +DIMM_VREF 1 VREF VSS 2
3 4 DDR_A_D4
+1.8V DDR_A_D0 VSS DQ4 DDR_A_D5
(4) DDR_A_D[0..63] 1 1 5 DQ0 DQ5 6
C111 C112 DDR_A_D1 7 8
DQ1 VSS DDR_A_DM0
(4) DDR_A_DM[0..7] 9 VSS DM0 10

1
0.1U_0402_16V4Z 2.2U 6.3V M X5R 0402 DDR_A_DQS#0 11 12
2 2 DDR_A_DQS0 DQS0# VSS DDR_A_D6
(4) DDR_A_DQS[0..7] Layout Note: R61 13
DQS0 DQ6
14
15 16 DDR_A_D7
Place near JDIM1 1K_0402_1% DDR_A_D2 17
VSS DQ7
18
(4) DDR_A_MA[0..14] DQ2 VSS
DDR_A_D3 19 20 DDR_A_D12

2
DQ3 DQ12 DDR_A_D13
+DIMM_VREF 21 22
DDR_A_D8 VSS DQ13
23 DQ8 VSS 24

1
D DDR_A_D9 DDR_A_DM1 D
25 DQ9 DM1 26
R62 Share +DIMM_VREF for 27 VSS VSS 28
DDR_A_DQS#1 29 30 M_CLK_DDR0
1.DDRII VREF DQS1# CK0 M_CLK_DDR0 (4)
1K_0402_1% DDR_A_DQS1 31 32 M_CLK_DDR#0 M_CLK_DDR#0 (4)
DQS1 CK0#
+1.8V 2.GMCH SM_VREF_0 33 34

2
DDR_A_D10 VSS VSS DDR_A_D14
SM_VREF_1 35 DQ10 DQ14 36
DDR_A_D11 37 38 DDR_A_D15
DQ11 DQ15
39 VSS VSS 40
2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z
2 2 2 2 2
41 VSS VSS 42
C128

C129

C110

C109

C130
DDR_A_D16 43 44 DDR_A_D20
DDR_A_D17 DQ16 DQ20 DDR_A_D21
45 DQ17 DQ21 46
1 1 1 1 1 47 48
DDR_A_DQS#2 VSS VSS R64
49 50 1 2 PM_EXTTS#0 (5)
DDR_A_DQS2 DQS2# NC DDR_A_DM2 0_0402_5%
51 52
DQS2 DM2
53 VSS VSS 54
DDR_A_D18 55 56 DDR_A_D22
DDR_A_D19 DQ18 DQ22 DDR_A_D23
57 DQ19 DQ23 58
59 60
VSS VSS
220U_B2_2.5VM_R35

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1 DDR_A_D24 61 62 DDR_A_D28
DDR_A_D25 DQ24 DQ28 DDR_A_D29
1 1 1 1 63 64
+ DQ25 DQ29
65 VSS VSS 66
C94

C106

C105

C108

C107

@ DDR_A_DM3 67 68 DDR_A_DQS#3
DM3 DQS3# DDR_A_DQS3
69 70
2 2 2 2 2 NC DQS3
71 VSS VSS 72
DDR_A_D26 73 74 DDR_A_D30
DDR_A_D27 DQ26 DQ30 DDR_A_D31
75 76
DQ27 DQ31
77 VSS VSS 78
DDR_CKE0 79 80 DDR_CKE1
(4) DDR_CKE0 CKE0 NC/CKE1 DDR_CKE1 (4)
81 82
VDD VDD
83 84
C DDR_A_BS2 NC NC/A15 DDR_A_MA14 C
(4) DDR_A_BS2 85 BA2 NC/A14 86
87 88
DDR_A_MA12 VDD VDD DDR_A_MA11
89 90
DDR_A_MA9 A12 A11 DDR_A_MA7
91 A9 A7 92
DDR_A_MA8 93 94 DDR_A_MA6
A8 A6
95 96
DDR_A_MA5 VDD VDD DDR_A_MA4
97 A5 A4 98
Layout Note: DDR_A_MA3 99 100 DDR_A_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0
101 102
Place one cap close to every 2 pullup 103
A1 A0
104
VDD VDD
resistors terminated to +0.9VS DDR_A_MA10 105 A10/AP BA1 106 DDR_A_BS1
DDR_A_BS1 (4)
DDR_A_BS0 107 108 DDR_A_RAS#
(4) DDR_A_BS0 BA0 RAS# DDR_A_RAS# (4)
DDR_A_WE# 109 110 DDR_CS#0
(4) DDR_A_WE# WE# S0# DDR_CS#0 (4)
111 112
DDR_A_CAS# VDD VDD M_ODT0
(4) DDR_A_CAS# 113 114 M_ODT0 (4)
DDR_CS#1 CAS# ODT0 DDR_A_MA13
(4) DDR_CS#1 115 116
NC/S1# NC/A13
117 118
M_ODT1 VDD VDD
(4) M_ODT1 119 120
NC/ODT1 NC
121 122
+0.9VS DDR_A_D32 VSS VSS DDR_A_D36
123 DQ32 DQ36 124
DDR_A_D33 125 126 DDR_A_D37
DQ33 DQ37
127 128
DDR_A_DQS#4 VSS VSS DDR_A_DM4
129 130
DDR_A_DQS4 DQS4# DM4
131 132
DQS4 VSS DDR_A_D38
133 134
DDR_A_D34 VSS DQ38 DDR_A_D39
135 136

0.1U_0402_16V4Z
0.1U_0402_16V4Z
DQ34 DQ39
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_A_D35 137 138


1 1 1 1 1 1 1 1 DQ35 VSS DDR_A_D44
1 1 1 1 1 1 1 1 1 1 1 1 1 139 140
DDR_A_D40 VSS DQ44 DDR_A_D45
141 142

C445

C446
C439

C440

C441

C442

C443

C444 DQ40 DQ45


C119

C117

C86

C121

C87

C88

C122

C115

C91

C90

C120

C118

C89

DDR_A_D41 143 144


DQ41 VSS DDR_A_DQS#5
2 2 2 2 2 2 2 2 145 146
2 2 2 2 2 2 2 2 2 2 2 2 2 DDR_A_DM5 VSS DQS5# DDR_A_DQS5
147 148
B DM5 DQS5 B
149 VSS VSS 150
DDR_A_D42 151 152 DDR_A_D46
DDR_A_D43 DQ42 DQ46 DDR_A_D47
153 154
DQ43 DQ47
155 VSS VSS 156
DDR_A_D48 157 158 DDR_A_D52
DDR_A_D49 DQ48 DQ52 DDR_A_D53
159 160
DQ49 DQ53
161 162
VSS VSS M_CLK_DDR1
163 164 M_CLK_DDR1 (4)
NC,TEST CK1 M_CLK_DDR#1
165 166 M_CLK_DDR#1 (4)
DDR_A_DQS#6 VSS CK1#
167 DQS6# VSS 168
DDR_A_DQS6 169 170 DDR_A_DM6
DQS6 DM6
171 172
+0.9VS DDR_A_D50 VSS VSS DDR_A_D54
173 DQ50 DQ54 174
RP6 RP5 DDR_A_D51 175 176 DDR_A_D55
DDR_A_MA13 1 8 8 1 DDR_A_BS1 DQ51 DQ55
177 VSS VSS 178
M_ODT0 2 7 7 2 DDR_A_MA0 DDR_A_D56 179 180 DDR_A_D60
DDR_CS#0 DDR_A_MA2 DDR_A_D57 DQ56 DQ60 DDR_A_D61
3 6 6 3 181 182
DDR_A_RAS# DDR_A_MA4 DQ57 DQ61
4 5 5 4 183 184
Layout Note: DDR_A_DM7 VSS VSS DDR_A_DQS#7
185 186
47_0804_8P4R_5% 47_0804_8P4R_5% DM7 DQS7# DDR_A_DQS7
Place these resistor 187 188
RP2 RP4 DDR_A_D58 VSS DQS7
closely DIMMA,all 189 190
DDR_A_BS0 DDR_A_MA6 DDR_A_D59 DQ58 VSS DDR_A_D62
1 8 8 1 191 192
DDR_A_MA10 DDR_A_MA7 trace length<750 mil DQ59 DQ62 DDR_A_D63
2 7 7 2 193 194
DDR_A_MA1 3 6 6 3 DDR_A_MA11 CLK_SMBDATA VSS DQ63
(8,17,18,26) CLK_SMBDATA 195 SDA VSS 196
DDR_A_MA3 4 5 5 4 DDR_A_MA14 CLK_SMBCLK 197 198 R66 1 2 10K_0402_5%
(8,17,18,26) CLK_SMBCLK SCL SA0
+3VS 199 200 R65 1 2 10K_0402_5%
VDDSPD SA1
0.1U_0402_16V4Z

47_0804_8P4R_5% 47_0804_8P4R_5%
0.1U_0402_16V4Z

RP3 RP1 1 201 202


1 G1 G2
M_ODT1 1 8 8 1 DDR_A_MA5 C116 C141
DDR_CS#1 2 7 7 2 DDR_A_MA8 Follow Intel Layout checklist, add C141 05/12
DDR_A_CAS# 3 6 6 3 DDR_A_MA9 FOX_AS0A426-N4RN-7F
DDR_A_WE# 4 2 2
5 5 4 DDR_A_MA12
A
47_0804_8P4R_5% 47_0804_8P4R_5%
DIMMA A

DDR_CKE1 1 R163 2
47_0402_5% Layout Note:
DDR_A_BS2 1 R60 2 Place these resistor
Security Classification Compal Secret Data Compal Electronics, Inc.
47_0402_5%
closely DIMMA,all Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
DDR_CKE0 1 R59 2
47_0402_5% trace length
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII-SODIMMA
Max=1.3" Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 7 of 39
5 4 3 2 1
5 4 3 2 1
Change C174 C175 to 10U_0603 05/14
+3VM_CK505
FSC FSB FSA CPU SRC PCI REF DOT_96 USB +3VS

CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz +3VS 1
R1370_0603_5%
2
1 1 1 1 1
C174 C172 C138 C148 R72 R91
0 0 0 266 100 33.3 14.318 96.0 48.0 C1145
10U_0603_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2.2K_0402_5% 2.2K_0402_5%
2 47P_0402_50V8J 2 2 2 0.1U_0402_16V4Z 2 2N7002DW-T/R7_SOT363-6
0 0 1 133 100 33.3 14.318 96.0 48.0 Q10A
+1.05VM_CK505 CLK_SMBDATA
(13) PCH_SMBDATA 6 1
0 1 0 200 100 33.3 14.318 96.0 48.0 R138
+VCCP 1 2
0_0603_5% 1 1 1 1 1 1

2
0 1 1 166 100 33.3 14.318 96.0 48.0 1 C139 C167 C137 C146 C165 +3VS
D C1146 C175 D

5
47P_0402_50V8J 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 10U_0603_6.3V6M 2 2 2 2 2
1 0 0 333 100 33.3 14.318 96.0 48.0 2
(13) PCH_SMBCLK 3 4 CLK_SMBCLK

1 0 1 100 100 33.3 14.318 96.0 48.0 Q10B


Add C1145 C1146 C1147 for EMI 06/12 2N7002DW-T/R7_SOT363-6
1 1 0 400 100 33.3 14.318 96.0 48.0

1 1 1 Reserved Low Power (Silego : SA00003H730)


IDT SA00003H610
Change co-lay net name to +1.5VM_CK505 07/03
+3VS
+3VS 1 @ 2
R1348 0_0603_5%
+3VM_CK505 U4
2

9 CLK_SMBDATA
R435 +1.5VM_CK505 SDA CLK_SMBDATA (7,17,18,26)
+1.5VS 1
R1349
2
0_0603_5%
55
VDD_SRC
SCL
10 CLK_SMBCLK
CLK_SMBCLK (7,17,18,26)
SRC PORT LIST
10K_0402_5% 0.1U_0402_16V4Z 6
VDD_REF
1 1 1 1 1
1

CLK_EN 47P_0402_50V8J C1119 C140 C160 C169 12 71 CLK_CPU_BCLK


VDD_PCI CPU_0 CLK_CPU_BCLK (5)
C1147
PORT DEVICE
1

10U_0603_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z 72 70 CLK_CPU_BCLK#


2 2 2 2 2 VDD_CPU CPU_0# CLK_CPU_BCLK# (5)
Q31
19
VDD_48 CPU_1
68 CLK_CPU_HPLCLK
CLK_CPU_HPLCLK (5) SRC1 CPU_SSCDREFCLK
CLK_CPU_HPLCLK#
(35) CLK_ENABLE# 2 27 VDD_PLL3 CPU_1# 67 CLK_CPU_HPLCLK# (5) SRC2
DTC115EUA_SC70-3 R1350 0_0402_5% +1.05VM_CK505 66 24 CPU_DREFCLK
CPU_DREFCLK (5)
SRC3
C VDD_CPU_IO SRC_0/DOT_96 C
Rename 06/06 +VCCP 1 @ 2
SRC4 PCIE_WLAN
3

31 25 CPU_DREFCLK#
VDD_PLL3_IO SRC_0#/DOT_96# CPU_DREFCLK# (5)
R1351
1
0_0402_5%
2 62
SRC6 PCIE_SATA
+1.5VS VDD_SRC_IO CPU_SSCDREFCLK
+VCCP
1
52
LCDCLK/27M
28 CPU_SSCDREFCLK (5) SRC7 PCIE_PCH
C173 VDD_SRC_IO CPU_SSCDREFCLK#
@ 0.1U_0402_16V4Z 23
LCDCLK#/27M_SS
29 CPU_SSCDREFCLK# (5) SRC8 CPU_ITP
VDD_IO
1

Change C1350 C1351 to 0402 type 06/24 C386 10P_0402_50V8J 2


R68 @ 1 2 38 32
SRC9 CLK_CPU_EXP
VDD_SRC_IO SRC_2
R76 470_0402_5% CLK_48M_CR 1 R74 2 @ 33
SRC10 PCIE_LAN
2.2K_0402_5% (22) CLK_48M_CR 22_0402_5% SRC_2#
SRC11 PCIE_WWAN
2

FSA 2 1 1 R75 2 FSA 20


(12) CLK_PCH_48M 33_0402_5% USB_0/FS_A
35
FSB SRC_3
(5) CPU_BSEL0 1 2 2
R69 FS_B/TEST_MODE
36
SRC_3#
0_0402_5% 1 R104 2 FSC 7
REF_0/FS_C/TEST_
1

(13) CLK_PCH_14M 1 2 33_0402_5%


R73 C390 10P_0402_50V8J 8 39 CLK_PCIE_WLAN
REF_1 SRC_4 CLK_PCIE_WLAN (18)
CLK_EN
1K_0402_5% 40 CLK_PCIE_WLAN#
SRC_4# CLK_PCIE_WLAN# (18)
@ 1 2 1
2

(5,13,24,35) VGATE R371 CKPWRGD/PD#


0_0402_5% 11 57 CLK_PCIE_SATA
NC SRC_6 CLK_PCIE_SATA (11)
@
56 CLK_PCIE_SATA#
+VCCP SRC_6# CLK_PCIE_SATA# (11)
53
(13) H_STP_CPU# CPU_STOP# CLK_PCIE_PCH
SRC_7
61 CLK_PCIE_PCH (12) Modify CLK SRC Port list 05/12
1

@ 54
Add 1K follow R113 (13) H_STP_PCI# PCI_STOP# CLK_PCIE_PCH#
60 CLK_PCIE_PCH# (12)
Intel check list 05/11 SRC_7#
470_0402_5% CLK_XTAL_IN 5 XTAL_IN
B R52 1K_0402_1% 64 CPU_ITP (4) B
2

CLK_XTAL_OUT SRC_8/CPU_ITP
FSB 1 2 4
XTAL_OUT
63 CPU_ITP# (4)
SRC_8#/CPU_ITP# +3VS
(5) CPU_BSEL1 1 2
R119
0_0402_5% 13 44 CLK_CPU_EXP
PCI_1 SRC_9 CLK_CPU_EXP (4)
1

R86
R110 PCI2_TME 14 45 CLK_CPU_EXP#
PCI_2 SRC_9# CLK_CPU_EXP# (4)
@ WLAN_CLKREQ# R121 2 1 10K_0402_5%
0_0402_5% CLK_PCI_TPM 1 R1487 2 TPM@ 15
(26) CLK_PCI_TPM PCI_3 CLK_PCIE_LAN
22_0402_5% 50 LAN_CLKREQ# R1449 2 1 10K_0402_5%
CLK_PCIE_LAN (16)
2

R86 PCI4_SEL SRC_10


(24) CLK_PCI_LPC 1 2 16
33_0402_5% PCI_4/SEL_LCDCL CLK_PCIE_LAN# R107 2
51 CLK_PCIE_LAN# (16)
WWAN_CLKREQ# 1 10K_0402_5%
R80 ITP_EN SRC_10#
TPM@ (11) CLK_PCI_PCH 1 2 17
+VCCP PCIF_5/ITP_EN
27P_0402_50V8J

27P_0402_50V8J

33_0402_5%
CLK_PCIE_WWAN
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP# C389
1 1
C388 SRC_11
48 CLK_PCIE_WWAN (17)
REQ PORT LIST
1

18 47 CLK_PCIE_WWAN#
VSS_PCI SRC_11# CLK_PCIE_WWAN# (17)
R92 @ For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# 2 2
R98 470_0402_5% Pin28/29 : LCDCLK / LCDCLK# 3
VSS_REF PORT DEVICE
10K_0402_5% 1 = Pin24/25 : SRC_0 / SRC_0# 22 37
2

VSS_48 CLKREQ_3#
FSC 2 1
Pin28/29 : 27M/27M_SS 26 41 WLAN_CLKREQ#
Add WWAN_CLKREQ# 05/04
REQ_3#
VSS_IO CLKREQ_4# WLAN_CLKREQ# (18)
(5) CPU_BSEL2 1
R84
2
For PCI2_TME:0=Overclocking of CPU and SRC allowed 69 58
REQ_4# PCIE_WLAN
0_0402_5% VSS_CPU CLKREQ_6#
(ICS only) 1=Overclocking of CPU and SRC NOT allowed REQ_6#
1

30 65
R87 VSS_PLL3 CLKREQ_7#
@ 34 43
REQ_7#
0_0402_5% VSS_SRC CLKREQ_9#
+3VS +3VS +3VS 59 49 LAN_CLKREQ#
LAN_CLKREQ# (16)
REQ_9#
2

VSS_SRC SLKREQ_10#
42 46 WWAN_CLKREQ#
WWAN_CLKREQ# (17)
REQ_10# PCIE_LAN
VSS_SRC CLKREQ_11#
2

A
R85 R95 R71 73 21
REQ_11# PCIE_WWAN A
VSS USB_1/CLKREQ_A#
Follow Intel check list change to 27P 06/05 REQ_A#
10K_0402_5% 10K_0402_5% 10K_0402_5%
Follow Vendor check change to 22P 10/16 @ @ SLG8SP556VTR_QFN72_10X10
1

CLK_XTAL_IN ITP_EN PCI4_SEL PCI2_TME


C161 22P 50V J NPO 0402
1

Y1
2

@
14.318MHZ_16PF_7A14300083 R89 R90 R77 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/10/15 Deciphered Date 2008/10/15 Title
2

CLK_XTAL_OUT 10K_0402_5% 10K_0402_5% 10K_0402_5%


C164 22P 50V J NPO 0402 Clock Generator CK505
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Routing the trace at least 10mil 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 8 of 39
5 4 3 2 1
5 4 3 2 1

LCD POWER CIRCUIT


Change R577 to 0402 SIZE 06/16 J1

+3VS 1 2 +CAM_VCC
+LCDVDD +3VS 1 2

NTR4101PT1G 1P SOT-23-3
+LCDVDD
Q3
JUMP_43X39
W=20mils W=20mils

1
1 3 @

S
R577 +3VS
D D
470_0402_5% 1

G
2
C1105 1 C1106 1 1

2
0.1U_0402_16V4Z C1107 C1113

4.7U_0603_6.3V6K
4.7U_0603_6.3V6K 0.1U_0402_16V4Z

1 +LCDVDD_R
1 2

100K_0402_5%
R578 2 2 2
C1108
0.047U_0402_16V4Z
2

1
Q4
D
2 2 1
2N7002W-T/R7_SOT323-3 G PJUSB208_SOT23-6
S3 R579 4.7K_0402_5%
Change C1106 to 4.7U_0603 05/14 USB20_N3_1 6 3
CH3 CH2

+CAM_VCC 5 Vp Vn 2

4 1 USB20_P3_1
CH4 CH1
1

Q5 D6
DTC115EUA_SC70-3
@
(5) GMCH_ENVDD 2
Add D6 05/14
2

R174
3

C 100K_0402_5% C
1

2 1
Modify 05/11 0_0402_5% R1182

@ L3
USB20_N3_1 2 1 USB20_N3
2 1 USB20_N3 (12)

USB20_P3_1 3 4 USB20_P3
3 4 USB20_P3 (12)

1 1 WCM2012F2S-900T04_0805

C1167 C1168

10P_0402_50V8J

10P_0402_50V8J
2 1
CMOS & LCD/PANEL BD. Conn. 2 2

@
0_0402_5% R1183
+3VS

Modify JLVDS1 08/04


2.2K_0402_5%

2.2K_0402_5%
2

2
R1180

R1181
Add for RF 07/02
JLVDS1
+3VS
1

1 1
USB20_P3_1
2 USB20_N3_1
camera LVDS_SCL
B 3 LVDS_SCL (5) B
4 +CAM_VCC
LVDS_SDA
5 DMIC_CLK (19) LVDS_SDA (5)
6 DMIC_DATA (19)
7 LVDS_ACLK
8 LVDS_ACLK# LVDS_ACLK (5)
9 LVDS_ACLK# (5)
10 LVDS_A2
11 LVDS_A2 (5)
LVDS_A2#
12 LVDS_A2# (5)
LVDS_PWM
13 LVDS_A1
14 LVDS_A1 (5)
LVDS_A1#
15 LVDS_A1# (5)
BKOFF# LVDS_PWM R213 1 2 DPST_PWM
16 LVDS_A0 DPST_PWM (5)
LVDS_A0 (5) @ 0_0402_5%
17 LVDS_A0#
18 LVDS_A0# (5)
R67 1 2 INVT_PWM
3119 INVT_PWM (24)
1

LVDS_SDA C1156 C1109 0_0402_5%


20 LVDS_SCL
3221 BKOFF# 220P_0402_50V7K 1000P 50V K X7R 0402
BKOFF# (24)
2

22 LVDS_PWM
3423 LVDS_PWM
24 +LCDVDD_L
+3VS For RF
3525 1 2 +LCDVDD
L2
26 FBMA-L11-201209-221LMA30T_0805
3627 (20 MIL)
+LEDVDD L1 2 1 B+
28
3329 FBMA-L11-201209-221LMA30T_0805
30 2 1
ACES_88341-3000B001 C1111 C1112
330P_0402_50V7K 100P_0402_50V8J
CONN@ 1 2
Add JLVDS.31//JLVDS.32/JLVDS.34/JLVDS.35 to GND.042910.
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS /INVERTER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 9 of 39
5 4 3 2 1
A B C D E

Close to CRT CONN for ESD, NU on 0623.

2
D18
@ D17
@

PJDLC05C_SOT23-3
1 1

PJDLC05C_SOT23-3
Modify C31- C308 C303 C307 C306 C304 BOM Structure 0615

1
L15
BK1608LL121-T_2P
1 2 RED
(5) GMCH_CRT_R
L14
BK1608LL121-T_2P
1 2 GREEN
(5) GMCH_CRT_G
L12
BK1608LL121-T_2P
1 2 BLUE
(5) GMCH_CRT_B

150_0402_1%

150_0402_1%

150_0402_1%
1

1
1 1 1
R255 R253 R250 C310 1 1 1

10P_0402_50V8J
C308 C303

10P_0402_50V8J

10P_0402_50V8J
C307 C306 C304
2 2 2 2 10P_0402_50V8J 10P_0402_50V8J 10P_0402_50V8J

2
2 2 2

+5VS JVGA_HS

1 2
C301 0.1U_0402_16V4Z JVGA_VS

1
2 U11 2

OE#
P
(5) GMCH_CRT_HSYNC 2 4
A Y

G
SN74AHCT1G125DCKR_SC70-5
3
+5VS
Place closed to chipset
1 2
C298 0.1U_0402_16V4Z

1
U10

OE#
P
(5) GMCH_CRT_VSYNC 2 4
A Y
G
SN74AHCT1G125DCKR_SC70-5
3

Add R1283 R1284


Change R247 R249 to 10 ohm
Add @ on U10 U11 C301 C298 06/08
+3VS CRT PORT
+RCRT_VCC +CRT_VDD
+CRT_VDD
+5VS 12/29
1

0.1U_0402_16V4Z
3 R248 2.2K_0402_5% 3
+3VS C142
D3 W=40mils F1
2.2K_0402_5% R245 2 1 1 2 1 2 Change JCRT1 P/N to SP010906182 06/22
1

1
2

R246 R251 RB491D_SC59-3 1.1A_6VDC_FUSE JCRT1 CONN@


6
2.2K_0402_5% 2.2K_0402_5% 11
RED 1
2

2
5

7
VGA_DDC_DAT 12
4 3 VGA_DDC_DAT GREEN 2
(5) GMCH_CRT_DATA
8
JVGA_HS 13
Q24B
2

BLUE 3
2N7002DW-T/R7_SOT363-6 9
1 6 VGA_DDC_CLK JVGA_VS 14 16
(5) GMCH_CRT_CLK
4 17
10
Q24A VGA_DDC_CLK 15
2N7002DW-T/R7_SOT363-6 5

SUYIN_070546FR015M21RZR

CRT_DET#
CRT_DET# (13)

2
R1103
100K_0402_5%
4 4

1
+CRT_VDD

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT PORT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 10 of 39
A B C D E
5 4 3 2 1

+3VS

CLK_PCI_PCH R45
SATA_LED#

1
10K_0402_5%
R336 R293
@ 33_0402_5% GATEA20
D 10K_0402_5% D
1
2

R312
SERIRQ
C432
@ 22P_0402_50V8J 10K_0402_5%
2 KB_RST# 1 R41 2
For EMI, close to TigerPoint
10K_0402_5%

+3VS U72A TGP U72C TGP

A5 PAR AD0 B22 R12 RSVD03 SATA0RXN AE6 SATA_DTX_C_IRX_N0 (15)


8.2K_0402_5% R233 PCI_DEVSEL# B15 D18 AE20 AD6 SATA_DTX_C_IRX_P0 (15)
CLK_PCI_PCH DEVSEL# AD1 RSVD04 SATA0RXP SATA_ITX_C_DRX_N0_R
(8) CLK_PCI_PCH J12 PCICLK AD2 C17 AD17 RSVD05 SATA0TXN AC7 0.01U_0402_16V7K C32 SATA_ITX_C_DRX_N0 (15)
A23 C18 AC15 AD7 SATA_ITX_C_DRX_P0_R 0.01U_0402_16V7K C31
PCI_IRDY# PCIRST# AD3 RSVD06 SATA0TXP SATA_ITX_C_DRX_P0 (15)
B7 IRDY# AD4 B17 AD18 RSVD07 SATA1RXN AE8
8.2K_0402_5% R235 C22 C19 Y12 AD8
PCI_SERR# PME# AD5 RSVD08 SATA1RXP
B11 SERR# AD6 B18 AA10 RSVD09 SATA1TXN AD9
8.2K_0402_5% R236 PCI_STOP# F14 B19 AA12 AC9
8.2K_0402_5% R229 PCI_PLOCK# STOP# AD7 RSVD10 SATA1TXP
A8 PLOCK# AD8 D16 Y10 RSVD11
8.2K_0402_5% R207 PCI_TRDY# A10 D15 AD15
8.2K_0402_5% R231 PCI_PERR# TRDY# AD9 RSVD12

SATA
D10 PERR# AD10 A13 W10 RSVD13
8.2K_0402_5% R230 PCI_FRAME# A16 E14 V12
8.2K_0402_5% R237 FRAME# AD11 RSVD14
AD12 H14 AE21 RSVD15
AD13 L14 AE18 RSVD16
AD14 J14 AD19 RSVD17
Placed within 500 mils of Tiger point chipset pin.
C A18 E10 U12 C
GNT1# AD15 RSVD18
E16 GNT2# AD16 C11 SATA_CLKN AD4 CLK_PCIE_SATA# (8)
AD17 E12 AC17 RSVD19 SATA_CLKP AC4 CLK_PCIE_SATA (8)
8.2K_0402_5% R232
G16
A20
REQ1# PCI AD18 B9
B13
AB13
AC13
RSVD20
AD11
8.2K_0402_5% R209 REQ2# AD19 RSVD21 SATARBIAS# SATARBIAS R154 24.9_0402_1%
AD20 L12 AB15 RSVD22 SATARBIAS AC11
B8 Y14 AD25 SATA_LED# SATA_LED# (23)
AD21 RSVD23 SATALED#
G14 GPIO48/STRAP1# AD22 A3
A2 GPIO17/STRAP2# AD23 B5 AB16 RSVD24
C15 GPIO22 AD24 A6 AE24 RSVD25
8.2K_0402_5% R291 C9 G12 AE23
10K_0402_5% R292 GPIO1 AD25 RSVD26
AD26 H12
R362 R363 C8
10K_0402_5% 10K_0402_5% AD27 GATEA20
AD28 D9 AA14 RSVD27 A20GATE U16 GATEA20 (24)
@ @ PCI_PIRQA# B2 C7 V14 Y20 H_A20M#
PIRQA# AD29 RSVD28 A20M# H_A20M# (5)
8.2K_0402_5% R238 PCI_PIRQB# D7 C1 Y21
8.2K_0402_5% R205 PCI_PIRQC# PIRQB# AD30 CPUSLP# H_IGNNE#
B3 PIRQC# AD31 B1 IGNNE# Y18 H_IGNNE# (5)
8.2K_0402_5% R206 PCI_PIRQD# H10 AD16 AD21 +VCCP
8.2K_0402_5% R208 PCI_PIRQE# PIRQD# RSVD29 INIT3_3V# H_INIT#
E8 PIRQE#/GPIO2 AB11 RSVD30 INIT# AC25 H_INIT# (5)
8.2K_0402_5% R210 PCI_PIRQF# D6 AB10 AB24 H_INTR
PIRQF#/GPIO3 RSVD31 INTR H_INTR (5)

HOST

1
8.2K_0402_5% R211 PCI_PIRQG# H8 H16 Y22 H_FERR#
PIRQG#/GPIO4 C/BE0# FERR# H_FERR# (5)
8.2K_0402_5% R212 PCI_PIRQH# F8 M15 +3VS R294 8.2K_0402_5% AD23 T17 H_NMI R164
PIRQH#/GPIO5 C/BE1# GPIO36 NMI H_NMI (5)
8.2K_0402_5% R204 C13 AC21 KB_RST# KB_RST# (24)
C/BE2# RCIN# SERIRQ 56_0402_5%
D11 STRAP0# C/BE3# L16 SERIRQ AA16 SERIRQ (24,26)
K9 AA21 H_SMI#
H_SMI# (5)

2
8.2K_0402_5% R364 RSVD01 SMI# H_STPCLK#
M13 RSVD02 STPCLK# V18 H_STPCLK# (5)
8.2K_0402_5% R365
1
R294 be placed <200 mils to U72.AD23 THRMTRIP# AA20 H_THERMTRIP# (5)
R366
10K_0402_5% TIGERPOINT_ES1_BGA360 R164 has to be within 1" from the
B @ B
Tiger Point chipset.
3

TIGERPOINT_ES1_BGA360

G SENSOR@ R1472
1 2 PCI_PIRQE#
(26) G_SENSOR_INT#
0_0402_5%
ESD request
+VCCP H_A20M# C450 @
1 2 100P_0402_50V8J

H_IGNNE# C451 @
1 2 100P_0402_50V8J
R198 H_INIT# C452 @
1 2 100P_0402_50V8J
56_0402_5%
STRAP2# STRAP1# Boot BIOS H_INTR C453 @
1 2 100P_0402_50V8J
GPIO17 GPIO48
H_FERR# H_FERR# C454 @
1 2 100P_0402_50V8J

H_NMI C455 @
1 2 100P_0402_50V8J
0 1 SPI
Close to TigerPoint
C456 @
pin H_SMI# 1 2 100P_0402_50V8J
H_STPCLK# C457 @
1 2 100P_0402_50V8J
1 0 PCI

A A
1 1 LPC

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Tigerpoint(1/4)
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 11 of 39
5 4 3 2 1
5 4 3 2 1

USB Port List


0 USB Left1
PCIE Port List 1 USB Left2
1 2 USB Right2
D LAN D
3 CMOS
2 WLAN 4 CardReader
3 WWAN 5 WWAN
6 BT
4 WIMAX
7

U72B TGP

R23 H7 USB20_N0 +3VALW


(4) DMI_TX#0 DMI0RXN USBP0N USB20_P0 USB20_N0 (15)
(4) DMI_TX0 R24
DMI0RXP USBP0P
H6
USB20_N1 USB20_P0 (15) USB port1
(4) DMI_RX#0 P21 DMI0TXN USBP1N H3
USB20_P1 USB20_N1 (15) USB_OC#0_1 R46 10K_0402_5%
(4) DMI_RX0 P20 DMI0TXP USBP1P H2
USB20_N2 USB20_P1 (15) USB port2 USB_OC#2
T21 J2 R49 10K_0402_5%
(4) DMI_TX#1 DMI1RXN USBP2N USB20_N2 (15)
T20 J3 USB20_P2 USB port3 USB_OC#3 R48 10K_0402_5%
(4) DMI_TX1 DMI1RXP USBP2P USB20_N3 USB20_P2 (15)
T24 K6 USB_OC#4
(4) DMI_RX#1 DMI1TXN USBP3N USB20_P3 USB20_N3 (9)
(4) DMI_RX1 T25
DMI1TXP USBP3P
K5
USB20_P3 (9) CMOS USB_OC#5

DMI
USB20_N4 USB_OC#6
T19 DMI2RXN USBP4N K1
USB20_P4 USB20_N4 (22) USB_OC#7
modify 05/14
T18 DMI2RXP USBP4P K2
USB20_N5 USB20_P4 (22) Card Reader
U23 L2
DMI2TXN USBP5N USB20_P5 USB20_N5 (17)
C
U24
DMI2TXP USBP5P
L3
USB20_N6 USB20_P5 (17) WWAN C
V21 DMI3RXN USBP6N M6
USB20_P6 USB20_N6 (23)
V20
DMI3RXP USBP6P
M5
USB20_N7 USB20_P6 (23) BT
V24 N1
DMI3TXN USBP7N USB20_P7 USB20_N7 (18)
V23 DMI3TXP USBP7P N2 USB20_P7 (18) WLAN

D4 USB_OC#0_1
OC0# USB_OC#0_1 USB_OC#0_1 (15)

USB
(16) PCIE_DTX_C_IRX_N1 K21 C5
PERN1 OC1# USB_OC#2
(16) PCIE_DTX_C_IRX_P1 K22 PERP1 OC2# D3 USB_OC#2 (15)
C565 0.1U_0402_10V7K PCIE_ITX_C_DRX_N1_RJ23 USB_OC#3
LAN (16) PCIE_ITX_C_DRX_N1 C566 0.1U_0402_10V7K PCIE_ITX_C_DRX_P1_RJ24 PETN1 OC3#
D2
USB_OC#4
PETP1 OC4# E5
(16) PCIE_ITX_C_DRX_P1 USB_OC#5
(18) PCIE_DTX_C_IRX_N2 M18 E6
PERN2 OC5#/GPIO29 USB_OC#6
(18) PCIE_DTX_C_IRX_P2 M19 PERP2 OC6#/GPIO30 C2
WLAN C53 0.1U_0402_10V7KPCIE_ITX_C_DRX_N2_RK24 C3 USB_OC#7 USB20_N6 1 R1474 2 @
(18) PCIE_ITX_C_DRX_N2 C49 0.1U_0402_10V7K PCIE_ITX_C_DRX_P2_RK25 PETN2 OC7#/GPIO31 USB20_SIM_N (17)
(18) PCIE_ITX_C_DRX_P2 PETP2 0_0402_5%
(17) PCIE_DTX_C_IRX_N3 L23
PERN3
R152 Please closed U72
1 R1475 2 3G@

PCI-E
L24 PIN within 500 mils USB20_N7
(17) PCIE_DTX_C_IRX_P3 C52 0.1U_0402_10V7K PCIE_ITX_C_DRX_N3_RL22 PERP3
WWAN G2 R152 0_0402_5%
(17) PCIE_ITX_C_DRX_N3 C54 0.1U_0402_10V7K PCIE_ITX_C_DRX_P3_RM21 PETN3 USBRBIAS USBRBIAS1
G3 2
(17) PCIE_ITX_C_DRX_P3 PETP3 USBRBIAS#
P17 PERN4
P18 22.6_0402_1%
PERP4
N25 USB20_P6 1 R1476 2 @
PETN4 USB20_SIM_P (17)
N24 0_0402_5%
PETP4 CLK_PCH_48M
F4 CLK_PCH_48M (8)
CLK48

1
R338 USB20_P7 1 R1477 2 3G@
33_0402_5% 0_0402_5%
@
R153 Please closed U72

2
PIN within 500 mils 1
+1.5VS
R153 24.9_0402_1% R434
B
@ 22P_0402_50V8J B
1 2 H24 DMI_ZCOMP 2
J22 DMI_IRCOMP For EMI, Close to TigerPoint

(8) CLK_PCIE_PCH# W23 DMI_CLKN


(8) CLK_PCIE_PCH W24
DMI_CLKP
2

TIGERPOINT_ES1_BGA360

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Tigerpoint(2/4)
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 12 of 39
5 4 3 2 1
5 4 3 2 1

+3VALW

10K_0402_5% 2 R40 1 LINKALERT# +3VALW


+3VS
10K_0402_5% 2 R44 1 SMLINK0
10K_0402_5% 2 R43 1 SMLINK1 2.2K_0402_5% 1 R147 2 PCH_SMBCLK R42
10K_0402_5% 2 1 MCH_SYNC#
8.2K_0402_5% R239 PM_BATT_LOW# 2.2K_0402_5% 1 R148 2 PCH_SMBDATA 8.2K_0402_5% R295 SLPIOVR# +RTCVCC
1M_0402_5%
1K_0402_5% 1 R145 2 ICH_PCIE_WAKE# 8.2K_0402_5% R300 GPIO39 R146 2 INTRUDER#
1
10K_0402_5% 2 R39 1 SYS_RST# 8.2K_0402_5% R368 EC_THERM#
8.2K_0402_5% ICH_RI# 10K_0402_5% 2 R37 1 PCH_OK
8.2K_0402_5% R302 GPIO0 1 R197 2 INTVRMEN
R240
10K_0402_5% 2 R38 1 PCH_RSMRST# 332K_0402_1%
10K_0402_5% 2 R36 1 EC_LID_OUT# 8.2K_0402_5% @ R241 PM_CLKRUN#
D D
8.2K_0402_5% R314 GPIO12 10K_0402_5% 2 R1450 1
8.2K_0402_5% R315 GPIO14
8.2K_0402_5% R316 GPIO15 follow EC check list change to pull down 060810
8.2K_0402_5% R301 SMBALERT# +3VS +3VS

11/26

2
U72D TGP R1481 R1376
10K_0402_5% 70@ 10K_0402_5%
AA5 T15 GPIO0
LDRQ1#/GPIO23 BMBUSY#/GPIO0 +3VS MCP@
V6 W16 CRT_DET
(24,26) LPC_AD0 CRT_DET

1
LAD0/FWH0 GPIO6

LPC
AA6 W14 GPIO34 GPIO38
(24,26) LPC_AD1 LAD1/FWH1 GPIO7 EC_SMI# SLPIOVR# (4)
(24,26) LPC_AD2 Y5 K18 EC_SMI# (24)
LAD2/FWH2 GPIO8

2
W8 H19 EC_SCI#
(24,26) LPC_AD3 LAD3/FWH3 GPIO9 ACIN_C EC_SCI# (24)
Y8 M17 R1390 R1482 R1377
LDRQ0# GPIO10 GPIO12
(24,26) LPC_FRAME# Y4 A24 10K_0402_5% 10K_0402_5%
LFRAME#/FWH4 GPIO12 EC_LID_OUT# 10K_0402_5%
GPIO13 C23 EC_LID_OUT# (24) N3G@ 80@
33_0402_5% 1 R160 2 P6 P5 GPIO14
(19,21) HDA_BITCLK_AUDIO

1
R158 HDA_BIT_CLK GPIO14 GPIO15
(19,21) HDA_RST_AUDIO# 33_0402_5% 1 2 U2 E24
HDA_RST# GPIO15
1 0_0402_5%

AUDIO
(19) HDA_SDIN0 W2 AB20 R17 2 PM_DPRSLPVR (5)
HDA_SDIN0 DPRSLPVR
V2 HDA_SDIN1 STP_PCI# Y16 R1391 2 1 0_0402_5% @ H_STP_PCI# (8)
P8 HDA_SDIN2 STP_CPU# AB19 H_STP_CPU# (8)
33_0402_5% 1 R159 2 AA1 R3
(19,21) HDA_SDOUT_AUDIO HDA_SDOUT GPIO24
33_0402_5% 1 R157 2 Y1 C24 1 R367 2
(19,21) HDA_SYNC_AUDIO HDA_SYNC GPIO25
AA3 D19 1K_0402_5%
(8) CLK_PCH_14M CLK14 GPIO26
D20
1

GPIO27 0_0402_5%
R337 U3 EE_CS GPIO28 F22
33_0402_5% AE2 EE_DIN CLKRUN# AC19 PM_CLKRUN# PCH_OK 1 R310 2 VGATE
VGATE (5,8,24,35)
@ @
T6
V3
EE_DOUT EPROM GPIO33
U14
AC1 GPIO34
EE_SHCLK GPIO34
C GPIO38 1 R311 C
2

1 GPIO38 AC23 2 EC_PWROK (5,24)


T4 AC24 GPIO39 0_0402_5%
C433 LAN_CLK GPIO39
@ P7
22P_0402_50V8J LANR_RSTSYNC H_PWRGD D25 RB751V_SOD323
B23 LAN_RST# CPUPWRGD/GPIO49 AB22 H_PWRGD (4,5)
2 AA2 ACIN_C 2 1 ACIN
LAN

MISC
LAN_RXD0 EC_THERM# ACIN (24,31)
For EMI, Close to TigerPoint AD1 AB17 EC_THERM# (24)
LAN_RXD1 THRM# VGATE
AC2 LAN_RXD2 VRMPWRGD V16 +3VALW 2 R223 1 2 1
W3 AC18 MCH_SYNC#
LAN_TXD0 MCH_SYNC# PBTN_OUT# @ R222
T7
U4
LAN_TXD1 PWRBTN# E21
H23 ICH_RI# PBTN_OUT# (24) 100K_0402_5% 0_0402_5% Change CRT_DET# From Page 10 to Page 13
LAN_TXD2 RI#
SUS_STAT#/LPCPD# G22
RTCX1 W4 D22
RTC

RTCX1 SUSCLK EC_CLK (24) +3VS


RTCX2 V5 G18 SYS_RST#
RTCRST# RTCX2 SYS_RESET# PLTRST#
T5 G23 PLTRST# (4,5,16,17,18,24,26)
RTCRST# PLTRST# ICH_PCIE_WAKE#
C25 ICH_PCIE_WAKE# (17,18)
WAKE#

2
SMBALERT# E20 T8 INTRUDER#
PCH_SMBCLK SMBALERT#/GPIO11 INTRUDER# PCH_OK R149
(8) PCH_SMBCLK H18 U10
SMBCLK PWROK
SMB

PCH_SMBDATA E23 AC3 PCH_RSMRST# 10K_0402_5%


(8) PCH_SMBDATA SMBDATA RSMRST#
LINKALERT# H21 AD3 INTVRMEN High: CRT Plugged
SMLINK0 LINKALERT# INTVRMEN SB_SPKR
F25 J16 SB_SPKR (19)

1
SMLINK1 SMLINK0 SPKR CRT_DET
F24
SMLINK1
H20 PM_SLP_S3# (24)
SLP_S3#

1
D
Change EC_LID_OUT# From GPIO13 to GPIO11 R2
SPI_MISO SLP_S4#
E25 PM_SLP_S4# (24)
T1 F21 CRT_DET# 2 Q11
06/08 SPI_MOSI SLP_S5# PM_SLP_S5# (24) (10) CRT_DET#
SPI

M8 G 2N7002W-T/R7_SOT323-3
SPI_CS# PM_BATT_LOW#
P9 B25 S

3
SPI_CLK BATLOW# H_DPRSTP#
R4 SPI_ARB DPRSTP# AB23 H_DPRSTP# (5)
AA18 H_DPSLP#
DPSLP# H_DPSLP# (5)
F20
RSVD31

B B
TIGERPOINT_ES1_BGA360

1 R196 2 RTCRST#
+RTCVCC
20K_0402_5%

CMOS @ 0_0603_5%
2 1 Change CMOS to 0603 20100528.

C230 +RTCBATT
1U_0603_10V4Z~D +NonchargeRTC +NonchargeRTC +CHGRTC
1 2 PLTRST#

2
RSMRST circuit
2

R1370
1

C1158 R1486 1K_0402_5%


JBATT1 1K_0402_5% R372
+

charge@ 0_0402_5%
220P_0402_50V7K Noncharge@
2

1 1
1 2
1

D37
Q30
For ESD
3

3 1 PCH_RSMRST#

C
(24) EC_RSMRST#

E
D48
change small size 052810 +RTCVCC BAV99DW-7_SOT363 @ MMBT3906_SOT23-3
1 2

B
C368 BAS40-04_SOT23-3 +3VALW

1 2
3

2
charge@ R373 @ 4.7K_0402_5%
Routing the trace at least 10mil

2
15P 50V J NPO 0402
R374
1

RTCX1 Noncharge@ D28B


-

2 1 +CHGRTC
LOTES_AAA-BAT-019-K01 DAN202UT106_SC70-3 @ 2.2K_0402_5% @
1
2

@ D28A
10M_0402_5%

Noncharge@ C1148
1

Y3 BAV99DW-7_SOT363

1
A
R288

0.1U_0402_16V4Z A
2 1 R375

6
NC OSC +RTCVCC 2 1 2
3 NC OSC 4
@ 2.2K_0402_5%
2

32.768KHZ_12.5PF_Q13MC14610002 Reserve non charge circuit 0503.


2 1 RTCX2

12P 50V J NPO 0402


Security Classification Compal Secret Data Compal Electronics, Inc.
C371 Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Tigerpoint(3/4)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 13 of 39
5 4 3 2 1
5 4 3 2 1

TGP
U72E
D D
F12 +V5REF_RUN 6mA
VCC5REF

U72F TGP
F5 +V5REF_SUS 10mA
+5VS +3VS VCC5REF_SUS
VSS01 A1
Y6 +SATAPLL 50mA A25
VCCSATAPLL VSS02
VSS03 B6
1

AE3 +RTCVCC B10


VCCRTC VSS04

0.01U_0402_16V7K
R33 D12

0.1U_0402_16V4Z
VSS05 B16
RB751V-40_SOD323-2 Y25 +DMIPLL B20
VCCDMIPLL VSS06

C42

C47
100_0402_5% 1 1 B24
10mA +VCCP VSS07
F6 E18
2

VCCUSBPLL VSS08
F16
+V5REF_RUN VSS09
G4
2 2 VSS10
VSS11 G8
1 W18 14mA 1 H1
C59 V_CPU_IO VSS12
H4
C41 0.1U_0402_16V4Z VSS13
VSS14 H5
1U_0603_10V6K K4
2 1.3A 2 VSS15

10U_0805_10V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z
VCC1_5_1 AA8 VSS16 K8

1U_0603_10V6K

1U_0603_10V6K
VCC1_5_2 M9 +1.5VS VSS17 K11
M20 K19
VCC1_5_3 VSS18

POWER

C48

C45

C61

C62

C459
N22 1 1 1 1 1 K20
VCC1_5_4 VSS19
L4
VSS20
M7
+5VALW +3VALW VSS21
M11
2 2 2 2 2 VSS22
N3
VSS23
2

N12
VSS24
1

C D10 0.98A C

0.1U_0402_16V4Z
J10 +VCCP N13

10U_0805_10V4Z
VCC1_05_1 VSS25

1U_0603_10V6K

1U_0603_10V6K
R35 RB751V-40_SOD323-2 K17 N14
VCC1_05_2 VSS26

C46

C60

C63

C460
VCC1_05_3 P15 1 1 1 1 VSS27 N23
10_0402_5% V10 P11
1

VCC1_05_4 VSS28
P13
2

+V5REF_SUS VSS29
VSS30 P19
2 2 2 2 R14
VSS31
R22
0.29A VSS32
1 H25 +3VS T2
VCC3_3_1 VSS33

1U_0603_10V6K

1U_0603_10V6K

1U_0603_10V6K
C40

0.1U_0402_16V4Z

0.1U_0402_16V4Z
AD13 T22
VCC3_3_2 VSS34

C43

C37

C38

C461

C462
0.1U_0402_16V4Z F10 1 1 1 1 1 V1
VCC3_3_3 VSS35
G10 V7
2 VCC3_3_4 VSS36
R10 V8
VCC3_3_5 VSS37
VCC3_3_6 T9 VSS38 V19
2 2 2 2 2
VSS39 V22
V25
0.13A VSS40
F18 W12
VCCSUS3_3_1 VSS41
N4 W22
VCCSUS3_3_2 VSS42
K7 Y2
VCCSUS3_3_3 VSS43
VCCSUS3_3_4 F1 +3VALW VSS44 Y24

1U_0603_10V6K

1U_0603_10V6K
0.1U_0402_16V4Z
VSS45 AB4
AB6
VSS46

C39

C44

C463
1 1 1 AB7
VSS47
VSS48 AB8
VSS49 AC8
VSS50 AD2
2 2 2
5 AD10
VSS51
AD20
VSS52
TIGERPOINT_ES1_BGA360 AD24
VSS53
AE1
B VSS54 B
AE10
VSS55
AE25
VSS56

Place closely pin Y25 within 100mlis.


G24
+1.5VS R30 VSS57
AE13
0.01U_0402_16V7K +DMIPLL VSS58
F2
0_0805_5% VSS59
1 1 1
C58 C28 C464 AE16
10U_0805_10V4Z RSVD32
2 2 2

4.7U_0603_6.3V6K
TIGERPOINT_ES1_BGA360

Place closely pin Y6 within 100mlis.

+1.5VS
R29
+SATAPLL
0_0805_5%
1 1
C57 C27
10U_0805_10V4Z 0.1U_0402_16V4Z
A A
2 2

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2009/04/15 Deciphered Date 2010/04/15 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Tigerpoint(4/4)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 14 of 39
5 4 3 2 1
A B C D E F G H

+5VALW +USB_VCCC1

W=80mils W=80mils
U78
1 GND VOUT 8
2 7
VIN VOUT
3 VIN VOUT 6
(24) USB_ON# 4 5 USB_OC#2 (12)
EN FLG
1 APL3510BKI-TRG SOP 8P PWR SWITCH 1
1
C1 1
0.1U_0402_16V4Z C2
2 @ 1000P_0402_50V7K SATA HDD Conn.
2

JHDD1
1
SATA_ITX_C_DRX_P0 GND
(11) SATA_ITX_C_DRX_P0 2
SATA_ITX_C_DRX_N0 A+
(11) SATA_ITX_C_DRX_N0 3
A-
4
@ SATA_DTX_C_IRX_N0 SATA_DTX_IRX_N0 GND
1 2 C380 5
R1 (11) SATA_DTX_C_IRX_N0 0.01U_0402_16V7K B-
6 B+
0_0402_5% SATA_DTX_C_IRX_P0 1 2 SATA_DTX_IRX_P0 7
1 2 (11) SATA_DTX_C_IRX_P0 GND
C383
0.01U_0402_16V7K 8
+USB_VCCC1 +3VS V33
9
L31 V33
10
1 2 USB20_N2_1 V33
(12) USB20_N2 1 2 11
GND
W=80mils 12
GND
+5VS 13 GND
4 3 USB20_P2_1
(12) USB20_P2 4 3
WCM2012F2S-900T04_0805 C10
1
+
1
C8
USB CONN. 3 0.1U_0402_16V4Z
+5VS 14
15
V5
V5
16 V5
17
150U 6.3V M B LESR45M T520 H1.9 470P_0402_50V7K 1 1 1 1 GND
2 2 18
1 2 C423 C426 Reserved
19 24
R2 C422 C419 GND GND
20 V12
0_0402_5% 1U_0402_6.3V6K 10U_0603_6.3V6M
2 2 2 2 2 21 V12 GND 23 2
@ JUSB3 22
1 V12
USB20_N2_1 VCC 1000P_0402_50V7K
5/12 Revised net name USB20_P2_1
2
3
D-
D+
SUYIN_127043FR022G263ZR_NR
4 GND
CONN@
D4 5
USB20_N2_1 GND1
6 3 6
CH3 CH2 GND2
7 GND3
8
GND4

+USB_VCCC1 5 2 SUYIN_020133GB004M25MZL
Vp Vn CONN@

4 1 USB20_P2_1
CH4 CH1
CM1293-04SO_SOT23-6
5/12 Revised USB connector
@ 6/23 Update USB connector

3
Change JUSB1 JUSB2 to NEW P/N SP010906181 06/23 USB CONN.2 3

USB CONN.1
+USB_VCCC +USB_VCCC

+USB_VCCC
W=40mils +USB_VCCC
W=40mils

1 1 1 1
C316 C318
C315 + C317 +
470P_0402_50V7K 470P_0402_50V7K
150U 6.3V M B LESR45M T520 H1.9 2 150U 6.3V M B LESR45M T520 H1.9 2
2 2
JUSB1 JUSB2
1 1
+5VALW VCC VCC
(12) USB20_N0 2 (12) USB20_N1 2
D- D-
(12) USB20_P0 3 (12) USB20_P1 3
D+ D+
4 4
GND GND

2
3

+USB_VCCC 5 5
U13 GND1 GND1
6 GND2 6 GND2
C244 1 8 7 7
0.1U_0402_16V4Z GND VOUT GND3 D23 GND3
2 VIN VOUT 7 8 GND4 8 GND4
2 1 3 6 D21
VIN VOUT SUYIN_020133GB004M25MZL SUYIN_020133GB004M25MZL
4 5 USB_OC#0_1 (12)
EN FLG
2

R224 APL3510BKI-TRG SOP 8P PWR SWITCH CONN@ PJDLC05C_SOT23-3 CONN@

1
100K_0402_5% @ PJDLC05C_SOT23-3
1

1
C245
1

USB_ON# @ 1000P_0402_50V7K
4 (24) USB_ON# 4
2

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SATA,CONN. / USB CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 15 of 39
A B C D E F G H
5 4 3 2 1

由+1.7V_LX供供+VDDCT pin39 need to pull high resister of 5.1k


Switch mode:
LDO mode:由+1.7V_VDDCT_REG供供+VDDCT pin39 need to pull low resister of 5.1k
+3V_LAN
Change LAN chip to AR8152-L for NAV70/80 DDR3 2010/01/22

1
U14 R1451 SWR@
R645 5.1K_0402_5% 5.1K +-5% 0402
(12) PCIE_DTX_C_IRX_P1 2 1 PCIE_C_RXP1 30 38 LAN_ACTIVITY# 1 2
C845 0.1U_0402_16V7K TX_P LED_ACT#

2
2 1 PCIE_CRXN1 29 39 LAN_SK_LAN_LINK#
(12) PCIE_DTX_C_IRX_N1
C851 0.1U_0402_16V7K TX_N LED_LINK10_100# LAN_MDI0+ R629 49.9_0402_1%
20mil
1 2

1
35 11 LAN_MDI0+ LAN_MDI0- R630 1 2 49.9_0402_1% 1 2 C838 0.1U_0402_16V4Z
(12) PCIE_ITX_C_DRX_P1 RX_P TRXP0
12 LAN_MDI0- R1452 LDO@ LAN_MDI1+ R631 1 2 49.9_0402_1%
TRXN0 LAN_MDI1+ LAN_MDI1- R632 49.9_0402_1%
(12) PCIE_ITX_C_DRX_N1 36 RX_N TRXP1 14 5.1K +-5% 0402 1 2 1 2 C839 0.1U_0402_16V4Z
15 LAN_MDI1-
D CLK_PCIE_LAN TRXN1 R635 2.37K_0402_1% D
(8) CLK_PCIE_LAN 33

2
CLK_PCIE_LAN# REFCLK_P
(8) CLK_PCIE_LAN# 32 REFCLK_N RBIAS 10 2 1 close to Lan chip
+3V_LAN 2 R1453 1 4.7K_0402_5%@
1 2 LAN_CLKREQ#_R 23 W=40mils
(8) LAN_CLKREQ#
R1428 0_0402_5% CLKREQ# R635 keep away other singal (25mil) the GND directly connect to GND layer
VDD33 1 +3V_LAN
PLTRST# 2
(4,5,13,17,18,24,26) PLTRST# PERST#
40 +1.7V_LX W=40mils
LAN_WAKE# LX
(24) LAN_WAKE# 3 WAKE#
25 SMCLK W=40mils
26 SMDATA VDDCT 5 +1.7V_VDDCT
4 +1.7V_VDDCT_REG
VDDCT_REG
28 TEST_RST
27 TESTMODE
41 24 +1.1V_DVDDL W=30mils
GND DVDDL
DVDDL_REG 37
LAN_X1 7
LAN_X2 XTLO
8 XTLI +2.7V_AVDDH
L10 close to Lan pin40
AVDDH 22 W=30mils
16 NC AVDDH_REG 9
17 NC
18 +1.7V_LX 1 2 +1.7V_VDDCT 1 2 +1.7V_VDDCT_REG
NC +1.1V_AVDDL L10
del big package 19 NC AVDDL 31 W=30mils 4.7UH_1008HC-472EJFS-A_5%_1008 10U_0603_6.3V6M R680
20 34

0.1U_0402_16V4Z
NC AVDDL 0.1U_0402_16V4Z 0_0603_5%
21 6 1 1 1 1 1

1U_0402_6.3V4Z

0.1U_0402_16V4Z
NC AVDDL_REG SWR@ LDO@
Y8 13 NC
LAN_X1 1 2 LAN_X2 C881 C399 C860 C876 C877

AR8152-AL1E 2 2 2 2 2
2 25MHZ_20PF_7A25000012 2 SWR@ LDO@
C852 C853
AR8152L PN:SA00003JW10
C 27P_0402_50V8J 27P_0402_50V8J C
1 1
close to Lan pin5 close to L10
close to Lan pin4

+1.1V_AVDDL +2.7V_AVDDH +1.1V_DVDDL


LAN Power circuit refer NAU00
1 1 1 1 1 1 1 1 1 1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
W=40mils C873 C856 C868 C863 C870 C871 C872 C865 C866 C867
2 2 2 2 2 2 2 2 2 2
+3V_LAN
J15
1A
+3VALW 1 1 2 2 close to Lan pin37 close to Lan pin24
close to Lan pin6 close to Lan pin31 close to Lan pin9
10U_0603_6.3V6M~D close to Lan pin22

10U_0603_6.3V6M~D
JUMP_43X39 1000P_0402_50V7K
@ 1U_0402_6.3V4Z
1 1 1 1 1
C841 C848 close to Lan pin34
C847 C340 C1205
2 2 2 2 2 close to JRJ45
B 0.1U_0402_16V4Z @ B
2 1
C879
470P_0402_50V7K
close to Pin 1 JRJ45
LAN_ACTIVITY# 2 1 11
R644 511_0402_1% Yellow LED+
12 Yellow LED-
SHLD1 15
8 PR4-
DETECT PIN1 13
7 PR4+
RJ45_MIDI1- 6 PR2-
5 PR3-
For EMI. 4 PR3+
T1
@ RJ45_MIDI1+ 3
LAN_MDI1+ RJ45_MIDI1+ PR2+
1 RD+ RX+ 16 2 1
L32 LAN_MDI1- 2 15 RJ45_MIDI1- R640 75_0402_5% C883 RJ45_MIDI0- 2
+1.7V_VDDCT RD- RX- RJ45_CT0 470P_0402_50V7K PR1-
2 1 3 CT CT 14 1 2
MURATA_BLM18AG601SN1D_0603 4 13 RJ45_MIDI0+ 1
NC NC R639 75_0402_5% PR1+
5 NC NC 12 SHLD1 14
6 11 RJ45_CT1 1 2 2 1 R643 9
CT CT +3V_LAN Green LED+
LAN_MDI0+ 7 10 RJ45_MIDI0+ 511_0402_1%
LAN_MDI0- TD+ TX+ RJ45_MIDI0- LAN_SK_LAN_LINK#
8 TD- TX- 9 10 Green LED-
1
1000P_0402_50V7K

1000P_0402_50V7K

close to L2 C862 @ SANTA_130452-3


1U_0402_6.3V4Z

350uH_NS0013LF 1000P_1206_2KV7K 2 1
A C884 A
C1206

C1207

1 1 1 1 1 CONN@
0.1U_0402_16V4Z

0.1U_0402_16V4Z

2
C875

470P_0402_50V7K
C882

C880

@ @
2 2 2 2 2

Security Classification Compal Secret Data Compal Electronics, Inc.


close to T1 Issued Date 2009/7/7 Deciphered Date 2010/7/7 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN AR8152
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom LA-6221P 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, July 01, 2010 Sheet 16 of 39
5 4 3 2 1
A B C D E

Add C1163 C1164 C1165 C1166 06/23


+1.5VS

1 MCP@
1 MCP@ 1 MCP@ 1 MCP@

4.7U_0603_6.3V6K
C1163 C1164 C1165 C1166

47P_0402_50V8J
0.01U_0402_25V7K
0.1U_0402_16V4Z
2
2 2 2

1 1

Add C850 06/12


+3VS_WWAN
MCP@ MCP@
0.1U_0402_16V4Z
MCP@
1 1 MCP@ 1 1
Mini-Express Card for WWAN C505

0.1U_0402_16V4Z
C506
C507 1
C508
C850
47P_0402_50V8J
2 2 2 MCP@ 0.01U_0402_25V7K 2
2
10U_0805_10V4Z

+3VS_WWAN
+3VS +3VS_WWAN +3VALW
1
@
Change JMINI1 to FOX_AS0B246-S50U-7F_52P-T 06/29 1 2 1 2 @ C403 +
R405 0_1206_5% R504 0_1206_5%
150U_B_6.3VM_R40M
2 Close to WWAN CONN
JMINI1
ICH_PCIE_WAKE# 1 2
(13,18) ICH_PCIE_WAKE# 1 2
3 4
3 4
5 6 +1.5VS
2 WWAN_CLKREQ# 5 6 +UIM_PWR 2
(8) WWAN_CLKREQ# 7 7 8 8
9 10 UIM_DATA
9 10 UIM_CLK
(8) CLK_PCIE_WWAN# 11 12
11 12 UIM_RST
(8) CLK_PCIE_WWAN 13 13 14 14
15 16 UIM_VPP
15 16

17 18
17 18 WXMIT_OFF#
19 19 20 20 WXMIT_OFF# (24)
21 22 R506 1 2 0_0402_5%
21 22 PLTRST# (4,5,13,16,18,24,26)
(12) PCIE_DTX_C_IRX_N3 23 23 24 24
(12) PCIE_DTX_C_IRX_P3 25 26
25 26 R507 0_0402_5%
Change to PCIE_P3 05/13 27 27 28 28
29 30 1 2 CLK_SMBCLK (7,8,18,26)
29 30
(12) PCIE_ITX_C_DRX_N3 31 32 1 2 CLK_SMBDATA (7,8,18,26)
31 32 R508 0_0402_5%
33 34
(12) PCIE_ITX_C_DRX_P3 33 34 USB20_N5_1
35 36
35 36 USB20_P5_1
37 38
10U_0805_10V4Z 37 38
+3VS_WWAN 39 40
39 40
1 2
C504 MCP@
41 41 42 42 WWAN_LED# (18,23) (9~16mA)
43 44 1 2 WLAN_LED# (18,23)
WWAN_WAKEUP_R# 43 44 R511 0_0402_5%
45 46
45 46
47 48
R4020_0402_5% EC_TX_P80_DATA_R 47 48
49 50
EC_TX_P80_DATA 49 50
(18,24) EC_TX_P80_DATA 1 2 EC_TX_P80_DATA_R EC_TX_P80_CLK_R 51 52
EC_RX_P80_CLK 51 52
(18,24) EC_RX_P80_CLK 1 2 EC_TX_P80_CLK_R
1

R403 0_0402_5% 53 54
R1325 GND1 GND2
55 56
10K_0402_5% NC NC R1478
0_0402_5%
BELLW_80052-1021 1 2
2

CONN@
3 D15 3
@ CM1293-04SO_SOT23-6
UIM_VPP 1 CH1 UIM_DATA WCM2012F2S-900T04_0805
CH4 4 USB20_N5_1
(12) USB20_N5 4 4 3 3

2 5 1 2 USB20_P5_1
Vn Vp +UIM_PWR (12) USB20_P5 1 2
L33 @

UIM_RST 3 6 UIM_CLK
CH2 CH3
1 2
R1479
JP3 0_0402_5%
4 1 +UIM_PWR
UIM_VPP GND VCC UIM_RST
5 2
UIM_DATA VPP RST UIM_CLK
6 3
I/O CLK 3G@
7
DET
22P_0402_50V8J

C1116

3G@ 1 1 3G@ 3G@ 3G@ 3G@


22P_0402_50V8J

22P_0402_50V8J

8 1 1 1 1 1 1 1
C1118
56P_0402_50V8

(12) USB20_SIM_P D+
1
10K_0402_5%
C509

9 3G@ 1 C512 C513


D-
C510

(12) USB20_SIM_N
R12

C511

C1115
10 56P_0402_50V8
2
C1117

2 GND
56P_0402_50V8

@ 11 +3VALW
1U_0402_6.3V6K

GND
C1114
56P_0402_50V8

2 2 2 2 2 2 2
22P_0402_50V8J

0.1U_0402_16V4Z

@ 2 @ @
2

1
Modifiy 05/11 +UIM_PWR R509
TAITW_PMPAT2-08GLBS7N14N0 10K_0402_5%
CONN@
Reserve for SIM card does not meet rise time

2
and pull-up is needed. Add C1115 C1114 C1116 C1117 C1118 05/11
4 WWAN_WAKEUP_R# 4
Change C512 to 1U_0402 05/14 (24) WWAN_WAKEUP# 1 2
R510 0_0402_5%
@

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/05 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Mini-Card
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 17 of 39
A B C D E
5 4 3 2 1

D D

Mini-Express Card for WLAN

+3VS_WLAN +1.5VS

1 1 1 1 1 1
C195 C1189 C1043 C1069 C1070 C1071
4.7U_0603_6.3V6K 0.1U_0402_16V4Z 47P_0402_50V8J 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 47P_0402_50V8J
2 2 2 2 2 2

C C

J9
JUMP_43X79
JMINI2 @
1 2 +3VS_WLAN 1 1
(13,17) ICH_PCIE_WAKE#
0_0402_5% 1 2 2 2 +3VS
3 4
R1454 1 3 4
(23,24) BT_ON# 2 @ 5 5 6 6 +1.5VS
(8) WLAN_CLKREQ# 7 8
7 8
9 10
9 10
(8) CLK_PCIE_WLAN# 11 12
11 12
(8) CLK_PCIE_WLAN 13 14
13 14
15 16
15 16

17 18
17 18
19 20 WL_OFF# (24)
19 20
21 22 PLTRST# (4,5,13,16,17,24,26)
21 22
(12) PCIE_DTX_C_IRX_N2 23 24
23 24
25 26
(12) PCIE_DTX_C_IRX_P2 25 26 0_0402_5% @
27 28
27 28 R1455
29 29 30 30 1 2 CLK_SMBCLK (7,8,17,26)
(12) PCIE_ITX_C_DRX_N2 31 32 R1456 1 2
31 32 CLK_SMBDATA (7,8,17,26)
(12) PCIE_ITX_C_DRX_P2 33 34 0_0402_5% @
33 34
35 36 USB20_N7 (12)
35 36
37 38 USB20_P7 (12)
+3VS_WLAN 37 38
39 40
B 39 40 B
41 41 42 42 1 R1356 2 WWAN_LED# (17,23)
43 44 0_0402_5%
43 44

1
1 45
45 46
46 12/09
47 48 R1457 (9~16mA)
C1072 EC_TX_P80_DATA_R_ 47 48 0_0402_5%
49 50
10U_0603_6.3V6M EC_TX_P80_CLK_R_ 49 50
51 52
R1488 0_0402_5% 2 51 52 @
53 55

2
EC_TX_P80_DATA EC_TX_P80_DATA_R_ G1 G3
(17,24) EC_TX_P80_DATA 1 2 54 56 WLAN_LED# (17,23)
EC_RX_P80_CLK EC_TX_P80_CLK_R_ G2 G4
(17,24) EC_RX_P80_CLK 1 2
R1489 0_0402_5% BELLW_80052-1021
CONN@

5/12
6/1
6/12
、 、 、 、
Update WLAN connector(the same as KAV60)
Revised 37 39 41 42 43 to NC
Update connector to DC040006S00
6/26 Update JMINI1 footprint
7/01 update pin 23,25,31,33

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/05 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 18 of 39
5 4 3 2 1
5 4 3 2 1

HDA_SDIN0_AUDIO
HDA_SDIN0_AUDIO (21)
N18123167 PVDD1_AUDIO
(21) N18123167 PVDD1_AUDIO (21)
N18123190 C1020
N18123190 (21)
(21) MIC1_C_L MIC1_C_L N18123238 0.1U_0402_6.3V4Z
N18123238 (21) R1326
N17000325 1 2 1 2 MONO_IN (21)
MIC1_C_R N18123244 N17000325 (21) (24) BEEP#
(21) MIC1_C_R N18123244 (21) CODEC_VREF 47K_0402_5%
N17000410 PVDD2_AUDIO CODEC_VREF (21)
(21) N17000410 PVDD2_AUDIO (21) 2
N16999452
N16999452 (21)
N18123239 C123
SENSE_A N18123239 (21) R1327
(21) SENSE_A 1 2 100P_0402_50V8J
SENSE_B N18123242 (13) SB_SPKR 1
(21) SENSE_B N18123242 (21)
47K_0402_5%
N16999461
D (21) N16999461 D

1
N18122593
(21) N18122593
R1324 2
10K_0402_5%
C1009
J8 0.1U_0402_6.3V4Z

2
1
2 2 1 1

@ JUMP_43X39

U26 @
L21 1 2
40mil
1
(output = 300 mA)
+5VS IN
FBMA-L11-201209-221LMA30T_0805
OUT
5 +VDDA 4.75V +3VS_DVDD
1 1 2
GND 40mil C1180
C1179 C458 3 4 1 2 L23
0.1U_0402_16V4Z 0.1U_0402_16V4Z SHDN BYP MBK1608121YZF_0603
2 2 G9191-475T1U_SOT23-5 @ +3VS_DVDD 1 2
2.2U_0603_6.3V6K +3VS

1 1 1

HD Audio Codec C468


0.1U_0402_16V4Z
C1181
0.1U_0402_16V4Z
C465
10U 6.3V M X5R 0603 H0.8
2 2 2 L29 271@
+AVDD_HDA MBK1608121YZF_0603
L24 PVDD1_AUDIO 1 2 +5VS
MBK1608121YZF_0603
1 2
40mil
+VDDA
20mil 20mil 1 1 1 1
C 271@ 271@ 271@ 271@ C
1 1 1
C1044 C1045 C1046 C1047
C1182 C466 C467 0.1U_0402_16V4Z 10U 6.3V M X5R 0603 H0.8 0.1U_0402_16V4Z 10U 6.3V M X5R 0603 H0.8

25

38

9
10U 6.3V M X5R 0603 H0.8 0.1U_0402_16V4Z 0.1U_0402_16V4Z U27 2 2 2 2
2 2 2

DVDD_IO
AVDD1

AVDD2

DVDD
AMP_LEFT (20,21)

14 NC LINE_OUT_L 35
L30 271@
15 36 MBK1608121YZF_0603
NC LINE_OUT_R AMP_RIGHT (20,21)
PVDD2_AUDIO 1 2
SPKL- (20) +5VS
16 39 PVDD1_AUDIO 20mil
MIC2_L HP_OUT_L
SPKR+ (20)
17 41 271@ 1 0_0402_5%
2 R1398 20mil
MIC2_R HP_OUT_R
1 1 1 1
23 45 271@ 10_0402_5%2 R1399 271@ 271@ 271@ 271@
LINE1_L NC DMIC_CLK1
1 MIC@ 2 C1051 C1048 C1049
24 46 PVDD2_AUDIO FBMA-11-100505-401T1 0402 2 R442 0.1U_0402_16V4Z 10U 6.3V M X5R 0603 H0.8 0.1U_0402_16V4Z
LINE1_R DMIC_CLK DMIC_CLK (9) 2 2 2 2
FBMA-11-100505-401T 0402 CMIC@R441
18 43 271@ 1 2 R1400 0_0402_5%
CD_L NC
20
CD_R NC
44 20mil 271@ 1 2 R1329 0_0402_5%
SPKR- (20)
271@ C1050
R1330 2 1 20K_0402_1% 19 R1401 1 2 22_0402_5% 1 2 C470 @ 22P_0402_50V8J 10U 6.3V M X5R 0603 H0.8
CD_GND @
6 HDA_BITCLK_AUDIO (13,21)
MIC1_L MIC1_C_L 21 BIT_CLK
20mil (20) MIC1_L
C471
1 2
4.7U_0603_6.3V6K MIC1_L
MIC1_R MIC1_C_R 22 HDA_SDIN0_AUDIO
20mil (20) MIC1_R
C472
1 2
4.7U_0603_6.3V6K MIC1_R SDATA_IN
8 1
R1402
2
33_0402_5%
HDA_SDIN0 (13)
12 37 1 2 272@
(21) MONO_IN PCBEEP MONO_OUT
10mil R1331 0_0402_5% 271@ C490 2.2U_0402_6.3VM
B 7/04 Add C23 C23 @
LINE1_VREFO 29
MIC1_VREFO_L
1 2 B
10P_0402_50V8J 11 R1352 1 2 0_0402_5% @
(13,21) HDA_RST_AUDIO# RESET#
2 1 31 1 2
GPIO1 271@ C1052 1
(13,21) HDA_SYNC_AUDIO 10 SYNC 2 10U 6.3V M X5R 0603 H0.8
28 10mil C491
MIC1_VREFO_L MIC1_VREFO
(13,21) HDA_SDOUT_AUDIO 5 2.2U_0402_6.3VM
CMIC@ SDATA_OUT HP_RIGHT 272@
(9) DMIC_DATA MIC1_VREFO_R
32 20mil HP_RIGHT (20,21)
1 R438 2 FBMA-11-100505-401T 0402 2
39.2K +-1% 0402 2 R1332 DMIC_DATA1 GPIO0
(20) HP_PLUG# 1 271@ MIC@ 1 R439 2 FBMA-11-100505-401T 0402 3 30 10mil MIC1_VREFO_R
20K_0402_1% SENSE_A GPIO3 MIC2_VREFO
(20) MIC_PLUG# 2 R376 1 13 SENSE A
5.11K_0402_1% 2 R1404 1 272@ SENSE_B 34 27 CODEC_VREF
(20) HP_PLUG# SENSE B VREF
2 1
1 2 47 EAPD JDREF 40 1 2 SPKL+ (20)
C1053 271@ (24) EAPD R377 0_0402_5% R1333 1
2.2U_0402_6.3VM 1 2 48 33 HP_LEFT 0_0402_5% 20mil 1
(20,24) EC_MUTE# SPDIFO NC HP_LEFT (20,21)
R1334 0_0402_5% 271@ 20mil 271@ C474
1 2 4 26 C473 0.1U_0402_16V4Z
DVSS1 AVSS1

1
R1335 0_0402_5% 272@ 7 42 2
DVSS2 AVSS2 4.7U_0603_6.3V6K
272@ 2
ALC272-GR_LQFP48_9X9
20K_0402_1% R378
Sense Pin Impedance Codec Signals DGND AGND

2
change C473 from 10uF to 4.7uF 0701 R380
2 1
0_0603_5%
39.2K PORT-A (PIN 39, 41) Change to SA00002CI20 ALC272-VA2-GR
+3VS 2 1 2 1
20K PORT-B (PIN 21, 22) JP4 R382 0_0402_5% R379 0_0603_5%
SENSE A DMIC_CLK1 8mil 1
1
2
DMIC_DATA1 2
10K PORT-C (PIN 23, 24) 3
3 G1
5 2 1 2 1
4 6 R384 0_0402_5% R381 0_0603_5%
A 4 G2 A

5.1K PORT-D (PIN 35, 36) ACES_88266-04001


CONN@
1 1
2

39.2K PORT-E (PIN 14, 15) MIC@ MIC@ MIC@ GND GNDA GND GNDA
D20 C604 C603
PJDLC05C_SOT23-3
2
22P 50V J NPO 0402 2
22P 50V J NPO 0402
20K PORT-F (PIN 16, 17) Compal Electronics, Inc.
SENSE B For ESD 12/22
Title
10K PORT-G (PIN 43, 44) <Title>
HD Audio Codec ALC272
Size Document Number Rev
1

5.1K PORT-H (PIN 45, 46) Custom<Doc> 0.1


NAV50 LS-5652P
Date: Friday, July 02, 2010 Sheet 19 of 39
5 4 3 2 1
5 4 3 2 1

+5VAMP_J
Int. Speaker Conn.
20mil JP20
1 1
272@ 272@ R1336 1 2 0_0603_5% SPK_L+ 1
J12 (19) SPKL+ SPK_L- 1
C384 C385 R1338 1 2 0_0603_5% 2
10U 6.3V M X5R 0603 H0.8 0.1U_0402_16V4Z (19) SPKL- R1337 1 0_0603_5% SPK_R+ 2
+5VS 2 2 1 1 +5VAMP_J 2 3 3 G1 5
D 2 2 (19) SPKR+ R1339 1 0_0603_5% SPK_R- D
(19) SPKR- 2 4 4 G2 6
@ JUMP_43X39
ACES_88266-04001
CONN@
+5VAMP_J

1
272@

16
15
6
U79 @ R1405 @ R1406
100K_0402_5% 100K_0402_5%

PVDD1
PVDD2
VDD
272@
C1183 SPK_R- SPK_R+ SPK_L- SPK_L+

2
0.47U_0603_10V7K
1 2 7 2 GAIN0
RIN+ GAIN0

3
3 GAIN1
272@ 272@ GAIN1 @ @

1
1 2 1 2 AMP_C_RIGHT 17 RIN-
272@ 272@ D44 D45
(19,21) AMP_RIGHT C1184 R94 0_0402_5% SPKR+ R1407 R319 PJDLC05C_SOT23-3 PJDLC05C_SOT23-3
18
0.47U_0603_10V7K ROUT+ 100K_0402_5% 100K_0402_5%

272@ 14 SPKR-

2
C1185 1 ROUT-
2 0.47U_0603_10V7K 9

1
LIN+
4 SPKL+
272@ 272@ LOUT+
1 2 1 2 AMP_C_LEFT 5
(19,21) AMP_LEFT C397 R83 0_0402_5% LIN- SPKL-
8 NU D44 & D45 0623
0.47U_0603_10V7K LOUT-

20081029 Update to 6dB

12
C NC C

EC_MUTE# BYPASS
10 Keep 10 mil width
19
(19,24) EC_MUTE# SHUTDOWN
2
272@
GND5
GND1
GND2
GND3
GND4 C398
0.47U_0603_10V7K
1
21
20
13
11
1

TPA6017A2_TSSOP20

Headphone JACK
JHP1

272@
20mil 3

(19,21) HP_LEFT HP_LEFT 1 2 HPOUT_L_1 1 2 HPOUT_L_2 1


R1393 56.2_0402_1% L26 FBM-11-160808-700T_0603
(19,21) HP_RIGHT HP_RIGHT 1 2 HPOUT_R_1 1 2 HPOUT_R_2 2
R1408 56.2_0402_1% L25 FBM-11-160808-700T_0603 5
272@ 20mil HP_PLUG#
(19) HP_PLUG# 6
1 1
C485 C486 4 SHLD1
330P_0402_50V7K 330P_0402_50V7K
2 2
SINGA_2SJ2285-112252
B CONN@ B

MIC1_VREFO MIC1_VREFO
6/19 Update Headphone connector
2

272@ 272@
D26 D27
RB751V-40TE17_SOD323-2 RB751V-40TE17_SOD323-2
1

D46 D47

MIC1_VREFO_L 2 1 1 2 MIC1_VREFO_R

RB751V-40TE17_SOD323-2 RB751V-40TE17_SOD323-2
1

271@ 271@
R1409 R1410 MIC JACK
4.7K_0402_5% 4.7K_0402_5%
JMIC1
2

20mil L28 3
FBM-11-160808-700T_0603
1 2 MIC2_L_1 1 2 MIC2_L_2 1
(19) MIC1_L
R1411 1K_0603_1%
1 2 MIC2_R_1 1 2 MIC2_R_2 2
(19) MIC1_R
R404 1K_0603_1% L27 5
20mil FBM-11-160808-700T_0603
MIC_PLUG# 6
(19) MIC_PLUG#
1 1
C488 C489 4 SHLD1
220P_0402_50V8J 220P_0402_50V8J
2 2
A A
SINGA_2SJ2285-112252
CONN@

6/19 Update MIC connector


Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/05 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Amplifier & Audio Jack
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 20 of 39
5 4 3 2 1
5 4 3 2 1

D D

HD Audio Codec
+3VS_DVDD

+AVDD_HDA
+3VS_DVDD

+AVDD_HDA 40mil
20mil 20mil

271@

25

38

9
U80

DVDD_IO
AVDD1

AVDD2

DVDD
14 35 AMP_LEFT (19,20)
NC LINE_OUT_L
15 NC LINE_OUT_R 36 AMP_RIGHT (19,20)
16 39 PVDD1_AUDIO
C MIC2_L HP_OUT_L PVDD1_AUDIO (19) C
17 41 N18123238 20mil
MIC2_R HP_OUT_R N18123238 (19)
23 45 N18123244 20mil
LINE1_L NC N18123244 (19)
24 46 PVDD2_AUDIO
LINE1_R DMIC_CLK PVDD2_AUDIO (19)
18 43 N18123239
CD_L NC N18123239 (19)
20 44 20mil N18123242
CD_R NC N18123242 (19)
N18123167 19
(19) N18123167 CD_GND
BIT_CLK 6 HDA_BITCLK_AUDIO (13,19)
MIC1_C_L 21
(19) MIC1_C_L MIC1_L
MIC1_C_R 22 8 HDA_SDIN0_AUDIO
(19) MIC1_C_R MIC1_R SDATA_IN HDA_SDIN0_AUDIO (19)
12 37 N18123190
(19) MONO_IN PCBEEP MONO_OUT N18123190 (19)
29 N17000325
LINE1_VREFO N17000325 (19)
(13,19) HDA_RST_AUDIO# 11
RESET#
GPIO1
31 10mil MIC1_VREFO_L
(13,19) HDA_SYNC_AUDIO 10
SYNC
MIC1_VREFO_L
28 10mil MIC1_VREFO
(13,19) HDA_SDOUT_AUDIO 5
SDATA_OUT HP_RIGHT
MIC1_VREFO_R
32 20mil HP_RIGHT (19,20)
N17000410 2
(19) N17000410 GPIO0
SENSE_A
3
GPIO3 MIC2_VREFO
30 10mil MIC1_VREFO_R
(19) SENSE_A 13
SENSE_B SENSE A CODEC_VREF
(19) SENSE_B 34 27 CODEC_VREF (19)
SENSE B VREF
N16999461 47 40 N16999452
B (19) N16999461 EAPD JDREF N16999452 (19) B
48 33 HP_LEFT
SPDIFO NC HP_LEFT (19,20)
20mil
N18122593 4 26
(19) N18122593 DVSS1 AVSS1
7 42
DVSS2 AVSS2
ALC271X-GR QFN 48P CODEC

DGND AGND

Sense Pin Impedance Codec Signals


39.2K PORT-A (PIN 39, 41)

20K PORT-B (PIN 21, 22)


SENSE A
10K PORT-C (PIN 23, 24)
A A

5.1K PORT-D (PIN 35, 36)

39.2K PORT-E (PIN 14, 15)

20K PORT-F (PIN 16, 17) Security Classification Compal Secret Data Compal Electronics, Inc.
SENSE B
Issued Date 2006/08/05 Deciphered Date 2007/8/18 Title
10K PORT-G (PIN 43, 44) Codec ALC271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
5.1K PORT-H (PIN 45, 46) 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 21 of 39
5 4 3 2 1
、R33
5 4 3 2 1

J14 U1 close to JREAD1


08/06 Add R32
+3VS 2 1 VCC33
2 1 U28 6252@ U28
@ JUMP_43X39
+VCC_4IN1 28 15 6252@
CrdVcc VddA R1344
+3VS_READER 29 SysVcc VccA 10
J13 VCC33 30 100_0402_1%
+3VS_READER Vcc33O SMCEZ SMCEZ_C
+3VALW 2 2 1 1 VCC18 31 Vcc18O xDCeZ 7 1 2
33 23 SMCLE
@ JUMP_43X39 Thermo Pad xDCle SMALE_CLK 6250@
xDAle 24
22 SMBSYZ_SDCMD 6252@
R1345 xDBsyZ R1346
(12) USB20_P4 14 D+
12K_0402_1% 13 3 SMWE_MSINS_SDWP 100_0402_1%
(12) USB20_N4 D- xDWeZ
1 2 REXT 12 25 SMREZ 1 2 SMREZ_C
D XTLI Rref xDReZ SMWPZ R1344 R1346 D
1 1 8 EClkin xDWpZ 32
Clock from M/B 26 SDCDZ
C1054 SdCdZ SMCDZ_MSINSZ
C1055 27
10U 6.3V M X5R 0603 H0.8 xDCdZ
0.1U_0402_25V4K
2 2 @ CARD_D0 CARD_LED_R#
17 1
CARD_D1 xDData0 LedZ
18 xDData1
CARD_D2 20 2 1 2
xDData2 ResetZ VCC33
CARD_D3 21 6250@

、R1348
xDData3 6250@
CARD_D4 19 R1357
CARD_D5 xDData4 4.7K_0402_5%
4 16
CARD_D6 xDData5 VssA @
CARD_D7
5
6
xDData6
xDData7
GndA
NC
11
9 XTLO 08/06 Add R1347
UB6252NF A2-110 QFN 32P
HW TRAP JUMPER 0: NC, 1: Short

If use external crystal(Y4), R1394 6252@


470_0402_5%
U1 will change UB6252 SMCEZ 1 2 VCC33

VCC33 R1395 6252@


470_0402_5%
+VCC_4IN1 +3VS SMREZ 1 2 VCC33
VCC33

、R1348 is NC

1
when you use UB6250 ,R1347
0_0402_5% R1354

、C1057 close to U1

1
C @ @ R1359 10K_0402_5% C
C1056

1
R1360 R1353 @

2
10K_0402_5% 10K_0402_5% @ R1358

2
+VCC_4IN1 20mils VCC18 20mils R1361 0_0402_5%
0_0402_5% 1 2

2
2
G
1 1 1 1 D31
@ @
C1056 C1057 C1058 C1059 CARD_LED_R# 3 1 1 2 CARD_LED# (23)
10P 50V J NPO 0402 10U 6.3V M X5R 0603 H0.8 0.1U_0402_25V4K

D
4.7U_0603_6.3V6K
2 2 2 2 Q37
2N7002W-T/R7_SOT323-3 RB751V_SOD323

1 2

0_0402_5%
R1355
@
VCC33 20mils

+VCC_4IN1
07/02 Update JREADER1 Card Reader Connector
2 1 1
@
C1060 C1061 C1062
0.01U_0402_16V7K 0.1U_0402_25V4K 4.7U_0603_6.3V6K
1 2 2

2
B 10U_0805_10V4Z B
JREAD1 @ 1 C1220 1
+VCC_4IN1 22 11 +VCC_4IN1 R1447
XD-VCC SD4-VDD 100K_0402_5% C1226
MS9-VCC 18
CARD_D0 30 4.7U_0603_6.3V6K

1
CARD_D1 XD10-D0 SMALE_CLK C1063 1 2 2
07/02 Revised C1053 to 0.01u ByPass Capacitors CARD_D2
29
28
XD11-D1
XD12-D2
SD5-CLK
SD7-DAT0
9
4 CARD_D0
2
CARD_D3 27 3 CARD_D1 10P 50V J NPO 0402
CARD_D4 XD13-D3 SD8-DAT1 CARD_D2 JREAD2
26 21
CARD_D5 XD14-D4 SD9-DAT2 CARD_D3 CARD_D3
25 XD15-D5 SD1-DAT3 19 1 D3
CARD_D6 24 16 SMBSYZ_SDCMD SMBSYZ_SDCMD 2
CARD_D7 XD16-D6 SD2-CMD SDCDZ CMD
23 1 3
XD17-D7 SD-CD SMWE_MSINS_SDWP VSS1
SD-WP 2 4 VDD
SMWE_MSINS_SDWP SMALE_CLK
4/30 Add CLK_SD_48M SMWPZ
33
32
XD07-WE
XD08-WP SD6-VSS 6
5
6
CLK
VSS2
SMALE_CLK 34 13
SMCDZ_MSINSZ XD06-ALE SD3-VSS CARD_D0
39 7
SMBSYZ_SDCMD XD01-CD CARD_D1 D0
38 8
6250@ SMREZ_C XD02-R/B @ C1064 CARD_D2 D1
37 9
SMCEZ_C XD03-RE SMALE_CLK SMWE_MSINS_SDWP D2
(8) CLK_48M_CR 1 2 36 17 1 2 10
R1396 0_0402_5% SMCLE XD04-CE MS8-SCLK CARD_D0 SDCDZ WP
35 10 11
XD05-CLE MS4-DATA0 CARD_D1 10P_0402_25V8K CD
MS3-DATA1 8
31 12 CARD_D2
XTLI XD GND MS5-DATA2 CARD_D3
1 2 40 XD GND MS7-DATA3 15
14 SMCDZ_MSINSZ
MS6-INS
1

C1065 7 SMWE_MSINS_SDWP
R1397 18P 50V J NPO 0402 MS2-BS SMCDZ_MSINSZ
MS1-VSS 5
1

@ 33_0402_5% 6252@ Y9 41 20 12
SD CD/WP GND MS10-VSS GND1
42 13
1

SD CD/WP GND GND2


del big package
2

1 T-SOL_144-1300302600_NR 1
CONN@ TAITW_PSDBTC09GLBS1N14N0
A @ C1066 C1067 CONN@ A
2

22P_0402_50V8J 12MHZ_16PF_X5H012000FG1H-X 0.1U_0402_25V4K


2 2
co-lay 2 in 1 CONN
2

6252@

1 2 XTLO
EMI
C1068
18P 50V J NPO 0402 Only UB6252
Security Classification Compal Secret Data Compal Electronics, Inc.
6252@ Issued Date 2009/01/22 2009/11/20 Title
need to use XTLI and XTLO Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Card reader
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 22 of 39
5 4 3 2 1
ADD LED PCB CONN 06/12 +3VS

Change JP18 to NEW P/N 06/23


LED PCB CONN 09/03 Change +5VALW , +5VS to +3VALW +3VS
JP18
1
+3VALW 1
1 C411 BT@
(24) PWR_LED# 2 2
(24) PWR_SUSP_LED# 3 0.1U_0402_16V4Z
3 2
(24) BATT_GRN_LED# 4
4
(24) BATT_AMB_LED# 5 5 R501
MEDIA_LED# 6 6
7
8
7
8
(18,24) BT_ON# 2 1
BT MODULE CONN
9 10K_0402_5%
9
+3VS 10
10
11 17
11 GND BT@
(17,18) WWAN_LED# 12 12 GND 18
(17,18) WLAN_LED# 13 +3VS BT@ +3VS_BT
13 Q35
14
14 AO3413_SOT23-3 BT@
15 15
16 C502
16

D
3 1 2 1
ACES_85201-1605N
0.1U_0402_16V4Z

G
2
CONN@

+3VS_BT
+3VS
JBT1
1 1
2
USB20_P6 2
3 5
5

U29 (12) USB20_P6 3 GND


(12) USB20_N6 USB20_N6 4 6
2 B 4 GND
P

(22) CARD_LED# MEDIA_LED#


4
SATA_LED# Y
(11) SATA_LED# 1 ACES 88266-04001
A
G

CONN@
NC7SZ08P5X_NL_SC70-5
3

Add U29 5/14

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LED CONN / BT CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 23 of 39
+3VALW
+EC_AVCC Change R1292 to 0 ohm for BRD ID R01 (EVT) 06/24
L16
1 1 1 1 1 1

0.1U_0402_16V4Z
C514

0.1U_0402_16V4Z
C515

0.1U_0402_16V4Z
C516

0.1U_0402_16V4Z
C517

1000P_0402_50V7K
C521

1000P_0402_50V7K
C519
+3VALW 1 2 +EC_AVCC
MBK1608121YZF_0603 2 1
C518 R1292 +3VALW
C520 2 2 2 2 2 2
@

111
125
0.1U_0402_16V4Z 1000P_0402_50V7K U6 Ra

22
33
96

67
9

2
1 ECAGND 2
2 1
R1288 R1291

VCC
VCC
VCC
VCC
VCC
VCC

AVCC
0_0402_5% 100K_0402_5%

Change to R_0402 05/14 60@

1
1 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F 21 PWR_PWM_LED1# (27)
(11) GATEA20 BEEP# BRD_ID
(11) KB_RST# 2 23 BEEP# (19)
KSO[0..15] KBRST#/GPIO01 BEEP#/PWM2/GPIO10
(11,26) SERIRQ 3 SERIRQ# FANPWM1/GPIO12 26

2
(25) KSO[0..15] 4 27 ACOFF
KSI[0..7] (13,26) LPC_FRAME# LPC_AD3 LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF (31)
5 R1292
(25) KSI[0..7] (13,26) LPC_AD3 LPC_AD2 LAD3
(13,26) LPC_AD2 7 LAD2 PWM Output 70@ 0_0402_5%
@ LPC_AD1 8 63 BATT_TEMP
(13,26) LPC_AD1 LPC_AD0 LAD1 BATT_TEMP/AD0/GPIO38 BATT_OVP BATT_TEMP (30)
22P_0402_50V8J
(13,26) LPC_AD0 10
LAD0 LPC & MISC
64 BATT_OVP Rb

1
C522 2 R1289 10_0402_5% @ BATT_OVP/AD1/GPIO39
1 2 1 65 ADP_I (31)
ADP_I/AD2/GPIO3A BRD_ID
(8) CLK_PCI_LPC 12
PCICLK AD Input AD3/GPIO3B
66
+3VALW 13 75 1 2
(4,5,13,16,17,18,26) PLTRST# EC_RST# PCIRST#/GPIO05 AD4/GPIO42 +0.89V_PG (34)
1 2 37 76 0_0402_5% R1389
+3VALW ECRST# SELIO2#/AD5/GPIO43
1 2 EC_SMB_CK1 R1290 47K_0402_5% EC_SCI# 20
(13) EC_SCI# SCI#/GPIO0E
R1297 2.2K_0402_5% 2 38
EC_SMB_DA1 C523 CLKRUN#/GPIO1D
1 2 68
R1298 2.2K_0402_5% DAC_BRIG/DA0/GPIO3C EN_FAN1
EN_DFAN1/DA1/GPIO3D 70 EN_FAN1 (4)
1 2 KSO1 0.1U_0402_16V4Z DA Output 71 IREF
1 KSI0 IREF/DA2/GPIO3E IREF (31)
R1299 47K_0402_5% 55 72
KSO2 KSI1 KSI0/GPIO30 DA3/GPIO3F CALIBRATE# (31)
1 2 56 KSI1/GPIO31
R1300 47K_0402_5% KSI2 57
KSI3 KSI2/GPIO32
58 83 EC_MUTE# (19,20)
KSI4 KSI3/GPIO33 PSCLK1/GPIO4A USB_ON#
59 KSI4/GPIO34 PSDAT1/GPIO4B 84 USB_ON# (15)
KSI5 60 85
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C PLTRST#
+3VS 61
KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D
86 PWR_PWM_LED# (27)
KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK (25)
1 2 EC_SMB_CK2 KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA (25)

1
R1307 2.2K_0402_5% KSO1 40 C1159
EC_SMB_DA2 KSO2 KSO1/GPIO21
1 2 41
R1308 2.2K_0402_5% KSO3 KSO2/GPIO22 220P_0402_50V7K
42 97

2
KSO3/GPIO23 SDICS#/GPXOA00
1 2 LIGHT_SENSOR_INT# KSO4 43 98
KSO5 KSO4/GPIO24 SDICLK/GPXOA01
KSO5/GPIO25 Int. K/B
R1492 4.7K_0402_5% 44 99
LIGHT_SENSOR@ KSO6 SDIDO/GPXOA02 LID_SW#
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW# (25)
KSO7 46 SPI Device Interface 2 1 For ESD
+5VS KSO7/GPIO27 +3VALW
KSO8 47 47K_0402_5% R1293
KSO9 KSO8/GPIO28 FRD#SPI_SO
48 119 FRD#SPI_SO (25)
KSO9/GPIO29 SPIDI/RD#
2 1 TP_CLK KSO10 49 KSO10/GPIO2A SPIDO/WR# 120 FWR#SPI_SI
FWR#SPI_SI (25)
R1301 4.7K_0402_5% KSO11 50 SPI Flash ROM 126 SPI_CLK
KSO11/GPIO2B SPICLK/GPIO58 SPI_CLK (25)
2 1 TP_DATA KSO12 51 128 FSEL#SPICS#
FSEL#SPICS# (25)
R1303 4.7K_0402_5% KSO13 KSO12/GPIO2C SPICS#
52
KSO14 KSO13/GPIO2D
53 KSO14/GPIO2E
KSO15 54 73 R1458 LIGHT_SENSOR@
KSO15/GPIO2F CIR_RX/GPIO40 WWAN_WAKEUP# (17)
81 KSO16/GPIO48 CIR_RLC_TX/GPIO41 74 1 2 LIGHT_SENSOR_INT# (26) Reserve to light sensor
82 89 0_0402_5%
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 BATT_GRN_LED# FSTCHG (31)
90 BATT_GRN_LED# (23)
BATT_CHGI_LED#/GPIO52 CAPS_LED#
91 CAPS_LED#
BATT_OVP EC_SMB_CK1 CAPS_LED#/GPIO53 BATT_AMB_LED#
R1392 1 2 1K_0402_5% (30) EC_SMB_CK1 77 SCL1/GPIO44 GPIO BATT_LOW_LED#/GPIO54 92 BATT_AMB_LED# (23)
EC_SMB_DA1 78 93 PWR_LED#
(30) EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PWR_LED# (23)
BATT_TEMP C530 1 2 EC_SMB_CK2 79 SM Bus 95 SYSON
(5,26) EC_SMB_CK2 EC_SMB_DA2 SCL2/GPIO46 SYSON/GPIO56 SYSON (28,33)
100P_0402_50V8J 80 121
ACIN (5,26) EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON (35)
C531 1 2 127
AC_IN/GPIO59 ACIN (13,31)
100P_0402_50V8J
0_0402_5% R1309 Add 0 ohm R1309 06/08
PM_SLP_S3# 6 100 1 2
(13) PM_SLP_S3# PM_SLP_S5# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_LID_OUT# EC_RSMRST# (13)
(13) PM_SLP_S5# 14 101 EC_LID_OUT# (13)
EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_ON RB751V-40TE17_SOD323-2
(13) EC_SMI# 15 EC_SMI#/GPIO08 EC_ON/GPXO05 102 EC_ON (27)
16 103 D29 @
LID_SW#/GPIO0A EC_SWI#/GPXO06 ICH_POK_EC
17 104 1 2 EC_PWROK EC_PWROK (5,13)
SUSP#/GPIO0B ICH_PWROK/GPXO06
KSO1 KSI1 KSI5 GPIO15 18
PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08
105 BKOFF# (9) R1295
19
EC_PME#/GPIO0D GPIO WL_OFF#/GPXO09
106 WL_OFF# (18) 1 2 1 2 +3VS
INVT_PWM 25 107 R1296 10K_0402_5%
(9) INVT_PWM EC_THERM#/GPIO11 GPXO10 WXMIT_OFF# (17) 0_0402_5%
WLAN_OFF# v v High FAN_SPEED1 28 108 @
(4) FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11 BT_ON# (18,23)
29 FANFB2/GPIO15
EC_TX_P80_DATA 30 Change BT_ON# from Pin98 to Pin108 06/24
(17,18) EC_TX_P80_DATA EC_RX_P80_CLK EC_TX/GPIO16
WXMIT_OFF# v v High (17,18) EC_RX_P80_CLK 31 EC_RX/GPIO17 PM_SLP_S4#/GPXID1 110 PM_SLP_S4# (13)
(27) ON/OFF# 32 112 GMCH_ENBKL (5)
PWR_SUSP_LED# ON_OFF/GPIO18 ENBKL/GPXID2
WXMIT_OFF# (23) PWR_SUSP_LED#
NUM_LED#
34
PWR_LED#/GPIO19 GPXID3
114
EC_THERM# EAPD (19)
v v Low NUM_LED# 36
NUMLED#/GPIO1A GPI GPXID4
115 EC_THERM# (13)
Swap to WLAN 116 SUSP#
GPXID5 PBTN_OUT# SUSP# (28,33,34)
117 PBTN_OUT# (13)
GPXID6 @
118
XCLKI GPXID7 LAN_WAKE# (16)
122 XCLK1
XCLKO 123 124 1 R320 2 +3VALW D30
XCLK0 V18R EC_PWROK
KSO1 20mil 1 1 2 1 VGATE (5,8,13,35)

AGND
@ C1178 100K_0402_5%
GND
GND
GND
GND
GND C524 RB751V-40TE17_SOD323-2
KSI1 WL_BTN# (13) EC_CLK 1 2

470P_0402_50V7K
@
2 2

4.7U_0603_6.3V6K
KSI5 3G_BTN# 0_0402_5% R1491 KB926QFD3_LQFP128_14X14
11
24
35
94
113

69
ECAGND

reserve PCH CLK to EC 052810


change small size 052810
C525
C527
1

22P 50V J NPO 0402


22P 50V J NPO 0402
OSC

OSC
NC

NC

X1
2

EC DEBUG PORT 32.768KHZ_12.5PF_Q13MC14610002

JP25
+3VALW 1 1
EC_TX_P80_DATA 2
EC_RX_P80_CLK 2
3 3
4
4
ACES_85205-0400 Security Classification Compal Secret Data Compal Electronics, Inc.
CONN@ Issued Date 2006/08/04 2007/8/18 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB926
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 24 of 39
5 4 3 2 1

KSI[0..7] INT_KBD Conn. To TP/B Conn.


KSI[0..7] (24)
KSO[0..15]
KSO[0..15] (24)
D JKB1 D
26 G2
25 G1
KSI0 24 JP11
KSI1 24
23 23 +5VS 1 1
KSI0 C136 1 2 100P_0402_50V8J KSO4 C104 1 2 100P_0402_50V8J KSI2 22 2
KSO0 22 TP_CLK 2
21 21 (24) TP_CLK 3 3
KSI1 C135 1 2 100P_0402_50V8J KSO5 C103 1 2 100P_0402_50V8J KSO1 20 TP_DATA 4
20 (24) TP_DATA 4
KSO2 19 5 8
19 5 GND

3
KSI2 C134 1 2 100P_0402_50V8J KSO6 C102 1 2 100P_0402_50V8J KSI3 18 6 7
KSO3 18 6 GND
17 17
KSI3 C133 1 2 100P_0402_50V8J KSO7 C101 1 2 100P_0402_50V8J KSO4 16
KSO5 16 ACES_85201-0605N
15 15
KSI4 C132 1 2 100P_0402_50V8J KSO8 C100 1 2 100P_0402_50V8J KSO6 14 D22
KSO7 14 @
13 13 CONN@
KSI5 C131 1 2 100P_0402_50V8J KSO9 C99 1 2 100P_0402_50V8J KSO8 12
KSI4 12
11 11
KSI6 C127 1 2 100P_0402_50V8J KSO10 C98 1 2 100P_0402_50V8J KSO9 10

1
KSI5 10 PJDLC05C_SOT23-3
9 9
KSI7 C126 1 2 100P_0402_50V8J KSO11 C97 1 2 100P_0402_50V8J KSI6 8
KSO10 8
7 7
KSO0 C125 1 2 100P_0402_50V8J KSO12 C96 1 2 100P_0402_50V8J KSO11 6
KSI7 6
5 5
KSO1 C124 1 100P_0402_50V8J KSO13 C95 100P_0402_50V8J KSO12
2 1 2
KSO13
4 4 NU D22 0623
3 3
KSO2 C114 1 2 100P_0402_50V8J KSO14 C93 1 2 100P_0402_50V8J KSO14 2 2
KSO15 1 1
Chage JP11 Pin define & Add D22 05/14
KSO3 C113 1 2 100P_0402_50V8J KSO15 C92 1 2 100P_0402_50V8J
ACES_85202-24051
CONN@
C
Update TP/B Conn 05/04 C

+3VALW
U75
SPI_CS# 1 8
CS# VCC SPI_CLK_R
+3VALW 3 WP# SCLK 6
7 5 SPI_SI
LID Switch 4
HOLD#
GND
SI
SO 2 SPI_SO
B MX25L512AMC-12G_SO8 B
@

Del R103 05/12


+3VALW
+3VALW

2M SPI ROM
2

Chage 2M ROM 20100603


1
VDD

C526 20mils U76


8 VCC VSS 4
1 3 0.1U_0402_16V4Z
OUTPUT LID_SW # (24) 2
C155 3
0.1U_0402_16V4Z W
10P_0402_50V8J

1
GND

7 HOLD
2 C150
U5 FSEL#SPICS# 2 1 SPI_CS# 1
(24) FSEL#SPICS#
1

2 R1302 22_0402_5% S
SPI_CLK 2 1 SPI_CLK_R 6
(24) SPI_CLK C
APX9132ATI-TRL SOT-23 3P R1304 22_0402_5%
FW R#SPI_SI 2 1 SPI_SI 5 2 SPI_SO 2 1 FRD#SPI_SO
(24) FW R#SPI_SI D Q FRD#SPI_SO (24)
R1305 22_0402_5% R1306 22_0402_5%
SST25LF080A_SO8-200mil

C528
2 1 SPI_CLK_R
10P_0402_50V8J
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/TP/LID SW/ SPI
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Friday, July 02, 2010 Sheet 25 of 39
5 4 3 2 1
5 4 3 2 1

D
TPM1.2 on board +3VS D

1
@
J16

1
JUMP_43X39

+3VALW

2
TPM@
1 2 TPM_XTALI

2
C1227 15P 50V J NPO 0402

Y10

1
TPM@
R1459
2 1 1 1 1 1
NC OSC

0.1U_0402_16V4Z
C1228

0.1U_0402_16V4Z
C1229

0.1U_0402_16V4Z
C1230

0.1U_0402_16V4Z
C1231
10M_0402_5%
3 4
NC OSC TPM@
ALS (Ambient Light Sensor)

2
2 2 2 2
32.768KHZ_12.5PF_Q13MC14610002 TPM@ TPM@ TPM@ TPM@
1 2 TPM_XTALO
C1232 15P 50V J NPO 0402
TPM@

24
19
10

5
Place closed to EC U81

VSB
VDD
VDD
VDD
TPM@1
TPM@ R1464 2 0_0402_5% 26
(13,24) LPC_AD0 LAD0
TPM@1 R1460 2 0_0402_5% 23
(13,24) LPC_AD1 LAD1
TPM@1 R1461 2 0_0402_5% 20 JP26
(13,24) LPC_AD2 LAD2 +3VS
TPM@1 R1462 2 0_0402_5% 17 6 TPM_GPIO T86 1
(13,24) LPC_AD3 LAD3 GPIO +3VS 1
TPM@1 R1465 2 0_0402_5% 22 2 TPM_GPIO2 T87 2
(13,24) LPC_FRAME# LFRAME# GPIO2 (5,24) EC_SMB_CK2 2
R1463
(4,5,13,16,17,18,24) PLTRST# 16
LRESET#
Base I/O Address (5,24) EC_SMB_DA2 3
3

1
C TPM@1 LPC_PD# 0 = 02Eh C
+3VS 2 28 LPCPD# (24) LIGHT_SENSOR_INT# 4 4
4.7K_0402_5%
(11,24) SERIRQ 27
SERIRQ
1 =* 04Eh R1466 5
5
8/31 HP CLK_PCI_TPM 21 4.7K_0402_5% 6
(8) CLK_PCI_TPM LCLK GND1
7
@ 1 2 2 @ 1 SLB 9635 TT 1.2 R1467 R1468 TPM@ GND2

2
+3VS 10P_0402_50V8J C1233 R1435 10_0402_5% 15 8 1 2 1 2
CLKRUN# TEST1 0_0402_5% 4.7K_0402_5% ACES_88266-05001
TESTB1/BADD 9
TPM@ @
1

7 PP CONN@
R1437
@ 4.7K_0402_5% 3
TPM_XTALO NC
14 12
XTALO NC
1
2

TPM_XTALI NC
13
XTALI/32K IN
1

GND
GND
GND
GND
R1438
TPM@ 0_0402_5%
SLB 9635 TT 1.2_TSSOP28

25
18
11
4
TPM@
2

6/30 HP

+3VS
B B

ST LIS33DE(G-Sensor)
1

@
J17
1

JUMP_43X39
2
2

C1234 C1235
10U_0603_6.3V6M

0.1U_0402_16V4Z
G SENSOR@

1 1
G SENSOR@

2 2

U82
14
VDD G_SENSOR_INT#
11 G_SENSOR_INT# (11)
INT_1
1
VDD_IO
INT_2 9

2
+3VS R1469 1 2 3.4K_0402_1% 8
G SENSOR@ CS R1473
R1470 1 2 I2C_DATA_GS 6 10K_0402_5%
(7,8,17,18) CLK_SMBDATA SDA/SDI/SDO
G SENSOR@ 0_0402_5% 7 G SENSOR@
R1471 1 I2C_CLK_GS SDO/SA0
(7,8,17,18) CLK_SMBCLK 2 4 SCL/SPC 1
G SENSOR@ 0_0402_5%
2
NC_1
3 5
NC_2 GND_1
Add R1440, R1441 1/13 GND_2
12
10 RSVD_1 GND_3 13
A A
15 16
RSVD_2 GND_4

LIS331DLTR_LGA16_3X3
G SENSOR@

P/N SA00003VT00
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2009/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TPM/G-Sensor/Light sensor
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-6221P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, July 01, 2010 Sheet 26 of 39
5 4 3 2 1
5 4 3 2 1

Add For NAV50 07/06


09/03 Change +5VS to +3VS
ON/OFF Button Power Button Logic
+3VS
PWR_PWM_LED# SW1
3 4
(BLUE) ON/OFFBTN# ON/OFFBTN# TOP Side
@ +3VALW

1
D D
100_0402_1% R186 2 1
1 2
0_0805_5%

2
NAV70@ R1388 D42
EVQPLMA15 SPST PANASONIC H1.5

2
2 PJSOT24C_3P_C/A_SOT-23
@ R1347
R194 2 1
0_0805_5% 100K_0402_5%
2

1
LED1

1
HT-191NB5-DT BLUE 0603 FOR EMI Bottom Side D14
2 ON/OFF#
ON/OFF# (24)
ON/OFFBTN# 1
NAV70@
3 51ON#
51ON# (29)
1

PWR_PWM_LED# C1169 1 2 @ 100P_0402_50V8J


DAN202U_SC70
ON/OFFBTN# C1170 1 2 @ 100P_0402_50V8J
10mil

1
2
PWR_PWM_LED# C4 D1 @
PWR_PWM_LED# (24)
1000P_0402_50V7K RLZ20A_LL34
1
+3VS

2
+3VS
(BLUE)

1
D

1
(BLUE) EC_ON 2 Q1
PAV70@ 100_0402_1% (24) EC_ON
R1483 G 2N7002W-T/R7_SOT323-3

2
1

S <BOM Structure>

3
100_0402_1% R3

2
R1480 Change to SC591NB5A20 061110 10K_0402_5%
PAV01@

2
C C

1
2

LED3
PAV70@ HT-191NB5-DT BLUE 0603
2

LED2
HT-191NB5-DT BLUE 0603

1
PAV01@ 10mil
1 2 PWR_PWM_LED#
1

R1484 PAV70@ 0_0402_5% PWR_PWM_LED# (24)


10mil
PWR_PWM_LED1# 1 2 PWR_PWM_LED1#
PWR_PWM_LED1# (24) R1485 PAV01@ 0_0402_5% PWR_PWM_LED1# (24)
10mil

H8
H H22
H_3P2X3P7N H_3P2x3P5N H_3P2x3P5N
@
1

B B

H16 H9 H1 H7 H17
H H H H H H2 H23 H4
H_2P6 H_2P8 H_2P8 H_2P8 H_2P8
@ @ @ @ @
1

H18 H19 H3
H H H
H5
H_3P2 @ @ @ H_3P2N H_3P2N
1

H11
H
H_3P3N
@
A A
1

FM2 FM4 FM3 FM1

@ @ @ @ FIDUCIAL_C40M80
1

H20 H24
H H_3P4X3P2N Security Classification Compal Secret Data Compal Electronics, Inc.
H_3P4X3P2N Issued Date 2006/08/04 Deciphered Date 2007/8/18 Title
@
ON/OFF /SCREW
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 27 of 39
5 4 3 2 1
A B C D E

Change R51 R57 R70 R63 R317 R114 R190 to 0402 SIZE 04/30
Change C221 C218 C223 C 191 C201 C170 C392 C393 C394 to 0603 SIZE 04/30

+5VALW TO +5VS +3VALW TO +3VS


1 1
+5VALW +5VS +3VALW +3VS

SI4800BDY-T1-E3_SO8 Q19 SI4800BDY-T1-E3_SO8 Q15


8 1 8 1
7 2 7 2

2
6 3 1 1 6 3 1 1
5 C223 C219 470_0402_5% 5 C170 C176 470_0402_5%
1 1 1 1
C221 C218 C191 C201
10U_0603_6.3V6M R190 10U_0603_6.3V6M 1U_0603_10V4Z R114

4
10U_0603_6.3V6M 2 2
1U_0603_10V4Z 10U_0603_6.3V6M 10U_0603_6.3V6M 2 2

3 1
2 2 2 2
10U_0603_6.3V6M

3
Q12B
+VSB 1 2 5VS_GATE Q17B R139 2N7002DW-T/R7_SOT363-6 5 SUSP
R187 2N7002DW-T/R7_SOT363-6 5 SUSP 1 2
+VSB
22K +-5% 0402 1 33K +-5% 0402

4
6

C208 1

6
C179
Q17A 0.1U 25V K X5R 0402
SUSP 2 2 Q12A 0.1U 25V K X5R 0402
2N7002DW-T/R7_SOT363-6 SUSP 2 2
2N7002DW-T/R7_SOT363-6
1

1
+5VALW

2
R141
100K_0402_5%
2 2
+1.8V to +1.8VS

1
+1.8V +1.8VS
SYSON#
SI4800BDY-T1-E3_SO8 Q27
8 1
7 2 1 1
2

6 3 C394 C395

6
470_0402_5%
1U_0603_10V4Z

1 1 5
C392 C393 10U_0603_6.3V6M ADD +5VS +VCCP +0.89V Cap for EMI
10U_0603_6.3V6M

2 2 R317
10U_0603_6.3V6M

Q14A
4

SYSON 2
(24,33) SYSON
1

2 2 2N7002DW-T/R7_SOT363-6

1
3

+VCCP +0.89V +1.8V


+5VS +1.8V
Q28B
2N7002DW-T/R7_SOT363-6 5 SUSP 1 1 1
1.8VS_GATE 1 @ C1173 @ C1174 @ C1175 1
+VSB
R318 @ C1172 @ C1176
4

0.01U_0402_25V7K

0.01U_0402_25V7K

0.01U_0402_25V7K
200K +-1% 0402 1 2 2 2

0.01U_0402_25V7K

0.01U_0402_25V7K
C396
6

2 2
0.1U 25V K X5R 0402
Q28A 2
SUSP 2
2N7002DW-T/R7_SOT363-6 +0.9VS
1

3 3

RTCVREF +5VALW

2
R172 R173
100K_0402_5% 100K_0402_5%
@

1
+1.5VS +VCCP +0.9VS +1.8V SUSP
(34) SUSP
2

3
470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5%

R51 R57 R70 R63 Q14B


(24,33,34) SUSP# 5
2N7002DW-T/R7_SOT363-6
1

4
3

Q6B Q6A Q8B Q8A


2N7002DW-T/R7_SOT363-6 5 SUSP 2 SUSP 5 SUSP 2 SYSON#
@ @
@ @ 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6 2N7002DW-T/R7_SOT363-6
4

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 28 of 39
A B C D E
A B C D

VIN
1
PL1 1

HCB2012KF-121T50_0805
DC_IN_S1 1 2

SP02000GC00
PJP1

1
6 GND 4 4
5 3 PC3 PC4 PC5 PC6
GND 3 1000P_0402_50V7K 100P_0402_50V8J 100P_0402_50V8J 1000P_0402_50V7K
2

2
2
1 1

ACES 88266-04001
CONN@

2
- PBJ1 + +RTCBATT
2

2 1 +RTCBATT

ML1220T13RE
45@

PJ1 PJ2
VIN +3VALWP 2 2 1 1 +3VALW +5VALWP 2 2 1 1 +5VALW
JUMP_43X118 JUMP_43X118

.1U_0402_16V7K

.1U_0402_16V7K
1

1
2

PC194

PC193
PD2

2
RLS4148_LL34-2
1
1

PR10 PR11
68_1206_5% 68_1206_5% PJ4
PD3 PJ3 +VCCPP 2 1
RLS4148_LL34-2 PQ1 2 1 +VCCP
+1.8VP 2 1 +1.8V
2

3
2 1 JUMP_43X118
3

.1U_0402_16V7K

1
BATT+ N1 JUMP_43X118

.1U_0402_16V7K
2 1 3 1
VS

PC196
PC195

2
1

2
1

PR13 PC13
100K_0402_1% 0.22U_0603_25V7K PC14
0.1U_0402_25V6
2

PR14 TP0610K-T1-E3_SOT23-3
2

22K_0402_1%
1 2
(27) 51ON# PJ5

+0.89VP 2 2 1 1 +0.89V
JUMP_43X79

.1U_0402_16V7K

1
PC197

2
PR16 PR17
560_0603_5% 560_0603_5%
1 2 1 2 +3VLP
+CHGRTC

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN & DETECTOR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 29 of 39
A B C D
A B C D

PH1 under CPU botten side :


CPU thermal protection at 92 degree C
Recovery at 72 degree C
1 1

VMB VL
PJP2 PL2
1 HCB2012KF-121T50_0805
1
2 2 BATT_S1 1 2 BATT+
3 B/I
3 TS
4 4

1
5 EC_SMCA
5 EC_SMDA PC21 PC22 PC23 PR28 PR29
6 6
7 1000P_0402_50V7K 0.01U_0402_25V7K 0.1U_0603_25V7K VL 10K_0402_1% 22.1K_0402_1%

2
7
8 8
9

2
GND

2
10 PU3
GND @ PR23 1 VCC TMSNS1 8
SUYIN_200275MR008G15QZR 100K_0402_1%
2 GND RHYST1 7 2 1
2

1
3 6 PR31
OT1 TMSNS2
PR21 PR22 (32) MAINPWON 15K_0402_1%
100_0402_1% 100_0402_1% 4 5 2 1
OT2 RHYST2
1

G718TM1U_SOT23-8 @ PR169
1

PR25 47K_0402_1%
PR220 6.49K_0402_1%
1K_0402_5% 2 1 +3VALW P

1
PH2 @ PH1
2

100K_0402_1%_NCP15W F104F03RC 100K_0402_1%_NCP15W F104F03RC


PR27

2
2
1K_0402_1% 2
2

BATT_TEMP (24)

EC_SMB_CK1 (24)

EC_SMB_DA1 (24)

@ PR236
0_0805_5%
1 2

PQ3

B+ 3 1 +VSB
1

PR30
100K_0402_1% PC200
TP0610K-T1-E3_SOT23-3 0.1U_0402_25V6
2

3 3

VL
2

PR32
22K_0402_1%
2

PR34
1

100K_0402_1%
1

D
1

2 PQ4
(32) SPOK G 2N7002W -T/R7_SOT323-3
S
3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 30 of 39
A B C D
A B C D

B+

P2 SI7121DN-T1-GE3_POW ERPAK8-5 P3 B+ CHG_B+ SI7121DN-T1-GE3_POW ERPAK8-5


PD9 PQ10 PR57 0.05_1206_1% PJ8 PQ11
VIN 2 1 1 1 4 2 2 1 1 1
2 2
B340A_SMA2 3 5 2 3 JUMP_43X118 CSIN 3 5

0.1U_0603_25V7K
CSIP PR58

5600P_0402_25V7K

2200P_0402_25V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K
4

4
1 1

PC165
47K_0402_1%

1
PQ12

0.1U_0603_25V7K
1 2
VIN VIN
1

PC52

PC50

PC53

PC54
DTA144EUA_SC70-3

PC51
PR60 @ PD10

191K_0402_1%
1

2
PR59 2 200K_0402_1% 1SS355TE-17_SOD323-2

1
47K_0402_1% PR62 1 2 ACOFF

2
6251VDD 10K_0402_1%
2

PR221
@ PR64

1 1
PD1 200K_0402_1%
1

2
1
ACSETIN RB751V-40_SOD323-2 ACSETIN

1000P_0402_25V8J
1 2 VIN
1

@ PD12 PC55

1 1

1
1SS355TE-17_SOD323-2 2.2U_0603_6.3V6K PD13 @

14.3K_0402_1%
2

1
PC209
10_1206_5%
1 2 PQ16 1SS355TE-17_SOD323-2

PR222

PR223
DTC115EUA_SC70-3 2 1 2
Vin1 2 PR65

2
PQ15 10K_0402_5%

2
DTC115EUA_SC70-3 2 1 PU5

2
(24) FSTCHG @

0.1U_0603_25V7K
3
1

1
D DCIN D
1 2 1 24 2 1
3

VDD DCIN
1

1
PC58
2 PACIN

100K_0402_1%
2
G @ PC56 PC57 G

PR67
S PQ17 PR66 .1U_0402_16V7K 2 23 ACPRN 0.22U_0603_25V7K S @ PQ18
3

3
2N7002W -T/R7_SOT323-3 150K_0402_1% ACSET ACPRN PR68 2N7002W -T/R7_SOT323-3
20_0402_5% PR84
2

2
6251_EN 3 22 1 2 CSON 0_0402_5%
EN CSON

5
PC59 Vin1 1 2
0.047U_0402_16V7K
4 21 1 2 CSOP

1
CELLS CSOP PR69
PC60 6800P_0402_25V7K 20_0402_5% PQ19
2
1 2 5 20 2 1 4 AON7408L_DFN8-5 2

ICOMP CSIN
1

2
PQ20 D PR70
2 PC61 PR71 6.81K_0402_1% PC62 20_0402_5%
G 2N7002W -T/R7_SOT323-3 1 2 1 2 6 19 0.1U_0603_25V7K1 2

1
PR73 VCOMP CSIP PR72 PL5
S
3

3
2
1
0.01U_0402_25V7K 1 2 100_0402_1% 2_0402_5% 8.2UH_FDV0630-8R2M=P3_3.7A_20% PR74 0.05_1206_1% BATT+
PC63 1 2 7 18 LX_CHG 1 2 CHG 1 4
PR75 @ 100P_0402_50V8J ICM PHASE

4.7_1206_5%
5

1
22K_0402_5% (24) ADP_I 2 3

PR76
PACIN 1 2 PC64 6251VREF 8 17 DH_CHG

AON7408L_DFN8-5
PACIN VREF UGATE
PR77 1 2 PR78 PC65
62K_0402_1% 0_0603_5% 0.1U_0603_25V7K

10U_1206_25V6M

10U_1206_25V6M
PQ21
2 1 .1U_0402_16V7K 9 16 BST_CHG 1 2 BST_CHGA 2 1

2
(24) IREF CHLIM BOOT
1

1
PQ22 PR79 4

1
PC67

PC68
DTC115EUA_SC70-3 38.3K_0402_1% PD14
0.01U_0402_25V7K

1
6251VREF 1 6251aclim 6251VDDP RB751V-40TE17_SOD323-2

680P_0402_50V7K
2 10 ACLIM VDDP 15
1

PC66

2
1

1
PC69

ACOFF 2 PR80 1 26251VDD


(24) ACOFF

3
2
1

2
100K_0402_1% PR81 11 14 DL_CHG
VADJ LGATE

2
20K_0402_1% PR82
2

4.7_0603_5%
2

12 13 PC70
3

1
GND PGND 4.7U_0603_6.3V6K

ISL6251AHAZ-T_QSOP24

3 3

Iada=0~1.58A(30W) CP = 85%*Iada ; CP = 1.343A


PR83
15.4K_0402_1%
CP mode 1 2
Vaclim=2.39*(20K/(20K+38.3K))=0.8199V (24) CALIBRATE#
2

Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05) PR85
where Vaclm=0.8199V, Iinput=1.343A 31.6K_0402_1%
6251VDD
1

PR224
10K_0402_1%

1
1 2
CC=0.3~1.76A PR225
ACIN (13,24)
100K_0402_1% PR226
IREF=1.62*Icharge 10K_0402_1%
PACIN
IREF=0.486V~2.85V
2

1 2 D
3.24V==>2A

1
ACPRN 2
G PR227
S PQ32 20K_0402_1%
3

SSM3K7002FU_SC70-3
Charging Voltage
2
BATT Type CV mode
(0x15)

4
Normal 3S LI-ON Cells 4

12600mV 12.60V

VADJ-->VREF-->4.41V Security Classification Compal Secret Data Compal Electronics, Inc.


- Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title
VADJ--->Ground--->3.99V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
Vcell=(0.175*VADJ+3.99) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 31 of 39
A B C D
5 4 3 2 1

2VREF_51125

0.22U_0603_10V7K

1
PC202
D D

2
PR41 PR42
13K_0402_1% 30K_0402_1%
1 2 1 2

PR43 PR44
B++ 20K_0402_1% 19.1K_0402_1%
1 2 1 2 B++
PL11
HCB2012KF-121T50_0805
B+ 1 2 +3VLP

4.7U_0805_25V6-K @
ENTRIP2

ENTRIP1
PR228 PR229
2200P_0402_50V7K

2200P_0402_50V7K
0.1U_0603_25V7K

0.1U_0603_25V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
PC30 @

143K_0402_1% 158K_0402_1%
PC163

PC164
1 2 1 2

4.7U_0805_10V6K
1

1
PC29

PC31

PC32

PC33

PC34
2

2
5

5
PU4

PC203

ENTRIP2

VFB2

TONSEL

VFB1

ENTRIP1
VREF
PQ5 25
AON7408L_DFN8-5 P PAD

2
C PQ6 C
4 7 24 4 AON7408L_DFN8-5
VO2 VO1 SPOK (30)
8 23 PR40 PC41
PR39 VREG3 PGOOD 0_0603_5% 0.1U_0402_16V7K
1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2
1
2
3

3
2
1
0_0603_5% VBST2 VBST1
PL3 PC40 UG_3V 10
VFB=2.0V 21 UG_5V PL4
8.2UH_FDV0630-8R2M=P3_3.7A_20% 0.1U_0402_16V7K DRVH2 DRVH1 8.2UH_FDV0630-8R2M=P3_3.7A_20%
1 2 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP LL2 LL1
1

1
LG_3V LG_5V
4.7_1206_5%

12 19

4.7_1206_5%
DRVL2 DRVL1
PR37

PR38
SKIPSEL

VREG5
150U_B2_6.3VM_R45M

VCLK
1 1

GND

150U_B2_6.3VM_R45M
EN0

VIN
2

2
+ +
PC39

PC44
2 2
TPS51125RGER_QFN24_4X4

13

14

15

16

17

18
1

1
PR230
680P_0402_50V7K

680P_0402_50V7K
2 499K_0402_1% 2
PC42

PC43
PQ7 1 2 PQ8
2

2
AON7702L_DFN8-5 AON7702L_DFN8-5
B+

1
100K_0402_1%
1 2

1U_0603_10V6K
VL

1
PC204

1
PR232 PR231

PC205
4.7U_0805_10V6K
@ 0_0402_5%

2
2

2
B B
B++

1
ENTRIP1 ENTRIP2

0.1U_0603_25V7K
2
PC206
2VREF_51125

PQ33 D D
1

PQ34
2 2
2N7002W -T/R7_SOT323-3 G G 2N7002W -T/R7_SOT323-3
S S
3

+3.3VALWP Ipeak=5.731A Imax=4.012A +5VALWP Ipeak=7.0A Imax=4.9A


Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical) Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
VL 2 1 Vtrip=(10E-06 * 143K)/9-24mV=134.9mV Vtrip=(10E-06 * 158K)/9-24mV=151mV
PR233
Ilimit=134.9mV/17.9m ~134.9mV/14.5m x 1.2 Ilimit=151mV/17.9m ~151mV/14.5m x 1.2
100K_0402_1% =7.536A ~ 7.752A =8.467A ~ 8.710A
Iocp=Ilimit+Delta I/2 Iocp=Ilimit+Delta I/2
=8.081A ~ 8.297A =9.384A ~ 9.627A
1

(30) MAINPWON Delta I=1.090A (Freq=305KHz) Delta I=1.834A (Freq=245KHz)

1 2 2
A VS A

PR234
40.2K_0402_1%

0.01U_0402_16V7K
1

100K_0402_1% PQ35
1

DTC115EUA_SC70-3
PR235

@ PC207

Security Classification Compal Secret Data Compal Electronics, Inc.


2
2

Issued Date 2007/11/12 Deciphered Date 2008/11/12 Title


+5V/+3V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, July 01, 2010 Sheet 32 of 39
5 4 3 2 1
A B C D

PL12
HCB2012KF-121T50_0805
1.8V_B+ 1 2 B+

0.1U_0603_25V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K
2200P_0402_50V7K

PC75 @

PC166
1

1
PC74
PC73
5
1 1

2
PR89
300K_0402_5% 4
1 2
PR90 PR91 PQ23
1K_0402_1% 0_0603_5% AON7408L_DFN8-5
1 2 BST_1.8V 1 2
(24,28) SYSON

3
2
1
1

1
PR92 PL6

15

14
1
30K_0402_5% PC77 PU6 PC76 2.2U_FDV0630-2R2M-P3_7.2A_20%
1U_0402_6.3V6K BST_1.8V-1 1 2 1 2

EN/DEM

NC

BOOT
+1.8VP

2
2
2 13 DH_1.8V 0.1U_0603_25V7K
TON UGATE

4.7_1206_5%
PR94 3 12 LX_1.8V
VOUT PHASE

PR93
100_0603_1% 1
1 2 4 11 1 2 +5VALW

220U_B2_2.5VM_R35
AON7702L_DFN8-5
+5VALW VDD CS +

PC78
PR95

2
5 10 8.66K_0402_1%
FB VDDP

1
DL_1.8V 2

680P_0603_50V7K
6 PGOOD LGATE 9 2

PGND

PQ24

PC80
PC79

GND
4.7U_0603_6.3V6K

2
1
RT8209BGQW _W QFN14_3P5X3P5 PC82

1
4.7U_0805_10V6K

2
2
<Vo=1.8V> VFB=0.75V 2

PR96
Vo=VFB*(1+PR96/PR97)=0.75*(1+5.9K/4.12K)=1.8V 5.9K_0402_1%
Fsw=328KHz 1 2
1

PR97
4.12K_0402_1%
2

PU7 PL7
PJ7
4

1.1UH_LFA915AY-H-1R1M=P3_4.07A_20%
2 1 10 2 LX_1.05V 1 2 <Vo=1.05V> VFB=0.6V
+5VALW
PG

2 1 PVIN LX +VCCPP
JUMP_43X79 Vo=VFB*(1+PR105/PR106)=0.6*(1+124K/61.9)=1.05V

68P_0402_50V8J
9 PVIN LX 3
1

1
Ipeak=3.124A, Imax=2.187A

4.7_1206_5%
1

1
PC119
PC120 8
3
SVIN 3

22U_0805_6.3VAM PR102 PR105


6 10K_0402_1%
2

2
FB @

22U_0805_6.3VAM

22U_0805_6.3VAM
5
2

2
EN

1
NC

NC
TP

PC88

PC210
FB_1.05V
11

2
1 2 EN_1.05V
(24,28,34) SUSP#

1
1

PR99
680P_0603_50V7K
1

PC90

2K_0402_1% SY8033BDBC_DFN10_3X3 PR106


1

PR101 13.3K_0402_1%
2

30K_0402_5% PC86 2
1U_0402_6.3V6K
LX_1.05V
2
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.8VP / +VCCPP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 33 of 39
A B C D
5 4 3 2 1

(24) +0.89V_PG

+3VALW 2 1

@ PR215
D
100K_0402_1% D

PU8 PL8 <Vo=0.89V> VFB=0.6V


PJ6

4
1.1UH_LFA915AY-H-1R1M=P3_4.07A_20%
2 1 10 2 LX_SY8033B 1 2
Vo=VFB*(1+PR114/PR115)=0.6*(1+30.1K/61.9)=0.89V
+5VALW

PG
2 1 PVIN LX +0.89VP
JUMP_43X79 Ipeak=2.64A, Imax=1.848A

68P_0402_50V8J
9 PVIN LX 3

1
4.7_1206_5%
1

1
PC101
PC99 8 SVIN

PR107
22U_0805_6.3VAM PR114
6 30.1K_0402_1%

2
FB @

22U_0805_6.3VAM

22U_0805_6.3VAM
5

2
EN

1
NC

NC
TP

PC98

PC208
FB_SY8033B
(24,28,33) SUSP#

11

2
1 2 EN_SY8033B

1
1
PR108 100K_0402_5% SY8033BDBC_DFN10_3X3

680P_0603_50V7K
0.1U_0402_10V7K

LX_SY8033B
2

PC96

PC81
PR115

1
PR125 61.9K_0402_1%

2
@ 47K_0402_5%

2
2
1
C C

Ipeak=1.48A, Imax=1.036A
+1.8V
+5VALW

PC105
1U_0402_6.3V6K
2
1

PC106 PU10
4.7U_0805_6.3V6K 6 VCNTL
5 3
2

PR117 9
VIN
VIN
VOUT
VOUT 4 1 +1.5VS
10K_0402_5%

22U_0805_6.3V6M

.1U_0402_16V7K
1
1 2 8 PR118 PC107
EN

1
(24,28,33) SUSP#

PC108

PC198
7 2 0.01U_0402_25V7K
GND

POK FB 1.54K_0402_1%

2
2

@
2

2
B PR119 PC109 APL5930KAI-TRG_SO8 +1.8V B
1

@ 47K_0402_5% .1U_0402_16V7K
2

1
1

PR120
1.74K_0402_1%
PU11
2

1 6
VIN VCNTL
+3VALW
2 GND NC 5

1
PC111

1
PC110 3 7 1U_0603_6.3V6M
4.7U_0805_6.3V6K PR121 VREF NC

2
1K_0402_1% 4 8
VOUT NC
9

2
TP
APL5336KAI-TRL SOP

PR122

.1U_0402_16V7K
+0.9VS

1
0_0402_5% PQ29 D

(28) SUSP

PC112
PR123

10U_0805_6.3V6M

.1U_0402_16V7K
1 2 2

1
PC199
G 1K_0402_1% Ipeak=1A, Imax=0.7A

2
1

PC114
S

3
PC113 2N7002W -T/R7_SOT323-3

2
.1U_0402_16V7K

2
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+0.89VP/+1.5VS/+0.9VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 34 of 39
5 4 3 2 1
A B C D E F G H

(5)

(5)

(5)

(5)

(5)

(5)

(5)
CPU_VID0

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID4

CPU_VID5

CPU_VID6
(24)
VR_ON
+3VS

1
PR194

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%
1 +5VS 1
4.7K_0402_1%

+CPU_B+ PL9

2
HCB2012KF-121T50_0805

2
PR195
0_0402_5%

PR196

PR197

PR198

PR199

PR201

PR202

PR203

PR204
1 2 B+
2 13211_PWRGD PR200

2200P_0402_50V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K
(5,8,13,24) VGATE
10_0603_1%

0.1U_0402_25V6
1

1
PC121

PC116

PC147

PC148
3211_EN

VID0

VID1

VID2

VID3

VID4

VID5

VID6

2
1
3211_VCC

5
+3VS PU12 PC182
1U_0805_25V6K

32

31

30

29

28

27

26

25

2
VID0

VID1

VID2

VID3

VID4

VID5

VID6
EN
1
24 PR206 PC183 4
PR205 VCC 0_0603_5% 0.22U_0603_25V7K PQ30
1
PWRGD
10K_0402_1% 23 CPU_BOOST 1 2CPU_BOOST-1
1 2 AON7408L_DFN8-5
BST
1

2
PC184 IMON 3211_DRVH PL10
22

3
2
1
1000P_0402_50V7K DRVH 2.2U_FDV0630-2R2M-P3_7.2A_20%
(8) CLK_ENABLE# 3
2

CLKEN# 3211_SW +CPU_COREP


21 1 2
4
SW +CPU_CORE
FBRTN

1
ADP3211AMNR2G_QFN32_5X5 20 +5VS
PVCC

3
1 2 3211_FB 5
FB 3211_DRVL PR124
19 2 1
DRVL

1
PC185 PC187 3211_COMP 6 4.7_1206_5%
390P_0402_50V7K 47P_0402_50V8J COMP PC186
18 LL=5.9m ohm

2
PGND 2.2U_0603_10V6K
7
2 OCP=7.85A
GPU
1 2 1 23211_COMP-1
1 2 17 2
AGND

1
3211_ILIM 8 VID:0.75V~1.1V

CSCOMP
PR208 PC188 PR207 ILIM PC115
33

CSREF
AGND Io(max)=6.04A

RAMP

LLINE

CSFB
1K_0402_1% 470P_0402_50V8J 28K_0402_1% 680P_0603_50V7K

IREF

RPM

2
PQ31

RT
2 2

1
AON7702L_DFN8-5

10

11

12

13

14

15

16
2

PR209
2.37K_0402_1% 3211_IREF

3211_RAMP

3211_CSCOMP

3211_CSFB

3211_CSCOMP
3211_RT
2 3211_RPM
PH4
3211_CSCOMP 1

100K_0402_1%_NCP15WF104F03RC

1 2
80.6K_0402_1%

200K_0402_1%

274K_0402_1%
2

2
Avoid high dV/dt
PR210

PR211

PR212

Place RTH1 close to inductor


PR213
1 35.7K_0402_1% on the same layer
2 1

499K_0402_1%
1

1
2

PR214

1
PR150 PR158

1
0_0402_5% 0_0402_5% PC190
220P_0402_50V7K PR217
2

PC189 75K_0402_1%
1

2
1000P_0402_50V7K

2
PR219 2 1
1K_0402_1%
+CPU_B+ 2 1 3211_RAMP-1 PR218
309K_0402_1%
(6)

(6)

Connect to input caps


VSSSENSE

VCCSENSE

PC191 PC192
1000P_0402_50V7K 1000P_0402_50V7K
2

3 3
Shortest the
net trace

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 35 of 39
A B C D E F G H
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1 for PWR

Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

D D
add PR84 For design change 0.1 30 add PR84 (SD028000080 , S RES 1/16W 0 +-5% 0402) 2010.4.10 EVT
1
Change PU7 from SA000031D00(S IC RT8209BGQW WQFN 14P
Change power solution For design change 0.1 32 PWM) to SA00003RU00(S IC SY8033BDBC DFN 10P SINGLE BUCK) 2010.4.12 EVT
2
Change SY8033B Pin1 net For design change 0.1 32,33 Change SY8033B Pin1 connect Pin2 & Pin3 2010.4.13 EVT
3
Change PC101 & PC119 to SE071680J80 (S CER CAP 68P 50V J
4 Change PC101 & PC119 For design change 0.1 32,33 NPO 0402) 2010.4.13 EVT
Change PR105 from SD034100200(S RES 1/16W 10K +-1% 0402 )
Change PR105 For design change 0.1 32 to SD034100280 (S RES 1/16W 10K +-1% 0402 ) 2010.5.13 DVT
5
Change PC30 & PC32 to non-pop For cost down plan 0.1 32 2010.6.1 PVT
6
Change PL3,PL4,PL5 from SH00000JI00 to SH00000BS00
Change PL3,PL4,PL5,PL6,PL7,PL8,PL10 For TMP choke shortage issue 0.1 32 Change PL6,PL10 from SH00000FD10 to SH000000700 2010.6.1 PVT
7
Change PL7,PL8 from SH00000J300 to SH000007N00
C C

Change PD10.PD13.PC58.PR64.
8 PQ18 to non-pop For cost down plan 0.1 31 2010.6.11 PVT
Change PR84 to pop

10

11

12

13
B B

14

15

16

17

18

19

20
A A

21

22 Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title
PIR (PWR)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 36 of 39
5 4 3 2 1
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1 for PWR

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title
PIR (PWR)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 37 of 39
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR (HW)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 38 of 39
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Revised List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6221P
Date: Thursday, July 01, 2010 Sheet 39 of 39
5 4 3 2 1

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