Lenovo IdeaPad S10-2 Compal LA-5071P KIUN0 Rev1.0

A B C D E
1 1
Compal Confidential
2 2
KIUN0 Schematics Document

Intel Diamondville Processor with Calistoga(945GSE) + DDRII + ICH7M
3
2009-03-31 3
REV: 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-4421P
Date: Monday, April 06, 2009 Sheet 1 of 42
A B C D E
A B C D E
Compal Confidential Diamondville SC

Z ZZ ZZZ1 ZZZ2 ZZZ3 FCBGA8
Model Name : KIUN0 437Pins Clock Generator
File Name : LA-5071P PCB PCB PCB PCB 22x22mm CK505 page 14
1
page 4,5 1
DAZ@ DAZ@ DAZ@
CRT Conn FSB

H_A#(3..31) 400/533MHz H_D#(0..63)
page 16
RGB
Calistoga GSE Memory BUS(DDRII) DDRII-SO-DIMM
Thermal Sensor page 13
EMC1402
FCBGA998
1.8V DDRII 400/533
page 4 LCD Conn. LVDS
page 15 27x27mm
page 6,7,8,9,10
MINI Card x2
DMI
page 21
X2 mode
USB USB Port X3
2
PCI-Express ICH7M HDA
2
page 30
BGA652
31x31mm SATA
page 17,18,19,20
10/100 Ethernet BlueTooth

MINI Card x1
RTL8103E(L) page21
page 21 page 25
SSD HDD CMOS CAM
LPC BUS page 21 page 24
page24
Transfermer
3
page 25 3
Aralia Codec
ALC272
page 22
Power ON/OFF RJ45
DC/DC Interface
page 31 page 25 Card Reader
page 28 RTS5159
3VALW/5VALW
page 37
ENE KBC SPI page 26
DC IN
page 34
KB926page 27
1.5VS/0.9VS/
AMP & INT INT MIC HeadPhone & SD/MMC/MS
BATT IN 2.5VS MIC Jack
page 35 page 39 Speaker
page 22
page 22
page 23
CONN page 26
Int.KBD SPI ROM
page 29 page 27
CHARGER 1.8V/VCCP Touch Pad
page 36 page 29
4
page 38 4
CPU_CORE
page 40
Block Diagrams
B 0.1
LA-4421P
A B C D E
A B C D E
1 1
Voltage Rails
External PCI Devices
Power Plane Description S1 S3 S5
VIN Adapter power supply (19V) N/A N/A N/A
DEVICE IDSEL # REQ/GNT # PIRQ
B+ AC or battery power rail for power circuit. N/A N/A N/A
No PCI Device
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF
+VCCP VCCP switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF
+2.5VS 2.5V switched power rail ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
+5VS 5V switched power rail ON OFF OFF
2 2
+VSB VSB always on power rail ON ON ON*
+RTCVCC RTC power ON ON ON
EC SM Bus1 address EC SM Bus2 address
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Device Address Device Address
Smart Battery 0001 011X b EMC1402 100_1100
SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Full ON HIGH HIGH HIGH ON ON ON ON
S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW
S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
3
ICH7M SM Bus address 3
BOARD ID Table(Page 25) Device Address
ID BRD ID Ra Rb Vab Clock Generator 1101 001Xb

(SLG8SP556VTR)
0 R01 (EVT) NC 0 0V DDR DIMMA 1010 000Xb
1 R02 (DVT) 100K 8.2K 0.25V
2 R03 (PVT) 100K 18K 0.50V
3 R10A (MP) 100K NC 3.3V
4 4

Notes List
B 0.2
LA-4421P
A B C D E
5 4 3 2 1
<6> H_A#[3..16]
<6> H_D#[0..15] H_D#[32..47] <6>
U9A U9 U9B
H_A#3 P21 V19 H_ADS# +VCCP +VCCP H_D#0 Y11 R3 H_D#32
A[3]# ADS# H_ADS# <6> D[0]# D[32]#
H_A#4 H20 Y19 H_BNR# H_BNR# <6> H_D#1 W10 R2 H_D#33
H_A#5 A[4]# BNR# H_BPRI# H_D#2 D[1]# D[33]# H_D#34
N20 A[5]# BPRI# U21 H_BPRI# <6> Y12 D[2]# D[34]# P1
1
H_A#6 R20 H_D#3 AA14 N1 H_D#35
A[6]# D[3]# D[35]#
0
GROUP
ADDR
DATA GRP 0
H_A#7 J19 T21 H_DEFER# R22 R242 H_D#4 AA11 M2 H_D#36
H_A#8 A[7]# DEFER# H_DRD Y# H_DEFER# <6> H_D#5 D[4]# D[36]# H_D#37
N19 T19 H_DRDY# <6> 56_0402_5% 330_0402_5% N280 W12 P2
H_A#9 A[8]# DRDY# H_DBSY# N280@ H_D#6 D[5]# D[37]# H_D#38
G20 A[9]# DBSY# Y18 H_DBSY# <6> AA16 D[6]# D[38]# J3
H_A#10 M19 H_D#7 Y10 N3 H_D#39
DATA GRP 2
2
2
H_A#11 A[10]# H_BR0# H_D#8 D[7]# D[39]# H_D#40
H21 A[11]# BR0# T20 H_BR0# <6> Y9 D[8]# D[40]# G3
H_A#12 L20 H_D#9 Y13 H2 H_D#41
A[12]# D[9]# D[41]#
CONTROL
H_A#13 M20 F16 H_IERR# H_D#10 W15 N2 H_D#42
H_A#14 A[13]# IERR# H_INIT#_R R2441 H_D#11 D[10]# D[42]# H_D#43
K19
A[14]# INIT#
V16 2 1K_0402_5% H_INIT# <18> AA13
D[11]# D[43]#
L2
D H_A#15 H_D#12 H_D#44 D
J20 Y16 M3
H_A#16 A[15]# H_LOCK# H_D#13 D[12]# D[44]# H_D#45
L21
A[16]# LOCK#
W20 H_LOCK# <6> Close to CPU W13
D[13]# D[45]#
J2
H_ADSTB#0 K20 H_D#14 AA9 H1 H_D#46
<6> H_ADSTB#0 H_AP0 ADSTB[0]# H_RESET# H_D#15 D[14]# D[46]# H_D#47
T5 D17 D15 H_RS#[0..2] <6> W9 J1
<6> H_REQ#[0..4] H_REQ#0 AP0 RESET# H_RS#0 H_RESET# <6> H_DSTBN#0 D[15]# D[47]# H_DSTBN#2
PAD N21 W18 <6> H_DSTBN#0 Y14 K2 H_DSTBN#2 <6>
H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_DSTBP#0 DSTBN[0]# DSTBN[2]# H_DSTBP#2
J21 Y17 <6> H_DSTBP#0 Y15 K3 H_DSTBP#2 <6>
H_REQ#2 REQ[1]# RS[1]# H_RS#2 H_DINV#0 DSTBP[0]# DSTBP[2]# H_DINV#2
G19 U20 <6> H_DINV#0 W16 L1 H_DINV#2 <6>
H_REQ#3 REQ[2]# RS[2]# H_TRDY# H_DP#0 DINV[0]# DINV[2]# H_DP#2
P20 W19 H_TRDY# <6> V9 M4
H_REQ#4 REQ[3]# TRDY# T6 PAD DP#0 DP#2 PAD T7
R19 <6> H_D#[16..31] H_D#[48..63] <6>
REQ[4]# H_HIT# H_D#16 H_D#48
<6> H_A#[17..31] AA17 H_HIT# <6> AA5 C2
H_A#17 HIT# H_HITM# H_D#17 D[16]# D[48]# H_D#49
C19 V20 H_HITM# <6> Y8 G2
H_A#18 A[17]# HITM# H_D#18 D[17]# D[49]# H_D#50
F19 A[18]# W3 D[18]# D[50]# F1
H_A#19 E21 K17 H_D#19 U1 D3 H_D#51
H_A#20 A[19]# BPM[0]# H_D#20 D[19]# D[51]# H_D#52
A16 A[20]# BPM[1]# J18 W7 D[20]# D[52]# B4
DATA GRP 1
H_A#21 D19 H15 H_D#21 W6 E1 H_D#53
H_A#22 A[21]# BPM[2]# H_D#22 D[21]# D[53]# H_D#54
C14 A[22]# BPM[3]# J15 Y7 D[22]# D[54]# A5
ADDR GROUP 1
H_A#23 C18 K18 H_D#23 AA6 C3 H_D#55
H_A#24 A[23]# PRDY# PREQ# H_D#24 D[23]# D[55]# H_D#56
C20 J16 Y3 A6
DATA GRP 3
A[24]# PREQ# D[24]# D[56]#
XDP/ITP SIGNALS
H_A#25 E20 M17 ITP_TCK H_D#25 W2 F2 H_D#57
H_A#26 A[25]# TCK ITP_TDI H_D#26 D[25]# D[57]# H_D#58
D20 A[26]# TDI N16 V3 D[26]# D[58]# C6
H_A#27 B18 M16 ITP_TDO H_D#27 U2 B6 H_D#59
H_A#28 A[27]# TDO ITP_TMS H_D#28 D[27]# D[59]# H_D#60
C15 A[28]# TMS L17 T3 D[28]# D[60]# B3
H_A#29 B16 K16 ITP_TRST# H_D#29 AA8 C4 H_D#61
H_A#30 A[29]# TRST# H_D#30 D[29]# D[61]# H_D#62
B17 A[30]# BR1# V15 V2 D[30]# D[62]# C7
H_A#31 C16 H_D#31 W4 D2 H_D#63
H_A#32 A[31]# H_PROCHOT#_R H_DSTBN#1 D[31]# D[63]# H_DSTBN#3
A17 A[32]# PROCHOT# G17 1 2 H_PROCHOT# <40> <6> H_DSTBN#1 Y4 DSTBN[1]# DSTBN[3]# E2 H_DSTBN#3 <6>
H_A#33 B14 E4 H_THERMDA R24 22_0402_5% H_DSTBP#1 Y5 F3 H_DSTBP#3
<6> H_DSTBP#1 H_DSTBP#3 <6>
THERM
H_A#34 A[33]# THRMDA H_THERMDC H_DINV#1 DSTBP[1]# DSTBP[3]# H_DINV#3

B15 A[34]# THRMDC E5 Close to CPU <6> H_DINV#1 Y6 DINV[1]# DINV[3]# C5 H_DINV#3 <6>
H_A#35 A14 H_DP#1 R4 D4 H_DP#3
H_ADSTB#1 A[35]# H_THERMTRIP# T9 PAD DP#1 DP#3 PAD T8
<6> H_ADSTB#1 B19 ADSTB[1]# THERMTRIP# H17 H_THERMTRIP# <6,18>
H_AP1 M18 +CPU_GTLREF A7 T1 COMP0 1 R243 2 27.4_0402_1%
T4 PAD AP1 R52 @ ACLKPH GTLREF COMP[0] COMP1
1 2 1K_0402_5% U5 T2 1 R53 2 54.9_0402_1%
C H_A20M# R50 @ DCLKPH ACLKPH COMP[1] COMP2 C
<18> H_A20M# U18 A20M# 1 2 1K_0402_5% V5 DCLKPH COMP[2] F20 2 R26 1 27.4_0402_1%
H_FERR# T16 V11 CLK_CPU_BCLK CLK_CPU_BCLK <14> T17 F21 COMP3 2 R25 1 54.9_0402_1%
<18> H_FERR# FERR# BCLK[0] BINIT# COMP[3]
H_IGNNE# J4 V12 CLK_CPU_BCLK# R6 MISC
<18> H_IGNNE# H_STPCLK# IGNNE# BCLK[1] CLK_CPU_BCLK# <14> EDM H_DPRSTP#
<18> H_STPCLK# R16 STPCLK# +CPU_EXTBGREF M6 EXTBGREF DPRSTP# R18 H_DPRSTP# <18,40>
H_INTR T15 N15 R17 H_DPSLP#
<18> H_INTR H_DPSLP# <18>
H CLK
H_NMI LINT0 +VCCP FORCEPR# DPSLP# H_DPWR#

<18> H_NMI R15 LINT1 N6 HFPLL DPWR# U4 H_DPWR# <6>
<18> H_SMI#
H_SMI# U17 SMI#
This shall place near CPU P17 MCERR# PWRGOOD V17 H_PWRGOOD H_PWRGOOD <18>
T6 N18 H_CPUSLP# H_CPUSLP# <6>
R21 56_0402_5% ITP_TMS CPU_BSEL0 RSP# SLP#
D6 C21 1 2 <14> CPU_BSEL0 J6 A13
NC1 RSVD3 R19 56_0402_5% ITP_TDI CPU_BSEL1 BSEL[0] CORE_DET
G6 C1 1 2 H5 B7 +CPU_CMREF
NC
NC2 RSVD2 PREQ# <14> CPU_BSEL1 CPU_BSEL2 BSEL[1] CMREF[1]

H6 A3 R23 1 2 56_0402_5% G5
NC3 RSVD1 <14> CPU_BSEL2 BSEL[2]
K4 R20 1 2 56_0402_5% ITP_TDO
NC4 AU80586GE025512_FCBGA437
K5
NC5 R28 ITP_TCK
M15 1 2 56_0402_5% N270@
NC6 R36 ITP_TRST#
L16
NC7 1 2 56_0402_5%
+VCCP Layout note:
ESD request COMP0,2 connect with Zo=27.4ohm +/-15%, make
AU80586GE025512_FCBGA437
1
N270@ H_A20M#
. C391 1 2 100P_0402_50V8J trace length shorter than 0.5"
+VCCP +VCCP +VCCP
H_FERR# C392 1 2 100P_0402_50V8J R237 COMP1,3 connect with Zo=55ohm +/-15%, make
+CPU_GTLREF 1K_0402_1% trace length shorter than0.5"
1
R233 1 2 1K_0402_5% H_A#32 H_IGNNE# C393 1 2 100P_0402_50V8J
2
R231 1 2 1K_0402_5% H_A#33
R232 1 2 1K_0402_5% H_A#34 H_INTR C394 1 2 100P_0402_50V8J R48 R241
R230 1 2 1K_0402_5% H_A#35 +CPU_EXTBGREF 1K_0402_1% +CPU_CMREF 1K_0402_1%
1
H_NMI C395 1 2 100P_0402_50V8J 1
2
+VCCP
H_STPCLK# C396 1 2 100P_0402_50V8J C295 R238
0.1U_0402_16V4Z 2K_0402_1%
1
R31 1 2 1K_0402_5% H_A20M# H_SMI# C397 1 2 100P_0402_50V8J 2
1 1
2
R55 1 2 1K_0402_5% H_IGNNE# C71
B 1U_0603_10V4Z R49 C296 R240 B
2
2K_0402_1% 0.1U_0402_16V4Z
2
2K_0402_1% Close to CPU pin
FAN1 Conn 2
2
within 500mils.
Zo=55ohm
Close to CPU pin Close to CPU pin
within 500mils. within 500mils. H_THERMDA, H_THERMDC routing together.
Zo=55ohm Zo=55ohm Trace width / Spacing = 10 / 10 mil
+5VS
C312 2.2U_0603_10V6K +5VS
1 2
DIODE
Closed to +3VS
CPU THERMAL SENSOR
1
U12 D19 Connector

1 8
EN GND
0.1U_0402_16V4Z~D
2 7 1SS355_SOD323 1
+VCC_FAN1 VIN GND @ D20
3 6
2
EN_FAN1 VOUT GND @ 1N4148_SOT23 C80

<27> EN_FAN1 4 5
VSET GND U2
1 2
APL5607KI-TRG_SO8 2
C314 1 8 EC_SMB_CK2 EC_SMB_CK2 <27>

2.2U_0603_10V6K VDD SMCLK
1 2 H_THERMDA 2 7 EC_SMB_DA2
DP SMDATA EC_SMB_DA2 <27>
C79
+3VS C313 1 2 H_THERMDC 3 6 2 R58 1
DN ALERT# +3VS
1000P_0402_50V7K 2200P_0402_50V7K 10K_0402_5%
1 2 4 5 @
THERM# GND
1
A R256 A
1K_0402_5%
40mil EMC1402-1-ACZL-TR_MSOP8
JP12 Address:100_1100
2
+VCC_FAN1 1 1
<27> FAN_SPEED1 2 2 G1 4
3 3 G2 5
1
ACES_85204-03001 Security Classification Compal Secret Data Compal Electronics, Inc.
C311 ME@ Issued Date 2006/08/18 2007/8/18 Title
Deciphered Date
2
100P_0402_50V8J
Diamondville(1/2)
Custom 0.2
LA-4421P
5 4 3 2 1
5 4 3 2 1
U 9D U 9C +VCCP
A2 VSS1 VSS162 N5
220U_B2_2.5VM_R35
A4 N7 C9 0.1U_0402_10V7K 1U_0402_6.3V6K
VSS2 VSS161 VTT1
A8 VSS4 VSS160 N9 VTT2 D9 1
A15 N13 +VCCP E9
VSS5 VSS159 VTT3 1 1 1 1
C289
A18 N17 F8 C41 C45 C68 C72 +
VSS6 VSS158 VTT4
A19 VSS7 VSS157 P3 VTT5 F9
A20 VSS8 VSS156 P4 VTT6 G8
2 2 2 2 2
B1 VSS9 VSS155 P5 V10 VCCF VTT7 G14
B2 VSS10 VSS154 P6 VTT8 H8
D B5 P7 A9 H14 0.1U_0402_10V7K 1U_0402_6.3V6K D
VSS11 VSS153 VCCQ1 VTT9
B8 VSS12 VSS152 P9 B9 VCCQ2 VTT10 J8 PLACE IN CAVITY
B13 VSS13 VSS151 P13 VTT11 J14
B20 VSS14 VSS149 P15 VTT12 K8
B21 VSS15 VSS148 P16 VTT13 K14
C8 VSS16 VSS147 P18 VTT14 L8
C17 VSS17 VSS146 P19 VTT15 L14
D1 VSS18 VSS145 R1 VTT16 M8
D5 R5 +CPU_CORE M14
VSS19 VSS144 VTT17
D8 VSS20 VSS143 R7 VTT18 N8
D14 VSS21 VSS142 R9 VTT19 N14
D18 VSS22 VSS141 R13 VTT20 P8
D21 VSS23 VSS140 R21 A10 VCCP1 VTT21 P14
E3 VSS24 VSS139 T4 A11 VCCP2 VTT22 R8
E6 VSS25 VSS138 T5 A12 VCCP3 VTT23 R14
E7 VSS26 VSS137 T7 B10 VCCP4 VTT24 T8
E8 VSS27 VSS136 T9 B11 VCCP5 VTT25 T14
E15 VSS28 VSS135 T10 B12 VCCP6 VTT26 U8
E16 VSS29 VSS134 T11 C10 VCCP7 VTT27 U9
E19 VSS30 VSS133 T12 C11 VCCP8 VTT28 U10
F4 VSS31 VSS132 T13 C12 VCCP9 VTT29 U11
F5 VSS32 VSS131 T18 D10 VCCP10 VTT30 U12
F6 VSS33 VSS130 U3 D11 VCCP11 VTT31 U13
F7 VSS34 VSS129 U6 D12 VCCP12 VTT32 U14
F17 VSS35 VSS128 U7 E10 VCCP13
F18 VSS36 VSS127 U15 E11 VCCP14
G1 VSS37 VSS126 U16 E12 VCCP15
G4 VSS38 VSS125 U19 F10 VCCP16 VCCPC64 F14
G7 VSS39 VSS124 V1 F11 VCCP17 VCCPC63 F13
C G9 V4 F12 E14 C
VSS41 VSS123 VCCP18 VCCPC62
G13 VSS42 VSS122 V6 G10 VCCP19 VCCPC61 E13
G21 VSS45 VSS121 V7 G11 VCCP20
H3 VSS46 VSS120 V8 G12 VCCP21
H4 VSS48 VSS119 V13 H10 VCCP22
H13 VSS52 VSS116 V21 J10 VCCP25
H16 VSS53 VSS115 W1 J11 VCCP26
H18 VSS54 VSS114 W5 J12 VCCP27
H19 W8 K10 +1.5VS
VSS55 VSS113 VCCP28
J5 VSS56 VSS112 W11 K11 VCCP29
J7 VSS57 VSS111 W14 K12 VCCP30
130mA
J9 W17 L10 D7 +1.5VS
VSS58 VSS110 VCCP31 VCCA
J13 VSS59 VSS109 W21 L11 VCCP32 1
J17 Y1 L12 C67
VSS60 VSS108 VCCP33 CPU_ VID0 0.1U_0402_10V7K
K1 VSS61 VSS107 Y2 M10 VCCP34 VID[0] F15 CPU_VID0 <40>
K6 Y20 M11 D16 CPU_ VID1
VSS62 VSS106 VCCP35 VID[1] CPU_VID1 <40> 2
K7 Y21 M12 E18 CPU_ VID2 CPU_VID2 <40>
VSS63 VSS105 VCCP36 VID[2] CPU_ VID3
K9 VSS64 VSS104 AA2 N10 VCCP37 VID[3] G15 CPU_VID3 <40>
K13 AA3 N11 G16 CPU_ VID4 CPU_VID4 <40>
VSS65 VSS103 VCCP38 VID[4] CPU_ VID5
K15 VSS66 VSS102 AA4 N12 VCCP39 VID[5] E17 CPU_VID5 <40>
K21 AA7 P10 G18 CPU_ VID6 CPU_VID6 <40>
VSS67 VSS101 VCCP40 VID[6]
L3 VSS68 VSS100 AA10 P11 VCCP41
L4 VSS69 VSS99 AA12 P12 VCCP42 V CCSENSE
L5
L6
VSS70 VSS98 AA15
AA18
R10
R11
VCCP43 VCCSENSE C13 VCCSENSE <40> Length match within 25 mils
VSS71 VSS97 VCCP44
L7 VSS72 VSS96 AA19 R12 VCCP45 VSSSENSE
The trace space 7 mils,
L9 VSS73 VSS95 AA20 VSSSENSE D13 VSSSENSE <40>
B
L13 VSS74 Zo=27.4ohm B
L15 AU80586GE025512_FCBGA437
VSS75 N270@
L18 VSS76
L19 VSS77
M1 VSS78
M5 VSS79
M7 VSS80
M9 VSS81
M13 +CPU_CORE +CPU_CORE
VSS82
M21 VSS83 PLACE IN CAVITY 2 x 330uF(9mohm/2)
N4 VSS84 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1 1
+ C275 + C278
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
C46 C47 C48 C49 C50 C51 C52 C58 C59 C60 C61 C62 C64 C65 C63 C53
AU80586GE025512_FCBGA437 330U 2.5V Y 330U 2.5V Y
N270@ 2 2
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K
10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K
1 1 1 1 1 1 1 1 1 1 1 1
C70 C78 C77 C286 C291 C284 C40 C76 C294 C75 C280 C290
2 2 2 2 2 2 2 2 2 2 2 2
A A
10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K
PLACE IN CORRIDOR AND CLOSE TO CPU

Diamondville(2/2)
B 0.2
LA-4421P
D ate: Monday, April 06, 2009 Sheet 5 of 42
5 4 3 2 1
5 4 3 2 1
<4> H_D#[0..63] H_A#[3..31] <4>

U8A U8B
H_D#0 C4 F8 H_A#3
H_D#1 H_D#_0 H_A#_3 H_A#4 DMI_TXN0 MCH_CLKSEL0
F6 H_D#_1 H_A#_4 D12 <19> DMI_TXN0 Y29 DMI_RXN_0 CFG_0 C18 MCH_CLKSEL0 <14>
H_D#2 H9 C13 H_A#5 DMI_TXN1 Y32 E18 MCH_CLKSEL1
H_D#3 H_D#_2 H_A#_5 H_A#6 <19> DMI_TXN1 DMI_TXP0 DMI_RXN_1 CFG_1 MCH_CLKSEL2 MCH_CLKSEL1 <14>
H6 A8 <19> DMI_TXP0 Y28 G20 MCH_CLKSEL2 <14>
H_D#4 H_D#_3 H_A#_6 H_A#7 DMI_TXP1 DMI_RXP_0 CFG_2 T2
F7 E13 <19> DMI_TXP1 Y31 G18
H_D#5 H_D#_4 H_A#_7 H_A#8 DMI_RXP_1 CFG_3 C FG5
E3
H_D#_5 H_A#_8
E12
CFG_5
J20 1 PAD 2
D H_D#6 H_A#9 DMI_RXN0 R34 2.2K_0402_5% D
C2 J12 <19> DMI_RXN0 V28 J18
H_D#7 H_D#_6 H_A#_9 H_A#10 DMI_RXN1 DMI_TXN_0 CFG_6 PAD T3
C3 B13 <19> DMI_RXN1 V31
H_D#8 H_D#_7 H_A#_10 H_A#11 DMI_RXP0 DMI_TXN_1
K9 A13 <19> DMI_RXP0 V29
H_D#9 H_D#_8 H_A#_11 H_A#12 DMI_RXP1 DMI_TXP_0
F5 G13 <19> DMI_RXP1 V32
H_D#10 H_D#_9 H_A#_12 H_A#13 DMI_TXP_1
DMI
J7 A12
H_D#11 H_D#_10 H_A#_13 H_A#14
K7 D14
H_D#12 H_D#_11 H_A#_14 H_A#15
H8 F14
H_D#13 H_D#_12 H_A#_15 H_A#16 M_CLK_DDR0
E5 J13 <13> M_CLK_DDR0 AF33 K32
H_D#14 H_D#_13 H_A#_16 H_A#17 M_CLK_DDR1 SM_CK_0 RESERVED1
K8 E17 <13> M_CLK_DDR1 AG1 K31
H_D#15 H_D#_14 H_A#_17 H_A#18 SM_CK_1 RESERVED2
J8 H15 C17
H_D#16 H_D#_15 H_A#_18 H_A#19 RESERVED7
J2 G15 AJ1 F18
H_D#17 H_D#_16 H_A#_19 H_A#20 SM_CK_2 RESERVED8
J3 H_D#_17 H_A#_20 G14 AM30 SM_CK_3 RESERVED9 A3
CFG/RSVD
H_D#18 N1 A15 H_A#21
H_D#19 H_D#_18 H_A#_21 H_A#22 M_CLK_DDR#0
M5 H_D#_19 H_A#_22 B18 <13> M_CLK_DDR#0 AG33 SM_CK#_0
H_D#20 K5 B15 H_A#23 M_CLK_DDR#1 AF1
H_D#21 H_D#_20 H_A#_23 H_A#24 <13> M_CLK_DDR#1 SM_CK#_1
J5 H_D#_21 H_A#_24 E14
H_D#22 H3 H13 H_A#25 AK1
H_D#23 H_D#_22 H_A#_25 H_A#26 SM_CK#_2
J4 H_D#_23 H_A#_26 C14 AN30 SM_CK#_3
H_D#24 N3 A17 H_A#27
DDR2 MUXING
H_D#25 H_D#_24 H_A#_27 H_A#28 DDR_CKE0
M4 H_D#_25 H_A#_28 E15 <13> DDR_CKE0 AN21 SM_CKE_0
H_D#26 M3 H17 H_A#29 DDR_CKE1 AN22
H_D#27 H_D#_26 H_A#_29 H_A#30 <13> DDR_CKE1 SM_CKE_1
N8 H_D#_27 H_A#_30 D17 AF26 SM_CKE_2
H_D#28 N6 G17 H_A#31 AF25
H_D#29 H_D#_28 H_A#_31 SM_CKE_3
K3 H_D#_29
H_D#30 N9 DDR_CS0# AG14
H_D#_30 <13> DDR_CS0# SM_CS#_0
H_D#31 M1 F10 H_ADS# DDR_CS1# AF12
H_D#32 H_D#_31 H_ADS# H_ADSTB#0 H_ADS# <4> <13> DDR_CS1# SM_CS#_1
V8 H_D#_32 H_ADSTB#_0 C12 H_ADSTB#0 <4> AK14 SM_CS#_2
H_D#33 V9 H16 H_ADSTB#1 AH12
H_D#34 H_D#_33 H_ADSTB#_1 +H_VREF H_ADSTB#1 <4> SM_CS#_3
R6 H_D#_34 H_VREF0 E2
H_D#35 T8 B9 H_BNR# AJ21
H_D#_35 H_BNR# H_BNR# <4> SM_OCDCOMP_0
H_D#36 R2 C7 H_BPRI# AF11 E31
HOST
H_D#37 H_D#_36 H_BPRI# H_BR0# H_BPRI# <4> SM_OCDCOMP_1 PM_ICHSYNC# MCH_ICH_SYNC# <17>
N5 H_D#_37 H_BREQ0# G8 H_BR0# <4> PM_BMBUSY# G21 PM_BMBUSY# <19>
PM
C H_D#38 H_RESET# M_ODT0 PM_EXTTS#0 C
N2 H_D#_38 H_CPURST# B10 H_RESET# <4> <13> M_ODT0 AE12 SM_ODT_0 PM_EXTTS#_0 F26 PM_EXTTS#0 <13>
H_D#39 R5 E1 +H_VREF +1.8V M_ODT1 AF14 H26 PM_EXTTS#1 2 1
H_D#_39 H_VREF1 <13> M_ODT1 SM_ODT_1 PM_EXTTS#_1 PM_DPRSLPVR <19,40>
H_D#40 U7 AJ14 J15 R44 0_0402_5%
H_D#41 H_D#_40 CLK_MCH_BCLK# SM_ODT_2 THRMTRIP# H_THERMTRIP#
R8 H_D#_41 HCLKN AA6 CLK_MCH_BCLK# <14> AJ12 SM_ODT_3 PWROK AB29 H_THERMTRIP# <4,18>
H_D#42 T4 AA5 CLK_MCH_BCLK W27 ICH_POK
H_D#43 H_D#_42 HCLKP H_DBSY# CLK_MCH_BCLK <14> SMRCOMPN RSTIN# PLTRST_R# 1 ICH_POK <19,27>
T7 C10 R56 1 2 80.6_0402_1% AN12 2
H_D#44 H_D#_43 H_DBSY# H_DEFER# H_DBSY# <4> SMRCOMPP SM_RCOMPN PLTRST# <17,19,21,25>
R3 C6 1 2 AN14 R47 100_0402_5%
H_D#_44 H_DEFER# H_DEFER# <4> SM_RCOMPP
H_D#45 T5 H5 H_DINV#0 R54 80.6_0402_1% AA33
H_D#_45 H_DINV#_0 H_DINV#0 <4> SM_VREF_0
CLK
H_D#46 V6 J6 H_DINV#1 +DIMM_VREF AE1 A27
H_D#47 H_D#_46 H_DINV#_1 H_DINV#2 H_DINV#1 <4> SM_VREF_1 D_REFCLKN CLK_MCH_DREFCLK# <14>
V3
H_D#_47 H_DINV#_2
T9 H_DINV#2 <4> 10uA D_REFCLKP
A26 CLK_MCH_DREFCLK <14>
0.1U_0402_16V4Z
H_D#48 W2 U6 H_DINV#3 1 J33
H_D#_48 H_DINV#_3 H_DINV#3 <4> D_REFSSCLKN MCH_SSCDREFCLK# <14>
H_D#49 W1 G7 H_DPWR# Layout Note: H33
H_D#_49 H_DPWR# H_DPWR# <4> D_REFSSCLKP MCH_SSCDREFCLK <14>
C293
H_D#50 V2 E6 H_DRD Y# J22
H_D#51 H_D#_50 H_DRDY# H_DSTBN#0
H_DRDY# <4> +DIMM_VREF trace CLKREQ# MCH_CLKREQ# <14>
W4 F3
H_D#52 H_D#_51 H_DSTBN#_0 H_DSTBN#1 2 width and spacing
W7 M8
H_D#53 H_D#_52 H_DSTBN#_1 H_DSTBN#2 Calistoga-GSE_FCBGA998
W5
H_D#_53 H_DSTBN#_2
T1 is 20/20.
H_D#54 V5 AA3 H_DSTBN#3
+VCCP H_D#55 H_D#_54 H_DSTBN#_3 H_DSTBP#0
AB4 F4 H_DSTBN#[0..3] <4>
H_D#56 H_D#_55 H_DSTBP#_0 H_DSTBP#1
AB8 M7
W8 T2
AA9 AB3
H_D#59 H_D#_58 H_DSTBP#_3
AA8 H_DSTBP#[0..3] <4>
H_D#_59
54.9_0402_1%
54.9_0402_1%
H_D#60 AB1
H_D#_60 Strap Pin Table
1
H_D#61 AB7
H_D#_61
R37
R226
H_D#62 AA2 C8 H_HIT#

H_D#63 H_D#_62 H_HIT# H_HITM# H_HIT# <4>
AB5
H_D#_63 H_HITM#
B4 H_HITM# <4> Low = DMI x 2 *
C5 H_LOCK# CFG5
H_LOCK# H_LOCK# <4>
G9 H_REQ#0 High = DMI x 4
2
H_REQ#_0 H_REQ#1
E9
H_XRCOMP H_REQ#_1 H_REQ#2
A10 G12
H_XSCOMP H_XRCOMP H_REQ#_2 H_REQ#3
A6 B8
+H_SWNG0 H_XSCOMP H_REQ#_3 H_REQ#4
C15 F12
B H_YRCOMP H_XSWING H_REQ#_4 H_RS#0 B
J1 A5 H_REQ#[0..4] <4>
H_YSCOMP H_YRCOMP H_RS#_0 H_RS#1
K1 B6
+H_SWNG1 H_YSCOMP H_RS#_1 H_RS#2
H1 G10
H_YSWING H_RS#_2 H_CPUSLP#
E8 H_RS#[0..2] <4>
H_SLPCPU# H_TRDY#
E10
H_TRDY#
H_CPUSLP# <4>
24.9_0402_1%
24.9_0402_1%
H_TRDY# <4>
1
Calistoga-GSE_FCBGA998
R227
R35
2
+3VS
Layout Note:
PM_EXTTS#0 1 2
H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 / R42 10K_0402_5%
H_SWNG1 trace width and spacing is 10/20. PM_EXTTS#1 1 @ 2
R43 10K_0402_5%
+VCCP +VCCP
+VCCP
221_0402_1%~D
221_0402_1%~D
1
1
100_0402_1%
1
R18
R33
R27
A A
2
+H_SWNG0 +H_SWNG1
2
+H_VREF
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
100_0402_1%
100_0402_1%
0.1U_0402_16V4Z
1 1
1
200_0402_1%
R17
R30
1
R29
C31
C29
C33
C be placed <100mils
from GMCH pin 2 2 Security Classification Compal Secret Data Compal Electronics, Inc.
2
2
2
Calistoga(1/5)-GTL/DMI/DDR
Custom 0.2
LA-4421P
5 4 3 2 1
5 4 3 2 1
D U8C DDR_A_D[0..63] <13>

D
AK12 AC31 DDR_A_D0
<13> DDR_A_BS0 SA_BS_0 SA_DQ_0
AH11 AB28 DDR_A_D1
AG17 AE33 DDR_A_D2
AF32 DDR_A_D3
<13> DDR_A_DM[0..7] SA_DQ_3
DDR_A_DM0 AB30 AC33 DDR_A_D4
DDR_A_DM1 SA_DM_0 SA_DQ_4 DDR_A_D5
AL31 SA_DM_1 SA_DQ_5 AB32
DDR_A_DM2 AF30 AB31 DDR_A_D6
AK26 SA_DM_3 SA_DQ_7 AE31
DDR_A_DM4 AL9 AH31 DDR_A_D8
AG7 SA_DM_5 SA_DQ_9 AK31
DDR_A_DM6 AK5 AL28 DDR_A_D10
AH3 SA_DM_7 SA_DQ_11 AK27
<13> DDR_A_DQS[0..7] AH30 DDR_A_D12
DDR_A_DQS0 SA_DQ_12 DDR_A_D13
AC28 SA_DQS_0 SA_DQ_13 AL32
DDR_A_DQS1 AJ30 AJ28 DDR_A_D14
DDR_A_DQS2 SA_DQS_1 SA_DQ_14 DDR_A_D15
AK33 SA_DQS_2 SA_DQ_15 AJ27
DDR_A_DQS3 AL25 AH32 DDR_A_D16
AN9 SA_DQS_4 SA_DQ_17 AF31
DDR_A_DQS5 AH8 AH27 DDR_A_D18
AM2 SA_DQS_6 SA_DQ_19 AF28
DDR_A_DQS7 AE3 AJ32 DDR_A_D20
SA_DQS_7 SA_DQ_20 DDR_A_D21
<13> DDR_A_DQS#[0..7] SA_DQ_21 AG31
DDR_A_DQS#0 AC29 AG28 DDR_A_D22
DDR_A_DQS#1 AK30 SA_DQS#_0 SA_DQ_22 DDR_A_D23
SA_DQS#_1 SA_DQ_23 AG27
DDR_A_DQS#2 AJ33 AN27 DDR_A_D24
DDR_A_DQS#3 AM25 SA_DQS#_2 SA_DQ_24 DDR_A_D25
AM26
DDR2 SYSTEM MEMORY

DDR_A_DQS#4 AN8 SA_DQS#_3 SA_DQ_25 DDR_A_D26
SA_DQS#_4 SA_DQ_26 AJ26
DDR_A_DQS#5 AJ8 AJ25 DDR_A_D27
DDR_A_DQS#6 AM3 SA_DQS#_5 SA_DQ_27 DDR_A_D28
SA_DQS#_6 SA_DQ_28 AL27
C DDR_A_DQS#7 AE2 AN26 DDR_A_D29 C
SA_DQS#_7 SA_DQ_29 DDR_A_D30
<13> DDR_A_MA[0..13] SA_DQ_30 AH25
DDR_A_MA0 AJ15 AG26 DDR_A_D31
DDR_A_MA1 SA_MA_0 SA_DQ_31 DDR_A_D32
AM17 SA_MA_1 SA_DQ_32 AM12
DDR_A_MA2 AM15 AL11 DDR_A_D33
AH15 SA_MA_3 SA_DQ_34 AH9
DDR_A_MA4 AK15 AK9 DDR_A_D35
AN15 AM11
AJ18 AK11
AF19 AM8
AN17 AK8
AL17 AG9
AG16 AF9
AL18 AF8
AG18 AK6
AL14 AF7
SA_MA_13 SA_DQ_44 DDR_A_D45
AG11
DDR_A_CAS# AJ17 SA_DQ_45 DDR_A_D46
<13> DDR_A_CAS# AJ6
DDR_A_RAS# AK18 SA_CAS# SA_DQ_46 DDR_A_D47
<13> DDR_A_RAS# AH6
SA_RAS# SA_DQ_47 DDR_A_D48
AN28 AN6
SA_RCVENIN# SA_DQ_48 DDR_A_D49
AM28 AM6
DDR_A_WE# AH17 SA_RCVENOUT# SA_DQ_49 DDR_A_D50
<13> DDR_A_WE# AK3
SA_WE# SA_DQ_50 DDR_A_D51
AL2
SA_DQ_51 DDR_A_D52
AH21 AM5
SB_BS_0 SA_DQ_52 DDR_A_D53
AJ20 AL5
AE27 AJ3
AJ2
SA_DQ_55 DDR_A_D56
AN20 AG2
SB_MA_0 SA_DQ_56 DDR_A_D57
AL21 AF3
AK21 AE7
B AK22 AF6 B
AL22 AH5
AH22 AG3
AG22 AG5
AF21 AF5
SB_MA_7 SA_DQ_63
AM21
SB_MA_8
AE21
SB_MA_9
AL20 AG19
SB_MA_10 SB_CAS#
AE22 AG21
SB_MA_11 SB_RAS#
AE26 AG20
SB_MA_12 SB_WE#
AE20
SB_MA_13
A A

Calistoga(2/5)-DDR2
Custom 0.2
LA-4421P
5 4 3 2 1
5 4 3 2 1
D D
U 8F R45 +1.5VS_PCIE
24.9_0402_1%
H27 R28 PEGCOMP 1 2
SDVO_CTRLDATA EXP_A_COMPI
J27 SDVO_CTRLCLK EXP_A_ICOMPO M28
<14> CLK_MCH_3GPLL# Y26 G_CLKN
2 1 GMCH_CRT_R AA26 N30
<14> CLK_MCH_3GPLL G_CLKP SDVO_TVCLKIN#
MISC
R225 150_0402_1% R30
GMCH_CRT_G SDVO_INT#
2 1 SDVO_FLDSTALL# T29
R223 150_0402_1%
2 1 GMCH_CRT_B
R222 150_0402_1% H20 M30
<16> GMCH_CRT_CLK CRT_DDC_CLK SDVO_TVCLKIN
<16> GMCH_CRT_DATA H22 CRT_DDC_DATA SDVO_INT P30
GMCH_CRT_B A24 T30
<16> GMCH_CRT_B CRT_BLUE SDVO_FLDSTALL
A23 CRT_BLUE#
GMCH_CRT_G E25
<16> GMCH_CRT_G CRT_GREEN
F25 CRT_GREEN#
SDVO
GMCH_CRT_R C25
<16> GMCH_CRT_R CRT_RED
Close to U8.H25
VGA
D25 CRT_RED#
<16> GMCH_CRT_VSYNC F27 CRT_VSYNC
<16> GMCH_CRT_HSYNC D27 CRT_HSYNC
2 1 CRT_ IREF H25 P28
R39 255_0402_1% CRT_IREF SDVO_RED#
SDVO_GREEN# N32
R224 2 1 100K_0402_5% H30 P32
L_BKLTCTL SDVO_BLUE#
<27> GMCH_ENBKL G29 L_BKLTEN SDVO_CLKN T32
C LCTLA_CLK F28 C
LCTLB_DATA L_CLKCTLA
E28 L_CTLBDATA
<15> LVDS_SCL LVDS_SCL G28 N28
LVDS_SDA L_DDC_CLK SDVO_RED
<15> LVDS_SDA H28 L_DDC_DATA SDVO_GREEN M32
<15> GMCH_ENVDD K30 L_VDDEN SDVO_BLUE P33
2 1 L_IBG K27 R32
R38 1.5K_0402_1% L_IBG SDVO_CLKP
J29 L_VBG +1.5VS
J30 L_VREFH
K29 L_VREFL
LVDS_ACLK# D30 A21
<15> LVDS_ACLK# LA_CLKN TV_DACA
LVDS_ACLK C30 C20
<15> LVDS_ACLK LA_CLKP TV_DACB
A30 LB_CLKN TV_DACC E20
LVDS
A29 LB_CLKP TV_IREF G23
TV
LVDS_A0# G31
TV_IRTNA B21
C21
Disable TV
<15> LVDS_A0# LA_DATAN_0 TV_IRTNB
<15> LVDS_A1# LVDS_A1# F32 D21
LVDS_A2# LA_DATAN_1 TV_IRTNC
<15> LVDS_A2# D31 LA_DATAN_2
<15> LVDS_A0 LVDS_A0 H31

LVDS_A1 LA_DATAP_0
<15> LVDS_A1 G32 LA_DATAP_1 TV_DCONSEL0 G26
<15> LVDS_A2 LVDS_A2 C31 J26
+3VS LA_DATAP_2 TV_DCONSEL1
F33 LB_DATAN_0
D33 LB_DATAN_1
1 2 LCTLA_CLK F30
R32 10K_0402_5% LB_DATAN_2
1 2 LCTLB_DATA E33
R40 10K_0402_5% LB_DATAP_0
D32 LB_DATAP_1
B B
F29 LB_DATAP_2
A A

Calistoga(3/5)-VGA/LVDS/TV
B 0.2
LA-4421P
5 4 3 2 1
5 4 3 2 1
+VCCP +1.5VS
U8E U8G
U8H AH33 VSS_1
T25 VCC_NCTF1 VCCAUX_NCTF1 AD25 Y33 VSS_2 VSS_111 J16 W33 NC1 NC61 W30
R25 VCC_NCTF2 VCCAUX_NCTF2 AC25 V33 VSS_3 VSS_112 AL15 AM33 NC2 NC62 Y6
P25 VCC_NCTF3 VCCAUX_NCTF3 AB25 R33 VSS_4 VSS_113 AG15 AL33 NC3 NC63 AL1
N25 VCC_NCTF4 VCCAUX_NCTF4 AD24 G33 VSS_5 VSS_114 W15 C33 NC4 NC64 Y5
M25 VCC_NCTF5 VCCAUX_NCTF5 AC24 AK32 VSS_6 VSS_115 R15 B33 NC5 NC65 Y10
P24 VCC_NCTF6 VCCAUX_NCTF6 AD22 AG32 VSS_7 VSS_116 F15 AN32 NC6 NC66 W10
N24 VCC_NCTF7 VCCAUX_NCTF7 AD21 AE32 VSS_8 VSS_117 D15 A32 NC7 NC67 W25
M24 VCC_NCTF8 VCCAUX_NCTF8 AD20 AC32 VSS_9 VSS_118 AM14 AN31 NC8 NC68 V24
Y22 AD19 AA32 AH14 W28 U24
VCC_NCTF9 VCCAUX_NCTF9 VSS_10 VSS_119 NC9 NC69
W22 AD18 U32 AE14 V27 V10
V22 AD17 H32 H14 W29 U10
D VCC_NCTF11 VCCAUX_NCTF11 VSS_12 VSS_121 NC11 NC71 D
U22 AD16 E32 B14 J24 K18
T22 AD15 C32 F13 H24
VCC_NCTF13 VCCAUX_NCTF13 VSS_14 VSS_123 NC13
R22 AD14 AM31 D13 W32
P22 K14 AJ31 AL12 G24
N22 AD13 AA31 AG12 F24
M22 Y13 U31 H12 E24
Y21 W13 T31 B12 D24
W21 V13 R31 AN11 K33
V21 U13 P31 AJ11 A31
U21 T13 N31 AE11 E21
T21 R13 M31 AM9 C23
R21 VCC_NCTF23 VCCAUX_NCTF23 P13 J31 VSS_24 VSS_133 AJ9 AN19 NC23
P21 VCC_NCTF24 VCCAUX_NCTF24 N13 F31 VSS_25 VSS_134 AB9 AM19 NC24
N21 VCC_NCTF25 VCCAUX_NCTF25 M13 AL30 VSS_26 VSS_135 W9 AL19 NC25
M21 VCC_NCTF26 VCCAUX_NCTF26 AD12 AG30 VSS_27 VSS_136 R9 AK19 NC26
Y20 VCC_NCTF27 VCCAUX_NCTF27 Y12 AE30 VSS_28 VSS_137 M9 AJ19 NC27
W20 VCC_NCTF28 VCCAUX_NCTF28 W12 AC30 VSS_29 VSS_138 J9 AH19 NC28
V20 VCC_NCTF29 VCCAUX_NCTF29 V12 AA30 VSS_30 VSS_139 F9 AN3 NC29
NC
U20 VCC_NCTF30 VCCAUX_NCTF30 U12 Y30 VSS_31 VSS_140 C9 Y9 NC30
T20 VCC_NCTF31 VCCAUX_NCTF31 T12 V30 VSS_32 VSS_141 A9 J19 NC31
R20 VCC_NCTF32 VCCAUX_NCTF32 R12 U30 VSS_33 VSS_142 AL8 H19 NC32
P20 VCC_NCTF33 VCCAUX_NCTF33 P12 G30 VSS_34 VSS_143 AG8 G19 NC33
N20 VCC_NCTF34 VCCAUX_NCTF34 N12 E30 VSS_35 VSS_144 AE8 F19 NC34
M20 VCC_NCTF35 VCCAUX_NCTF35 M12 B30 VSS_36 VSS_145 U8 E19 NC35
Y19 VCC_NCTF36 VCCAUX_NCTF36 AD11 AA29 VSS_37 VSS_146 AA7 D19 NC36
P19 VCC_NCTF37 VCCAUX_NCTF37 AD10 U29 VSS_38 VSS_147 V7 C19 NC37
N19 VCC_NCTF38 VCCAUX_NCTF38 K10 R29 VSS_39 VSS_148 R7 B19 NC38
M19 VCC_NCTF39 VSS_NCTF1 AN33 P29 VSS_40 VSS_149 N7 A19 NC39 RESERVED26 Y25
Y18 VCC_NCTF40 VSS_NCTF2 AA25 N29 VSS_41 VSS_150 H7 Y8 NC40 RESERVED27 Y24
P18 V25 M29 E7 G16 AB22
C
N18
M18
Y17
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
NCTF VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
U25
AA22
AA21
H29
E29
B29
VSS_42
VSS_43
VSS_44
VSS_151
VSS_152
VSS_153
B7
AL6
AG6
F16
E16
D16
NC41
NC42
NC43
RESERVED28
RESERVED29
RESERVED30
AB21
AB19
AB16 C
VCC_NCTF44 VSS_NCTF6 VSS_45 VSS_154 NC44 RESERVED31
P17 VCC_NCTF45 VSS_NCTF7 AA20 AK28 VSS_46 VSS_155 AE6 C16 NC45 RESERVED32 AB14
N17 VCC_NCTF46 VSS_NCTF8 AA19 AH28 VSS_47 VSS_156 AB6 B16 NC46 RESERVED33 AA12
M17 VCC_NCTF47 VSS_NCTF9 AA18 AE28 VSS_48 VSS_157 W6 AN2 NC47 RESERVED34 W24
Y16 VCC_NCTF48 VSS_NCTF10 AA17 AA28 VSS_49 VSS_158 T6 A16 NC48 RESERVED35 AA24
P16 VCC_NCTF49 VSS_NCTF11 AA16 U28 VSS_50 VSS_159 M6 Y7 NC49 RESERVED36 AB24
N16 VCC_NCTF50 VSS_NCTF12 AA15 T28 VSS_51 VSS_160 K6 AM4 NC50 RESERVED37 AB20
VSS
M16 AA14 J28 AN5 AF4 AB18
Y15 AA13 D28 AJ5 AD4 AB15
P15 A4 AM27 B5 AL4 AB13
N15 A33 AF27 AA4 AK4 AB12
M15 B2 AB27 V4 W31 AB17
Y14 AN1 AA27 R4 AJ4
VCC_NCTF56 VSS_NCTF18 VSS_57 VSS_166 NC56
W14 C1 Y27 N4 AH4
VCC_NCTF57 VSS_NCTF19 VSS_58 VSS_167 NC57
V14 U27 K4 AG4
VCC_NCTF58 VSS_59 VSS_168 NC58
U14 K28 T27 H4 AE4
VCC_NCTF59 CFG_19 VSS_60 VSS_169 NC59
T14 R27 E4 AM1
VCC_NCTF60 VSS_61 VSS_170 NC60
R14 K25 P27 AL3
VCC_NCTF61 RESERVED10 VSS_62 VSS_171
P14 K26 N27 AD3
N14 R24 M27 W3
+VCCP VCC_NCTF63 RESERVED12 VSS_64 VSS_173 Calistoga-GSE_FCBGA998
M14 T24 G27 T3
K21 E27 B3
RESERVED14 VSS_66 VSS_175
T10 K19 C27 AK2
VTT_NCTF1 RESERVED15 VSS_67 VSS_176
R10 K20 B27 AH2
P10 K24 AL26 AF2
N10 K22 AH26 AB2
L10 J17 W26 M2
D1 K23 U26 K2
K17 AN25 H2
RESERVED21 VSS_73 VSS_182
M10 K12 AK25 F2
RSVD_3 RESERVED22 VSS_74 VSS_183
A18 K13 AG25 V1
RSVD_4 RESERVED23 VSS_75 VSS_184
AB10 K16 AE25 R1
B RSVD_5 RESERVED24 VSS_76 VSS_185 B
AA10 K15 J25
RSVD_6 RESERVED25 VSS_77
G25
Calistoga-GSE_FCBGA998 VSS_78
A25
VSS_79
H23
VSS_80
F23
VSS_81
B23
VSS_82
AM22
VSS_83
AJ22
VSS_84
AF22
VSS_85
G22
VSS_86
E22
VSS_87
J21
VSS_88
H21
VSS_89
F21
VSS_90
AM20
VSS_91
AK20
VSS_92
AH20
VSS_93
AF20
VSS_94
D20
VSS_95
W19
VSS_96
R19
VSS_97
AM18
VSS_98
AH18
VSS_99
AF18
VSS_100
U18
VSS_101
H18
VSS_102
D18
VSS_103
AK17
VSS_104
V17
VSS_105
T17
VSS_106
F17
VSS_107
B17 VSS_108
A A
AH16 VSS_109
U16 VSS_110

Calistoga(4/5)-PWR/GND
Custom 0.2
LA-4421P
5 4 3 2 1
5 4 3 2 1
+VCCP +1.5VS
2940mA
U8D 144mA
T26 B20
R26
P26
VCC0
VCC1
VCCATVDACA0
VCCATVDACA1 A20
B22
PCI-E/MEM/PSB PLL decoupling
VCC2 VCCATVDACB0
N26 VCC3 VCCATVDACB1 A22 Disable TV
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
220U_B2_2.5VM_R35
10U_0805_10V4Z
10U_0805_10V4Z
M26 VCC4 VCCATVDACC0 D22
V19 C22 +1.5VS_3GPLL +1.5VS
1 VCC5 VCCATVDACC1
1 1 1 1 1 U19 D23 R46
+ VCC6 VCCATVBG
C44
C279
C274
C37
C55
C43
T19 E23 +1.5VS_3GPLL 2 1 +1.5VS
VCC7 VSSATVBG
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
W18 VCC8 VCCDTVDAC F20
V18 F22 0_0603_5%
2 2 2 2 2 2 VCC9 VCCDQTVDAC
T18
VCC10 VCCDLVDS0
C28 20mA +1.5VS 1 1 1
R18 B28
VCC11 VCCDLVDS1
C56
C54
C69
D D
W17 A28
VCC12 VCCDLVDS2
0.1U_0402_16V4Z
10U_0805_10V4Z
U17
VCC13 VCCHV0
E26 40mA +3VS 2 2
@
2
R17 D26 1 1
VCC14 VCCHV1
0.1U_0402_16V4Z
10U_0805_10V4Z
W16 C26
VCC15 VCCHV2
C265
V16
VCC16 VCCSM0
AB33 U1_AB33 10mil 1 1
C20
T16 AM32 U1_AM32
VCC17 VCCSM1 2 2
C269
R16
VCC18 VCCSM2
AN29 10mil
C24
V15 AM29
VCC19 VCCSM3 2 2
1U_0603_10V4Z
1U_0603_10V4Z
U15 AL29 1 1
VCC20 VCCSM4
T15 AK29
VCC21 VCCSM5
C82
C73
VCCSM6
AJ29
+1.5VS_MPLL
45mA Max. +1.5VS_HPLL
45mA Max.
AD33 AH29 R236 R235
VCCAUX1 VCCSM7 2 2 0_0603_5% 0_0603_5%
AD32 VCCAUX2 VCCSM8 AG29
AD31 VCCAUX3 VCCSM9 AF29 2 1 +1.5VS 2 1 +1.5VS
AD30 AE29 +1.8V
VCCAUX4 VCCSM10
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
10U_0805_10V4Z
+1.5VS
AD29 VCCAUX5 VCCSM11 AN24 533 MTS=1720mA
AD28 VCCAUX6 VCCSM12 AM24
AD27 VCCAUX7 VCCSM13 AL24 1 1 1 1
1250mA AC27 VCCAUX8 VCCSM14 AK24
4.7U_0603_6.3V4Z
C288
C287
C282
C281
AD26 VCCAUX9 VCCSM15 AJ24
0.1U_0402_16V4Z
4.7U_0603_6.3V4Z
AC26 VCCAUX10 VCCSM16 AH24
AB26 AG24 2 2 2 2
VCCAUX11 VCCSM17 1 1 1
1U_0603_10V4Z
1 AE19 VCCAUX12 VCCSM18 AF24
C32
C84
C83
C74
AE18 VCCAUX13 VCCSM19 AE24
AF17 VCCAUX14 VCCSM20 AN18 10mil 2 2 2
AE17 VCCAUX15 VCCSM21 AN16
2 AF16 AM16
VCCAUX16 VCCSM22
AE16 VCCAUX17 VCCSM23 AL16
AF15 VCCAUX18 VCCSM24 AK16 1
AE15 VCCAUX19 VCCSM25 AJ16
J14 AN13 C81
VCCAUX20 VCCSM26
J10 VCCAUX21 VCCSM27 AM13 1U_0603_10V4Z
C 2 C
H10 VCCAUX22 VCCSM28 AL13
+1.5VS_DPLLB
40mA Max. +1.5VS_DPLLA
40mA Max.
AE9 VCCAUX23 VCCSM29 AK13 L10 L9
AD9 VCCAUX24 VCCSM30 AJ13
+VCCP U9 AH13 1 2 +1.5VS 1 2 +1.5VS
VCCAUX25 VCCSM31
AD8 VCCAUX26 VCCSM32 AG13
0.1U_0402_16V4Z~D
330U_D2E_2.5VM
0.1U_0402_16V4Z~D
330U_D2E_2.5VM
780mA AD7 VCCAUX27 VCCSM33 AF13 FBMA-L10-160808-301LMT_2P FBMA-L10-160808-301LMT_2P
C268 AD6 AE13 1 1
VCCAUX28 VCCSM34
VCCSM35
AN4 10mil 1 1
C36
C264
C21
C263
1 2 10mil U1_A14 A14 AM10 + +
VTT0 VCCSM36
D10 AL10
VTT1 VCCSM37
P9 AK10
VTT2 VCCSM38 2 2 2 2
0.47U_0603_16VY5V L9
VTT3 VCCSM39
AH1 10mil 1
D9 AH10
VTT4 VCCSM40 C85
P8 AG10
VTT5 VCCSM41
L8 AF10 1U_0603_10V4Z
VTT6 VCCSM42 2
1U_0603_10V4Z
D8 AE10 1
VTT7 VCCSM43
P7 AN7
VTT8 VCCSM44
C297
C267 L7 AM7
VTT9 VCCSM45
D7 AL7
U1_A7 VTT10 VCCSM46 2
1 210mil A7 AK7
VTT11 VCCSM47
P6 AJ7
VTT12 VCCSM48
L6 AH7
0.47U_0603_16VY5V VTT13 VCCSM49
G6 AN10
VTT14 VCCSM50
POWER
D6 AJ10
VTT15 VCCSM51
U5
VTT16 VCCAMPLL
AD1 +1.5VS_MPLL 45mA +2.5VS
0.1U_0402_16V4Z
220U_B2_2.5VM_R35
P5
VTT17 VCCAHPLL
AD2 +1.5VS_HPLL 45mA
1 L5
VTT18 VCCADPLLA
B26 +1.5VS_DPLLA 50mA
+
G5
VTT19 VCCADPLLB
J32 +1.5VS_DPLLB 50mA 1
C273
D5
VTT20 VCCDHMPLL1
AE5 +1.5VS150mA
Y4 AD5 Route +2.5VS from GMCH pinN33 to C39
VTT21 VCCDHMPLL2 +1.5VS_PCIE
2
U4
VTT22 VCCTXLVDS0
D29 +2.5VS60mA decoupling cap <200mil to the edge. 2
P4 C29 R239
B VTT23 VCCTXLVDS1 B
L4
VTT24 VCC3G0
U33 400mA 2 1 +1.5VS
220U_B2_2.5VM_R35
G4 T33 0_0805_5%
VTT25 VCC3G1
D4 V26400mA +1.5VS_3GPLL 1
VTT26 VCCA3GPLL +2.5VS
10U_0805_10V4Z
10U_0805_10V4Z
Y3 N33 2mA +2.5VS 1 1
VTT27 VCCA3GBG +
C292
U3 M33
VTT28 VSSA3GBG
4.7U_0603_6.3V4Z
4.7U_0603_6.3V4Z
C285
C283
P3
VTT29 VCCSYNC
J23 70mA
1 1 L3
VTT30 VCCACRTDAC0
C24 +2.5VS_CRTDAC 70mA 2 R229 1 +2.5VS 2 2 2
0.1U_0402_16V4Z
10U_0805_10V4Z
G3 B24 10_0603_5%
VTT31 VCCACRTDAC1
0.1U_0402_16V4Z
C57
C38
10U_0805_10V4Z
0.022U_0402_16V7K
D3 B25 1 1
VTT32 VSSACRTDAC
Y2 B31 10mA +2.5VS 1 1 1
2 2 VTT33 VCCALVDS
C34
C270
U2 B32 +VCCP
VTT34 VSSALVDS
C28
C25
P2
VTT36 2 2
C27
L2 P1
VTT35 VTT41 2 2 2
G2 L1 CRTDAC: Route FB
VTT37 VTT42
D2 G1 within 3" of Calistoga
VTT38 VTT43
10mil U1_AA1 AA1
VTT39 VTT44
U1
U1_F1 F1 Y1
VTT40 VTT45
10mil
2 2 Calistoga-GSE_FCBGA998
C66 C30 +2.5VS +2.5VS

0.47U_0603_16VY5V 0.47U_0603_16VY5V
1 1 Route VSSACRTDAC gnd from GMCH to
decoupling cap ground lead and then
connect to the gnd plane.
4.7U_0603_6.3V4Z
0.1U_0402_16V4Z
0.01U_0402_25V7K
0.1U_0402_16V4Z
1 1 1 1
C42
C35
C271
C272
2 2 2 2
A A
close pin C29/D29 close pin B31

Calistoga(5/5)-PWR/GND
Custom 0.2
LA-4421P
5 4 3 2 1
5 4 3 2 1
+1.8V +1.8V
JDIM1
<7> DDR_A_DQS#[0..7] +DIMM_VREF 1 VREF VSS 2
3 4 DDR_A_D4
+1.8V DDR_A_D0 VSS DQ4 DDR_A_D5
<7> DDR_A_D[0..63] 5 DQ0 DQ5 6
DDR_A_D1 7 8
DQ1 VSS DDR_A_DM0
<7> DDR_A_DM[0..7] 9 VSS DM0 10
1
DDR_A_DQS#0 11 12
DDR_A_DQS0 DQS0# VSS DDR_A_D6
<7> DDR_A_DQS[0..7] Layout Note: R61 13 DQS0 DQ6 14
15 16 DDR_A_D7
Place near JDIM1 1K_0402_1% DDR_A_D2 17
VSS DQ7
18
<7> DDR_A_MA[0..13] DQ2 VSS
DDR_A_D3 19 20 DDR_A_D12
2
DQ3 DQ12 DDR_A_D13
+DIMM_VREF 21 22
DDR_A_D9 VSS DQ13
23 24
DQ8 VSS
1
D DDR_A_D8 DDR_A_DM1 D
25 26
DQ9 DM1
R62 Share +DIMM_VREF for 27
VSS VSS
28
DDR_A_DQS#1 29 30 M_CLK_DDR0
1.DDRII VREF DQS1# CK0 M_CLK_DDR0 <6>
1K_0402_1% DDR_A_DQS1 31 32 M_CLK_DDR#0
DQS1 CK0# M_CLK_DDR#0 <6>
+1.8V 2.GMCH SM_VREF_0 33 34
2
DDR_A_D10 VSS VSS DDR_A_D14
35 36
SM_VREF_1 DDR_A_D11 37
DQ10 DQ14
38 DDR_A_D15
DQ11 DQ15
39 40
VSS VSS
+DIMM_VREF
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2 2 2 2 2
20mils 41
VSS VSS
42
C128
C129
C110
C109
C130
DDR_A_D17 DQ16 DQ20 DDR_A_D21
45 DQ17 DQ21 46
1 1 1 1 1
1 1 47 VSS VSS 48
C111 DDR_A_DQS#2 49 50 R64 1 2
DDR_A_DQS2 DQS2# NC DDR_A_DM2 PM_EXTTS#0 <6>
C112 51 52 0_0402_5%
0.1U_0402_16V4Z DQS2 DM2
2.2U_0603_6.3V4Z 53 VSS VSS 54
2 2 DDR_A_D18 55 56 DDR_A_D22
57 DQ19 DQ23 58
220U_B2_2.5VM_R35
59 VSS VSS 60
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 DDR_A_D24 61 62 DDR_A_D28
1 1 1 1 63 DQ25 DQ29 64
+
C94
@ 65 66
VSS VSS
C106
C105
C108
C107
DDR_A_DM3 67 68 DDR_A_DQS#3
DM3 DQS3# DDR_A_DQS3
69 NC DQS3 70
2 2 2 2 2 71 72
73 DQ26 DQ30 74
DQ27 DQ31
77 VSS VSS 78
DDR_CKE0 79 80 DDR_CKE1
<6> DDR_CKE0 CKE0 NC/CKE1 DDR_CKE1 <6>
81 VDD VDD 82
83 NC NC/A15 84
C DDR_A_BS2 C
<7> DDR_A_BS2 85 BA2 NC/A14 86
87 VDD VDD 88
DDR_A_MA12 89 90 DDR_A_MA11
DDR_A_MA9 A12 A11 DDR_A_MA7
91 A9 A7 92
A8 A6
95 VDD VDD 96
DDR_A_MA3 A5 A4 DDR_A_MA2
Layout Note: 99
A3 A2
100
Place one cap close to every 2 pullup 103
A1 A0
104
VDD VDD
resistors terminated to +0.9VS DDR_A_MA10 105
A10/AP BA1
106 DDR_A_BS1
DDR_A_BS1 <7>
<7> DDR_A_BS0 DDR_A_BS0 107 108 DDR_A_RAS# DDR_A_RAS# <7>
DDR_A_WE# BA0 RAS# DDR_CS0#
<7> DDR_A_WE# 109 110 DDR_CS0# <6>
WE# S0#
111 112
DDR_A_CAS# VDD VDD M_ODT0
<7> DDR_A_CAS# 113 114 M_ODT0 <6>
DDR_CS1# CAS# ODT0 DDR_A_MA13
<6> DDR_CS1# 115 116
NC/S1# NC/A13
117 118
M_ODT1 VDD VDD
<6> M_ODT1 119 120
NC/ODT1 NC
121 122
+0.9VS DDR_A_D32 VSS VSS DDR_A_D36
123 124
125 126
DQ33 DQ37
127 128
DDR_A_DQS#4 VSS VSS DDR_A_DM4
129 130
DDR_A_DQS4 DQS4# DM4
131 132
DQS4 VSS DDR_A_D38
133 134
DDR_A_D34 VSS DQ38 DDR_A_D39
135 136
DQ34 DQ39
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_D35 137 138

DQ35 VSS DDR_A_D44
1 1 1 1 1 1 1 1 1 1 1 1 1 139 140
DDR_A_D40 VSS DQ44 DDR_A_D45
141 142
DQ40 DQ45
C119
C117
C86
C121
C87
C88
C122
C115
C91
C90
C120
C118
C89
DDR_A_D41 143 144

DQ41 VSS DDR_A_DQS#5
145 146
2 2 2 2 2 2 2 2 2 2 2 2 2 DDR_A_DM5 VSS DQS5# DDR_A_DQS5
147 148
B DM5 DQS5 B
149 150
151 152
153 154
DQ43 DQ47
155 156
157 158
159 160
DQ49 DQ53
161 162
VSS VSS M_CLK_DDR1
163 164 M_CLK_DDR1 <6>
NC,TEST CK1 M_CLK_DDR#1
165 166 M_CLK_DDR#1 <6>
DDR_A_DQS#6 VSS CK1#
167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 170
DQS6 DM6
171 172
+0.9VS DDR_A_D50 VSS VSS DDR_A_D54
173 174
RP6 RP5 DDR_A_D51 DQ50 DQ54 DDR_A_D55
175 176
DDR_A_MA0 DDR_A_RAS# DQ51 DQ55
1 8 8 1 177
VSS VSS
178
DDR_A_MA13 2 7 7 2 DDR_A_MA4 DDR_A_D56 179 180 DDR_A_D60
DDR_CS0# DDR_A_MA2 DDR_A_D57 DQ56 DQ60 DDR_A_D61
3 6 6 3 181 182
M_ODT0 DDR_A_BS1 DQ57 DQ61
4 5 5 4 183 184
DDR_A_DM7 VSS VSS DDR_A_DQS#7
Layout Note: 185
DM7 DQS7#
186
56_0804_8P4R_5% 56_0804_8P4R_5% Place these resistor 187 188 DDR_A_DQS7
RP2 RP4 DDR_A_D58 VSS DQS7
closely DIMMA,all 189 190
DDR_A_MA1 DDR_CKE1 DDR_A_D59 DQ58 VSS DDR_A_D62
1 8 8 1 191
DQ59 DQ62
192
DDR_A_MA3 2 7 7 2 DDR_A_MA7 trace length<750 mil 193 194 DDR_A_D63
DDR_A_MA5 DDR_A_MA6 CLK_SMBDATA VSS DQ63
3 6 6 3 <14> CLK_SMBDATA 195
SDA VSS
196
DDR_A_CAS# 4 5 5 4 DDR_A_MA11 +3VS CLK_SMBCLK 197 198 R66 1 2 10K_0402_5%
<14> CLK_SMBCLK SCL SA0
+3VS 199 200 R65 1 2 10K_0402_5%
56_0804_8P4R_5% 56_0804_8P4R_5% VDDSPD SA1
0.1U_0402_16V4Z
RP3 RP1
DDR_A_WE# 1 8 8 1 DDR_A_MA12 1 FOX_AS0A426-N4SN-7F
DDR_A_BS0 2 7 7 2 DDR_A_MA9 C116
M_ODT1 3 6 6 3 DDR_A_MA8 ME@
DDR_CS1# 4 5 5 4 DDR_A_MA10
A
56_0804_8P4R_5% 56_0804_8P4R_5%
2
DIMMA A
Layout Note: Security Classification Compal Secret Data Compal Electronics, Inc.
DDR_A_BS2 1 R60 2 Place these resistor
56_0402_5% Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
closely DIMMA,all
DDR_CKE0 1 R59 2
56_0402_5% trace length THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII-SODIMMA
Max=1.3" Size Document Number R ev
B 0.2
LA-4421P
5 4 3 2 1
5 4 3 2 1
+3VM_CK505
FSC FSB FSA CPU SRC PCI REF DOT_96 USB +3VS
CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz MHz MHz MHz +3VS 1
R137
2
0_0805_5% 1 1 1 1 1 1 1
C174 C172 C138 C148 C140 C160 C169 R72 R91
0 0 0 266 100 33.3 14.318 96.0 48.0
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2.2K_0402_5% 2.2K_0402_5%
2 2 2 2 2 2 2 2N7002DW-T/R7_SOT363-6
0 0 1 133 100 33.3 14.318 96.0 48.0 Q10A
+1.05VM_CK505 CLK_SMBDATA
<19> ICH_SMBDATA 6 1
0 1 0 200 100 33.3 14.318 96.0 48.0
+VCCP 1 2
R138 0_0805_5% 1 1 1 1 1 1 1
2
0 1 1 166 100 33.3 14.318 96.0 48.0 C175 C139 C167 C137 C146 C165 C173 +3VS
D D
5
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2
1 0 0 333 100 33.3 14.318 96.0 48.0
<19> ICH_SMBCLK 3 4 CLK_SMBCLK
1 0 1 100 100 33.3 14.318 96.0 48.0 Q10B

2N7002DW-T/R7_SOT363-6
1 1 0 400 100 33.3 14.318 96.0 48.0
1 1 1 Reserved SA000020K00 (Silego : SLG8SP556VTR )

SA000020H10 (ICS : ICS9LPRS387AKLFT)
+3VM_CK505 U4
9 CLK_SMBDATA
SDA CLK_SMBDATA <13>
55 VDD_SRC
SCL 10 CLK_SMBCLK
CLK_SMBCLK <13>
SRC PORT LIST
6 VDD_REF
12 71 CLK_CPU_BCLK
+VCCP VDD_PCI CPU_0 CLK_CPU_BCLK <4>
72 70 CLK_CPU_BCLK#
PORT DEVICE
VDD_CPU CPU_0# CLK_CPU_BCLK# <4>
2
R68
19 VDD_48 CPU_1 68 CLK_MCH_BCLK
CLK_MCH_BCLK <6> SRC0 MCH_DREFCLK
@ CLK_MCH_BCLK#
R76 56_0402_5%
27 VDD_PLL3 CPU_1# 67 CLK_MCH_BCLK# <6> SRC2 MCH_3GPLL
2.2K_0402_5%
SRC3
1
FSA 2 1 1 2 +1.05VM_CK505 66 24 CLK_MCH_DREFCLK

C MCH_CLKSEL0 <6> VDD_CPU_IO SRC_0/DOT_96 CLK_MCH_DREFCLK <6> C
<4> CPU_BSEL0 1 2 R 67 31 25 CLK_MCH_DREFCLK#

CLK_MCH_DREFCLK# <6>
SRC4 PCIE_SATA
R69 1K_0402_5% VDD_PLL3_IO SRC_0#/DOT_96#
0_0402_5% 62
SRC6 PCIE_WLAN
VDD_SRC_IO
1
MCH_SSCDREFCLK
R73 52
LCDCLK/27M 28 MCH_SSCDREFCLK <6> SRC7
@ VDD_SRC_IO MCH_SSCDREFCLK#
1K_0402_5%
C386
10P_0402_50V8J 23
LCDCLK#/27M_SS 29 MCH_SSCDREFCLK# <6> SRC8
@ VDD_IO
1 2
SRC9 PCIE_LAN
2
38 32 CLK_MCH_3GPLL
VDD_SRC_IO SRC_2 CLK_MCH_3GPLL <8>
R74
CLK_48M_CR 1 2 33 CLK_MCH_3GPLL#
CLK_MCH_3GPLL# <8>
SRC10 PCIE_ICH
+VCCP <26> CLK_48M_CR 22_0402_5% SRC_2#
R75 1 2 FSA 20
SRC11
<19> CLK_ICH_48M 22_0402_5% USB_0/FS_A
1 2 35
SRC_3
2
@ 10P_0402_50V8J FSB 2
R113 C387 FS_B/TEST_MODE
36
33_0402_5% 1 SRC_3#
2 R104 F SC 7
1K_0402_5% <19> CLK_ICH_14M REF_0/FS_C/TEST_
1 2
@ 8 39 CLK_PCIE_SATA
CLK_PCIE_SATA <18>
1
FSB C390 REF_1 SRC_4

1 2 MCH_CLKSEL1 <6> 12P_0402_50V8J
40 CLK_PCIE_SATA#
SRC_4# CLK_PCIE_SATA# <18>
1 2 R115 VGATE 1
<4> CPU_BSEL1 <19,27,40> VGATE CKPWRGD/PD#
R119 1K_0402_5%
0_0402_5% 11 57 CLK_PCIE_WLAN
NC SRC_6 CLK_PCIE_WLAN <21>
1
R110 56 CLK_PCIE_WLAN#
SRC_6# CLK_PCIE_WLAN# <21>
@
0_0402_5% H_STP_CPU# 53
<19> H_STP_CPU# CPU_STOP#
61
2
H_STP_PCI# SRC_7
54
<19> H_STP_PCI# PCI_STOP#
60
SRC_7#
CLK_XTAL_IN 5
+VCCP XTAL_IN
B 64 B
CLK_XTAL_OUT SRC_8/CPU_ITP
4
XTAL_OUT
63
SRC_8#/CPU_ITP#
2
+3VS
R92
13 44 CLK_PCIE_LAN
PCI_1 SRC_9 CLK_PCIE_LAN <25>
R98 1K_0402_5%
10K_0402_5% @ PCI2_TME 14 45 CLK_PCIE_LAN# MCH_CLKREQ# R78 2 1 10K_0402_5%
CLK_PCIE_LAN# <25>
1
F SC PCI_2 SRC_9# W LAN_CLKREQ# R121 10K_0402_5%

2 1 1 2 MCH_CLKSEL2 <6> 2 1
15 SATA_CLKREQ# R105 2 1 10K_0402_5%
R 79 PCI_3 CLK_PCIE_ICH CLKREQ_LAN# R106 10K_0402_5%
<4> CPU_BSEL2 1 2 SRC_10
50 CLK_PCIE_ICH <19> 2 1
R84 1K_0402_5% 33_0402_5% 1 2 R86 PCI4_SEL 16
<27> CLK_PCI_LPC PCI_4/SEL_LCDCL
0_0402_5% 51 CLK_PCIE_ICH#
SRC_10# CLK_PCIE_ICH# <19>
1
33_0402_5% 1 2 R80 ITP_EN 17

<17> CLK_PCI_ICH PCIF_5/ITP_EN
R87
10P_0402_50V8J
10P_0402_50V8J
@ C389 1
0_0402_5% For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
@
1
C388
@
SRC_11
48
REQ PORT LIST
18 47
2
VSS_PCI SRC_11#
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# 2 2
Pin28/29 : LCDCLK / LCDCLK# 3
VSS_REF PORT DEVICE
1 = Pin24/25 : SRC_0 / SRC_0# 22
VSS_48 CLKREQ_3#
37
Pin28/29 : 27M/27M_SS 26 41 SATA_CLKREQ#
REQ_3#
VSS_IO CLKREQ_4# SATA_CLKREQ# <19>
For PCI2_TME:0=Overclocking of CPU and SRC allowed 69 58 W LAN_CLKREQ#

W LAN_CLKREQ# <21>
REQ_4# PCIE_SATA
VSS_CPU CLKREQ_6#
(ICS only) 1=Overclocking of CPU and SRC NOT allowed 30 65
REQ_6# PCIE_WLAN
VSS_PLL3 CLKREQ_7#
34 43 CLKREQ_LAN#
CLKREQ_LAN# <25>
REQ_7#
VSS_SRC CLKREQ_9#
+3VS +3VS +3VS 59 49
REQ_9# PCIE_LAN
VSS_SRC SLKREQ_10#
42 46
REQ_10#
VSS_SRC CLKREQ_11#
2
A
R85 R95 R71 73 21 MCH_CLKREQ#
MCH_CLKREQ# <6>
REQ_11# A
CLK_XTAL_IN VSS USB_1/CLKREQ_A#

C161 22P_0402_50V8J 10K_0402_5% 10K_0402_5% 10K_0402_5% REQ_A# MCH_3GPLL
1
@ @ SLG8SP556VTR_QFN72_10X10
1
Y1
14.31818MHZ_16PF_DSX840GA ITP_EN PCI4_SEL PCI2_TME
2
CLK_XTAL_OUT
2
C164 22P_0402_50V8J @
R89 R90 R77 Security Classification Compal Secret Data Compal Electronics, Inc.
Routing the trace at least 10mil Issued Date 2007/10/15 Deciphered Date 2008/10/15 Title
10K_0402_5% 10K_0402_5% 10K_0402_5%
Clock Generator CK505
1
Size Document Number Rev
0.2
LA-4421P
5 4 3 2 1
5 4 3 2 1
LCD POWER CIRCUIT

+3VALW +3VS
+LCDVDD
W=20mils
1
D D
1
1
R218 C260
150_0603_5% R219 @
47K_0402_5% 4.7U_0805_10V4Z
2
1 2
2
R221
3
D S
G
Q21 2 2 1 2 Q22
2N7002_SOT23 G SI2301BDS_SOT23
S
3
100K_0402_5%
2 D
C262
1
1
+LCDVDD
Q20 0.1U_0402_16V4Z W=20mils
1
DTC124EK_SC59
<8> GMCH_ENVDD 2 1
C261
0.1U_0402_16V4Z
2
3
C C
+3VS
10K_0402_5%
10K_0402_5%
LCD/PANEL BD. Conn.
2
R7
R6
C12
+LCDVDD_L 1 2
1
C18 0.1U_0603_50V4Z 4.7U_0805_10V4Z LVDS_SCL
B LVDS_SCL <8> B
JLVDS1 LVDS_SDA
L1 FBMA-L11-201209-221LMA30T_0805 LVDS_SDA <8>
22 20 +INVPWR_B+ 1 2
GND 20 B+
19 L8 FBMA-L11-201209-221LMA30T_0805
19 +LCDVDD_L
18 1 2 +LCDVDD
18 INVT_PWM
17 INVT_PWM <27>
17 BKOFF#
16
16 BKOFF#
15 +3VS BKOFF# <27>
15 LVDS_SDA INVT_PWM
14
14 LVDS_SCL
13
13 BKOFF#
12
12 LVDS_ACLK#
11 LVDS_ACLK# <8>
11 LVDS_ACLK
10 LVDS_ACLK <8>
10
1
9
9 LVDS_A2# C11 C10
8 LVDS_A2# <8>
8 LVDS_A2 220P_0402_50V7K
7 LVDS_A2 <8> 220P_0402_50V7K
2
7
6
6 LVDS_A1#
5 LVDS_A1# <8>
5 LVDS_A1
4 LVDS_A1 <8>
4
3
3 LVDS_A0#
2 LVDS_A0# <8>
2 LVDS_A0
21 1 LVDS_A0 <8>
GND 1
ACES_87213-2000G
ME@
A A

LVDS /INVERTER
B 0.2
LA-4421P
5 4 3 2 1
A B C D E
Close to CRT CONN for ESD.
2
3
2
@
@ D17
PSOT24C_SOT23-3
1 D18 1
PSOT24C_SOT23-3
1
1
L15
BK1608LL121-T_2P
1 2 R ED
<8> GMCH_CRT_R
L14
BK1608LL121-T_2P
1 2 GREEN
<8> GMCH_CRT_G
L12
BK1608LL121-T_2P
1 2 BLUE
<8> GMCH_CRT_B
150_0402_1%
150_0402_1%
150_0402_1%
1
1
1 1 1
R255 R253 R250 C310 C308 C303 1 1 1
C307 C306 C304
2 2 @ 2 @ 2 @ 10P_0402_50V8J 10P_0402_50V8J 10P_0402_50V8J
2
22P_0402_50V8J @ 2 @ 2 2 @
22P_0402_50V8J 22P_0402_50V8J
L13 FCM1608CF-121T03_2P
+CRT_VCC 1 2 JVGA_HS
1 2 L11 FCM1608CF-121T03_2P
C301 0.1U_0402_16V4Z 1 2 JVGA_VS
1
2 U11 2
39_0402_5% 1 1
OE#
P
1 R249 2 2 4 CRT_HSYNC_1
<8> GMCH_CRT_HSYNC A Y C302 C300
G
10P_0402_50V8J 10P_0402_50V8J
SN74AHCT1G125DCKR_SC70-5 @ 2 2 @
3
+CRT_VCC
Place closed to chipset
1 2
C298 0.1U_0402_16V4Z
1
@ U10
OE#
P
1 R247 2 2 4 CRT_VSYNC_1
<8> GMCH_CRT_VSYNC A Y
39_0402_5%
G
SN74AHCT1G125DCKR_SC70-5
3
+3VS CRT PORT

+CRT_VCC
+CRT_VCC
+5VS
1
1.1A_6V_SMD1812P110TF 0.1U_0402_16V4Z
3 R248 2.2K_0402_5% 3
+3VS F1 C123
D2 W=40mils
2.2K_0402_5% R245 2 2 1 1 2
1
1 ME@
2
R246 R251 3 JCRT1

6
2.2K_0402_5% 2.2K_0402_5% RB491D_SOT23-3 11
R ED 1
2
2
5
7
VGA_DDC_DAT 12
4 3 VGA_DDC_DAT GREEN 2
<8> GMCH_CRT_DATA 8
JVGA_HS 13
Q24B
2
BLUE 3
2N7002DW-T/R7_SOT363-6 9
1 6 VGA_DDC_CLK JVGA_VS 14
<8> GMCH_CRT_CLK
4 16
10 17
Q24A VGA_DDC_CLK 15
2N7002DW-T/R7_SOT363-6 5
@ 1 @ 1
SUYIN_070546FR015SX28XR
C305 C299
100P_0402_50V8J 2 2 100P_0402_50V8J
4 4

CRT PORT
B 0.2
LA-4421P
A B C D E
5 4 3 2 1
D D
+3VS
U17B
R162 1 2 8.2K_0402_5% PCI_DEVSEL# E18 D7 P CI_REQ#0
AD0 REQ0#
C18 AD1 GNT0# E7
R152 1 2 8.2K_0402_5% PCI_STOP# P CI_REQ#1
A16
F18
AD2 PCI REQ1# C16
D16
R153 1 AD3 GNT1#
2 8.2K_0402_5% PCI_TRD Y# E16 AD4 REQ2# C17 P CI_REQ#2
R151 1
A18 AD5 GNT2# D17 For EMI, close to ICH7
2 8.2K_0402_5% P CI_FRAME# E17 AD6 REQ3# E13 P CI_REQ#3
A17 AD7 GNT3# F13
R155 1 2 8.2K_0402_5% PCI_PLOCK# A15 A13 P CI_REQ#4
AD8 REQ4# / GPIO22 PCI_RST#
C14 AD9 GNT4# / GPIO48 A14
R158 1 2 8.2K_0402_5% P C I_ I RDY# E14 C8 P CI_REQ#5
AD10 GPIO1 / REQ5#
D14 AD11 GPIO17 / GNT5# D8
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R156 1 2 8.2K_0402_5% PCI_SERR# B12 PLTRST#
AD12
C13 AD13 C/BE0# B15
R157 1 2 8.2K_0402_5% PCI_PERR# G15 C12 2 2
AD14 C/BE1#
G13 AD15 C/BE2# D12
C203
C187
E12 C15 @ @
AD16 C/BE3#
C11 AD17
C +3VS P C I_ I RDY# 1 1 C
D11 AD18 IRDY# A7
A11 AD19 PAR E10
A10 B18 PCI_RST#
AD20 PCIRST# PCI_RST# <27>
R160 1 2 8.2K_0402_5% PCI_ PIRQA# F11 A12 PCI_DEVSEL#
AD21 DEVSEL# PCI_PERR#
F10 AD22 PERR# C9
R159 1 2 8.2K_0402_5% PCI_ PIRQB# E9 E11 PCI_PLOCK# 1 R169 2
AD23 PLOCK# PCI_SERR#
D9 AD24 SERR# B10
R132 1 2 8.2K_0402_5% PCI_PIRQC# B9 F15 PCI_STOP# 100K_0402_5%
AD25 STOP# PCI_TRD Y#
A8 AD26 TRDY# F14 For EC request.
R133 1 2 8.2K_0402_5% PCI_PIRQD# A6 F16 P CI_FRAME#
AD27 FRAME#
C7 AD28
R126 1 2 8.2K_0402_5% PCI_ PIRQE# B6 C26 PLTRST#
AD29 PLTRST# CLK_PCI_ICH
R131 1
E6 AD30 PCICLK A9 CLK_PCI_ICH <14> Place closely pin A9
2 8.2K_0402_5% PCI_PIRQF# D6 AD31 PME# B19
R127 1 2 8.2K_0402_5% PCI_ PIRQG# CLK_PCI_ICH

Interrupt I/F
2
R130 1 2 8.2K_0402_5% PCI_PIRQH# PCI_ PIRQA# A3 G8 PCI_ PIRQE#
PCI_ PIRQB# PIRQA# GPIO2 / PIRQE# PCI_PIRQF# @
B4 PIRQB# GPIO3 / PIRQF# F7
R129 1 2 8.2K_0402_5% P CI_REQ#0 PCI_PIRQC# C5 F8 PCI_ PIRQG# R167
PCI_PIRQD# PIRQC# GPIO4 / PIRQG# PCI_PIRQH# 10_0402_5%
B5 PIRQD# GPIO5 / PIRQH# G7
R150 1 2 8.2K_0402_5% P CI_REQ#1
1
R146 1
MISC
2 8.2K_0402_5% P CI_REQ#2 AE5 RSVD[1] RSVD[6] AE9 1
AD5 AG8 @
R154 1 RSVD[2] RSVD[7]
2 8.2K_0402_5% P CI_REQ#3 AG4 RSVD[3] RSVD[8] AH8 C186
AH4 F21 8.2P_0402_50V8D
R125 1 RSVD[4] RSVD[9] 2
2 8.2K_0402_5% P CI_REQ#4 AD9 RSVD[5] MCH_SYNC# AH20 MCH_ICH_SYNC# <6>
B R128 1 B
2 8.2K_0402_5% P CI_REQ#5
ICH7_BGA652
PLTRST#
PLTRST# <6,19,21,25>
1
R142
100K_0402_5%
2
A A

ICH7M(1/4)HUB,PCI,HOST
0.2
LA-4421P
5 4 3 2 1
5 4 3 2 1
C368
15P_0402_50V8J
D ICH_RTCX1 D
2 1
+RTCBATT
10M_0402_5%
Y3
1
32.768K_1TJS125BJ4A421P
R288
R198 1M_0402_5% 2 NC
IN 1
1 2 SM_INTRUDER#
3 4
R197 332K_0402_1% NC OUT U17A
2
LPC_AD[0..3] <27>
1 2 ICH_INTVRMEN C371
RTC
15P_0402_50V8J AB1 AA6 LPC_AD0
ICH_RTCX2 RTXC1 LAD0 LPC_AD1
2 1 AB2
RTCX2 LAD1
AB5
AC4 LPC_AD2
+RTCBATT R196 1 ICH_RTCRST# LAD2 LPC_AD3
+RTCBATT 2 AA3 RTCRST# LAD3 Y6
LPC
20K_0402_5%
ICH_INTVRMEN W4 AC3
J3 SM_INTRUDER# INTVRMEN LDRQ0#
Y5 INTRUDER# LDRQ1# / GPIO23 AA5
1 2
3MM AB3 LPC_FRAME#
LFRAME# LPC_FRAME# <27>
@ W1 EE_CS
2 Y1 EE_SHCLK 2 1 R200 10K_0402_5% +3VS
C231 C230 Y2 AE22 GATEA20
EE_DOUT A20GATE GATEA20 <27>
LAN
1U_0603_10V4Z T11 PAD W3 AH28 H_A20M#
EE_DIN A20M# H_A20M# <4>
CPU
0.1U_0402_16V4Z 1 2
1 V3 AG27
LAN_CLK CPUSLP#
U3 AF24 H_DPRSTP#
LAN_RSTSYNC TP1 / DPRSTP# H_DPSLP# H_DPRSTP# <4,40>
TP2 / DPSLP# AH25 H_DPSLP# <4>
U5 LAN_RXD0 2 1 56_0402_5% +VCCP
V4 AG26 H_FERR# R208
LAN_RXD1 FERR# H_FERR# <4>
T5 LAN_RXD2
AG24 H_PWRGOOD
HDA_SYNC_ICH GPIO49 / CPUPWRGD H_PWRGOOD <4>
<22> HDA_SYNC_AUDIO 1 2 U7
C R277 39_0402_5% LAN_TXD0 H_IGNNE# C
V6 LAN_TXD1 IGNNE# AG22 H_IGNNE# <4>
<22> HDA_BITCLK_AUDIO 1 2 HDA_BITCLK_ICH V7 AG21
R284 39_0402_5% LAN_TXD2 INIT3_3V# H_INIT#
INIT# AF22 H_INIT# <4>
1 2 HDA_RST_ICH# 2 AF25 H_INTR
<22> HDA_RST_AUDIO# INTR H_INTR <4>
R268 39_0402_5% C364
AC-97/AZALIA
1 2 HDA_SDOUT_ICH HDA_BITCLK_ICH U1 +VCCP
<22> HDA_SDOUT_AUDIO ACZ_BCLK
R282 39_0402_5% 39P_0402_50V8J HDA_SYNC_ICH R6 AG23 KB_RST#
1 @ ACZ_SYNC RCIN# KB_RST# <27>
1
1 HDA_RST_ICH# R5 AF23 H_SMI#
ACZ_RST# SMI# H_NMI H_SMI# <4>
C363 AH24 R203
NMI H_NMI <4>
39P_0402_50V8J <22> HDA_SDIN0 T2
@ ACZ_SDIN0 H_STPCLK# 56_0402_5%
T3 AH22 H_STPCLK# <4>
2 ACZ_SDIN1 STPCLK#
T1
2
3900P_0402_50V7K ACZ_SDIN2 THRMTRIP_ICH#
AF26 1 R202 2 H_THERMTRIP# <4,6>
HDA_SDOUT_ICH THERMTRIP# 24.9_0402_1%
T4
C379 ACZ_SDOUT
<24> SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_P0 1 2 SATA_ITX_DRX_P0 AH17 Layout note: R202 needs to placed
SATA_LED# DA0
<28> SATA_LED# AF18 AE17 within 2" of ICH7, R203 must be placed
C378 SATALED# DA1
AF17
SATA_ITX_C_DRX_N0 1 2 SATA_ITX_DRX_N0 DA2 within 2" of R194 w/o stub.
<24> SATA_ITX_C_DRX_N0 SATA_DTX_C_IRX_N0 AF3 AE16
<24> SATA_DTX_C_IRX_N0 SATA0RXN DCS1#
3900P_0402_50V7K SATA_DTX_C_IRX_P0 AE3 AD16
<24> SATA_DTX_C_IRX_P0 SATA0RXP DCS3#
SATA_ITX_DRX_N0 AG2
SATA0TXN
SATA
3900P_0402_50V7K SATA_ITX_DRX_P0 AH2
SATA0TXP
AB15
C382 SATA_DTX_C_IRX_N1 DD0
<21> SATA_DTX_C_IRX_N1 AF7 AE14
<21> SATA_ITX_C_DRX_P1 SATA_ITX_C_DRX_P1 1 SATA_ITX_DRX_P1 SATA_DTX_C_IRX_P1 SATA2RXN DD1
2 <21> SATA_DTX_C_IRX_P1 AE7 AG13
SATA_ITX_DRX_N1 SATA2RXP DD2
AG6 AF13
C384 SATA_ITX_DRX_P1 SATA2TXN DD3
AH6 AD14
SATA_ITX_C_DRX_N1 1 SATA_ITX_DRX_N1 SATA2TXP DD4
2 DD5
AC13
<21> SATA_ITX_C_DRX_N1 CLK_PCIE_SATA# AF1 AD12
<14> CLK_PCIE_SATA# SATA_CLKN DD6
3900P_0402_50V7K CLK_PCIE_SATA AE1 AC12
B <14> CLK_PCIE_SATA SATA_CLKP DD7 B
AE12
R205 DD8
AH10 AF12
SATARBIASN DD9
1 2 AG10
SATARBIASP DD10
AB13
+3VS AC14
24.9_0402_1% DD11
AF14
DD12
AH13
DD13
4.7K_0402_5% 1 2 R212 IDE_DIORDY IDE_DIORDY AG16
IDE DD14
AH14
AC15
IORDY DD15
10K_0402_5% 2 1 R201 SATA_LED# ID E_IRQ AH16
IDEIRQ
R204 1 2 8.2K_0402_5% ID E_IRQ AF16
DDACK#
AH15 AE15
DIOW# DDREQ
AF15
DIOR#
ICH7_BGA652
A A

ICH7M(2/4)LAN,ATA,LPC,RTC
Custom 0.2
LA-4421P
5 4 3 2 1
5 4 3 2 1
+3VS Place closely pin B2 Place closely pin AC1

CLK_ICH_48M CLK_ICH_14M
+3VALW +3VALW
1
10K_0402_5% +3VS
R209 1 2 SERIRQ R168 R199
2
2
2
8.2K_0402_5% R259 R258 R211 @ 10_0402_5% @ 10_0402_5%
R210 1 2 PM_CLKRUN# R147 R143 8.2K_0402_5%
2
2.2K_0402_5% 2.2K_0402_5% U17C
D 10K_0402_5% 10K_0402_5% D
1 1
1
ICH_SMBCLK C22 AF19 C189 C240
<14> ICH_SMBCLK
1
ICH_SMBDATA SMBCLK GPIO21 / SATA0GP
<14> ICH_SMBDATA B22 AH18
SMBDATA GPIO19 / SATA1GP
SMB
SATA
GPIO
LINKALERT# A26 AH19 @ 4.7P_0402_50V8C @ 4.7P_0402_50V8C
ICH_SMLINK0 LINKALERT# GPIO36 / SATA2GP 2 2
B25 AE19
ICH_SMLINK1 SMLINK0 GPIO37 / SATA3GP
A25
SMLINK1
+3VALW +3VALW
R261 AC1 CLK_ICH_14M
CLK14 CLK_ICH_14M <14>
Clocks
10K_0402_5% 1 2 ICH _RI# A28 B2 CLK_ICH_48M
RI# CLK48 CLK_ICH_48M <14>
R144 1 2 LINKALERT# 8.2K_0402_5%
SB_SPKR A19
<22> SB_SPKR SPKR
10K_0402_5% A27 C20
SUS_STAT# SUSCLK
R145 1 2 ITP_DBRESET# ITP_DBRESET# A22 SYS_RST#
SYS
B24 PM_SLP_S3#
PM_BMBUSY# SLP_S3# PM_SLP_S4# PM_SLP_S3# <27>
10K_0402_5% AB18 D23 PM_SLP_S4# <27>
<6> PM_BMBUSY# GPIO0 / BM_BUSY# SLP_S4#
R148 1 2 OCP# SLP_S5# F22 PM_SLP_S5#
PM_SLP_S5# <27>
OCP# B23
@ 10K_0402_5% GPIO11 / SMBALERT# ICH_POK R207
PWROK AA4 ICH_POK <6,27>
POWER MGT
R192 1 2 SPI_MISO <14> H_STP_PCI#
H_STP_PCI# AC20 GPIO18 / STPPCI# 1 2 10K_0402_5%
GPIO
H_STP_CPU# AF21 AC22 PM_DPRSLPVR
<14> H_STP_CPU# GPIO20 / STPCPU# GPIO16 / DPRSLPVR PM_DPRSLPVR <6,40>
@ 10K_0402_5%
R193 1 2 SB_SPI_CS# A21 C21 ICH_LOW_BAT#
GPIO26 TP0 / BATLOW#
B21 C23 PBTN_OUT#
GPIO27 PWRBTN# PBTN_OUT# <27>
E23 GPIO28
1K_0402_5% C19 PLTRST#
LAN_RST# PLTRST# <6,17,21,25>
R184 1 2 ICH_PCIE_WAKE# PM_CLKRUN# AG18 GPIO32 / CLKRUN#
Y4 EC_RSMRST#
RSMRST# EC_RSMRST# <27>
8.2K_0402_5% AC19 R206 10K_0402_5%
GPIO33 / AZ_DOCK_EN#
R149 2 1 ICH_LOW_BAT# U2 GPIO34 / AZ_DOCK_RST# 1 2
C @ 10K_0402_5% ICH_PCIE_WAKE# F20 EC_SCI# C
<21> ICH_PCIE_WAKE# WAKE# GPIO9 E20 EC_SCI# <27>
R195 1 2 SPI_MOSI <27> SERIRQ
SERIRQ AH21 SERIRQ GPIO10 A20 AC IN
ACIN <27,34>
EC_THERM# AF20 F19
<27> EC_THERM# THRM# GPIO12 EC_LID_OUT#
GPIO13 E19 EC_LID_OUT# <27>
VGATE AD22 R4
<14,27,40> VGATE VRMPWRGD GPIO14
GPIO15 E22
GPIO24 R3
AC21
AC18
GPIO6 GPIO GPIO25
D20
AD21
PAD T10
SATA_CLKREQ#
GPIO7 GPIO35 / SATAREQ# SATA_CLKREQ# <14>
EC_SMI# E21 AD20
<27> EC_SMI# GPIO8 GPIO38
AE20
GPIO39
ICH7_BGA652
U17D
F26 V26 DMI_RXN0
PERn1 DMI0RXN DMI_RXP0 DMI_RXN0 <6>
F25 V25 DMI_RXP0 <6>
PERp1 DMI0RXP
DIRECT MEDIA INTERFACE

E28 U28 DMI_TXN0
PETn1 DMI0TXN DMI_TXN0 <6>
E27 U27 DMI_TXP0
PETp1 DMI0TXP DMI_TXP0 <6>
PCIE_PTX_C_IRX_N2 H26 Y26 DMI_RXN1
<21> PCIE_PTX_C_IRX_N2 PCIE_PTX_C_IRX_P2 PERn2 DMI1RXN DMI_RXP1 DMI_RXN1 <6>
WLAN <21> PCIE_PTX_C_IRX_P2
C341 2 PCIE_ITX_PRX_N2
H25
PERp2 DMI1RXP
Y25
DMI_TXN1 DMI_RXP1 <6>
<21> PCIE_ITX_C_PRX_N2 1 0.1U_0402_10V7K G28 W28 DMI_TXN1 <6>
C337 2 PCIE_ITX_PRX_P2 PETn2 DMI1TXN DMI_TXP1
<21> PCIE_ITX_C_PRX_P2 1 0.1U_0402_10V7K G27 W27 DMI_TXP1 <6>
PETp2 DMI1TXP
PCI-EXPRESS
PCIE_PTX_C_IRX_N3 K26 AB26
<25> PCIE_PTX_C_IRX_N3 PCIE_PTX_C_IRX_P3 PERn3 DMI2RXN
LAN <25> PCIE_PTX_C_IRX_P3
C350 2 PCIE_ITX_PRX_N3
K25
PERp3 DMI2RXP
AB25
<25> PCIE_ITX_C_PRX_N3 1 0.1U_0402_10V7K J28
PETn3 DMI2TXN
AA28
C346 2 1 0.1U_0402_10V7K PCIE_ITX_PRX_P3 J27 AA27
B <25> PCIE_ITX_C_PRX_P3 PETp3 DMI2TXP B
M26 AD25
PERn4 DMI3RXN
M25 AD24
PERp4 DMI3RXP
L28 AC28
PETn4 DMI3TXN
L27 AC27
PETp4 DMI3TXP
P26 AE28 CLK_PCIE_ICH#
PERn5 DMI_CLKN CLK_PCIE_ICH CLK_PCIE_ICH# <14>
P25 AE27 CLK_PCIE_ICH <14>
PERp5 DMI_CLKP
N28
PETn5 R180 24.9_0402_1%
N27
PETp5 DMI_ZCOMP
C25
DMI_IRCOMP
Within 500 mils
D25 1 2 +1.5VS
DMI_IRCOMP
T25
PERn6 USB20_N0
T24 F1
R28
PERp6 USBP0N
F2 USB20_P0 USB20_N0 <30> USB1(Right)
PETn6 USBP0P USB20_P0 <30>
R27 G4 USB20_N1
PETp6 USBP1N
G3 USB20_P1
USB20_N1 <30> USB2(Right)
USBP1P USB20_P1 <30>
R2 H1 USB20_N2
SB_SPI_CS# SPI_CLK USBP2N USB20_P2 USB20_N2 <24>
P6 H2
SPI_CS# USBP2P USB20_P2 <24> CMOS
SPI
P1 J4 USB20_N3
SPI_ARB USBP3N USB20_P3 USB20_N3 <26>
J3
SPI_MOSI P5
USBP3P
K1 USB20_N4
USB20_P3 <26> Card reader
+3VALW SPI_MOSI USBP4N USB20_N4 <21>
SPI_MISO P2 K2 USB20_P4
USB_OC#6 SPI_MISO USBP4P
L4 USB20_N5 USB20_P4 <21> WWAN
USB_OC#2 USBP5N USB20_P5 USB20_N5 <21>
L5
USB_OC#3 USB_OC#0 D3
USBP5P
M1 USB20_N6
USB20_P5 <21> WiMAX
USB_OC#4 <30> USB_OC#0 USB_OC#1 OC0# USBP6N USB20_P6 USB20_N6 <21>
USB_OC#5 1 R164 2
<30> USB_OC#1 USB_OC#2
C4
D5
OC1# USB USBP6P
M2
N4 USB20_N7 USB20_P6 <21> BT
USB_OC#3 OC2# USBP7N USB20_P7 USB20_N7 <30>
10K_0402_5% D4 N3
USB_OC#4 E5
OC3# USBP7P USB20_P7 <30> USB3(Left)
USB_OC#7 R163 2 USB_OC#5 OC4# R181 22.6_0402_1%
1 C3
OC5# / GPIO29
10K_0402_5% USB_OC#6 A2 D2 USBRBIAS 1 2
USB_OC#7 OC6# / GPIO30 USBRBIAS#
<30> USB_OC#7 B3 OC7# / GPIO31 USBRBIAS D1
A USB_OC#0 R161 2 A
1
10K_0402_5%
Within 500 mils
ICH7_BGA652
USB_OC#1

ICH7M(3/4)USB,GPIO,PCIE
Custom 0.2
LA-4421P
5 4 3 2 1
5 4 3 2 1
U17F +VCCP U17E

0.94A A4
VSS[0] VSS[98]
P28
6mA ICH_V5REF_RUN G10 L11 0.1U_0402_16V4Z A23 R1
V5REF[1] Vcc1_05[1] VSS[1] VSS[99]
220U_B2_2.5VM_R35
Vcc1_05[2] L12 B1 VSS[2] VSS[100] R11
AD17 L14 1 B8 R12
+1.5VS V5REF[2] Vcc1_05[3] VSS[3] VSS[101]
Vcc1_05[4] L16 1 1 B11 VSS[4] VSS[102] R13
+
C248
10mAICH_V5REF_SUS F6 V5REF_Sus Vcc1_05[5] L17 C222 C227 B14 VSS[5] VSS[103] R14
0.77A Vcc1_05[6] L18 B17 VSS[6] VSS[104] R15
0.1U_0402_16V4Z AA22 M11 B20 R16
Vcc1_5_B[1] Vcc1_05[7] 2 2 2 VSS[7] VSS[105]
220U_B2_2.5VM_R35
1 AA23 Vcc1_5_B[2] Vcc1_05[8] M18 B26 VSS[8] VSS[106] R17
+5VS +3VS AB22 P11 B28 R18
1 1 1 Vcc1_5_B[3] Vcc1_05[9] VSS[9] VSS[107]
+
C367
C228 C216 C204 AB23 P18 C2 T6
D Vcc1_5_B[4] Vcc1_05[10] 1U_0603_10V4Z VSS[10] VSS[108] D
AC23 Vcc1_5_B[5] Vcc1_05[11] T11 C6 VSS[11] VSS[109] T12
1
AC24 Vcc1_5_B[6] Vcc1_05[12] T18 C27 VSS[12] VSS[110] T13

R189 D12 2 2 2 2
AC25 Vcc1_5_B[7] Vcc1_05[13] U11 D10 VSS[13] VSS[111] T14
@ AC26 U18 D13 T15
100_0402_5% RB751V-40TE17_SOD323-2 0.1U_0402_16V4Z 0.1U_0402_16V4Z Vcc1_5_B[8] Vcc1_05[14] VSS[14] VSS[112]
AD26 Vcc1_5_B[9] Vcc1_05[15] V11 D18 VSS[15] VSS[113] T16
AD27 V12 D21 T17
2
Vcc1_5_B[10] Vcc1_05[16] VSS[16] VSS[114]

AD28 Vcc1_5_B[11] Vcc1_05[17] V14 D24 VSS[17] VSS[115] U4
ICH_V5REF_RUN Place closely pin D26 V16 E1 U12
Vcc1_5_B[12] Vcc1_05[18] VSS[18] VSS[116]
1 D27 Vcc1_5_B[13] Vcc1_05[19] V17 E2 VSS[19] VSS[117] U13
C215 D28,T28,AD28. D28 Vcc1_5_B[14] Vcc1_05[20] V18 E4 VSS[21] VSS[118] U14
E24 Vcc1_5_B[15] E8 VSS[22] VSS[119] U15
1U_0603_10V4Z E25 U6 +3VS56mA E15 U16
2 Vcc1_5_B[16] Vcc3_3 / VccHDA VSS[23] VSS[120]
E26 Vcc1_5_B[17] 1 F3 VSS[24] VSS[121] U17
F23 R7 +3VALW 10mA C243 F4 U24
Vcc1_5_B[18] VccSus3_3/VccSusHDA +VCCP VSS[25] VSS[122]
F24 Vcc1_5_B[19] F5 VSS[26] VSS[123] U25
G22 AE23 0.1U_0402_16V4Z F12 U26
Vcc1_5_B[20] V_CPU_IO[1] 2 VSS[27] VSS[124]
G23 Vcc1_5_B[21] V_CPU_IO[2] AE26 14mA F27 VSS[28] VSS[125] V2
H22 Vcc1_5_B[22] V_CPU_IO[3] AH26 F28 VSS[29] VSS[126] V13
+5VALW +3VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
H23 Vcc1_5_B[23] G1 VSS[30] VSS[127] V15
J22 Vcc1_5_B[24] Vcc3_3[3] AA7 +3VS0.27A 1 1 1 G2 VSS[31] VSS[128] V24
J23 Vcc1_5_B[25] Vcc3_3[4] AB12 G5 VSS[32] VSS[129] V27
1
C244
C242
C247
D10 K22 AB20 1 G6 V28
R186 @ Vcc1_5_B[26] Vcc3_3[5] C235 VSS[33] VSS[130]
K23 Vcc1_5_B[27] Vcc3_3[6] AC16 G9 VSS[34] VSS[131] W6
2 2 2
L22 Vcc1_5_B[28] Vcc3_3[7] AD13 G14 VSS[35] VSS[132] W24
10_0402_5% RB751V-40TE17_SOD323-2 L23 AD18 0.1U_0402_16V4Z G18 W25
Vcc1_5_B[29] Vcc3_3[8] 2 VSS[36] VSS[133]
M22 AG12 G21 W26
2
ICH_V5REF_SUS Vcc1_5_B[30] Vcc3_3[9] VSS[37] VSS[134]

M23 Vcc1_5_B[31] Vcc3_3[10] AG15 G24 VSS[38] VSS[135] Y3
N22 Vcc1_5_B[32] Vcc3_3[11] AG19 G25 VSS[39] VSS[136] Y24
1 N23 Vcc1_5_B[33] G26 VSS[40] VSS[137] Y27
C207 P22 A5 +3VS H3 Y28
Vcc1_5_B[34] Vcc3_3[12] VSS[41] VSS[138]
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C P23 B13 H4 AA1 C
0.1U_0402_16V4Z Vcc1_5_B[35] Vcc3_3[13] VSS[42] VSS[139]
R22 Vcc1_5_B[36] Vcc3_3[14] B16 1 1 1 H5 VSS[43] VSS[140] AA24
2
R23 Vcc1_5_B[37] Vcc3_3[15] B7 H24 VSS[44] VSS[141] AA25
C193
C212
C195
R24 Vcc1_5_B[38] Vcc3_3[16] C10 H27 VSS[45] VSS[142] AA26
R25 Vcc1_5_B[39] Vcc3_3[17] D15 H28 VSS[46] VSS[143] AB4
2 2 2
R26 Vcc1_5_B[40] Vcc3_3[18] F9 J1 VSS[47] VSS[144] AB6
+3VS T22 G11 J2 AB11
Vcc1_5_B[41] Vcc3_3[19] VSS[48] VSS[145]
T23 G12 J5 AB14
Vcc1_5_B[42] Vcc3_3[20] VSS[49] VSS[146]
T26 G16 J24 AB16
Vcc1_5_B[43] Vcc3_3[21] VSS[50] VSS[147]
T27 J25 AB19
Vcc1_5_B[44] VSS[51] VSS[148]
1 T28 W5 +RTCBATT J26 AB21
C192 Vcc1_5_B[45] VccRTC VSS[52] VSS[149]
U22 K24 AB24
Vcc1_5_B[46] VSS[53] VSS[150]
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VALW45mA
U23 P7 K27 AB27
0.1U_0402_16V4Z Vcc1_5_B[47] VccSus3_3[1] VSS[54] VSS[151]
V22 1 1 1 1 K28 AB28
2 Vcc1_5_B[48] VSS[55] VSS[152]
C233
C237
V23 A24 C225 C213 L13 AC2
Vcc1_5_B[49] VccSus3_3[2] VSS[56] VSS[153]
W22 C24 L15 AC5
Vcc1_5_B[50] VccSus3_3[3] 0.1U_0402_16V4Z 0.1U_0402_16V4Z VSS[57] VSS[154]
W23 D19 L24 AC9
Vcc1_5_B[51] VccSus3_3[4] 2 2 2 2 VSS[58] VSS[155]
Y22 D22 L25 AC11
Vcc1_5_B[52] VccSus3_3[5] VSS[59] VSS[156]
Place closely pin AG28 within 100mlis. Y23
Vcc1_5_B[53] VccSus3_3[6]
G19 L26
VSS[60] VSS[157]
AD1
M3 AD3
+1.5VS +1.5VS_DMIPLLR +1.5VS_DMIPLL VSS[61] VSS[158]
B27 K3 M4 AD4
R291 R290 Vcc3_3[1] VccSus3_3[7] +3VALW VSS[62] VSS[159]
50mA VccSus3_3[8]
K4 1 1 M5
VSS[63] VSS[160]
AD7
1 2 1 2 +1.5VS_DMIPLL AG28 K5 C224 C206 M12 AD8
VccDMIPLL VccSus3_3[9] VSS[64] VSS[161]
10U_0805_10V4Z
0.01U_0402_25V7K
K6 M13 AD11
0.5_0805_1% 0_0805_5% VccSus3_3[10] 0.1U_0402_16V4Z 0.1U_0402_16V4Z VSS[65] VSS[162]
1 1 +1.5VS AB7 L1 M14 AD15
Vcc1_5_A[1] VccSus3_3[11] 2 2 VSS[66] VSS[163]
C381
0.64A AC6
Vcc1_5_A[2] VccSus3_3[12]
L2 M15
VSS[67] VSS[164]
AD19
C246
AC7 L3 M16 AD23

Vcc1_5_A[3] VccSus3_3[13] VSS[68] VSS[165]
1 AD6 L6 M17 AE2
2 2 C245 Vcc1_5_A[4] VccSus3_3[14] VSS[69] VSS[166]
AE6 L7 M24 AE4
AF5 M6 M27 AE8
B 0.1U_0402_16V4Z Vcc1_5_A[6] VccSus3_3[16] VSS[71] VSS[168] B
AF6 M7 M28 AE11
2 Vcc1_5_A[7] VccSus3_3[17] VSS[72] VSS[169]
AG5 N7 N1 AE13
AH5 N2 AE18
Vcc1_5_A[9] VSS[74] VSS[171]
AB17 +1.5VS N5 AE21
Vcc1_5_A[19] VSS[75] VSS[172]
+1.5VS Place closely pin AG5. AD2
VccSATAPLL Vcc1_5_A[20]
AC17 N6
VSS[76] VSS[173]
AE24
N11 AE25
VSS[77] VSS[174]
+3VS AH11 T7 N12 AF2
Vcc3_3[2] Vcc1_5_A[21] VSS[78] VSS[175]
0.1U_0402_16V4Z
0.1U_0402_16V4Z
F17 N13 AF4

Vcc1_5_A[22] VSS[79] VSS[176]
1 AB10 G17 N14 AF8
+1.5VS Vcc1_5_A[10] Vcc1_5_A[23] VSS[80] VSS[177]
1 AB9 N15 AF11
Vcc1_5_A[11] VSS[81] VSS[178]
C241
C239
1 AC10 AB8 1 2 N16 AF27

C238 Vcc1_5_A[12] Vcc1_5_A[24] VSS[82] VSS[179]
AD10 AC8 N17 AF28
2 Vcc1_5_A[13] Vcc1_5_A[25] C236 0.1U_0402_16V4Z VSS[83] VSS[180]
AE10 N18 AG1
2 1U_0603_10V4Z Vcc1_5_A[14] VSS[84] VSS[181]
AF10 K7 N24 AG3
2 Vcc1_5_A[15] VccSus1_05[1] VSS[85] VSS[182]
AF9 N25 AG7
Vcc1_5_A[16] VSS[86] VSS[183]
AG9 C28 N26 AG11
AH9 G20 P3 AG14
P4 AG17
VSS[89] VSS[186]
+3VALW Place closely pin AG9. E3
VccSus3_3[19] Vcc1_5_A[26]
A1 +1.5VS P12
VSS[90] VSS[187]
AG20
1 H6 P13 AG25
C217 Vcc1_5_A[27] VSS[91] VSS[188]
+1.5VS 10mA C1
VccUSBPLL Vcc1_5_A[28]
H7 1 P14
VSS[92] VSS[189]
AH1
1 J6 C214 P15 AH3
0.1U_0402_16V4Z C188 Vcc1_5_A[29] VSS[93] VSS[190]
AA2 J7 P16 AH7
2 VccSus1_05/VccLAN1_05[1] Vcc1_5_A[30] 0.1U_0402_16V4Z VSS[94] VSS[191]
Y7 P17 AH12
0.1U_0402_16V4Z VccSus1_05/VccLAN1_05[2] 2 VSS[95] VSS[192]
P24 AH23
+5VS +3VS +1.5VS +VCCP 2 VSS[96] VSS[193]
V5 P27 AH27
VccSus3_3/VccLAN3_3[1] VSS[97] VSS[194]
V1
VccSus3_3/VccLAN3_3[2] ICH7_BGA652
W2
VccSus3_3/VccLAN3_3[3]
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1 1 1 +3VS W7
VccSus3_3/VccLAN3_3[4]
C257
C398
C399
C400
A ICH7_BGA652 A
1
C232
2 2 2 2
0.1U_0402_16V4Z
2

EMI Request ICH7M(4/4)POWER/GND
Custom 0.2
LA-4421P
5 4 3 2 1
A B C D E
Mini-Express Card for WLAN

+1.5VS
+3VS_WLAN
0.1U_0402_16V4Z
1 1 1
1 1 C158 C190 C151
C145 C178
4.7U_0805_10V4Z 0.01U_0402_25V7K
4.7U_0805_10V4Z 0.1U_0402_16V4Z 2 2 2
1 2 2 1
JP14
<19> ICH_PCIE_WAKE# ICH_PCIE_WAKE# 1 2 +3VS_WLAN R252 1 2 0_0805_5% +3VS
BT_ACTIVE R182 1 @ 0_0402_5% 1 2
2 3 4
WLAN_ACTIVE R174 1 @ 0_0402_5% 3 4
2 5
5 6
6 +1.5VS
WLAN_CLKREQ# 7 8
<14> WLAN_CLKREQ# 7 8
9 10
9 10
<14> CLK_PCIE_WLAN# 11 12
11 12
<14> CLK_PCIE_WLAN 13 13 14 14
15 15 16 16
17 17 18 18
19 20 WL_OFF#
19 20 PLTRST# WL_OFF# <27>
21 21 22 22 PLTRST# <6,17,19,25>
<19> PCIE_PTX_C_IRX_N2 23 23 24 24 1 2 +3VS
25 26 R124 0_0402_5%
<19> PCIE_PTX_C_IRX_P2 25 26
27 27 28 28 1 2 +3VALW
29 30 R122 @ 0_0402_5%
29 30
<19> PCIE_ITX_C_PRX_N2 31 31 32 32
33 33 34 34
<19> PCIE_ITX_C_PRX_P2
35 35 36 36 USB20_N5 <19>
37 37 38 38 USB20_P5 <19>
+3VS_WLAN 39 39 40 40 D6
1 2 41 41 42 42
43 44 WLAN_LED# 1 2
0.1U_0402_16V4Z C163 43 44
45 45 46 46 WW_LED# <24>
47 47 48 48
49 50 RB751V_SOD323
49 50
51 51 52 52 D5
2 BT_LED# 2
53 GND1 GND2 54 1 2
ACES_88910-5204 RB751V_SOD323
ME@ BT@
D4
WWAN_LED# 1 2 +5VS
BT MODULE CONN
2
Mini-Express Card for WWAN +3VS +3VS_WWAN
RB751V_SOD323
WWAN@
R254
10K_0402_5%
BT@
1 1
+3VS_WWAN J2 @
2 1 JOPEN
1 WWAN@ 1 1 Q25
C149 WWAN@ C202 BT@
C153 WWAN@ JP13 2
<27> BT_OFF#
0.1U_0402_16V4Z 0.01U_0402_25V7K 1 2 +3VS BT@ +3VS_BT
2 2 2 1 2 Q26
3 4
10U_0805_10V4Z 3 4 DTC124EK_SC59 SI2301BDS_SOT23 BT@
5 6 +1.5VS
5 6 +UIM_PWR C309
7 8
3
7 8
S
UIM_DATA
D
9 10 3 1 2 1
9 10 UIM_CLK
11 12
11 12 UIM_RST 0.1U_0402_16V4Z
13 14
13 14 UIM_VPP
G
15 16
2
15 16
17 18
3900P_0402_50V7K 17 18 WXMIT_OFF# +3VS_BT
19 20
19 20 WXMIT_OFF# <27>
SB RX+ SATA_DTX_C_IRX_P1 1
C318
2 SATA_DTX_IRX_P1
21
23
21 22
22
24
3 <18> SATA_DTX_C_IRX_P1 SATA_DTX_C_IRX_N1 23 24 3
1 2 SATA_DTX_IRX_N1 25
25 26
26 BT_LED#
<18> SATA_DTX_C_IRX_N1
SB RX- C319 3900P_0402_50V7K 27
29
27 28
28
30
+1.5VS
JP5
29 30
1
SATA_ITX_C_DRX_N1
SB TX- <18> SATA_ITX_C_DRX_N1
SATA_ITX_C_DRX_P1
31
33
31 32
32
34
1
2
1 GND
9
<18> SATA_ITX_C_DRX_P1 33 34 2
USB20_N6
SB TX+ +3VS_WWAN
35
37
35 36
36
38
USB20_N4 <19> <19> USB20_N6
USB20_P6
3
4
3
37 38 USB20_P4 <19> <19> USB20_P6 4
39 40 Q11 2 BTON_LED 5
39 40 WWAN_LED# BT_ACTIVE 5
PIN 45 NC for SATA SSD DA/DSS
TO EC
41
43
41 42
42
44
DTC124EK_SC59
BT@ WLAN_ACTIVE
6
7
6
<27> DETECTION 43 44 7
1
45 46 8 10
+3VS_WWAN 100K_0402_5% 1 @ R117 2 J5 45 46 8 GND
+3VALW 47 48 +1.5VS
3
47 48 R102 ACES_87213-0800G
<27> EC_TX_P80_DATA 2 1 49 50
2 1 49 50 10K_0402_5% ME@
51 52
51 52
C200
@ JUMP_43X39 @
2
1 WWAN@ J6 53
GND1 GND2
54
0.1U_0402_16V4Z
2
<27> EC_RX_P80_CLK 2 1 1
@ JUMP_43X39 ACES_88910-5204
2 ME@ +1.5VS
For EMI request 0.1U_0402_16V4Z 0.1U_0402_16V4Z

1 1
C168 C159
JP1
4 1 +UIM_PWR
UIM_VPP GND VCC UIM_RST 2 2
5 2
UIM_DATA VPP RST UIM_CLK
6 3
I/O CLK
7
DET
1U_0603_10V4Z
1
1
10K_0402_5%
C266
4 WWAN@ 4
R228
GND 8
GND 9
@ 2
2
+UIM_PWR
TAITW_PMPAT6-06GLBS7N14N0 ME@ Security Classification Compal Secret Data Compal Electronics, Inc.
Reserve for SIM card does not meet rise time Mini-Card/BT CONN
and pull-up is needed. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
0.2
LA-4421P
A B C D E
5 4 3 2 1
HDA_RST_AUD IO#
+5VS +5VAMP Adjustable Output
H D A_S YNC_AUDIO
EMI +3VS +3VDD_CODEC +5VDDA_CODEC
R260 U 14 +5VAMP J4 @ +5VDDA_CODEC
2 1 1 +5VDDA_CODEC 2 1
IN L16
0_0805_5% 5
OUT J O PEN HDA_BITCLK_AUDIO
2 1 2 1 2
GND
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
R262 @
0.01U_0402_25V7K
1 1 3 4 1 1 33_0402_5% FBMA-L11-160808-800LMT_0603 1 1 1 1 1
C330 SHDN BYP
C323
C327
C325
C344
C349
C321
@ 1 1 1
C361
4.7U_0805_10V4Z
<BOM Structure>
G9191-475T1U_SOT23-5
C343
C340
C331
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
@
2 2 2 @ 2 2 @2 2 2 2
C 329
@
2 2 2
@ @ @
D D
Place near Pin1 Place near Pin25 Place near Pin38
+MIC2_VREFO
+5VDDA_CODEC +3VDD_CODEC
+MIC1_VREFO_L Place near Pin9
1
0.1U_0402_16V4Z
10U_0805_10V4Z
R188
2
4.7K_0402_5% 1 1
C336
C326
D 22 D 23
RB751V_SOD323
2
RB751V_SOD323
2 2
25
38
1
9
U 15
AVDD1
AVDD2
DVDD
DVDD_IO
1
1
INT _MIC_L
<28> INT_MIC_L
R266 R279
1 4.7K_0402_5% 4.7K_0402_5% 14 35 C_LINE_OUTL C324 1 2 0.01U_0603_16V7K LINE_OUTL
LINE2-L LOUT1_L
C209 C_LINE_OUTR C322 1
Internal Speaker
15 36 2 0.01U_0603_16V7K LINE_OUTR
2
47P_0402_50V8J 2.2U_0603_6.3V6K LINE2-R LOUT1_R
2 INT _MIC_L 1 2 MIC _INTL 2 1 C352 MIC_I NL 16 39
GN DA 1K_0402_5% R280 MIC2_L LOUT2_L
Internal MIC / Array MIC MIC_INR
2 1 C353 17 41
MIC2_R LOUT2_R
2.2U_0603_6.3V6K 23 48
LINE1_L SPDIFO1
24 45
LINE1_R SPDIFO2
C 1 2 2.2U_0603_6.3V6K 2 1 C354 MIC_EXTL_C 21 33 2 1 C
<23> EXT_MIC_L MIC1_L HPOUT_L HP_OUTL <23>
1K_0402_5% R278 62_0402_5% R175 Headphone
1 2 2.2U_0603_6.3V6K 2 1 C355 MI C_EXTR_C 22 32 2 1
<23> EXT_MIC_R MIC1_R HPOUT_R HP_OUTR <23>
1K_0402_5% R265 62_0402_5% R183
C345
external MIC 1 2 PC_BEEP 12 37

BEEP_IN MONO_OUT
100P_0402_50V8J
<18> HDA_BITCLK_AUDIO 6 46
BITCLK DMIC_CLK1/2
<18> HDA_SDOUT_AUDIO 5 44
SDATA_OUT DMIC_CLK3/4
<18> H D A_SDIN0 1 2 8 20
R 263 39_0402_5% SDATA_IN LINE2_VREFO
HDA_RST_AUD IO# 11 18
<18> HDA_RST_AUDIO# RESET# LINE1_VREFO
H D A_S YNC_AUDIO 10 28
<18> H D A_S YNC_AUDIO SYNC MIC1_VREFO +MIC1_VREFO_L
R140
1 2 19 +MIC2_VREFO
R269 0_0402_5% MIC2_VREFO
2
GPIO0/DMIC_DATA1/2
1 2 31 1 2
R136 0_0402_5% CPVREF C 328 2.2U_0603_6.3V4
3
GPIO1/DMIC_DATA3/4
1
R171
2
0_0402_5%
MIC Sense SENSEA VREF
27
<23> MIC_JD 2 1 13
R271 place near pin13 SENSE A
10U_0805_10V4Z
0.1U_0402_16V4Z
1 2 20K_0402_1% R271 40
JDREF
R135 0_0402_5% Capless HP Sense <23> PLUG_IN 2 1 SENSEB 34 2 1
1
SENSE B
C334
C339
1 2 5.1K_0402_1% R170 30
0_0402_5% R170 place near pin34 <27> E APD 1 2 47
CBN R 257
0_0402_5% R 166 EAPD
29 1 2 20K_0402_1%
CBP C332 2.2U_0603_6.3V4 1 2
43
NC
GND GNDA
2
4 26
DVSS AVSS1
7
DVSS AVSS2
42 Close Pin27
Pin Assignment Location Function
ALC272-GR_LQFP48
B LINE-OUT (Pin35/36) Internal Int Speaker B
Capless HP-OUT (Pin32/33) External Headphone out
LINE1 (Pin23/24) External

+5VAMP
MIC1(Pin21/22) External Mic in
W=40mil
MONO-OUT(Pin37) Internal
1 1
MIC2(Pin16/17) Internal Internal Mic U 16
C 360 C338
0.1U_0402_16V4Z 4.7U_0805_10V4Z 16 12
2 2 VDD NC
6
PVDD
15
PVDD EC_MUTE#
GAIN0 GAIN1
19
PC Beep G AIN0 2
SHUTDOWN EC_MUTE# <27> 0 0 6dB
GAIN0 SPKL-
0 1 10dB
8 SPKL- <23>
G AIN1 LOUT- 1 0 15.6dB
3
GAIN1 SPKR-
14 SPKR- <23> 1 1 21.6dB
ROUT-
4 SPKL+ SPKL+ <23>
LOUT+
LINE_OUTL
20mil SPKR+ +5VAMP +5VAMP
5 18 SPKR+ <23>
LIN- ROUT+
LINE_OUTR
EC Beep R267 C348 17
RIN-
1
GND
2
<27> BEEP# 1 2 PC_BEEP1 1 2 PC_BEEP 9 11
LIN+ GND @ R194 R 191
2 13
47K_0402_5% GND 100K_0402_5% 100K_0402_5%
7 20
0.1U_0402_16V4Z C347 RIN+ GND
21
GND
0.47U_0603_16VY5V
2 1
2 1
A 1 10 G AIN0 G AIN1 A
BYPASS 2
R264 2
C 342 R283 R 281
<19> SB_SPKR 1 2 C 351 0.47U_0603_16VY5V 100K_0402_5% 100K_0402_5%
TPA6017A2PWPR_TSSOP20 1 @
0.47U_0603_16VY5V
1
47K_0402_5% 1
ICH Beep 1
1
R270
C362
10K_0402_5% 0.1U_0402_16V4Z
2
2
Security Classification Compal Secret Data Compal Electronics,Ltd.

Issued Date 2008/03/25 Deciphered Date 2008/04/ Title
HD Audio Codec_ALC272
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
C 0 .1
KIWB1/B2_LA4601P
5 4 3 2 1
5 4 3 2 1
D8 D9
3 3
1 1
2 2
PSOT24C_SOT23-3 PSOT24C_SOT23-3
@ @
D D
ME@
ACES_87213-0400G
SPKL+ R176 1 2 0_0402_5% SPK_L1+ 4 6
<22> SPKL+ 4 GND
SPKL- R177 1 2 0_0402_5% SPK_L1- 3 5
<22> SPKL- 3 GND
SPKR+ R178 1 2 0_0402_5% SPK_R1+ 2
<22> SPKR+ 2
SPKR- R179 1 2 0_0402_5% SPK_R1- 1
<22> SPKR- 1
JP7
20mil
Speaker Conn.
@ C196 22P_0402_50V8J
@ C197 22P_0402_50V8J
@ C198 22P_0402_50V8J
@ C199 22P_0402_50V8J
1 1 1 1
2 2 2 2
W=20mils L5
EXT_MIC_L 1 2 EXT_MIC_L-2
<22> EXT_MIC_L
FBMA-L10-160808-121LMT_2P
1 1
C226 @ C220
47P_0402_50V8J
2 2
10P_0402_50V8J Audio Jack
W=20mils GN DA GN DA
C L4 C
EXT_MIC_R 1 2 EXT_MIC_R-2
<22> EXT_MIC_R
FBMA-L10-160808-121LMT_2P
1 1
MIC IN
JMIC1
C205 @ C335 1
47P_0402_50V8J 10P_0402_50V8J 2
2 2
GN DA GN DA 3
MIC_ JD 4
<22> MIC_JD
1 GN DA 5
2
10P_0402_50V8J C333 @
@ D11
2
PSOT24C_SOT23-3
6 G
GN DA GN DA
SINGA_2SJ-0960-C02
1
ME@
B B
220P_0402_50V7K 220P_0402_50V7K
2
C234 C229
1
GN DA
Headphone
JHP1
W=20mils HP_OUTL L7 PL-OUT
1
<22> HP_OUTL 1 2 2
FBMA-L10-160808-121LMT_2P
HP_OUTR L6 1 2 PR-OUT 3
<22> HP_OUTR
FBMA-L10-160808-121LMT_2P
PLU G_IN 4
<22> PLUG_IN
1
5
2
10P_0402_50V8J C366
@ @
2 D13
GN DA 6 G GN DA
PSOT24C_SOT23-3
GN DA SINGA_2SJ-0960-C02
1
ME@
A A
Security Classification Compal Secret Data Compal Electronics,Ltd.

Issued Date 2008/03/25 Deciphered Date 2008/04/ Title
AMP,Audio speaker CONN
C ustom 0.1
KIWB1/B2_LA4601P
5 4 3 2 1
A B C D E F G H
1 1
LED
R214 LED3
CMOS Camera CONN +5VALW 2 1 2 1
White
PWR_LED# <27>
510_0402_5%
HT-F196BP5_WHITE
R213 LED2 White
SI2301BDS-T1-E3_SOT23-3 +5VALW 2 1 2 1 CHARGE_LED0# <27>
+5VS CMOS@ 510_0402_5%
R234
CMOS@ HT-F196BP5_WHITE
S
+5V_CMOS_R 1 +5V_CMOS R216 LED5 Amber
D
3 1 2
+3VALW 2 1 2 1 CHARGE_LED1# <27>
1
300_0402_5%
Q23 0_0603_5% HT-191UD-DT_AMBER_0603
G
1
2
R41 CMOS@
10K_0402_5% C277 CMOS@ C276 R215 LED4 White
CMOS@ 0.01U_0402_25V7K 0.1U_0402_16V4Z +5VS 2 1 2 1 WW_LED# <21>
2
CMOS1 2 510_0402_5%
1 2
HT-F196BP5_WHITE
JP2
1
1 1
<19> USB20_N2 USB20_N2 2
OUT
USB20_P2 2
<19> USB20_P2 3 3
4 4
2
<27> CMOS_OFF# 2 IN 5 5
@ 6 R4 LED1 White
GND
D16 GND1
7 GND2 +5VALW 2 1 2 1 PWR_LED# <27>
Q5 PSOT24C_SOT23-3 510_0402_5%
DTC124EKAT146_SC59-3 ACES_88266-05001 HT-F196BP5_WHITE
3
2 CMOS@ 2
ME@
1
+5VS
0.1U_0402_16V4Z 10U_0805_10V4Z
1 1 1 1
C23 C26 C22 C19
2 2 2 2
1000P_0402_50V7K 1U_0603_10V4Z
SATA HDD Conn.

JP10
3 3
1
SATA_ITX_C_DRX_P0 GND
<18> SATA_ITX_C_DRX_P0 2
SATA_ITX_C_DRX_N0 A+
<18> SATA_ITX_C_DRX_N0 3
A-
4
SATA_DTX_C_IRX_N0 SATA_DTX_IRX_N0 GND
1 2 C380 5
<18> SATA_DTX_C_IRX_N0 3900P_0402_50V7K B-
6
SATA_DTX_C_IRX_P0 SATA_DTX_IRX_P0 B+
1 2 7
<18> SATA_DTX_C_IRX_P0 GND
C383
3900P_0402_50V7K 8
+3VS V33
9
V33
10
V33
11
GND
12
GND
13
GND
+5VS 14
V5
15
V5
16
V5
17
GND
18
Reserved
19
GND
20
V12
21 24
V12 GND
22 23
V12 GND
SUYIN_127085FR022G211ZR
ME@
4 4

SSD,CMOS CONN\LED
B 0.2
LA-4421P
A B C D E F G H
A B C D E
1 2 +3V_LAN
R14 3.6K_0402_5%
LAN_DI
LAN_CS
1 2
R13 1K_0402_5%
4 4
Close to Pin10,13,30,36 +LAN_VDD12
Close to Pin1,37,29
Place Close to Chip U1 +3V_LAN
0.1U_0402_16V4Z
C254 2 1 0.1U_0402_10V7K PCIE_PTX_IRX_P3 20 33 0.1U_0402_16V4Z
<19> PCIE_PTX_C_IRX_P3 HSOP LED3/EEDO
34 LAN_DI 2 2 2 2
C255 2 PCIE_PTX_IRX_N3 LED2/EEDI/AUX LAN_SK_LAN_LINK#
<19> PCIE_PTX_C_IRX_N3 1 0.1U_0402_10V7K 21 35 C6 C16 C250 C14 2 2 2
HSON LED1/EESK LAN_CS C9 C4 C15
32
EECS 0.1U_0402_16V4Z
<19> PCIE_ITX_C_PRX_P3 15
HSIP LAN_ACTIVITY# 1 1 1 1
38
LED0 1 1 1
<19> PCIE_ITX_C_PRX_N3 16
HSIN LAN_MDI0+
RTL8103EL-GR MDIP0 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
17 3 LAN_MDI0-
<14> CLK_PCIE_LAN REFCLK_P MDIN0
<14> CLK_PCIE_LAN# 18 5 LAN_MDI1+ 0.1U_0402_16V4Z
REFCLK_M MDIP1 LAN_MDI1-
MDIN1 6
<14> CLKREQ_LAN# 25 CLKREQB NC 8
NC 9 Close to Pin48
<6,17,19,21> PLTRST# 27 PERSTB NC 11
NC 12 Close to Pin45
R217 1 2 2.49K_0402_1% 46 4
RSET NC
26 48 VCTRL12 VCTRL12 0.1U_0402_16V4Z +LAN_VDD12
<27> LAN_WAKE# LANWAKEB VCTRL12A
ISOLATEB 28 ISOLATEB
+3V_LAN 2 1 VDDTX 19 +EVDD12 2
R9 10K_0402_5% LAN_X1 41 30 +LAN_VDD12 C256
LAN_X2 CKXTAL1 DVDD12
42 CKXTAL2 DVDD12 36 2 1
DVDD12 13
1 C251 C249
DVDD12 10
@ 10U_0805_10V4Z
+3VS 39 1 2
NC 0.1U_0402_16V4Z
3 3
23 NC NC 44
1
24 NC VCTRL12D 45 +LAN_VDD12
R11
1K_0402_5% 7 29 +3V_LAN
GND VDD33
14 GND VDD33 37 Close to Pin19
31
2
ISOLATEB GND +EVDD12

47 GND AVDD33 1
40
NC
22 43
GNDTX NC
R12
15K_0402_5% RTL8103EL-GR_LQFP48_7X7 2 2
C259 C258
1U_0603_10V4Z
1 1
Y2
LAN_X1 1 2 LAN_X2 1U_0603_10V4Z
1 25MHZ_20P 1
C253 C252
30P_0402_50V8J 30P_0402_50V8J
2 2
T1 JRJ1
LAN_ACTIVITY# R1 2 1 300_0402_5% 12
2 LAN_MDI1+ RJ45_MIDI1+ Amber LED- 2
1 16 1
LAN_MDI1- RD+ RX+ RJ45_MIDI1-
2 15 +3V_LAN 11
C3 LAN_CT0 RD- RX- RJ45_CT0 Amber LED+
1 2 0.01U_0402_25V7K 3
CT CT
14 R3 75_0402_5% C1
SHLD4
16
4 13 2 1 @68P_0402_50V8K For EMI. RJ45_MIDI0+ 8
NC NC 2 PR4-
5 12 2 1 15
C5 LAN_CT1 NC NC RJ45_CT1 RJ45_MIDI1+ SHLD3
1 2 0.01U_0402_25V7K 6
CT CT
11 R2 75_0402_5% C8 @ 7
PR4+
LAN_MDI0+ 7 10 RJ45_MIDI0+ 1 2 1 470P_0402_50V7K
LAN_MDI0- TD+ TX+ RJ45_MIDI0- C2
8 9 6
TD- TX- PR2-
1000P_1206_2KV7K 5
350uH_NS0013LF 2 PR3-
RJ45_MIDI0- 4
PR3+
3
PR2+
RJ45_MIDI1- 2
PR1-
14
SHLD2
1
PR1+
Layout Notice : Place as close SHLD1
13
J1 @ LAN_SK_LAN_LINK# R5 2 1 300_0402_5% 10
ch ip as possible. Green LED-
2 1 JOPEN
1 +3V_LAN 9
+3V_LAN Green LED+
+3VALW C7 SUYIN_100073FR012S102ZR
3 Q1 ME@
D
1 68P_0402_50V8K
+3VALW 2
@
4.7U_0805_10V4Z
AO3414_SOT23-3
G
2
1
@
@
C13
R10
33K_0402_5%
@
1 1
2
D 2
1
C17
EN_WOL 2 @
<27> EN_WOL
Q3 G 0.1U_0402_16V4Z
2N7002_SOT23 S 1
3
@
RTL8103EL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
A B C D E
5 4 3 2 1
D D
+V CC_3IN1
C3 75
+3VS 2 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C 376
C 374 0.1U_0402_16V4Z
2
1 2
+3VS
U18
0.1U_0402_16V4Z
1
1 AV_PLL
C3 77 3 NC1
7 NC
2
9 CARD_3V3 C 373
11 D3V3
33 D3V3 VREG 10 1 2
+3VS 22
+3VS MS_D4
NC 30 1U_0603_10V4Z
C
8 3V3_IN C
RS T# 44 RST#
1
0.1U_0402_16V4Z
1 1 2 1 MODE SEL 45
R2 85 C 372 R2 86 0_0402_5% MODE_SEL
47 XTLO XD_CLE_SP19 43
4.7U_0805_10V4Z
C 369 CLK_48M_CR 48 42
<14> CLK_48M_CR XTLI XD_CE#_SP18
100K_0402_5% 41
2 2 USB20_N3 XD_ALE_SP17 SD_DATA 2_XD_RE#
<19> USB20_N3 4 40
2
RS T# USB20_P3 DM SD_DAT2/XD_RE#_SP16 SD_DATA 3_XD_WE#

<19> USB20_P3 5 DP SD_DAT3/XD_WE#_SP15 39
14 GPIO0 XD_RDY_SP14 38
1 SD_DAT4/XD_WP#/MS_D7_SP13 37
C3 65 35 R 275
SD_DAT5/XD_D0/MS_D6_SP12 X D_DATA1
SD_CLK/XD_D1/MS_CLK_SP11 34 2 1XD_DATA1_RR 273 1 2 MS _CLK
1U_0603_10V4Z 31 SD_DA TA6_XD_DATA7_MS_DATA3 22_0402_5%
2 CLK_48M_CR SD_DAT6/XD_D7/MS_D3_SP10 MS_INS# 0_0603_5% R 274 1 S D_CLK
MS_INS#_SP9 29 2
28 SD_DA TA7_XD_DATA2_MS_DATA2 22_0402_5%
SD_DAT7/XD_D2/MS_D2_SP8 SD_DA TA0_XD_DATA6_MS_DATA0
EMI SD_DAT0/XD_D6/MS_D0_SP7 27
1
26 X D_DATA3_MS_DATA1
R2 87 SD_DAT1/XD_D3/MS_D1_SP6 XD_DATA5_MS_BS
XD_D5_SP5 25
@ 23 XD_DA TA4_SD_DATA1
100K_0402_5% XD_D4/SD_DAT1_SP4 S D_C D#
SD_CD#_SP3 21
20 S D _WP
2
SD_WP_SP2
XD_CD#_SP1 19
EEDI 18
0.1U_0402_16V4Z
1
2 RREF XTAL_CTR 13 +3VS
C 370 24
@ MS_D5
12 DGND
2
32 DGND EEDO 15
2
EECS 16
R2 89 6 17
6.19K_0402_1% AGND EESK S D _CMD
46 AGND SD_CMD 36
3 in 1 Card Reader
1
RTS5159-GR_LQFP48_7X7
B +V CC_3IN1 B
250mA
J P9
S D _WP 1
XD_DA TA4_SD_DATA1 SD-WP
2 SD-DAT1
SD_DA TA0_XD_DATA6_MS_DATA0 3 SD-DAT0
4 SD-GND
5 MS-GND
XD_DATA5_MS_BS 6
S D_CLK MS-BS
7 SD-CLK
X D_DATA3_MS_DATA1 8
SD_DA TA0_XD_DATA6_MS_DATA0 MS-DAT1
9 MS-DAT0
10 SD-VCC
SD_DA TA7_XD_DATA2_MS_DATA2 11 MS-DAT2
12 SD-GND
S D_CLK MS _CLK MS_INS#
EMI SD_DA TA6_XD_DATA7_MS_DATA3
13
14
MS-INS
MS-DAT3
S D _CMD 15 SD-CMD
1
MS _CLK 16
R 276 R 272 MS-SCLK
17 MS-VCC
@ @ SD_DATA 3_XD_WE# 18
100K_0402_5% 100K_0402_5% SD-DAT3
19 MS-GND
SD_DATA 2_XD_RE# 20 22
2
S D_C D# SD-DAT2 GND1
21 SD-CD GND2 23
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1
TAITW_R009-025-LR_NR
C 359 C 356 ME@
@ @
2 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1
C3 58 C3 57
A A
2 2

Size D ocument Number Rev
Cus tom 0.1
Dat e: Monday, April 06, 2009 Sheet 26 of 42
5 4 3 2 1
+3VALW
+EC_AVCC
L2
1 1 1 1 1 1
0.1U_0402_16V4Z
C162
0.1U_0402_16V4Z
C142
0.1U_0402_16V4Z
C171
0.1U_0402_16V4Z
C177
1000P_0402_50V7K
C181
1000P_0402_50V7K
C184
+3VALW 1 2 +EC_AVCC
FCM1608CF-121T03_2P 2
C154
2 2 2 2 2 2
L3
111
125
0.1U_0402_16V4Z
22
33
96
67
9
1 2 ECAGND 1 U6
FCM1608CF-121T03_2P
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
R134 1 2 10K_0402_5%
+3VS INVT_PWM
1 21 INVT_PWM <15>
<18> GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F BEEP#
<18> KB_RST# 2 23 BEEP# <22>
KBRST#/GPIO01 BEEP#/PWM2/GPIO10
<19> SERIRQ 3 26 EN_WOL <25>
SERIRQ# FANPWM1/GPIO12 ACOFF
<18> LPC_FRAME# 4 27 ACOFF <36>
LPC_AD3 LFRAME# ACOFF/FANPWM2/GPIO13
<18> LPC_AD3 5
LPC_AD2 LAD3
<18> LPC_AD2 7
LAD2 PWM Output
LPC_AD1 8 63 BATT_TEMP
<18> LPC_AD1 LPC_AD0 LAD1 BATT_TEMP/AD0/GPIO38 BATT_OVP BATT_TEMP <35>
C166
LAD0 LPC & MISC
<18> LPC_AD0 10 64 BATT_OVP <36>
BATT_OVP/AD1/GPIO39
2 1 2 1 65 ADP_I <36>
R118@ 10_0402_5% ADP_I/AD2/GPIO3A BRD_ID
<14> CLK_PCI_LPC 12
PCICLK AD Input AD3/GPIO3B
66
@ 22P_0402_50V8J 13 75
<17> PCI_RST# EC_RST# PCIRST#/GPIO05 AD4/GPIO42
+3VALW 1 2 37
ECRST# SELIO2#/AD5/GPIO43
76
R83 47K_0402_5% EC_SCI# 20
<19> EC_SCI# SCI#/GPIO0E
2 38
C141 CLKRUN#/GPIO1D
DAC_BRIG/DA0/GPIO3C 68
70 EN_FAN1
EN_DFAN1/DA1/GPIO3D IR EF EN_FAN1 <4>
0.1U_0402_16V4Z DA Output 71
1 KSI0 IREF/DA2/GPIO3E IREF <36>
55 KSI0/GPIO30 DA3/GPIO3F 72 CHGVADJ <36>
KSI1 56
KSI2 KSI1/GPIO31 +3VALW
57 KSI2/GPIO32
KSI3 58 83
+3VALW KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE# <22>
KSI4 59 84 USB_ON Ra
KSI4/GPIO34 PSDAT1/GPIO4B USB_ON <30>
2
KSI5 60 85
KSO1 KSI6 KSI5/GPIO35 PSCLK2/GPIO4C
2 1 61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86 R97
R82 47K_0402_5% KSO[0..15] KSI7 62 87 TP_CLK 100K_0402_5%
KSO2 <29> KSO[0..15] KSO0 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_DATA TP_CLK <29>
2 1 39 88 TP_DATA <29>
R81 47K_0402_5% KSI[0..7] KSO1 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F
40
1
<29> KSI[0..7] KSO2 KSO1/GPIO21
41 KSO2/GPIO22
KSO3 42 97 BRD_ID
KSO4 KSO3/GPIO23 SDICS#/GPXOA00
43 KSO4/GPIO24 SDICLK/GPXOA01 98 WL_OFF# <21>
2
KSO5
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
LID_SW# R94 @
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW# <28>
KSO7 46 SPI Device Interface 8.2K_0402_5%
+3VALW KSO8 KSO7/GPIO27
47 KSO8/GPIO28
KSO9 48 119 FRD#SPI_SO Rb
1
KSO10 KSO9/GPIO29 SPIDI/RD# FWR#SPI_SI
49 KSO10/GPIO2A SPIDO/WR# 120
1 2 USER_DEFINE# KSO11 50 SPI Flash ROM SPICLK/GPIO58 126 SPI_CLK
10K_0402_5% R108 KSO12 KSO11/GPIO2B FSEL#SPICS#
51 KSO12/GPIO2C SPICS# 128
KSO13 52
KSO14
KSO15
53
54
KSO13/GPIO2D
KSO14/GPIO2E
73
BOARD ID Table
KSO15/GPIO2F CIR_RX/GPIO40 NOVO# <28>
81
82
KSO16/GPIO48
KSO17/GPIO49
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
74
89 FSTCHG <36>
ID BRD ID Ra Rb Vab
90 CHARGE_LED0#
BATT_CHGI_LED#/GPIO52 CAPS_LED# CHARGE_LED0# <24>
EC_SMB_CK1 CAPS_LED#/GPIO53
91
CHARGE_LED1# CAPS_LED# <28> 0 R01 (EVT) NC 0 0V
<35> EC_SMB_CK1 77
SCL1/GPIO44 GPIO BATT_LOW_LED#/GPIO54 92 CHARGE_LED1# <24>
EC_SMB_DA1 1 R02 (DVT)
<35> EC_SMB_DA1
EC_SMB_CK2
78
79
SDA1/GPIO45
S M Bus
SUSP_LED#/GPIO55
93
95 SYSON
100K 8.2K 0.25V
<4> EC_SMB_CK2 EC_SMB_DA2 SCL2/GPIO46 SYSON/GPIO56 SYSON <31,38>
R111 <4> EC_SMB_DA2 80
SDA2/GPIO47 VR_ON/XCLK32K/GPIO57
121 VR_ON <40> 2 R03 (PVT) 100K 18K 0.50V
127 ACIN <19,34>
AC_IN/GPIO59
+3VS 2 1 3 R10A (MP) 100K NC 3.3V
PM_SLP_S3# 6 100
100K_0402_5% <19> PM_SLP_S3# PM_SLP_S5# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_LID_OUT# EC_RSMRST# <19>
<19> PM_SLP_S5# 14 101 EC_LID_OUT# <19>
EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_ON
<19> EC_SMI# 15 102 EC_ON <28>
KILL_SW# EC_SMI#/GPIO08 EC_ON/GPXO05
<30> KILL_SW# 16 103 CMOS_OFF# <24>
USER_DEFINE# LID_SW#/GPIO0A EC_SWI#/GPXO06 ICH_POK
<28> USER_DEFINE# 17 104 ICH_POK <6,19>
DETECTION SUSP#/GPIO0B ICH_PWROK/GPXO06
<21> DETECTION 18
PBTN_OUT#/GPIO0C G PO BKOFF#/GPXO08
105 BKOFF# <15>
19
EC_PME#/GPIO0D GPIO WL_OFF#/GPXO09
106 BT_OFF# <21>
25 107 WXMIT_OFF# <21>
FAN_SPEED1 EC_THERM#/GPIO11 GPXO10
<4> FAN_SPEED1 28 108
FAN_SPEED1/FANFB1/GPIO14 GPXO11
29
EC_TX_P80_DATA FANFB2/GPIO15
<21> EC_TX_P80_DATA 30
EC_RX_P80_CLK EC_TX/GPIO16
<21> EC_RX_P80_CLK 31 110 PM_SLP_S4# <19>
EC_RX/GPIO17 PM_SLP_S4#/GPXID1
<28> ON/OFF# 32 112 GMCH_ENBKL <8> D7
ON_OFF/GPIO18 ENBKL/GPXID2 @
<24> PWR_LED# 34 114 EAPD <22>
PWR_LED#/GPIO19 GPXID3 EC_THERM# ICH_POK
<28> NUM_LED# 36
NUMLED#/GPIO1A GPI GPXID4
115 EC_THERM# <19> 2 1 VGATE <14,19,40>
116 SUSP#
GPXID5 PBTN_OUT# SUSP# <31,36,38,39>
117 PBTN_OUT# <19>
GPXID6 RB751V_SOD323
118
GPXID7 LAN_WAKE# <25>
XCLKI 122
XCLK1 20mil
XCLKO 123 124
XCLK0 V18R
1
AGND
GND
GND
GND
GND
GND
C194
4.7U_0805_10V4Z
KB926QFC0_LQFP128 2 +3VALW
8M SPI ROM
11
24
35
94
113
69
1 20mils
ECAGND
C152 U3
8 4
0.1U_0402_16V4Z~D VCC VSS
2 3
W
7
C182 C183 HOLD
FSEL#SPICS# 2 1 SPI_CS# 1
S
1
4
22P_0402_50V8J
22P_0402_50V8J
R99 0_0402_5%
X1 R165 change to Bead for EMI SPI_CLK 2 1 SPI_CLK_R 6
OUT
IN
R165 FBMA-11-100505-900T 0402 C

+5VS FWR#SPI_SI 2 1 SPI_SI 5 2 SPI_SO 2 1 FRD#SPI_SO
+5VALW R88 0_0402_5% D Q R96 0_0402_5%
TP_CLK
NC
NC
1 2 SST25LF080A_SO8-200mil
1 2 EC_SMB_CK1 R120 4.7K_0402_5% C385
R107 4.7K_0402_5% TP_DATA 1 2 10P_0402_50V8J~D
2
EC_SMB_DA1 R123 4.7K_0402_5% JP11

1 2
R109 4.7K_0402_5% 32.768K_1TJS125BJ4A421P 1 2 SPI_CS# 1 2 +3VALW
SPI_SO 1 2
C147 3 4
3 4 SPI_CLK_R
+3VALW 5 5 6 6
+3VS R93 SPI_CLK_R SPI_SI
2 1 2 1 7 8
33_0402_5% 7 8
EC_SMB_CK2 BATT_OVP C143 1 2 E&T_2941-G08N-00E~D
R112 2.2K_0402_5% 100P_0402_50V8J 22P_0402_50V8J ME@
EC_SMB_DA2 BATT_TEMP C144 1 2
R116 2.2K_0402_5% 100P_0402_50V8J
AC IN C185 1 2
100P_0402_50V8J Security Classification Compal Secret Data Compal Electronics, Inc.
KB926/BIOS
Custom 0.2
LA-4421P
+3VALW
2
R220
100K_0402_5%
1
D14
NOVO# 2
<27> NOVO#
1 ONE_KEY_RECOVER#
51_ON# 3
<34> 51_ON#
BAV70W-7-F_SOT323-3 SW2
1 3
2 4
+3VALW
SMT1-05_4P
6
5
ON/OFFBTN#
2
ONE_KEY_RECOVER#
R8
100K_0402_5%
2
2 ON /OFF#
ON/OFFBTN# ON/OFF# <27>
1
3 51_ON# D15 FOR ESD
51_ON# <34>
PSOT24C_SOT23-3
SW1
D1
1 3 BAV70W-7-F_SOT323-3
1
2 4
SMT1-05_4P
6
5
1
D
EC_ON 2 Q2
<27> EC_ON
G
2
S 2N7002_SOT23
3
R15
10K_0402_5%
1
JP3
+5VS 1
1
<18> SATA_LED# 2
2
<27> CAPS_LED# 3
3
<27> NUM_LED# 4
USER_SW 4
5
INT_MIC_L 5
<22> INT_MIC_L 6
GNDA 6
7
7
8
8
9
GND
10
LID Switch GND
ACES_85201-08051
ME@
+3VALW
2
2
R103
47K_0402_5%
VDD
1
1 3 LID_SW# <27>
C155 OUTPUT
10P_0402_50V8J
0.1U_0402_16V4Z~D 1
GND
2 D24
C150
U5 2
1
2 <27> USER_DEFINE#
1 USER_SW
51_ON# 3
<34> 51_ON#
APX9132ATI-TRL SOT-23 3P
BAV70W-7-F_SOT323-3

LID SW
B 0.2
LA-4421P
5 4 3 2 1
D D
KSI[0..7] JP8
KS O[0..15]
KSI[0..7] <27>
INT_KBD Conn. To TP/B Conn. TP_CLK

1
2
1
KSO[0..15] <27> <27> TP_CLK 2
TP_DATA 3
<27> TP_DATA 3
SW /R 4
JP4 4
+5VS 5 5
K SI0 1 SW /L 6
K SI1 1 6
2 2 7 GND
K SI0 C136 1 2 @ 100P_0402_50V8J KSO4 C104 1 2 @ 100P_0402_50V8J K SI2 3 8
KSO0 3 GND
4 4
K SI1 C135 1 2 @ 100P_0402_50V8J KSO5 C103 1 2 @ 100P_0402_50V8J KSO1 5 ACES_85201-06051
KSO2 5 ME@
6 6
K SI2 C134 1 2 @ 100P_0402_50V8J KSO6 C102 1 2 @ 100P_0402_50V8J K SI3 7 2 1 TP_CLK
KSO3 7 R101 @ 10K_0402_5%
8 8
K SI3 C133 1 2 @ 100P_0402_50V8J KSO7 C101 1 2 @ 100P_0402_50V8J KSO4 9 2 1 TP_DATA
KSO5 9 R100 @ 10K_0402_5%
10 10
K SI4 C132 1 2 @ 100P_0402_50V8J KSO8 C100 1 2 @ 100P_0402_50V8J KSO6 11
KSO7 11 +5VS
12 12
K SI5 C131 1 2 @ 100P_0402_50V8J KSO9 C99 1 2 @ 100P_0402_50V8J KSO8 13 C157 C156 TP_DATA
K SI4 13 @
14 14
0.1U_0402_16V4Z
K SI6 C127 1 2 @ 100P_0402_50V8J KSO10 C98 1 2 @ 100P_0402_50V8J KSO9 15 @ 0.1U_0402_16V4Z TP_CLK C180
K SI5 15
16 16
3
K SI7 C126 1 2 @ 100P_0402_50V8J KSO11 C97 1 2 @ 100P_0402_50V8J K SI6 17 0.1U_0402_16V4Z
KSO10 17
18 18
KSO0 C125 1 2 @ 100P_0402_50V8J KSO12 C96 1 2 @ 100P_0402_50V8J KSO11 19 D3
K SI7 19 @
20 20
C KSO1 C124 1 2 @ 100P_0402_50V8J KSO13 C95 1 2 @ 100P_0402_50V8J KSO12 21 PSOT24C_SOT23 C
KSO13 21
22
1
KSO2 C114 1 22
2 @ 100P_0402_50V8J KSO14 C93 1 2 @ 100P_0402_50V8J KSO14 23 23
KSO15 24
KSO3 C113 1 24
2 @ 100P_0402_50V8J KSO15 C92 1 2 @ 100P_0402_50V8J
GND2 26
GND1 25
E-T_6905-E24N-01R
ME@
6
5
SMT1-05_4P
2 4
SW /L
1 3
SW3
6
5
SMT1-05_4P
2 4
SW /R
1 3
B B
SW4
A A

KB/SW/TP/LPC Debug CONN
B 0.2
LA-4421P
5 4 3 2 1
A B C D E
1 1
+5VALW
+USB_VCCA
U7
C210 1 8
0.1U_0402_16V4Z GND OUT
2 IN OUT 7 USB_OC#1 <19>
2 1 3 IN OUT 6
4 EN OC# 5 USB_OC#0 <19>
RT9715AGS SOP 8P
High active JP6
1 +USB_VCCA 1 1
<27> USB_ON USB_ON C211 +USB_VCCA 2
@ 1000P_0402_50V7K USB20_N0 2
<19> USB20_N0 3 3
1
USB20_P0 4
2 <19> USB20_P0 4
R185 5
USB20_N1 5
200K_0402_5% <19> USB20_N1 6 6
@ USB20_P1 7
<19> USB20_P1 7
8
2
2 KILL_SW# 8 2
<27> KILL_SW# 9 9
10 10
11 GND
12 GND
ACES_85201-1005N
ME@
+5VALW +USB_VCCC
U13
1 8
3 GND OUT 3
2 7
IN OUT
3 6
1 4
IN
EN
OUT
OC#
5 USB_OC#7 <19> USB CONN. 3
C317 RT9715AGS SOP 8P +USB_VCCC
0.1U_0402_16V4Z High active
2
+USB_VCCC
W=40mils
1
C320
@ 1000P_0402_50V7K 1 1
<27> USB_ON
C316
2 C315 +
470P_0402_50V7K
150U_B_6.3VM_R40M 2
2
JP15
1
USB20_N7 1
<19> USB20_N7 2
USB20_P7 2
<19> USB20_P7 3
3
4
4
5
GND
3
2
6
@ GND
7
D21 GND
8
PSOT24C_SOT23-3 GND
SUYIN_020173MR004S558ZL
1
ME@
4 4

USB PORTS
B 0.2
LA-4421P
A B C D E
A B C D E
1 1
+5VALW TO +5VS +3VALW TO +3VS

+5VALW +5VS +3VALW +3VS
SI4800BDY-T1-E3_SO8 Q19 SI4800BDY-T1-E3_SO8 Q15

8 1 8 1
7 2 7 2 +5VALW
2
6 3 1 1 6 3 1 1
1 1 5 C223 C219 R190 1 1 5 C170 C176 R114
2
C221 C218 C191 C201
10U_0805_10V4Z 470_0603_5% 10U_0805_10V4Z 470_0603_5% R141
4
4
10U_0805_10V4Z 2 2
1U_0603_10V4Z 10U_0805_10V4Z 2 2
1U_0603_10V4Z 100K_0402_5%
1 1
2 2
10U_0805_10V4Z 2 2
10U_0805_10V4Z
2 D 2
1
1
D
2 SUSP
2 SUSP G
1 2 5VS_GATE G S Q12
B+
3
R187 S Q18 1 2 2N7002_SOT23 SYSON#
3 B+
20K_0402_5% 1 2N7002_SOT23 R139
1
D C208 100K_0402_5% 1
1
SUSP D C179
2
Q17G 0.01U_0402_25V7K SUSP 2
1
2N7002_SOT23 S 2 Q13 G 0.1U_0402_25V7K
3
2N7002_SOT23 S 2 Q14
3
SYSON 2
<27,38> SYSON
DTC124EK_SC59
3
RTCVREF
+5VALW
2
R172 R173
3 100K_0402_5% 100K_0402_5% 3
+1.5VS +2.5VS +VCCP +0.9VS +1.8V @
1
SUSP
<39> SUSP
2
2
R51 R16 R57 R70 R63
1
470_0603_5% 470_0603_5% 470_0603_5% 470_0603_5% 470_0603_5%
Q16
1
D D D D D 1 <27,36,38,39> SUSP# 2
1
2 SUSP 2 SUSP 2 SUSP 2 SUSP 2 SYSON#

G G G G G DTC124EK_SC59
S Q6 S Q4 S Q7 S Q9 S Q8
3
3
2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23
4 4

DC INTERFACE
B 0.2
LA-4421P
A B C D E
H8
H
H_3P6X5P6N
@
H12 H11 H6 H2 H5
H H H H H
H_3P2
@ @ @ @ @
1
1
H16 H4 H9 H1 H7 H14 H3 H13 H15 H10
H H H H H H H H H H
@ @ @ @ @ @ @ @ @ @ H_2P8
1
1
FM2 FM4 FM3 FM1
@ @ @ @ FIDUCIAL_C40M80
1

Screw
B 0.2
LA-4421P
A B C D
VIN
ACIN BATT ONLY
PF2 PL7
7A_24VDC_429007.WRML SMB3025500YA_2P Precharge detector Precharge detector
APDIN1
1 1
2
1 2 1 2 Min. typ. Max. Min. typ. Max.
2
3 3
4
High 14.936V 15.381V 15.814V High 7.196V 7.349V 7.505V
J DC IN 4
Low 13.843V 14.247V 14.636V Low 6.138V 6.214V 6.359V
1
@ ACES_85204-0400N PC60
PC59 PC52 100P_0402_50V8J PC63
1000P_0402_50V7K 100P_0402_50V8J 1000P_0402_50V7K
2
1 1
PR29
@ 1K_1206_5%
1 2
PR30
Vin Detector @ 1K_1206_5%
VIN 2
PD4
1 1 2
B+
High 17.944 17.706 17.470 @ RLS4148_LL34-2 PR31
@ 1K_1206_5%
Low 16.242 16.027 15.808 1 2
PR138
VL @ 2.2M_0402_5%
2 1
PR137
1M_0402_1%
@ 499K_0402_1%
1 2
1
V IN
@0.01U_0402_25V7K
VS
VS
PR142
V IN
@100K_0402_1%
2 2
1
0.01U_0402_25V7K
1
10K_0805_5%
PR135
PC98
2
1
84.5K_0402_1%
1
PC91
PR123
2
PR133
PR118 PD15
8
10K_0402_1% @ RB715F_SOT323-3
2
1 2 <35,37> MAINPWON 2 3
P
2
PR132 AC IN <19,27> +
1 1
2
O
8
@ 205K_0402_1%
@ 499K_0402_1%
@0.01U_0402_25V7K
90.9K_0402_1% <36> ACON 3 2
-
1
1 2 3 PU10A
P
1
PR119
PR121
PC92
1000P_0603_50V7K
@1000P_0402_50V7K
1 PACIN @ LM393DG_SO8
4
O PACIN <36>
1
22K_0402_1%
2 -
G
1
10K_0402_1%
PC95
RLZ4.3B_LL34
0.1U_0402_16V7K
@ 0.1U_0402_10V7K
PU12A
2
1
1
PR136
LM393DG_SO8
4
PRG++ 2
2
1
PC104
PC96
PR117
PC105
PD13
2
2
2
2
PR128
2
10K_0402_1%
2 1 PR127 PQ22 PR120
RTCVREF 3.3V
1
@ 10K_0402_1% D @ 2N7002KW_SOT323-3 @ 47K_0402_1%
2 1 2 2 1
RTCVREF G PACIN <36>
1
VIN S
3
@ 66.5K_0402_1%
1
2
PR124
2 +5VALWP
PD5
RLS4148_LL34-2
2
3 3
PQ19
1
3
@ DTC115EUA_SC70-3
BATT+ 2 1
1
8
PD12
RLS4148_LL34-2 PR32 PR33 5
P
PQ15 68_1206_5% 68_1206_5% +
7 O
TP0610K-T1-E3_SOT23-3 6
-
G
PR35 PU10B
2
200_0603_5% @ LM393DG_SO8
4
CHGRTCP 1 2 N1 3 1
VS
0.22U_0603_25V7K
1
1
PC28
PR116 PC30
100K_0402_1% 0.1U_0603_25V7K
1
PR37
2
22K_0402_1%
1 2
<28> 51_ON#
RTC Battery
- JRTC +
RTCVREF 2 1 +RTCBATT
1
PR34
PU4 200_0603_5% PD6
PR36 PR38 G920AT24U_SOT89-3 @ MAXEL_ML1220T10 1 2
560_0603_5% 560_0603_5% 3.3V +CHGRTC
2
1 2 1 2 3 2 N2 RB751V-40TE17_SOD323-2
4
+CHGRTC OUT IN 4
SP093MX0000
1
GND PC27
PC29 1U_0805_25V4Z
10U_0805_6.3V6M 1
2

DCIN & DETECTOR
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
A B C D
A B C D
1 1
PH3 under CPU botten side :

CPU thermal protection at 90 degree C
Recovery at 45 degree C
VL
VL
2
PR129
47K_0402_1%
1
PH1 PR139
MAINPW ON <34,37>
1
100K_0603_1%_TH11-4H104FT 47K_0402_1%
1 2
2
VMB2 VMB PR140
8
2
PF1 PL4 13.7K_0402_1% 2
1
JBATT 7A_24VDC_429007.WRML SMB3025500YA_2P D
1 2 5
P
+ PQ23
1 1 1 2 1 2 BATT+ O 7 2
2 TM_REF1 6 G 2N7002KW_SOT323-3
2 -
G
3 EC_SMCA PU12B S
3
3 EC_SMDA LM393DG_SO8
4
4
4 TS
5 5
1
6 6
16.9K_0402_1%
1000P_0402_50V7K
7 PC45 PC51
7
1
1
0.22U_0402_6.3V6K
8 1000P_0402_50V7K 0.01U_0402_25V7K
2
GND
1
PR141
9 PR2 PR1 2 1
GND VL
PC12
PC99
100_0402_1% 100_0402_1%
@ SUYIN_200082MR007G100ZR PR131
1
100K_0402_1%
2
2
PR134
100K_0402_1%
EC_SMB_CK1 <27>
2
EC_SMB_DA1 <27>
1 2 +3VALWP
PR3
6.49K_0402_1%
1
PR4
2 BATT_TEMP <27> A/D
3
10K_0402_1% 3
4 4

BATTERY CONN / OTP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
A B C D
5 4 3 2 1
P3
B+
P2
PD9 PQ16
B340A_SMA2 FDS4435BZ_SO8 CHG_B+
PR58 0.05_1206_1% PJ7
VIN 2 1 1
2
S D 8
S D 7 1 4 2 2 1 1
470P_0603_50V8J
3 S D 6
4 @ JUMP_43X118 PQ17
G D 5 2 3
1
47K_0402_5%
FDS4435BZ_SO8
1
PC106
2200P_0402_50V7K
D D
PR143
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
1 8
2
S D
2 S D 7
2
200K_0402_1%
0.1U_0603_25V7K
DTA144EUA_SC70-3
PC5
3 S D 6
PC4
PC3
PC2
CS IN 4 5
2
G D
PC49
PR61
PQ27 CSIP
1
PR16
47K_0402_1%
2
2 1 2
2
VIN
1
2
PD10 PR13 3 ACOFF
1
RB751V-40TE17_SOD323-2 10K_0402_1% 1
1 2 6251VDD 2
2.2U_0603_6.3V6K
2 PR15
1 1
PC55
PQ26 PR67 PD3 200K_0402_1%
1
10K_0402_1% RB715F_SOT323-3 1 2 V IN
DTC115EUA_SC70-3 2 1 PU6 PC54
<27> FSTCHG 0.1U_0603_25V7K
3
2
1 2 1 24 6251DCIN 2 1 PQ7
VDD DCIN
100K_0402_1%
PC58 DTC115EUA_SC70-3 2
PQ28 0.1U_0402_16V7K
1
D 2N7002KW_SOT323-3
150K_0402_1%
PR68
2 ACSET ACPRN 23
PR64
SIS412DN-T1-GE3 _PAK1212-8
2 PR65
0.1U_0603_25V7K
G 20_0402_5%
3
5
1
6251_EN CSON D
S 3 22 1 2
3
EN CSON
1
PC11
PC57 2 PACIN
2
0.047U_0402_16V7K G
PQ3
4 21 1 2 CSOP S
3
CELLS CSOP PR69 PQ9
C PC61 6800P_0402_25V7K 20_0402_5% 2N7002KW_SOT323-3 C
4
PR9 PQ2 1 2 5 20 2 1
ICOMP CSIN
1
2
3K_0402_1% D 2N7002KW_SOT323-3 PR70
PACIN 1 2 2 PC65 PR72 6.81K_0402_1% PC62 20_0402_5%
<34> PACIN
G 1 2 1 2 6 19 0.1U_0402_16V7K
1 2 PL5
3
2
1
VCOMP CSIP PR71 10UH_PCMB063T-100MS_4A_20%
S
3
0.01U_0402_25V7K 1 2 2.2_0402_5% PR63 0.05_1206_1% BATT+

PC64 1 2 7 18 LX_CHG 1 2 C1HG 4
@ 100P_0402_50V8J PR73 ICM PHASE
<34> ACON
SI7716ADN-T1-GE3 _PAK1212-8
<27> ADP_I 100_0402_1% 2 3
@ 4.7_1206_5%
6251_VREF 8 17 DH_CHG
VREF UGATE
1
PR10
PQ1 PR75 1 2 PR74 PC67
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
DTC115EUA_SC70-3 56K_0402_1% PC68 2.2_0402_5% 0.1U_0603_25V7K
PQ4
2 1 0.1U_0402_16V7K 9 16 BST_CHG 1 2 BST_CHGA 2 1
<27> IREF CHLIM BOOT
1
PR81 4
1
PC46
PC47
PC48
0.01U_0402_25V7K
ACOFF 2 13.7K_0402_1% PD11

<27> ACOFF
6251_VREF 1 2 10 15 6251VDDP RB751V-40TE17_SOD323-2
ACLIM VDDP
1
2
1
PC69
@ 680P_0603_50V7K
PR76 1 26251VDD
3
2
1
1
PC8
100K_0402_1% 11 14 DL_CHG
3
2
VADJ LGATE
1
PR80 PR77
2
31.6K_0402_1% 4.7_0402_5%
2
12 13 PC70
2
GND PGND 4.7U_0805_6.3V6K
2
ISL6251AHAZ-T_QSOP24
PR78
Connect to EC A/D Pin. 15.4K_0402_1%
1 2
<27> CHGVADJ
B B
1
Iada=0~2A(40W) CP = 85%*Iada ; CP = 1.7A PR79

31.6K_0402_1% VMB2
CP mode
2
1
Vaclim=2.39*(31.6K/(231.6K+13.7K))=1.6672V
Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05) CHGVADJ=(Vcell-4)/0.10627
VS PR114
where Vaclm=0.8199V, Iinput=1.7A Vcell CHGVADJ @ 340K_0402_1%
2
@0.01U_0402_25V7K
4V 0V
CC=0.3~1.8A LI-3S :13.5V----BATT-OVP=1.5012V
4.2V 1.882V
PC87
IREF=1.56*Icharge BATT-OVP=0.1112*VMB
1
4.35V 3.2935V
IREF=0.468V~2.81V Per cell=3.5V PR113
2
@ 499K_0402_1% VS
IREF=3.3V =>2.12A PQ10 TP0610K-T1-E3_SOT23-3
2
8
PR115 PU9A
3 1 6251DCIN @ 10K_0402_1% @ LM358DT_SO8 3
P
P3 +
8
1 2 1 0 PU9B
<27> BATT_OVP
1
100K_0402_1%
2 @ LM358DT_SO8 5
P
- +
@0.01U_0402_25V7K
7 0
1
PR14
4
-
G
1
PR112
@ 105K_0402_1%
2
4
PR12
2
2
PC85
2 1
2
A 100K_0402_1% A
1
PQ8
DTC115EUA_SC70-3 2 FSTCHG
2 1
FSTCHG <27>
3 SUSP# Security Classification Compal Secret Data Compal Electronics, Inc.
SUSP# <27,31,38,39> 2007/6/22 2008/6/22 Title
Issued Date Deciphered Date
PD2 CHARGER
3
RB715F_SOT323-3 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
5 4 3 2 1
5 4 3 2 1
3V_B+
3V_B+
B+
PR51
PJ12 0_0402_5%
2 2 1 1 1 2
2200P_0402_50V7K
2200P_0402_50V7K
D @ JUMP_43X79 D
10U_1206_25V6M
10U_1206_25V6M
SIS412DN-T1-GE3_PAK1212-8
VL
1
5
PC101
P C93
P C89
P C88
2
2
1U_0603_10V6K
2
PQ24
PC39
4.7U_0805_6.3V6K
0.1U_0603_25V7K 4
1
P C34
PQ20
P C41
4
1
+5VALWP
3
2
1
PL3
PL2 4.7UH_PCMC063T-4R7MN_5.5A_20%
1
2
3
7
4.7UH_PCMC063T-4R7MN_5.5A_20% PC36 2 1
1 2 1U_0603_10V6K
LDO
VIN
VCC
+3VALWP 33 19 1 2
TP PVCC
1
SI7716DN-T1-E3_PAK1212-8
1
5
SI7716DN-T1-E3_PAK1212-8
D H3 26 15 D H5
PR111 UGATE2 UGATE1 PR126
150U_B2_6.3VM_R45M
0_0402_5%
4.7_1206_5% 2 1 BST3A 24 17 BST5A2 1 4.7_1206_5%

BOOT2 BOOT1
2
1 PR48 PR52
2
2
2
P R45
PQ25
@ 61.9K_0402_1%
0_0603_5% 0_0603_5% 4
2
P C26
PQ21
4 PC33
150U_B2_6.3VM_R45M
0.1U_0603_25V7K
1
1
P R53
PC86 LX3 25 16 LX5 1
1
2 680P_0603_50V8J PHASE2 PHASE1 PC40
3
2
1
P C38
0.1U_0603_25V7K PC97 +
2
1
2
3
2
C DL3 23 18 DL5 680P_0603_50V8J C
1
LGATE2 LGATE1
2
@ 10K_0402_1%
2
PGND 22
2
P R46
FB3 30 OUT2
P R54
0_0402_5%
OUT1 10
VL 32
1
REFIN2
1
11 FB5
2VREF_ISL6237 FB1
1 2 2VREF_ISL6237 1 REF
PC32
+3VALWP 0.22U_0603_25V7K
Imax=5A BYP 9
8 LDOREFIN
Ipeak=6.5A PD7 PR43 @ 0_0402_5%
RB751V-40TE17_SOD323-2 29 2 1
Iocp(minimum)=7.6A SKIP VL
1 2
PR39 @ 0_0402_5%
1 2 2VREF_ISL6237
+5VALWP
PD14 PR49
20 NC POK2 28
PR40 0_0402_5%
Imax=5A
VS RLZ5.1B_LL34 100K_0402_1% 1 2 Ipeak=6.5A
1 2 1 2 4 13
EN_LDO POK1 Iocp(minimum)=7.6A
2
200K_0402_1%
2
P R50
PC35 14 12 ILM1 2 1
B 0.22U_0603_25V7K EN1 ILIM1 PR55 B
301K_0402_1%
1
27 31 IL IM2 2 1
GND
TON
1
EN2 ILIM2
NC
PD8 2 PR44
RB751V-40TE17_SOD323-2 PU5 301K_0402_1%
21
1 2 VL SN0806081RHBR_QFN32_5X5
806K_0603_1%
2
PR41
P R56
0_0402_5%
2VREF_ISL6237 1
PR42 1U_0603_10V6K
1
P C37
@ 47K_0402_5%
PR57
1
1
2 1 1 2
2
<34,35> MAINPW ON PJ5

0.047U_0402_16V7K
0_0402_5% PR47 2 1
+3VALWP 2 1 +3VALW
@ 0.047U_0402_16V7K
0_0402_5%
1
@ JUMP_43X118
2
P C42
P C31
2
2VREF_ISL6237
PJ6
2 1
+5VALWP 2 1 +5VALW
@ JUMP_43X118
A A

2007/06/22 2008/06/22 Title
Issued Date Deciphered Date 3V/5V
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C ustom 0.1
5 4 3 2 1
5 4 3 2 1
PJ2
1.8V_IN 1.8V_IN 2 1 B+
PR26 2 1
240K_0402_5% @ JUMP_43X79
10U_1206_25V6M
470P_0603_50V8J
<BOM Structure>
<BOM Structure>
1000P_0603_50V7K
1.8V_TON 1 2
5
1
PC108
PC43
PC16
2
2
PQ12
D D
PR25 PR24 4
0_0402_5% 2.2_0603_5%
1 2 1.8V_EN BST_1.8V 1 2BST_1.8V-1 1 2
<27,31> SYSON
PC20
3
2
1
1 0.1U_0603_25V7K PL9
15
14
1
PC24 2.2UH_PCMC063T-2R2MN_8A_20%
@0.1U_0402_16V7K 1 2
EN_PSV
TP
VBST
+1.8VP
2
4.7_1206_5%
2 13 UG_1.8V
TON DRVH
PR19
PR110 3 12 SW _1.8V
VOUT LL
220U_B2_2.5VM_R25M
10U_0805_6.3V6M
SI7716DN-T1-E3_PAK1212-8
422_0603_1% 1
+5VALW 1 2 1.8V_V5FILT 4 11 1.8V_TRIP
1 2 +5VALW
1.8V_SNB 2
V5FILT TRIP
1
PC76
PC74
PR22 +
1.8V_FB 5 10 15.4K_0402_1%
VFB V5DRV
2
1
PQ13
6 9 LG_1.8V 4
PGOOD DRVL
PGND
680P_0603_50V7K
PC84
GND
1U_0603_10V6K PC25
2
1
@ 47P_0402_50V8J PC83
PC18
1 2 4.7U_0805_6.3V6K
3
2
1
PU3
2
TPS51117RGYR_QFN14_3.5x3.5
PR27
30.1K_0402_1%
1 2
1
C PR28 C
21K_0402_1%
2
PJ1
VCCP_IN 2 1 B+
PR5 2 1
240K_0402_5% @ JUMP_43X79
10U_1206_25V6M
VCCP_TON 1 2
1
5
PC9
2
PQ5
PR6 PR7
2.2K_0402_5% 0_0603_5% 4
1 2 VCCP_EN BST_VCCP 1 2BST_VCCP-1 1 2
<27,31,36,39> SUSP#
PC6
1
0.1U_0603_25V7K PL6
15
14
3
2
1
1
PC1 2.2UH_PCMC063T-2R2MN_8A_20%
1U_0402_6.3V6K 1 2
EN_PSV
TP
VBST
+VCCPP
2
4.7_1206_5%
2 13 UG_VCCP
TON DRVH
PR11
B PR62 3 12 SW _VCCP B
VOUT LL
220U_B2_2.5VM_R25M
10U_0805_6.3V6M
SI7716DN-T1-E3_PAK1212-8
422_0603_1% 1
+5VS 1 2 VCCP_V5FILT 4 11 VCCP_TRIP 1 2 +5VS
VCCP_SNB2
V5FILT TRIP
1
PC50
PC53
PR8 +
VCCP_FB 5 10 15.4K_0402_1%
VFB V5DRV
2
1
PQ6
6 9 LG_VCCP 4
PGOOD DRVL
PGND
680P_0603_50V7K
PC44
GND
1U_0603_10V6K
2
PC10
PC7
7
3
2
1
PU1 4.7U_0805_6.3V6K
2
2
TPS51117RGYR_QFN14_3.5x3.5
PR59 PJ10
8.87K_0402_1% +1.8VP 2 1 +1.8V
2 1
1 2
@ JUMP_43X118
1
PR60 PJ8
21K_0402_1% 2 1
+VCCPP 2 1 +VCCP
2
@ JUMP_43X118
A A

1.8VP/VCCPP
5 4 3 2 1
5 4 3 2 1
+1.8V +5VALW
D D
1
PJ14 PJ11
1
@ JUMP_43X79 @ JUMP_43X79
2
2
2
1
1U_0603_10V6K
PC100
PC103
10U_0805_6.3V6M
2
PD16
RB751V-40TE17_SOD323-2 PU11
1 2 APL5913-KAC-TRL_SO8
6 PU7
VCNTL APL5508-25DC-TRL_SOT89-3
5 VIN VOUT 3 +1.5VSP
PR122 9 4 +3VS
VIN VOUT
0.01U_0402_25V7K
30K_0402_1% 2 3 +2.5VSP
IN OUT
22U_0805_6.3V6M
PC94
<27,31,36,38> SUSP# 1 2 8 EN
7 2 PR130
GND
POK FB
1
GND
1U_0603_10V6K
4.7U_0805_6.3V6K
2.7K_0402_1%
2
1
1
PC102
PR66
2
1
PC56
PC66
PC90 @ 150_1206_5%
2
0.68U_0603_10V6K
2
2
1
2
PR125
3K_0402_1%
C C
2
+1.8V
1
PJ4
1
@ JUMP_43X79
2
PU2
APL5331KAC-TRL_SO8
2
1 VIN VCNTL 6 +3VALW

2 GND NC 5
1
1
1
PC23 3 7 PC22
4.7U_0805_6.3V6K PR20 VREF NC 1U_0603_10V6K
2
2
1K_0402_1% 4 8
VOUT NC
9
2
B TP B
0.1U_0402_16V7K
1
PR23 +0.9VSP
1
0_0402_5% D PR21
1 2 2 1K_0402_1%
<31> SUSP
1
PC19
G
2
1
2N7002KW_SOT323-3
S PC17
3
2
PQ14
PC21 10U_0805_6.3V6M
2
@ 0.1U_0402_16V7K
PJ13
2
+1.5VSP 2 2 1 1 +1.5VS
@ JUMP_43X79
PJ3
+0.9VSP 2 2 1 1 +0.9VS
@ JUMP_43X79
PJ9
+2.5VSP 2 2 1 1 +2.5VS
@ JUMP_43X39
A A

1.5V/0.9V/2.5V
5 4 3 2 1
A B C D E F G H
PR105
124K_0402_1%
2 1
+5VS
1 1
1
PC75
1U_0603_10V6K
1
VR EF_CPU
2
1
0_0402_5%
P R95
PR100
P R97 @ 0_0402_5%
P C77 0_0402_5%
27P_0402_50V8J
2
1 2
2
PM ON
1 2 1 2 V R_ON <27>
PR102
4.53K_0402_1% P R93
2
PC81 0_0402_5%
33
32
31
30
29
28
27
26
25
1
0.22U_0603_25V7K
VR EF_CPU
P C79 P R89 +CPU_B+ PL1
OSRSEL
TONSEL
TRIPSEL
PWRMON
VR_ON
V5FILT
ISLEW
TP
DROOP
1
33P_0402_50V8K 10K_0402_1% FBMA-L11-201209-121LMA50T_0805
1 2
1 2 B+
2
1 24 2 1
VREF CLKEN#
2200P_0402_50V7K
10U_1206_25V6M
10U_1206_25V6M
C SN 1 2 P R87 @ 0_0402_5%
470P_0603_50V8J
PR107 470_0402_1%
1
PC15
PC13
PC14
2 23 2 1 PM_DPRSLPVR <6,19>
GND DPRSLP
1
P R88 499_0402_1%
PC107
P C80 33P_0402_50V8K
2
1 2 3 22 2 1 VGATE <14,19,27>
2
CSN PGOOD
2
PR144 0_0402_5%
PQ11
PR17 PC78 @
100_0402_1% C SP 1 2 100P_0402_50V8J 4 21 4
1
PR108 470_0402_1% CSP P U8 V5IN
1 2
TPS51610RHB_QFN32_5X5
<5> VSSSENSE 5 20 LGATE_CPU
GNDSNS DRVL PL8
3
2
1
2.2UH_PCMC063T-2R2MN_8A_20%
<5> V CCSENSE 6 19 PHASE_CPU 1 2 +CPU_CORE
VSNS LL
2 + CPU_CORE 1 2 2
1
SI7716DN-T1-E3_PAK1212-8
P R18 2 1 1 2 7 18 BOOT_CPU 1 2 1 2
THERM VBST
1
100_0402_1% PR106 PH 3 20K_0603_1% PR83
10K_0402_1% P R86 P C72 P R84 162K_0402_1%
DPRSTP#
8 17 UGATE_CPU 0_0603_5% 0.22U_0603_25V7K 6.8_1206_5% P R82
VR_TT# DRVH 43.2K_0402_1%
VID6
VID5
VID4
VID3
VID2
VID1
VID0
2
PQ18
4 1 2 1 2
2
<4> H_PROCHOT# H_PROCHOT# 1 2
PR103 P H2
10
11
12
13
14
15
16
0_0402_5% 150K +-5% ERTJ1VV154J 0603
1
PC71
3
2
1
+ VCCP 2 1 680P_0603_50V8J 1 2
PR104 PR109
2
56_0402_5% 24.9K_0402_1%
+5VS
PR101 1 2 0_0402_5% 1 2
<4,18> H_DPRSTP#
P R99 2 0_0402_5% P C82
C SP
<5> C PU_VID6 1
6800P_0402_25V7K
C SN
1
P R98 1 2 0_0402_5%
<5> C PU_VID5
PC73
P R96 1 2 0_0402_5% 4.7U_0805_6.3V6K
<5> C PU_VID4
2
P R94 1 2 0_0402_5%
<5> C PU_VID3
P R91 1 2 0_0402_5%
<5> C PU_VID2
P R90 1 2 0_0402_5%
<5> C PU_VID1
P R85 1 2 0_0402_5%
<5> C PU_VID0
3 3
4 4

+CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
C 0.1
KAV10 LA-4781P
A B C D E F G H
A B C D E
Version change list (P.I.R. List) Page 1 of 1
Item Fixed Issue Rev. PG# Modify List

1 LAN JRJ1 0.2 P25 Change JRJ1 Pin define
1 1
2 Change NB,SB P/N 0.2 Change NB to SA00002KQ50 SB to SA00000V1D0
3 Customer request 0.2 P29 TP 12pin change to 6pin
4 0.2 Q26 3413 change to 2301
5 0.2 P29 SW3,4 change to SN100000K00
6 Customer request 0.2 P28 change net name NOVO_BTN# to ONE_KEY_RECOVER#
7 0.2 P22 Change C352,C353,C354,C355 to SE107225K80
8 0.2 P04 Change C312,C314 to SE000003H00
9 0.2 P13 Change C109,C110,C128,C129,C130,C112 to SE103225Z80
10 Modify LCD power squence 0.2 P15 Change R221 to 100K
11 Fix WLAN card leakage 0.2 P21 Delete WLAN port80 and cut WWAN port80
12 User define key support power on 0.2 P28 Add D24 for user define key power on and pull up change to +3valw
13 ESD request 0.2 P28 D15 change to SCA00000R00
14 Realtek recommend 0.2 P25 C258 change to 1uf
15 0.2 C71 and C81 change to 0603
2 16 For B Phase 0.2 P27 Add R97 100k and change R94 to 8.2K 2
17 EMI request 0.2 P27,15 Add R93,C385,C147,C10,C11 Change R165 to 33 ohm

18 ESD request 0.2 P4 Add C391~C397
19 For N280 0.2 P14 Unpop: R68,110,87 Pop:R69,119,84
20 Realtek recommend 0.2 P25 Delete C257
21 0.2 P10 C30 change to SE027474Z80
22 Customer request 0.2 P30 U7,30 change to high active unpop R185
23 0.2 P22 Unpop C325 POP C326
24 EC code for MP 1.0 P27 Unpop R94
25 SSD pin change 1.0 P21 JP13 32pin change to 47pin
26 1.0 P28 Change D14,D24 foorprint
27 1.0 Change BT connect
28 1.0 P16 Change D2 from SC1B491D000 to SCS00002000
29 1.0 Change C373, C297, C71, C73, C81, C82, C84 and C85 to SE052105Z80
3
30 1.0 P20 Unpop D12 3
31 EMI request 1.0 P20 Add C257,C398,C399,C400

32 1.0 P04 Unpop R58
33 SSD 1.0 P21 Unpop R117
34 EMI request 1.0 P27 R165 change to bead for EMI request
35 3G request 1.0 P14 Pop C390
36 1.0 P28 Change D1,14,24 P/N SC2N202U010 to SC6AV70W110
37 1.0 P27 Unpop D7
4 4
Compal Electronics, Inc.

Title
HW PIR
LA-4421P
A B C D E
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1 for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
Adjust charging current Adjust charging current P36 Change PR75 from 88.7K to 56K. 2008.12.30
1 EVT
D D
EMI EMI requests to add soltion P40 Add PC107 2009.02.13

2 PVT
Adjust charging voltage Adjust charging voltage P36 Change PR78 from 18.2K to 15.4K. 2009.02.13
3 PVT
EMI EMI requests to add soltion P36 Add PC106 2009.02.13
4 PVT
5 EMI EMI requests to add soltion P38 Add PC108 and PC43 2009.02.13
PVT
Add PD16
6 Design change Adjust +1.5VSP turn on timing P39 Change PR122 from 10K to 30K. 2009.02.13 PVT
Change PC90 from 0.47u to 0.68u.
7
Thermal Adjust CPU OTP from 85 degree C to 90 degree C P35 Change PR141 from 21.5k to 16.9k. 2009.03.13
Pre-MP
8
C
9 C
10
11
12
13
14
B 15 B
16
17
18
19
20
21
22
A A

PIR (PWR)
Size Document Number Rev
Custom 0.1
<Doc>
5 4 3 2 1
A B C D E
Version change list (P.I.R. List) Page 1 of 1
Item Fixed Issue Rev. PG# Modify List

1 LAN JRJ1 0.2 P25 Change JRJ1 Pin define
2 Modify LCD power squence P15 Change R221 to 100K
1 3 Customer request 0.2 P29 TP 12pin change to 6pin 1
4 Fix WLAN card leakage 0.2 P21 Delete WLAN port80 and cut WWAN port80
5 User define key support power on 0.2 Add D24 for user define key power on and pull up change to +3valw
6 Customer request 0.2 P28 Change net name NOVO_BTN# to ONE_KEY_RECOVER#
7 ESD request 0.2 P28 D15 change to SCA00000R00
8 Realtek recommend 0.2 P25 C258 change to 1uf
9 For B Phase 0.2 P27 Add R97 100k and change R94 to 8.2K
10 EMI request 0.2 P27,15 Add R93,C385,C147,C10,C11 Change R165 to 33 ohm
11 ESD request 0.2 P4 Add C391~C397
12 For N280 0.2 P14 Unpop: R68,110,87 Pop:R69,119,84
13 Customer request 0.2 P30 U7,30 change to high active unpop R185
14 EC code for MP 1.0 P27 Unpop R94
15 Mini SSD pin define change 1.0 P21 JP13 pin 32 change to 47 30 change to 45
16
17
2 2
18
19
22
3 3
4 22 0.2 4
23 0.2
24
Compal Electronics, Inc.
Title
HW PIR
LA-4421P
A B C D E

Lenovo IdeaPad S10-2 Compal LA-5071P KIUN0 Rev1.0

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Lenovo IdeaPad S10-2 Compal LA-5071P KIUN0 Rev1.0

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A B C D E

KIUN0 Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

Compal Confidential Diamondville SC

CRT Conn FSB

10/100 Ethernet BlueTooth

Full ON HIGH HIGH HIGH ON ON ON ON

S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW

S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF

S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF

S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF

BOARD ID Table(Page 25) Device Address

ID BRD ID Ra Rb Vab Clock Generator 1101 001Xb

Security Classification Compal Secret Data Compal Electronics, Inc.

H_A#34 A[33]# THRMDA H_THERMDC H_DINV#1 DSTBP[1]# DSTBP[3]# H_DINV#3

H_NMI LINT0 +VCCP FORCEPR# DPSLP# H_DPWR#

NC2 RSVD2 PREQ# <14> CPU_BSEL1 CPU_BSEL2 BSEL[1] CMREF[1]

U12 D19 Connector

EN_FAN1 VOUT GND @ 1N4148_SOT23 C80

C314 1 8 EC_SMB_CK2 EC_SMB_CK2 <27>

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K

10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K

PLACE IN CORRIDOR AND CLOSE TO CPU

Security Classification Compal Secret Data Compal Electronics, Inc.

<4> H_D#[0..63] H_A#[3..31] <4>

H_D#62 AA2 C8 H_HIT#

D U8C DDR_A_D[0..63] <13>

DDR2 SYSTEM MEMORY

Security Classification Compal Secret Data Compal Electronics, Inc.

<15> LVDS_A0 LVDS_A0 H31

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

C66 C30 +2.5VS +2.5VS

close pin C29/D29 close pin B31

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_D35 137 138

DDR_A_D41 143 144

1 0 1 100 100 33.3 14.318 96.0 48.0 Q10B

1 1 1 Reserved SA000020K00 (Silego : SLG8SP556VTR )

FSA 2 1 1 2 +1.05VM_CK505 66 24 CLK_MCH_DREFCLK

<4> CPU_BSEL0 1 2 R 67 31 25 CLK_MCH_DREFCLK#

FSB C390 REF_1 SRC_4

F SC PCI_2 SRC_9# W LAN_CLKREQ# R121 10K_0402_5%

33_0402_5% 1 2 R80 ITP_EN 17

For PCI2_TME:0=Overclocking of CPU and SRC allowed 69 58 W LAN_CLKREQ#

CLK_XTAL_IN VSS USB_1/CLKREQ_A#

LCD POWER CIRCUIT

Security Classification Compal Secret Data Compal Electronics, Inc.

Close to CRT CONN for ESD.

+3VS CRT PORT

R246 R251 3 JCRT1

Security Classification Compal Secret Data Compal Electronics, Inc.

R127 1 2 8.2K_0402_5% PCI_ PIRQG# CLK_PCI_ICH

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

+3VS Place closely pin B2 Place closely pin AC1

DIRECT MEDIA INTERFACE

Security Classification Compal Secret Data Compal Electronics, Inc.

U17F +VCCP U17E

AC24 Vcc1_5_B[6] Vcc1_05[12] T18 C27 VSS[12] VSS[110] T13

Vcc1_5_B[10] Vcc1_05[16] VSS[16] VSS[114]

ICH_V5REF_SUS Vcc1_5_B[30] Vcc3_3[9] VSS[37] VSS[134]

AC7 L3 M16 AD23

F17 N13 AF4