Lenovo 3000 G410 (COMPAL LA-3691P) Laptop Schematics Diagram

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ZZZ1
SE000008600
PCB
1 1
Compal Confidential
2 2
Everest Schematics Document

Intel Merom Processor with Crestline + DDRII + ICH8M
3 2007-03-05 3
REV: 0.2
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-3691P
Date: Thursday, March 08, 2007 Sheet 1 of 45
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A B C D E
Compal Confidential
Model Name : Everest Intel Merom Processor
File Name : LA-3691P uPGA-478 Package
1
page 4,5,6 1
FSB
H_A#(3..35) 667/800MHz H_D#(0..63)
CRT CRT CRT

NB7M page 19
128M Memory BUS(DDRII) 200pin DDRII-SO-DIMM X2
Intel Crestline
VGA/B LVDS Dual Channel BANK 0, 1, 2, 3 page 14,15
LCD Conn. LVDS
page 18 1.8V DDRII 533/667
uFCBGA-1299
PCI-Express
page 7,8,9,10,11,12,13
DMI USB conn x2 USB conn x2 3 in 1

Bluetooth Card Reader socket
X4 mode TO M/B TO I/O/B RTS 5158
page 33 page 37
Conn page 33 page 28
page 29
2 2
PCI-Express USB
Intel ICH8-M 3.3V 48MHz
3.3V 24.576MHz/48Mhz HD Audio

3.3V ATA-100 IDE
BGA-676
S-ATA port 0
page 20,21,22,23
New Card MINI Card LAN(10/100M) MDC 1.5 HDA Codec
Socket WLAN,
BCM5906 Conn
page 42
ALC861VD
page 38
page 33 3G/TV-Tuner
Robson page 32 page 30
S-ATA HDD CDROM
LPC BUS Conn.page 24 Conn.
page 24
Audio AMP
RJ45 page 39
3
page 31 3
ENE KB926 SPI ROM BIOS Int SPK Mic/Int

page 34 page 36
USB BD Audio BD
Fan Control Touch Pad Int.KBD

page 4 K_SW page 36 Line-out Mic/Ext
page 35
Clock Generator Sub BD

ICS9LPRS365
page 16 USBx2
Thermal Sensor
4
ADM1032 4
page 4
SW Board
HDD/ODD NUM CAP Scroll NOVO Mute User Power
Power circuit
page X
Power Battery W/L
MB THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
B 0.2
LA-3691P
A B C D E
A B C D E
1
Voltage Rails 1
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Power Plane Description S1 S3 S5
External PCI Devices
VIN Adapter power supply (19V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A
DEVICE IDSEL # REQ/GNT # PIRQ
+CPU_CORE Core voltage for CPU ON OFF OFF
No PCI Device
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
2 2
+5VS 5V switched power rail ON OFF OFF
+VSB VSB always on power rail ON ON ON*
EC SM Bus1 address EC SM Bus2 address
+RTCVCC RTC power ON ON ON
Device Address Device Address
Smart Battery 0001 011X b GMT-781 1001 100X b
EEPROM(24C16/02) 1010 000X b NVIDIA NB8X
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
3 ICH8M SM Bus address 3
Device Address
BOARD ID Table
Clock Generator 1101 001Xb
ID1 ID0 TEST (ICS9LPRS325AKLFT_MLF72)
0(R744) 0(R745) DDR DIMM0 1010 000Xb

A-TEST
0(R744) 1(R742) DDR DIMM1 1010 010Xb
B-TEST
1(R741) 0(R745) C-TEST
PANEL ID Table
R Size
Ra (R743) 15W
Rb (R740) 14W
4 4

Notes List
B 0.2
LA-3691P
A B C D E
5 4 3 2 1
Place close to CPU within 500mil

H_A#[3..35]
<7> H_A#[3..35]
<7> H_REQ#[0..4]
H_REQ#[0..4]
JP15A
XDP Reserve
H_RS#[0..2] H_A#3 J4 H1 H_ADS# <7>
<7> H_RS#[0..2] A[3]# ADS#
ADDR GROUP 0
H_A#4 L5 E2 H_BNR# <7>
H_A#5 A[4]# BNR# +VCCP
L4 A[5]# BPRI# G5 H_BPRI# <7>
H_A#6 K5
H_A#7 A[6]#
M3 A[7]# DEFER# H5 H_DEFER# <7>
H_A#8 N2 F21 XDP_TDI R33 1 2 150_0402_1%
A[8]# DRDY# H_DRDY# <7>
D H_A#9 J1 E1 D
A[9]# DBSY# H_DBSY# <7> +VCCP
H_A#10 N3 XDP_TMS R32 1 2 39_0402_1%
H_A#11 A[10]#
P5 A[11]# BR0# F1 H_BR0# <7>
H_A#12 P2 XDP_TDO R31 1 2 @ 54.9_0402_1%
H_A#13 A[12]# H_IERR# R73 1 56_0402_5%
CONTROL
L2 A[13]# IERR# D20 2
H_A#14 P4 B3 XDP_BPM#5 R28 1 2 54.9_0402_1%
A[14]# INIT# H_INIT# <21>
H_A#15 P1
H_A#16 A[15]# XDP_HOOK1 R27
R1 A[16]# LOCK# H4 H_LOCK# <7> 1 2 @ 54.9_0402_1%
<7> H_ADSTB#0 M1 ADSTB[0]#
C1 H_RESET# H_RESET# <7>
H_REQ#0 RESET# H_RS#0 XDP_TRST# R24 560_0402_5%
K3 REQ[0]# RS[0]# F3 1 2
H_REQ#1 H2 F4 H_RS#1
H_REQ#2 REQ[1]# RS[1]# H_RS#2 XDP_TCK R17 27_0402_5%
K2 REQ[2]# RS[2]# G3 1 2
H_REQ#3 J3 G2 H_TRDY# <7>
H_REQ#4 REQ[3]# TRDY#
L1 REQ[4]#
HIT# G6 H_HIT# <7>
H_A#17 Y2 E4
A[17]# HITM# H_HITM# <7>
H_A#18 U5
H_A#19 A[18]# XDP_BPM#0
R3 A[19]# BPM[0]# AD4 T1
ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1
A[20]# BPM[1]# T4 +3VS
H_A#21 U4 AD1 XDP_BPM#2
A[21]# BPM[2]# T3
H_A#22 Y5 AC4 XDP_BPM#3
A[22]# BPM[3]# T7 C327
XDP/ITP SIGNALS
H_A#23 U1 AC2 XDP_BPM#4
A[23]# PRDY# T6
H_A#24 R4 AC1 XDP_BPM#5 1 2
A[24]# PREQ# T9
2
H_A#25 T5 AC5 XDP_TCK
A[25]# TCK T5
H_A#26 T3 AA6 XDP_TDI 0.1U_0402_16V4Z R268
A[26]# TDI T12
H_A#27 W2 AB3 XDP_TDO U19 10K_0402_5%
A[27]# TDO T10
H_A#28 W5 AB5 XDP_TMS H_THERMDA 2 1
A[28]# TMS T11 D+ VDD1
H_A#29 Y4 AB6 XDP_TRST# C328
T8
1
C H_A#30 A[29]# TRST# XDP_DBRESET# H_THERMDC THERM_SCI# C
U2 A[30]# DBR# C20 XDP_DBRESET# <22> 1 2 3 D- ALERT# 6 2 1 EC_THERM# <22,32>
H_A#31 V4 2200P_0402_50V7K R267 @ 0_0402_5%
H_A#32 A[31]# EC_SMB_CK2 THERM#
H_A#33
W3 A[32]# Connect SB SYS_RESET# or just left NC
H_PROCHOT#
<32> EC_SMB_CK2 8 SCLK THERM# 4 2
10K_0402_5%
1
R269
+3VS
AA4 A[33]# THERMAL H_PROCHOT# <45> Check : to sb
H_A#34 AB2 2 1 EC_SMB_DA2 7 5
<32> EC_SMB_DA2
H_A#35 AA3
A[34]#
D21 R70 56_0402_5% +VCCP SDATA GND
A[35]# PROCHOT# H_THERMDA
<7> H_ADSTB#1 V1 ADSTB[1]# THERMDA A24
B25 H_THERMDC G781F_SOP8
THERMDC
<21> H_A20M# A6 A20M#
Address:100_1100
ICH
<21> H_FERR# A5 FERR# THERMTRIP# C7 H_THERMTRIP# <8,21>

<21> H_IGNNE# C4 IGNNE#
<21> H_STPCLK# D5 STPCLK#

<21> H_INTR C6 LINT0 H CLK
<21> H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK <16>
<21> H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# <16>
M4
N5
RSVD[01] FAN1 Conn
RSVD[02]
T2 RSVD[03] H_THERMDA, H_THERMDC routing together,
V3 RSVD[04]
B2 Trace width / Spacing = 10 / 10 mil
RESERVED
RSVD[05]
C3 RSVD[06]
D2 RSVD[07]
D22 RSVD[08]
D3 +5VS
RSVD[09] C100 2.2U_0603_16V6K +5VS
F6 RSVD[10]
1 2
DIODE
Closed to
1
B B
FOX_PZ4782A-274M-41_Merom U6 D8 Connector
ME@ 1 VEN GND 8
2 7 1SS355_SOD323
+VCC_FAN1 VIN GND @ D7
3 6
2
EN_FAN1 VO GND @ 1N4148_SOT23
<32> EN_FAN1 4 VSET GND 5
1 2
G993P1UF_SOP8
C94
2.2U_0603_16V6K
1 2
+VCCP +3VS C358
1000P_0402_50V7K
1 2
1
1
R276
R68 10K_0402_5%
@ 56_0402_5%
40mil JP17
2
+VCC_FAN1 1
2 2
1
<32> FAN_SPEED1 2 2
B
3 3
1
E
H_PROCHOT# 3 1 OCP# C341 4

OCP# <22> GND
C
@ Q4 1000P_0402_50V7K 5
MMBT3904_SOT23 GND
2
A A
ACES_85205-03001
ME@

Merom (1/3)
B 0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
H_D#[0..63] JP15C
H_D#[0..63] <7>
+CPU_CORE A7 VCC[001] VCC[068] AB20 +CPU_CORE
JP15B A9 AB7
H_D#0 H_D#32 VCC[002] VCC[069]
E22 D[0]# D[32]# Y22 A10 VCC[003] VCC[070] AC7
D H_D#1 F24 AB24 H_D#33 A12 AC9 D
H_D#2 D[1]# D[33]# H_D#34 VCC[004] VCC[071]
E26 D[2]# D[34]# V24 A13 VCC[005] VCC[072] AC12
H_D#3 G22 V26 H_D#35 A15 AC13
D[3]# D[35]# VCC[006] VCC[073]
DATA GRP 0
H_D#4 F23 V23 H_D#36 A17 AC15
H_D#5 D[4]# D[36]# H_D#37 VCC[007] VCC[074]
G25 D[5]# D[37]# T22 A18 VCC[008] VCC[075] AC17
H_D#6 E25 U25 H_D#38 A20 AC18
H_D#7 D[6]# D[38]# H_D#39 VCC[009] VCC[076]
E23 D[7]# D[39]# U23 B7 VCC[010] VCC[077] AD7
H_D#8 K24 Y25 H_D#40 B9 AD9
H_D#9 D[8]# D[40]# H_D#41 VCC[011] VCC[078]
G24 D[9]# D[41]# W22 B10 VCC[012] VCC[079] AD10
DATA GRP 2
H_D#10 J24 Y23 H_D#42 B12 AD12
H_D#11 D[10]# D[42]# H_D#43 VCC[013] VCC[080]
J23 D[11]# D[43]# W24 B14 VCC[014] VCC[081] AD14
H_D#12 H22 W25 H_D#44 B15 AD15
H_D#13 D[12]# D[44]# H_D#45 VCC[015] VCC[082]
F26 D[13]# D[45]# AA23 B17 VCC[016] VCC[083] AD17
H_D#14 K22 AA24 H_D#46 B18 AD18
H_D#15 D[14]# D[46]# H_D#47 VCC[017] VCC[084]
H23 D[15]# D[47]# AB25 B20 VCC[018] VCC[085] AE9
<7> H_DSTBN#0 J26 DSTBN[0]# DSTBN[2]# Y26 H_DSTBN#2 <7> C9 VCC[019] VCC[086] AE10
<7> H_DSTBP#0 H26 DSTBP[0]# DSTBP[2]# AA26 H_DSTBP#2 <7> C10 VCC[020] VCC[087] AE12
<7> H_DINV#0 H25 DINV[0]# DINV[2]# U22 H_DINV#2 <7> C12 VCC[021] VCC[088] AE13
C13 VCC[022] VCC[089] AE15
C15 VCC[023] VCC[090] AE17
H_D#16 N22 AE24 H_D#48 C17 AE18
H_D#17 D[16]# D[48]# H_D#49 VCC[024] VCC[091]
K25 D[17]# D[49]# AD24 C18 VCC[025] VCC[092] AE20
H_D#18 H_D#50
Close to CPU pin AD26 H_D#19
P26
R23
D[18]# D[50]# AA21
AB22 H_D#51
D9
D10
VCC[026] VCC[093] AF9
AF10
D[19]# D[51]# VCC[027] VCC[094]
within 500mils. H_D#20 L23 D[20]# D[52]# AB21 H_D#52 D12 VCC[028] VCC[095] AF12
DATA GRP 1
H_D#21 M24 AC26 H_D#53 D14 AF14
H_D#22 D[21]# D[53]# H_D#54 VCC[029] VCC[096]
L22 D[22]# D[54]# AD20 D15 VCC[030] VCC[097] AF15
H_D#23 M23 AE22 H_D#55 D17 AF17 Place this cap more close to
H_D#24 D[23]# D[55]# H_D#56 VCC[031] VCC[098]
P25 D[24]# D[56]# AF23 D18 VCC[032] VCC[099] AF18
C H_D#25 P23 AC25 H_D#57 E7 AF20 B26/C26 rather than 10UF C
+VCCP H_D#26 D[25]# D[57]# H_D#58 VCC[033] VCC[100]
P22 D[26]# D[58]# AE21 E9 VCC[034]
H_D#27 T24 AD21 H_D#59 E10 G21
D[27]# D[59]# VCC[035] VCCP[01] +VCCP
DATA GRP 3
H_D#28 R24 AC22 H_D#60 E12 V6
H_D#29 D[28]# D[60]# H_D#61 VCC[036] VCCP[02]
L25 D[29]# D[61]# AD23 E13 VCC[037] VCCP[03] J6 1
2
H_D#30 T25 AF22 H_D#62 E15 K6

R263 H_D#31 D[30]# D[62]# H_D#63 VCC[038] VCCP[04] + C317
N25 D[31]# D[63]# AC23 E17 VCC[039] VCCP[05] M6
1K_0402_1% <7> H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 <7> E18 VCC[040] VCCP[06] J21
M26 AF24 E20 K21 330U_D2E_2.5VM_R9
<7> H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 <7> VCC[041] VCCP[07] 2
<7> H_DINV#1 N24 AC20 H_DINV#3 <7> F7 M21
1
DINV[1]# DINV[3]# VCC[042] VCCP[08]

F9 VCC[043] VCCP[09] N21
Width=20 mil GTL_REF AD26 R26 COMP0 R266 1 2 27.4_0402_1% F10 N6
R76 GTLREF COMP[0] VCC[044] VCCP[10]
2 1 @ 1K_0402_5% TEST1 C23 TEST1 MISC COMP[1] U26 COMP1 R264 1 2 54.9_0402_1% F12 VCC[045] VCCP[11] R21
R67 2 1 @ 1K_0402_5% TEST2 D25 AA1 COMP2 R35 1 2 27.4_0402_1% F14 R6
TEST2 COMP[2] VCC[046] VCCP[12]
2
TEST3 C24 Y1 COMP3 R39 1 2 54.9_0402_1% F15 T21

T14 PAD TEST3 COMP[3] VCC[047] VCCP[13]
R261 C303 1 2 @ 0.1U_0402_16V4Z TEST4 AF26 F17 T6
TEST5 TEST4 VCC[048] VCCP[14]
2K_0402_1% T2 PAD AF1 TEST5 DPRSTP# E5 H_DPRSTP# <8,21,45> F18 VCC[049] VCCP[15] V21
TEST6 A26 B5 F20 W21
T13 PAD TEST6 DPSLP# H_DPSLP# <21> VCC[050] VCCP[16]
D24 H_DPWR# <7> AA7 20mils
1
DPWR# H_PWRGOOD VCC[051]

<16> CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGOOD <21> AA9 VCC[052] VCCA[01] B26 +1.5VS
<16> CPU_BSEL1 B23 D7 H_CPUSLP# AA10 C26
BSEL[1] SLP# H_CPUSLP# <7> VCC[053] VCCA[02]
<16> CPU_BSEL2 C21 BSEL[2] PSI# AE6 H_PSI# <45> AA12 VCC[054] 1 1
AA13 AD6 CPU_VID0 <45> C326 C325
FOX_PZ4782A-274M-41_Merom VCC[055] VID[0]
AA15 VCC[056] VID[1] AF5 CPU_VID1 <45>
ME@ AA17 AE5 CPU_VID2 <45> 10U_0805_10V4Z
VCC[057] VID[2] 2 0.01U_0402_16V7K 2
AA18 VCC[058] VID[3] AF4 CPU_VID3 <45>
AA20 VCC[059] VID[4] AE3 CPU_VID4 <45>
AB9 VCC[060] VID[5] AF3 CPU_VID5 <45>
B
Resistor placed within AC10 VCC[061] VID[6] AE2 CPU_VID6 <45> B
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs 0.5" of CPU pin.Trace AB10 VCC[062] 1 2 +CPU_CORE
AB12 R13 100_0402_1%
VCC[063] VCCSENSE
should be at least 25 AB14 VCC[064] VCCSENSE AF7 VCCSENSE <45>
AB15
mils away from any other AB17
VCC[065]
VCC[066] VSSSENSE
toggling signal. AB18 VCC[067] VSSSENSE AE7 VSSSENSE <45>
COMP[0,2] trace width is FOX_PZ4782A-274M-41_Merom R14 1 2 100_0402_1%
18 mils. COMP[1,3] trace .
CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0 width is 4 mils. ME@
166 0 1 1
200 0 1 0
Length match within 25 mils.
The trace width/space/other is
20/7/25.
Close to CPU pin

A within 500mils. A

Merom (2/3)
B 0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
+CPU_CORE +CPU_CORE
3 x 330uF(9mOhm/2) 3 x 330uF(9mOhm/2)
JP15D 1 1 1 1
A4 VSS[001] VSS[082] P6
A8 P21 C298 + C297 + C332 + C331 +
VSS[002] VSS[083]
A11 VSS[003] VSS[084] P24
A14 R2 330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9
VSS[004] VSS[085] 2 2
330U_D2E_2.5VM_R9 2 2
330U_D2E_2.5VM_R9
A16 VSS[005] VSS[086] R5
A19 VSS[006] VSS[087] R22
D A23 VSS[007] VSS[088] R25 D
AF2 VSS[008] VSS[089] T1 South Side Secondary North Side Secondary
B6 VSS[009] VSS[090] T4
B8 VSS[010] VSS[091] T23
B11 T26 +CPU_CORE
VSS[011] VSS[092]
B13 VSS[012] VSS[093] U3
B16 VSS[013] VSS[094] U6
B19 VSS[014] VSS[095] U21
B21 VSS[015] VSS[096] U24 1 1 1 1 1 1 1 1
B24 V2 C26 C27 C28 C29 C30 C31 C32 C33
VSS[016] VSS[097]
C5 VSS[017] VSS[098] V5
C8 V22 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[018] VSS[099] 2 2 2 2 2 2 2 2
C11 VSS[019] VSS[100] V25
C14 W1 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[020] VSS[101]
C16 VSS[021] VSS[102] W4
C19 VSS[022] VSS[103] W23 (Place these capacitors on South side,Secondary Layer)
C2 VSS[023] VSS[104] W26
C22 VSS[024] VSS[105] Y3
C25 Y6 +CPU_CORE
VSS[025] VSS[106]
D1 VSS[026] VSS[107] Y21
D4 VSS[027] VSS[108] Y24
D8 VSS[028] VSS[109] AA2
D11 VSS[029] VSS[110] AA5 1 1 1 1 1 1 1 1
D13 AA8 C56 C55 C54 C53 C52 C51 C50 C49
VSS[030] VSS[111]
D16 VSS[031] VSS[112] AA11
10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
9/25 10U checked. OK for use!
D19 VSS[032] VSS[113] AA14
2 2 2 2 2 2 2 2
D23 VSS[033] VSS[114] AA16
D26 AA19 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[034] VSS[115]
E3 VSS[035] VSS[116] AA22
C E6 AA25 (Place these capacitors on North side,Secondary Layer) C
VSS[036] VSS[117]
E8 VSS[037] VSS[118] AB1
E11 VSS[038] VSS[119] AB4
E14 AB8 +CPU_CORE
VSS[039] VSS[120]
E16 VSS[040] VSS[121] AB11
E19 VSS[041] VSS[122] AB13
E21 VSS[042] VSS[123] AB16
E24 VSS[043] VSS[124] AB19 1 1 1 1 1 1 1 1
F5 AB23 C315 C316 C305 C306 C307 C308 C309 C310
VSS[044] VSS[125]
F8 VSS[045] VSS[126] AB26
F11 AC3 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[046] VSS[127] 2 2 2 2 2 2 2 2
F13 VSS[047] VSS[128] AC6
F16 AC8 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[048] VSS[129]
F19 VSS[049] VSS[130] AC11
F2 VSS[050] VSS[131] AC14 (Place these capacitors on South side,Primary Layer)
F22 VSS[051] VSS[132] AC16
F25 VSS[052] VSS[133] AC19
G4 AC21 +CPU_CORE
VSS[053] VSS[134]
G1 VSS[054] VSS[135] AC24
G23 VSS[055] VSS[136] AD2
G26 VSS[056] VSS[137] AD5
H3 VSS[057] VSS[138] AD8 1 1 1 1 1 1 1 1
H6 AD11 C313 C314 C323 C322 C321 C320 C319 C318
VSS[058] VSS[139]
H21 VSS[059] VSS[140] AD13
H24 AD16 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[060] VSS[141] 2 2 2 2 2 2 2 2
J2 VSS[061] VSS[142] AD19
J5 AD22 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[062] VSS[143]
J22 VSS[063] VSS[144] AD25
B
J25 VSS[064] VSS[145] AE1 (Place these capacitors on North side,Primary Layer) B
K1 VSS[065] VSS[146] AE4
K4 VSS[066] VSS[147] AE8
K23 VSS[067] VSS[148] AE11
K26 VSS[068] VSS[149] AE14 +CPU-CORE C,uF ESR, mohm ESL,nH
L3 AE16
L6
VSS[069] VSS[150]
AE19 Decoupling
VSS[070] VSS[151]
L21 VSS[071] VSS[152] AE23 SPCAP,Polymer 6X330uF 9m ohm/6 1.8nH/6
L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] A2 32X22uF 3m ohm/32 0.6nH/32
M5 VSS[074] VSS[155] AF6 MLCC 0805 X5R
M22 VSS[075] VSS[156] AF8 32X10uF 3m ohm/32 0.6nH/32
M25 VSS[076] VSS[157] AF11
N1 VSS[077] VSS[158] AF13
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
P3 A25 +VCCP
VSS[081] VSS[162]
VSS[163] AF25
FOX_PZ4782A-274M-41_Merom 1
. 1 1 1 1 1 1
C324 + C38 C43 C58 C24 C39 C45
ME@
330U_D2E_2.5VM 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
A A

Merom (3/3)
B 0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
H_A#[3..35] <4>
<5> H_D#[0..63] U20A U20 U20
J13 H_A#3
H_D#0 H_A#_3 H_A#4
E2 H_D#_0 H_A#_4 B11
H_D#1 G2 C11 H_A#5
H_D#2 H_D#_1 H_A#_5 H_A#6
G7 H_D#_2 H_A#_6 M11
H_D#3 M6 C15 H_A#7
H_D#4 H_D#_3 H_A#_7 H_A#8
H7 H_D#_4 H_A#_8 F16 965GM 960GM
H_D#5 H3 L13 H_A#9 @ GM@
H_D#6 H_D#_5 H_A#_9 H_A#10
G4 H_D#_6 H_A#_10 G17
D H_D#7 F3 C14 H_A#11 D
H_D#8 H_D#_7 H_A#_11 H_A#12
N8 H_D#_8 H_A#_12 K16
H_D#9 H2 B13 H_A#13
H_D#10 H_D#_9 H_A#_13 H_A#14
M10 H_D#_10 H_A#_14 L16
H_D#11 N12 J17 H_A#15
H_D#12 H_D#_11 H_A#_15 H_A#16
N9 H_D#_12 H_A#_16 B14
H_D#13 H5 K19 H_A#17
H_D#14 H_D#_13 H_A#_17 H_A#18
P13 H_D#_14 H_A#_18 P15
H_D#15 K9 R17 H_A#19
H_D#16 H_D#_15 H_A#_19 H_A#20
M2 H_D#_16 H_A#_20 B16
H_D#17 W10 H20 H_A#21
H_D#18 H_D#_17 H_A#_21 H_A#22
Y8 H_D#_18 H_A#_22 L19
H_D#19 V4 D17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
M3 H_D#_20 H_A#_24 M17
H_D#21 J1 N16 H_A#25
+VCCP H_D#22 H_D#_21 H_A#_25 H_A#26
N5 H_D#_22 H_A#_26 J19
H_D#23 N3 B18 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
W6 H_D#_24 H_A#_28 E19
1
H_D#25 W9 B17 H_A#29

R279 H_D#26 H_D#_25 H_A#_29 H_A#30
N2 H_D#_26 H_A#_30 B15
H_D#27 Y7 E17 H_A#31
221_0402_1% H_D#28 H_D#_27 H_A#_31 H_A#32
Y9 H_D#_28 H_A#_32 C18
H_D#29 P4 A19 H_A#33
2
H_SWNG H_D#30 H_D#_29 H_A#_33 H_A#34

W3 H_D#_30 H_A#_34 B19
H_D#31 N1 N19 H_A#35
H_D#32 H_D#_31 H_A#_35
AD12 H_D#_32
2
1 H_D#33 AE3 G12 H_ADS#

H_D#_33 H_ADS# H_ADS# <4>
R282 C360 H_D#34 AD9 H17 H_ADSTB#0
H_D#_34 H_ADSTB#_0 H_ADSTB#0 <4>
H_D#35 AC9 G20 H_ADSTB#1
HOST
H_D#_35 H_ADSTB#_1 H_ADSTB#1 <4>
C 100_0402_1% 0.1U_0402_16V4Z H_D#36 AC7 C8 H_BNR# C
2 H_D#_36 H_BNR# H_BNR# <4>
H_D#37 AC14 E8 H_BPRI#
H_BPRI# <4>
1
H_D#38 H_D#_37 H_BPRI# H_BR0#

AD11 H_D#_38 H_BREQ# F12 H_BR0# <4>
H_D#39 AC11 D6 H_DEFER#
H_D#_39 H_DEFER# H_DEFER# <4>
Near B3 pin H_D#40 AB2 C10 H_DBSY#
H_D#_40 H_DBSY# H_DBSY# <4>
H_D#41 AD7 AM5 CLK_MCH_BCLK
H_D#_41 HPLL_CLK CLK_MCH_BCLK <16>
H_RCOMP H_D#42 AB1 AM7 CLK_MCH_BCLK#
H_D#_42 HPLL_CLK# CLK_MCH_BCLK# <16>
H_D#43 Y3 H8 H_DPWR#
H_D#_43 H_DPWR# H_DPWR# <5>
H_D#44 AC6 K7 H_DRD Y#
H_D#_44 H_DRDY# H_DRDY# <4>
1
H_D#45 AE2 E4 H_HIT#

H_D#_45 H_HIT# H_HIT# <4>
R283 H_D#46 AC5 C6 H_HITM#
H_D#_46 H_HITM# H_HITM# <4>
H_D#47 AG3 G10 H_LOCK#
H_D#_47 H_LOCK# H_LOCK# <4>
24.9_0402_1% H_D#48 AJ9 B7 H_TRDY#
H_D#_48 H_TRDY# H_TRDY# <4>
H_D#49 AH8
2
H_D#50 H_D#_49
AJ14 H_D#_50
H_D#51 AE9
H_D#52 H_D#_51
AE11 H_D#_52
H_D#53 AH12 K5 H_DINV#0
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1 H_DINV#0 <5>
AJ5 H_D#_54 H_DINV#_1 L2 H_DINV#1 <5>
H_D#55 AH5 AD13 H_DINV#2
+VCCP H_D#56 H_D#_55 H_DINV#_2 H_DINV#3 H_DINV#2 <5>
AJ6 H_D#_56 H_DINV#_3 AE13 H_DINV#3 <5>
layout note: H_D#57 AE7
H_D#58 H_D#_57 H_DSTBN#0
AJ7 H_D#_58 H_DSTBN#_0 M7 H_DSTBN#0 <5>
Route H_SCOMP and H_SCOMP# with H_D#59 AJ2 K3 H_DSTBN#1
H_D#60 H_D#_59 H_DSTBN#_1 H_DSTBN#2 H_DSTBN#1 <5>
AE5 AD2
trace width, spacing and H_D#_60 H_DSTBN#_2 H_DSTBN#2 <5>
2
H_D#61 AJ3 AH11 H_DSTBN#3

R164 R168 H_D#62 H_D#_61 H_DSTBN#_3 H_DSTBN#3 <5>
impedance (55 ohm) same as FSB AH2 H_D#_62
H_D#63 AH13 L7 H_DSTBP#0
data traces 54.9_0402_1% 54.9_0402_1% H_D#_63 H_DSTBP#_0
K2 H_DSTBP#1 H_DSTBP#0 <5>
B H_DSTBP#_1 H_DSTBP#2 H_DSTBP#1 <5> B
AC2
1
H_SWNG H_DSTBP#_2 H_DSTBP#3 H_DSTBP#2 <5>

B3 H_SWING H_DSTBP#_3 AJ10 H_DSTBP#3 <5>
H_RCOMP C2 H_RCOMP H_REQ#[0..4] <4>
M14 H_REQ#0
+VCCP H_SCOMP H_REQ#_0 H_REQ#1
W1 H_SCOMP H_REQ#_1 E13
H_SCOMP# W2 A11 H_REQ#2
H_SCOMP# H_REQ#_2 H_REQ#3
H_REQ#_3 H13
2
H_RESET# B6 B12 H_REQ#4

<4> H_RESET# H_CPURST# H_REQ#_4
R112 H_CPUSLP# E5
<5> H_CPUSLP# H_CPUSLP# H_RS#[0..2] <4>
E12 H_RS#0
1K_0402_1% H_RS#_0 H_RS#1
H_RS#_1 D7
D8 H_RS#2
1
H_VREF H_RS#_2
B9 H_AVREF
A9 H_DVREF
1
1
R117 C91 CRESTLINE_1p0
PM@
2K_0402_1% 0.1U_0402_16V4Z
2
2
within 100mil to Ball A9,B9
A A
Layout Note:
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Crestline (1/7)-GTL
B 0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
U20B
+1.8V
P36 RSVD1
P37 RSVD2 SM_CK_0 AV29 DDRA_CLK0 <14>
R35 RSVD3 SM_CK_1 BB23 DDRA_CLK1 <14>
N35 BA25 R410
RSVD4 SM_CK_3 DDRB_CLK0 <15>
AR12 AV23 1K_0402_1%
RSVD5 SM_CK_4 DDRB_CLK1 <15>
AR13 RSVD6
AM12 RSVD7 SM_CK#_0 AW30 DDRA_CLK0# <14>
AN13 BA23 SM_RCOMP_VOH
RSVD8 SM_CK#_1 DDRA_CLK1# <14>
J12 RSVD9 SM_CK#_3 AW25 DDRB_CLK0# <15>
RSVD
AR37 RSVD10 SM_CK#_4 AW23 DDRB_CLK1# <15>
AM36 C469 C465
RSVD11 R397
AL36 RSVD12 SM_CKE_0 BE29 DDRA_CKE0 <14>
D AM37 AY32 3.01K_0402_1% 2.2U_0805_10V6K D
RSVD13 SM_CKE_1 DDRA_CKE1 <14>
D20 BD39 0.01U_0402_16V7K
RSVD14 SM_CKE_3 DDRB_CKE0 <15>
SM_CKE_4 BG37 DDRB_CKE1 <15>
SM_CS#_0 BG20 DDRA_SCS0# <14> Layout Note:

BK16 SM_RCOMP_VOL
SM_CS#_1 DDRA_SCS1# <14> SM_VREF trace
SM_CS#_2 BG16 DDRB_SCS0# <15>
H10 BE13 DDRB_SCS1# <15>
width and spacing
RSVD20 SM_CS#_3 R384 C467 C464
B51 is 20/20.
MUXING
RSVD21 1K_0402_1%
BJ20 RSVD22 SM_ODT_0 BH18 DDRA_ODT0 <14>
BK22 BJ15 2.2U_0805_10V6K
RSVD23 SM_ODT_1 DDRA_ODT1 <14>
BF19 BJ14 0.01U_0402_16V7K
RSVD24 SM_ODT_2 DDRB_ODT0 <15> +1.8V
BH20 RSVD25 SM_ODT_3 BE16 DDRB_ODT1 <15> +1.8V +VCCP
BK18 RSVD26 Maybe not used
BJ18 BL15 SMRCOMP R382 1 2 20_0402_1%
RSVD27 SM_RCOMP SMRCOMP# R381 1
BF23 RSVD28 SM_RCOMP# BK14 2 20_0402_1%
2
BG23 CLK_DREF_96M# 1 2
RSVD29 SM_RCOMP_VOH R182 R122 PM@ 0_0402_5%
BC23 RSVD30 SM_RCOMP_VOH BK31
BD24 BL31 SM_RCOMP_VOL CLK_DREF_SSC# 1 2
RSVD31 SM_RCOMP_VOL
DDR
<14> DDRA_SMA14 DDRA_SMA14 BJ29 1K_0402_1% R146 PM@ 0_0402_5%
DDRB_SMA14 SA_MA_14 CLK_DREF_96M
<15> DDRB_SMA14 BE24 AR49 20mil 1 2
1
SB_MA_14 SM_VREF_0 SM_VREF R123 PM@ 0_0402_5%
BH39 RSVD34 SM_VREF_1 AW4
AW20 CLK_DREF_SSC 1 2
RSVD35
2
BK20 1 R142 PM@ 0_0402_5%
RSVD36 C161 R180
9/20 Modify NB symbol for Pin BJ29/BE24/C48/D47 C48 LVDSA_DATA#_3 CLK_DREF_96M
D47 LVDSA_DATA_3 DPLL_REF_CLK B42 CLK_DREF_96M <16>
B44 C42 CLK_DREF_96M# 0.1U_0402_16V4Z 1K_0402_1% CFG[17:3] have internal pull up
RSVD39 DPLL_REF_CLK# CLK_DREF_96M# <16> 2
C44 H48 CLK_DREF_SSC
CLK_DREF_SSC <16>
Strap Pin Table
1
RSVD40 DPLL_REF_SSCLK CLK_DREF_SSC#
A35 RSVD41 DPLL_REF_SSCLK# H47 CLK_DREF_SSC# <16> CFG[19:18] have internal pull down
B37 RSVD42
C B36 K44 CLK_MCH_3GPLL 011 = 667MT/s FSB C
RSVD43 PEG_CLK CLK_MCH_3GPLL <16>
B34 K45 CLK_MCH_3GPLL# CFG[2:0]
CLK
C34
RSVD44 PEG_CLK# CLK_MCH_3GPLL# <16> 010 = 800MT/s FSB
RSVD45
0 = DMI x 2
DMI_ITX_MRX_N0
CFG5 1 = DMI x 4 * (Default)
DMI_RXN_0 AN47 DMI_ITX_MRX_N0 <22>
AJ38 DMI_ITX_MRX_N1 0 = Lane Reversal Enable
DMI_RXN_1 DMI_ITX_MRX_N1 <22>
DMI_ITX_MRX_N2 CFG9
DMI_RXN_2 AN42
AN46 DMI_ITX_MRX_N3
DMI_ITX_MRX_N2 <22> 1 = Normal Operation * (Default)
DMI_RXN_3 DMI_ITX_MRX_N3 <22>
DMI_ITX_MRX_P0
00 = Reserved
MCH_CLKSEL0 DMI_RXP_0 AM47
DMI_ITX_MRX_P1
DMI_ITX_MRX_P0 <22> CFG[13:12] 01 = XOR Mode Enabled
<16> MCH_CLKSEL0 P27 AJ39 DMI_ITX_MRX_P1 <22>
MCH_CLKSEL1 N27
CFG_0 DMI_RXP_1
AN41 DMI_ITX_MRX_P2 10 = All Z Mode Enabled
<16> MCH_CLKSEL1 CFG_1 DMI_RXP_2 DMI_ITX_MRX_P2 <22> 11 = Normal Operation * (Default)
MCH_CLKSEL2 N24 AN45 DMI_ITX_MRX_P3
<16> MCH_CLKSEL2 CFG_2 DMI_RXP_3 DMI_ITX_MRX_P3 <22>
C21 CFG_3 DMI_MTX_IRX_N0
0 = Dynamic ODT Disabled
MCH_CFG_5
C23 CFG_4 DMI_TXN_0 AJ46
DMI_MTX_IRX_N1
DMI_MTX_IRX_N0 <22> CFG16 1 = Dynamic ODT Enabled * (Default)
F23 CFG_5 DMI_TXN_1 AJ41 DMI_MTX_IRX_N1 <22>
DMI_MTX_IRX_N2 0 = Normal Operation
MCH_CFG_7
N23 CFG_6 DMI_TXN_2 AM40
DMI_MTX_IRX_N3
DMI_MTX_IRX_N2 <22> *(Default)
MCH_CFG_8
G23 CFG_7 DMI_TXN_3 AM44 DMI_MTX_IRX_N3 <22> CFG19 1 = DMI Lane Reversal Enable
J20 CFG_8
CFG
MCH_CFG_9 DMI_MTX_IRX_P0
DMI
C20 CFG_9 DMI_TXP_0 AJ47
DMI_MTX_IRX_P1
DMI_MTX_IRX_P0 <22> 0 = Only PCIE or SDVO is operational.
R24 CFG_10 DMI_TXP_1 AJ42
DMI_MTX_IRX_P2
DMI_MTX_IRX_P1 <22> CFG20 * (Default)
L23 AM39 DMI_MTX_IRX_P2 <22>
MCH_CFG_12 J23
CFG_11 DMI_TXP_2
AM43 DMI_MTX_IRX_P3 (PCIE/SDVO select) 1 = PCIE/SDVO are operating simu.
CFG_12 DMI_TXP_3 DMI_MTX_IRX_P3 <22>
MCH_CFG_13 E23 CFG_13
E20 CFG_14 0 = No SDVO Device Present* (Default)
MCH_CFG_16
K23 CFG_15 SDVO_CTRLDATA
M20 CFG_16 1 = SDVO Device Present
M24 CFG_17
GRAPHICS VID
L32 CFG_18
MCH_CFG_19 N33
B CFG_19 B
MCH_CFG_20 L35 CFG_20 MCH_CFG_5
R132 @ 4.02K_0402_1%
E35 MCH_CFG_9
GFX_VID_0 R141 @ 4.02K_0402_1%
<22> PM_BMBUSY# G41 PM_BM_BUSY# GFX_VID_1 A39
L39 C38 MCH_CFG_12
<5,21,45> H_DPRSTP# PM_DPRSTP# GFX_VID_2
PM_EXTTS#0 L36 B39 R145 @ 4.02K_0402_1%
<14> PM_EXTTS#0 PM_EXT_TS#_0 GFX_VID_3
PM
PM_EXTTS#1 J36 E36 MCH_CFG_13

<15> PM_EXTTS#1 PM_EXT_TS#_1 GFX_VR_EN
GMCH_PWROK AW49 R133 @ 4.02K_0402_1%
R176 100_0402_5% MCH_RSTIN# PWROK +1.25VS MCH_CFG_16
<17,20,22,24,25,30> PLT_RST_BUF# AV20 RSTIN#
<4,21> H_THERMTRIP# R104 1 2 0_0402_5% N20 R155 @ 4.02K_0402_1%
THERMTRIP# MCH_CFG_7
<22,45> PM_DPRSLPVR G36 DPRSLPVR
2
R135 @ 4.02K_0402_1%
If THERMTRIP no used, left NC AM49 R173 MCH_CFG_8
CL_CLK CL_CLK0 <22>
AK50 1K_0402_1% R151 @ 4.02K_0402_1%
CL_DATA CL_DATA0 <22>
BJ51 NC_1 CL_PWROK AT43 CL_PWROK <22>
BK51 AN49 CL_RST# <22>
1
NC_2 CL_RST#
ME
BK50 AM50 CL_VREF MCH_CFG_19 +3VS

NC_3 CL_VREF R113 @ 4.02K_0402_1%
BL50 NC_4
2
BL49 MCH_CFG_20
NC_5 C142 1 R172 R126 @ 4.02K_0402_1%
Use VGATE for GMCH_PWROK BL3 NC_6
BL2 392_0402_1%
NC_7
NC
VGATE 1 2 GMCH_PWROK BK1 PM_EXTTS#0 +3VS

<22,45> VGATE NC_8
R184 @ 0_0402_5% BJ1 H35 SDVO_CTRL_CLK 0.1U_0402_16V4Z R114 10K_0402_5%
1
ICH_POK NC_9 SDVO_CTRL_CLK SDVO_CTRL_DATA 2 PM_EXTTS#1
<22,32> ICH_POK 1 2 E1 NC_10 SDVO_CTRL_DATA K36
MISC
R186 0_0402_5% A5 G39 MCH_CLKREQ# R138 10K_0402_5%

NC_11 CLK_REQ# MCH_CLKREQ# <16>
C51 G40 MCH_ICH_SYNC# <22> MCH_CLKREQ#
NC_12 ICH_SYNC# R125 10K_0402_5%
B50 NC_13
A50 NC_14
A49 A37 MCH_TEST_1 R124 0_0402_5% SDVO_CTRL_CLK 1 2
A NC_15 TEST_1 MCH_TEST_2 R158 20K_0402_5% R149 @ 0_0402_5% A
BK2 NC_16 TEST_2 R32
SDVO_CTRL_DATA 1 2
CRESTLINE_1p0 R160 @ 0_0402_5%
PM@

Crestline (2/7)-DMI/DDR
Size Document Number R ev
Custom 0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
DDRA_SDQ[0..63] DDRB_SDQ[0..63]
<14> DDRA_SDQ[0..63] <15> DDRB_SDQ[0..63]
DDRA_SDM[0..7] DDRB_SDM[0..7]
<14> DDRA_SDM[0..7] <15> DDRB_SDM[0..7]
D DDRA_SMA[0..13] DDRB_SMA[0..13] D
<14> DDRA_SMA[0..13] <15> DDRB_SMA[0..13]
U20D U20E
DDRA_SDQ0 AR43 BB19 DDRB_SDQ0 AP49 AY17
SA_DQ_0 SA_BS_0 DDRA_SBS0 <14> SB_DQ_0 SB_BS_0 DDRB_SBS0 <15>
DDRA_SDQ1 AW44 BK19 DDRB_SDQ1 AR51 BG18
DDRA_SDQ2 BA45 BF29 DDRB_SDQ2 AW50 BG36
DDRA_SDQ3 AY46 DDRB_SDQ3 AW51
DDRA_SDQ4 SA_DQ_3 DDRB_SDQ4 SB_DQ_3
AR41 SA_DQ_4 SA_CAS# BL17 DDRA_SCAS# <14> AN51 SB_DQ_4 SB_CAS# BE17 DDRB_SCAS# <15>
DDRA_SDQ5 AR45 DDRB_SDQ5 AN50
DDRA_SDQ6 SA_DQ_5 DDRA_SDM0 DDRB_SDQ6 SB_DQ_5 DDRB_SDM0
AT42 SA_DQ_6 SA_DM_0 AT45 AV50 SB_DQ_6 SB_DM_0 AR50
DDRA_SDQ7 AW47 BD44 DDRA_SDM1 DDRB_SDQ7 AV49 BD49 DDRB_SDM1
DDRA_SDQ8 SA_DQ_7 SA_DM_1 DDRA_SDM2 DDRB_SDQ8 SB_DQ_7 SB_DM_1 DDRB_SDM2
BB45 SA_DQ_8 SA_DM_2 BD42 BA50 SB_DQ_8 SB_DM_2 BK45
DDRA_SDQ9 BF48 AW38 DDRA_SDM3 DDRB_SDQ9 BB50 BL39 DDRB_SDM3
BG47 SA_DQ_10 SA_DM_4 AW13 BA49 SB_DQ_10 SB_DM_4 BH12
DDRA_SDQ11 BJ45 BG8 DDRA_SDM5 DDRB_SDQ11 BE50 BJ7 DDRB_SDM5
BB47 SA_DQ_12 SA_DM_6 AY5 BA51 SB_DQ_12 SB_DM_6 BF3
DDRA_SDQ13 BG50 AN6 DDRA_SDM7 DDRB_SDQ13 AY49 AW2 DDRB_SDM7
DDRA_SDQ14 SA_DQ_13 SA_DM_7 DDRB_SDQ14 SB_DQ_13 SB_DM_7
BH49 SA_DQ_14 BF50 SB_DQ_14
DDRA_SDQ15 BE45 AT46 DDRA_SDQS0 DDRB_SDQ15 BF49 AT50 DDRB_SDQS0
A
SA_DQ_15 SA_DQS_0 DDRA_SDQS0 <14> SB_DQ_15 SB_DQS_0 DDRB_SDQS0 <15>
DDRA_SDQ16 AW43 BE48 DDRA_SDQS1 DDRB_SDQ16 BJ50 BD50 DDRB_SDQS1
B
DDRA_SDQ17 BE44 BB43 DDRA_SDQS2 DDRB_SDQ17 BJ44 BK46 DDRB_SDQS2
DDRA_SDQ18 BG42 BC37 DDRA_SDQS3 DDRB_SDQ18 BJ43 BK39 DDRB_SDQS3
C DDRA_SDQ19 BE40 BB16 DDRA_SDQS4 DDRB_SDQ19 BL43 BJ12 DDRB_SDQS4 C
DDRA_SDQ20 DDRA_SDQS5 DDRB_SDQ20 DDRB_SDQS5
MEMORY
BF44 SA_DQ_20 SA_DQS_5 BH6 DDRA_SDQS5 <14> BK47 SB_DQ_20 SB_DQS_5 BL7 DDRB_SDQS5 <15>
DDRA_SDQ21 DDRA_SDQS6 DDRB_SDQ21 DDRB_SDQS6
MEMORY
BH45 SA_DQ_21 SA_DQS_6 BB2 DDRA_SDQS6 <14> BK49 SB_DQ_21 SB_DQS_6 BE2 DDRB_SDQS6 <15>
DDRA_SDQ22 BG40 AP3 DDRA_SDQS7 DDRB_SDQ22 BK43 AV2 DDRB_SDQS7
DDRA_SDQ23 BF40 AT47 DDRA_SDQS0# DDRB_SDQ23 BK42 AU50 DDRB_SDQS0#
SA_DQ_23 SA_DQS#_0 DDRA_SDQS0# <14> SB_DQ_23 SB_DQS#_0 DDRB_SDQS0# <15>
DDRA_SDQ24 AR40 BD47 DDRA_SDQS1# DDRB_SDQ24 BJ41 BC50 DDRB_SDQS1#
DDRA_SDQ25 AW40 BC41 DDRA_SDQS2# DDRB_SDQ25 BL41 BL45 DDRB_SDQS2#
DDRA_SDQ26 AT39 BA37 DDRA_SDQS3# DDRB_SDQ26 BJ37 BK38 DDRB_SDQS3#
DDRA_SDQ27 AW36 BA16 DDRA_SDQS4# DDRB_SDQ27 BJ36 BK12 DDRB_SDQS4#
DDRA_SDQ28 AW41 BH7 DDRA_SDQS5# DDRB_SDQ28 BK41 BK7 DDRB_SDQS5#
DDRA_SDQ29 AY41 BC1 DDRA_SDQS6# DDRB_SDQ29 BJ40 BF2 DDRB_SDQS6#
DDRA_SDQ30 AV38 AP2 DDRA_SDQS7# DDRB_SDQ30 BL35 AV3 DDRB_SDQS7#
DDRA_SDQ31 AT38 DDRB_SDQ31 BK37
DDRA_SDQ32 SA_DQ_31 DDRA_SMA0 DDRB_SDQ32 SB_DQ_31 DDRB_SMA0
AV13 SA_DQ_32 SA_MA_0 BJ19 BK13 SB_DQ_32 SB_MA_0 BC18
SYSTEM
DDRA_SDQ33 AT13 BD20 DDRA_SMA1 DDRB_SDQ33 BE11 BG28 DDRB_SMA1

SA_DQ_33 SA_MA_1 SB_DQ_33 SB_MA_1
SYSTEM
DDRA_SDQ34 AW11 BK27 DDRA_SMA2 DDRB_SDQ34 BK11 BG25 DDRB_SMA2
DDRA_SDQ35 SA_DQ_34 SA_MA_2 DDRA_SMA3 DDRB_SDQ35 SB_DQ_34 SB_MA_2 DDRB_SMA3
AV11 SA_DQ_35 SA_MA_3 BH28 BC11 SB_DQ_35 SB_MA_3 AW17
DDRA_SDQ36 AU15 BL24 DDRA_SMA4 DDRB_SDQ36 BC13 BF25 DDRB_SMA4
AT11 SA_DQ_37 SA_MA_5 BK28 BE12 SB_DQ_37 SB_MA_5 BE25
DDRA_SDQ38 BA13 BJ27 DDRA_SMA6 DDRB_SDQ38 BC12 BA29 DDRB_SMA6
BA11 SA_DQ_39 SA_MA_7 BJ25 BG12 SB_DQ_39 SB_MA_7 BC28
DDRA_SDQ40 BE10 BL28 DDRA_SMA8 DDRB_SDQ40 BJ10 AY28 DDRB_SMA8
BD10 SA_DQ_41 SA_MA_9 BA28 BL9 SB_DQ_41 SB_MA_9 BD37
DDRA_SDQ42 BD8 BC19 DDRA_SMA10 DDRB_SDQ42 BK5 BG17 DDRB_SMA10
AY9 SA_DQ_43 SA_MA_11 BE28 BL5 SB_DQ_43 SB_MA_11 BE37
DDRA_SDQ44 BG10 BG30 DDRA_SMA12 DDRB_SDQ44 BK9 BA39 DDRB_SMA12
AW9 SA_DQ_45 SA_MA_13 BJ16 BK10 SB_DQ_45 SB_MA_13 BG13
DDR
DDRA_SDQ46 BD7 DDRB_SDQ46 BJ8

SA_DQ_46 SB_DQ_46
DDR
DDRA_SDQ47 BB9 DDRB_SDQ47 BJ6 AV16
B SA_DQ_47 SB_DQ_47 SB_RAS# DDRB_SRAS# <15> B
DDRA_SDQ48 BB5 BE18 DDRB_SDQ48 BF4 AY18 SB_RCVEN# PAD
SA_DQ_48 SA_RAS# DDRA_SRAS# <14> SB_DQ_48 SB_RCVEN# T16
DDRA_SDQ49 AY7 AY20 SA_RCVEN# PAD DDRB_SDQ49 BH5
SA_DQ_49 SA_RCVEN# T15 SB_DQ_49
DDRA_SDQ50 AT5 DDRB_SDQ50 BG1 BC17
SA_DQ_50 SB_DQ_50 SB_WE# DDRB_SWE# <15>
DDRA_SDQ51 AT7 BA19 DDRB_SDQ51 BC2
SA_DQ_51 SA_WE# DDRA_SWE# <14> SB_DQ_51
DDRA_SDQ52 AY6 DDRB_SDQ52 BK3
BB7 SA_DQ_53 BE4 SB_DQ_53
DDRA_SDQ54 AR5 DDRB_SDQ54 BD3
AR8 SA_DQ_55 BJ2 SB_DQ_55
DDRA_SDQ56 AR9 DDRB_SDQ56 BA3
AN3 SA_DQ_57 BB3 SB_DQ_57
DDRA_SDQ58 AM8 DDRB_SDQ58 AR1
AN10 SA_DQ_59 AT3 SB_DQ_59
DDRA_SDQ60 AT9 DDRB_SDQ60 AY2
AN9 SA_DQ_61 AY3 SB_DQ_61
DDRA_SDQ62 AM9 DDRB_SDQ62 AU2
AN11 SA_DQ_63 AT2 SB_DQ_63
CRESTLINE_1p0 CRESTLINE_1p0
PM@ PM@
A A

Crestline (3/7)-DDRII
B 0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
U20C
CRB 2.37K_1% to GND LBKLT_EN

J40 L_BKLT_CTRL PEG_COMP
<18> GMCH_ENBKL H39 L_BKLT_EN PEG_COMPI N43 1 2 +VCCP
LCTLA_CLK E39 M43 20/25mils R154 24.9_0402_1%
LCTLB_DATA L_CTRL_CLK PEG_COMPO
E40 L_CTRL_DATA
<18> LVDS_SCL C37 L_DDC_CLK
D <18> LVDS_SDA D35 J51 PCIE_GTX_C_MRX_N0 D
L_DDC_DATA PEG_RX#_0 PCIE_GTX_C_MRX_N1 PCIE_MTX_C_GRX_N[0..15]
<18> GMCH_ENVDD K40 L_VDD_EN PEG_RX#_1 L51 PCIE_MTX_C_GRX_N[0..15] <17>
N47 PCIE_GTX_C_MRX_N2
LVDS_IBG PEG_RX#_2 PCIE_GTX_C_MRX_N3 PCIE_MTX_C_GRX_P[0..15]
1 2 L41 LVDS_IBG PEG_RX#_3 T45 PCIE_MTX_C_GRX_P[0..15] <17>
R150 2.4K_0402_1% L43 T50 PCIE_GTX_C_MRX_N4
LVDS_VBG PEG_RX#_4 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_N[0..15]
N41 LVDS_VREFH PEG_RX#_5 U40 PCIE_GTX_C_MRX_N[0..15] <17>
N40 Y44 PCIE_GTX_C_MRX_N6
LVDS_ACLK# LVDS_VREFL PEG_RX#_6 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P[0..15]
<18> LVDS_ACLK# D46 LVDSA_CLK# PEG_RX#_7 Y40 PCIE_GTX_C_MRX_P[0..15] <17>
LVDS_ACLK C45 AB51 PCIE_GTX_C_MRX_N8
<18> LVDS_ACLK LVDSA_CLK PEG_RX#_8
LVDS_BCLK# D44 W49 PCIE_GTX_C_MRX_N9
<18> LVDS_BCLK# LVDSB_CLK# PEG_RX#_9
LVDS_BCLK E42 AD44 PCIE_GTX_C_MRX_N10
<18> LVDS_BCLK LVDSB_CLK PEG_RX#_10
LVDS
AD40 PCIE_GTX_C_MRX_N11
LVDS_A0# PEG_RX#_11 PCIE_GTX_C_MRX_N12
<18> LVDS_A0# G51 LVDSA_DATA#_0 PEG_RX#_12 AG46
<18> LVDS_A1# LVDS_A1# E51 AH49 PCIE_GTX_C_MRX_N13
LVDS_A2# LVDSA_DATA#_1 PEG_RX#_13 PCIE_GTX_C_MRX_N14
<18> LVDS_A2# F49 LVDSA_DATA#_2 PEG_RX#_14 AG45
AG41 PCIE_GTX_C_MRX_N15
PEG_RX#_15
GRAPHICS
<18> LVDS_A0 LVDS_A0 G50 J50 PCIE_GTX_C_MRX_P0
LVDS_A1 LVDSA_DATA_0 PEG_RX_0 PCIE_GTX_C_MRX_P1
<18> LVDS_A1 E50 LVDSA_DATA_1 PEG_RX_1 L50
<18> LVDS_A2 LVDS_A2 F48 M47 PCIE_GTX_C_MRX_P2
LVDSA_DATA_2 PEG_RX_2 PCIE_GTX_C_MRX_P3
PEG_RX_3 U44
T49 PCIE_GTX_C_MRX_P4
LVDS_B0# PEG_RX_4 PCIE_GTX_C_MRX_P5
<18> LVDS_B0# G44 LVDSB_DATA#_0 PEG_RX_5 T41
<18> LVDS_B1# LVDS_B1# B47 W45 PCIE_GTX_C_MRX_P6
LVDS_B2# LVDSB_DATA#_1 PEG_RX_6 PCIE_GTX_C_MRX_P7
<18> LVDS_B2# B45 LVDSB_DATA#_2 PEG_RX_7 W41
AB50 PCIE_GTX_C_MRX_P8
PEG_RX_8 PCIE_GTX_C_MRX_P9
PEG_RX_9 Y48
<18> LVDS_B0 LVDS_B0 E44 AC45 PCIE_GTX_C_MRX_P10
LVDS_B1 LVDSB_DATA_0 PEG_RX_10 PCIE_GTX_C_MRX_P11
<18> LVDS_B1 A47 LVDSB_DATA_1 PEG_RX_11 AC41
C
<18> LVDS_B2 LVDS_B2 A45 AH47 PCIE_GTX_C_MRX_P12 C
LVDSB_DATA_2 PEG_RX_12 PCIE_GTX_C_MRX_P13
AG49
PCI-EXPRESS
PEG_RX_13 PCIE_GTX_C_MRX_P14
PEG_RX_14 AH45
AG42 PCIE_GTX_C_MRX_P15
PEG_RX_15
GMCH_TV_COMPS E27 N45 PCIE_MTX_GRX_N0 C124 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N0
GMCH_TV_LUMA TVA_DAC PEG_TX#_0 PCIE_MTX_GRX_N1 C396 1
G27 TVB_DAC PEG_TX#_1 U39 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N1
GMCH_TV_CRMA K27 U47 PCIE_MTX_GRX_N2 C130 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N2
TVC_DAC PEG_TX#_2
TV
N51 PCIE_MTX_GRX_N3 C400 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N3
PEG_TX#_3 PCIE_MTX_GRX_N4 C140 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N4
F27 TVA_RTN PEG_TX#_4 R50 1 2
2
J27 T42 PCIE_MTX_GRX_N5 C410 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N5

R147 R152 R140 R143 R148 R153 TVB_RTN PEG_TX#_5 PCIE_MTX_GRX_N6 C145
L27 TVC_RTN PEG_TX#_6 Y43 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N6
W46 PCIE_MTX_GRX_N7 C422 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N7
TV_DCONSEL_0 PEG_TX#_7 PCIE_MTX_GRX_N8 C153 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N8
M35 TV_DCONSEL_0 PEG_TX#_8 W38 1 2
150_0402_5% 150_0402_5% TV_DCONSEL_1 P33 AD39 PCIE_MTX_GRX_N9 C425 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N9
1
TV_DCONSEL_1 PEG_TX#_9 PCIE_MTX_GRX_N10 C157

PEG_TX#_10 AC46 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N10
150_0402_5% AC49 PCIE_MTX_GRX_N11 C430 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N11
PEG_TX#_11 PCIE_MTX_GRX_N12 C165 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N12
0_0402_5% 0_0402_5% 0_0402_5% PEG_TX#_12 AC42 1 2
PM@ PM@ PM@ AH39 PCIE_MTX_GRX_N13 C432 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N13
PEG_TX#_13 PCIE_MTX_GRX_N14 C171
PEG_TX#_14 AE49 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N14
AH44 PCIE_MTX_GRX_N15 C442 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N15
PEG_TX#_15
Change to 0Ohm when use PM chip PCIE_MTX_GRX_P0 C121
<19> GMCH_CRT_B H32 CRT_BLUE PEG_TX_0 M45 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P0
2 1 G32 T38 PCIE_MTX_GRX_P1 C394 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P1
R147 GM@ 150_0402_1% CRT_BLUE# PEG_TX_1 PCIE_MTX_GRX_P2 C126
<19> GMCH_CRT_G K29 CRT_GREEN PEG_TX_2 T46 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P2
2 1 J29 N50 PCIE_MTX_GRX_P3 C397 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P3
R152 GM@ 150_0402_1% CRT_GREEN# PEG_TX_3 PCIE_MTX_GRX_P4 C134
<19> GMCH_CRT_R F29 CRT_RED PEG_TX_4 R51 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P4
VGA
2 1 E29 U43 PCIE_MTX_GRX_P5 C402 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P5
R140 GM@ 150_0402_1% CRT_RED# PEG_TX_5 PCIE_MTX_GRX_P6 C143
PEG_TX_6 W42 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P6
B PCIE_MTX_GRX_P7 C417 1 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P7 B
PEG_TX_7 Y47 2
GMCH_CRT_CLK K33 Y39 PCIE_MTX_GRX_P8 C148 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P8
<19> GMCH_CRT_CLK CRT_DDC_CLK PEG_TX_8
<19> GMCH_CRT_DATA GMCH_CRT_DATA G35 AC38 PCIE_MTX_GRX_P9 C424 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P9
CRT_DDC_DATA PEG_TX_9 PCIE_MTX_GRX_P10 C154
<19> GMCH_CRT_HSYNC 1 2 F33 CRT_HSYNC PEG_TX_10 AD47 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P10
R85 GM@ 39_0402_1% CRT_IREF C32 AC50 PCIE_MTX_GRX_P11 C427 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P11
CRT_TVO_IREF PEG_TX_11 PCIE_MTX_GRX_P12 C163
<19> GMCH_CRT_VSYNC 1 2 E33 CRT_VSYNC PEG_TX_12 AD43 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P12
R88 GM@ 39_0402_1% AG39 PCIE_MTX_GRX_P13 C431 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P13
PEG_TX_13 PCIE_MTX_GRX_P14 C168 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P14
PEG_TX_14 AE50 1 2
2
AH43 PCIE_MTX_GRX_P15 C438 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P15

R86 R87 R110 PEG_TX_15
0_0402_5% 0_0402_5% 1.3K_0402_1%
CRB 2.2K , Follow! PM@ PM@ CRESTLINE_1p0
1
+3VS
PM@
R131 1 2 10K_0402_5% LCTLB_DATA
R130 1 2 10K_0402_5% LCTLA_CLK
R108 2.2K_0402_5% TV_DCONSEL_0
R109 2.2K_0402_5% TV_DCONSEL_1
A A

Crestline (4/7)-VGA/LVDS/TV
B 0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
U20G 9/18 modify from +1.05VS to +VCC_AXG

AT35 U20F
+VCCP VCC_1
AT34 VCC_2 VCC_AXG_NCTF_1 T17 +VCC_AXG
AH28 VCC_3 VCC_AXG_NCTF_2 T18 CRB 270uF , there is no 270u part. +VCCP AB33 VCC_NCTF_1
AC32 VCC_5 VCC_AXG_NCTF_3 T19 AB36 VCC_NCTF_2
AC31 VCC_4 VCC_AXG_NCTF_4 T21 9/19 change to 330u, 9/29 change to 220u AB37 VCC_NCTF_3
AK32 VCC_6 VCC_AXG_NCTF_5 T22 AC33 VCC_NCTF_4 VSS_NCTF_1 T27
AJ31 VCC_7 VCC_AXG_NCTF_6 T23 AC35 VCC_NCTF_5 VSS_NCTF_2 T37
AJ28 VCC_8 VCC_AXG_NCTF_7 T25 AC36 VCC_NCTF_6 VSS_NCTF_3 U24
AH32 VCC_9 VCC_AXG_NCTF_8 U15 AD35 VCC_NCTF_7 VSS_NCTF_4 U28
VCC CORE
AH31 VCC_10 VCC_AXG_NCTF_9 U16 AD36 VCC_NCTF_8 VSS_NCTF_5 V31
AH29 VCC_11 VCC_AXG_NCTF_10 U17
+VCCP VCC: 1573mA AF33 VCC_NCTF_9 VSS_NCTF_6 V35
D AF32 U19 AF36 AA19 D
VCC_12 VCC_AXG_NCTF_11
U20 (220UF*1, 22UF*1, 0.22UF*2, 0.1UF*1) AH33
VCC_NCTF_10 VSS_NCTF_7
AB17
VCC_AXG_NCTF_12 VCC_NCTF_11 VSS_NCTF_8
VSS NCTF
VCC_AXG_NCTF_13 U21 AH35 VCC_NCTF_12 VSS_NCTF_9 AB35
VCC_AXG_NCTF_14 U23 1 AH36 VCC_NCTF_13 VSS_NCTF_10 AD19
R30 VCC_13 VCC_AXG_NCTF_15 U26 1 1 AH37 VCC_NCTF_14 VSS_NCTF_11 AD37
V16 C408 + C118 C114 C122 C128 AJ33 AF17
VCC_AXG_NCTF_17 V17 AJ35 VCC_NCTF_16 VSS_NCTF_13 AF35
V19 220U_D2_4VMR15 0.22U_0603_16V7K 0.1U_0402_16V4Z AK33 AK17
VCC_AXG_NCTF_18 @ 2 2 2 VCC_NCTF_17 VSS_NCTF_14
VCC_AXG_NCTF_19 V20 AK35 VCC_NCTF_18 VSS_NCTF_15 AM17
V21 10U_0805_10V4Z 0.22U_0603_16V7K AK36 AM24
VCC_AXG_NCTF_21 V23 Follow DG 1.1 AK37 VCC_NCTF_20 VSS_NCTF_17 AP26
VCC_AXG_NCTF_22 V24 AD33 VCC_NCTF_21 VSS_NCTF_18 AP28
Replace 0 Ohm Y15 AJ36 AR15
POWER VCC_AXG_NCTF_23 VCC_NCTF_22 VSS_NCTF_19
VCC NCTF
VCC_AXG_NCTF_24 Y16 AM35 VCC_NCTF_23 VSS_NCTF_20 AR19
by directly Y17 VCC_SM: 3300mA AL33 AR28
VCC_AXG_NCTF_25 +1.8V VCC_NCTF_24 VSS_NCTF_21
connection +1.8V AU32 VCC_SM_1 VCC_AXG_NCTF_26 Y19
(330UF*1, 22UF*2, 0.1UF*1) 9/14 add for reservation AL35 VCC_NCTF_25
AU33 VCC_SM_2 VCC_AXG_NCTF_27 Y20 AA33 VCC_NCTF_26
AU35 VCC_SM_3 VCC_AXG_NCTF_28 Y21 AA35 VCC_NCTF_27
AV33 VCC_SM_4 VCC_AXG_NCTF_29 Y23 1 AA36 VCC_NCTF_28
AW33 Y24 C474 1 1 1 AP35
VCC_SM_5 VCC_AXG_NCTF_30 + C164 C177 C181 C156 C170 C183 VCC_NCTF_29
AW35 VCC_SM_6 VCC_AXG_NCTF_31 Y26 AP36 VCC_NCTF_30
AY35 VCC_SM_7 VCC_AXG_NCTF_32 Y28 AR35 VCC_NCTF_31
BA32 Y29 330U_D2E_2.5VM 10U_0805_10V4Z 1U_0603_10V4Z 1U_0603_10V4Z AR36
VCC_SM_8 VCC_AXG_NCTF_33 2 2 2 2 @ VCC_NCTF_32
BA33 VCC_SM_9 VCC_AXG_NCTF_34 AA16 Y32 VCC_NCTF_33
BA35 AA17 10U_0805_10V4Z 4.7U_0805_10V4Z @ 0.1U_0402_16V4Z Y33
BB33
BC32
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
AB16
AB19
Y35
Y36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
POWER
BC33 VCC_SM_13 VCC_AXG_NCTF_38 AC16 9/18 modify from +1.05VS to +VCC_AXG 9/18 Add for 965PM use Y37 VCC_NCTF_37 VSS_SCB1 A3
BC35 VCC_SM_14 VCC_AXG_NCTF_39 AC17 T30 VCC_NCTF_38 VSS_SCB2 B2
VCC SM
VSS SCB
C BD32 VCC_SM_15 VCC_AXG_NCTF_40 AC19
+VCC_AXG VCC_AXG: 7700mA T34 VCC_NCTF_39 VSS_SCB3 C1 C
BD35 AD15 T35 BL1
BE32
VCC_SM_16 VCC_AXG_NCTF_41
AD16 (330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2) U29
VCC_NCTF_40 VSS_SCB4
BL51
VCC_SM_17 VCC_AXG_NCTF_42 VCC_NCTF_41 VSS_SCB5
BE33 VCC_SM_18 VCC_AXG_NCTF_43 AD17 U31 VCC_NCTF_42 VSS_SCB6 A51
VCC GFX NCTF
BE35 VCC_SM_19 VCC_AXG_NCTF_44 AF16 1 1 U32 VCC_NCTF_43

BF33 AF19 C433 C434 C115 1 C112 1 C141 C136 C127 1 C119 1 U33
VCC_SM_20 VCC_AXG_NCTF_45 + + R159 VCC_NCTF_44
BF34 VCC_SM_21 VCC_AXG_NCTF_46 AH15 U35 VCC_NCTF_45
BG32 VCC_SM_22 VCC_AXG_NCTF_47 AH16 U36 VCC_NCTF_46
BG33 AH17 330U_D2E_2.5VM 10U_0805_10V4Z 1U_0603_10V4Z 0.1U_0402_16V4Z 0_0805_5% V32
VCC_SM_23 VCC_AXG_NCTF_48 GM@ 2 @2 GM@ 2 GM@ 2 GM@ GM@ GM@ 2 GM@ 2 PM@ VCC_NCTF_47
BG35 VCC_SM_24 VCC_AXG_NCTF_49 AH19 V33 VCC_NCTF_48
BH32 AJ16 330U_D2E_2.5VM 10U_0805_10V4Z 0.47U_0603_16V4Z 0.1U_0402_16V4Z V36
VCC_SM_25 VCC_AXG_NCTF_50 VCC_NCTF_49
BH34 VCC_SM_26 VCC_AXG_NCTF_51 AJ17 V37 VCC_NCTF_50
BH35 VCC_SM_27 VCC_AXG_NCTF_52 AJ19
BJ32 VCC_SM_28 VCC_AXG_NCTF_53 AK16 VCC_AXM_1 AT33 +VCCP
BJ33 VCC_SM_29 VCC_AXG_NCTF_54 AK19 VCC_AXM_2 AT31
VCC AXM
BJ34 VCC_SM_30 VCC_AXG_NCTF_55 AL16 VCC_AXM_3 AK29
BK32 VCC_SM_31 VCC_AXG_NCTF_56 AL17 VCC_AXM: 540mA VCC_AXM_4 AK24
BK33 AL19 AK23
BK34
VCC_SM_32 VCC_AXG_NCTF_57
AL20 (22UF*2, 0.22UF*2, 0.1UF*2) AL24
VCC_AXM_5
AJ26
VCC_SM_33 VCC_AXG_NCTF_58 +VCCP VCC_AXM_NCTF_1 VCC_AXM_6
BK35 VCC_SM_34 VCC_AXG_NCTF_59 AL21 +VCCP AL26 VCC_AXM_NCTF_2 VCC_AXM_7 AJ23
BL33 VCC_SM_35 VCC_AXG_NCTF_60 AL23 AL28 VCC_AXM_NCTF_3
AU30 VCC_SM_36 VCC_AXG_NCTF_61 AM15 1 1 1 1 AM26 VCC_AXM_NCTF_4
VCC AXM NCTF

AM16 C147 C139 C146 C138 C137 C150 AM28 9/29
VCC_AXG_NCTF_62 VCC_AXM_NCTF_5
VCC_AXG_NCTF_63 AM19 AM29 VCC_AXM_NCTF_6
AM20 22U_0805_6.3V6M 0.22U_0603_16V7K 0.1U_0402_16V4Z AM31 +1.05VS_AXM
VCC_AXG_NCTF_64 2 2 2 2 VCC_AXM_NCTF_7
VCC_AXG_NCTF_65 AM21 AM32 VCC_AXM_NCTF_8 change to
R20 AM23 0.22U_0603_16V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z AM33
+VCC_AXG VCC_AXG_1 VCC_AXG_NCTF_66 VCC_AXM_NCTF_9 +1.05VS
T14 VCC_AXG_2 VCC_AXG_NCTF_67 AP15 AP29 VCC_AXM_NCTF_10
W13 VCC_AXG_3 VCC_AXG_NCTF_68 AP16 AP31 VCC_AXM_NCTF_11
B B
W14 VCC_AXG_4 VCC_AXG_NCTF_69 AP17 AP32 VCC_AXM_NCTF_12
Y12 VCC_AXG_5 VCC_AXG_NCTF_70 AP19 AP33 VCC_AXM_NCTF_13
AA20 VCC_AXG_6 VCC_AXG_NCTF_71 AP20 9/29 +1.05VS_AXM change to +1.05VS AL29 VCC_AXM_NCTF_14
AA23 VCC_AXG_7 VCC_AXG_NCTF_72 AP21 AL31 VCC_AXM_NCTF_15
AA26 VCC_AXG_8 VCC_AXG_NCTF_73 AP23 AL32 VCC_AXM_NCTF_16
AA28 VCC_AXG_9 VCC_AXG_NCTF_74 AP24 AR31 VCC_AXM_NCTF_17
AB21 AR20 J6 AR32
VCC_AXG_10 VCC_AXG_NCTF_75 VCC_AXM_NCTF_18
AB24 VCC_AXG_11 VCC_AXG_NCTF_76 AR21 1 2 AR33 VCC_AXM_NCTF_19
AB29 VCC_AXG_12 VCC_AXG_NCTF_77 AR23
AC20 AR24 PAD-OPEN 3x3m
VCC_AXG_13 VCC_AXG_NCTF_78 +VCCP +VCC_AXG
VCC GFX
AC21 AR26 @
VCC_AXG_14 VCC_AXG_NCTF_79 J2
AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26
AC24 V28 1 2 CRESTLINE_1p0
VCC_AXG_16 VCC_AXG_NCTF_81 PM@
AC26 VCC_AXG_17 VCC_AXG_NCTF_82 V29
AC28 Y31 PAD-OPEN 3x3m 1005 This is for GM@
VCC_AXG_18 VCC_AXG_NCTF_83 @
AC29 VCC_AXG_19
AD20 VCC_AXG_20 Remember open stencil at GM@
AD23 VCC_AXG_21
AD24 AW45 VCCSM_LF1
VCC_AXG_22 VCC_SM_LF1 VCCSM_LF2
AD28 VCC_AXG_23 VCC_SM_LF2 BC39
VCC SM LF
AF21 BE39 VCCSM_LF3

AF26 VCC_AXG_25 VCC_SM_LF4 BD17
AA31 BD4 VCCSM_LF5
AH20 VCC_AXG_27 VCC_SM_LF6 AW8
AH21 AT6 VCCSM_LF7
VCC_AXG_28 VCC_SM_LF7
AH23 VCC_AXG_29 1 1
AH24 C152 C158 C172 C173 C175 C166 C159
VCC_AXG_30
AH26 VCC_AXG_31
AD31 0.1U_0402_16V4Z 0.22U_0603_16V7K 0.47U_0603_16V4Z 1U_0603_10V4Z
A VCC_AXG_32 2 2 A
AJ20 VCC_AXG_33
AN14 0.1U_0402_16V4Z 0.22U_0603_16V7K 1U_0603_10V4Z
VCC_AXG_34

CRESTLINE_1p0
PM@
Crestline (5/7)-VCC
9/18 modify from +1.05VS to +VCC_AXG B 0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
VCCA_HPLL: 50mA +1.25VS_HPLL

VCCA_DPLLA/B: 100mA +1.25VS_DPLLA
(22UF*1, 0.1UF*1) (470UF*1, 0.1UF*1)
+1.25VS L26 1 2 +1.25VS L20 1 2 1
MBK1608121YZF_0603 1 1 10U_FLC-453232-100K_0.25A_10% 1
C421 C418 C357 + C95
+VCCP
VTT: 850mA
10U_0805_10V4Z 0.1U_0402_16V4Z 220U_D2_4VMR15 0.1U_0402_16V4Z U20H
2 2 2 2 (220UF*1, 4.7UF*21, 2.2UF*1, 0.47UF*1)
+3VS_SYNC J32 VCCSYNC VTT_1 U13
VTT_2 U12 1
+3VS_CRTDAC A33 VCCA_CRT_DAC_1 VTT_3 U11
+1.25VS_MPLL C395 + C390 C389 C108 C111
D VCCA_MPLL:150mA VCCA_DPLLA/B: 100mA +1.25VS_DPLLB
B33 VCCA_CRT_DAC_2 VTT_4 U9 D
(10UF*1, 0.1UF*1) (470UF*1, 0.1UF*1) VTT_5 U8
CRT
U7 330U_D2E_2.5VM 4.7U_0805_10V4Z 0.47U_0603_16V4Z
L25 1 L22 1 VTT_6 2
2 2 1 +3VS_DACBG A30 VCCA_DAC_BG VTT_7 U5
MBK1608121YZF_0603 1 10U_FLC-453232-100K_0.25A_10% 1 U3 4.7U_0805_10V4Z 2.2U_0805_10V6K
R327 C403 C378 + C103 VTT_8
B32 VSSA_DAC_BG VTT_9 U2
VTT_10 U1
+1.25VS_AXD
VCC_AXD: 515mA
0.5_0603_1% 0.1U_0402_16V4Z 220U_D2_4VMR15 0.1U_0402_16V4Z T13
2 2 2 VTT_11 (22UF*1, 1UF*1)
VTT
+1.25VS_DPLLA B49 VCCA_DPLLA VTT_12 T11
VTT_13 T10 +1.25VS
1 +1.25VS_DPLLB H49 T9 R188 0_0603_5%
C404 VCCA_DPLLB VTT_14
VTT_15 T7 1
PLL
+1.25VS_HPLL AL2 T6 C155 C179
10U_0805_10V4Z VCCA_HPLL VTT_16
+1.8V_TX_LVDS VTT_17 T5
2 1U_0603_10V4Z 22U_0805_6.3V6M
1 +1.25VS_MPLL AM2 VCCA_MPLL VTT_18 T3
C90 2
VTT_19 T2
VCCA_LVDS: 10mA R3
VTT_20
A LVDS
1000P_0402_50V7K (0.1UF*1) A41 R2
GM@ 2 VCCA_LVDS VTT_21
+3VS VTT_22 R1
+1.25VS_AXF
VCC_AXF: 495mA
1 B41 VSSA_LVDS (10UF*1, 1UF*1)
C106
VCCA_PEG_BG: 5mA VCC_AXD_1 AT23 +1.25VS
0.1U_0402_16V4Z AU28 R273 0_0603_5%
2 (0.1UF*1) K50
VCC_AXD_2
AU24
VCCA_PEG_BG VCC_AXD_3 1
AXD
AT29 C343 C346
VCC_AXD_4
K49 VSSA_PEG_BG VCC_AXD_5 AT25
A PEG
+1.25VS L24 1 2 +1.25VS_A_PEGPLL AT30 10U_0805_10V4Z 1U_0603_10V4Z
MBK1608121YZF_0603 VCC_AXD_6 2
1
2 1 C385 U51 AR29
C387 R302 1_0603_5% VCCA_PEG_PLL VCC_AXD_NCTF
C VCCA_PEG_PLL: 100mA C
10U_0805_10V4Z 0.1U_0402_16V4Z +1.25VS VCC_DMI: 100mA (0.1UF*1)
2 (0.1UF*1) AW18 B23
VCCA_SM_1 VCC_AXF_1 1
+1.25VS_A_SM VCCA_SM: 640mA AV19 B21 C133
VCCA_SM_2
POWER VCC_AXF_2
AXF
(22UF*21, 4.7UF*1, 1UF*1) AU19 VCCA_SM_3 VCC_AXF_3 A21
+1.25VS 1 2 AU18 0.1U_0402_16V4Z
+3VS_SYNC R189 0_0805_5% 1 VCCA_SM_4 2 +1.8V_SM_CK
1 AU17 VCCA_SM_5 VCC_DMI AJ50 VCC_SM_CK: 200mA (22UF*1, 0.1UF*1)
VCC_SYNC: 10mA (0.1UF*1) C182 C180 C187 C162
A SM
+3VS 1 2 AT22 VCCA_SM_7 1 2 +1.8V
R119 0_0603_5% 22U_0805_6.3V6M 4.7U_0805_10V4Z AT21 BK24 L34
2 2 VCCA_SM_8 VCC_SM_CK_1
SM CK
GM@ 1 @ AT19 BK23 1 1 MBK1608121YZF_0603
C102 R136 22U_0805_6.3V6M 1U_0603_10V4Z VCCA_SM_9 VCC_SM_CK_2 C466 C463
AT18 VCCA_SM_10 VCC_SM_CK_3 BJ24
GM@ AT17 BJ23 1 2
0.1U_0402_16V4Z 0_0402_5% +1.25VS_A_SM_CK VCCA_SM_11 VCC_SM_CK_4 22U_0805_6.3V6M R396 C472
2 VCCA_SM_CK: 35mA AR17 VCCA_SM_NCTF_1 2 2
PM@ AR16 +1.8V_TX_LVDS: 100mA 1_0603_5% 10U_0805_10V4Z
(22UF*1, 1UF*2, 0.1UF*1) VCCA_SM_NCTF_2 +1.8V_TX_LVDS 0.1U_0402_16V4Z
+1.25VS (220UF*1, 1000PF*1)
R190 0_0603_5% 1 1 A43
VCC_TX_LVDS
A CK
C188 C178 C186 C167 BC29 L12 1 2 +1.8V
VCCA_SM_CK_1 MBK1608121YZF_0603
BB29 VCCA_SM_CK_2 VCC_HV: 100mA 1
22U_0805_6.3V6M 1U_0603_10V4Z C40 +3VS 1 GM@
2 2 VCC_HV_1
VCCA_CRT_DAC: 80mA (0.1UF*1, 0.022UF*1)+3VS_CRTDAC @ @ C25 VCCA_TVA_DAC_1 VCC_HV_2 B40 C336 + C353 R105
HV
1U_0603_10V4Z 0.1U_0402_16V4Z B25 0_0402_5%
L9 1 VCCA_TVA_DAC_2 220U_D2_4VMR15 PM@
+3VS 2 C27 VCCA_TVB_DAC_1 2 GM@ 2
0.022U_0402_16V7K
MBK1608121YZF_0603 B27 AD51 GM@

VCCA_TVB_DAC_2 VCC_PEG_1
TV
GM@ 1 +3VS_A_TVDAC B28 W50 1000P_0402_50V7K
VCCA_TVC_DAC_1 VCC_PEG_2
PEG
R89 C352 C351 R89 A28 W51
GM@ GM@ VCCA_TVC_DAC_2 VCC_PEG_3 +VCCP_PEG
VCCD_TVDAC / CRT: each 60mA (0.1UF*1, 0.022UF*1) VCC_PEG_4 V49
0.1U_0402_16V4Z 0_0805_5% +1.5VS_TVDAC R115 0_0402_5% V50 +1.05VS_PEG: 1260mA (220UF*1, 10UF*1)
2 VCC_PEG_5
D TV/CRT
PM@ 1 VCCD_CRT M32 1 2 +VCCP
B C105 C93 VCCD_CRT R162 0_0805_5% B
GM@ L29 VCCD_TVDAC 1
R118 +1.5VS_TVDAC AH50 1
VCC_RXR_DMI_1
DMI
22u_0805 0.1U_0402_16V4Z 0_0402_5% N28 AH51 C393 + C120
GM@ 2 0.022U_0402_16V7K PM@ VCCD_QDAC VCC_RXR_DMI_2
+3VS_DACBG +1.5VS_QDAC
VCCA_DAC_BG: 5mA (0.1UF*1, 0.022UF*1) AN2 220U_D2_4VMR15
VCCD_HPLL VTTLF_CAP1 2 2
VTTLF1 A7
VTTLF
+3VS L13 1 2 VCCD_HPLL: 250mA (0.1UF*1) U48 F2 VTTLF_CAP2 10U_0805_10V4Z
VCCD_PEG_PLL VTTLF2
0.022U_0402_16V7K
MBK1608121YZF_0603 +1.25VS AH1 VTTLF_CAP3

GM@ VTTLF3
1 1 J41 VCCD_LVDS_1
LVDS
R106 C350 C88 R106 C149 +1.25VS_A_PEGPLL H42 +1.05VS_DMI: 100mA (220UF*1, 10UF*1)
VCCD_LVDS_2
1
0.1U_0402_16V4Z 0_0805_5% 0.1U_0402_16V4Z C113 +VCCP_PEG
GM@ 2 GM@ PM@ VCCA_PEG_PLL: 100mA 2
0.1U_0402_16V4Z CRESTLINE_1p0 C398 C371 C347 1
(0.1UF*1) 2 PM@ C129
22u_0805 0.47U_0603_16V4Z 0.47U_0603_16V4Z
GM@ +1.8V +1.8V_LVDS 10U_0805_10V4Z
+3VS_A_TVDAC R120 0_0402_5% 0.47U_0603_16V4Z 2
VCCA_TV_DAC: 40mA each DAC (0.1UF*1, 0.022UF*1 for each DAC) GM@ 1
+3VS L19 1 2 C89 C96 R129
MBK1608121YZF_0603
GM@ 10U_0805_10V4Z 0_0402_5% +3VS
1 1 1 1 2
C335 C348 C349 C344 C345 C337 C338 R134 @ GM@ PM@
GM@ GM@ GM@ 1U_0603_10V4Z D9 1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0_0402_5% +VCCP 2 1 1 2 +3VS C98
2
22U_0805_10V4Z 2 2 2 PM@ R156 10_0603_5%
GM@ 0.022U_0402_16V7K 0.022U_0402_16V7K 0.022U_0402_16V7K VCCD_LVDS: 150mA RB751V-40TE17_SOD323-2 0.1U_0402_16V4Z
GM@ GM@ GM@ 2
(10UF*1, 0.1UF*1)
A A
+1.5VS_TVDAC +1.5VS_QDAC
VCCD_QDAC: 5mA
L11 1 L14 1 (0.1UF*1, 0.022UF*1) Close to VCC_HV (pin C40/B40)
+1.5VS 2 +1.5VS 2
MBK1608121YZF_0603 MBK1608121YZF_0603 1
R127 GM@ C110 C109
C87
1
R127 Security Classification Compal Secret Data Compal Electronics, Inc.
0.1U_0402_16V4Z 0.022U_0402_16V7K PM@ 2006/08/18 2007/8/18 Title
22U_0805_10V4Z GM@ 2 GM@ 0_0805_5%
Issued Date Deciphered Date
PM@ 2
Crestline (6/7)-VCC
22u_0805 B 0.2
GM@
LA-3691P
5 4 3 2 1
5 4 3 2 1
U20I
U20J
A13 VSS_1 VSS_100 AW24 C46 VSS_199 VSS_287 W11
A24 VSS_4 VSS_103 AW5 D13 VSS_202 VSS_290 W47
AA21 VSS_5 VSS_104 AW7 D24 VSS_203 VSS_291 W5
AA24 VSS_6 VSS_105 AY10 D3 VSS_204 VSS_292 W7
AA29 VSS_7 VSS_106 AY24 D32 VSS_205 VSS_293 Y13
AB20 VSS_8 VSS_107 AY37 D39 VSS_206 VSS_294 Y2
D AB28 VSS_11 VSS_110 AY45 E10 VSS_209 VSS_297 Y49 D
AB31 VSS_12 VSS_111 AY47 E16 VSS_210 VSS_298 Y5
AC10 VSS_13 VSS_112 AY50 E24 VSS_211 VSS_299 Y50
AC13 VSS_14 VSS_113 B10 E28 VSS_212 VSS_300 Y11
AC3 VSS_15 VSS_114 B20 E32 VSS_213 VSS_301 P29
AC39 VSS_16 VSS_115 B24 E47 VSS_214 VSS_302 T29
AC43 VSS_17 VSS_116 B29 F19 VSS_215 VSS_303 T31
AC47 VSS_18 VSS_117 B30 F36 VSS_216 VSS_304 T33
AD1 VSS_19 VSS_118 B35 F4 VSS_217 VSS_305 R28
AD21 VSS_20 VSS_119 B38 F40 VSS_218
AD26 VSS_21 VSS_120 B43 F50 VSS_219
AD29 VSS_22 VSS_121 B46 G1 VSS_220
AD3 VSS_23 VSS_122 B5 G13 VSS_221 VSS_306 AA32
AD41 VSS_24 VSS_123 B8 G16 VSS_222 VSS_307 AB32
AD45 VSS_25 VSS_124 BA1 G19 VSS_223 VSS_308 AD32
AD49 VSS_26 VSS_125 BA17 G24 VSS_224 VSS_309 AF28
AD5 VSS_27 VSS_126 BA18 G28 VSS_225 VSS_310 AF29
AD50 VSS_28 VSS_127 BA2 G29 VSS_226 VSS_311 AT27
AD8 VSS_29 VSS_128 BA24 G33 VSS_227 VSS_312 AV25
AE10 VSS_30 VSS_129 BB12 G42 VSS_228 VSS_313 H50
AE14 VSS_31 VSS_130 BB25 G45 VSS_229
AE6 VSS_32 VSS_131 BB40 G48 VSS_230
AF20 BB44 G8
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
H24
H28
VSS_231
VSS_232
VSS_233
AF31 VSS_36 VSS_135 BC16 H4 VSS_234
AG2 VSS_37 VSS_136 BC24 H45 VSS_235
AG38 VSS_38 VSS_137 BC25 J11 VSS_236
AG43 VSS_39 VSS_138 BC36 J16 VSS_237
C AG47 BC40 J2 C
VSS_40 VSS_139 VSS_238
AG50 VSS_41 VSS_140 BC51 J24 VSS_239
AH3 VSS_42 VSS_141 BD13 J28 VSS_240
AH40 BD2 J33
AH41
AH7
VSS_43
VSS_44
VSS_45
VSS_142
VSS_143
VSS_144
BD28
BD45
J35
J39
VSS_241
VSS_242
VSS_243
VSS
AH9 VSS_46 VSS_145 BD48
AJ11 VSS_47 VSS_146 BD5 K12 VSS_245
AJ13 VSS_48 VSS_147 BE1 K47 VSS_246
AJ21 VSS_49 VSS_148 BE19 K8 VSS_247
AJ24 VSS_50 VSS_149 BE23 L1 VSS_248
AJ29 VSS_51 VSS_150 BE30 L17 VSS_249
AJ32 VSS_52 VSS_151 BE42 L20 VSS_250
AJ43 VSS_53 VSS_152 BE51 L24 VSS_251
AJ45 VSS_54 VSS_153 BE8 L28 VSS_252
AJ49 VSS_55 VSS_154 BF12 L3 VSS_253
AK20 VSS_56 VSS_155 BF16 L33 VSS_254
AK21 VSS_57 VSS_156 BF36 L49 VSS_255
AK26 VSS_58 VSS_157 BG19 M28 VSS_256
AK28 VSS_59 VSS_158 BG2 M42 VSS_257
AK31 VSS_60 VSS_159 BG24 M46 VSS_258
AK51 VSS_61 VSS_160 BG29 M49 VSS_259
AL1 VSS_62 VSS_161 BG39 M5 VSS_260
AM11 VSS_63 VSS_162 BG48 M50 VSS_261
AM13 VSS_64 VSS_163 BG5 M9 VSS_262
AM3 VSS_65 VSS_164 BG51 N11 VSS_263
AM4 VSS_66 VSS_165 BH17 N14 VSS_264
AM41 VSS_67 VSS_166 BH30 N17 VSS_265
AM45 VSS_68 VSS_167 BH44 N29 VSS_266
B B
AN1 VSS_69 VSS_168 BH46 N32 VSS_267
AN38 VSS_70 VSS_169 BH8 N36 VSS_268
AN39 VSS_71 VSS_170 BJ11 N39 VSS_269
AN43 VSS_72 VSS_171 BJ13 N44 VSS_270
AN5 VSS_73 VSS_172 BJ38 N49 VSS_271
AN7 VSS_74 VSS_173 BJ4 N7 VSS_272
AP4 VSS_75 VSS_174 BJ42 P19 VSS_273
AP48 VSS_76 VSS_175 BJ46 P2 VSS_274
AP50 VSS_77 VSS_176 BK15 P23 VSS_275
AR11 VSS_78 VSS_177 BK17 P3 VSS_276
AR2 VSS_79 VSS_178 BK25 P50 VSS_277
AR39 VSS_80 VSS_179 BK29 R49 VSS_278
AR44 VSS_81 VSS_180 BK36 T39 VSS_279
AR47 VSS_82 VSS_181 BK40 T43 VSS_280
AR7 VSS_83 VSS_182 BK44 T47 VSS_281
AT10 VSS_84 VSS_183 BK6 U41 VSS_282
AT14 VSS_85 VSS_184 BK8 U45 VSS_283
AT41 VSS_86 VSS_185 BL11 U50 VSS_284
AT49 VSS_87 VSS_186 BL13 V2 VSS_285
AU1 VSS_88 VSS_187 BL19 V3 VSS_286
AU23 VSS_89 VSS_188 BL22
AU29 VSS_90 VSS_189 BL37
AU3 BL47 CRESTLINE_1p0
VSS_91 VSS_190 PM@
AU36 VSS_92 VSS_191 C12
AU49 VSS_93 VSS_192 C16
AU51 VSS_94 VSS_193 C19
AV39 VSS_95 VSS_194 C28
AV48 VSS_96 VSS_195 C29
A AW1 VSS_97 VSS_196 C33 A
AW12 VSS_98 VSS_197 C36
AW16 VSS_99 VSS_198 C41
CRESTLINE_1p0
PM@
Crestline (7/7)-GND
B 0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
+1.8V +1.8V
JP25
9/25 Change DIMM0 to SP070004Z00 (HBL50) +1.8V
+DIMM_VREF 1 VREF VSS 2
3 4 DDRA_SDQ4
VSS DQ4
1
DDRA_SDQ0 5 6 DDRA_SDQ5
DDRA_SDQ1 DQ0 DQ5 R195
7 DQ1 VSS 8
9 10 DDRA_SDM0 +DIMM_VREF
DDRA_SDQS0# VSS DM0 1K_0402_1%
<9> DDRA_SDQS0# DDRA_SDQS0
11 DQS0# VSS 12
DDRA_SDQ6
20mils
13 14
2
<9> DDRA_SDQS0 DQS0 DQ6 DDRA_SDQ7
15 VSS DQ7 16 +DIMM_VREF
DDRA_SDQ2 17 18 1 1
DQ2 VSS
1
DDRA_SDQ3 19 20 DDRA_SDQ12 C224 C225 1
D DQ3 DQ12 DDRA_SDQ13 R198 C221 D
21 VSS DQ13 22
DDRA_SDQ8 23 24 0.1U_0402_16V4Z 2.2U_0805_10V6K
DDRA_SDQ9 DQ8 VSS DDRA_SDM1 2 2 1K_0402_1% 220P_0402_50V7K
25 DQ9 DM1 26
2 @
27 28
2
DDRA_SDQS1# VSS VSS
<9> DDRA_SDQS1# 29 DQS1# CK0 30 DDRA_CLK0 <8>
DDRA_SDQS1 31 32
<9> DDRA_SDQS1 DQS1 CK0# DDRA_CLK0# <8>
33 VSS VSS 34
DDRA_SDQ11 DQ10 DQ14 DDRA_SDQ15
37 DQ11 DQ15 38
39 VSS VSS 40
41 VSS VSS 42
45 DQ17 DQ21 46
47 VSS VSS 48
DDRA_SDQS2# 49 50 R207 1 2 0_0402_5%
<9> DDRA_SDQS2# DQS2# NC PM_EXTTS#0 <8> DDRA_SMA[0..13]
DDRA_SDQS2 51 52 DDRA_SDM2 <9> DDRA_SMA[0..13] Layout Note:
<9> DDRA_SDQS2 DQS2 DM2
53 VSS VSS 54
DDRA_SDQ18 55 56 DDRA_SDQ22 DDRA_SDQ[0..63] Place near JP35
DDRA_SDQ19 DQ18 DQ22 DDRA_SDQ23 <9> DDRA_SDQ[0..63]
57 DQ19 DQ23 58
59 60 DDRA_SDM[0..7] +1.8V
VSS VSS <9> DDRA_SDM[0..7]
63 DQ25 DQ29 64
65 VSS VSS 66
DDRA_SDM3 67 68 DDRA_SDQS3# 1 1 1 1 1
EC_TX_P80_DATA DM3 DQS3# DDRA_SDQS3 DDRA_SDQS3# <9> C232 C245 C233 C242 C246
<15,32,34> EC_TX_P80_DATA 69 NC DQS3 70 DDRA_SDQS3 <9>
71 VSS VSS 72
DDRA_SDQ26 73 74 DDRA_SDQ30 2.2U_0805_10V6K 2.2U_0805_10V6K 2.2U_0805_10V6K 2.2U_0805_10V6K 2.2U_0805_10V6K
DDRA_SDQ27 DQ26 DQ30 DDRA_SDQ31 2 2 2 2 2
75 DQ27 DQ31 76
77 78 +0.9VS
DDRA_CKE0 VSS VSS DDRA_CKE1
<8> DDRA_CKE0 79 CKE0 NC/CKE1 80 DDRA_CKE1 <8>
C DDRA_CKE0 C
81 VDD VDD 82 1 4
EC_RX_P80_CLK 83 84 DDRA_SBS2 2 3
<15,32,34> EC_RX_P80_CLK NC NC/A15
DDRA_SBS2 85 86 DDRA_SMA14 RP14 56_0404_4P2R_5%
<9> DDRA_SBS2 BA2 NC/A14 +1.8V
87 VDD VDD 88
DDRA_SMA12 89 90 DDRA_SMA11 DDRA_SMA12 1 4
DDRA_SMA9 A12 A11 DDRA_SMA7 DDRA_SMA9
91 A9 A7 92 2 3
DDRA_SMA8 93 94 DDRA_SMA6 RP15 56_0404_4P2R_5%
A8 A6
95 VDD VDD 96 1 1 1 1
DDRA_SMA5 97 98 DDRA_SMA4 DDRA_SMA8 1 4 C243 C244 C230 C231
DDRA_SMA3 A5 A4 DDRA_SMA2 DDRA_SMA5
99 A3 A2 100 2 3
DDRA_SMA1 101 102 DDRA_SMA0 RP16 56_0404_4P2R_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
A1 A0 2 2 2 2
103 VDD VDD 104
DDRA_SMA10 105 106 DDRA_SBS1 DDRA_SMA3 1 4
A10/AP BA1 DDRA_SBS1 <9>
DDRA_SBS0 107 108 DDRA_SRAS# DDRA_SMA1 2 3
<9> DDRA_SBS0 BA0 RAS# DDRA_SRAS# <9>
DDRA_SWE# 109 110 DDRA_SCS0# RP17 56_0404_4P2R_5%
<9> DDRA_SWE# WE# S0# DDRA_SCS0# <8>
111 VDD VDD 112
DDRA_SCAS# 113 114 DDRA_ODT0 DDRA_SMA10 1 4
<9> DDRA_SCAS# CAS# ODT0 DDRA_ODT0 <8>
DDRA_SCS1# 115 116 DDRA_SMA13 DDRA_SBS0 2 3
<8> DDRA_SCS1# NC/S1# NC/A13
117 118 RP18 56_0404_4P2R_5%
DDRA_ODT1 VDD VDD +0.9VS
<8> DDRA_ODT1 119 NC/ODT1 NC 120
121 122 DDRA_SWE# 1 4
DDRA_SDQ32 VSS VSS DDRA_SDQ36 DDRA_SCAS#
123 DQ32 DQ36 124 2 3
DDRA_SDQ33 125 126 DDRA_SDQ37 RP19 56_0404_4P2R_5%
DQ33 DQ37
127 VSS VSS 128 1 1 1 1 1
DDRA_SDQS4# 129 130 DDRA_SDM4 DDRA_SCS1# 1 4 C235 C236 C237 C238 C239
<9> DDRA_SDQS4# DDRA_SDQS4 DQS4# DM4 DDRA_ODT1
<9> DDRA_SDQS4 131 DQS4 VSS 132 2 3
133 134 DDRA_SDQ38 RP20 56_0404_4P2R_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRA_SDQ34 VSS DQ38 DDRA_SDQ39 2 2 2 2 2
135 DQ34 DQ39 136
DDRA_SDQ35 137 138
DQ35 VSS DDRA_SDQ44
139 VSS DQ44 140
DDRA_SDQ40 141 142 DDRA_SDQ45 DDRA_SMA11 1 4
DDRA_SDQ41 DQ40 DQ45 DDRA_SMA14
143 DQ41 VSS 144 <8> DDRA_SMA14 2 3
B
145 146 DDRA_SDQS5# RP21 56_0404_4P2R_5% +0.9VS B
DDRA_SDM5 VSS DQS5# DDRA_SDQS5 DDRA_SDQS5# <9>
147 DM5 DQS5 148 DDRA_SDQS5 <9>
149 150 95.10.5 modify DDRA_SMA6 1 4
DDRA_SDQ42 VSS VSS DDRA_SDQ46 DDRA_SMA7
151 DQ42 DQ46 152 2 3
DDRA_SDQ43 153 154 DDRA_SDQ47 RP22 56_0404_4P2R_5% 1 1 1 1 1
DQ43 DQ47 C240 C241 C250 C251 C252
155 VSS VSS 156
DDRA_SDQ48 157 158 DDRA_SDQ52 DDRA_SMA2 1 4
DDRA_SDQ49 DQ48 DQ52 DDRA_SDQ53 DDRA_SMA4 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
159 DQ49 DQ53 160 2 3
EC_RX_P80_CLK R201 1 2 2 2 2 2
2 0_0402_5% 161 VSS VSS 162 RP23 56_0404_4P2R_5%
EC_RX_P80_CLK_R 163 164
<15> EC_RX_P80_CLK_R NC,TEST CK1 DDRA_CLK1 <8>
165 166 DDRA_SBS1 1 4
VSS CK1# DDRA_CLK1# <8>
DDRA_SDQS6# 167 168 DDRA_SMA0 2 3
<9> DDRA_SDQS6# DDRA_SDQS6 DQS6# VSS DDRA_SDM6 RP24 56_0404_4P2R_5%
<9> DDRA_SDQS6 169 DQS6 DM6 170
171 172 +0.9VS
DDRA_SDQ50 VSS VSS DDRA_SDQ54 DDRA_SCS0#
173 DQ50 DQ54 174 1 4
DDRA_SDQ51 175 176 DDRA_SDQ55 DDRA_SRAS# 2 3
DQ51 DQ55 RP25 56_0404_4P2R_5%
177 VSS VSS 178
DDRA_SDQ56 179 180 DDRA_SDQ60 1 1 1
DDRA_SDQ57 DQ56 DQ60 DDRA_SDQ61 DDRA_SMA13 C253 C254 C255
181 DQ57 DQ61 182 1 4
183 184 DDRA_ODT0 2 3
DDRA_SDM7 VSS VSS DDRA_SDQS7# RP26 56_0404_4P2R_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
185 DM7 DQS7# 186 DDRA_SDQS7# <9>
DDRA_SDQS7 2 2 2
187 VSS DQS7 188 DDRA_SDQS7 <9>
DDRA_SDQ58 189 190 DDRA_CKE1 1 2
DDRA_SDQ59 DQ58 VSS DDRA_SDQ62 R208 56_0402_5%
191 DQ59 DQ62 192
193 194 DDRA_SDQ63
D_CK_SDATA VSS DQ63
<15,16,24,25> D_CK_SDATA 195 SDA VSS 196
D_CK_SCLK 197 198 R204 1 2 10K_0402_5%
<15,16,24,25> D_CK_SCLK SCL SA0
+3VS 199 200 R205 1 2 10K_0402_5%
VDDSPD SA1
Layout Note:
TYCO_292526-4 Layout Note: Place one cap close to every 2 pullup
A +3VS
ME@ Pla ce these resistor resistors terminated to +0.9VS A
Change PCB Footprint closely JP35,all
trace length Max=1.5"
1 1
DIMM0 STD H:5.2mm (BOT)
C234 C228
0.1U_0402_16V4Z
2
2.2U_0805_10V6K 2 Security Classification Compal Secret Data Compal Electronics, Inc.
DDRII-SODIMM0
B 0.2
LA-3691P
5 4 3 2 1
A B C D E
9/25 Change DIMM1 to SP070006F00

+1.8V +1.8V
+DIMM_VREF
JP23
+DIMM_VREF 1 VREF VSS 2
3 4 DDRB_SDQ4
DDRB_SDQ0 VSS DQ4 DDRB_SDQ5 DDRB_SMA[0..13]
5 DQ0 DQ5 6 <9> DDRB_SMA[0..13] 1 1
DDRB_SDQ1 7 8 C199 C200
DQ1 VSS DDRB_SDM0 DDRB_SDQ[0..63]
9 VSS DM0 10 <9> DDRB_SDQ[0..63]
DDRB_SDQS0# 11 12 2.2U_0805_10V6K
1 <9> DDRB_SDQS0# DDRB_SDQS0 DQS0# VSS DDRB_SDQ6 DDRB_SDM[0..7] 2 2
0.1U_0402_16V4Z 1
<9> DDRB_SDQS0 13 DQS0 DQ6 14 <9> DDRB_SDM[0..7]
15 16 DDRB_SDQ7
DDRB_SDQ2 VSS DQ7
17 DQ2 VSS 18
DDRB_SDQ3 19 20 DDRB_SDQ12
DQ3 DQ12 DDRB_SDQ13
21 VSS DQ13 22
DDRB_SDQ8 23 24
DDRB_SDQ9 DQ8 VSS DDRB_SDM1
25 DQ9 DM1 26
27 VSS VSS 28
DDRB_SDQS1# 29 30
<9> DDRB_SDQS1# DQS1# CK0 DDRB_CLK0 <8>
DDRB_SDQS1 31 32 DDRB_CLK0?
<9> DDRB_SDQS1 DQS1 CK0# DDRB_CLK0# <8>
33 VSS VSS 34
DDRB_SDQ11 DQ10 DQ14 DDRB_SDQ15
37 DQ11 DQ15 38
39 VSS VSS 40
41 VSS VSS 42
45 DQ17 DQ21 46
0_0402_5%
Layout Note:
47 VSS VSS 48
DDRB_SDQS2# 49 50 R199 1 2 PM_EXTTS#1 <8>
Place near JP34
<9> DDRB_SDQS2# DDRB_SDQS2 DQS2# NC DDRB_SDM2
<9> DDRB_SDQS2 51 DQS2 DM2 52
53 VSS VSS 54
DDRB_SDQ19 DQ18 DQ22 DDRB_SDQ23 +1.8V
57 DQ19 DQ23 58
59 VSS VSS 60
63 DQ25 DQ29 64
65 VSS VSS 66 1 1 1 1 1
DDRB_SDM3 67 68 DDRB_SDQS3# C483 C487 C219 C220 C216
EC_TX_P80_DATA DM3 DQS3# DDRB_SDQS3 DDRB_SDQS3# <9>
<14,32,34> EC_TX_P80_DATA 69 NC DQS3 70 DDRB_SDQS3 <9>
71 72 2.2U_0805_10V6K 2.2U_0805_10V6K 2.2U_0805_10V6K
2 DDRB_SDQ26 VSS VSS DDRB_SDQ30 +0.9VS 2 2
2.2U_0805_10V6K 2 2
2.2U_0805_10V6K 2 2
73 DQ26 DQ30 74
DQ27 DQ31
77 VSS VSS 78
DDRB_CKE0 79 80 DDRB_CKE1 DDRB_CKE0 1 4
<8> DDRB_CKE0 CKE0 NC/CKE1 DDRB_CKE1 <8>
81 82 DDRB_SBS2 2 3
EC_RX_P80_CLK VDD VDD RP1 56_0404_4P2R_5% +1.8V
<14,32,34> EC_RX_P80_CLK 83 NC NC/A15 84
DDRB_SBS2 85 86 DDRB_SMA14
<9> DDRB_SBS2 BA2 NC/A14 DDRB_SMA14 <8>
87 88 DDRB_SMA12 1 4
DDRB_SMA12 VDD VDD DDRB_SMA11 DDRB_SMA9
89 A12 A11 90 2 3
DDRB_SMA9 91 92 DDRB_SMA7 RP2 56_0404_4P2R_5% 1 1 1 1
DDRB_SMA8 A9 A7 DDRB_SMA6 C218 C217 C482 C479
93 A8 A6 94
95 96 DDRB_SMA8 1 4
DDRB_SMA5 VDD VDD DDRB_SMA4 DDRB_SMA5 0.1U_0402_16V4Z 0.1U_0402_16V4Z
97 A5 A4 98 2 3
DDRB_SMA3 DDRB_SMA2 RP3 56_0404_4P2R_5% 2
0.1U_0402_16V4Z 2 2
0.1U_0402_16V4Z 2
99 A3 A2 100
DDRB_SMA1 101 102 DDRB_SMA0
A1 A0 DDRB_SMA3
103 VDD VDD 104 1 4
DDRB_SMA10 105 106 DDRB_SBS1 DDRB_SMA1 2 3
A10/AP BA1 DDRB_SBS1 <9>
DDRB_SBS0 107 108 DDRB_SRAS# RP4 56_0404_4P2R_5%
<9> DDRB_SBS0 BA0 RAS# DDRB_SRAS# <9>
DDRB_SWE# 109 110 DDRB_SCS0#
<9> DDRB_SWE# WE# S0# DDRB_SCS0# <8>
111 112 DDRB_SMA10 1 4
DDRB_SCAS# VDD VDD DDRB_ODT0 DDRB_SBS0
<9> DDRB_SCAS# 113 CAS# ODT0 114 DDRB_ODT0 <8> 2 3
DDRB_SCS1# 115 116 DDRB_SMA13 RP5 56_0404_4P2R_5% +0.9VS
<8> DDRB_SCS1# NC/S1# NC/A13
117 VDD VDD 118
DDRB_ODT1 119 120 DDRB_SWE# 1 4
<8> DDRB_ODT1 NC/ODT1 NC
121 122 DDRB_SCAS# 2 3
DDRB_SDQ32 VSS VSS DDRB_SDQ36 RP6 56_0404_4P2R_5%
123 DQ32 DQ36 124 1 1 1 1 1
DDRB_SDQ33 125 126 DDRB_SDQ37 C192 C193 C194 C195 C196
DQ33 DQ37 DDRB_SCS1#
127 VSS VSS 128 1 4
DDRB_SDQS4# 129 130 DDRB_SDM4 DDRB_ODT1 2 3 0.1U_0402_16V4Z 0.1U_0402_16V4Z
<9> DDRB_SDQS4# DDRB_SDQS4 DQS4# DM4 RP7 56_0404_4P2R_5% 2
0.1U_0402_16V4Z 2 2
0.1U_0402_16V4Z 2 2
0.1U_0402_16V4Z
<9> DDRB_SDQS4 131 DQS4 VSS 132
133 134 DDRB_SDQ38
DDRB_SDQ34 VSS DQ38 DDRB_SDQ39
135 DQ34 DQ39 136
3 DDRB_SDQ35 DDRB_SMA11 3
137 DQ35 VSS 138 1 4
139 140 DDRB_SDQ44 DDRB_CKE1 2 3
DDRB_SDQ40 VSS DQ44 DDRB_SDQ45 RP8 56_0404_4P2R_5% +0.9VS
141 DQ40 DQ45 142
DDRB_SDQ41 143 144
DQ41 VSS DDRB_SDQS5# DDRB_SMA6
145 VSS DQS5# 146 DDRB_SDQS5# <9> 1 4
DDRB_SDM5 147 148 DDRB_SDQS5 DDRB_SMA7 2 3
DM5 DQS5 DDRB_SDQS5 <9> RP9 56_0404_4P2R_5%
149 VSS VSS 150 1 1 1 1 1
DDRB_SDQ42 151 152 DDRB_SDQ46 C197 C198 C203 C204 C205
DDRB_SDQ43 DQ42 DQ46 DDRB_SDQ47 DDRB_SMA2
153 DQ43 DQ47 154 1 4
155 156 DDRB_SMA4 2 3 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRB_SDQ48 VSS VSS DDRB_SDQ52 RP10 56_0404_4P2R_5% 2 2
0.1U_0402_16V4Z 2 2
0.1U_0402_16V4Z 2
157 DQ48 DQ52 158
DQ49 DQ53 DDRB_SBS1
161 VSS VSS 162 1 4
EC_RX_P80_CLK_R 163 164 DDRB_SMA0 2 3
<14> EC_RX_P80_CLK_R NC,TEST CK1 DDRB_CLK1 <8> +0.9VS
165 166 RP11 56_0404_4P2R_5%
VSS CK1# DDRB_CLK1# <8>
DDRB_SDQS6# 167 168 DDRB_CLK1?
<9> DDRB_SDQS6# DDRB_SDQS6 DQS6# VSS DDRB_SDM6 DDRB_SCS0#
<9> DDRB_SDQS6 169 DQS6 DM6 170 1 4
171 172 DDRB_SRAS# 2 3
DDRB_SDQ50 VSS VSS DDRB_SDQ54 RP12 56_0404_4P2R_5%
173 DQ50 DQ54 174 1 1 1
DDRB_SDQ51 175 176 DDRB_SDQ55 C206 C207 C208
DQ51 DQ55 DDRB_SMA13
177 VSS VSS 178 1 4
DDRB_SDQ56 179 180 DDRB_SDQ60 DDRB_ODT0 2 3 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRB_SDQ57 DQ56 DQ60 DDRB_SDQ61 RP13 56_0404_4P2R_5% 2 2
0.1U_0402_16V4Z 2
181 DQ57 DQ61 182
183 VSS VSS 184
DDRB_SDM7 185 186 DDRB_SDQS7# DDRB_SMA14 1 2
DM7 DQS7# DDRB_SDQS7# <9> <8> DDRB_SMA14
187 188 DDRB_SDQS7 R194 56_0402_5%
DDRB_SDQ58 VSS DQS7 DDRB_SDQS7 <9>
189 DQ58 VSS 190
DQ59 DQ62 DDRB_SDQ63
193 VSS DQ63 194
D_CK_SDATA 195 196 Layout Note: Layout Note:
<14,16,24,25> D_CK_SDATA SDA VSS
D_CK_SCLK 197 198 R196 1 2 10K_0402_5%
<14,16,24,25> D_CK_SCLK SCL SAO R197
Pla ce these resistor Place one cap close to every 2 pullup
+3VS 199 VDDSPD SA1 200 1 2 10K_0402_5% +3VS
4 closely JP35,all 4
resistors terminated to +0.9VS
trace length Max=1.5"
TYCO_292530-4
ME@
DIMM1 STD H:9.2mm (BOT)

DDRII-SODIMM1
B 0.2
LA-3691P
A B C D E
5 4 3 2 1
+3VM_CK505
FSLC FSLB FSLA CPU SRC PCI
+3VS
CLKSEL2 CLKSEL1 CLKSEL0 MHz MHz MHz +3VS 1
R460
2
0_1206_5% 1 1 1 1 1 1 1
C534 C518 C522 C521 C494 C493 C491
0 1 0 200 100 33.3 R434 R430
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2.2K_0402_5% 2.2K_0402_5%
0 1 1 166 100 33.3
+1.25VM_CK505 D_CK_SDATA
S
FSB Frequency Selet: <22,30> ICH_SMBDATA 1 3
+1.25VS 1 2 Q34
D R461 0_1206_5% 2N7002_SOT23 D
CPU Driven Stuff 1 1 1 1 1 1
G
2
C533 C520 C519 C517 C490 C492 +3VS
2
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
G
*(Default) No Stuff R401 R408 R417 R430 R438 R447 2 2 2 2 2 2
1 3 D_CK_SCLK
<22,30> ICH_SMBCLK
Stuff R401 R417 R447
S
Q32
667MHz 2N7002_SOT23
No Stuff R408 R430 R438 10/17 : Change P/N from SA0001GT00 to SA00001GT10
Need to update Symbol

Stuff
R408 R417 R447
+3VM_CK505 U23
800MHz
No Stuff R401 R430 R438 2 VDD_PCI NC 48
9 VDD48
16 VDDPLL3
61 VDDREF
+VCCP 64 D_CK_SCLK
SCLK D_CK_SCLK <14,15,24,25>
39 63 D_CK_SDATA
VDDSRC SDATA D_CK_SDATA <14,15,24,25>
55 VDDCPU
2
38 PM_STP_PCI#
R387 PCI_STOP# PM_STP_CPU# PM_STP_PCI# <22>
CPU_STOP# 37
12 PM_STP_CPU# <22>
+1.25VM_CK505 VDD96_IO
R386 56_0402_5% 20
2.2K_0402_5% @ VDDPLL3_IO
26
1
FSA 2 VDDSRC_IO CLK_CPU_BCLK

1 1 2 MCH_CLKSEL0 <8> CPU0 54 CLK_CPU_BCLK <4>
36 53 CLK_CPU_BCLK#
VDDSRC_IO CPU0# CLK_CPU_BCLK# <4>
1 2 R388 49
C <5> CPU_BSEL0 VDDCPU_IO C
R393 1K_0402_5%
0_0402_5%
1
51 CLK_MCH_BCLK
CPU1_F CLK_MCH_BCLK <7>
R385 50 CLK_MCH_BCLK#
CPU1#_F CLK_MCH_BCLK# <7>
1K_0402_5%
@ 47
2
SRC8/ITP
SRC8#/ITP# 46
475_0402_1%1 2 R415 PCI_CLK0 1

+VCCP <22> SATA_CLKREQ# PCI0/CR#_A
475_0402_1%1 2 R403 PCI_CLK1 3 35 CLK_PCIE_EXP#
<8> MCH_CLKREQ# PCI1/CR#_B SRC10# CLK_PCIE_EXP# <25>
34 CLK_PCIE_EXP
SRC10 CLK_PCIE_EXP <25>
2
PCI2_TME 4
R444 PCI2/TME R441 1 2 10K_0402_5% +3VS
22_0402_5% 1 2 R401 PCI_CLK3 5
<32> CLK_PCI_LPC PCI3
1K_0402_5% 33 R439 1 2 475_0402_1%
SRC11/CR#_H EXP_CLKREQ# <25>
@ 33_0402_5% 1 2 R413 27_SEL 6 32 R417 1 2 475_0402_1%
<34> CLK_PCI_DB WLAN_CLKREQ# <24>
1
FSB PCI4/27_Select SRC11#/CR#_G

1 2 MCH_CLKSEL1 <8>
33_0402_5% 1 2 R412 ITP_EN 7 R411 1 2 10K_0402_5% +3VS
<20> CLK_PCI_ICH PCIF5/ITP_EN
1 2 R448
<5> CPU_BSEL1
R450 1K_0402_5% 30 CLK_PCIE_WLAN
SRC9 CLK_PCIE_WLAN <24>
0_0402_5% 31 CLK_PCIE_WLAN#
SRC9# CLK_PCIE_WLAN# <24>
1
CLK_XTAL_IN 60
R445 X1
CLK_XTAL_OUT 59
0_0402_5% X2
SRC7/CR#_F 44
@ 43 R_CLKREQ#_E R440 1 2 475_0402_1%
CLKREQ_LAN# <30>
2
SRC7#/CR#_E
R449 1 2 10K_0402_5% +3VS
B +VCCP 41 CLK_PCIE_LAN B
SRC6 CLK_PCIE_LAN <30>
33_0402_5% 1 2 R399 FSA 10 40 CLK_PCIE_LAN#
<22> CLK_ICH_48M USB_48MHZ/FSLA SRC6# CLK_PCIE_LAN# <30>
2
R453 FSB 57 FSLB/TEST MODE CLK_MCH_3GPLL

SRC4 27 CLK_MCH_3GPLL <8>
R451 1K_0402_5% 22_0402_5% 1 2 R442 28 CLK_MCH_3GPLL#
<34> CLK_14M_SIO SRC4# CLK_MCH_3GPLL# <8>
2.2K_0402_5% @ 22_0402_5% 1 2 R443 FSC 62
1
FSC <22> CLK_ICH_14M REF0/FSLC/TEST_SEL

2 1 1 2 MCH_CLKSEL2 <8>
1 2 R455 24 CLK_PCIE_ICH
<5> CPU_BSEL2 SRC3/CR#_C CLK_PCIE_ICH <22>
R456 1K_0402_5% +1.25VM_CK505 45 25 CLK_PCIE_ICH#
VDDSRC_IO SRC3#/CR#_D CLK_PCIE_ICH# <22>
0_0402_5% 1
1
C489
R452 For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
0.1U_0402_16V4Z 21 CLK_PCIE_SATA
2 SRC2/SATA CLK_PCIE_SATA <21>
0_0402_5% For 27_SEL, 0 = Enable DOT96 & SRC1, 42 22 CLK_PCIE_SATA#
GNDSRC SRC2#/SATA# CLK_PCIE_SATA# <21>
@ C471 2 1 CLK_ICH_48M
2
1= Enable SRC0 & 27MHz 8 @ 5P_0402_50V8C

GNDPCI C530 2 1 CLK_ICH_14M
For PCI2_EN, 0 = Overclocking of CPU and SRC Allowed 11 17 CLK_PCIE0 R405 1 2 GM@ 0_0402_5% @ 4.7P_0402_50V8C
GND48 SRC1/SE1/27MHz_NonSS CLK_DREF_SSC <8>
18 CLK_PCIE0# R404 1 2 GM@ 0_0402_5% C480 2 1 CLK_PCI_ICH
SRC1#/SE2/27MHz_SS CLK_DREF_SSC# <8>
1 = Overclocking of CPU and SRC NOT allowed 15 R390 1 2 PM@ 0_0402_5% @ 4.7P_0402_50V8C
GND CLK_27M_VGA <17>
R389 1 2 PM@ 0_0402_5%
CLK_27M_VGA# <17>
C529 2 1 CLK_14M_SIO
19 @ 4.7P_0402_50V8C
GND R_CLK_DOT R407 GM@ 0_0402_5% C477
SRC0/DOT96 13 1 2 CLK_DREF_96M <8> 2 1 CLK_PCI_LPC
+3VS +3VS +3VS 52 14 R_CLK_DOT# R406 1 2 GM@ 0_0402_5% @ 4.7P_0402_50V8C
GNDCPU SRC0/DOT96# CLK_DREF_96M# <8>
R392 1 2 PM@ 0_0402_5% C485 2 1 CLK_PCI_DB
CLK_PCIE_VGA <17>
23 R391 1 2 PM@ 0_0402_5% @ 4.7P_0402_50V8C
GNDSRC CLK_PCIE_VGA# <17>
2
CLK_XTAL_IN R395 R408 R418 29

C525 27P_0402_50V8J GNDSRC CK_PW RGD
CK_PWRGD/PD# 56 Place close to U35
1
A 10K_0402_5% 10K_0402_5% 10K_0402_5% 58 CK_PWRGD <22> A

Y3 @ PM@ GNDREF
1
14.31818MHZ_16PF_DSX840GA ICS9LPRS365
ITP_EN 27_SEL PCI2_TME ICS9LPRS365/SA00001GT00
2
CLK_XTAL_OUT * Internal Pull-Up Resistor

<BOM Structure>
C524 27P_0402_50V8J ** Internal Pull-Down Resistor
2
R400 R402 R414
10K_0402_5% 10K_0402_5% 10K_0402_5%

GM@ @
Clock generator
1
Routing the trace at least 10mil AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3691P 0.2
5 4 3 2 1
5 4 3 2 1
D D
MAX. 4.06A @ 1.8V
<10> PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_N[0..15] MAX. 130mA @ 2.5V
PCIE_MTX_C_GRX_P[0..15]
<10> PCIE_MTX_C_GRX_P[0..15] MAX. 655mA @ 3.3V
PCIE_GTX_C_MRX_N[0..15]
<10> PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
<10> PCIE_GTX_C_MRX_P[0..15]
JP19 JP20
1 1 41 41 1 1 41 41
PCIE_MTX_C_GRX_P1 2 42 PCIE_GTX_C_MRX_P1 PCIE_MTX_C_GRX_P0 2 42 PCIE_GTX_C_MRX_P0
PCIE_MTX_C_GRX_N1 2 42 PCIE_GTX_C_MRX_N1 PCIE_MTX_C_GRX_N0 2 42 PCIE_GTX_C_MRX_N0
3 3 43 43 3 3 43 43
4 4 44 44 4 4 44 44
6 6 46 46 6 6 46 46
7 7 47 47 7 7 47 47
9 9 49 49 9 9 49 49
10 10 50 50 10 10 50 50
12 12 52 52 12 12 52 52
13 13 53 53 13 13 53 53
C PCIE_MTX_C_GRX_P9 PCIE_GTX_C_MRX_P9 PCIE_MTX_C_GRX_P8 PCIE_GTX_C_MRX_P8 C
14 14 54 54 14 14 54 54
15 55 15 55
16 16 56 56 16 16 56 56
PCIE_MTX_C_GRX_P11 17 57 PCIE_GTX_C_MRX_P11 PCIE_MTX_C_GRX_P10 17 57 PCIE_GTX_C_MRX_P10 +5VS +2.5VS
18 18 58 58 18 18 58 58
19 19 59 59 19 19 59 59
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
21 21 61 61 21 21 61 61
22 22 62 62 22 22 62 62 2 2 2 2
C174
C176
C454
C458
24 24 64 64 24 24 64 64
25 25 65 65 25 25 65 65
+1.8VS SUSP# 1 1 1 1
+3VS 26 26 66 66 +5VS <16> CLK_PCIE_VGA 26 26 66 66 SUSP# <25,32,37,40,42,43,44>
+1.5VS 27 67 27 67 VGA_THER_ALERT#
27 67 <16> CLK_PCIE_VGA# 27 67 VGA_THER_ALERT# <22>
28 68 28 68 PM@ PM@ @ @
28 68 28 68
29 29 69 69 <19> VGA_DDCCLK 29 29 69 69
30 30 70 70 <19> VGA_DDCDATA 30 30 70 70 VGA_ENBKL <18>
+2.5VS 31 71 31 71
31 71 31 71 PLT_RST_BUF# <8,20,22,24,25,30>
32 32 72 72 <19> VGA_VSYNC 32 32 72 72 CLK_27M_VGA <16>
33 73 B+ 33 73
33 73 33 73 CLK_27M_VGA# <16>
34 34 74 74 <19> VGA_HSYNC 34 34 74 74
35 35 75 75 35 35 75 75
36 76 36 76 +3VS
36 76 <19> VGA_CRT_R 36 76 CARD_COMP
37 37 77 77 37 37 77 77
38 38 78 78 <19> VGA_CRT_G 38 38 78 78 CARD_LUMA
0.047U_0402_16V4Z
0.047U_0402_16V4Z
39 39 79 79 39 39 79 79
40 40 80 80 <19> VGA_CRT_B 40 40 80 80 CARD_CRMA
HRS_FX8-80P-SV1(92) HRS_FX8-80P-SV1(92) 1 1
C444
C445
ME@ ME@
B 2 2 B
PM@ PM@
A A
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number
VGA/B connector Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
Custom IEL10 LA-3451P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Thursday, March 08, 2007 Sheet 17 of 45
5 4 3 2 1
5 4 3 2 1
LCD POWER CIRCUIT INVERTER Conn.
+3VALW +3VS JP3

+LCDVDD
W=60mils 1
2
B+ <32> INVT_PWM 3
1
1 DISPOFF#
4
1
R90 C329 GM@
<32> DAC_BRIG 5
300_0603_5% R271 L1 2 1+INVPWR_B+
D GM@ 4.7U_0805_10V4Z FBMA-L11-201209-221LMA30T_0805 6 D
10K_0402_5% 7
2
GM@
1 2
MOLEX_53780-0790
3
D S
C14 ME@
+3VS
G
GM@ Q6 2 2 1 2 Q29
2N7002_SOT23 G R270 GM@ 1K_0402_5% AO3413_SOT23-3 0.1U_0603_50V4Z
S D
GM@
1
1
1
DTC124EK 2 GM@
C330 R6
OUT
+LCDVDD
0.047U_0402_16V7K W=60mils 4.7K_0402_5%
R74 1 1
<10> GMCH_ENVDD 2 0_0402_5% 2 D3
2
GM@ IN BKOFF# DISPOFF#
1 2
GND
<32> BKOFF#
1 1
1
GM@ C334 C333 GM@ RB751V-40TE17_SOD323-2
Q5 <10> GMCH_ENBKL 2 1 ENBKL
ENBKL <32>
3
@ R71 DTC124EKAT146_SC59-3 4.7U_0805_10V4Z 0.1U_0402_16V4Z R69 GM@ 0_0402_5%
2
100K_0402_5% 2 2
GM@ <17> VGA_ENBKL 2 1
R72 PM@ 0_0402_5% R66
2
100K_0402_5%
1
LCD/PANEL BD. Conn.
ME@
ACES_87216-3006
31 GNDGND 32
<10> LVDS_A0# LVDS_A0# 15 30 LVDS_B0# LVDS_B0# <10>

LVDS_A0 15 30 LVDS_B0
<10> LVDS_A0 14 14 29 29 LVDS_B0 <10>
C C
13 13 28 28
<10> LVDS_A1 11 11 26 26 LVDS_B1 <10>
10 10 25 25
<10> LVDS_A2 8 8 23 23 LVDS_B2 <10>
7 7 22 22
LVDS_ACLK# 6 21 LVDS_BCLK#
<10> LVDS_ACLK# 6 21 LVDS_BCLK# <10>
LVDS_ACLK 5 20 LVDS_BCLK
<10> LVDS_ACLK 5 20 LVDS_BCLK <10>
4 4 19 19
+LCDVDD 2 1 +LCDVDD_L 3 18 LVDS_DATA
3 18 LVDS_CLK
(60 MIL) 2 2 17 17
1 1 16 16 +3VS
L18 JP16
FBMA-L11-201209-221LMA30T_0805
Follow HEL80's pin definition

Except pin 29
+3VS
B B
R77 GM@ R75 GM@
2.2K_0402_5% 2.2K_0402_5%
<10> LVDS_SDA LVDS_DATA
<10> LVDS_SCL LVDS_CLK
A A

LVDS & DVI Connector
B 0.2
LA-3691P
5 4 3 2 1
A B C D E
CRT Connector
1 1
Place closed to chipset

L2
1 2 CRT_R_1 1 2 RED
<17> VGA_CRT_R
R78 1 2 PM@ 0_0402_5% FLM1608081R8K_0603
<10> GMCH_CRT_R
R91 GM@ 0_0402_5% L3
1 2 CRT_G_1 1 2 GREEN
<17> VGA_CRT_G
R80 1 2 PM@ 0_0402_5% FLM1608081R8K_0603
<10> GMCH_CRT_G
R93 GM@ 0_0402_5% L4
1 2 CRT_B_1 1 2 BLUE
<17> VGA_CRT_B
R79 1 2 PM@ 0_0402_5% FLM1608081R8K_0603
<10> GMCH_CRT_B
1
R92 GM@ 0_0402_5%
1
R8 R9 1 1 1
R12 C15 C16 C17 +5VS +CRT_VCC
1 1 1
150_0402_1% 22P_0402_50V8J 22P_0402_50V8J 22P_0402_50V8J C6 C13 C12 D1 W=40mils
2
2 2 2 22P_0402_50V8J 22P_0402_50V8J 22P_0402_50V8J 2 1
2
150_0402_1% 2 2 2
150_0402_1% RB411DT146_SOT23-3
1
+CRT_VCC JVGA_HS C5
1 2
L5 FCM1608C-121T_0603 0.1U_0402_16V4Z
2
1 2 2 1
C34 0.1U_0402_16V4Z R30 1K_0402_5% 1 2 JVGA_VS
L6 FCM1608C-121T_0603
1
U2
1 1
OE#
1 2 2 4 CRT_HSYNC_1
<17> VGA_HSYNC A Y
R82 PM@ 0_0402_5% @ C10 @ C11
G
1 2 10P_0402_50V8J 10P_0402_50V8J
2 <10> GMCH_CRT_HSYNC 2 2 2
R81 GM@ 0_0402_5% SN74AHCT1G125DCKR_SC70-5
3
+CRT_VCC
+CRT_VCC
Place closed to chipset
1 2
C42 0.1U_0402_16V4Z JP1
1
U3 1
RED 1
2
OE#
CRT_VSYNC_1 2
<17> VGA_VSYNC 1 2 2 A Y 4 3 3
R83 PM@ 0_0402_5% GREEN 4 4
G
<10> GMCH_CRT_VSYNC 1 2 5 5
R84 GM@ 0_0402_5% SN74AHCT1G125DCKR_SC70-5 BLUE 6
3
6
7 7
JVGA_VS 8
JVGA_HS 8
9 9
Update Footprint VGA_DDC_DAT 10
VGA_DDC_CLK 10
11 11
PIN4 12 12
1 13 GND1
C7 14
PIN ASSIGMENT GND2
ACES_87213-1200G
2 0.1U_0402_16V4Z ME@
+3VS PIN D-SUB FUNCTION

2.2K
+CRT_VCC
2.2K
1 9 +CRT_VCC
1
3 R53 2.2K_0402_5% 2 1 RED 3
2.2K_0402_5% R60 +3VS

3 6 GND
1
1
2
R62 R56
<17> VGA_DDCDATA 0_0402_5%

2
PM@
1
R58
2.2K_0402_5% 2.2K_0402_5% 4 2 GREEN
2
2
2
G
1 2 3 1 VGA_DDC_DAT
5 7 GND
<10> GMCH_CRT_DATA 0_0402_5% GM@ R55
S
Q2 6 3 BLUE
2
G
2N7002_SOT23
<10> GMCH_CRT_CLK 1
0_0402_5% GM@
2
R61
3 1 VGA_DDC_CLK 7 8 GND
S
Q3
2 1
2N7002_SOT23 8 14 VSYNC
<17> VGA_DDCCLK 0_0402_5% PM@ R64 1 1
C9
@
10 GND
100P_0402_50V8J
2 C8 @ 2
68P_0402_50V8K
9 13 HSYNC
11 SENSE
10 12 SM_DAT
4 4
11 15 SM_CLK
12 4 PIN4
CRT & TV-OUT Connector
B 0.2
LA-3691P
A B C D E
5 4 3 2 1
+3VS
10/17 : Change P/N from SA000010G00 to SA00001JU10
R97
10/17 : FootPrint : SA000010G00
1 2 8.2K_0402_5% PCI_DEVSEL#
BOM : SA00001JU10
D R96 1 2 8.2K_0402_5% PCI_STOP# D
R281 1 2 8.2K_0402_5% PCI_TRDY# U5B

D20 A4 PCI_REQ#0
R101 1 AD0 REQ0#
2 8.2K_0402_5% PCI_FRAME# E19 AD1 PCI GNT0# D7 PCI_GNT#0
D19 E18 PCI_REQ#1
R111 1 AD2 REQ1#/GPIO50
2 8.2K_0402_5% PCI_PLOCK# A20 AD3 GNT1#/GPIO51 C18
D17 B19 PCI_REQ#2
2 8.2K_0402_5% P CI_IRDY# A21 AD5 GNT2#/GPIO53 F18
A19 A11 PCI_REQ#3
2 8.2K_0402_5% PCI_SERR# C19 AD7 GNT3#/GPIO55 C10 PCI_GNT#3
A18 AD8
R107 1 2 8.2K_0402_5% PCI_PERR# B16 C17
AD9 C/BE0#
A12 AD10 C/BE1# E15
E16 AD11 C/BE2# F16
A14 AD12 C/BE3# E17
+3VS G16 AD13 P CI_IRDY#
A15 AD14 IRDY# C8
B6 AD15 PAR D9
R301 1 2 8.2K_0402_5% PCI_PIRQA# C11 G6 PCIRST#
AD16 PCIRST# PCI_DEVSEL#
A9 AD17 DEVSEL# D16
R128 1 2 8.2K_0402_5% PCI_PIRQB# D11 A7 PCI_PERR# Place closely pin B10
AD18 PERR# PCI_PLOCK#
B12 AD19 PLOCK# B7
R139 1 2 8.2K_0402_5% PCI_PIRQC# C12 F10 PCI_SERR#
AD20 SERR# PCI_STOP# CLK_PCI_ICH
D10 AD21 STOP# C16
R99 1 2 8.2K_0402_5% PCI_PIRQD# C7 C9 PCI_TRDY#
AD22 TRDY#
2
F13 A17 PCI_FRAME#
R298 1 AD23 FRAME#
2 8.2K_0402_5% PCI_PIRQE# E11 AD24
E13 AG24 PLT_RST# R280
R300 1 AD25 PLTRST#
C 2 8.2K_0402_5% PCI_PIRQF# E12 AD26 PCICLK B10 CLK_PCI_ICH
CLK_PCI_ICH <16>
10_0402_5% C
D8 G7 PCI_PME# @
PCI_PME# <32>
1
R296 1 AD27 PME#
2 8.2K_0402_5% PCI_PIRQG# A6 AD28
E8 AD29 1
R121 1 2 8.2K_0402_5% PCI_PIRQH# D6 C356
AD30 10P_0402_50V8J
A3 AD31
R116 1 2 8.2K_0402_5% PCI_REQ#0 @
2
R102 1 2 8.2K_0402_5% PCI_REQ#1 PCI_PIRQA# F9
Interrupt I/F F8 PCI_PIRQE#
PCI_PIRQB# PIRQA# PIRQE#/GPIO2 PCI_PIRQF#
B5 PIRQB# PIRQF#/GPIO3 G11
R103 1 2 8.2K_0402_5% PCI_REQ#2 PCI_PIRQC# C5 F12 PCI_PIRQG#
PCI_PIRQD# PIRQC# PIRQG#/GPIO4 PCI_PIRQH#
A10 PIRQD# PIRQH#/GPIO5 B3
R100 1 2 8.2K_0402_5% PCI_REQ#3
ICH8M REV 1.0
A16 Swap Override Strap

R284 1 2 1K_0402_5% PCI_GNT#3
Low= A16 swap override Enable
@ PCI_GNT#3 High= Default* +3VS
R286 1 2 1K_0402_5% PCI_GNT#0 U21
5
@ NC7SZ08P5X_NL_SC70-5
PLT_RST# 2 @
P
B R285 B B
1 2 1K_0402_5% SPI_CS#1 <22> Y 4 PLT_RST_BUF# <8,17,22,24,25,30>
@ 1 A
1
3
R370
Boot BIOS Strap
100K_0402_5%
PCI_GNT#0 SPI_CS#1 Boot BIOS Loaction 1 2
2
R340 0_0402_5%
0 1 SPI
1 0 PCI +3VS
1 1 LPC* U8
5
NC7SZ08P5X_NL_SC70-5
PCIRST# 2 @
P
B
Y 4 PCI_RST# <32,34>
1 A
1
3
R157
100K_0402_5%
1 2
2
R144 0_0402_5%
A A

ICH8M(1/4)-PCI
0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
+RTCVCC
C441
1 2 SM_INTRUDER# 15P_0402_50V8J
R315 1M_0402_5% 2 1 ICH_RTCX1
10M_0402_5%
X2
same as GT30
1
3 NC OUT 4
R341
1 2 ICH_INTVRMEN 32.768KHZ_12.5P_MC-306 2 1
R314 330K_0402_1% NC IN +VCCP
High = Internal VR Enable C440 U5A
2
D 15P_0402_50V8J AG25 E5 LPC_AD0 H_DPRSTP# 2 1 D
RTCX1 FWH0/LAD0 LPC_AD0 <32,34>
2 1 ICH_RTCX2 AF24 F5 LPC_AD1 R167 @ 56_0402_5%
RTCX2 FWH1/LAD1 LPC_AD1 <32,34>
G8 LPC_AD2 H_DPSLP# 2 1
FWH2/LAD2 LPC_AD2 <32,34>
1 2 LAN100_SLP +RTCVCC 1 2 ICH_RTCRST# AF23 F6 LPC_AD3 R163 @ 56_0402_5%
RTCRST# FWH3/LAD3 LPC_AD3 <32,34>
R316 330K_0402_1% R308 H_FERR# 2 1
20K_0402_5% SM_INTRUDER# AD22 C4 LPC_FRAME# R292 56_0402_5%
INTRUDER# FWH4/LFRAME# LPC_FRAME# <32,34>
close to RAM door
RTC
LPC
ICH_INTVRMEN AF25 G9 LPC_DRQ0#
INTVRMEN LDRQ0# LPC_DRQ0# <34>
2 1 LAN100_SLP AD21 E6
J5 @ JOPEN LAN100_SLP LDRQ1#/GPIO23
2 1 R304 10K_0402_5% +3VS
B24 AF13 GATEA20
GLAN_CLK A20GATE GATEA20 <32>
AG26 H_A20M#
A20M# H_A20M# <4>
C392 D22
1U_0603_10V4Z LAN_RSTSYNC DPRSTP# R169 1 0_0402_5% H_DPRSTP#
DPRSTP# AF26 2 H_DPRSTP# <5,8,45>
1 2 C21 AE26 DPSLP# R161 1 2 0_0402_5% H_DPSLP#
LAN_RXD0 DPSLP# H_DPSLP# <5>
B21 LAN_RXD1
C22 AD24 H_FERR#
LAN_RXD2 FERR# H_FERR# <4>
LAN / GLAN
<26> HDA_SYNC_AUDIO 1 2 HDA_SYNC_ICH D21 AG29 H_PWRGOOD
LAN_TXD0 CPUPWRGD/GPIO49 H_PWRGOOD <5>
R362 33_0402_5% E20 LAN_TXD1 H_IGNNE#
<25> HDA_SYNC_MDC 1 2 C20 LAN_TXD2 IGNNE# AF27 H_IGNNE# <4>
R361 33_0402_5%
AH21 AE24 H_INIT# R349 2 1 10K_0402_5%
GLAN_DOCK#/GPIO13 INIT# H_INIT# <4> +3VS
<26> HDA_BITCLK_AUDIO 1 2 HDA_BITCLK_ICH AC20 H_INTR
INTR H_INTR <4>
CPU
R347 33_0402_5% 1 2 GLAN_COMP D25 AH14 KB_RST#
+1.5VS GLAN_COMPI RCIN# KB_RST# <32>
<25> HDA_BITCLK_MDC 1 2 R274 24.9_0402_1% C25
R346 33_0402_5% GLAN_COMPO H_NMI
NMI AD23 H_NMI <4>
HDA_BITCLK_ICH AJ16 AG28 H_SMI#
HDA_BIT_CLK SMI# H_SMI# <4>
<26> HDA_RST_AUDIO# 1 2 HDA_RST_ICH# HDA_SYNC_ICH AJ15 HDA_SYNC R2912
C R365 33_0402_5%
STPCLK# AA24 H_STPCLK#
H_STPCLK# <4> 156_0402_5% +VCCP C
<25> HDA_RST_MDC# 1 2 HDA_RST_ICH# AE14

R364 33_0402_5% HDA_RST# THRMTRIP_ICH# R287 1
THRMTRIP# AE27 2 24.9_0402_1% H_THERMTRIP#
H_THERMTRIP# <4,8>
<26> HDA_SDIN0 AJ17 HDA_SDIN0
<26> HDA_SDOUT_AUDIO 1 2 HDA_SDOUT_ICH <25> HDA_SDIN1 AH17 AA23
R367 33_0402_5% HDA_SDIN1 TP8
AH15 HDA_SDIN2 IDE_DD[0..15] <28>
IHDA
<25> HDA_SDOUT_MDC 1 2 AD13 V1 IDE_DD0
R366 33_0402_5% HDA_SDIN3 DD0 IDE_DD1
DD1 U2
HDA_SDOUT_ICH AE13 V3 IDE_DD2
HDA_SDOUT DD2 IDE_DD3
DD3 T1
+3VS AE10 V4 IDE_DD4
R353 HDA_DOCK_EN#/GPIO33 DD4
IDE_HRESET# AG14 T5 IDE_DD5
<28> IDE_HRESET# HDA_DOCK_RST#/GPIO34 DD5
1 2 SATA_LED# AB2 IDE_DD6
SATA_LED# DD6 IDE_DD7
<28> SATA_LED# AF10 SATALED# DD7 T6
T3 IDE_DD8
10K_0402_5% SATA_DTX_C_IRX_N0 DD8 IDE_DD9 IDE _DIORDY R171 1
<28> SATA_DTX_C_IRX_N0 AF6 SATA0RXN DD9 R2 2 4.7K_0402_5% +3VS
<28> SATA_DTX_C_IRX_P0 SATA_DTX_C_IRX_P0 AF5 T4 IDE_DD10
SATA_ITX_DRX_N0 SATA0RXP DD10 IDE_DD11
AH5 SATA0TXN DD11 V6
SATA_ITX_DRX_P0 AH6 V5 IDE_DD12 IDE_IRQ R324 1 2 8.2K_0402_5%
<28> SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_P0 2 close
1 ICH8
SATA_ITX_DRX_P0 SATA0TXP DD12
U1 IDE_DD13
C436 3900P_0402_50V7K SATA_DTX_C_IRX_N1 DD13 IDE_DD14
AG3 SATA1RXN DD14 V2
SATA_DTX_C_IRX_P1 AG4 U6 IDE_DD15
SATA1RXP DD15
IDE
SATA_ITX_C_DRX_N0 2 1 SATA_ITX_DRX_N0 AJ4 IDE_DA[0..2] <28>
<28> SATA_ITX_C_DRX_N0 C435 3900P_0402_50V7K SATA1TXN IDE_DA0
AJ3 SATA1TXP DA0 AA4
AA1 IDE_DA1
DA1
SATA
SATA_DTX_C_IRX_N2 AF2 AB3 IDE_DA2
SATA_DTX_C_IRX_P2 SATA2RXN DA2
AF1 SATA2RXP
AE4 Y6 IDE_DCS1# IDE_DCS1# <28>
SATA2TXN DCS1# IDE_DCS3#
AE3 SATA2TXP DCS3# Y5 IDE_DCS3# <28>
B B
CLK_PCIE_SATA# AB7 W4 IDE_DIOR#
<16> CLK_PCIE_SATA# SATA_CLKN DIOR# IDE_DIOR# <28>
CLK_PCIE_SATA AC6 W3 IDE_DIOW#
<16> CLK_PCIE_SATA SATA_CLKP DIOW# IDE_DIOW# <28>
Y2 IDE_DDACK#
DDACK# IDE_DDACK# <28>
AG1 Y3 IDE_IRQ
SATARBIAS# IDEIRQ IDE_IRQ <28>
R181 1 2 24.9_0402_1% SATARBIAS AG2 Y1 IDE _DIORDY
SATARBIAS IORDY IDE_DIORDY <28>
10mils width less than 500mils W5 IDE_DDREQ
DDREQ IDE_DDREQ <28>
ICH8M REV 1.0
<BOM Structure>
RTC Battery
Change BATT1 P/N : SP093PA0200 (Panasonic)
SP093MX0000 (MAXELL)
SATA_DTX_C_IRX_N1
9/29 modified to follow ISKAA
1 2 D15
R335 1K_0402_5% +RTC_BATT
1
R339
2 SATA_DTX_C_IRX_P1
1K_0402_5%
- BATT1 + R293
2 +CHGRTC
+3VS 1 2 SATA_DTX_C_IRX_N2 2 1 +RTCBATT1 2 1
R179 1K_0402_5%
1 2 SATA_DTX_C_IRX_P2 510_0603_1% 3 +RTCVCC
R177 1K_0402_5%
R368 ML1220T13RE 1
1K_0402_5% 45@ BAS40-04_SOT23 C420
@ XOR Chain Entrance Strap 0.1U_0402_16V4Z
A 2 A
HDA_SDOUT_ICH ICH_TP3 HDA_SDOUT Description SATA_RXn/p need tie to ground when SATA port no used 9/29 Checked. Same as HEL80's
<22> ICH_TP3 0 0 RSVD
R356
0 1 Enter XOR Chain
1K_0402_5% 1 0 Normal Operation
@ Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
1 1 Set PCIE port config bit 1 ICH8M(2/4)-LAN,IDELPC,RTC
B 0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
+3VS +3V_STB
10K_0402_5%
Place closely pin B2 Place closely pin AC1
R351 1 2 SERIRQ
CLK_ICH_48M CLK_ICH_14M
1
8.2K_0402_5%
R352 1 PM_CLKRUN# R355 R317 +3VS
2
1
2.2K_0402_5% 2.2K_0402_5%
8.2K_0402_5% @ R294 @ R333
R322 1 2 EC_THERM# U5C 10_0402_5% 10_0402_5%
2
<16,30> ICH_SMBCLK ICH_SMBCLK AJ26 AJ12 R326 1 2 8.2K_0402_5%
10K_0402_5% ICH_SMBDATA SMBCLK SATA0GP/GPIO21
<16,30> ICH_SMBDATA AD19 AJ10
2
@ R360 1 PM_STP_PCI# LINKALERT# SMBDATA SATA1GP/GPIO19
2 AG21 AF11
GPIO
SATA
LINKALERT# SATA2GP/GPIO36
SMB
ICH_SMLINK0 AC17 AG11 1 1
10K_0402_5% ICH_SMLINK1 SMLINK0 SATA3GP/GPIO37 @ C375 @ C426
AE19 SMLINK1
D @ R344 1 PM_STP_CPU# CLK_ICH_14M 10P_0402_50V8J 10P_0402_50V8J D
2 CLK14 AG9 CLK_ICH_14M <16>
I CH_RI# AF17 G5 CLK_ICH_48M
Clocks
RI# CLK48 CLK_ICH_48M <16> 2 2
10K_0402_5%
R350 1 2 SATA_CLKREQ# SUS_STAT# F4 D3 SUS_CLK
T20 PAD SUS_STAT#/LPCPD# SUSCLK PAD T17
XDP_DBRESET# AD15
<4> XDP_DBRESET# SYS_RESET#
10K_0402_5% AG23 PM_SLP_S3#
SLP_S3# PM_SLP_S3# <32>
R376 1 2VGA_THER_ALERT# PM_BMBUSY# AG12 AF21 PM_SLP_S4# PM_SLP_S4# <32>
<8> PM_BMBUSY# BMBUSY#/GPIO0 SLP_S4# PM_SLP_S5#
SLP_S5# AD18 PM_SLP_S5# <32>
10K_0402_5% EC_LID_OUT# R336 2 1 0_0402_5% AG22
<32> EC_LID_OUT# SMBALERT#/GPIO11
R354 1 2 OCP# AH27 PAD ICH_POK 1 2
S4_STATE#/GPIO26 T27
GPIO
PM_STP_PCI# AE20 @ R330 10K_0402_5%
<16> PM_STP_PCI# STP_PCI#/GPIO15
SYS
10K_0402_5% PM_STP_CPU# R343 2 1 0_0402_5% AG18 AE23 ICH_POK
<16> PM_STP_CPU# STP_CPU#/GPIO25 PWROK ICH_POK <8,32> +3VS
R329 1 2 GPIO48
PM_CLKRUN# AH11 AJ14 DPRSLPVR 2 1
CLKRUN#/GPIO32 DPRSLPVR/GPIO16 PM_DPRSLPVR <8,45>
Power MGT
10K_0402_5% R348 100_0402_1%
@ R494 1 2 WOL_EN ICH_PCIE_WAKE# AE17 AE21 PM_BATLOW#
<24,25,30> ICH_PCIE_WAKE# WAKE# BATLOW#
SERIRQ AF12 R272
<32,34> SERIRQ SERIRQ
10K_0402_5% EC_THERM# AC13 C2 PBTN_OUT# 3.24K_0402_1%
<4,32> EC_THERM# THRM# PWRBTN# PBTN_OUT# <32>
R338 1 2 GPIO39 @
<8,45> VGATE 2 1 ICH_VGATE AJ20 VRMPWRGD LAN_RST# AH20 2 1 PLT_RST_BUF#
PLT_RST_BUF# <8,17,20,24,25,30>
R342 0_0402_5% R359 0_0402_5% CL_VREF0_ICH
AJ22 AG27 EC_RSMRST#R 1 2
T28 PAD TP7 RSMRST# R332 10K_0402_5% 1
+3V_STB OCP# AJ8 E1 CK_PW RGD C342 R275
<4> OCP# TACH1/GPIO1 CK_PWRGD CK_PWRGD <16>
10K_0402_5% AJ9 2 1 ICH_POK 453_0402_1%
R328 1 I CH_RI# TACH2/GPIO6 R290 0_0402_5% 0.1U_0402_16V4Z
2 AH9 TACH3/GPIO7 CLPWROK E3 CL_PWROK <8> @
EC_SMI# 2
<32> EC_SMI# AE16 GPIO8 @
10K_0402_5% EC_SCI# AC19 AJ25 PM_SLP_M# PAD
<32> EC_SCI# GPIO12 SLP_M# T29
R311 1 2 ICH_SMLINK0 AG8 TACH0/GPIO17
AH12 GPIO18 CL_CLK0 F23 CL_CLK0 <8>
10K_0402_5% AE11 AE18
GPIO20 CL_CLK1
Controller Link
GPIO
R318 1 2 ICH_SMLINK1 AG10
C SCLOCK/GPIO22 C
AH25 QRT_STATE0/GPIO27 CL_DATA0 F22 CL_DATA0 <8>
10K_0402_5% AD16 AF19 +3V_STB
R310 1 LINKALERT# SATA_CLKREQ# QRT_STATE1/GPIO28 CL_DATA1
2 <16> SATA_CLKREQ# AG13 SATACLKREQ#/GPIO35
VGA_THER_ALERT# AF9 D24 CL_VREF0_ICH
<17> VGA_THER_ALERT# SLOAD/GPIO38 CL_VREF0
10K_0402_5% GPIO39 AJ11 AH23 CL_VREF1_ICH
R312 1 XDP_DBRESET# GPIO48 SDATAOUT0/GPIO39 CL_VREF1 @ R377
2 AD10 SDATAOUT1/GPIO48
AJ23 3.24K_0402_1%
CL_RST# CL_RST# <8>
1K_0402_5% SB_SPKR AD9
<26> SB_SPKR SPKR
R319 1 2 ICH_PCIE_WAKE# AJ27 @ Q13 2N7002LT1G_SOT23-3
MEM_LED/GPIO24
MISC
D
AJ13 AJ24 D _ACIN 3 1 CL_VREF1_ICH
<8> MCH_ICH_SYNC# MCH_SYNC# ME_EC_ALERT/GPIO10 ACIN <32,38>
8.2K_0402_5% AF22
R325 2 PM_BATLOW# EC_ME_ALERT/GPIO14 WOL_EN R334 1 +3V_STB
1 <21> ICH_TP3 AJ21 TP3 WOL_EN/GPIO9 AG19 2 100K_0402_5% 1
@ C429 @ R369
G
2
10K_0402_5% ICH8M REV 1.0 453_0402_1%
R187 1 2 D _ACIN 0.1U_0402_16V4Z
U5D 2
10K_0402_5% P27 V27 DMI_MTX_IRX_N0
PERN1 DMI0RXN DMI_MTX_IRX_N0 <8>
R345 1 2 EC_LID_OUT# P26 V26 DMI_MTX_IRX_P0
PERP1 DMI0RXP DMI_MTX_IRX_P0 <8>
N29 U29 DMI_ITX_MRX_N0 DMI_ITX_MRX_N0 <8>
10K_0402_5% PETN1 DMI0TXN DMI_ITX_MRX_P0
N28 U28
Direct Media Interface

PETP1 DMI0TXP DMI_ITX_MRX_P0 <8>
R498 1 2 CL_RST#
PCIE_PTX_C_IRX_N2 M27 Y27 DMI_MTX_IRX_N1
<24> PCIE_PTX_C_IRX_N2 PERN2 DMI1RXN DMI_MTX_IRX_N1 <8>
WLAN PCIE_PTX_C_IRX_P2 M26 Y26 DMI_MTX_IRX_P1
<24> PCIE_PTX_C_IRX_P2 PERP2 DMI1RXP DMI_MTX_IRX_P1 <8>
10K_0402_5% <24> PCIE_ITX_C_PRX_N2 C107 2 1 0.1U_0402_10V7K PCIE_ITX_PRX_N2 L29 W29 DMI_ITX_MRX_N1 DMI_ITX_MRX_N1 <8>
R363 1 PM_DPRSLPVR C104 2 PETN2 DMI1TXN
2 <24> PCIE_ITX_C_PRX_P2 1 0.1U_0402_10V7K PCIE_ITX_PRX_P2 L28 PETP2 DMI1TXP W28 DMI_ITX_MRX_P1 DMI_ITX_MRX_P1 <8>
RSMRST circuit
PCI-Express
100K_0402_5% PCIE_PTX_C_IRX_N3 K27 AB26 DMI_MTX_IRX_N2
<25> PCIE_PTX_C_IRX_N3 PERN3 DMI2RXN DMI_MTX_IRX_N2 <8>
@ R337 1 2 ICH_VGATE NEW Card PCIE_PTX_C_IRX_P3 K26 AB25 DMI_MTX_IRX_P2
<25> PCIE_ITX_C_PRX_N3 C101 2 1 0.1U_0402_10V7K PCIE_ITX_PRX_N3 J29 AA29 DMI_ITX_MRX_N2 DMI_ITX_MRX_N2 <8>
C99 2 PETN3 DMI2TXN
<25> PCIE_ITX_C_PRX_P3 1 0.1U_0402_10V7K PCIE_ITX_PRX_P3 J28 PETP3 DMI2TXP AA28 DMI_ITX_MRX_P2 DMI_ITX_MRX_P2 <8>
R421
PCIE_PTX_C_IRX_N4 H27 AD27 DMI_MTX_IRX_N3
B <30> PCIE_PTX_C_IRX_N4 PERN4 DMI3RXN DMI_MTX_IRX_N3 <8> B
LAN PCIE_PTX_C_IRX_P4 H26 AD26 DMI_MTX_IRX_P3 0_0402_5%
<30> PCIE_ITX_C_PRX_N4 C97 2 1 0.1U_0402_10V7K PCIE_ITX_PRX_N4 G29 AC29 DMI_ITX_MRX_N3 DMI_ITX_MRX_N3 <8> 1 2
C92 PETN4 DMI3TXN
Not in CRB,Keep! <30> PCIE_ITX_C_PRX_P4 2 1 0.1U_0402_10V7K PCIE_ITX_PRX_P4 G28 PETP4 DMI3TXP AC28 DMI_ITX_MRX_P3 DMI_ITX_MRX_P3 <8>
Q30
CLK_PCIE_ICH# EC_RSMRST#R
C
F27 PERN5 DMI_CLKN T26 CLK_PCIE_ICH# <16> <32> EC_RSMRST# 3 1
RP27 CLK_PCIE_ICH
E
F26 PERP5 DMI_CLKP T25 CLK_PCIE_ICH <16>
5 4 USB_OC#2 E29 @ MMBT3906_SOT23
+3V_STB PETN5
CPUSB# R309 24.9_0402_1% Within 500 mils
B
6 3 E28 Y23 1 2 +3V_STB
1 2
USB_OC#4 PETP5 DMI_ZCOMP DMI_IRCOMP R423 @ 4.7K_0402_5%
7 2 DMI_IRCOMP Y24 1 2 +1.5VS
2
8 1 USB_OC#5 D27 PERN6/GLAN_RXN USB20_N0 @ R435 @ D18A
D26 PERP6/GLAN_RXP USBP0N G3 USB20_N0 <36>
10K_1206_8P4R_5% C29 G2 USB20_P0 2.2K_0402_5% @ D18B BAV99DW-7_SOT363
1 2 USB_OC#0 C28
PETN6/GLAN_TXN USBP0P
H5 USB20_N1
USB20_P0 <36> USB BAV99DW-7_SOT363
PETP6/GLAN_TXP USBP1N USB20_N1 <24>
R313 10K_0402_5% H4 USB20_P1
USB20_P1 <24> WLAN
1
USB_OC#6 USBP1P USB20_N2
1 2 SPI not used, Left NC C23 H2 USB20_N2 <36> R429
6
R358 10K_0402_5% SPI_CLK USBP2N USB20_P2
1 2 USB_OC#3
B23
E22
SPI_CS0# USBP2P H1
J3 USB20_N3
USB20_P2 <36> USB 1 2
<20> SPI_CS#1 SPI_CS1# USBP3N USB20_N3
SPI
R320 10K_0402_5% J2 USB20_P3 @ 2.2K_0402_5%

USBP3P USB20_P3
1 2 USB_OC#8 D23 K5 USB20_N4
SPI_MOSI USBP4N USB20_N4 <36>
R321 10K_0402_5% USB20_P4
1 2 USB_OC#9
F21 SPI_MISO USBP4P K4
K2 USB20_N5
USB20_P4 <36> USB
USBP5N USB20_N5 <25>
R379 10K_0402_5% USB_OC#0 AJ19 K1 USB20_P5
1 2 CP_PE#
<36> USB_OC#0
<25> CPUSB# CPUSB# AG16
OC0# USBP5P
L3 USB20_N6
USB20_P5 <25> New Card
OC1#/GPIO40 USBP6N USB20_N6 <36>
R378 10K_0402_5% USB_OC#2 AG15 L2 USB20_P6
<36> USB_OC#2
USB_OC#3 AE15
OC2#/GPIO41 USB USBP6P
M5 USB20_N7
USB20_P6 <36> USB
OC3#/GPIO42 USBP7N USB20_N7 <24>
USB_OC#4 USB20_P7
<36> USB_OC#4
USB_OC#5
AF15
AG17
OC4#/GPIO43 USBP7P M4
M2 USB20_N8
USB20_P7 <24> BT
USB_OC#5 OC5#/GPIO29 USBP8N USB20_N8 <29>
USB_OC#6 USB20_P8
<36> USB_OC#6
CP_PE#
AD12
AJ18
OC6#/GPIO30 USBP8P M1
N3 USB20_N9
USB20_P8 <29> Card Reader
USB_OC#8 OC7#/GPIO31 USBP9N USB20_P9
AD14 OC8# USBP9P N2
USB_OC#9 AH18 OC9# USBRBIAS
USBRBIAS# F2 1 2
A R289 A
USBRBIAS F3
22.6_0402_1%
ICH8M REV 1.0
Within 500 mils

ICH8M(3/4)-USB,GPIO,PCIE
Custom 0.2
LA-3691P
5 4 3 2 1
5 4 3 2 1
+5VS +3VS U5F U5E

+RTCVCC AD25 VCCRTC VCC1_05[01] A13 +VCCP VCC1_05 ~1.13A A23 VSS[001] VSS[099] K7
1 1mA VCC1_05[02] B13 A5 VSS[002] VSS[100] L1
2
C411 +ICH_V5REF A16 C13 1 1 (47UF*1, 0.047UF*1, 0.022UF*1) AA2 L13
R277 D14 V5REF[1] VCC1_05[03] C380 C391 VSS[003] VSS[101]
T7 V5REF[2] VCC1_05[04] C14 AA7 VSS[004] VSS[102] L15
100_0402_5% RB751V-40TE17_SOD323-2 0.1U_0402_16V4Z D14 A25 L26
C409 2 +ICH_V5REF_SUS G4 VCC1_05[05] 0.1U_0402_16V4Z VSS[005] VSS[103]
V5REF_SUS VCC1_05[06] E14 AB1 VSS[006] VSS[104] L27
1U_0603_10V4Z 2 2
1mA F14 AB24 L4
1
1
+ICH_V5REF VCC1_05[07] 0.1U_0402_16V4Z VSS[007] VSS[105]
AA25 VCC1_5_B[01] VCC1_05[08] G14 AC11 VSS[008] VSS[106] L5
2 AA26 VCC1_5_B[02] VCC1_05[09] L11 AC14 VSS[009] VSS[107] M12
C355 AA27 L12 AC25 M13
VCC1_5_B[03] VCC1_05[10] VSS[010] VSS[108]
AB27 VCC1_5_B[04] VCC1_05[11] L14 AC26 VSS[011] VSS[109] M14
0.1U_0402_16V4Z AB28 L16 AC27 M15
D 1 VCC1_5_B[05] VCC1_05[12] +1.5VS_DMIPLL_ICH +1.5VS_DMIPLL_R VSS[012] VSS[110] D
AB29 VCC1_5_B[06] VCC1_05[13] L17 AD17 VSS[013] VSS[111] M16
D28 VCC1_5_B[07] VCC1_05[14] L18 AD20 VSS[014] VSS[112] M17
D29 M11 L21 1 2 R295 1_0603_5% +1.5VS AD28 M23
+5VALW +3V_STB VCC1_5_B[08] VCC1_05[15] VSS[015] VSS[113]
CORE
E25 M18 MBK1608121YZF_0603 AD29 M28
VCC1_5_B[09] VCC1_05[16] VSS[016] VSS[114]
ALW or V E26 VCC1_5_B[10] VCC1_05[17] P11 1
C383
(10UF*1, 0.01UF*1) VCCDMIPLL~23mA AD3 VSS[017] VSS[115] M29
E27 VCC1_5_B[11] VCC1_05[18] P18 AD4 VSS[018] VSS[116] M3
2
F24 T11 C381 AD6 N1

D16 VCC1_5_B[12] VCC1_05[19] VSS[019] VSS[117]
F25 VCC1_5_B[13] VCC1_05[20] T18 10U_0805_10V4Z AE1 VSS[020] VSS[118] N11
R299 RB751V-40TE17_SOD323-2 2
G24 VCC1_5_B[14] VCC1_05[21] U11 AE12 VSS[021] VSS[119] N12
10_0402_5% H23 U18 0.01U_0402_16V7K AE2 N13
VCC1_5_B[15] VCC1_05[22] VSS[022] VSS[120]
H24 V11 AE22 N14
1
+ICH_V5REF_SUS VCC1_5_B[16] VCC1_05[23] VSS[023] VSS[121]

J23 VCC1_5_B[17] VCC1_05[24] V12 AD1 VSS[024] VSS[122] N15
2 J24 VCC1_5_B[18] VCC1_05[25] V14 +1.25VS AE25 VSS[025] VSS[123] N16
C373 K24 V16 AE5 N17
VCC1_5_B[19] VCC1_05[26] VSS[026] VSS[124]
0.1U_0402_16V4Z
K25 VCC1_5_B[20] VCC1_05[27] V17
C144
1 (22UF*1, 0.1UF*1) AE6 VSS[027] VSS[125] N18
L23 VCC1_5_B[21] VCC1_05[28] V18 AE9 VSS[028] VSS[126] N26
1
+1.5VS_PCIE_ICH
L24 VCC1_5_B[22] VCCDMI ~50mA AF14 VSS[029] VSS[127] N27
VCCA3GP
L25 R29 22U_0805_6.3V6M AF16 N4
VCC1_5_B[23] VCCDMIPLL 2 VSS[030] VSS[128]
(220UF*1, 22UF*2, 2.2UF*1) M24 VCC1_5_B[24] AF18 VSS[031] VSS[129] N5
+1.5VS L23 2 1 M25 AE28 AF3 N6
FBMA-L11-201209-221LMA30T_0805 VCC1_5_B[25] VCC_DMI[1] VSS[032] VSS[130]
1 N23 VCC1_5_B[26] VCC_DMI[2] AE29 AF4 VSS[033] VSS[131] P12
1 1 N24 VCC1_5_B[27] +VCCP AG5 VSS[034] VSS[132] P13
VCC1_5_B ~675mA C376 + C363 C384 C377 N25 AC23 V_CPU_IO ~1mA AG6 P14
VCC1_5_B[28] V_CPU_IO[1] VSS[035] VSS[133]
P24 VCC1_5_B[29] V_CPU_IO[2] AC24 1 1 AH10 VSS[036] VSS[134] P15
220U_D2_4VMR15 10U_0805_10V4Z P25 C388 C412 C401 (4.7UF*1, 0.1UF*2) AH13 P16
2 2 2 VCC1_5_B[30] VSS[037] VSS[135]
R24 VCC1_5_B[31] VCC3_3[01] AF29 AH16 VSS[038] VSS[136] P17
10U_0805_10V4Z 2.2U_0805_10V6K R25 4.7U_0805_10V4Z 0.1U_0402_16V4Z AH19 P23
VCC1_5_B[32] 2 2 VSS[039] VSS[137]
R26 VCC1_5_B[33] VCC3_3[02] AD2 AH2 VSS[040] VSS[138] P28
R27 0.1U_0402_16V4Z AF28 P29
VCC1_5_B[34] VSS[041] VSS[139]
T23 VCC1_5_B[35] VCC3_3[03] AC8 AH22 VSS[042] VSS[140] R11
C +1.5VS_SATAPLL_ICH C
T24 AD8 close to AD2 AH24 R12
VCCP_CORE
VCC1_5_B[36] VCC3_3[04] VSS[043] VSS[141]
T27 VCC1_5_B[37] VCC3_3[05] AE8 AH26 VSS[044] VSS[142] R13
+1.5VS L32 1 2 T28 AF8 +3VS AH3 R14
MBK1608121YZF_0603 VCC1_5_B[38] VCC3_3[06] VSS[045] VSS[143]
T29 VCC1_5_B[39] AH4 VSS[046] VSS[144] R15
1 U24 VCC1_5_B[40] VCC3_3[07] AA3 1 1 1 AH8 VSS[047] VSS[145] R16
C448 C437 U25 U7 C423 C415 C399 AJ5 R17
VCC1_5_B[41] VCC3_3[08] VSS[048] VSS[146]
V23 VCC1_5_B[42] VCC3_3[09] V7 B11 VSS[049] VSS[147] R18
10U_0805_10V4Z V24 W1 0.1U_0402_16V4Z 0.1U_0402_16V4Z VCC3_3 ~278mA B14 R28
2 VCC1_5_B[43] VCC3_3[10] 2 2 2 VSS[050] VSS[148]
(10UF*1, 1UF*1) V25 W6 B17 R4
IDE
1U_0603_10V4Z VCC1_5_B[44] VCC3_3[11] 0.1U_0402_16V4Z VSS[051] VSS[149]
W25 VCC1_5_B[45] VCC3_3[12] W7 B2 VSS[052] VSS[150] T12
Y25 VCC1_5_B[46] VCC3_3[13] Y7 Add for Audio low voltage mode B20 VSS[053] VSS[151] T13
close to AF29 close to AA3 B22 VSS[054] VSS[152] T14
AJ6 VCCSATAPLL VCC3_3[14] A8 B8 VSS[055] VSS[153] T15
VCC3_3[15] B15 +3VS C24 VSS[056] VSS[154] T16
+1.5VS AE7 VCC1_5_A[01] VCC3_3[16] B18 C26 VSS[057] VSS[155] T17
AF7 VCC1_5_A[02] VCC3_3[17] B4 1 1 1 C27 VSS[058] VSS[156] T2
ARX
AG7 B9 C362 C361 C359 C6 U12

C419 C414 VCC1_5_A[03] VCC3_3[18] VSS[059] VSS[157]
AH7 VCC1_5_A[04] VCC3_3[19] C15 +3VS D12 VSS[060] VSS[158] U13
AJ7 D13 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 D15 U14
PCI
1U_0603_10V4Z VCC1_5_A[05] VCC3_3[20] 2 2 2 C405 VSS[061] VSS[159]

VCC3_3[21] D5 D18 VSS[062] VSS[160] U15
1U_0603_10V4Z AC1 E10 0.1U_0402_16V4Z D2 U16
VCC1_5_A[06] VCC3_3[22] 0.1U_0402_16V4Z VSS[063] VSS[161]
close to AE7 AC2 VCC1_5_A[07] VCC3_3[23] E7
2
D4 VSS[064] VSS[162] U17
ATX
AC3 VCC1_5_A[08] VCC3_3[24] F11 E21 VSS[065] VSS[163] U23

AC4 VCC1_5_A[09] VCCHDA~32mA +VCCSUS_HDA_ICH
E24 VSS[066] VSS[164] U26
AC5 VCC1_5_A[10] VCCHDA AC12 E4 VSS[067] VSS[165] U27
close to AC1 VCCSusHDA~32mA E9 VSS[068] VSS[166] U3
AC10 AD11 R323 +3V_STB F15 U5
VCC1_5_A[11] VCCSUSHDA 0_0603_5% VSS[069] VSS[167]
VCC1_5_A ~1.56A AC9 VCC1_5_A[12] TP_VCCSUS1_05_ICH_1
1
C416
E23 VSS[070] VSS[168] V13
VCCSUS1_05[1] J6 PAD T22 F28 VSS[071] VSS[169] V15
VCCUSBPLL ~10mA AA5 VCC1_5_A[13] VCCSUS1_05[2] AF20 TP_VCCSUS1_05_ICH_2 PAD T26 F29 VSS[072] VSS[170] V28
B AA6 0.1U_0402_16V4Z F7 V29 B
VCC1_5_A[14] 2 VSS[073] VSS[171]
VCCSUS1_5[1] AC16 TP_VCCSUS1_5_ICH_1 PAD T25 G1 VSS[074] VSS[172] W2
G12 VCC1_5_A[15] E2 VSS[075] VSS[173] W26
+1.5VS G17 J7 TP_VCCSUS1_5_ICH_2 PAD G10 W27
VCC1_5_A[16] VCCSUS1_5[2] T23 VSS[076] VSS[174]
H7 VCC1_5_A[17] G13 VSS[077] VSS[175] Y28
1 1 1 C3 VCCSUS3_3 1 2 +3V_STB G19 Y29
C379 C374 0.1U_0402_16V4Z VCCSUS3_3[01] R303 0_0805_5% VSS[078] VSS[176]
AC7 VCC1_5_A[18] G23 VSS[079] VSS[177] Y4
C382 +
0.1U_0402_16V4Z
AD7 VCC1_5_A[19] VCCSUS3_3[02] AC18
C386 C407
1
C406
1 VCCSus3_3~177mA G25 VSS[080] VSS[178] AB4
VCCSUS3_3[03] AC21 G26 VSS[081] VSS[179] AB23
220U_D2_4VMR15 2 2
D1 AC22 G27 AB5
VCCPSUS
@ 2 VCCUSBPLL VCCSUS3_3[04] 4.7U_0805_10V4Z 0.1U_0402_16V4Z VSS[082] VSS[180]

VCCSUS3_3[05] AG20
2 2 (0.1UF*1, 0.022UF*2) H25 VSS[083] VSS[181] AB6
F1 VCC1_5_A[20] VCCSUS3_3[06] AH28 H28 VSS[084] VSS[182] AD5
USB CORE
L6 0.1U_0402_16V4Z H29 U4
VCC1_5_A[21] VSS[085] VSS[183]
close to F1 L7 VCC1_5_A[22] VCCSUS3_3[07] P6 H3 VSS[086] VSS[184] W24
close to D1 M6 VCC1_5_A[23] VCCSUS3_3[08] P7 H6 VSS[087]
M7 VCC1_5_A[24] VCCSUS3_3[09] C1 close to P6 close to AC18 J1 VSS[088] VSS_NCTF[01] A1
+3VS VCCSUS3_3[10] N7 J25 VSS[089] VSS_NCTF[02] A2
1 W23 VCC1_5_A[25] VCCSUS3_3[11] P1 J26 VSS[090] VSS_NCTF[03] A28
VCCLAN3_3 ~18mA C372 P2 J27 A29
TP_VCCLAN1_05_ICH_1 F17 VCCSUS3_3[12] VSS[091] VSS_NCTF[04]
T19 PAD P3 J4 AH1
VCCPUSB
TP_VCCLAN1_05_ICH_2 G18 VCCLAN1_05[1] VCCSUS3_3[13] VSS[092] VSS_NCTF[05]

T18 PAD VCCLAN1_05[2] VCCSUS3_3[14] P4 J5 VSS[093] VSS_NCTF[06] AH29
2
VCCSUS3_3[15] P5 K23 VSS[094] VSS_NCTF[07] AJ1
0.1U_0402_16V4Z F19 R1 K28 AJ2
VCCLAN3_3[1] VCCSUS3_3[16] VSS[095] VSS_NCTF[08]
G20 VCCLAN3_3[2] VCCSUS3_3[17] R3 K29 VSS[096] VSS_NCTF[09] AJ28
VCCSUS3_3[18] R5 1 K3 VSS[097] VSS_NCTF[10] AJ29
+1.5VS +VCC_GLANPLL_R 1 2 +VCC_GLANPLL_ICH A24 R6 @ C339 @ C354 K6 B1
R95 1_0603_5% L10 MBK1608121YZF_0603 VCCGLANPLL VCCSUS3_3[19] VSS[098] VSS_NCTF[11]
1 VSS_NCTF[12] B29
GLAN POWER
A26 VCCGLAN1_5[1] VCCCL1_05 G22 TP_VCCCL1_05_ICH PAD T21

1U_0603_10V4Z 0.1U_0402_16V4Z
C72 2 ICH8M REV 1.0
VCCGLANPLL~23mA (10UF*1, 1UF*1)10U_0805_10V4Z C71
A27 VCCGLAN1_5[2] +VCCCL1_5_INT_ICH
B26 VCCGLAN1_5[3] VCCCL1_5 A22
A 2 A
B27 VCCGLAN1_5[4]
2.2U_0805_10V6K B28 F20 +3VS (0.1UF*1)
VCCGLAN1_5[5] VCCCL3_3[1]
VCCCL3_3[2] G21
B25 VCCGLAN3_3 18mA
+1.5VS_PCIE_ICH
VCCGLAN1_5 ~80mA C340
1mA ICH8M REV 1.0
(220UF*1, 1UF*1)
+3VS Security Classification Compal Secret Data Compal Electronics, Inc.
4.7U_0805_10V4Z 2006/08/18 2007/8/18 Title
IFTXX M/B LA-3541P Schematic
Custom 0.2
LA-3691P
5 4 3 2 1
A B C D E
Mini-Express Card for 3G Or TV Tuner

Mini-Express Card for WLAN
+3VS +1.5VS
+3VALW
1 1 1 1 1
1
C365 C370 C364 C369 C368 C367
4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 0.1U_0402_16V4Z
1 2 1
JP18
<22,25,30> ICH_PCIE_WAKE# ICH_PCIE_WAKE# 1 2 +3VS
BT_ACTIVE @ R306 1 0_0402_5% 1 2
2 3 3 4 4
WLAN_ACTIVE @ R305 1 2 0_0402_5% 5 6 +1.5VS
W LAN_CLKREQ# 5 6
<16> WLAN_CLKREQ# 7 7 8 8
9 9 10 10
<16> CLK_PCIE_WLAN# 11 11 12 12
<16> CLK_PCIE_WLAN 13 13 14 14
15 15 16 16
17 17 18 18
19 20 WL_OFF#
19 20 WL_OFF# <32>
21 22 PLT_RST_BUF#
21 22 PLT_RST_BUF# <8,17,20,22,25,30>
<22> PCIE_PTX_C_IRX_N2 23 23 24 24 +3VALW
<22> PCIE_PTX_C_IRX_P2 25 25 26 26
27 27 28 28
29 29 30 30 D_CK_SCLK <14,15,16,25>
<22> PCIE_ITX_C_PRX_N2 31 31 32 32
33 34 D_CK_SDATA <14,15,16,25>
<22> PCIE_ITX_C_PRX_P2 33 34
35 35 36 36 USB20_N1 <22>
37 37 38 38 USB20_P1 <22>
39 39 40 40
2
41 42 @ R5001 2 0_0402_5% 2
41 42 (WWAN_LED#) WLAN_LED#
43 43 44 44 WLAN_LED# <35>
45 45 46 46
47 47 48 48
49 49 50 50
2005/09/27 modified. 51 51 52 52
Base on OPTION GTM351E Datasheet Rev0.1 53 54 @ R288
GND1 GND2
1 2 +5VS
Vcc 3.3V +/- 8% FOX_AS0B226-S56N-7F 100K_0402_5%
Peak Icc 2750mA ME@
with max supply droop 50mA
Average Icc 1000mA
+5VS
1
R98
10K_0402_1%
1 2
3 Q9 3
DTC114EKA_SC59-3
<32> BT_OFF# 2 BT MODULE CONN

+3VS +3VS_BT
Q8
3
3 1 AO3413_SOT23-32 1
C60
0.1U_0402_16V4Z
G
<35> BT_LED#
2
JP6
1
1 1
2 2
<22> USB20_N7 USB20_N7 3
USB20_P7 3
<22> USB20_P7 4 4
Q7 2 BTON_LED 5
DTC124EK_SC59 BT_ACTIVE 5
6 6
WLAN_ACTIVE 7 7
1
8 8
9
3
R94 GND1
10 GND2
10K_0402_5%
MOLEX_53780-0870
2
ME@
4 4
Security Classification
2006/08/05
Compal Secret Data
2007/08/05 Title
Mini-Card/3G/FeliCa/FP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3691P 0.2
A B C D E
A B C D E
+1.5VS_CARD1
Imax = 0.75A
New Card Socket (Left/TOP)
1 1
Express Card Power Switch C202 C201 JP9
10U_0805_10V4Z 0.1U_0402_16V4Z
2 2
+1.5VS U11 1 GND
+1.5VS_CARD1 40mil <22> USB20_N5 2 USB_D-
2 1 12 1.5Vin 1.5Vout 11 <22> USB20_P5 3 USB_D+
1 C222 0.1U_0402_16V4Z CPUSB# 1
14 1.5Vin 1.5Vout 13 4 CPUSB#
+3VS 5 RSV
+3VS_CARD1 60mils +3VS_CARD1
6 RSV
2 1 2 3.3Vin 3.3Vout 3 <14,15,16,24> D_CK_SCLK 7 SMB_CLK
C223 0.1U_0402_16V4Z 4 5 Imax = 1.35A 8
3.3Vin 3.3Vout <14,15,16,24> D_CK_SDATA SMB_DATA
+3VALW +3VALW_CARD1 40mil +1.5VS_CARD1 9 +1.5V
2 1 17 AUX_IN AUX_OUT 15 10 +1.5V
C212 0.1U_0402_16V4Z 1 1 <22,24,30> ICH_PCIE_WAKE# 11
PLT_RST# WAKE#
<8,17,20,22,24,30> PLT_RST_BUF# 6 SYSRST# OC# 19 +3VALW_CARD1 12 +3.3VAUX
C213 C214 PERST# 13
SYSON PERST# 10U_0805_10V4Z 0.1U_0402_16V4Z PERST#
<32,37,42> SYSON 20 SHDN# PERST# 8 +3VS_CARD1 14 +3.3V
2 2
15 +3.3V
SUSP# 1 16 16
<17,32,37,40,42,43,44> SUSP# STBY# NC <16> EXP_CLKREQ# CLKREQ#
CPUSB# 17 CPPE#
+3VALW 2 R200 1 100K_0402_5% 10 CPPE# GND 7 <16> CLK_PCIE_EXP# 18 REFCLK-
<16> CLK_PCIE_EXP 19 REFCLK+
CPUSB# 9 20
<22> CPUSB# CPUSB# GND
<22> PCIE_PTX_C_IRX_N3 21 PERn0
18 +3VALW_CARD1 22
RCLKEN <22> PCIE_PTX_C_IRX_P3 PERp0
Imax = 0.275A 23 GND
R5538_QFN20 <22> PCIE_ITX_C_PRX_N3 24 PETn0
<22> PCIE_ITX_C_PRX_P3 25 PETp0
1 1 26 GND
C210 C211 27
10U_0805_10V4Z 0.1U_0402_16V4Z GND
28 GND
2 2
FOX_1CH4110C
ME@
(NEW)
2 2
3 +3V_STB 3
MDC CONN.
1
R485 C559 1U_0805_25V4Z

10K_0402_5% 1 2
JP10
2
R489 1 2 0_0402_5% 1 2
GND1 RES0
<21> HDA_SDOUT_MDC 3 IAC_SDATA_OUT RES1 4
5 GND2 3.3V 6 +3V_STB
@ D20 AZ _SYNC 7 8
<21> HDA_SYNC_MDC IAC_SYNC GND3
2 <21> HDA_SDIN1 R474 1 2AZ_SDIN3 9 10
<21> HDA_RST_MDC# IAC_SDATA_IN GND4
1 MDC_RST# 33_0402_5% 11 12
IAC_RESET# IAC_BITCLK HDA_BITCLK_MDC <21>
3
1
DAP202U_SOT323-3
GND
GND
GND
GND
GND
GND
@ R481
10_0402_5%
ACES_88018-124G
13
14
15
16
17
18
R475 ME@
2
10K_0402_5%
Connector for MDC Rev1.5 1
@C560
22P_0402_50V8J
2
4 4

NEW CARD & USB Connector
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B LA-3691P 0.2
A B C D E
A B C D E
+VDDA
AC97 Codec
1
28.7K for Module Design (VDDA = 4.702)
R242
10K_0402_1% +5VS +5VAMP
U15
(output = 250 mA)
60mil 40mil
2
2 1 L17 1 2 4 5 +VDDA
C285 FBMA-L11-201209-221LMA30T_0805 VIN VOUT
2
1U_0603_10V4Z +VDDA @ L16 1 2 2 DELAY SENSE or ADJ 6 1 4.85V
C272 1 FBMA-L11-201209-221LMA30T_0805 1
DOS_BEEP# <27>
R245 1 2 470P_0402_50V7K C567 7 1 R493 C278
10K_0402_1% C280 ERROR CNOISE 150K_0603_1% 10U_0805_10V4Z
1
C271 1U_0603_10V4Z 10U_0805_10V4Z 10U_1206_10V4Z 2
8 3 1
1
2 2 SD GND
1 2MONO_IN1 2 1 MONO_IN C578
1 R238 20K_0402_5% R229 SI9182DH-AD_MSOP8 1
1
1 2 10K_0402_1%
R239 20K_0402_5% 2
2
1
R236 560_0402_5% C C573 680P_0402_50V7K LINE_OUTL R492
<32> BEEP# 2 1 1 2 2 Q26 0.1U_0402_16V4Z 51K_0603_1%
1 C279 B 2SC2411KT146_SOT23-3 C572 680P_0402_50V7K LINE_OUTR
2
1
1U_0603_10V4Z E
3
@ C267
0.1U_0402_16V4Z R230
2 10K_0402_1%
1
D
2
<22> SB_SPKR 2 1 1 2 EAPD 2 Q24
C273 R227 G 2N7002_SOT23-3
1
1
1U_0603_10V4Z 560_0402_5% S @ SUB WOOFER SUPPORT
3
@ R231 D11
10K_0402_5% RB751V_SOD323
ALC262
2
+MIC2_VREFO +MIC1_VREFO_L +AUD_VREF

ALC861D
Window mode 10mil 10mil 10mil
Driver initial 1 1 1 1 1 1
DOS mode
@ C562 @ C561 @ C265 @ C263 @ C266 @ C264
ACPI 1U_0603_10V4Z 0.1U_0402_16V4Z 1U_0603_10V4Z 0.1U_0402_16V4Z 1U_0603_10V4Z 0.1U_0402_16V4Z
2 2 2GNDA 2 2GNDA 2
GNDA
RST
2 2
+VDDC
+AVDD_AC97
1 2 +3VS
R218 CHB1608U301_0603
1 1 1
L40
CHB1608U301_0603
EC_MUTE 12sec +VDDA 1 2 C257 C258 C259
2 2 2
1 1 1
0.1U_0402_16V4Z 10U_0805_10V4Z
C569 C555 C260 0.1U_0402_16V4Z
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
25
38
9
2 2 2 U13 1 2
@ C262 1000P_0402_50V7K
AVDD1
AVDD2
DVDD1
DVDD2
1 2
@ C261 1000P_0402_50V7K
DOS mode DOS mode <27> HP_L
HP_L 1 2 14 LINE2_L FRONT_OUT_L 35 C_LINE_OUTL 1 2 LINE_OUTL
LINE_OUTL <27>
C549 4.7U_0603_6.3V6K C566 1U_0603_10V4Z
HP_R 1 2 15 36 C_LINE_OUTR 1 2 LINE_OUTR
<27> HP_R LINE2_R FRONT_OUT_R LINE_OUTR <27>
C552 4.7U_0603_6.3V6K C565 1U_0603_10V4Z
1 2 16 39 C_HP_OUTL 1 2 HP_L
C553 2.2U_0603_6.3V6K MIC2_L SURR_OUT_L @ C557 1U_0603_10V4Z
RST <27> INT_MIC
1 2 17 MIC2_R SURR_OUT_R 41 C_HP_OUTR 1 2 HP_R
C556 2.2U_0603_6.3V6K @ C551 1U_0603_10V4Z
23 LINE1_L SIDESURR_OUT_L 45
24 LINE1_R SIDESURR_OUT_R 46
3 R468 20K_0402_5% CD_R_L 3
<28> INT_CD_L 2 1
R469 2 1 20K_0402_5% C550 1 2 1U_0402_6.3V4Z CD_RC_L 18 43
R479 20K_0402_5% CD_L CEN_OUT
2 1
R478 2 1 20K_0402_5% CD_R_R C558 1 2 1U_0402_6.3V4Z C D_RC_R 20 44 1 2 1 2
<28> INT_CD_R CD_R LFE_OUT @ R216 22_0402_5% @ C256 22P_0402_50V8J
CD_AGND 2 1 CD_GNA CD_GNA C554 1 2 1U_0603_10V4Z CD_GNDA 19
<28> CD_AGND CD_GND
R470 6 HDA_BITCLK_AUDIO
BIT_CLK HDA_BITCLK_AUDIO <21>
20K_0402_5% MIC C_MIC
EC_MUTE <27> EXT_MIC 1 2 21 MIC1_L
1
12sec C563 2.2U_0603_6.3V6K

R472 1 2 22 8 250_SDIN 1 2 HDA_SDIN0
MIC1_R SDATA_IN HDA_SDIN0 <21>
20K_0402_5% C564 2.2U_0603_6.3V6K R215 33_0402_5%
MONO_IN 12 37
PCBEEP NC
2
+3VS GNDA EAPD @ R213 1 2 0_0402_5% 29

R212 1 NC
<21> HDA_RST_AUDIO# 2 0_0402_5% 11 RESET#
LINE2_VREFO 31
<21> HDA_SYNC_AUDIO 10 SYNC 10mil
1
MIC1_VREFO_L 28 +MIC1_VREFO_L
@ R214
<21> HDA_SDOUT_AUDIO 5 SDATA_OUT
32
10mil
MIC1_VREFO_R +AUD_VREF
10K_0402_1% 2
GPIO GPIO0
3 30 +MIC2_VREFO
2
GPIO R467 1 GPIO1 MIC2_VREFO

<27> JACK_PLUG_MIC 2 20K_0402_1% 13 SENSE A 10mil
34 SENSE B VREF 27 2 1
1
C270 10U_0805_10V4Z
JACK_PLUG 1 2 47 40 2 1
<27> JACK_PLUG EAPD JDREF
@ R217 R232 39.2K_0402_1% R471 20K_0402_1%
1 2 10K_0402_1% 48 33 1 2 +VDDA
R463 0_0603_5% EAPD SPDIFO NC @ R228 10K_0402_5%
<27,32> EAPD 1 2
2
L37 0_0603_5% 4 26
DVSS1 AVSS1
7 DVSS2 AVSS2 42
1 2
4 R466 0_0603_5% ALC861-VD-GR_LQFP48 4
1 2
R482 0_0603_5%

GND GNDA Issued Date 2006/08/04 Deciphered Date 2006/10/06 Title
ALC861 VD Codec
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom IEL10 LA-3451P 0.2
A B C D E
A B C D E
+5VS
+3VS
APA2057A SPK/HP Amplifier
2
L44 BLM15BB121SN1D_0402
R504 1 2
0_0402_5%
9/5 ANPEC Suggest
W=40mil Place 1U cap between pin 1 and 2
680P_0402_50V7K
0.1U_0402_16V4Z
10U_0805_10V4Z
1 1 2
C274 C277 C275 C290
1U_0402_6.3V4Z
2 2 1
1 1
11
19
20
10
ME@
1
fo=1/(2*3.14*R*C)=106Hz 1 2 U16
@ R240 1.5K_0402_1% ACES_87213-0400G
R=1.5K / C= 1uF
CVDD
HVDD
PVDD
PVDD
VDD
1 2 SPKL+ R5 1 2 0_0402_5% SPK_L1+ 4 6
@ R253 1.5K_0402_1% SPKL- R4 0_0402_5% SPK_L1- 4 GND
1 2 3 3 GND 5
<26> LINE_OUTR 1 2 SPKR+ R3 1 2 0_0402_5% SPK_R1+ 2
R247 0_0402_5% INR_A SPKR+ SPKR- R2 0_0402_5% SPK_R1- 2
3 22 1 2 1
<26> LINE_OUTL 1 2 INL_A 5
INR_A
INL_A
ROUT+
ROUT- 21 SPKR- Speaker 1
JP2
R243 0_0402_5% 20mil
9/19 Realtek suggest R254 1 2 100K_0402_5% AMP_EN#27
/AMP EN LOUT+ 8 SPKL+
SPKL- Speaker
Headphone Speaker Conn.
LOUT- 9
@ C4
@ C3
@ C2
@ C1
Change C43/C44 from 2.2uf to 4.7uf. +5VS R226 1 2 100K_0402_5% HP_EN 24 HP EN HP_ROUT
17
<26> HP_R
AMP_RHPIN 1 2 INR _H 4 INR_H Change HP_R
HP_L 18 HP_LOUT Headphone 1 1 1 1
R491 39K_0402_5% INL_H 6 INL_H 2007-02-13
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
AMP_LHPIN 1 2
<26> HP_L 2 2 2 2
R488 39K_0402_5% 26 /SD
Revision
AMP_SD# 2057A 15 CVSS
CVSS
<26> DOS_BEEP# 1 2 2 1 AMP_BEEP 28 BEEP
1 2 @ C281 @ R246 0_0402_5% 16
@ R237 0_0402_5% 0.47U_0402_6.3V6K AMP_CP+ VSS
12 CP+
1 2 AMP_CP- 14 2 1
C269 1U_0402_6.3V4Z CP- GND
PGND 23
1
AMP_BIAS 25 7 C268
C282 2.2U_0603_6.3V6K BIAS PGND 1U_0402_6.3V4Z R1
CGND 13
2 0_0402_5%
2 1
C288 0.1U_0402_16V4Z @
APA2056_TSSOP28
2
9/5 If implement AMP BEEP, Swap C155 and R79.
IN_A Gain = 10dB (Internal Speaker)
2 R79 change from 0 Ohm to 47K 2
IN_H Gain = 0dB (Headphone)
EC_MUTE# AMP_SD#
+5VAMP <32> EC_MUTE# 2
R233 @
1
0_0402_5% EXT MIC
EAPD 2 1 +MIC1_VREFO_L
<26,32> EAPD
1
@ R234 0_0402_5%
R509
39K_0402_5%
Audio Jack
1
2
AMP_SD#
R465 JACK_PLUG_MIC
<26> JACK_PLUG_MIC
3K_0402_5%
2
1
D EXT_MIC_L EXT_MIC_L-2
<26> EXT_MIC 1 2
2
EC_MUTE#2 1 2 1 L36 FBM-11-160808-700T_0603

<32> EC_MUTE#
R510 0_0402_5% G R505
S 100K_0402_5% C585 +AUD_VREF
1
3
Q39 @ 0.1U_0402_16V4Z
2N7002KW_SOT323-3 2 C542 JP27
1
47P_0402_50V8J 1 1 2
2 1 2 PL-OUT
GNDA 3 3 4 4
@ C547 EXT_MIC_L-2 5 6 PR-OUT
10P_0402_50V8J 5 6
7 7 8 8
3 2 JACK_PLUG_MIC JACK_PLUG 3
9 9 10 10
GNDA 11 12
11 12
13 G1 G2 14
15 G3 G4 16
+MIC2_VREFO 17 18
G5 G6
INT MIC ACES_88028-1210M
ME@
1
End or Begain
R490 JACK_PLUG
<26> JACK_PLUG
3K_0402_5%
2
HP_ROUT 1 2 1 2 PR-OUT
MIC1 R476 47_0402_5% L38 FBM-11-160808-700T_0603
1 INT_MIC HP_LOUT 1 2 1 2 PL-OUT
INT_MIC <26>
2 GNDA R477 47_0402_5% L39 FBM-11-160808-700T_0603
1
1
WM-64PCY_2P 1
45@ @ R473 @ R480
C574 1K_0402_5% 1K_0402_5%
47P_0402_50V8J GNDA
2
2 GNDA
GNDA
1 1
@ C546 @ C548
10P_0402_50V8J 10P_0402_50V8J
2 GNDA 2
4 4

AMP/VR/Audio Jack/MIC
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3691P 0.2
A B C D E
A B C D E F G H
+5VS +3VS
+5VS Placea caps. near ODD CONN.
1 1 1 1 1 1
1 1 1 1 1 IDE_DD[0..15] C304
1 <21> IDE_DD[0..15] 1
C296 C295 C299 C300 C302 0.1U_0402_16V4Z
C248 C247 C249 C540 C541 IDE_DA[0..2] 1000P_0402_50V7K 0.1U_0402_16V4Z 1U_0603_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z
<21> IDE_DA[0..2] 2 2 2 2 2 2 @
1000P_0402_50V7K 0.1U_0402_16V4Z 1U_0603_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z
2 2 2 2 2
SATA HDD Conn.

JP28
1 2 JP14
<26> INT_CD_L 1 2 INT_CD_R <26>
<26> CD_AGND 3 3 4 4 1 GND
IDE_RST# 5 6 IDE_DD8 <21> SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_P0 2
IDE_DD7 5 6 IDE_DD9 SATA_ITX_C_DRX_N0 A+
7 7 8 8 <21> SATA_ITX_C_DRX_N0 3 A-
IDE_DD6 9 10 IDE_DD10 4
IDE_DD5 9 10 IDE_DD11 SATA_DTX_C_IRX_N0 SATA_DTX_IRX_N0 GND
11 11 12 12 <21> SATA_DTX_C_IRX_N0 1 2 5 B-
IDE_DD4 13 14 IDE_DD12 C312 3900P_0402_50V7K 6
IDE_DD3 13 14 IDE_DD13 SATA_DTX_C_IRX_P0 SATA_DTX_IRX_P0 B+
15 15 16 16 <21> SATA_DTX_C_IRX_P0 1 2 7 GND
IDE_DD2 17 18 IDE_DD14 C311 3900P_0402_50V7K
IDE_DD1 17 18 IDE_DD15
19 19 20 20
IDE_DD0 21 22 IDE_DDREQ 8
21 22 IDE_DDREQ <21> +3VS V33
23 24 IDE_DIOR# 9
23 24 IDE_DIOR# <21> V33
IDE_DIOW# 25 26 10
<21> IDE_DIOW# 25 26 V33
IDE_ DIORDY 27 28 IDE_DDACK# 11
<21> IDE_DIORDY 27 28 IDE_DDACK# <21> GND
IDE_IRQ 29 30 12
<21> IDE_IRQ 29 30 GND
IDE_DA1 31 32 IDE_PDIAG# 1 2 +5VS 13
IDE_DA0 31 32 IDE_DA2 R210 100K_0402_5% GND
33 33 34 34 +5VS 14 V5
<21> IDE_DCS1# IDE_DCS1# 35 36 IDE_DCS3# IDE_DCS3# <21> 15
IDE_LED# 35 36 V5
+5VS 2 1 37 37 38 38 16 V5
R209 100K_0402_5% +5VS 39 40 +5VS 17
2 39 40 GND 2
41 41 42 42 18 Reserved
43 43 44 44 19 GND
45 45 46 46 20 V12
1 2 IDE_CSEL 47 48 21
R206 470_0402_5% 47 48 V12
49 49 50 50 22 V12
OCTEK_CDR-50DY1G SUYIN_127043FB022S338ZR_RV
ME@
ME@
IDE_CSEL
(NEW)
Grounding for Master (When use SATA HDD) (NEW)
Open or High for Slaver (Normal) Change Library
+3VS
1
1 2
R221 0_0402_5%
@ R220
10K_0402_5%
2
3 3
IDE_RST#
D
<21> IDE_HRESET# 1 3
@ Q21
2N7002_SOT23-3
G
2
+5VS 2 1
@ R219 100K_0402_5%
U12
IDE_LED# 2
1 DRIVE_LED#
SATA_LED# DRIVE_LED# <33>
<21> SATA_LED# 3
4 DAP202U_SOT323-3 4

HDD & ODD Connector
B 0.2
LA-3691P
A B C D E F G H
5 4 3 2 1
D D
2 1
R438 0_0402_5%
C531 1
0.1U_0402_16V4Z 1 2
C580 0.1U_0402_16V4Z
2 U25
1 Used 9701 by 10K
1 AV_PLL
C526 R454 3
1U_0603_16V4Z 0_0402_5% A3V3
7 A3V3
2 SDPW R0_MSPWR 1 2 9 CARD_3V3
11 D3V3
33 D3V3 VREG 10 1 2
22 C523 1U_0603_16V4Z
CF_DMACK#
<BOM Structure> CF_CS0# 30
@ R495 1 2 0_0402_5% 8
+5VS
R496 1 2 0_0402_5% 1
RST#
MODE SEL
44
45
VBUS
RST#
3 in 1 Card Reader
+5VALW MODE_SEL
C532 XTLI 47 43
0.1U_0402_16V4Z XTLO XTLI XD_CLE/CF_SP19 JP26
48 XTLO XD_CE#/CF_D11_SP18 42
XD_ALE/CF_D4_SP17 41 +VCC_3IN1 6 VDD_SD
2 USB20_N8 SD_DATA2 SD_MS_DATA0
<22> USB20_N8 4 DM SD_DAT2/XD_RE#/CF_D12_SP16 40 9 DAT0_SD
USB20_P8 5 39 SD_DATA3 SD_MS_DATA1 10
<22> USB20_P8 DP SD_DAT3/XD_WE#/CF_D5_SP15 DAT1_SD
14 38 SD_DATA2 2
GPIO0 XD_RDY/CF_D13_SP14 SD_DATA3 DAT2_SD
SD_DAT4/XD_WP#/CF_D6_SP13 37 3 CD/DAT3_SD
35 SD_MS_CLK R458 1 2 22_0402_5% SDCLK 7
SD_DAT5/XD_D0/CF_D14_SP12 R446 1 CLK_SD
SD_CLK/XD_D1/MS_CLK/CF_D7_SP11 34 2 22_0402_5% SD_MS_CLK SDW P# 11 WP_SD
31 MS_DATA3_SD_DATA6 SDCMD 4
SD_DAT6/XD_D7/MS_D3/CF_D15_SP10 MSCD# S DCD# CMD_SD
MS_INS#/CF_IORD#_SP9 29 1 CD_SD
+3VS 28 MS_DATA2_SD_DATA7 5
SD_DAT7/XD_D2/MS_D2/CF_IOWR#_SP8 SD_MS_DATA0 VSS_SD
SD_DAT0/XD_D6/MS_D0/CF_RST#_SP7 27 8 VSS_SD
26 SD_MS_DATA1
SD_DAT1/XD_D3/MS_D1/CF_IORDY_SP6 MSBS
C XD_D5/MS_BS/CF_A2_SP5 25 C
23 SD_MS_DATA1 19
CF_A1/XD_D4_SP4 VCC_MS
2
21 S DCD# 13
R437 CF_A0/SD_CD#_SP3 SDW P# SD_MS_CLK MSCLK VCC_MS
CF_D0/SM_WPM#/XD_WP_SP2 20 14 SCLK_MS
100K_0402_5% 19 MSCD# 16
CF_D1/XD_CD#_SP1 SD_MS_DATA0 INS_MS
CF_D8/SM_CD#_SP0 18 18 SDIO_MS
MSBS 20
1
RST# MS_DATA3_SD_DATA6 BS_MS

2 RREF CF_CD# 13 15 RESERVED_MS
24 MS_DATA2_SD_DATA7 17
CF_DMARQ RESERVED_MS
1 12 DGND 21 VSS_MS
32 DGND CF_D10 15 12 VSS_MS
C514 16 22
1U_0402_6.3V4Z CF_D9 GND
6 AGND CF_D2 17 23 GND
2 SDCMD
46 AGND SD_CMD 36
PROCO_MDR019-C0-1202
ME@
RTS5158-GR_LQFP48_7x7
2
R447 R433
6.19K_0402_1% 0_0402_5%
1
1 2
R497 0_0402_5%
1
40mil @ R457 @ R459
+3VS U26 +VCC_3IN1 10_0402_5% 10_0402_5%
MODE SEL XTLI
2
C511 27P_0402_50V8J 3 1
SDPW R0_MSPWR VIN VOUT
4 VIN/CE VOUT 5
1U_0603_10V4Z
150K_0402_5%
1
0.1U_0402_16V4Z
B 2 1 @ C536 @ C537 B
GND
1
C538
R462
1 10P_0402_50V8J 10P_0402_50V8J
1 RT9701-PB_SOT23-5
1
@ C513 R436 R501 @ @

2
C535
0.1U_0402_16V4Z 10K_0402_5% Y2 100K_0402_5%
2
2
2 12MHZ_16P_6X12000012
2
2 @
2
XTLO
C515 27P_0402_50V8J reserved power circuit
A A

1394+3 in 1 Card
Custom LA-3691P 0.2
5 4 3 2 1
A B C D E
Layout Notice : 1.2V filter. Place as close

chip as possible.
L15 Layout Notice : Place as close
Layout Notice : Filter place as close FBM-L11-321611-260-LMT_1206 +1.2V_LAN
chip as possible.
chip as possible. 1 Q12 2 +3VALW_VDDIO
AO3414_SOT23
4.7U_0805_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+2.5V_LAN
S
+3VALW 1 3 2 2 2 2 2 2 2 2 2
2 1 +XTALVDD
C456
C502
C503
C506
C481
C461
C460
C476
C457
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L35 FBM-L11-160808-601LMT_0603
2
2 2 2
G
2
C488 1 1 1 1 1 1 1 1 1
C468
C505
C486
C507
4 0.1U_0402_16V4Z 4
1
+VSB 1 2
R174 33K_0402_5% 1 1 1
2 1 +LAN_AVDD 1
1
L31 FBM-L11-160808-601LMT_0603 D C132
2 2
EN_WOL 2 0.1U_0603_25V7K
<32> EN_WOL
C450 C449 G
0.1U_0402_16V4Z 0.1U_0402_16V4Z Q11 S 2
3
1 1 2N7002_SOT23
U22
41 LAN_TX0-
close to each of the pins 38, 45, and 52 RDN LAN_TX0- <31>
28 40 LAN_TX0+
<16> CLK_PCIE_LAN# PCIE_REFCLK_N RDP LAN_TX0+ <31>
2 1 +LAN_BIASVDD 42 LAN_RX1-
TDN LAN_RX1- <31>
L29 FBM-L11-160808-601LMT_0603
1 29 43 LAN_RX1+
<16> CLK_PCIE_LAN PCIE_REFCLK_P TDP LAN_RX1+ <31>
48 LAN_TX2-
C455 DC LAN_TX2+
<16> CLKREQ_LAN# 11 CLKREQ# DC 47
0.1U_0402_16V4Z (CLKREQ#) and (ENERGY_DET) are 49 LAN_TX3-
2 only supported in BCM5787M DC LAN_TX3+
1 2 DC 50
+1.2V_LAN R426 4.7K_0402_5%
LAN_LOW_PWR 1 2 3 LOW PWR
2 1 @ R432 0_0402_5% +3VALW_VDDIO Place closed to L14 & K14
+AVDDL
L28 FBM-L11-160808-601LMT_0603
2 2 1 2 +3VS 1 2 CBE#1 53 2 R425 1 2 0_0402_5% LINKLED# <31>
@ R428 100K_0402_5% R371 1K_0402_5% VMAIN_PRSNT LINKLED#
SPD100LED# 1 R424 1 2 0_0402_5% C516 1 2 0.1U_0402_16V4Z
C439 C451 +3VALW_VDDIO 1 2 54 67 R420@1 2 0_0402_5%
4.7U_0805_6.3V6K 0.1U_0402_16V4Z R380 1K_0402_5% VAUX_PRSNT SERIAL_DI C512 1
TRAFFICLED# 66 ACTIVITY# <31> 2 4.7U_0603_6.3V6K
1 1
3
1 2 59 65 LAN_CLK
LAN_ENERGY_DET ENERGY_DET SCLK
2 1 +GPHY_PLLVDD @ R398 0_0402_5% 63 SI CTL12 Q33 1
L27 FBM-L11-160808-601LMT_0603 NC LAN_DATA MMJT9435T1G_SOT223
2 2 +GPHY_PLLVDD 35 DC SO 64
62 CS# +1.2V_LAN
3 C443 C452 SERIAL_DO 3
<22> PCIE_ITX_C_PRX_N4 32
2
4
4.7U_0805_6.3V6K 0.1U_0402_16V4Z PCIE_RXD_N
1 1
<22> PCIE_ITX_C_PRX_P4 31 PCIE_RXD_P 1 1
14 CTL12
REGCTL12
<22> PCIE_PTX_C_IRX_N4 2 1 PCIE_MRX_C_LTX_N2 25 PCIE_TXD_N REGCTL25 18 CTL25 C510 C509
2 1 +PCIE_PLLVDD 0.1U_0402_16V4Z C484 37 2 1 0.1U_0402_16V4Z 10U_0805_10V4Z
L33 FBM-L11-160808-601LMT_0603 RDAC 2REG_GND 2
2 2 <22> PCIE_PTX_C_IRX_P4 2 1 PCIE_MRX_C_LTX_P2 26 PCIE_TXD_P
R357 1K_0402_1%
0.1U_0402_16V4Z C478
C470
C459 0.1U_0402_16V4Z 23 +XTALVDD
4.7U_0805_6.3V6K 1 1 XTALVDD
<8,17,20,22,24,25> PLT_RST_BUF# 10 PERST# VDDIO 6 +3VALW_VDDIO
15 +3VALW_VDDIO
VDDIO
<22,24,25> ICH_PCIE_WAKE# 1 2 12 WAKE VDDIO 19
2 1 +PCIE_VDD @ R427 0_0402_5% 56 1 2
L30 FBM-L11-160808-601LMT_0603 VDDIO C508
1 2 <32> LAN_WAKE# 1 2 VDDIO 61
R431 0_0402_5% 0.1U_0402_16V4Z
C453 C475 <16,22> ICH_SMBCLK 1 2 58 17
DC VDDP +2.5V_LAN
4.7U_0805_6.3V6K 0.1U_0402_16V4Z @ R394 0_0402_5%
2 1
1 2 57
VDDP 68 4.7uF
<16,22> ICH_SMBDATA DC
@ R383 0_0402_5% 5 +1.2V_LAN
VDDC
4
PCIE_GND SMBus to support ASF 13
VDDC
VDDC 20
1 2 4 GPIO_0 VDDC 34
@ R502 0_0402_5% 55 CTL25 Q31 3
LAN_WP VDDC MBT35200MT1G_TSOP6
7 GPIO_1 VDDC 60
No CIS Symbol
8 36 +LAN_BIASVDD
1
2
5
6
XTALO GPIO_2 BIASVDD
2 1 PCIE_PLLVDD 30 +PCIE_PLLVDD
R422 200_0603_1% 9 27 +PCIE_VDD
XTALI UART_MODE PCIE_VDD
PCIE_VDD 33
27P_0402_50V8J
27P_0402_50V8J
Y1 1 2 38 +LAN_AVDD
2 XTALI DC 2
21 XTALI DC 45
2 2 DC 52
C495
C501
25MHZ_20P_1BG25000CK1A XTALO 22 XTALO

AVDDL 39 +AVDDL +2.5V_LAN
DC 44
1 1 REG_GND
Pin16 conect to C1206 Pin1 16 VSS DC 46
51 Notice : 4.7u 6.3V capactor Thickness 1.25mm
GND
PCIE_GND DC
24 VSS
BCM5906MKMLG P12_QFN68_10x10 Layout Notice : Filter place as close
69
chip as possible.
Pin 24 conect to C1339 Pin1
Layout Notice : Place as close
chip as possible.
+3VALW_VDDIO
+2.5V_LAN
1 2
1
C116
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
R165 R166 2 1 2
C504
C496
C498
4.7K_0402_5% 4.7K_0402_5%
2
U7
1 2 1
8 VCC A0 1
LAN_WP 7 2
LAN_CLK WP A1
6 SCL NC 3
LAN_DATA 5 4
SDA GND
AT24C02_SO8
1 1
Close to U87
LAN_CLK 1 2
R419 4.7K_0402_5%
SI 2 1
@ R416 4.7K_0402_5%
CS# 1 2
@ R409 4.7K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
BCM5787M-GLAN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom IEL20 LA-3471P 0.2
A B C D E
5 4 3 2 1
+2.5V_LAN
1
D
R331
0_0402_5% T24
Lan Conn. D
2 1
LAN_TX0+ 1 16 MDO0+ @ C1691 2 220P_0402_50V7K C125 68P_0402_50V8K
<30> LAN_TX0+
2
LAN_TX0- RD+ RX+ MDO0- JP21
<30> LAN_TX0- 2 RD- RX- 15
C413 1 2 0.1U_0402_16V4Z TCT 3 14 MCT0 2 1 R175 ACTIVITY# 1 2 12
CT CT <30> ACTIVITY# Amber LED-
4 13 75_0402_5% R170 300_0402_5%
NC NC
5 NC NC 12 +3VALW_VDDIO 11 Amber LED+ SHLD4 16
C428 1 2 0.1U_0402_16V4Z TCT 6 11 MCT1 2 1 R178
LAN_RX1+ CT CT MDO1+ 75_0402_5% MDO3-
<30> LAN_RX1+ 7 TD+ TX+ 10 10mil 8 PR4- SHLD3 15
LAN_RX1- 8 9 MDO1-
<30> LAN_RX1- TD- TX- MDO3+ 7 PR4+
350uH_NS0013LF MDO1- 6 PR2-
MDO2- 5 PR3-
MDO2+ 4 PR3+
MDO1+ 3 PR2+
Change C468,C470,C473,C474,C475,C476 from 0.01uF to 0.1uF MDO0- 2 PR1-
SHLD2 14
MDO0+ 1 PR1+
LINKLED# 1 210mil 10 13
<30> LINKLED# Green LED- SHLD1
R183 300_0402_5%
LAN_RX1- 2 1 C446 9
R373 49.9_0402_1% +3VALW_VDDIO Green LED+
1 2 0.1U_0402_16V4Z
LAN_RX1+ 2 1 2 1 TYCO_2-1734819-5
R372 49.9_0402_1% C160 68P_0402_50V8K
C C
1 2
@ C123 220P_0402_50V7K
LAN_TX0- 2 1 C447
R374 49.9_0402_1% 1 2 0.1U_0402_16V4Z
LAN_TX0+ 2 1
R375 49.9_0402_1%
RJ45_PR C151 1 2 1000P_1206_2KV7K

near LAN controller
B B
A A

LAN CONTROLLER
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-3691P 0.2
5 4 3 2 1
+3VALW
+EC_AVCC
1 1 1 1 1 1 +5VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1000P_0402_50V7K
1000P_0402_50V7K
C23
C22
C21
C25
C40
C48
L8 1 2
+3VALW +EC_AVCC +5VALW
FBM-11-160808-601-T_0603
2 1
1
1 2 USB_ON C59
C44 2 2 2 2 2 2
0.1U_0402_16V4Z C46 R506 10K_0402_5% 1 2 0.1U_0402_16V4Z R65
111
125
1000P_0402_50V7K 100K_0402_1%
22
33
96
67
U1
9
1 ECAGND 2
1 2
L7 FBM-11-160808-601-T_0603 U4
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
2
8 VCC A0 1
7 WP A1 2
1 2 EC_SMB_CK1 6 3
+3V_STB SCL A2
@ R29 10K_0402_5% 1 21 INVT_PWM EC_SMB_DA1 5 4
<21> GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F INVT_PWM <18> SDA GND
2 1 2 23 BEEP#
<21> KB_RST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 BEEP# <26>
D6 RB751V_SOD323 3 26 AT24C16AN-10SU-2.7_SO8
<22,34> SERIRQ SERIRQ# FANPWM1/GPIO12 EN_WOL <30>
4 27 ACOFF
<21,34> LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF <38,40>
LPC_AD3 5
<21,34> LPC_AD3 LAD3
1
LPC_AD2 7 PWM Output
<21,34> LPC_AD2 LAD2
LPC_AD1 8 63 BATT_TEMP R63
<21,34> LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <39>
LPC_AD0 BATT_OVP 100K_0402_1%
<21,34> LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64 BATT_OVP <40>
2 1 2 1 ADP_I/AD2/GPIO3A 65 ADP_I <40>
@ C35 22P_0402_50V8J @ R38 10_0402_5% 12 AD Input 66 BRD_ID
<16> CLK_PCI_LPC
2
PCICLK AD3/GPIO3B SKU_ID
<20,34> PCI_RST# 13 PCIRST#/GPIO05 AD4/GPIO42 75
1 2 EC_RST# 37 76 UMA_DES
+3VALW ECRST# SELIO2#/AD5/GPIO43
R59 47K_0402_5% EC_SCI# 20 Analog Board ID definition,
<22> EC_SCI# SCI#/GPIO0E
2 PM_CLKRUN# 38
CLKRUN#/GPIO1D
68 DAC_BRIG Please see page 3.
DAC_BRIG/DA0/GPIO3C DAC_BRIG <18>
C57 70 EN_FAN1 +3VALW
EN_DFAN1/DA1/GPIO3D EN_FAN1 <4>
0.1U_0402_16V4Z DA Output 71 IR EF
1 IREF/DA2/GPIO3E IREF <40>
KSI0 55 72
KSI1 KSI0/GPIO30 DA3/GPIO3F EC_MUTE# +3VALW +3VALW +3VALW
<34> KSI1 56 KSI1/GPIO31 1 2
KSI2 57 R40 @ 10K_0402_5%
<33,34> KSI2 KSI2/GPIO32
KSI3 58 83
KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE# <27>
2
KSI4 59 84
KSI4/GPIO34 PSDAT1/GPIO4B USB_ON <36>
KSI5 60 85 @ R50 R57 GM@ R45
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C 100K_0402_1% 100K_0402_1% 100K_0402_1%
61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86
KSO[0..15] KSI7 62 87 TP_CLK
<34> KSO[0..15] KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK <34>
KSO0 39 88 TP_DATA
TP_DATA <34>
1
KSI[0..7] KSO1 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F
<33,34> KSI[0..7]
40 KSO1/GPIO21 KB925 SPI STRAP PIN
KSO2 41 SKU_ID BRD_ID Vab UMA_DES
KSO3 KSO2/GPIO22 R26
42 KSO3/GPIO23 SDICS#/GPXOA00 97 1 2 4.7K_0402_5%
2
KSO4 43 98 1 1
KSO4/GPIO24 SDICLK/GPXOA01 BT_OFF# <24>
KSO5 R51 @ C41 R54 C47 PM@ R42
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
56K_0402_5%
8.2K_0402_5%
KSO6 45 109 2 1 56K_0402_5%
KSO6/GPIO26 Matrix SDIDI/GPXID0 +3VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
KSO7 46 SPI Device Interface R23 10K_0402_5%
KSO8 KSO7/GPIO27 2 2
47
1
KSO9 KSO8/GPIO28 FRD#SPI_SO
48 KSO9/GPIO29 SPIDI/RD# 119
KSO10 49 120 FWR#SPI_SI UMA_DES Vab
KSO11 50
KSO10/GPIO2A
KSO11/GPIO2B
SPIDO/WR#
SPI Flash ROM SPICLK/GPIO58 126 SPI_CLK ID
KSO12 51 128 FSEL#SPICS# 0 IHL00/IGT30 UMA 3.30V
KSO13 KSO12/GPIO2C SPICS#
52 KSO13/GPIO2D
KSO14 53 1 IHL00V2/V3 UMA 2.20V
KSO15 KSO14/GPIO2E
54 KSO15/GPIO2F CIR_RX/GPIO40 73 2 1 +3VALW
KSO16 81 74 R52 10K_0402_5% 2
<33> KSO16 KSO16/GPIO48 CIR_RLC_TX/GPIO41
KSO17 82 89
<33> KSO17 KSO17/GPIO49 FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52 90 CHARGE_LED0#
FSTCHG <40>
CHARGE_LED0# <35> 3 ID BRD ID R54/42(Rb) Vab
+3VALW 91 CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# <33>
EC_SMB_CK1 GPIO BATT_LOW_LED#/GPIO54 CHARGE_LED1# 4 I I 0 R01 (EVT)
<39> EC_SMB_CK1
EC_SMB_DA1
77
78
SCL1/GPIO44 92
93
CHARGE_LED1# <35>
H H
0 0V
<39> EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 NOVO# <33>
2
EC_SMB_CK2 SM Bus SYSON 5 L L 1 R02 (DVT)

R47
<4> EC_SMB_CK2
EC_SMB_DA2
79
80
SCL2/GPIO46 SYSON/GPIO56 95
121
SYSON <25,37,42>
0 0
8.2K 0.25V
<4> EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <45>
10K_0402_5% 6 IHL00V2/V3 VGA 0.25V 0 0 2 R03 (PVT)
AC_IN/GPIO59 127 ACIN <22,38>
V
18K 0.50V
7 IHL00/IGT30 VGA 0V 2 3 R10A (MP) 33K 0.82V
1
PM_SLP_S3# 6 100 3
<22> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# <22>
PM_SLP_S5# EC_LID_OUT# I 4 R01 (EVT)
1 2
<22> PM_SLP_S5#
EC_SMI#
14
15
PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 101
102 EC_ON
EC_LID_OUT# <22>
G
56K 1.19V
<30> LAN_WAKE# <22> EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON <33>
R46 0_0402_5% LID_SW# RB751V_SOD323 T 5 R02 (DVT)
<33> LID_SW#
SUSP#
16
17
LID_SW#/GPIO0A EC_SWI#/GPXO06 103
104 ICH_POK_EC D5 1 2 ICH_POK 3
100K 1.65V
<17,25,37,40,42,43,44> SUSP# SUSP#/GPIO0B ICH_PWROK/GPXO06 ICH_POK <8,22>
PBTN_OUT# GPO BKOFF# 0 6 R03 (PVT)
1 2 EC_PME#
<22> PBTN_OUT# 18
19
PBTN_OUT#/GPIO0C
GPIO
BKOFF#/GPXO08 105
106
BKOFF# <18>
1 2 1 2
200K 2.20V
EC_PME#/GPIO0D WL_OFF#/GPXO09 WL_OFF# <24> +3VS
@ R507 0_0402_5% EC_THERM# @ R16 0_0402_5% R22 10K_0402_5% 7 R10A (MP)
<4,22> EC_THERM#
FAN_SPEED1
25
28
EC_THERM#/GPIO11 GPXO10 107
108
NC 3.30V
<4> FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11 SCROLL_LED# <33>
S
<20> PCI_PME# 3 1
EC_TX_P80_DATA
29
30
FANFB2/GPIO15 R57/45(Ra)=100K Ohm
<14,15,34> EC_TX_P80_DATA EC_TX/GPIO16
@ Q1 EC_RX_P80_CLK 31 110 PM_SLP_S4# <22>
<14,15,34> EC_RX_P80_CLK EC_RX/GPIO17 PM_SLP_S4#/GPXID1
G
2N7002_SOT23 <33> ON/OFF# 32 112 ENBKL <18>

2
+3V_STB ON_OFF/GPIO18 ENBKL/GPXID2

<35> PWR_LED# 34 PWR_LED#/GPIO19 GPXID3 114 EAPD <26,27>
<33> NUM_LED# 36 NUMLED#/GPIO1A GPI GPXID4 115 KILL_SW# <36>
GPXID5 116 2 1 +3VALW
117 R21 10K_0402_5%
GPXID6 BATT_IN STB <37> +3VALW
GPXID7 118 BATT_IN
+3VALW XCLKI 122 no used at B-test
XCLKO XCLK1
123 124
XCLK0 V18R
8M SPI ROM
AGND
1 2 FRD#SPI_SO 1 20mils
GND
GND
GND
GND
GND
@ R20 100K_0402_1% U18

1 2 FSEL#SPICS# C293 8 4
@ R18 100K_0402_1% XCLKI VCC VSS
1 2XCLKO KB926QFA1_LQFP128 0.1U_0402_16V4Z
11
24
35
94
113
69
@ R25 20M_0603_5% 2
3 W
1 2 KSO17
ECAGND
@ R41 10K_0402_5% 7 HOLD

FSEL#SPICS# 2 1 SPI_CS# 1
R259 15_0402_5% S
+5VALW ECAGND
SPI_CLK 2 1 SPI_CLK_R 6
R19 15_0402_5% C
EC_SMB_CK1 +5VS FWR#SPI_SI 2 SPI_SI SPI_SO 2
1 2 1 5 D Q 2 1 FRD#SPI_SO
R48 4.7K_0402_5% C20 C19 R257 15_0402_5% R260 15_0402_5%
1
1 2 EC_SMB_DA1 TP_CLK 1 2 SST25LF080A_SO8-200mil

15P_0402_50V8J
15P_0402_50V8J
R44 4.7K_0402_5% R36 4.7K_0402_5%

IN
OUT
TP_DATA 1 2 2 1 2 1 SPI_CLK_R
R34 4.7K_0402_5% @ C292 @ R256 15_0402_5% JP11
10P_0402_25V8K SPI_CS# 1 2 +3VALW
SPI_SO 1 2
NC
NC
3 3 4 4
+3VALW 5 6 SPI_CLK_R
5 6 SPI_SI
7 8
2
7 8
E&T_2941-G08N-00E~D
ME@
32.768KHZ_12.5P_1TJS125BJ2A251
+3VS X1
1 2 EC_SMB_CK2
R49 4.7K_0402_5%
1 2 EC_SMB_DA2
R43 4.7K_0402_5% 1 1
C36 C37
@ 100P_0402_50V8J @ 100P_0402_50V8J
2 2 Issued Date 2006/08/04 Deciphered Date 2006/10/06 Title
BIOS & EC I/O Port
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom IGT30 LA-3571P 0.2
Power Button JP4
SW1 ACES_88716-1601-01
GND
GND
1 3
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
2 4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
+3VALW
SMT1-05_4P
6
5
+5VALW
ON/OFF switch TOP Side Switch Board Conn.
2
2 1
J1 @ JOPEN +5VS
2 1 R255 +5VALW 1 2
J3 @ JOPEN 100K_0402_5% R11 0_0402_5%
Bottom Side +3VALW 1 2
1
D12 @ R10 0_0402_5% DRIVE_LED#
<28> DRIVE_LED#
2 ON/OFF# CAPS_LED#
ON/OFF# <32> <32> CAPS_LED#
ON/OFFBTN# 1 NUM_LED#
ON/OFFBTN# <32> NUM_LED#
3 51_ON# SCROLL_LED#
51_ON# <38> <32> SCROLL_LED#
ON/OFFBTN#
+3VALW DAN202UT106_SC70-3
1
Q40 2
1
DTC124EK_SC59 C291 D13

<32> KSO16
1
R258 1000P_0402_50V7K RLZ20A_LL34
1 <32,34> KSI0
4.7K_0402_5%
2
2
EC_ON 1 2 2
<32> EC_ON <32> KSO17
R511 33K_0402_5%
<32,34> KSI2
NOVO_BTN#
3
MUTE# MUTE # KSI0 & KSO16
USER #
1
D
+3VALW
KSI2 & KSO17
2
G
S Q27
3
2N7002_SOT23
2
R15
100K_0402_5%
1
D4
NOVO# 2
<32> NOVO#
1 NOVO_BTN#
51_ON# 3
<38> 51_ON#
DAN202U_SC70
Lid Switch
+3VALW 1 2 +VCC_LID R244 1 2 100K_0402_5%

R241 0_0402_5%
2
A3212ELHLT-T_SOT23W-3
VDD
1
OUTPUT 3 LID_SW# <32>
C289
0.1U_0402_16V4Z 2
GND
2
C276
U14 10P_0402_50V8J
1

BIOS, I/O Port & K/B Connector
B 0.2
LA-3691P
5 4 3 2 1
D
INT_KBD Conn. D
KSI[0..7]
KSI[0..7] <32,33>
KSO[0..15]
KSO[0..15] <32>
For IHL00 To TP/B Conn.

ME@
ACES_85202-24051
KSI0 C65 1 2 @ 100P_0402_50V8J KSO4 C66 1 2 @ 100P_0402_50V8J KSI1 1
KSI7 1
2 2
KSI1 C73 1 2 @ 100P_0402_50V8J KSO5 C64 1 2 @ 100P_0402_50V8J KSI6 3 JP8
KSO9 3
4 4 +5VS 1 1
KSI2 C63 1 2 @ 100P_0402_50V8J KSO6 C82 1 2 @ 100P_0402_50V8J KSI4 5 2
KSI5 5 TP_DATA 2
6 6 <32> TP_DATA 3 3
KSI3 C78 1 2 @ 100P_0402_50V8J KSO7 C81 1 2 @ 100P_0402_50V8J KSO0 7 TP_CLK 4
7 <32> TP_CLK 4
KSI2 8 5
KSI4 C76 8 5
1 2 @ 100P_0402_50V8J KSO8 C67 1 2 @ 100P_0402_50V8J KSI3 9 9 6 6
KSO5 10 7
KSI5 C62 10 7
1 2 @ 100P_0402_50V8J KSO9 C61 1 2 @ 100P_0402_50V8J KSO1 11 11 8 8
KSI0 12
KSI6 C75 12
1 2 @ 100P_0402_50V8J KSO10 C85 1 2 @ 100P_0402_50V8J KSO2 13 13
ACES_87151-0807G
KSO4 14 ME@
KSI7 C74 14
1 2 @ 100P_0402_50V8J KSO11 C70 1 2 @ 100P_0402_50V8J KSO7 15 15
TP_DATA
KSO8 16
KSO0 C77 16
1 2 @ 100P_0402_50V8J KSO12 C83 1 2 @ 100P_0402_50V8J KSO6 17 17
TP_CLK
KSO3 18 +5VS
18
3
C KSO1 C79 1 2 @ 100P_0402_50V8J KSO13 C69 1 2 @ 100P_0402_50V8J KSO12 19 C
KSO13 19
20 20
KSO2 C80 1 2 @ 100P_0402_50V8J KSO14 C84 1 2 @ 100P_0402_50V8J KSO14 21 C117
KSO11 21 @ D10
22 22
KSO3 C68 1 2 @ 100P_0402_50V8J KSO15 C86 1 2 @ 100P_0402_50V8J KSO10 23 0.1U_0402_16V4Z PSOT24C_SOT23
KSO15 23
24
1
24
25 G1
26 G2
JP7
Update Footprint
FOR LPC SIO DEBUG PORT

JP13
1 1 +5VS
B B
2
2
3 3 +3VS
EC DEBUG PORT
4 4
5 JP12
5
6 6 CLK_14M_SIO <16> +3VALW 1 1
7 LPC_AD0 EC_TX_P80_DATA 2
7 LPC_AD0 <21,32> <14,15,32> EC_TX_P80_DATA 2
8 LPC_AD1 EC_RX_P80_CLK 3
8 LPC_AD1 <21,32> <14,15,32> EC_RX_P80_CLK 3
9 LPC_AD2 4
9 LPC_AD2 <21,32> 4
10 LPC_AD3
10 LPC_AD3 <21,32>
11 LPC_FRAME# ACES_85205-0400
11 LPC_FRAME# <21,32>
12 LPC_DRQ0# LPC_DRQ0# <21> ME@
12 PCI_RST#
13 13 PCI_RST# <20,32>
14 14 2 1
15 CLK_PCI_DB CLK_PCI_DB <16> R265 10K_0402_5%
15 SERIRQ
16 16 SERIRQ <22,32>
17 17
18 18
19 19
20 20
ACES_85201-2005
ME@
A A

EC ENE KB910L(Reserved)
B 0.2
LA-3691P
5 4 3 2 1
LED
+5VALW 1 2 2 1 LED3 PWR_LED# <32>

R249 300_0402_5% HT-191NB_BLUE_0603
LED1
Amber
+3VALW 1 2 4 A 3 CHARGE_LED1# <32>
R248 300_0402_5%
Blue
+5VALW 1 2 2 B 1 CHARGE_LED0# <32>
R250 300_0402_5%
HT-297UD/CB _BLUE/AMB_0603
Blue&Amber
LED2
Amber
+3VS 1 2 4 A 3 BT_LED# <24>
R252 300_0402_5%
Blue
+5VS 1 2 2 B 1 WLAN_LED# <24>
R251 300_0402_5%
HT-297UD/CB _BLUE/AMB_0603

MDC/CIR & LED
B 0.2
LA-3691P
A B C D E
USB Conn.
W=80mils
+USB_VCCC
ME@
ACES_87213-1000G
Kill SWITCH GND2 12
GND1 11
1 +3VALW 1
10 KILL_SW#
10
9 9
8 USB20_P4
8 USB20_P4 <22>
2
@ D2 7 USB20_N4
7 USB20_N4 <22>
DAN217_SC59 +3VS 6
+USB_VCCC +USB_VCCC 6 USB20_P2
5 5 USB20_P2 <22>
2
4 USB20_N2
4 USB20_N2 <22>
+USB_VCCC R7 3
+USB_VCCC 3
1 2
1
100K_0402_5% 2
1 1 1 1
+
1
C497 C499 C18 KILL_SW# JP5
KILL_SW# <32>
150U_D2_6.3VM 470P_0402_50V7K 470P_0402_50V7K W=80mils
2 2 2
2 +5VALW
U17
+USB_VCCC
USB CONN. 1 2
1 GND OUT 8
2 IN OUT 7
3 6 +USB_VCCA
IN OUT @ D17
C301
1 4 EN# OC# 5 USB_OC#4 <22>
USB20_P0 USB20_N6 +USB_VCCA
W=80mils
USB_OC#2 <22> 6 CH3 CH2 3
G545A1P1U_SO8 1 1
4.7U_0805_10V4Z C294 1
2 + C462 C473
0.1U_0402_16V4Z +USB_VCCA 5 2
2 @ Vp Vn 150U_D2_6.3VM 470P_0402_50V7K
2 2
<32> USB_ON
JP22
USB20_P6 4 1 USB20_N0 1
CH4 CH1 USB20_N0 VCC
<22> USB20_N0 2 D-
USB20_P0 3
CM1293-04SO_SOT23-6 <22> USB20_P0 D+
4 GND
5 GND1
6 GND2
7 GND3
8 GND4
SUYIN_020173MR004G579ZR
ME@
3 3
+5VALW
USB CONN. 2
+USB_VCCA
+USB_VCCA
U24
W=80mils
1 GND OUT 8
C527 0.1U_0402_16V4Z 2 7 1
IN OUT C528
2 1 3 IN OUT 6
<32> USB_ON USB_ON 4 5
EN# OC# USB_OC#6 <22>
470P_0402_50V7K
G545A1P1U_SO8 2
USB_OC#0 <22>
JP24
1 1 VCC
C500 USB20_N6 2
<22> USB20_N6 D-
@ 1000P_0402_50V7K USB20_P6 3
<22> USB20_P6 D+
4 GND
2
5 GND1
6 GND2
7 GND3
8 GND4
ME@
4 4

Power OK, Reset and RTC Circuit, TP
B 0.2
LA-3691P
A B C D E
A B C D E
1 +5VALW TO +5VS 1
+3VALW TO +3VS +1.8V to +1.8VS
+5VALW +5VS
+3VALW +3VS +1.8V +1.8VS
U28
8 1 U10 U9 PM@
D S
7 D S 2 8 D S 1 8 D S 1
2
6 D S 3 1 1 7 D S 2 7 D S 2 1 1
2
1 1 5 4 C575 C579 R484 6 3 1 1 6 3 C184 C185
C577 C571 D G D S C581 C582 R203 D S PM@ PM@ R193
1 1 5 D G 4 1 1 5 D G 4
AO4468_SO8 10U_0805_10V4Z 470_0603_5% C583 C584 C190 C191 10U_0805_10V4Z PM@
10U_0805_10V4Z 2 2
1U_0603_10V4Z AO4468_SO8 10U_0805_10V4Z 470_0603_5% PM@ PM@ AO4468_SO8 2 2
1U_0603_10V4Z 470_0603_5%
1
2 2
10U_0805_10V4Z 10U_0805_10V4Z 2 2
1U_0603_10V4Z 10U_0805_10V4Z
1 1
1
2 2
10U_0805_10V4Z 2 2
10U_0805_10V4Z
1
D D
1
D
2 SUSP 2 SUSP
G G 2 SUSP
+VSB 5VS_GATE S Q38 S Q19 G
3
R483 2N7002_SOT23 +VSB 1 2 2N7002_SOT23 +VSB 1.8VS_GATE S Q17 PM@
3
33K_0402_5% 1 R202 R192 PM@ 2N7002_SOT23
1
D C568 47K_0402_5% 33K_0402_5%

1 1
1
SUSP D C209 C189
2
1
Q37G 0.1U_0603_25V7K SUSP D PM@
2
2N7002_SOT23 2 Q18 G 0.1U_0603_25V7K SUSP 0.1U_0603_25V7K
S 2
3
2N7002_SOT23 S 2 G 2
3
Q15 PM@ S
3
2N7002_SOT23
2 2
+3VALW to +3V Transfer

+3VALW +3V_STB
J4 @
PAD-OPEN 3x3m
1 2
+5VALW
0.1U_0402_16V4Z
2
U27
8 1 R225
D S 100K_0402_5%
1 7 D S 2 1 1
C539 6 3 C545 C543
D S
5 4
1
10U_0805_10V4Z D G 10U_0805_10V4Z
2 @ AO4468_SO8 2 2 SYSON#
SYSON#
1
D
Q35 AOS3414 SYSON 2 Q23
<25,32,42> SYSON
G 2N7002_SOT23
D
1 3 S
3
1
+VSB
R224
100K_0402_5%
G
2
1
R464
2
33K_0402_5%
2
3 3
1
1
D C544
STB 2 Q36 0.1U_0603_25V7K RTCVREF +5VALW
<32> STB
G 2N7002_SOT23-3
S 2
3
2
R508 R223
10K_0402_5% 100K_0402_5%
@
1
SUSP
<44> SUSP
1
D
2 Q22
<17,25,32,40,42,43,44> SUSP#
G 2N7002_SOT23
S
3
1
+1.5VS +2.5VS +VCCP +0.9VS +1.8V +1.25VS
R222
100K_0402_5%
2
2
R235 R137 R262 R211 R191 R185
2
470_0603_5% 470_0603_5% 470_0603_5% 470_0603_5% 470_0603_5% 470_0603_5%
1
1
1
D D D D D D
2 SUSP 2 SUSP 2 SUSP 2 SUSP 2 SYSON# 2 SUSP
G G G G G G
4 S Q25 S Q10 S Q28 S Q20 S Q16 S Q14 4
3
2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23

DC Interface
B 0.2
LA-3691P
A B C D E
A B C D
ACIN BATT ONLY

DC030005Q00 Precharge detector Precharge detector
PL11 VIN Min. typ. Max. Min. typ. Max.
PJP1 ADPIN FBMA-L11-322513-201LMA40T_1210
H-->L 14.589V 14.84V 15.243V H-->L 6.138V 6.214V 6.359V
10_1206_5%
1 1 1 2
L-->H 15.562V 15.97V 16.388V L-->H 7.196V 7.349V 7.505V
1
2 2
PR1
100P_0402_50V8J
1000P_0402_50V7K
3 3
100P_0402_50V8J
1000P_0402_50V7K
@
1
1 4 PR2 1
1 2
4
PC1
PC2
PC3
PC4
1K_1206_5%
RLZ24B_LL34
1 2
PD1
JST_B4B-EH-A(LF)(SN)
PR3
PD2 1K_1206_5% PQ1
2
VIN 2 1 1 2 3 TP0610K-T1-E3_SOT23-3
1
@
LL4148_LL34-2 PR5
PR4 PC5 1K_1206_5%
@10K_0402_1% @ 0.01U_0402_25V7K 1 2
100K_0402_5%
100K_0402_5%
1 2 1 2
1
VS PR7
PR8
PR9
PR6 1K_1206_5%
2
VIN 1M_0402_1% 1 2
1 2
10K_0402_1%
2
1
84.5K_0402_1%
1
VS
PR11
PR10
PR12
10K_0402_1%
100K_0402_5%
1 2
2
ACIN <22,32>
1
PR13
2
PR14
22K_0402_1%
1
1 2 3
P
+ PACIN PQ2
O 1 PACIN <40>
1000P_0402_50V7K
20K_0402_1%
2 DTC115EUA_SC70-3
1 2
-
1
G
0.1U_0402_16V7K
10K_0402_1%
PU1A
1
1
PR15
2 LM393DG_SO8 PD3 2 2
4
<32,40> ACOFF
PC6
PC7
PR16
PQ3
Vin Detector DTC115EUA_SC70-3
2
GLZ4.3B_LL34-2
B+
2
PR17 2
3
10K_0402_1%
2 1
High 18.764 17.901 17.063
RTCVREF
3.3V Low 17.745 16.9 16.03
3
VIN
PR18
VL 2.2M_0402_5%
2
2 1
PD4
LL4148_LL34-2
499K_0402_1%
1
1
PD5
PR19
2 1 VS
3.3V BATT+
1
68_1206_5%
68_1206_5%
100K_0402_1%
1
RTCVREF
PR20
PR21
RB751V-40_SOD323-2
VS
PR22
G920AT24U_SOT89-3
2
PR24 PU2 PR25 2
2
PR23 560_0603_5% 200_0805_5%
8
560_0603_5%
1 2 1 2 3 2 2 1 CHGRTCP 3 1 PD6
OUT IN
0.22U_1206_25V7K
<39,41> MAINPWON 2 5
P
3 3
+
1
PC9
4.7U_0805_6.3V6K
0.1U_0603_25V7K
1U_0805_25V4Z
+CHGRTC 1 7 O
1
GND
PC8
0.01U_0402_25V7K
100K_0402_5%
191K_0402_1%
499K_0402_1%
<40> ACON 3 - 6
1
1
PR26
PC10
PC11
0.1U_0603_25V7K
PU1B
2
1
1
PR27
PR28
PC14
1000P_0402_50V7K
BAS40CW_SOT323-3 LM393DG_SO8
2
4
1
1
PC12
2
PC13
PR29
2
2
22K_0402_1%
PRG++ 2
2
<33> 51_ON# 1 2
PQ4
TP0610K-T1-E3_SOT23-3
2N7002W-T/R7_SOT323-3
PR30 PR31
1
PJ2 34K_0402_1% PQ5 D 47K_0402_1%
PAD-OPEN 3x3m PJ3 PAD-OPEN 3x3m
2 1 2 2 1
+1.5VSP 1 2 +1.5VS 1 2 +1.8V
RTCVREF G PACIN <40>
+1.8VP
1
S
3
66.5K_0402_1%
PJ4 PQ6
1
(7A,280mils ,Via NO.=14) (8A,320mils ,Via NO.= 16) PAD-OPEN 3x3m DTC115EUA_SC70-3
PR32
+VCCPP 1 2 +VCCP
PJ5 PJ6 2 +5VALWP
PAD-OPEN 3x3m PAD-OPEN 3x3m @
+5VALWP 1 2 +5VALW +0.9VSP 1 2 +0.9VS (16A,800mils ,Via NO.= 24)
3
(6A,240mils ,Via NO.= 12) (2A,80mils ,Via NO.= 4)
4 PJ7 4
PJ8
PAD-OPEN 3x3m
+3VALWP 1 2 +3VALW +2.5VSP 1 1 2 2 +2.5VS
JUMP_43X79
(6A,240mils ,Via NO.=12) (1A,40mils ,Via NO.= 2)
PJ9 PJ10 Security Classification Compal Secret Data Compal Electronics, Inc.
PAD-OPEN 3x3m PAD-OPEN 3x3m 2005/10/17 2006/10/17 Title
1 2 1 2
+1.25VP +1.25VS +VSBP +VSB
DCIN/DECTOR
(6A,240mils ,Via NO.=12) (0.3A,40mils ,Via NO.= 2) B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS IHL00 LA-3691P
A B C D
A B C D
BATT++ PL12
DC040003600 HCB4532KF-800T90_1812
1 2 BATT+
PJP2
PH1 under CPU botten side :
BATT++
1 1
2
1 2 +3VALWP CPU thermal protection at 87 degree C
2
1000P_0603_50V7K
1000P_0603_50V7K
ID PR34 PR33
3 3 Recovery at 70 degree C
0.01U_0603_50V7K
4 B /I 1 2 100K_0402_5%
4 +3VALWP
1
5 SMC VS
5
1
PC15
PC16
PC17
6 SMD @ 100K_0402_5%
6 TS
7
2
7
2
VL
0.1U_0603_25V7K
1K_0402_5%
1 8 GND 1
2
8
2
VL
PR36
9 9
PC18
G1 10
150K_0402_1%
G2 11 PR35
2
10.5K_0402_1%
1K_0402_1%
2
1
PR38
PR37
PR39
1 442K_0603_1%
2
1
ALI/MH# <40>
2
100_0402_1%
PR42
8
100_0402_1%
69.8K_0603_1%
PR40
PR41
1 2 3
P
+
O 1
TM_REF1 2 MAINPWON <38,41>
-
G
100K_0603_1%_TH11-4H104FT
PU3A
2
1
LM393DG_SO8
4
PH1
1000P_0402_50V7K
EC_SMB_CK1 <32>
1U_0603_6.3V6M
2
1
PC19
EC_SMB_DA1 <32>
PC20
PR43
2 150K_0402_1%
1 VL
2
1 2 +3VALWP
150K_0402_1%
PR44
1
1K_0402_1%
6.49K_0402_1%
1
PR46
2 2
PR45
2
2
BATT_TEMP <32>
PQ7
TP0610K-T1-E3_SOT23-3
B+ 3 1 +VSBP
0.22U_1206_25V7K
0.1U_0603_25V7K
1
100K_0402_5%
1
PR47
PC21
PC22
2
PR48
2
22K_0402_1%
VL 1 2 VS
100K_0402_5%
2
PR49
3 3
8
5
P
PR50 +
7
1
O
1
0_0402_5% PQ8 D
6 -
G
1 2 2 PU3B
<41> SPOK
G 2N7002W-T/R7_SOT323-3 LM393DG_SO8
4
0.1U_0402_16V7K
S
3
1
PC23
2
4 4

BATTERY CONN. / OTP
B 0.2
A B C D
A B C D
65W, Iadapter=0~3.42A, Current sense=0.02ohm, PR70=39.2K, CP=3.079A ADP_I = 19.9*Iadapter*Rsense

90W, Iadapter=0~4.74A, Current Sense=0.015ohm, PR70=28.7K, CP=4.263A
B+
PQ9 P2 PQ10 P3 CHG_B+ PQ11

AO4407_SO8 AO4407_SO8 PJ12
AO4407_SO8
VIN 8 1 1 8 1 4 1 1 2 2 1 8
7 2 2 7 2 7
2200P_0402_50V7K
10U_1206_25V6M
10U_1206_25V6M
0.1U_0603_25V7K
6 3 3 6 CSIP 2 3CS IN JUMP_43X118 3 6
5 5 5
1
PC24
PC25
1
PR51 1
PC26
PC27
0.02_2512_1%
4
PR54
2
47K_0402_1%
1
5600P_0402_25V7K
PQ42 1 2
TP0610K-T1-E3_SOT23-3 VIN
0.1U_0603_25V7K
PR52
2
47K_0402_1% PR53
PC28
PC29
200K_0402_1% VIN 3 1 6251DC_IN PQ43 PR55 PD7
1
DTC115EUA_SC70-3 10K_0402_1% 1 2
2
1
ACOFF <32,38>
1
100K_0402_1%
PC30
PR208
PD16 1SS355_SOD323-2
1
0.1U_0603_25V7K 2 FSTCHG
2
3
2 1
PQ12 3 200K_0402_1%
2
DTA144EUA_SC70-3 1 2 SUSP# <17,25,32,37,42,43,44> PR56
2
2 PR209 BAS40CW_SOT323-3 1 2 VIN
100K_0402_1%
1
PC32
PU4 0.1U_0603_25V7K PQ14
1
DTC115EUA_SC70-3 PD9
1
6251VDD 1 24 6251DC_IN 2 1 2 1 2
VDD DCIN BATT+
2N7002W-T/R7_SOT323-3
1
1SS355_SOD323-2 PC31 1SS355_SOD323-2
1
PD8 2.2U_0603_6.3V6K D PQ15
2 2 ACSET ACPRN 23
1
0.1U_0603_25V7K
1 2 6251_EN PR219 2
<32> FSTCHG PACIN <38>
PC33
PQ13 20_0603_5% G
1
100K_0402_1%
DTC115EUA_SC70-3 2 1 3 22 1 2 CSON S
3
EN CSON
1
2
PQ16 D PR57 PC156 PC35
3
5
6
7
8
PR59
2 PR60 10K_0402_5% 0.1U_0402_16V7K 0.047U_0603_25V7M
G 2N7002W-T/R7_SOT323-3 150K_0402_1% CELLS 4 21 1 2 CSOP
D
D
D
D
2
1
@ 680P_0402_50V7K CELLS CSOP PR61 20_0603_5% PQ17
S
3
2
2
PC34 SI4800BDY-T1-E3_SO8 2
2
CSON1 2 5 20 2 1 CS IN
ICOMP CSIN
G
S
S
S
PC38 PR62 20_0603_5%
2
0.1U_0603_25V7K
4
3
2
1
PC36 6 19 1 2 CSIP PL1
1
6800P_0402_25V7K VCOMP CSIP PR220 10U_LF919AS-100M-P3_4.5A_20%
1
100P_0402_50V8J 100_0402_1% 2.2_0603_5%

2
2
PR66 PC39 1 PR64 2 7 18 LX_CHG 1 2 CHG 1 4
ICM PHASE BATT+
1
22K_0402_1% PQ18 D
PACIN 1 2 2 CSOP 2 3 CSON
<38> PACIN 1
G 2N7002W-T/R7_SOT323-3 6251VREF 8 17 DH_CHG
PR63 VREF UGATE PR65
S
3
2 1
5
6
7
8
10K_0402_1% PR68 0.02_2512_1%
10U_1206_25V6M
10U_1206_25V6M
9 16 BST_CHG 1 2 BST_CHGA 2 1
D
D
D
D
ACON PC37 CHLIM BOOT 2.2_0603_5%
<38> ACON
1
PC42
PC43
0.01U_0402_25V7K <32> ADP_I PC41 PQ19
1
10 15 6251VDDP PD10 0.1U_0603_25V7K

ACLIM VDDP
1
G
S
S
S
SI4800BDY-T1-E3_SO8
2
PC40 RB751V-40_SOD323-2
4
3
2
1
0.1U_0402_16V7K 11 14 DL_CHG
1
2
VADJ LGATE
1 26251VDD
2 PR67 4.7_0603_5%
<32,38> ACOFF 143K_0402_1% 12 13 PR71
GND PGND
2
PQ20 2 1
<32> IREF
39.2K_0402_1%
DTC115EUA_SC70-3 PR70 ISL6251AHAZ-T_QSOP24 PC45
3
1
0.01U_0402_25V7K
6251VREF 1 2 4.7U_0805_6.3V6K
1
1
PC44
PR69
100K_0402_1%
1
6251VREF
2
10K_0402_1% 6251VDD 1 2 CELLS

2
3 3
PR72 1
1
PR58
Be careful the PR210 47K_0402_5% PQ45
2
100K_0402_1% DTC115EUA_SC70-3
IREF voltage!! 6251_EN VS BATT+
<39> ALI/MH# 2
2
6251VREF 3 1 1 2
PR73
1
1
@ 274K_0402_1% C PQ44
1
2 PR75
3
0.01U_0402_25V7K
0.01U_0402_25V7K
PR74 B 340K_0402_1%
CP mode @ 100K_0402_1% PQ21 E 2SC2411KT146_SOT23-3
3
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05) @
2
1
1
PC157
PC46
@ SI2301BDS-T1-E3_SOT23-3 PR211
2
where Vaclm=0.5535V, Iinput=3.079A 20K_0402_1%
1
2
2
where Vaclm=0.6667V, Iinput=4.263A PR76
499K_0402_1%
2
CSON
8
PR77 PU5A
2
CHGSEL 10K_0402_1% 3
P
+
1 2 1
CC=0.6~3.4A <32> BATT_OVP 0
0.01U_0402_25V7K
If this area float, Charge voltage is 4.2V/cell - 2
G
VCHLM=0.24V~1.36V
1
LM358ADR_SO8
OVP voltage :
4
1
1
PC47
PR78 PC48
IREF=0.972*Icharge 105K_0402_1% 0.01U_0402_25V7K LI-3S :13.50V--BATT-OVP=1.5V
@
IREF=0.5832V~3.3V
2
2
BATT-OVP=0.111*BATT+
2
4 4
Charging Voltage
BATT Type CHGSEL CV mode
(0x15)
2800mAH 3S pack 13050mV LOW 12.90V
Normal 3S LI-ON Cells 12600mV HIGH 12.60V
CHARGER
0.2
A B C D
A B C D
B+
2
PJ13
2
JUMP_43X118
1
PC49 PC50
1
0.1U_0402_16V7K 0.1U_0402_16V7K
2
1 2 BST5B PD11 BST3B 1 2
1 B+++ <BOM Structure> 1
B+++
SI4800BDY-T1-E3_SO8
VL
8
7
6
5
1
10U_1206_25V6M
D
D
D
D
0_0603_5%
PQ22
BAW56W_SOT323-3
1
B+++
PC51
PR79
SI4800BDY-T1-E3_SO8
2200P_0402_50V7K
2
0.1U_0402_16V7K
47_0402_5%
G
5
6
7
8
S
S
S
4.7_1206_5%
4.7_1206_5%
PR82
10U_1206_25V6M
2
1
PR80
PR81
PC52
PR83
D
D
D
D
1
2
3
4
1
PC53
PC54
PQ23
0_0603_5%
2
5HG 1 2 DH5
2
2
G
S
S
S
LX5
SI4810BDY-T1-E3_SO8
@
4
3
2
1
8
7
6
5
2
0.1U_0603_25V7K
PC55
1U_0805_25V4Z
0_0603_5%
PR84
VL 3HG
D
D
D
D
8734_VREF
PQ24
LX3
200K_0402_1%
2
4.7U_0805_6.3V6K
10UH_1164AY-100M=P3_4.7A_20%
1 PC58
PR85
200K_0402_1%
1
G
5
6
7
8
S
S
S
1U_0805_16V7K
PR86
SI4810BDY-T1-E3_SO8
1
PC57
D
D
D
D
1
2
3
4
1
BST3A
PC56
PQ25
2
0_0603_5%
DL5
G
S
S
S
PR87
2
10UH_1164AY-100M=P3_4.7A_20%
499K_0402_1%
18
20
13
17
4
3
2
1
PR88
499K_0402_1%
2
PL2
BST5A 14
V+
LD05
TON
VCC
1
BST5
PR89
2
<BOM Structure> ILIM3 5 2
16 DL3
1
DH5
+5VALWP
1
2
15
1
LX5
19 DL5 ILIM5 11
PL3
21 OUT5
9 PU7 28
FB5 BST3
10.5K_0402_1%
1 26 DH3
N.C.MAX8734AEEI+_QSOP28 DH3
2
24
1
DL3
150U_D2_6.3VM
PR90
6 SHDN# LX3 27
VS 4 22
1 ON5 OUT3
1 2 3 ON3
PC59
+ PR91 7
1
0_0402_5% FB3
12 SKIP# PGOOD 2 +3VALWP
2 8734_VREF
PRO#
LDO3
PR93 8
GND
REF
2
2
6.81K_0402_1%
6.81K_0402_1%
PZD1 47K_0402_1%
PR92
1 2 1 2
330U_D3L_6.3VM_R25M
PR95
23
25
10
2
0.047U_0603_16V7K
0.22U_0603_16V7K
GLZ5.1B_LL34-2 1
4.7U_0805_6.3V6K
100K_0402_5%
PR94
1
1
2
PC61
PC62
0_0402_5% +
PR96
PC60
0_0402_5%
<39> SPOK
2
2
2
PC63
PR97
10K_0402_1%
1
PR99
PR98
+5V Ipeak = 6.66A ~ 10A 47K_0402_1%
1
1 2
0.047U_0603_16V7K
3 3
1
1
PC64
VFB=2V
2
+3.3V Ipeak = 6.66A ~ 10A
MAINPWON <38,39>
1U_0603_6.3V6M
1
PC65
2
4 4

+5VALWP/+3VALWP
Custom 0.2
A B C D
5 4 3 2 1
+5VALW
D D
1
1
1
PC83 PR101 BAW56W_SOT323-3
2.2U_0603_6.3V6K PR110 10_0603_5%
2
10_0603_5% PD12
VCCA_1.8V
B+
2
VCCA_1.05V
1 2
1U_0603_10V6K
1U_0603_10V6K
B+_1.8/1.05
3
1
1
PC90
PC91
PJ14
PR100
1 2 100K_0402_5%
2
1 2
4.7U_1206_25V6K
@
4.7U_1206_25V6K
2
JUMP_43X118 BST_1.8V-1 BST_1.05V-1
1
1
PC87
8
7
6
5
PC86
PU8
PQ28
D
D
D
D
2
SI4800BDY-T1-E3_SO8 1 PGND1 VSSA1 28

DL_1.8V 2 27 PGOOD1_1.8V
G DL1 PGD1
S
S
S
PR119 PC80
Maximum continuous current=>6A 0_0402_5% 1 2 +5VALW 3 26 FB_1.8V B+_1.8/1.05
1
2
3
4
VDDP1 FB1
4.7U_1206_25V6K
DH_1.8V-1
1 2 1U_0603_10V6K PC84
1
+1.8VP
4.7U_1206_25V6K
PL5 1 2 ILIM_1.8V
4 25 VCCA_1.8V 1000P_0402_50V7K
ILIM1 VCCA1
PC66
PC67
1.8UH_1164AY-1R8N=P3_9.5A_30% PR114 27.4K_0402_1% 1 2
Vout_1.8V 1 2 LX_1.8V 5 24 Vout_1.8V SI4800BDY-T1-E3_SO8
2
LX1 VOUT1
5
6
7
8
PR112
DH_1.8V 6 23 2 1 B+_1.8/1.05 PQ26
D
D
D
D
DH1 TON1
1
26.1K_0402_1%
C PC82 PR115 820K_0402_5% C

1
1 2 1 2 BST_1.8V 7 BST1 EN/PSV1 22

PR122
PC89 PR108 PC72

8
7
6
5
G
S
S
S
220U_D2_4VY_R15M
1 33P_0402_50V8K 0.1U_0603_25V7K 0_0402_5% 8 21 BST_1.05V

1 2 1 2 PR102
2
PQ29 EN/PSV2 BST2 0_0402_5% 0_0402_5% Maximum continuous current=>6A

D
D
D
D
2
4
3
2
1
PC85
+ FB_1.8V SI4810BDY-T1-E3_SO8 B+_1.8/1.05 2 1 9 20 DH_1.05V 0.1U_0603_25V7K 1 2 DH_1.05V-1 PL4

TON2 DH2
PR116 Vout_1.05V 10 19 LX_1.05V
1.8UH_1164AY-1R8N=P3_9.5A_30%
1 2 Vout_1.05V
+VCCPP
VOUT2 LX2
1
2
S
S
S
1M_0402_5% PR109
11.5K_0402_1%
PR121 VCCA_1.05V 11 18 ILIM_1.05V1 2
1
2
3
4
VCCA2 ILIM2
5
6
7
8
1
10K_0402_1% PC68 34K_0402_1% SI4810BDY-T1-E3_SO8
330U_D2_2V_Y
330U_D2_2V_Y
PR106
1000P_0402_50V7K FB_1.05V 12 17 +5VALW PQ27 PC74 1 1
D
D
D
D
2
FB2 VDDP2 33P_0402_50V8K
2
PC69
PC71
13 16 DL_1.05V + +
PGD2 DL2
2
G
S
S
S
14 15 FB_1.05V
VSSA2 PGND2
1
2 2
4
3
2
1
1
PR103 PC78
0_0402_5% 1U_0603_10V6K PR107 @
2
Close to IC Side 1 2 SC413TSTRT_TSSOP28 10K_0402_1%
<17,25,32,37,40,43,44> SUSP#
Differential routing of feedback VFB=0.5V
2
1
@ PC70
to VSSA1 and VOUT1 PIN +5VALW 0.1U_0402_16V7K
2
1
PR113 PR124 Close to IC Side

B 100K_0402_5% 0_0402_5% B
@ 1 2 Differential routing of feedback to VSSA2 and VOUT2 PIN
<25,32,37> SYSON
2
1
@ PC170
PGOOD2_1.05V 0.1U_0402_16V7K
2
VFB=0.5V
VFB=0.5V Vo=VFB*(1+PR129/PR130)=1.5V
Vo=VFB*(1+PR122/PR127)=1.805V Ipeak=5.16A, Imax=3.612A
Ipeak=12.17A, Imax=8.519A Ton=(3.3E-12*(PR125+37K)*(Vout/VBat))+50ns
Ton=(3.3E-12*(PR121+37K)*(Vout/VBat))+50ns =0.3201us
=3.3*10e-12*(820K+37K)*(1.8/19)+50ns=0.3179us AO4916 Rds(on)=>Typ:21 mOhm
FDS6670AS:Rds(on)=>Typ:9 mOhm Max:27 mOhm
Max:11.5 mOhm Ivalleymin=9*10u*(29.4K/0.027*1.4)=7A
Iocp=Ivalley+ Iripple /2 Ivalleymax=11*E-6*(29.4K/0.021*1.1)=12.833A
Iripple=(vin-vout)*(Ton/L)=5.467A, 1/2 Iripple=2.734A. Iripple=(vin-vout)*(Ton/L)=2.546A, 1/2Iriiple=1.273A
A
Ivalleymin=10E-6*(PR120/Rds(ON)max*1.5) Iocp=Ivalley+ Iripple /2 A
=9*10e-6*(27.4K/0.0115*1.5)=14.295A>11.73*1.2=14.076A OCP==>8.273A~14.106A
Ivalleymax=10E-6*(PR120/Rds(ON)typ*1.2)
=11*10e-6*(27.4K/0.009*1.2)=27.907A. Security Classification Compal Secret Data Compal Electronics, Inc.
OCP==>17.029A~30.641A Issued Date 2005/10/17 Deciphered Date 2006/10/17 Title
VCCPP/1.8VP
Custom 0.2
5 4 3 2 1
5 4 3 2 1
+5VALW
1
1
PR127
PR212 PC97 10_0603_5%
0_0402_5% 2.2U_0603_6.3V6K
2
1 2 PD14
2
<17,25,32,37,40,42,44> SUSP# VCCA_1.5V
1U_0603_10V6K
D PR213 D
B+_1.5VSP
PC99
@PC163 1M_0402_5% 1SS355_SOD323-2
PJ15
B+_1.5VSP
0.1U_0402_16V7K 2 1
1
1 2 B+
2
1 2
4.7U_1206_25V6K
SI4800BDY-T1-E3_SO8
BST_1.5V-1
1
4.7U_1206_25V6K
JUMP_43X118
PC111
PC93
D 5
D 6
D 7
D 8
PC164
2
1000P_0402_50V7K
PQ30
+5VALW
16
15
14
13
4 G
3 S
2 S
1 S
PR126 PC100
BST_1.5V 1 2 1 2
EN/PSV
TON
NC
BST
0_0603_5% Maximum continuous current=>6A
1
Vout_1.5V 1 12 DH_1.5V 0.1U_0603_25V7K PL6
VOUT DH
PR214
100K_0402_5% VCCA_1.5V 2 11 LX_1.5V
1.8UH_1164AY-1R8N=P3_9.5A_30%
1 2 Vout_1.5V
+1.5VSP
VCCA LX PR128
5
6
7
8
30K_0402_1%
FB_1.5V 3 10 ILIM_1.5V 1 2
2
FB ILIM
1
26.1K_0402_1% SI4810BDY-T1-E3_SO8
D
D
D
D
PR132
470U_D2_2.5VM
PGOOD2_1.5V 4 9 +5VALW PQ31 PC101 1
PGD VDDP
PGND
VSSA
33P_0402_50V8K
PC96
+
NC
TP
DL
G
S
S
S
2
PU9 FB_1.5V
17
4
3
2
1
SC411MLTRT_MLPQ16_4X4 DL_1.5V 2
1
VFB=0.5V
PR133
1
10K_0402_1%
PC108
1U_0603_10V6K
2
C C
Close to IC Side
Differential routing of feedback to VSSA2 and VOUT2 PIN
VFB=0.5V, Ipeak=14.02A, Imax=9.814A

The current rating of +1.05VSP include +VCC_GFX current.
Vo=VFB*(1+PR146/PR147)=1.05V
Ipeak=2.91A, Imax=2A. Ton=(3.3E-12*(PR142+37K)*(Vout/VBat))+50ns=0.2391us
Vo=0.8*(1+PR190/PR191)=1.2608V SI4810BDY:Rds(on)=>Typ:9mOhm
+5VS Max:11.5 mOhm
Ivalleymin=9*10E-6*(PR145/Rds(ON)max*1.5)
=9*10E-6*(26.1K/(0.0115*1.5))=13.617A
PR215 Ivalleymax=11*10E-6*(PR145/Rds(ON)min*1.2)
10K_0402_1%
1 2 =11*10E-6*(26.1K/(0.009*1.3))=20.076A
PC165
1
Iripple=(vin-vout)*(Ton/L)=4.292A, 1/2Iripple=2.146A
B 1U_0603_6.3V6M B
Iocp=Ivalley+ Iripple /2
2
OCP==>15.763A~22.222A
PU13
6 VCNTL
PR216
5
9
VIN VOUT 3
4
+1.25VP
VIN VOUT
1
100K_0402_5% 1
1
1 2 8 EN
1
<17,25,32,37,40,42,44> SUSP# 7 2 PR217 PC166 +

GND
POK FB 576_0402_1% 0.01U_0402_25V PC167 PC168

2
1
22U_1206_10V6M @ 150U_D2E_6.3VM_R18
2
PC169 APL5913-KAC-TRL_SO8 2
1
0.1U_0402_16V7K
2
+1.5VS
PR218
1K_0402_1%
2
11
PJP3
JUMP_43X118
2
12
A A
PC162
22U_1206_10V6M
2

1.5VSP/1.25VP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom IHL00 LA-3691P 0.2
5 4 3 2 1
5 4 3 2 1
D D
+3VS +5VS
1
PC117
1
PJ16 1U_0603_6.3V6M
2
JUMP_43X79
2
1 2
PU10
6 VCNTL
PC118 5 3 +2.5VSP
10U_0805_6.3V6M PR150 VIN VOUT
9 4
2
VIN VOUT
1
0_0402_5%
22U_1206_6.3V6M
1 2 8 PR151
<17,25,32,37,40,42,43> SUSP# EN
PC120
7 2 PC119
GND
2
POK FB 2.15K_0402_1%
2
2
1
C APL5913-KAC-TRL_SO8 C
1
PC121
1
@0.1U_0402_16V7K 0.01U_0402_25V7K
2
PR152
1K_0402_1%
2
+1.8V
1
PJ17
1
JUMP_43X118
2
2
PU11
1 VIN VCNTL 6 +3VALW
B B
2 GND NC 5
1
1
1
PC122 3 7 PC123
10U_0805_6.3V6M REFEN NC 1U_0603_6.3V6M
2
2
PR153 4 8
1K_0402_1% VOUT NC
9
2
GND
RT9173DPSP_SO8
PR154
+0.9VSP
1
0_0402_5% PQ34 D
1
1 2 2 1
<37> SUSP G PR155
S 1K_0402_1% PC125
3
2
1
22U_1206_6.3V6M
2
PC126
@ 0.1U_0402_16V7K
2
PC124
0.1U_0402_16V7K
2N7002W-T/R7_SOT323-3
A A

+2.5VSP/0.9VSP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom IHL00 LA-3691P 0.2
5 4 3 2 1
5 4 3 2 1
+5VS
CPU_B+ B+
PR156 PL8
5VS12 1 HCB4532KF-800T90_1812
1 2
0.01U_0402_25V7K
0_1206_5%
2200P_0402_50V7K
0.1U_0603_25V7K
PR157
PC127
10_0402_5% 1
1
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
100U_25V_M
200K_0402_1%
PC128
PC129
PC130
PC131
PC132
PC133
+
2
2 PR158 1
2
D D
2
PC135
2
2.2U_0603_6.3V6K 2
2
PR159 PC134
1
13K_0402_5% 1U_0603_6.3V6M
5
PQ35
PU12 SI7686DP-T1-E3_SO8
1
NTC 0_0603_5%
100K_0402_5% V CC 19 25 PR161
Vcc VDD
PR160 1 2DH1_CPU-2
4
1 2 6 8 0_0603_5% 0.22U_0603_16V7K
THRM TON PR163 PC136
PR162 0_0402_5% 2 1 31 30 BST1_CPU 1 2 BSTM1_CPU 1 2
<5> CPU_VID0 D0 BST1 +CPU_CORE
3
2
1
PR164 0_0402_5% 2 1 32 29 DH1__CPU-1 PL9
<5> CPU_VID1 D1 DH1 0.36H_ETQP4LR36WFC_24A_20%
4.7_1206_5%
PR165 0_0402_5% 2 1 33 28 LX1__CPU 2 1 +CPU_CORE
<5> CPU_VID2 D2 LX1
680P_0603_50V7K 2.1K_0402_1%
PR166 0_0402_5% 2 1 34 26 DL1__CPU
<5> CPU_VID3 D3 DL1
5
6
7
8
5
6
7
8
10_0402_5%
PR169
PR170
PR167 0_0402_5% 2 1 35 27
<5> CPU_VID4 D4 PGND1
PR168 0_0402_5% 2 1 36 18
<5> CPU_VID5
2
D5 GND
1
3.48K_0402_1%
1
PR171 0_0402_5% 1 2 37 17 CSP1__CPU 4 4 PR174 PH2 NTC
<5> CPU_VID6 D6 CSP1
1
1 2 1 2
DL1__CPU
PR1732 71.5K_0402_1%
1 7 16 CSN1_CPU @
TIME CSN1 <5> VCCSENSE
PC137
10KB_0603_5%_ERTJ1VR103J
2
2 1 9 12 FB_CPU PQ36 PQ37 1 2
3
2
1
3
2
1
CCV FB
PR172
47P_0402_50V8J PC139
1 2 11 10 C CI_CPU IRF8113PBF_SO8 IRF8113PBF_SO8 PC140 0.22U_0603_16V7K
C REF CCI C
1 2 PC138 0.22U_0603_16V7K 39 21 DH2_CPU-1

<8,22> PM_DPRSLPVR DPRSLPVR DH2
PR175 499_0402_1%
2
1 2 40 20 BST2_CPU
<5,8,21> H_DPRSTP# DPRSTP BST2
PR176 0_0402_5% PR178
1 2 3 22 LX2_CPU PR179 0_0402_5% 0_0402_5%
<5> H_PSI# PSI LX2
PR177 0_0402_5% 1 2
+3VS 2 24 DL2__CPU
1
PWRGD DL2 PR181 @ 3K_0603_1% PC141 0.022U_0402_16V7K
0_0603_5%
1 23 1 2 1 2 CPU_VCC_SENSE
CLKEN PGND2
PR180
2
38 14 CSP2_CPU PR184 3.92K_0402_1%

PR182 PR183 SHDN CSP2
1 2 1 2
PR186 10K_0402_1% @ 2K_0402_1% 5 15 CSN2__CPU
1
0_0402_5% VRHOT CSN2 PR185 100_0402_1%
2
4 13
1
POUT GNDS PC142

1 2 1 2 1 2
BSTM2_CPU
<8,22> VGATE 0_0402_5% 4700P_0402_25V7K
1
@ PR189 TP NTC PR187 PR188 @
1 2 @ 3K_0603_1% @ 3K_0603_1%
CLK_ENABLE# MAX8770GTL+_TQFN40
41
2
<BOM Structure> @ 1 2 1 2
<32> VR_ON 1 2
PC143 PC144
1
2
CPU_B+
0.22U_0603_16V7K
PR190 PR191 470P_0603_50V8J
1
0_0402_5% PR192 +3VS 4700P_0402_25V7K 2 20K_0402_1%
PC145
@ 10K_0402_5%
1
PR194
2200P_0402_50V7K
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
0.1U_0603_25V7K
@ PR193 100_0402_1%
1
56_0402_5%
1
PC146
PC147
1
PC148
PC149
PC150
B PR195 0_0402_5% PQ38 B
2
1 2 VSSSENSE SI7686DP-T1-E3_SO8
2
<4> H_PROCHOT# <5> VSSSENSE 0_0603_5%
PR196
1
1 2 DH2_CPU-2 4
1 2 PR198
POUT
10_0402_5%
2
PR197 10K_0402_1%
PC151
2
3
2
1
0.1U_0402_16V7K 2 1
1
4.7_1206_5%
PL10
1
0.36H_ETQP4LR36WFC_24A_20%
5
6
7
8
PR199
5
6
7
8
2.1K_0402_1%
1
PQ39
PR200
PQ40
IRF8113PBF_SO8 4 IRF8113PBF_SO8
680P_0603_50V7K
DL2__CPU
4
2
1
PC152
PR201
3
2
1
3.48K_0402_1% NTC PH3
3
2
1
2
1 2 1 2
10KB_0603_5%_ERTJ1VR103J
1 2
A PR202 0_0402_5% PC153 0.22U_0603_16V7K A

1 2

+CPU_CORE
Custom 0.2
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1
Item Fixed Issue Rev. PG# Modify List B.Ver# Phase

D D
1
2
3
4
5
6
7
C C
9
10
11
12
13
B
14 B
15
16
17
A A

Title
POWER PIR
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 1
Item Fixed Issue Rev. PG# Modify List B.Ver# Phase

D D
XDP_BPM#0~4 test point short as EMI request B 4 Modify Layout
1
ADD J6 for +VCC_AXG UMA VGA power shape B 11 Modify Layout
2
Fixed Speaker no function A2 37 Change Q91 form SI2301BDS to MMBT3906, Del R895
3
Fixed SWDJ function can't work A2 36 Add R904
4
Fixed Audio Codec can't work A2 29 Add R905,Q96
5
6 Fixed USB Port4 can't work A2 27 Swap USB_N4 & USB_P4
7 Fixed EMI issue A2 32 37 Add R908,C878,C879

C C
8 Fixed SWDJ mode EC_MUTE# ISSUE B 30 Add D39,Q99,R914
Fixed CMOS noise B 36 Add R912,C880

9
Fixed EMI B 25 Add C881,C882
10
Add chipset id B 33 Add R915,R916
11
Fix SWDJ Subwoofer issue B 31 Add R917
12
Fix DFX issue C 22,33 Change Y3,X1,Y2 footprint
13
FOR E-STAR V4 wake on lan C 22,33 Add R918,R919
B
14 B
For ESD issue C 36 Add C883~C887 D40,D41

15
For AUDIO team design C 30 Add R920 R921
16
Change LAN led function C 25 Swap JP73 PIN12 & PIN14
17
A A

Title
POWER PIR
5 4 3 2 1

Lenovo 3000 G410 (COMPAL LA-3691P) Laptop Schematics Diagram

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Lenovo 3000 G410 (COMPAL LA-3691P) Laptop Schematics Diagram

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A B C D E

Everest Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

CRT CRT CRT

DMI USB conn x2 USB conn x2 3 in 1

3.3V 24.576MHz/48Mhz HD Audio

ENE KB926 SPI ROM BIOS Int SPK Mic/Int

Fan Control Touch Pad Int.KBD

Clock Generator Sub BD

Full ON HIGH HIGH HIGH HIGH ON ON ON ON

S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF

S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF

S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF

3 ICH8M SM Bus address 3

0(R744) 0(R745) DDR DIMM0 1010 000Xb

Security Classification Compal Secret Data Compal Electronics, Inc.

Place close to CPU within 500mil

<21> H_FERR# A5 FERR# THERMTRIP# C7 H_THERMTRIP# <8,21>

<21> H_STPCLK# D5 STPCLK#

H_PROCHOT# 3 1 OCP# C341 4

Security Classification Compal Secret Data Compal Electronics, Inc.

H_D#30 T25 AF22 H_D#62 E15 K6

DINV[1]# DINV[3]# VCC[042] VCCP[08]

TEST3 C24 Y1 COMP3 R39 1 2 54.9_0402_1% F15 T21

DPWR# H_PWRGOOD VCC[051]

Close to CPU pin

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

H_D#25 W9 B17 H_A#29

H_SWNG H_D#30 H_D#_29 H_A#_33 H_A#34

1 H_D#33 AE3 G12 H_ADS#

H_D#38 H_D#_37 H_BPRI# H_BR0#

H_D#45 AE2 E4 H_HIT#

H_D#61 AJ3 AH11 H_DSTBN#3

H_SWNG H_DSTBP#_2 H_DSTBP#3 H_DSTBP#2 <5>

H_RESET# B6 B12 H_REQ#4

within 100mil to Ball A9,B9

SM_CS#_0 BG20 DDRA_SCS0# <14> Layout Note:

PM_EXTTS#1 J36 E36 MCH_CFG_13

BK50 AM50 CL_VREF MCH_CFG_19 +3VS

VGATE 1 2 GMCH_PWROK BK1 PM_EXTTS#0 +3VS

R186 0_0402_5% A5 G39 MCH_CLKREQ# R138 10K_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

DDRA_SDQ33 AT13 BD20 DDRA_SMA1 DDRB_SDQ33 BE11 BG28 DDRB_SMA1

DDRA_SDQ46 BD7 DDRB_SDQ46 BJ8

Security Classification Compal Secret Data Compal Electronics, Inc.

CRB 2.37K_1% to GND LBKLT_EN

J27 T42 PCIE_MTX_GRX_N5 C410 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_N5

TV_DCONSEL_1 PEG_TX#_9 PCIE_MTX_GRX_N10 C157

AH43 PCIE_MTX_GRX_P15 C438 1 2 PM@ 0.1U_0402_10V7K PCIE_MTX_C_GRX_P15

R131 1 2 10K_0402_5% LCTLB_DATA

R130 1 2 10K_0402_5% LCTLA_CLK

R108 2.2K_0402_5% TV_DCONSEL_0

R109 2.2K_0402_5% TV_DCONSEL_1

Security Classification Compal Secret Data Compal Electronics, Inc.

U20G 9/18 modify from +1.05VS to +VCC_AXG

BE35 VCC_SM_19 VCC_AXG_NCTF_44 AF16 1 1 U32 VCC_NCTF_43

VCC AXM NCTF

AF21 BE39 VCCSM_LF3

Security Classification Compal Secret Data Compal Electronics, Inc.

VCCA_HPLL: 50mA +1.25VS_HPLL

(10UF*1, 0.1UF*1) (470UF*1, 0.1UF*1) VTT_5 U8

MBK1608121YZF_0603 B27 AD51 GM@

(10UF1, 0.1UF1) (470UF1, 0.1UF1) VTT_5 U8