Professional Documents
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1 1
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Compal Confidential 2
4 4
A
Dr-Bios.com
B
Security Classification
Issued Date 2006/08/18
Compal Secret Data
Deciphered Date 2007/8/18
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C D
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Compal Electronics, Inc.
Compal confidential
Project Code: ICW50 DDRII 533/667/800 DDRII-SO-DIMM X2
Thermal Sensor AMD Turion/Sempron CPU
page 08,09
File Name : LA-3581P ADM1032ARM Socket S1 638P
page 4,5,6,7 Dual Channel
page 6
D HT LINK D
200-800MHz
Card Reader
RICOH R5C833 Phone Jack x3
RJ45 page 23 LPC BUS page 32
page 22
1394 6 in 1
B Conn. socket B
CIR
page 30
A A
Dr-Bios.com
Security Classification Compal Secret Data
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
SCHEMATIC, M/B LA-3581P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 2 of 43
5 4 3 2 1
5 4 3 2 1
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH ON ON ON ON
External PCI Devices Board ID PCB Revision BTO Item BOM Structure
Device IDSEL# REQ#/GNT# Interrupts
0 UMA (0V) DIP CAP & RTC 45@
1394 AD20 0 PIRQE
1 DISCRETE (3.3V) UMA UMA@
2 VGA VGA@
3 UMA & TV-OUT UMA&TV@
4 2 SATA HDD SATA2@
5 CAMERA CMOS@
6 BLUETOOTH BT@
7 MINI CARD 1(TV) MINI1@
B MINI CARD 2(WLAN) MINI2@ B
Dr-Bios.com
Security Classification Compal Secret Data
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
SCHEMATIC, M/B LA-3581P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 3 of 43
5 4 3 2 1
5 4 3 2 1
+1.2V_HT
FAN Conn
JP22A
D4 VLDT_A3 VLDT_B3 AE5 1 2 C533
D3 AE4 4.7U_0805_10V4Z
VLDT_A2 VLDT_B2
D2 VLDT_A1 VLDT_B1 AE3
D1 AE2 +5VS
VLDT_A0 VLDT_B0
1
H_CADIP15 N5 T4 H_CADOP15 D20
(10) H_CADIP15 L0_CADIN_H15 L0_CADOUT_H15 H_CADOP15 (10)
H_CADIN15 P5 T3 H_CADON15 1SS355_SOD323-2
(10) H_CADIN15 L0_CADIN_L15 L0_CADOUT_L15 H_CADON15 (10)
H_CADIP14 M3 V5 H_CADOP14 W=40mils
(10) H_CADIP14 L0_CADIN_H14 L0_CADOUT_H14 H_CADOP14 (10)
H_CADIN14 M4 U5 H_CADON14
(10) H_CADIN14 L0_CADIN_L14 L0_CADOUT_L14 H_CADON14 (10) +VCC_FAN1
H_CADIP13 L5 V4 H_CADOP13
(10) H_CADIP13 H_CADOP13 (10)
2
H_CADIN13 L0_CADIN_H13 L0_CADOUT_H13 H_CADON13
(10) H_CADIN13 M5 L0_CADIN_L13 L0_CADOUT_L13 V3 H_CADON13 (10)
H_CADIP12 K3 Y5 H_CADOP12 FAN1 1 2
(10) H_CADIP12 L0_CADIN_H12 L0_CADOUT_H12 H_CADOP12 (10) +3VS
H_CADIN12 K4 W5 H_CADON12 C510 10U_0805_10V4Z
(10) H_CADIN12 L0_CADIN_L12 L0_CADOUT_L12 H_CADON12 (10)
1
H_CADIP11 H3 AB5 H_CADOP11 D21
(10) H_CADIP11 L0_CADIN_H11 L0_CADOUT_H11 H_CADOP11 (10)
H_CADIN11 H4 AA5 H_CADON11 BAS16_SOT23-3
(10) H_CADIN11 L0_CADIN_L11 L0_CADOUT_L11 H_CADON11 (10)
1
H_CADIP10 G5 AB4 H_CADOP10 1 2
(10) H_CADIP10 L0_CADIN_H10 L0_CADOUT_H10 H_CADOP10 (10)
H_CADIN10 H5 AB3 H_CADON10 R88 C509 1000P_0402_50V7K
(10) H_CADIN10 L0_CADIN_L10 L0_CADOUT_L10 H_CADON10 (10)
H_CADIP9 F3 AD5 H_CADOP9 10K_0402_5% Update Footprint
(10) H_CADIP9 H_CADOP9 (10)
2
H_CADIN9 L0_CADIN_H9 L0_CADOUT_H9 H_CADON9 JP16
(10) H_CADIN9 F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 H_CADON9 (10)
H_CADIP8 E5 AD4 H_CADOP8
(10) H_CADIP8 H_CADOP8 (10)
2
H_CADIN8 L0_CADIN_H8 L0_CADOUT_H8 H_CADON8 1
(10) H_CADIN8 F5 L0_CADIN_L8 L0_CADOUT_L8 AD3 H_CADON8 (10) (27,28) FAN_SPEED1 2
C H_CADIP7 N3 T1 H_CADOP7 C
(10) H_CADIP7 L0_CADIN_H7 L0_CADOUT_H7 H_CADOP7 (10) 3
H_CADIN7 N2 R1 H_CADON7
(10) H_CADIN7 L0_CADIN_L7 L0_CADOUT_L7 H_CADON7 (10)
H_CADIP6 L1 U2 H_CADOP6 1 ACES_85205-03001
HTT Interface
H_CTLIP0 N1 R2 H_CTLOP0
(10) H_CTLIP0
(10) H_CTLIN0
H_CTLIN0 P1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLOUT_H0
L0_CTLOUT_L0 R3 H_CTLON0
H_CTLOP0 (10)
H_CTLON0 (10) FAN1 Conn
FOX_PZ63823-284S-41F
B Athlon 64 S1 B
Processor Socket
1 1 1 1 1 1
2 2 2 2 2 2
C542 C540 C538
4.7U_0805_10V4Z 0.22U_0402_10V4Z 180P_0402_50V8J
Dr-Bios.com
Security Classification Compal Secret Data
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
SCHEMATIC, M/B LA-3581P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 4 of 43
5 4 3 2 1
A B C D E
DDRII Cmd/Ctrl//Clk
DDR_CS2_DIMMA# J22 AA16 DDR_A_CLK#2 DDR_B_D41 AD22 AA20 DDR_A_D41
(8) DDR_CS2_DIMMA# MA0_CS_L2 MA0_CLK_L2 DDR_A_CLK#2 (8) MB_DATA41 MA_DATA41
DDR_CS1_DIMMA# V22 E16 DDR_A_CLK1 DDR_B_D40 AC22 Y20 DDR_A_D40
(8) DDR_CS1_DIMMA# MA0_CS_L1 MA0_CLK_H1 DDR_A_CLK1 (8) MB_DATA40 MA_DATA40
DDR_CS0_DIMMA# T19 F16 DDR_A_CLK#1 DDR_B_D39 AE25 AA22 DDR_A_D39
(8) DDR_CS0_DIMMA# DDR_A_CLK#1 (8)
2
DDRII Data
DDR_A_MA11 L20 L25 DDR_B_MA11 DDR_B_D23 C24 C23 DDR_A_D23
DDR_A_MA10 MA_ADD11 MB_ADD11 DDR_B_MA10 DDR_B_D22 MB_DATA23 MA_DATA23 DDR_A_D22
R19 MA_ADD10 MB_ADD10 U25 B24 MB_DATA22 MA_DATA22 B22
DDR_A_MA9 L19 L24 DDR_B_MA9 DDR_B_D21 C20 F18 DDR_A_D21
DDR_A_MA8 MA_ADD9 MB_ADD9 DDR_B_MA8 DDR_B_D20 MB_DATA21 MA_DATA21 DDR_A_D20
L22 MA_ADD8 MB_ADD8 M26 B20 MB_DATA20 MA_DATA20 E18
DDR_A_MA7 L21 L26 DDR_B_MA7 DDR_B_D19 C25 E20 DDR_A_D19
DDR_A_MA6 MA_ADD7 MB_ADD7 DDR_B_MA6 DDR_B_D18 MB_DATA19 MA_DATA19 DDR_A_D18
M19 MA_ADD6 MB_ADD6 N23 D24 MB_DATA18 MA_DATA18 D22
DDR_A_MA5 M20 N24 DDR_B_MA5 DDR_B_D17 A21 C19 DDR_A_D17
3 DDR_A_MA4 MA_ADD5 MB_ADD5 DDR_B_MA4 DDR_B_D16 MB_DATA17 MA_DATA17 DDR_A_D16 3
M24 MA_ADD4 MB_ADD4 N25 D20 MB_DATA16 MA_DATA16 G18
DDR_A_MA3 M22 N26 DDR_B_MA3 DDR_B_D15 D18 G17 DDR_A_D15
DDR_A_MA2 MA_ADD3 MB_ADD3 DDR_B_MA2 DDR_B_D14 MB_DATA15 MA_DATA15 DDR_A_D14
N22 MA_ADD2 MB_ADD2 P24 C18 MB_DATA14 MA_DATA14 C17
DDR_A_MA1 N21 P26 DDR_B_MA1 DDR_B_D13 D14 F14 DDR_A_D13
DDR_A_MA0 MA_ADD1 MB_ADD1 DDR_B_MA0 DDR_B_D12 MB_DATA13 MA_DATA13 DDR_A_D12
R21 MA_ADD0 MB_ADD0 T24 C14 MB_DATA12 MA_DATA12 E14
DDR_B_D11 A20 H17 DDR_A_D11
DDR_A_BS#2 MB_DATA11 MA_DATA11
(8) DDR_A_BS#2 K22 MA_BANK2 MB_BANK2 K26 DDR_B_BS#2 DDR_B_BS#2 (9)
DDR_B_D10 A19 MB_DATA10 MA_DATA10 E17 DDR_A_D10
DDR_A_BS#1 R20 T26 DDR_B_BS#1 DDR_B_D9 A16 E15 DDR_A_D9
(8) DDR_A_BS#1 MA_BANK1 MB_BANK1 DDR_B_BS#1 (9) MB_DATA9 MA_DATA9
DDR_A_BS#0 T22 U26 DDR_B_BS#0 DDR_B_D8 A15 H15 DDR_A_D8
(8) DDR_A_BS#0 MA_BANK0 MB_BANK0 DDR_B_BS#0 (9) MB_DATA8 MA_DATA8
DDR_B_D7 A13 E13 DDR_A_D7
DDR_A_RAS# MB_DATA7 MA_DATA7
(8) DDR_A_RAS# T20 MA_RAS_L MB_RAS_L U24 DDR_B_RAS# DDR_B_RAS# (9)
DDR_B_D6 D12 MB_DATA6 MA_DATA6 C13 DDR_A_D6
DDR_A_CAS# U20 V26 DDR_B_CAS# DDR_B_D5 E11 H12 DDR_A_D5
(8) DDR_A_CAS# MA_CAS_L MB_CAS_L DDR_B_CAS# (9) MB_DATA5 MA_DATA5
DDR_A_WE# U21 U22 DDR_B_WE# DDR_B_D4 G11 H11 DDR_A_D4
(8) DDR_A_WE# MA_WE_L MB_WE_L DDR_B_WE# (9) MB_DATA4 MA_DATA4
DDR_B_D3 B14 G14 DDR_A_D3
FOX_PZ63823-284S-41F DDR_B_D2 MB_DATA3 MA_DATA3 DDR_A_D2
A14 MB_DATA2 MA_DATA2 H14
Athlon 64 S1 DDR_B_D1 A11 F12 DDR_A_D1
Processor DDR_B_D0 MB_DATA1 MA_DATA1 DDR_A_D0
C11 MB_DATA0 MA_DATA0 G12
Socket
(9) DDR_B_DM[7..0] DDR_A_DM[7..0] (8)
DDR_B_DM7 AD12 Y13 DDR_A_DM7
DDR_B_DM6 MB_DM7 MA_DM7 DDR_A_DM6
AC16 MB_DM6 MA_DM6 AB16
DDR_B_DM5 AE22 Y19 DDR_A_DM5
DDR_B_DM4 MB_DM5 MA_DM5 DDR_A_DM4
AB26 MB_DM4 MA_DM4 AC24
DDR_A_CLK2 DDR_B_CLK2 DDR_B_DM3 E25 F24 DDR_A_DM3
DDR_B_DM2 MB_DM3 MA_DM3 DDR_A_DM2
1 1 A22 MB_DM2 MA_DM2 E19
DDR_B_DM1 B16 C15 DDR_A_DM1
C336 C349 DDR_B_DM0 MB_DM1 MA_DM1 DDR_A_DM0
A12 MB_DM0 MA_DM0 E12
1.5P_0402_50V8C 1.5P_0402_50V8C
DDR_A_CLK#2 2 DDR_B_CLK#2 2 DDR_B_DQS7 DDR_A_DQS7
(9) DDR_B_DQS7 AF12 MB_DQS_H7 MA_DQS_H7 W12 DDR_A_DQS7 (8)
DDR_B_DQS#7 AE12 W13 DDR_A_DQS#7
(9) DDR_B_DQS#7 MB_DQS_L7 MA_DQS_L7 DDR_A_DQS#7 (8)
DDR_A_CLK1 DDR_B_CLK1 DDR_B_DQS6 AE16 Y15 DDR_A_DQS6
(9) DDR_B_DQS6 MB_DQS_H6 MA_DQS_H6 DDR_A_DQS6 (8)
1 1 DDR_B_DQS#6 AD16 W15 DDR_A_DQS#6
(9) DDR_B_DQS#6 MB_DQS_L6 MA_DQS_L6 DDR_A_DQS#6 (8)
DDR_B_DQS5 AF21 AB19 DDR_A_DQS5
(9) DDR_B_DQS5 MB_DQS_H5 MA_DQS_H5 DDR_A_DQS5 (8)
C344 C348 DDR_B_DQS#5 AF22 AB20 DDR_A_DQS#5
1.5P_0402_50V8C 1.5P_0402_50V8C (9) DDR_B_DQS#5 MB_DQS_L5 MA_DQS_L5 DDR_A_DQS#5 (8)
DDR_B_DQS4 AC25 AD23 DDR_A_DQS4
2 2 (9) DDR_B_DQS4 MB_DQS_H4 MA_DQS_H4 DDR_A_DQS4 (8)
DDR_A_CLK#1 DDR_B_CLK#1 DDR_B_DQS#4 AC26 AC23 DDR_A_DQS#4
(9) DDR_B_DQS#4 MB_DQS_L4 MA_DQS_L4 DDR_A_DQS#4 (8)
DDR_B_DQS3 F26 G22 DDR_A_DQS3
(9) DDR_B_DQS3 MB_DQS_H3 MA_DQS_H3 DDR_A_DQS3 (8)
DDR_B_DQS#3 E26 G21 DDR_A_DQS#3
(9) DDR_B_DQS#3 MB_DQS_L3 MA_DQS_L3 DDR_A_DQS#3 (8)
PLACE CLOSE TO PROCESSOR PLACE CLOSE TO PROCESSOR DDR_B_DQS2 A24 C22 DDR_A_DQS2
2 (9) DDR_B_DQS2 MB_DQS_H2 MA_DQS_H2 DDR_A_DQS2 (8) 2
DDR_B_DQS#2 A23 C21 DDR_A_DQS#2
WITHIN 1.2 INCH WITHIN 1.2 INCH (9) DDR_B_DQS#2
DDR_B_DQS1 MB_DQS_L2 MA_DQS_L2 DDR_A_DQS1
DDR_A_DQS#2 (8)
(9) DDR_B_DQS1 D16 MB_DQS_H1 MA_DQS_H1 G16 DDR_A_DQS1 (8)
DDR_B_DQS#1 C16 G15 DDR_A_DQS#1
(9) DDR_B_DQS#1 MB_DQS_L1 MA_DQS_L1 DDR_A_DQS#1 (8)
DDR_B_DQS0 C12 G13 DDR_A_DQS0
(9) DDR_B_DQS0 MB_DQS_H0 MA_DQS_H0 DDR_A_DQS0 (8)
DDR_B_DQS#0 B12 H13 DDR_A_DQS#0
(9) DDR_B_DQS#0 MB_DQS_L0 MA_DQS_L0 DDR_A_DQS#0 (8)
FOX_PZ63823-284S-41F
Athlon 64 S1
Processor Socket
+1.8V
1
R228
1K_0402_1% +0.9VREF_CPU
2
CPU_VREF_REF
A1 A26
1 1 1 1 1
1
Athlon 64 S1g1
2
1000P_0402_50V7K 1000P_0402_50V7K
uPGA638
Top View
VDD_VREF_SUS_CPU
LAYOUT:PLACE CLOSE TO CPU
1
AF1 1
A
Dr-Bios.com B C
Security Classification
Issued Date 2006/08/18
Compal Secret Data
Deciphered Date 2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
Size Document Number
Custom 401474
Title
Date:
SCHEMATIC, M/B LA-3581P
1
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
R155 R156
+2.5VS 300_0402_5% 300_0402_5%
W=50mils JP22D
2
1 2 L28 +2.5VS_VDDA F8 AF6 H_THERMTRIP_S#
VDDA2 THERMTRIP_L
1 1 1 1 F9 VDDA1 PROCHOT_L AC7 CPU_PROCHOT#_1.8
C266 FCM2012C-800_0805 C276 C271
C277 CPU_HT_RESET# B7
22U_0805_6.3V6M 3300P_0402_50V7K R370 300_0402_5% CPU_ALL_PWROK RESET_L
+1.8V 1 2 A7 PWROK
2 2 2 2 R371 300_0402_5% CPU_LDTSTOP#
1 2 F10 LDTSTOP_L
D 4.7U_0805_10V4Z 0.22U_0603_16V7K VID5 D
VID5 A5 VID5 (41)
R369 1 2 0_0402_5% CPU_SIC_R AF4 C6 VID4
(15) CPU_SIC SIC VID4 VID4 (41)
R368 1 2 0_0402_5% CPU_SID_R AF5 A6 VID3
(15) CPU_SID SID VID3 VID3 (41)
A4 VID2
VID2 VID2 (41)
+1.2V_HT R378 1 2 44.2_0603_1% CPU_HTREF1 P6 C5 VID1
HTREF1 VID1 VID1 (41)
R376 1 2 44.2_0603_1% CPU_HTREF0 R6 B5 VID0
HTREF0 VID0 VID0 (41)
+1.8V +3VS +1.8V
5:10 AC6 CPU_PRESENT#
CPU_VCC_SENSE CPU_PRESENT_L
(41) CPU_VCC_SENSE F6 VDD_FB_H
1
R381 place them to CPU within 1" CPU_VSS_SENSE E6 A3 PSI#
(41) CPU_VSS_SENSE VDD_FB_L PSI_L PSI# (41)
4.7K_0402_5% C543 0.1U_0402_16V4Z
1
@ 1 2 PAD TP3 W9
R379 PAD TP1 VDDIO_FB_H
Y9 VDDIO_FB_L
5
300_0402_5% U26
2
2 C5451 2 CPU_CLKIN_SC_P A9
P
B (10) CPUCLK CLKIN_H
4 1 2 CPU_ALL_PWROK CPU_CLKIN_SC_N A8
2
Y CLKIN_L
1
1 R383 0_0402_5% 3900P_0402_50V7K
(10) HTCPU_PWRGD A
G
@ R382 CPU_DBRDY G10 E10 CPU_DBREQ#
NC7SZ08P5X_NL_SC70-5 169_0402_1% DBRDY DBREQ_L
3
@ CPU_TMS AA9
CPU_TCK TMS
AC9 AE9 CPU_TDO
2
C5441 CPU_TRST# TCK TDO
1 2 (10) CPUCLK# 2 AD9 TRST_L
R380 0_0402_5% CPU_TDI AF9
3900P_0402_50V7K TDI R384
+1.8V CPU_TEST25_H_BYPASSCLK_H E9 C9 CPU_TEST29_H_FBCLKOUT_P 1 2
+1.8V CPU_TEST25_L_BYPASSCLK_L TEST25_H TEST29_H CPU_TEST29_L_FBCLKOUT_N 80.6_0402_1%
E8 TEST25_L TEST29_L C8 ROUTE AS 80 Ohm DIFFERENTIAL PAIR
CPU_TEST19_PLLTEST0 PLACE IT CLOSE TO CPU WITHIN 1"
G9 TEST19 5:5:5
1
MISC
R184 AA7 TEST13
5
300_0402_5% U9 C2 TEST9
2 D7 AE7
P
B CPU_LDTSTOP# TEST17 TEST24
4 1 2 E7 AD7
2
@ TEST12 TEST20
C3 TEST7 TEST28_H J7
1 2 AA6 TEST6 TEST28_L H8
C R183 0_0402_5% CPU_THERMDC C
W7 THERMDC TEST27 AF8
CPU_THERMDA W8 AE6 CPU_TEST26_BURNIN#
+1.8V THERMDA TEST26
10:10 Y6
AB6
TEST3 TEST10 K8
C4
TEST2 TEST8
P20 RSVD0 RSVD8 H16
1
@ R24
NC7SZ08P5X_NL_SC70-5 CPU_TEST21_SCANEN R197 300_0402_5% RSVD15
1 2 W18
3
FOX_PZ63823-284S-41F
Processor Socket
+1.8V
220_0402_5%HT@
220_0402_5%HT@
220_0402_5%HT@
220_0402_5%HT@
220_0402_5%
1
R163 1
R162 1
R161 1
R160 1
R159 1
1
B +1.8V B
JP7 R114 R127 R117
1
300_0402_5% 1K_0402_5% @ 1K_0402_5%
1 2 +3VS +3V
2
3 4 R116
2
2 2
CPU_DBREQ# 5 6 10K_0402_5%
7 8
2
CPU_DBRDY Q15
2
9 10
1
CPU_TDO
G
1 2 H_THERMTRIP# (10)
2
19 20 R115 0_0402_5%
21 22 3V_LDT_RST# CPU_HT_RESET# @
23 24 1 2 1 3
R535 0_0402_5%
D
26 @
NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY. SAMTEC_ASP-68200-07 Q14
@ 2N7002_SOT23
HT@
+1.8V +3VS
PVT Modify 2007/03/22
1
+3VS R133 R130
10K_0402_5% 4.7K_0402_5%
2CPU_PH_G 2
2
1
1
C269
R186
0.1U_0402_16V4Z @ 10K_0402_5%
2
1
B
C275 Q19
2
U4
E
2200P_0402_50V7K CPU_THERMDA 2 1 1 2 CPU_PROCHOT#_1.8 3 1
2 D+ VDD1 (10) PROCHOT# EC_THERM# (15,27,28)
C
A R141 0_0402_5% MMBT3904_SOT23 A
CPU_THERMDC 3 6 @
D- ALERT#
EC_SMB_CK2
Dr-Bios.com
(27,28) EC_SMB_CK2 8 SCLK THERM# 4
EC_SMB_DA2 7 5
(27,28) EC_SMB_DA2 SDATA GND Connect to MCP67
ADM1032ARM_RM8
+CPU_CORE
1 1 1 1
+ C548 + C550 + C546 + C547
D D
+CPU_CORE +CPU_CORE
C287 C288 C289
10U_0805_10V6M 10U_0805_10V6M 10U_0805_10V6M
1 1 1 1 1 1 1 1
JP22F
AA4 VSS1 VSS66 J6 10/2 Modify
AA11 VSS2 VSS67 J8
+CPU_CORE +CPU_CORE AA13 J10
JP22E AA15
VSS3
VSS4
VSS68
VSS69 J12 CPU SOCKET S1 DECOUPLING
AC4 VDD1 VDD43 V12 AA17 VSS5 VSS70 J14
AD2 VDD2 VDD44 V14 AA19 VSS6 VSS71 J16
G4 VDD3 VDD45 W4 AB2 VSS7 VSS72 J18
H2 VDD4 Y2 AB7 K2 +CPU_CORE
VDD46 VSS8 VSS73
J9 VDD5 VDD47 J15 AB9 VSS9 VSS74 K7
J11 VDD6 VDD48 K16 AB23 VSS10 VSS75 K9
J13 VDD7 VDD49 L15 AB25 VSS11 VSS76 K11 1 1 1 1 1 1 1 1 1
K6 VDD8 M16 AC11 K13 C315 C326 C332 C333 C327 C328 C324 C316 C334
VDD50 VSS12 VSS77
K10 VDD9 VDD51 P16 AC13 VSS13 VSS78 K15
K12 VDD10 T16 AC15 K17 22U_0805_6.3V6M 22U_0805_6.3V6M 10U_0805_10V6M 22U_0805_6.3V6M 10U_0805_10V6M 10U_0805_10V6M 10U_0805_10V6M 10U_0805_10V6M 22U_0805_6.3V6M
VDD52 VSS14 VSS79 2 2 2 2 2 2 2 2 2
K14 VDD11 VDD53 U15 AC17 VSS15 VSS80 L6
L4 VDD12 VDD54 V16 AC19 VSS16 VSS81 L8
L7 VDD13 +1.8V AC21 L10
VSS17 VSS82
L9 VDD14 AD6 VSS18 VSS83 L12
L11 VDD15 VDDIO1 H25 AD8 VSS19 VSS84 L14
L13 VDD16 VDDIO2 J17 AD25 VSS20 VSS85 L16
M2 VDD17 VDDIO3 K18 AE11 VSS21 VSS86 L18
C +CPU_CORE +1.8V C
M6 VDD18 VDDIO4 K21 AE13 VSS22 VSS87 M7
M8 VDD19 VDDIO5 K23 AE15 VSS23 VSS88 M9
M10 VDD20 VDDIO6 K25 AE17 VSS24 VSS89 M11
Power
Ground
R7 VDD27 VDDIO13 P18 B9 VSS31 VSS96 P2
R9 VDD28 VDDIO14 P21 B11 VSS32 VSS97 P7
R11 VDD29 VDDIO15 P23 B13 VSS33 VSS98 P9
T2 VDD30 VDDIO16 P25 B15 VSS34 VSS99 P11
T6 VDD31 VDDIO17 R17 B17 VSS35 VSS100 P17
T8 VDD32 VDDIO18 T18 B19 VSS36 VSS101 R8
T10 VDD33 VDDIO19 T21 B21 VSS37 VSS102 R10
T12 VDD34 VDDIO20 T23 B23 VSS38 VSS103 R16
T14 VDD35 VDDIO21 T25 B25 VSS39 VSS104 R18
U7 VDD36 VDDIO22 U17 D6 VSS40 VSS105 T7
U9 VDD37 V18 D8 T9
U11 VDD38
U13 VDD39
VDDIO23
VDDIO24 V21
V23
D9
D11
VSS41
VSS42
VSS106
VSS107 T11
T13
DECOUPLING BETWEEN PROCESSOR AND DIMMs
VDDIO25 VSS43 VSS108
V6 VDD40 V25 D13 T15
V8 VDD41
VDDIO26
VDDIO27 Y25 D15
VSS44
VSS45
VSS109
VSS110 T17 PLACE CLOSE TO PROCESSOR AS POSSIBLE
V10 VDD42 D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6
FOX_PZ63823-284S-41F D21 U8 +1.8V
VSS48 VSS113
D23 VSS49 VSS114 U10
Athlon 64 S1 D25 U12
Processor Socket VSS50 VSS115
E4 VSS51 VSS116 U14 1 1 1 1 1 1 1
F2 U16 C352 C342 C351 C388 C362 C386 C383
VSS52 VSS117
F11 VSS53 VSS118 U18
F13 V2 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z
VSS54 VSS119 2 2 2 2 2 2 2
F15 VSS55 VSS120 V7
F17 VSS56 VSS121 V9
F19 VSS57 VSS122 V11
F21 VSS58 VSS123 V13
B A1 A26 F23
F25
VSS59 VSS124 V15
V17 B
VSS60 VSS125
H7 VSS61 VSS126 W6 1 1 1 1 1
H9 Y21 C381 C385 C382 C340 C360
VSS62 VSS127
H21 VSS63 VSS128 Y23
H23 N6 0.22U_0402_10V4Z 0.01U_0402_16V7K 0.01U_0402_16V7K 180P_0402_50V8J 180P_0402_50V8J
VSS64 VSS129 2 2 2 2 2
J4 VSS65
Athlon 64 S1g1 FOX_PZ63823-284S-41F
uPGA638 Athlon 64 S1
Processor Socket
Top View +0.9V
1 1 1 1 1 1 1 1
C304 C320 C303 C302 C313 C312 C314 C298
AF1 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z
2 2 2 2 2 2 2 2
1 1 1 1 1 1 1 1
C299 C300 C307 C306 C305 C297 C296 C295
A A
5
Dr-Bios.com
4 3
Security Classification
Security Classification
Issued Date 2006/08/18
Compal Secret Data
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
C
Size
2007/8/18 Title
Date:
SCHEMATIC, M/B LA-3581P
Document Number
401474
Tuesday, November 27, 2007
1
Sheet 7 of 43
Rev
C
5 4 3 2 1
C579
C428
C399 C414 C427 C425 C577 C575
1
R275 4.7U_0805_6.3V6K 4.7U_0805_6.3V6K 0.01U_0402_16V7K10P_0402_50V8K 0.22U_0603_16V7K0.22U_0603_16V7K
JP28 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 VREF VSS 2 1 1
3 4 DDR_A_D4 1K_0402_1% C573
DDR_A_D0 VSS DQ4 DDR_A_D5 0.22U_0603_16V7K
5 6
2
DDR_A_D1 DQ0 DQ5 2 2 2 2 2 2 2 2 2 2 2 2 2 2
7 DQ1 VSS 8
DDR_A_DM0 2 2 C413 C398 C424 C426 C578 C576 C574
9 VSS DM0 10
4.7U_0805_10V4Z
0.1U_0402_16V4Z
D DDR_A_DQS#0 4.7U_0805_6.3V6K 4.7U_0805_6.3V6K 0.01U_0402_16V7K10P_0402_50V8K 0.22U_0603_16V7K0.22U_0603_16V7K0.22U_0603_16V7K D
11 DQS0# VSS 12
DDR_A_DQS0 13 14 DDR_A_D6
DQS0 DQ6
1
15 16 DDR_A_D7 R274
DDR_A_D2 VSS DQ7
17 DQ2 VSS 18
DDR_A_D3 19 20 DDR_A_D12
DQ3 DQ12 DDR_A_D13 1K_0402_1%
21 VSS DQ13 22
DDR_A_D8 23 24
2
DDR_A_D9 DQ8 VSS DDR_A_DM1 +1.8V
25 DQ9 DM1 26
27 VSS VSS 28
DDR_A_DQS#1 29 30 DDR_A_CLK1
DQS1# CK0 DDR_A_CLK1 (5)
DDR_A_DQS1 31 32 DDR_A_CLK#1
DQS1 CK0# DDR_A_CLK#1 (5)
33 VSS VSS 34
DDR_A_D10 35 36 DDR_A_D14
DQ10 DQ14
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
DDR_A_D11 37 38 DDR_A_D15 1
DQ11 DQ15
39 VSS VSS 40 1 1 1 1 1 1 1 1 1 1
+ C628
220U_D2_4VM_R15
C407
C408
C409
C410
C411
C412
C415
C416
C417
C418
41 VSS VSS 42
DDR_A_D16 DDR_A_D20 2 2 2 2 2 2 2 2 2 2 2
43 DQ16 DQ20 44
DDR_A_D17 45 46 DDR_A_D21 DDR_A_D[0..63]
DQ17 DQ21 (5) DDR_A_D[0..63]
47 VSS VSS 48
DDR_A_DQS#2 49 50 DDR_A_DM[0..7]
DQS2# NC (5) DDR_A_DM[0..7]
DDR_A_DQS2 51 52 DDR_A_DM2
DQS2 DM2 DDR_A_DQS[0..7]
53 VSS VSS 54 (5) DDR_A_DQS[0..7]
DDR_A_D18 55 56 DDR_A_D22
DDR_A_D19 DQ18 DQ22 DDR_A_D23 DDR_A_MA[0..15]
57 DQ19 DQ23 58 (5) DDR_A_MA[0..15]
59 VSS VSS 60
DDR_A_D24 61 62 DDR_A_D28 DDR_A_DQS#[0..7]
DDR_A_D25 DQ24 DQ28 DDR_A_D29 (5) DDR_A_DQS#[0..7] +0.9V
63 DQ25 DQ29 64
65 VSS VSS 66
C DDR_A_DM3 DDR_A_DQS#3 C
67 DM3 DQS3# 68
69 70 DDR_A_DQS3
NC DQS3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
71 VSS VSS 72
DDR_A_D26 73 74 DDR_A_D30 1
DDR_A_D27 DQ26 DQ30 DDR_A_D31 C422
75 DQ27 DQ31 76 1 1 1 1 1 1 1 1 1 1 1 1 1 1
77 78 +
DDR_CKE0_DIMMA VSS VSS DDR_CKE1_DIMMA
(5) DDR_CKE0_DIMMA 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMA (5)
81 82 150U_D2_6.3VM
DDR_CS2_DIMMA# VDD VDD DDR_A_MA15 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
(5) DDR_CS2_DIMMA# 83 NC NC/A15 84
C437
C436
C435
C434
C433
C431
C432
C453
C452
C451
C450
C449
C448
C447
DDR_A_BS#2 85 86 DDR_A_MA14
(5) DDR_A_BS#2 BA2 NC/A14
87 VDD VDD 88
DDR_A_MA12 89 90 DDR_A_MA11
DDR_A_MA9 A12 A11 DDR_A_MA7
91 A9 A7 92
DDR_A_MA8 93 94 DDR_A_MA6 Layout Note:
A8 A6
95 96
DDR_A_MA5 97
VDD VDD
98 DDR_A_MA4 Place one cap close to every 2 pullup
DDR_A_MA3 A5 A4 DDR_A_MA2
99 A3 A2 100 resistors terminated to +0.9V
DDR_A_MA1 101 102 DDR_A_MA0
A1 A0
103 VDD VDD 104
DDR_A_MA10 105 106 DDR_A_BS#1 +0.9V
A10/AP BA1 DDR_A_BS#1 (5)
DDR_A_BS#0 107 108 DDR_A_RAS#
(5) DDR_A_BS#0 BA0 RAS# DDR_A_RAS# (5)
DDR_A_WE# 109 110 DDR_CS0_DIMMA#
(5) DDR_A_WE# WE# S0# DDR_CS0_DIMMA# (5)
111 112 DDR_CKE0_DIMMA 1 4
DDR_A_CAS# VDD VDD DDR_A_ODT0 DDR_CS2_DIMMA#
(5) DDR_A_CAS# 113 CAS# ODT0 114 DDR_A_ODT0 (5) 2 3
DDR_CS1_DIMMA# 115 116 DDR_A_MA13 RP10 47_0404_4P2R_5%
(5) DDR_CS1_DIMMA# NC/S1# NC/A13
117 118 DDR_A_BS#2 1 4 1 4 DDR_A_MA14
DDR_A_ODT1 VDD VDD DDR_CS3_DIMMA# DDR_A_MA12 DDR_A_MA15
(5) DDR_A_ODT1 119 NC/ODT1 NC 120 DDR_CS3_DIMMA# (5) 2 3 2 3
121 122 RP11 47_0404_4P2R_5% RP15 47_0404_4P2R_5%
DDR_A_D32 VSS VSS DDR_A_D36 DDR_A_MA9 DDR_A_MA7
123 DQ32 DQ36 124 1 4 1 4
DDR_A_D33 125 126 DDR_A_D37 DDR_A_MA8 2 3 2 3 DDR_CKE1_DIMMA
B DQ33 DQ37 RP12 47_0404_4P2R_5% RP16 47_0404_4P2R_5% B
127 VSS VSS 128
DDR_A_DQS#4 129 130 DDR_A_DM4 DDR_A_MA5 1 4 1 4 DDR_A_MA6
DDR_A_DQS4 DQS4# DM4 DDR_A_MA3 DDR_A_MA11
131 DQS4 VSS 132 2 3 2 3
133 134 DDR_A_D38 RP13 47_0404_4P2R_5% RP17 47_0404_4P2R_5%
DDR_A_D34 VSS DQ38 DDR_A_D39 DDR_A_MA1 DDR_A_MA2
135 DQ34 DQ39 136 1 4 1 4
DDR_A_D35 137 138 DDR_A_MA10 2 3 2 3 DDR_A_MA4
DQ35 VSS DDR_A_D44 RP14 47_0404_4P2R_5% RP20 47_0404_4P2R_5%
139 VSS DQ44 140
DDR_A_D40 141 142 DDR_A_D45 DDR_A_BS#0 1 4 1 4 DDR_A_BS#1
DDR_A_D41 DQ40 DQ45 DDR_A_WE# DDR_A_MA0
143 DQ41 VSS 144 2 3 2 3
145 146 DDR_A_DQS#5 RP9 47_0404_4P2R_5% RP18 47_0404_4P2R_5%
DDR_A_DM5 VSS DQS5# DDR_A_DQS5 DDR_A_CAS# DDR_CS0_DIMMA#
147 DM5 DQS5 148 1 4 1 4
149 150 DDR_CS1_DIMMA# 2 3 2 3 DDR_A_RAS#
DDR_A_D42 VSS VSS DDR_A_D46 RP8 47_0404_4P2R_5% RP19 47_0404_4P2R_5%
151 DQ42 DQ46 152
DDR_A_D43 153 154 DDR_A_D47 DDR_A_ODT1 R277 1 2 47_0402_1% 1 4 DDR_A_MA13
DQ43 DQ47 DDR_CS3_DIMMA# R280
155 VSS VSS 156 1 2 47_0402_1% 2 3 DDR_A_ODT0
DDR_A_D48 157 158 DDR_A_D52 RP21 47_0404_4P2R_5%
DDR_A_D49 DQ48 DQ52 DDR_A_D53
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 DDR_A_CLK2 +1.8V
NC,TEST CK1 DDR_A_CLK2 (5)
165 166 DDR_A_CLK#2
VSS CK1# DDR_A_CLK#2 (5)
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_DQS#6 167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 DQS6 DM6 170
171 VSS VSS 172 1 1 1 1 1 1 1 1 1
DDR_A_D50 173 174 DDR_A_D54
DDR_A_D51 DQ50 DQ54 DDR_A_D55
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_A_D56 DDR_A_D60 2 2 2 2 2 2 2 2 2
179 DQ56 DQ60 180
C443
C438
C439
C445
C446
C440
C441
C442
C444
DDR_A_D57 181 182 DDR_A_D61
DQ57 DQ61
183 VSS VSS 184
DDR_A_DM7 185 186 DDR_A_DQS#7 +0.9V
A DM7 DQS7# DDR_A_DQS7 A
187 VSS DQS7 188
DDR_A_D58 189 190 Layout Note:
DDR_A_D59 DQ58 VSS DDR_A_D62
191 192
193
DQ59 DQ62
194 DDR_A_D63 Place one 0.1uF cap close to every 2 pullup
MEM_SMBDATA VSS DQ63
(9,15) MEM_SMBDATA 195 SDA VSS 196 resistors terminated to +0.9V
MEM_SMBCLK 197 198 R281 1 2 10K_0402_5%
(9,15) MEM_SMBCLK SCL SAO
199 200 R282 1 2 10K_0402_5% Security Classification Compal Secret Data
+3VS VDDSPD SA1
1
C429 Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
FOX_AS0A426-M2RN-7F SCHEMATIC, M/B LA-3581P
Dr-Bios.com
0.1U_0402_16V4Z <BOM Structure> THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
2 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DIMM1 REV H:5.2mm (BOT) DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
DDR_B_D[0..63]
+1.8V +1.8V +DIMM_VREF (5) DDR_B_D[0..63] +1.8V
DDR_B_DM[0..7] C654 C656
(5) DDR_B_DM[0..7]
1000P_0402_50V7K 1000P_0402_50V7K
DDR_B_DQS[0..7]
(5) DDR_B_DQS[0..7]
0.1U_0402_16V4Z
1 1 1 1
4.7U_0805_10V4Z
C455
C459
JP29 DDR_B_MA[0..15]
(5) DDR_B_MA[0..15]
1 VREF VSS 2 1 1
3 4 DDR_B_D4 DDR_B_DQS#[0..7]
DDR_B_D0 VSS DQ4 DDR_B_D5 (5) DDR_B_DQS#[0..7] 2 2 2 2
5 DQ0 DQ5 6
DDR_B_D1 7 8
DQ1 VSS DDR_B_DM0 2 2 C653 C655
9 VSS DM0 10
D DDR_B_DQS#0 1000P_0402_50V7K 1000P_0402_50V7K D
11 DQS0# VSS 12
DDR_B_DQS0 13 14 DDR_B_D6
DQS0 DQ6 DDR_B_D7
15 VSS DQ7 16
DDR_B_D2 17 18 +1.8V
DDR_B_D3 DQ2 VSS DDR_B_D12
19 DQ3 DQ12 20
21 22 DDR_B_D13
DDR_B_D8 VSS DQ13
23 DQ8 VSS 24
DDR_B_D9 25 26 DDR_B_DM1
DQ9 DM1
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
27 VSS VSS 28 1
DDR_B_DQS#1 29 30 DDR_B_CLK1 1 1 1 1 1 1 1 1 1 1
DQS1# CK0 DDR_B_CLK1 (5) + C629
DDR_B_DQS1 31 32 DDR_B_CLK#1
DQS1 CK0# DDR_B_CLK#1 (5)
33 34 220U_D2_4VM_R15
VSS VSS
C625
C624
C623
C622
C627
C626
C632
C633
C630
C631
DDR_B_D10 35 36 DDR_B_D14
DDR_B_D11 DQ10 DQ14 DDR_B_D15 2 2 2 2 2 2 2 2 2 2 2
37 DQ11 DQ15 38
39 VSS VSS 40
41 VSS VSS 42
DDR_B_D16 43 44 DDR_B_D20
DDR_B_D17 DQ16 DQ20 DDR_B_D21
45 DQ17 DQ21 46
47 VSS VSS 48
DDR_B_DQS#2 49 50 +0.9V
DDR_B_DQS2 DQS2# NC DDR_B_DM2
51 DQS2 DM2 52
53 VSS VSS 54
DDR_B_D18 55 56 DDR_B_D22
DQ18 DQ22
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_B_D19 57 58 DDR_B_D23
DQ19 DQ23
59 VSS VSS 60
DDR_B_D24 61 62 DDR_B_D28 1 1 1 1 1 1 1 1 1 1 1 1
DDR_B_D25 DQ24 DQ28 DDR_B_D29
63 DQ25 DQ29 64
65 VSS VSS 66
C DDR_B_DM3 DDR_B_DQS#3 C
67 DM3 DQS3# 68
DDR_B_DQS3 2 2 2 2 2 2 2 2 2 2 2 2
69 NC DQS3 70
C483
C482
C481
C480
C479
C478
C466
C464
C465
C463
C462
C461
71 VSS VSS 72
DDR_B_D26 73 74 DDR_B_D30
DDR_B_D27 DQ26 DQ30 DDR_B_D31
75 DQ27 DQ31 76
77 VSS VSS 78
DDR_CKE0_DIMMB 79 80 DDR_CKE1_DIMMB
(5) DDR_CKE0_DIMMB CKE0 NC/CKE1 DDR_CKE1_DIMMB (5)
81 VDD VDD 82 Layout Note:
DDR_CS2_DIMMB# 83 84 DDR_B_MA15
(5) DDR_CS2_DIMMB# NC NC/A15 Place one cap close to every 2 pullup
DDR_B_BS#2 85 86 DDR_B_MA14
(5) DDR_B_BS#2 BA2 NC/A14
87 VDD VDD 88 resistors terminated to +0.9V
DDR_B_MA12 89 90 DDR_B_MA11
DDR_B_MA9 A12 A11 DDR_B_MA7
91 A9 A7 92
DDR_B_MA8 93 94 DDR_B_MA6
A8 A6
95 VDD VDD 96
DDR_B_MA5 97 98 DDR_B_MA4 +0.9V
DDR_B_MA3 A5 A4 DDR_B_MA2
99 A3 A2 100
DDR_B_MA1 101 102 DDR_B_MA0
A1 A0 DDR_CS2_DIMMB#
103 VDD VDD 104 1 4
DDR_B_MA10 105 106 DDR_B_BS#1 DDR_CKE0_DIMMB 2 3
A10/AP BA1 DDR_B_BS#1 (5)
DDR_B_BS#0 107 108 DDR_B_RAS# RP22 47_0404_4P2R_5%
(5) DDR_B_BS#0 BA0 RAS# DDR_B_RAS# (5)
DDR_B_WE# 109 110 DDR_CS0_DIMMB# DDR_B_MA12 1 4 1 4 DDR_CKE1_DIMMB
(5) DDR_B_WE# WE# S0# DDR_CS0_DIMMB# (5)
111 112 DDR_B_BS#2 2 3 2 3 DDR_B_MA15
DDR_B_CAS# VDD VDD DDR_B_ODT0 RP23 47_0404_4P2R_5% RP30 47_0404_4P2R_5%
(5) DDR_B_CAS# 113 CAS# ODT0 114 DDR_B_ODT0 (5)
DDR_CS1_DIMMB# 115 116 DDR_B_MA13 DDR_B_MA8 1 4 1 4 DDR_B_MA14
(5) DDR_CS1_DIMMB# NC/S1# NC/A13
117 118 DDR_B_MA9 2 3 2 3 DDR_B_MA11
DDR_B_ODT1 VDD VDD DDR_CS3_DIMMB# RP24 47_0404_4P2R_5% RP31 47_0404_4P2R_5%
(5) DDR_B_ODT1 119 NC/ODT1 NC 120 DDR_CS3_DIMMB# (5)
121 122 DDR_B_MA3 1 4 1 4 DDR_B_MA7
DDR_B_D32 VSS VSS DDR_B_D36 DDR_B_MA5 DDR_B_MA6
123 DQ32 DQ36 124 2 3 2 3
DDR_B_D33 125 126 DDR_B_D37 RP25 47_0404_4P2R_5% RP32 47_0404_4P2R_5%
B DQ33 DQ37 DDR_B_MA10 DDR_B_MA4 B
127 VSS VSS 128 1 4 1 4
DDR_B_DQS#4 129 130 DDR_B_DM4 DDR_B_MA1 2 3 2 3 DDR_B_MA2
DDR_B_DQS4 DQS4# DM4 RP26 47_0404_4P2R_5% RP33 47_0404_4P2R_5%
131 DQS4 VSS 132
133 134 DDR_B_D38 DDR_B_WE# 1 4 1 4 DDR_B_MA0
DDR_B_D34 VSS DQ38 DDR_B_D39 DDR_B_BS#0 DDR_B_BS#1
135 DQ34 DQ39 136 2 3 2 3
DDR_B_D35 137 138 RP27 47_0404_4P2R_5% RP34 47_0404_4P2R_5%
DQ35 VSS DDR_B_D44 DDR_CS0_DIMMB# DDR_B_CAS#
139 VSS DQ44 140 1 4 1 4
DDR_B_D40 141 142 DDR_B_D45 DDR_B_RAS# 2 3 2 3 DDR_CS1_DIMMB#
DDR_B_D41 DQ40 DQ45 RP29 47_0404_4P2R_5% RP28 47_0404_4P2R_5%
143 DQ41 VSS 144
145 146 DDR_B_DQS#5 DDR_B_ODT1 R286 1 2 47_0402_1% 1 4 DDR_B_ODT0
DDR_B_DM5 VSS DQS5# DDR_B_DQS5 DDR_CS3_DIMMB# R287
147 DM5 DQS5 148 1 2 47_0402_1% 2 3 DDR_B_MA13
149 150 RP35 47_0404_4P2R_5%
DDR_B_D42 VSS VSS DDR_B_D46
151 DQ42 DQ46 152
DDR_B_D43 153 154 DDR_B_D47
DQ43 DQ47
155 VSS VSS 156
DDR_B_D48 157 158 DDR_B_D52
DDR_B_D49 DQ48 DQ52 DDR_B_D53
159 DQ49 DQ53 160
161 VSS VSS 162 +1.8V
163 164 DDR_B_CLK2
NC,TEST CK1 DDR_B_CLK2 (5)
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
165 166 DDR_B_CLK#2
VSS CK1# DDR_B_CLK#2 (5)
DDR_B_DQS#6 167 168
DDR_B_DQS6 DQS6# VSS DDR_B_DM6
169 DQS6 DM6 170 1 1 1 1 1 1 1 1 1 1 1
171 VSS VSS 172
DDR_B_D50 173 174 DDR_B_D54
DDR_B_D51 DQ50 DQ54 DDR_B_D55
175 DQ51 DQ55 176
2 2 2 2 2 2 2 2 2 2 2
177 VSS VSS 178
C476
C472
C471
C470
C469
C457
C458
C477
C486
C485
C484
DDR_B_D56 179 180 DDR_B_D60
DDR_B_D57 DQ56 DQ60 DDR_B_D61
181 DQ57 DQ61 182
183 VSS VSS 184 +0.9V
DDR_B_DM7 185 186 DDR_B_DQS#7
A DM7 DQS7# DDR_B_DQS7 A
187 VSS DQS7 188 Layout Note:
DDR_B_D58 189 190
DDR_B_D59 191
DQ58 VSS
192 DDR_B_D62 Place one 0.1uF cap close to every 2 pullup
DQ59 DQ62 DDR_B_D63
193 VSS DQ63 194 resistors terminated to +0.9V
MEM_SMBDATA 195 196
(8,15) MEM_SMBDATA SDA VSS
MEM_SMBCLK 197 198 R289 1 2 10K_0402_5% +3VS
(8,15) MEM_SMBCLK SCL SAO
199 200 R288 1 2 10K_0402_5% Security Classification Compal Secret Data
+3VS VDDSPD SA1
1
C456 Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
FOX_AS0A426-MARG-7F SCHEMATIC, M/B LA-3581P
Dr-Bios.com
0.1U_0402_16V4Z Change PCB Footprint THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
2 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474 C
DIMM0 REV H:9.2mm (BOT) MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 9 of 43
5 4 3 2 1
5 4 3 2 1
U23A
MCP67
H_CADOP0
PART 1 OF 8 H_CADIP0
(4) H_CADOP0 AF16 HT_MCP_RXD0_P HT_MCP_TXD0_P AK27 H_CADIP0 (4)
H_CADON0 AG16 AJ27 H_CADIN0
(4) H_CADON0 HT_MCP_RXD0_N HT_MCP_TXD0_N H_CADIN0 (4)
H_CADOP1 AH16 AK26 H_CADIP1
(4) H_CADOP1 HT_MCP_RXD1_P HT_MCP_TXD1_P H_CADIP1 (4)
H_CADON1 AJ16 AL26 H_CADIN1
D (4) H_CADON1 HT_MCP_RXD1_N HT_MCP_TXD1_N H_CADIN1 (4) D
H_CADOP2 AJ15 AK25 H_CADIP2
(4) H_CADOP2 HT_MCP_RXD2_P HT_MCP_TXD2_P H_CADIP2 (4)
H_CADON2 AK15 AL25 H_CADIN2
(4) H_CADON2 HT_MCP_RXD2_N HT_MCP_TXD2_N H_CADIN2 (4)
H_CADOP3 AK16 AL24 H_CADIP3
(4) H_CADOP3 HT_MCP_RXD3_P HT_MCP_TXD3_P H_CADIP3 (4)
H_CADON3 AL16 AK24 H_CADIN3
(4) H_CADON3 HT_MCP_RXD3_N HT_MCP_TXD3_N H_CADIN3 (4)
H_CADOP4 AG17 AK22 H_CADIP4
(4) H_CADOP4 HT_MCP_RXD4_P HT_MCP_TXD4_P H_CADIP4 (4)
H_CADON4 AF17 AL22 H_CADIN4
(4) H_CADON4 HT_MCP_RXD4_N HT_MCP_TXD4_N H_CADIN4 (4)
H_CADOP5 AL17 AK21 H_CADIP5
(4) H_CADOP5 HT_MCP_RXD5_P HT_MCP_TXD5_P H_CADIP5 (4)
H_CADON5 AK17 AL21 H_CADIN5
(4) H_CADON5 HT_MCP_RXD5_N HT_MCP_TXD5_N H_CADIN5 (4)
H_CADOP6 AL18 AH21 H_CADIP6
(4)
(4)
H_CADOP6
H_CADON6
H_CADON6
H_CADOP7
AK18
HT_MCP_RXD6_P
HT_MCP_RXD6_N
HT HT_MCP_TXD6_P
HT_MCP_TXD6_N AJ21 H_CADIN6
H_CADIP7
H_CADIP6
H_CADIN6
(4)
(4)
(4) H_CADOP7 AJ19 HT_MCP_RXD7_P HT_MCP_TXD7_P AL20 H_CADIP7 (4)
H_CADON7 AK19 AM20 H_CADIN7
(4) H_CADON7 HT_MCP_RXD7_N HT_MCP_TXD7_N H_CADIN7 (4)
H_CADOP8 AD14 AG27 H_CADIP8
(4) H_CADOP8 HT_MCP_RXD8_P HT_MCP_TXD8_P H_CADIP8 (4)
H_CADON8 AE14 AH27 H_CADIN8
(4) H_CADON8 HT_MCP_RXD8_N HT_MCP_TXD8_N H_CADIN8 (4)
H_CADOP9 AF14 AF25 H_CADIP9
(4) H_CADOP9 HT_MCP_RXD9_P HT_MCP_TXD9_P H_CADIP9 (4)
H_CADON9 AG14 AG25 H_CADIN9
(4) H_CADON9 HT_MCP_RXD9_N HT_MCP_TXD9_N H_CADIN9 (4)
H_CADOP10 AH14 AH25 H_CADIP10
(4) H_CADOP10 HT_MCP_RXD10_P HT_MCP_TXD10_P H_CADIP10 (4)
H_CADON10 AJ14 AJ25 H_CADIN10
(4) H_CADON10 HT_MCP_RXD10_N HT_MCP_TXD10_N H_CADIN10 (4)
H_CADOP11 AL13 AE23 H_CADIP11
(4) H_CADOP11 HT_MCP_RXD11_P HT_MCP_TXD11_P H_CADIP11 (4)
H_CADON11 AK13 AF23 H_CADIN11
(4) H_CADON11 HT_MCP_RXD11_N HT_MCP_TXD11_N H_CADIN11 (4)
H_CADOP12 AC15 AD21 H_CADIP12
(4) H_CADOP12 HT_MCP_RXD12_P HT_MCP_TXD12_P H_CADIP12 (4)
H_CADON12 AD15 AE21 H_CADIN12
(4) H_CADON12 HT_MCP_RXD12_N HT_MCP_TXD12_N H_CADIN12 (4)
H_CADOP13 AD16 AF21 H_CADIP13
(4) H_CADOP13 HT_MCP_RXD13_P HT_MCP_TXD13_P H_CADIP13 (4)
H_CADON13 AE16 AG21 H_CADIN13
(4) H_CADON13 HT_MCP_RXD13_N HT_MCP_TXD13_N H_CADIN13 (4)
H_CADOP14 AE17 AC20 H_CADIP14
(4) H_CADOP14 HT_MCP_RXD14_P HT_MCP_TXD14_P H_CADIP14 (4)
H_CADON14 AD17 AD20 H_CADIN14
(4) H_CADON14 HT_MCP_RXD14_N HT_MCP_TXD14_N H_CADIN14 (4)
H_CADOP15 AB17 AE19 H_CADIP15
(4) H_CADOP15 HT_MCP_RXD15_P HT_MCP_TXD15_P H_CADIP15 (4)
H_CADON15 AC17 AF19 H_CADIN15
(4) H_CADON15 HT_MCP_RXD15_N HT_MCP_TXD15_N H_CADIN15 (4)
C C
1
H_CTLON0 AG19 AJ20 H_CTLIN0
(4) H_CTLON0 HT_MCP_RXCTL0_N HT_MCP_TXCTL0_N H_CTLIN0 (4)
AC18 AD19 R164
HT_MCP_RXCTL1_P/RESERVED RESERVED/HT_MCP_TXCTL1_P
AD18 HT_MCP_RXCTL1_N/RESERVED RESERVED/HT_MCP_TXCTL1_N AC19 22K_0402_5%
2
AC13 AD23 HTCPU_REQ#
(6) H_THERMTRIP# THERMTRIP#/GPIO_58 HT_MCP_REQ#
AB13 AB20 HTCPU_STOP#
(6) PROCHOT# PROCHOT#/GPIO_20 HT_MCP_STOP# HTCPU_STOP# (6)
AC21 HTCPU_RST#
HT_MCP_RST# HTCPU_RST# (6)
AD22 HTCPU_PWRGD
HT_MCP_PWRGD HTCPU_PWRGD (6)
C46 C43
+3VS L7 1 2 4.7U_0805_10V4Z 0.1U_0402_16V4Z +3.3V_PLL_CPU AB16
MBK1608121YZF_0603 +3.3V_PLL_CPU
CLKOUT_200MHZ_P AL28 CPUCLK (6)
1 1 CLKOUT_200MHZ_N AM28 CPUCLK# (6)
+1.2V_PLL_CPU_HT AB15 +1.2V_PLL_CPU_HT
+1.2V_HT +1.2V_HT
2 2 TP4 PAD
CLKOUT_25MHZ AK28
1 2 AM12 HT_MCP_COMP_VDD
R364 150_0402_1% AG28
CPU_SBVREF
B 1 2 AL12 AJ28 B
C141 R366 150_0402_1% HT_MCP_COMP_GND CLK200_TERM_GND
1
MBK1608121YZF_0603 C101 MCP67-MV_PBGA836 1
1 1 0.1U_0402_16V4Z R123
2.37K_0402_1% C136
0.1U_0402_16V4Z
2
2
2 2
A A
Dr-Bios.com
Security Classification Compal Secret Data
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
SCHEMATIC, M/B LA-3581P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 10 of 43
5 4 3 2 1
5 4 3 2 1
PCIE_GTX_C_MRX_P[0..15] PCIE_MTX_C_GRX_P[0..15]
(18) PCIE_GTX_C_MRX_P[0..15] (18) PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15] PCIE_MTX_C_GRX_N[0..15]
(18) PCIE_GTX_C_MRX_N[0..15] (18) PCIE_MTX_C_GRX_N[0..15]
U23B CLOSE TO CONNECT
MVP67
PCIE_GTX_C_MRX_P0
PART 2 OF 8 PCIE_MTX_GRX_P0 VGA@ C193 PCIE_MTX_C_GRX_P0
F23 PE0_RX0_P PE0_TX0_P D24 1 2 0.1U_0402_16V7K
PCIE_GTX_C_MRX_N0 G23 C24 PCIE_MTX_GRX_N0 C194 1 2 0.1U_0402_16V7K VGA@ PCIE_MTX_C_GRX_N0
PCIE_GTX_C_MRX_P1 PE0_RX0_N PE0_TX0_N PCIE_MTX_GRX_P1 VGA@ C166 PCIE_MTX_C_GRX_P1
F24 PE0_RX1_P PE0_TX1_P A24 1 2 0.1U_0402_16V7K
PCIE_GTX_C_MRX_N1 F25 B24 PCIE_MTX_GRX_N1 C167 1 2 0.1U_0402_16V7K VGA@ PCIE_MTX_C_GRX_N1
PCIE_GTX_C_MRX_P2 PE0_RX1_N PE0_TX1_N PCIE_MTX_GRX_P2 VGA@ C195 PCIE_MTX_C_GRX_P2
D25 PE0_RX2_P PE0_TX2_P B25 1 2 0.1U_0402_16V7K
PCIE_GTX_C_MRX_N2 D26 C25 PCIE_MTX_GRX_N2 C196 1 2 0.1U_0402_16V7K VGA@ PCIE_MTX_C_GRX_N2
D PCIE_GTX_C_MRX_P3 PE0_RX2_N PE0_TX2_N PCIE_MTX_GRX_P3 VGA@ C168 PCIE_MTX_C_GRX_P3 D
C28 PE0_RX3_P PE0_TX3_P B26 1 2 0.1U_0402_16V7K
PCIE_GTX_C_MRX_N3 D28 C26 PCIE_MTX_GRX_N3 C169 1 2 0.1U_0402_16V7K VGA@ PCIE_MTX_C_GRX_N3
PCIE_GTX_C_MRX_P4 PE0_RX3_N PE0_TX3_N PCIE_MTX_GRX_P4 VGA@ C197
C29 PE0_RX4_P PE0_TX4_P C27 1 2 0.1U_0402_16V7K PCIE_MTX_C_GRX_P4
PCIE_GTX_C_MRX_N4 C30 D27 PCIE_MTX_GRX_N4 C198 1 2 0.1U_0402_16V7K VGA@ PCIE_MTX_C_GRX_N4
PCIE_GTX_C_MRX_P5 PE0_RX4_N PE0_TX4_N PCIE_MTX_GRX_P5 VGA@ C170 PCIE_MTX_C_GRX_P5
D29 PE0_RX5_P PE0_TX5_P A28 1 2 0.1U_0402_16V7K
PCIE_GTX_C_MRX_N5 PCIE_MTX_GRX_N5 PCIE_MTX_C_GRX_N5
1
PCIE_GTX_C_MRX_N14 J30 H30 PCIE_MTX_GRX_N14 C231 1 2 0.1U_0402_16V7K VGA@ PCIE_MTX_C_GRX_N14
R45 PCIE_GTX_C_MRX_P15 PE0_RX14_N PE0_TX14_N PCIE_MTX_GRX_P15 VGA@ C239 PCIE_MTX_C_GRX_P15
K31 PE0_RX15_P PE0_TX15_P H32 1 2 0.1U_0402_16V7K
10K_0402_5% PCIE_GTX_C_MRX_N15 K30 H31 PCIE_MTX_GRX_N15 C240 1 2 0.1U_0402_16V7K VGA@ PCIE_MTX_C_GRX_N15
PE0_RX15_N PE0_TX15_N
@
(25,26,27) MCP_PCIE_WAKE# 2 MCP_PCIE_WAKE# H17 PE_WAKE#/GPIO_21 PE0_REFCLK_P R29 CLK_PCIE_VGA CLK_PCIE_VGA (18)
R365 2 1 10K_0402_5% @ U31 PE0_PRSNTX1#/DDC_CLK1 PE0_REFCLK_N R30 CLK_PCIE_VGA# CLK_PCIE_VGA# (18)
C R367 2 1 10K_0402_5% @ U30 C
R149 2 PE0_PRSNTX4#/DDC_DATA1
1 10K_0402_5% @ U29 PE0_PRSNTX8#/EXP_EN
(18) PE_PRSNTX16# U28 PE0_PRSNTX16#
EXPRESS@ EXPRESS@
R146 1 2 0_0402_5% PCIE_MRX_PTX_P1_R L29 M28 PCIE_MTX_PRX_P1 C249 1 2 0.1U_0402_16V7K PCIE_MTX_C_PRX_P1
(26) PCIE_MRX_PTX_P1 PE1_RX_P PE1_TX_P PCIE_MTX_C_PRX_P1 (26)
R147 1 2 0_0402_5% PCIE_MRX_PTX_N1_R L30 M29 PCIE_MTX_PRX_N1 C248 1 2 0.1U_0402_16V7K PCIE_MTX_C_PRX_N1 NEW CARD
(26) PCIE_MRX_PTX_N1 PE1_RX_N PE1_TX_N PCIE_MTX_C_PRX_N1 (26)
EXPRESS@ W27 T32 CLK_PCIE_CARD
(26) EXP_CLKREQ# PEA_CLKREQ# PE1_REFCLK_P CLK_PCIE_CARD (26)
+3VS R152 2 1 10K_0402_5% W28 T31 EXPRESS@ CLK_PCIE_CARD#
PEA_PRSNT# PE1_REFCLK_N CLK_PCIE_CARD# (26)
PEA_PRSNT# EXPRESS@
MINI2@
R139 1 2 0_0402_5% MINI2@ PCIE_MRX_PTX_P2_R M26 M24 PCIE_MTX_PRX_P2 C220 1 2 0.1U_0402_16V7K PCIE_MTX_C_PRX_P2 PCIE_MTX_C_PRX_P2 (25) MINI_CARD(WLAN)
(25) PCIE_MRX_PTX_P2 PE2_RX_P PE2_TX_P
R140 1 2 0_0402_5% MINI2@ PCIE_MRX_PTX_N2_R M27 M25 PCIE_MTX_PRX_N2 C219 1 2 0.1U_0402_16V7K PCIE_MTX_C_PRX_N2 PCIE_MTX_C_PRX_N2 (25)
(25) PCIE_MRX_PTX_N2 PE2_RX_N PE2_TX_N
(25) MINI2_CLKREQ# U26 T29 CLK_PCIE_MINI2
PEB_CLKREQ# PE2_REFCLK_P CLK_PCIE_MINI2 (25)
+3VS R118 2 1 10K_0402_5% U27 T30 MINI2@ CLK_PCIE_MINI2#
PEB_PRSNT# PE2_REFCLK_N CLK_PCIE_MINI2# (25)
PEB_PRSNT# MINI2@
MINI1@ MINI1@
R134 1 2 0_0402_5% PCIE_MRX_PTX_P3_R N23 M22 PCIE_MTX_PRX_P3 C235 1 2 0.1U_0402_16V7K PCIE_MTX_C_PRX_P3 PCIE_MTX_C_PRX_P3 (25) MINI_CARD(TV)
(25) PCIE_MRX_PTX_P3 PE3_RX_P PE3_TX_P
R135 1 2 0_0402_5% PCIE_MRX_PTX_N3_R N22 M23 PCIE_MTX_PRX_N3 C234 1 2 0.1U_0402_16V7K PCIE_MTX_C_PRX_N3 PCIE_MTX_C_PRX_N3 (25)
(25) PCIE_MRX_PTX_N3 PE3_RX_N PE3_TX_N
(25) MINI1_CLKREQ# MINI1@ U25 T27 CLK_PCIE_MINI1
PEC_CLKREQ# PE3_REFCLK_P CLK_PCIE_MINI1 (25)
+3VS R148 2 1 10K_0402_5% U24 T28 MINI1@ CLK_PCIE_MINI1#
PEC_PRSNT# PE3_REFCLK_N CLK_PCIE_MINI1# (25)
PEC_PRSNT# MINI1@
5
V30 R23 U5
PEF_PRSNT# PE6_REFCLK_N (15,31) HT_VLD HT_VLD 2
P
B PCIE_RST#
Y 4 PCIE_RST# (18,26)
2 2 +1.2V_PLL_PE_SS1 PE_RST0#
U19 +1.2V_PLL_PE_SS1 1 A
G
U20 +1.2V_PLL_PE_SS2 NC7SZ08P5X_NL_SC70-5 FOR VGA,LAN,NEW CARD
3
@
C18 C104
+3VS L6 1 2 4.7U_0805_10V4Z 0.1U_0402_16V4Z +3.3V_PLL_PE_SS1 P19 W29 R165 1 2 0_0402_5% PCIE_RST1#
+3.3V_PLL_PE_SS1 PEX_RST1# PCIE_RST1# (25)
MBK1608121YZF_0603
MP 2007/5/10 Modify 1 1 1 1
P20 +3.3V_PLL_PE_SS2
FOR MINI CARD
2 1 @ PEA_PRSNT#
R550 0_0402_5% V24
2 2 2 2 PE_CLK_COMP
2 1 PEB_PRSNT# @ R169 0_0402_5%
1
Dr-Bios.com
PEA_PRSNT# EXP_CLKREQ#
R553
1 2
0_0402_5% @
Security Classification Compal Secret Data
PEB_PRSNT# 1 2 MINI2_CLKREQ# Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
R554 0_0402_5% @ (14,26) CP_PE# 1 2 PEA_PRSNT# SCHEMATIC, M/B LA-3581P
PEC_PRSNT# 1 2 MINI1_CLKREQ# R563 0_0402_5% EXPRESS@ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
R555 0_0402_5% @ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 11 of 43
5 4 3 2 1
5 4 3 2 1
+3V +3VMAC
1
RXD0 B20
+3VMAC +3VMAC (22) RXD0 RGMII_RXD0/MII_RXD0
+3VAUX RXD1 R79 0_0603_5% @ R472
(22) RXD1
RXD2
C20
E19
RGMII_RXD1/MII_RXD1 LAN N18 +1.2VALW_MAC 1 2 10K_0402_5%
(22) RXD2 RGMII_RXD2/MII_RXD2 +1.2V_DUAL_RMGT
RXD3 F19 1 C44 @
(22) RXD3 RGMII_RXD3/MII_RXD3
1 2 RXCLK G19 J19 TXD0_R R473 1 2 22_0402_5% TXD0 (22) 0.1U_0402_16V4Z
(22) RXCLK
2
R557 0_0805_5% RXCTL RGMII_RXC/MII_RXCLK RGMII_TXD0/MII_TXD0 TXD1_R R471 22_0402_5% RGMII_PWRDWN#
(22) RXCTL J20 RGMII_RXCTL/MII_RXDV RGMII_TXD1/MII_TXD1 K19 1 2 TXD1 (22)
1
D +3VMAC L19 TXD2_R R474 1 2 22_0402_5% D
RGMII_TXD2/MII_TXD2 TXD2 (22)
1
TXD3_R R475 22_0402_5% 2
C19 MII_RXER/GPIO_36 RGMII_TXD3/MII_TXD3 L18 1 2 TXD3 (22)
40 mil R479 2 1 10K_0402_5% @ J18 H19 TXCLK_R R476 1 2 33_0402_5% TXCLK R478
L9 R321 10K_0402_5% @ MII_COL/MI2C_DATA RGMII_TXCLK/MII_TXCLK TXCTL_R R477 22_0402_5% +3VMAC 10K_0402_5%
D19 MII_CRS/MI2C_CLK RGMII_TXCTL/MII_TXEN K18 1 2 TXCTL (22)
MBK1608121YZF_0603 2 1 RGMII_INTR_R
MP Modify 2007/04/13 K20 RGMII_MDC (22)
2
RGMII_INTR RGMII/MII_MDC
(22) RGMII_INTR 1 2 RGMII_INTR_R B18 RGMII/MII_INTR/GPIO35 RGMII/MII_MDIO L20 RGMII_MDIO (22)
1
R349 R514 0_0402_5%
C51 49.9_0402_1% N13 +3.3V_PLL_MAC_DUAL RGMII/MII_PWRDWN#/GPIO_37 D17 RGMII_PWRDWN# R69
4.7U_0805_10V4Z 1.47K_0402_1%
B17 G17 R94 1 2 10K_0402_5%
MII_COMP_3P3V BUF_25MHZ
1 1 C17
2
MII_COMP_GND
MII_RESET# C18 MII_RST (22) C40
H20 0.1U_0402_16V4Z
MII_VREF
2 2 C53
MP Modify 2007/04/28
1
0.1U_0402_16V4Z 1
1
R61
MP Modify 2007/07/03 1 1
K21 B21 UMA_CRT_R 1.47K_0402_1% TXCLK_R
RGB_DAC_RSET RGB_DAC_RED UMA_CRT_R (19)
R68 UMA_CRT_G
D21 RGB_DAC_VREF DACS RGB_DAC_GREEN C21 UMA_CRT_G (19)
1
49.9_0402_1% UMA_CRT_B 2
B22 UMA_CRT_B (19)
2
LINK10 1 2 2 C103 RGB_DAC_BLUE
(22) LINK10 2LINK10_R R67 C55 R66 E23 C658
2
2
R567 0_0402_5% 124_0402_1% 0.01U_0402_16V7K 124_0402_1% 0.01U_0402_16V7K H22 TV_DAC_RSET 33P_0402_50V8K
G21 UMA_CRT_HSYNC (19)
2
TV_DAC_VREF RGB_DAC_HSYNC @
RGB_DAC_VSYNC H21 UMA_CRT_VSYNC (19) +3VS
+3.3V_PLL N15 +3.3V_PLL_DISP DDC_CLK0 G8 UMA_CRT_CLK (19)
NB_XTALIN E17 H8
NB_XTALOUT TV_XTALIN DDC_DATA0 C42 UMA_CRT_DATA (19) L8 TXCLK
F17 TV_XTALOUT
+3V +3V +3V Y3 E21 0.1U_0402_16V4Z 1 2
+3.3V_RGB_DAC
1
1 2 1 1 C36 MBK2012121YZF_0805
C C
1 1 4.7U_0805_10V4Z C681
1
2
R525 UMA&TV@ 0.1U_0402_16V4Z 4.7U_0805_10V4Z @
1
@ U40
+3.3V_TV_DAC F21
TXCLK 1 8 U11 UMA@
2
AE31 UMA_TXCLK-
IFPA_TXC_N UMA_TXCLK- (20)
R527 S IC PCS3P23Z01DG-08-TR TSSOP 8P
10K_0402_5% TXCLK_PHY_R 1 2 TXCLK_PHY TXCLK_PHY (22) AL29
R528 22_0402_5% HDMI_TXC_P UMA_TXOUT0+
AM29 HDMI_TXC_N IFPA_TXD0_P AC30 UMA_TXOUT0+ (20)
UMA_TXOUT0- UMA&TV@
PVT Modify 2007/03/12 AC29 UMA_TXOUT0- (20)
2
1 1 1 DDC_CLK3 L22
2 2 2 +3.3V_HDMI DDC_DATA3 DDC_DATA3
AH29 +3.3V_HDMI DDC_DATA3 K22 1 2
R57 10K_0402_5%
C148
0.1U_0402_16V4Z 2 2 2 C212
AK31 HDMI_RSET
C211 0.01U_0402_16V7K AK32 AB31 IFPAB_RSET
4.7U_0805_10V4Z HDMI_VPROBE IFPAB_RSET IFPAB_PROBE
IFPAB_VPROBE AB30
1
1
1 1
C178 MCP67-MV_PBGA836
4.7U_0805_10V4Z R144 C160 R372
1K_0402_1% 0.1U_0402_16V4Z 1K_0402_1%
@ 2 @ 2 C528 @
1
2
2
+3V +3V 0.01U_0402_16V7K
MP Modify 2007/04/13 +1.2VALW
1
@
2
1
2 C163
R558 0.1U_0402_16V4Z
1
A R559 10K_0402_5% A
20K_0402_1% PVT Modify 2007/03/12
PVT Modify 2007/03/12
2
S
G
Q62
Dr-Bios.com
2
2
AO3413_SOT23-3
1
D
Security Classification Compal Secret Data
D
1
1 2 2 Q63
(15,22) SLP_RMGT#
G 2N7002_SOT23 +1.2VALW_MAC 1 C691 Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
R560 S 0.1U_0402_16V4Z SCHEMATIC, M/B LA-3581P
3
0_0402_5% 6 mil THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
2 Custom 401474 C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 12 of 43
5 4 3 2 1
5 4 3 2 1
+3V
SBPWR_EN# (34)
RP3
1 8 PCI_REQ#0 U23D
+3VS
1
2 7 PCI_REQ#1 MCP67 U32
3 6 PCI_REQ#2 PART 4 OF 8
OE#
4 5 PCI_REQ#3 (23) PCI_REQ#0 PCI_REQ#0 E10 F10 PCI_GNT#0 PCI_GNT#0 (23) PCI_PME# 2 4 EC_PME#
PCI_REQ0# PCI_GNT0# A Y EC_PME# (27,28)
PCI_REQ#1 G10 H10
PCI_REQ1# PCI_GNT1#
G
8.2K_1206_8P4R_5% PCI_REQ#2 J10 K10 Internal PU
PCI_REQ#3 PCI_REQ2#/GPIO_40/RS232_DSR# PCI_GNT2#/GPIO_41/RS232_DTR# SN74AHCT1G125DCKR_SC70-5
M11 L10
3
PCI_REQ#4 PCI_REQ3#/GPIO_38/RS232_CTS# PCI_GNT3#/GPIO_39/RS232_RTS#
E8 PCI_REQ4#/GPIO_52/RS232_SIN# PCI_GNT4#/GPIO_53/RS232_SOUT# F8 @
D D
RP6 PCI_CBE#[3..0]
PCI_CBE#[3..0] (23)
1 8 PCI_PIRQE# PCI_AD[31..0] K12 PCI_CBE#0
+3VS (23) PCI_AD[31..0] PCI_CBE0#
2 7 PCI_PIRQF# PCI_AD0 D10 K13 PCI_CBE#1
PCI_PIRQG# PCI_AD1 PCI_AD0 PCI_CBE1# PCI_CBE#2 +3VS
3 6 B10 F14
4 5 PCI_PIRQH# PCI_AD2
PCI_AD3
C10
L12
PCI_AD1
PCI_AD2 PCI PCI_CBE2#
PCI_CBE3# K16 PCI_CBE#3
1
IDE_D15 AG10 43
IDE_D[15..0] IDE_DATA_P15 R29 GND
(21) IDE_D[15..0]
(21) IDE_DREQ IDE_DREQ AK11 AJ10 IDE_IOW# IDE_IOW# (21) 121_0402_1% S W-CONN AMP 2-767004-2 38P
IDE_IRQ IDE_DREQ_P IDE_IOW_P# @
(21) IDE_IRQ AH10 IDE_INTR_P
(21) IDE_IORDY IDE_IORDY AK10
2
IDE_IOR# IDE_RDY_P
(21) IDE_IOR# 1 2 AL10 IDE_IOR_P# IDE_COMP_3P3V AM4
R362 2 1 33_0402_5%AF12 AK4
R43 15K_0402_5% CABLE_DET_P/GPIO_63 IDE_COMP_GND
1
MCP67-MV_PBGA836 R51
121_0402_1%
2
A A
Dr-Bios.com
5 4 3 2 1
SATA2@
SATA USB USB4_P
USB4_N
W4
W3
USB20_P4
USB20_N4
USB20_P4 (20)
USB20_N4 (20)
USB CAMERA
SATA_STX_C_DRX_P1 0.01U_0402_16V7K 1 2 C514 SATA_STX_DRX_P1 AG4 1 2 1 2
(21) SATA_STX_C_DRX_P1 SATA_B0_TX_P
SATA_STX_C_DRX_N1 0.01U_0402_16V7K 1 2 C513 SATA_STX_DRX_N1 AG3 R347 15K_0402_5% R344 15K_0402_5%
(21) SATA_STX_C_DRX_N1 SATA_B0_TX_N
W5 USB20_P5 CMOS@ CMOS@ USB20_P5 (30) BLUETOOTH
SATA_DTX_C_SRX_N1 SATA2@ USB5_P USB20_N5
(21) SATA_DTX_C_SRX_N1 AH3 SATA_B0_RX_N USB5_N W6 USB20_N5 (30)
SATA_DTX_C_SRX_P1 AH2 1 2 1 2
(21) SATA_DTX_C_SRX_P1 SATA_B0_RX_P R353 15K_0402_5% R357 15K_0402_5%
W7 USB20_P6 BT@ BT@ USB20_P6 (25) MINI1
USB6_P USB20_N6
USB6_N W8 USB20_N6 (25)
+3VS 1 2 1 2
AG7 R360 15K_0402_5% R358 15K_0402_5%
JUMPER SATA_B1_TX_P USB20_P7 MINI1@ MINI1@
AG8 SATA_B1_TX_N USB7_P Y2 USB20_P7 (25) MINI2
R320 10K_0402_5% @ Y3 USB20_N7 USB20_N7 (25)
USB7_N
1 2 AF2 1 2 1 2
HDA_SDOUT
SATA_B1_RX_N
LPC_FRAME
R319 10K_0402_5% AF3 R352 15K_0402_5% R355 15K_0402_5%
HDA_SDOUT_ICH SATA_B1_RX_P USB20_P8 MINI2@ MINI2@
1 2 USB8_P AA3 USB20_P8 (26) NEW CARD
R44 10K_0402_5% @ FUNCTION AA2 USB20_N8 USB20_N8 (26)
USB8_N
1 2 1 2 1 2
C R41 10K_0402_5% R350 15K_0402_5% R356 15K_0402_5% C
1 2 LPC_FRAME# LPC_FRAME# (13,27,28) AL1 AA5 USB20_P9 EXPRESS@ EXPRESS@ USB20_P9 NON-USE
RESERVED/SATA_C0_TX_P USB9_P USB20_N9
AL2 RESERVED/SATA_C0_TX_N USB9_N AA4 USB20_N9
1 2 1 2
AK3 R351 15K_0402_5% R354 15K_0402_5%
RESERVED/SATA_C0_RX_N
"0" "0" LPC BIOS* AL3 RESERVED/SATA_C0_RX_P RESERVED/USB10_P AA7
RESERVED/USB10_N AA6
USB_RBIAS_GND R338
1 2 AJ4 1.1K_0402_1% +3V
SATA_LED# R108 2.49K_0402_1% SATA_TERMP HDA_SYNC_ICH
1 2
T2 R313 10K_0402_5%
USB_OC0#/GPIO_25 USB_OC#0 (26)
USB_OC1#/GPIO_26 T3 USB_OC#1 (25)
(27,28) SATA_LED# SATA_LED# D4 T4 1 1
SATA_LED#/GPIO_57 USB_OC2#/GPIO_27 CP_PE# (11,26)
T5 C57 C63
USB_OC3#/GPIO_28/MGPIO_1 USB_OC#3
T6 0.1U_0402_16V4Z 0.1U_0402_16V4Z
USB_OC4#/GPIO_29/MGPIO_3 USB_OC#4
+3VS +3VS 2 2
+3.3V_USB_DUAL1 Y8
+3.3V_USB_DUAL2 Y9
B W13 B
U36 +1.2V_PLL_SP_VDD +1.2V_PLL_SP_VDD
+1.2VS V13 +1.2V_PLL_SP_SS
HDA_BITCLK_ICH_R 1 7
CLKIN VDD
1
1 D2 HDA_BITCLK_ICH_R HDA_BITCLK_ICH 1 2
HDA_BITCLK HDA_BITCLK_MDC (30)
R459 2 6 HDA_BITCLK_ICH R13 33_0402_5% R314
10K_0402_5%
@ 8
NC
NC
CLKOUT
SSON 5
1
C640
+3.3V_PLL
P13
+3.3V_PLL_SP_SS
+3.3V_PLL_LEG
HDA
0.1U_0402_16V4Z 2 C140
2
ASM3P623S00CF-08TR_TSSOP8 HDA_RST_ICH#
R460 @ B2 HDA_SDIN0 HDA_SDIN0 (32) HDA_SDOUT_ICH
HDA_SDATA_IN0/GPIO_22 HDA_SDIN1 C23 C17
10K_0402_5% HDA_SDATA_IN1/GPIO_23/MGPIO_0 A2 HDA_SDIN1 (30)
@ D1 HDA_SDIN2 10P_0402_50V8J 10P_0402_50V8J
HDA_SDATA_IN2/GPIO_24/MGPIO_2
1 @ 1 @ 1 C22 1
2
C2 HDA_RST_ICH# 1 2
HDA_RESET# HDA_RST_MDC# (30)
22_0402_5% R315
2 2 2 2 C20
HDA_BITCLK_ICH_R 1 2 HDA_BITCLK_ICH C1 HDA_SYNC_ICH 1 2 HDA_SYNC_MDC (30) 10P_0402_50V8J 10P_0402_50V8J
R461 0_0402_5% HDA_SYNC/GPIO_44 22_0402_5% R312
HDA_DOCK_EN#/GPIO_51 D3
HDA_DOCK_RST#/GPIO_46 C3
HDA_BITCLK_ICH 1 2 HDA_BITCLK_AUDIO (32)
33_0402_5% R25
HDA_SYNC_ICH 1 2 HDA_SYNC_AUDIO (32)
+1.2VS +1.2V_PLL_SP_VDD +3VS +3.3V_PLL MCP67-MV_PBGA836 22_0402_5% R23
HDA_RST_ICH# 1 2 HDA_RST_AUDIO# (32)
22_0402_5% R26
A C145 C149 HDA_SDOUT_ICH 1 2 A
HDA_SDOUT_AUDIO (32)
L10 1 2 L14 1 2 4.7U_0805_10V4Z 0.1U_0402_16V4Z 22_0402_5% R27
MBK1608121YZF_0603 MBK1608121YZF_0603
1 1 1 1 1 1
C54
Dr-Bios.com
10U_0805_10V4Z
2 2 C50 2 2 2 2 Security Classification Compal Secret Data
0.1U_0402_16V4Z Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
C143 C153 SCHEMATIC, M/B LA-3581P
0.1U_0402_16V4Z 0.1U_0402_16V4Z THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 14 of 43
5 4 3 2 1
5 4 3 2 1
+3V
1
EC_LID_OUT# 1 2 RI# M4 H7
(27,28) EC_LID_OUT# GPIO_12/SUS_STAT# MCP_VID2/GPIO_15
R464 0_0402_5% @ R283
470K_0402_5%
+RTCVCC @
K4 MCP_SPKR
MSIC MCP_SPKR (32)
2
SPKR Q10
R340 MP Modify 2007/04/12 2N7002_SOT23
1M_0402_5%
1
S
(27,28) EC_GA20 K7 A20GATE/GPIO_55 SMB_CLK0 E3 SMBCLK1 (25,26) 1 3 MEM_SMBCLK (8,9)
EC_KBRST# K6 G3 SMBDATA1 SMBDATA1 (25,26)
(27,28) EC_KBRST# KBRDRSTIN#/GPIO_56 SMB_DATA0
R91 1 2 0_0402_5% SIO_PME# M6 E2 M_SMBCLK
(27,28) EC_SCI# SIO_PME#/GPIO_31 SMB_CLK1/MSMB_CLK
R96 1 2 0_0402_5% EXT_SMI# P4 F2 M_SMBDATA
G
(27,28) EC_SMI#
2
RI# EXT_SMI#/GPIO_32 SMB_DATA1/MSMB_DATA SMB_ALERT#
P8 F3 +3VS
2
2
G
1
S
(19) CRT_DET LID#
C29 LLB# N10
1U_0603_10V4Z LLB# 2N7002_SOT23
1 2 AC14 CPU_SIC (6) Q9
2
THERM_SIC/GPIO_48
C PVT Modify 2007/03/12 THERM_SID0/GPIO_49 AB14
AD12
CPU_SID (6) C
PBTN_OUT# THERM_SID1/GPIO_47/PWR_LED#
(27,28) PBTN_OUT# R10 PWRBTN#
Close To RAM Door +3V 2 1 RSTBTN# P9 RSTBTN#
R90 10K_0402_5% 1 2 SMBCLK1
+3V
2 1 M5 F6 1 2 R65 2.7K_0402_5%
J1 @ JOPEN RTC_RST# FANRPM0/GPIO_60 R438 15K_0402_5% SMBDATA1
FANCTL0/GPIO_61 F5 1 2
EC_RSMRST# L4 F4 R70 2.7K_0402_5%
(27,28) EC_RSMRST# PWRGD_SB FANCTL1/GPIO_62
T10 PWRGD 1 2 SMB_ALERT#
C60 (6,18,27,28) MCP_PWRGD MEM_VLD M8 R34 2.7K_0402_5%
1U_0603_10V4Z (31,40) MEM_VLD HT_VLD MEM_VLD
P7 MCP_VLD/HT_VLD
1 2 (11,31) HT_VLD M3 N3 1 2 M_SMBCLK
(41) VGATE CPU_VLD MCPVDD_EN/HTVDD_EN VLDT_EN (34) +3VS
M2 R73 2.7K_0402_5%
CPUVDD_EN VR_ON (41)
D29 1 2 M_SMBDATA
U9 RB751V_SOD323 R60 2.7K_0402_5%
JTAG_TDI ACIN_L
T8 JTAG_TDO 2 1 ACIN (18,27,28,37)
T7 JTAG_TMS SPI_CS0/GPIO_10 K2
2 1 U8 JTAG_TRST# SPI_CLK/GPIO_11 K3 1 2
10K_0402_5%2 1 R81 T9 M7 R74 10K_0402_5% @
10K_0402_5% R95 JTAG_TCK SPI_DI/GPIO_8 ACIN_L
SPI_DO/GPIO_9 J2 1 2 +3V 1 2
R56 10K_0402_5% @ R543 470K_0402_5%
SUS_CLK/GPIO_34 P2 1 2
XTALIN R339 10K_0402_5% @
XTALOUT
H4
H3
XTALIN MP Modify 2007/04/12
X1 XTALOUT
1 2
1 1 BUF_SIO_CLK J3
25MHZ_20P
C34 C35 C503 1 C16
B 18P_0402_50V8J 10P_0402_50V8J B
27P_0402_50V8J 27P_0402_50V8J
2 2 XTALIN_RTC @
2 1 H2 XTALIN_RTC
@ H1 P11 R540 2.2K_0402_5%
XTALOUT_RTC TEST_MODE_EN 2
+3VS 1 2 MEM_SMBCLK
2
10M_0402_5%
X2 R541 2.2K_0402_5%
2 NC IN 1 PKG_TEST P10 1 2 MEM_SMBDATA
9/25 Added for EMI
R334
3 NC OUT 4
MCP67-MV_PBGA836
1
1
32.768KHZ_12.5P_MC-306
2 1 XTAOUT_RTC R71 R100 PVT Modify 2007/03/23
0_0402_5% 1K_0402_1%
18P_0402_50V8J
C504
2
A A
Dr-Bios.com
Security Classification Compal Secret Data
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
SCHEMATIC, M/B LA-3581P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 15 of 43
5 4 3 2 1
5 4 3 2 1
1 1 1 1 1 1 1 1 1 1
U23G 2 2 2 2 2 2 2 2 2 2
D D
MCP67
PART 7 OF 8 C525 C74 C108 C109 C120
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
V15 AA22 C526 C147 C125 C132 C131 C134
+1.2V_RBB1 +1.2V1 150U_D2_6.3VM 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
V16 +1.2V_RBB2 +1.2V10 V19
W16 W20 1
+3V +3VS W15
+1.2V_RBB3
+1.2V_RBB4 POWER +1.2V11
+1.2V12
+1.2V13
Y20
Y19 +
1 1 1 1 1 1 1 1 1 1 1
+1.2V14 V17
C107 C48 C39 AB21
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K +1.2V15 2 2 2 2 2 2 2 2 2 2 2 2
AJ9 +3.3V1 +1.2V16 AA23
AG9 +3.3V2 +1.2V17 Y30
1 1 1 1 1 1 F11 U17 C151 C159 C130 C135 C139 C144
+3.3V3 +1.2V18 22U_0805_6.3V6M 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
H11 +3.3V4 +1.2V19 U18
1
+1.2V2 Y31
R77 W17
2 2 2 2 2 2 +1.2V20
0_0603_5% +1.2V21 Y18
C102 C110 C47 L6 U16 +1.2V_HT
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z +3.3V_DUAL1 +1.2V22
L8 AA24
2
+3.3V_DUAL2 +1.2V23
+1.2V24 V18
1
C45 AA25
0.1U_0402_16V4Z +3.3V_DUAL1 +1.2V25 R102 +1.2VS +1.2VS
+1.2V26 AA26
+RTCVCC N2 AB22 C106 0_0603_5%
+3.3V_VBAT +1.2V27 0.1U_0402_16V4Z
1 1 +1.2V28 W18
1 AB23 1 C529
2
C506 +1.2V29 +1.2V_HT1 150U_D2_6.3VM
+1.2V3 AA27
0.1U_0402_16V4Z AA28 +@
2 2 +1.2V4
+1.2V5 AA29
C41 2
AD9 GND +1.2V6 W19 1 1 C67 C121 C124
2
0.1U_0402_16V4Z AH6 AA30 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
C GND +1.2V7 C
AE32 GND +1.2V8 AA31
Y32 V20 +1.2VS
RTC Battery GND +1.2V9 1 1 1
1
2 2
AD8 GND
M32 L17
GND
AE18 Y15 KC FBM-L11-201209-221LMAT_0805
- BATT1
+ +RTCBATT AB25
AB27
GND
GND
GND
+1.2V_HT1
+1.2V_HT2
+1.2V_HT3
Y17
Y16
2 2
C112
2
U15 0.1U_0402_16V4Z
2
GND
1
2 1 +RTCBATT AE11 V23 +1.2V_PED
GND +1.2V_PED1 C117 C128 C156 R110
Update Footprint V27 GND +1.2V_PED2 W25
R27 W24 +1.2V_PEA 0.1U_0402_16V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z C189 0_0805_5%
GND +1.2V_PED3 10U_0805_10V4Z
N27 GND +1.2V_PED4 V22
ML1220T13RE G27 W26 1 1 1 1 1 1 1 1
2
GND +1.2V_PED5
1
GND +1.2V_SP_D4 2 2 2 2 2 2 2 2
AM32 GND
AG11 AB11 C62 C116 C72 C118
+CHGRTC GND +1.2V_SP_A1
L15 AB10 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z
B GND +1.2V_SP_A2 B
1 1 AD27 GND +1.2V_SP_A3 AD10
P22 GND +1.2V_SP_A4 AC10
C519 C520 AD11 AE10 +1.2V_SP_A L12 1 2 MBK2012121YZF_0805
4.7U_0805_10V4Z 0.1U_0402_16V4Z GND +1.2V_SP_A5 C75 C518
V11 GND
2 2
L23 GND +1.2V_DUAL1 N16 1 1 1 1
P15 N17 0.1U_0402_16V4Z 4.7U_0805_10V4Z
GND +1.2V_DUAL2
2 2 2 2
MCP67-MV POWER STATES MCP67-MV_PBGA836 C64 C516
Power Signal S0 S1 S3 S4/S5 G3 0.1U_0402_16V4Z 4.7U_0805_10V4Z
Dr-Bios.com
ON ON OFF OFF OFF Security Classification Compal Secret Data
ON ON OFF OFF OFF Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
SCHEMATIC, M/B LA-3581P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 16 of 43
5 4 3 2 1
5 4 3 2 1
U23H
MCP67
PAR 8 OF 8
AB9 WUSB_VREF WUSB_PCLK AC7
AC6 WUSB_CCA_STATUS WUSB_DATA_EN AB8
D AC8 V9 D
WUSB_SERIAL_DATA WUSB_DATA7
AA8 WUSB_PHY_RESET* WUSB_DATA6 W11
AD3 WUSB_TX_EN WUSB_DATA5 W10
AD4 WUSB_RX_EN WUSB_DATA4 W9
AA9 WUSB_PHY_ACTIVE WUSB_DATA3 Y11
AC5 WUSB_STOPC WUSB_DATA2 Y10
AC9 WUSB_VDD WUSB_DATA1 AA11
WUSB_DATA0 AA10
L11 GND
V8 GND GND R18
H13 H9
N6
AA1
GND
GND
GND
GROUND GND
GND
GND
R17
A1
AD13 GND GND D9
K23 GND GND AG26
AM16 GND GND G4
AH1 GND GND AB6
U13 GND GND J25
R6 GND GND R25
R8 GND GND T16
M1 GND GND T15
N1 GND GND J29
U1 GND GND W14
J1 GND GND AD6
J4 GND GND AB24
J6 GND GND AM13
Y13 GND GND R16
AE1 GND GND V6
Y6 GND GND A13
A5 GND GND N32
C A12 AM25 C
GND GND
N8 GND GND F9
E6 GND GND N9
AC11 GND GND AL31
H15 GND GND G25
T17 GND GND AB18
J21 GND GND AH32
D18 GND GND D13
A20 GND GND N25
N4 GND GND A25
G6 GND GND R9
AG22 GND GND R14
P16 GND GND AF27
T19 GND GND AH8
AE24 GND GND A32
AJ26 GND GND P14
AJ24 GND GND E29
U32 GND GND E32
T20 GND GND V10
AM24 GND GND J23
AF29 GND GND N14
AJ13 GND GND AB29
AA32 GND GND E4
AG13 GND GND AE13
AE15 GND GND L27
F13 GND GND J27
AF6 GND GND A9
AB4 GND GND J32
AG15 GND GND AE20
E25 GND GND AJ22
B AM17 AG18 B
GND GND
R15 GND GND AG20
A17 GND GND V14
AG24 GND GND F18
N20 GND GND F20
N24 GND GND D20
AM1 GND GND E1
AM21 GND GND V4
A21 GND GND J8
V25 GND GND F7
AJ3 GND GND T18
L25 GND GND J24
P17 GND GND A31
H18 GND GND Y1
L24 GND GND T13
AM5 GND GND D22
U14 GND GND Y4
AC16 GND GND P18
U10 GND GND AJ18
N29 GND GND AE22
AM2 GND GND R24
AM3 GND GND N19
GND T14
MCP67-MV_PBGA836
A A
Dr-Bios.com
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3581P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401474
Date: Tuesday, November 27, 2007 Sheet 17 of 43
5 4 3 2 1
5 4 3 2 1
1 2 MCP_PWRGD (6,15,27,28)
R125
0_0402_5%
PCIE_MTX_C_GRX_N[0..15] 2 VGA@
(11) PCIE_MTX_C_GRX_N[0..15]
C182
PCIE_MTX_C_GRX_P[0..15] 0.1U_0402_16V4Z
(11) PCIE_MTX_C_GRX_P[0..15]
VGA@
PCIE_GTX_C_MRX_N[0..15] 1
(11) PCIE_GTX_C_MRX_N[0..15]
D PCIE_GTX_C_MRX_P[0..15] D
(11) PCIE_GTX_C_MRX_P[0..15]
1 2 VGA_ON (27)
L18 R122
KC FBM-L11-201209-221LMAT_0805 JP19A 0_0402_5% @ JP19B
VGA@
B+ 1 2 1 PWR_SRC 2 +1.8VS PCIE_GTX_C_MRX_N1 109 110
VGA@ 1V8RUN PCIE_GTX_C_MRX_P1 PEX_RX1# GND PCIE_MTX_C_GRX_N1
3 PWR_SRC 1V8RUN 4 111 PEX_RX1 PEX_TX1# 112
1 2 5 PWR_SRC 6 113 114 PCIE_MTX_C_GRX_P1
1V8RUN PCIE_GTX_C_MRX_N0 GND PEX_TX1
7 PWR_SRC 1V8RUN 8 115 PEX_RX0# GND 116
9/25 Added for EMI 9 PWR_SRC 10 PCIE_GTX_C_MRX_P0 117 118 PCIE_MTX_C_GRX_N0
1V8RUN PEX_RX0 PEX_TX0# PCIE_MTX_C_GRX_P0
11 PWR_SRC 1V8RUN 12 119 GND PEX_TX0 120
13 PWR_SRC 14 CLK_PCIE_VGA# 121 122 PE_PRSNTX16#
1V8RUN (11) CLK_PCIE_VGA# PEX_REFCLK# PRSNT1# PE_PRSNTX16# (11)
L21 15 16 CLK_PCIE_VGA 123 124 VGA_TV_CRMA
(11) CLK_PCIE_VGA VGA_TV_CRMA (19)
KC FBM-L11-201209-221LMAT_0805 17 PWR_SRC RUNPWROK
18 +5VS 125
PEX_REFCLK TV_C/HDTV_Pr
126
GND 5VRUN CLK_REQ# GND VGA_TV_LUMA
19 GND GND 20 (11,26) PCIE_RST# 127 PEX_RST# TV_Y/HDTV_Y 128 VGA_TV_LUMA (19)
21 GND GND 22 129 RSVD GND 130
23 GND 24 131 132 VGA_TV_COMPS
GND RSVD TV_CVBS/HDTV_Pb VGA_TV_COMPS (19)
D_EC_SMB_DA1 133 134
D_EC_SMB_CK1 SMB_DAT GND VGA_CRT_R
135 SMB_CLK VGA_RED 136 VGA_CRT_R (19)
(27,28) MXM_THERM# 1 2 MXM_THERM_R 137 138
VGA_CRT_HSYNC THERM# GND VGA_CRT_G
(19) VGA_CRT_HSYNC 139 VGA_HSYNC VGA_GRN 140 VGA_CRT_G (19)
R515 (19) VGA_CRT_VSYNC VGA_CRT_VSYNC 141 142
@ 0_0402_5% VGA_DDC_CLK VGA_VSYNC GND VGA_CRT_B
(19) VGA_DDC_CLK 143 DDCA_CLK VGA_BLU 144 VGA_CRT_B (19)
PCIE_GTX_C_MRX_N15 25 26 (19) VGA_DDC_DATA VGA_DDC_DATA 145 146
PCIE_GTX_C_MRX_P15 PEX_RX15# PRSNT2# PCIE_MTX_C_GRX_N15 DDCA_DAT GND VGA_TZCLK-
27 PEX_RX15 PEX_TX15# 28 147 IGP_UCLK# LVDS_UCLK# 148 VGA_TZCLK- (20)
29 30 PCIE_MTX_C_GRX_P15 149 150 VGA_TZCLK+ VGA_TZCLK+ (20)
C PCIE_GTX_C_MRX_N14 GND PEX_TX15 IGP_UCLK LVDS_UCLK C
31 PEX_RX14# GND 32 151 GND GND 152
PCIE_GTX_C_MRX_P14 33 34 PCIE_MTX_C_GRX_N14 153 154
PEX_RX14 PEX_TX14# PCIE_MTX_C_GRX_P14 RSVD LVDS_UTX3#
35 GND PEX_TX14 36 155 RSVD LVDS_UTX3 156
PCIE_GTX_C_MRX_N13 37 38 1 2 157 158
PCIE_GTX_C_MRX_P13 PEX_RX13# GND PCIE_MTX_C_GRX_N13 (15,27,28,37) ACIN R516 RSVD GND VGA_TZOUT2-
39 PEX_RX13 PEX_TX13# 40 159 IGP_UTX2# LVDS_UTX2# 160 VGA_TZOUT2- (20)
41 42 PCIE_MTX_C_GRX_P13 0_0402_5% 161 162 VGA_TZOUT2+ VGA_TZOUT2+ (20)
PCIE_GTX_C_MRX_N12 GND PEX_TX13 @ IGP_UTX2 LVDS_UTX2
43 PEX_RX12# GND 44 163 GND GND 164
PCIE_GTX_C_MRX_P12 45 46 PCIE_MTX_C_GRX_N12 165 166 VGA_TZOUT1- VGA_TZOUT1- (20)
PEX_RX12 PEX_TX12# PCIE_MTX_C_GRX_P12 IGP_UTX1# LVDS_UTX1# VGA_TZOUT1+
47 GND PEX_TX12 48 167 IGP_UTX1 LVDS_UTX1 168 VGA_TZOUT1+ (20)
PCIE_GTX_C_MRX_N11 49 50 169 170
PCIE_GTX_C_MRX_P11 PEX_RX11# GND PCIE_MTX_C_GRX_N11 GND GND VGA_TZOUT0-
51 PEX_RX11 PEX_TX11# 52 171 IGP_UTX0# LVDS_UTX0# 172 VGA_TZOUT0- (20)
53 54 PCIE_MTX_C_GRX_P11 173 174 VGA_TZOUT0+ VGA_TZOUT0+ (20)
PCIE_GTX_C_MRX_N10 GND PEX_TX11 IGP_UTX0 LVDS_UTX0
55 PEX_RX10# GND 56 175 GND GND 176
PCIE_GTX_C_MRX_P10 57 58 PCIE_MTX_C_GRX_N10 177 178 VGA_TXCLK- VGA_TXCLK- (20)
PEX_RX10 PEX_TX10# PCIE_MTX_C_GRX_P10 IGP_LCLK#/DVI_B_CLK# LVDS_LCLK# VGA_TXCLK+
59 GND PEX_TX10 60 179 IGP_LCLK/DVI_B_CLK LVDS_LCLK 180 VGA_TXCLK+ (20)
PCIE_GTX_C_MRX_N9 61 62 181 182
PCIE_GTX_C_MRX_P9 PEX_RX9# GND PCIE_MTX_C_GRX_N9 DVI_B_HPD/GND GND
63 PEX_RX9 PEX_TX9# 64 183 RSVD LVDS_LTX3# 184
65 66 PCIE_MTX_C_GRX_P9 185 186
PCIE_GTX_C_MRX_N8 GND PEX_TX9 RSVD LVDS_LTX3
67 PEX_RX8# GND 68 187 GND GND 188
PCIE_GTX_C_MRX_P8 69 70 PCIE_MTX_C_GRX_N8 189 190 VGA_TXOUT2- VGA_TXOUT2- (20)
PEX_RX8 PEX_TX8# PCIE_MTX_C_GRX_P8 IGP_LTX2#/DVI_B_TX2# LVDS_LTX2# VGA_TXOUT2+
71 GND PEX_TX8 72 191 IGP_LTX2/DVI_B_TX2 LVDS_LTX2 192 VGA_TXOUT2+ (20)
PCIE_GTX_C_MRX_N7 73 74 193 194
PCIE_GTX_C_MRX_P7 PEX_RX7# GND PCIE_MTX_C_GRX_N7 GND GND VGA_TXOUT1-
75 PEX_RX7 PEX_TX7# 76 195 IGP_LTX1#/DVI_B_TX1# LVDS_LTX1# 196 VGA_TXOUT1- (20)
77 78 PCIE_MTX_C_GRX_P7 197 198 VGA_TXOUT1+ VGA_TXOUT1+ (20)
PCIE_GTX_C_MRX_N6 GND PEX_TX7 IGP_LTX1/DVI_B_TX1 LVDS_LTX1
79 PEX_RX6# GND 80 199 GND GND 200
PCIE_GTX_C_MRX_P6 81 82 PCIE_MTX_C_GRX_N6 201 202 VGA_TXOUT0- VGA_TXOUT0- (20)
PEX_RX6 PEX_TX6# PCIE_MTX_C_GRX_P6 IGP_LTX0#/DVI_B_TX0# LVDS_LTX0# VGA_TXOUT0+
83 GND PEX_TX6 84 203 IGP_LTX0/DVI_B_TX0 LVDS_LTX0 204 VGA_TXOUT0+ (20)
PCIE_GTX_C_MRX_N5 85 86 (20) DVI_DET DVI_DET 205 206
PCIE_GTX_C_MRX_P5 PEX_RX5# GND PCIE_MTX_C_GRX_N5 VGA_DVI_TXC- DVI_A_HPD GND I2CC_SDA
87 PEX_RX5 PEX_TX5# 88 (20) VGA_DVI_TXC- 207 DVI_A_CLK# DDCC_DAT 208 I2CC_SDA (20)
B PCIE_MTX_C_GRX_P5 VGA_DVI_TXC+ I2CC_SCL B
89 GND PEX_TX5 90 (20) VGA_DVI_TXC+ 209 DVI_A_CLK DDCC_CLK 210 I2CC_SCL (20)
PCIE_GTX_C_MRX_N4 91 92 211 212 ENVDD
PEX_RX4# GND GND LVDS_PPEN ENVDD (20)
PCIE_GTX_C_MRX_P4 93 94 PCIE_MTX_C_GRX_N4 (20) VGA_DVI_TXD2- VGA_DVI_TXD2- 213 214
PEX_RX4 PEX_TX4# PCIE_MTX_C_GRX_P4 VGA_DVI_TXD2+ DVI_A_TX2# LVDS_BL_BRGHT ENBKL
95 GND PEX_TX4 96 (20) VGA_DVI_TXD2+ 215 DVI_A_TX2 LVDS_BLEN 216 ENBKL (12,27,28)
PCIE_GTX_C_MRX_N3 97 98 217 218 VGA_DVI_SDATA VGA_DVI_SDATA (20)
PCIE_GTX_C_MRX_P3 PEX_RX3# GND PCIE_MTX_C_GRX_N3 VGA_DVI_TXD1- GND DDCB_DAT VGA_DVI_SCLK
99 PEX_RX3 PEX_TX3# 100 (20) VGA_DVI_TXD1- 219 DVI_A_TX1# DDCB_CLK 220 VGA_DVI_SCLK (20)
101 102 PCIE_MTX_C_GRX_P3 (20) VGA_DVI_TXD1+ VGA_DVI_TXD1+ 221 222 +2.5VS
PCIE_GTX_C_MRX_N2 GND PEX_TX3 DVI_A_TX1 2V5RUN
103 PEX_RX2# GND 104 223 GND GND 224
PCIE_GTX_C_MRX_P2 105 106 PCIE_MTX_C_GRX_N2 (20) VGA_DVI_TXD0- VGA_DVI_TXD0- 225 226 +3VS
PEX_RX2 PEX_TX2# PCIE_MTX_C_GRX_P2 VGA_DVI_TXD0+ DVI_A_TX0# 3V3RUN
107 GND PEX_TX2 108 (20) VGA_DVI_TXD0+ 227 DVI_A_TX0 3V3RUN 228
229 GND 3V3RUN 230
ACES_88990-2D08
ACES_88990-2D08 +3VS
VGA@
VGA@
2
B+ B+ B+ +1.8VS +3VS +2.5VS +5VS
G
1 3 D_EC_SMB_DA1
(27,28,29,37) EC_SMB_DA1
C652
S
10U_1206_25V6M 1 1 1 1 1 1 Q54
1
2
4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
G
0.1U_0603_25V7K
2
S
A A
VGA@ Q55
PVT Modify 2007/03/22
Dr-Bios.com
2N7002_SOT23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3581P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401474
Date: Tuesday, November 27, 2007 Sheet 18 of 43
5 4 3 2 1
A B C D E
1
2 1 1 2
RB411D_SOT23 1.1A_6VDC_FUSE
1
C3
3
0.1U_0402_16V4Z
2
1
+3VS 1
Place closed to chipset
1
R5 UMA@ 0_0402_5% 10P_0402_50V8J 10P_0402_50V8J 13
1
R304 R303 1 1 1 3
R302 1 1 1 9
14
150_0402_1% C498 C496 C495 4
2
2 2 2 10P_0402_50V8J 10P_0402_50V8J 10P_0402_50V8J 10 16
2
150_0402_1% 2 2 2
15 17
150_0402_1% 1 5
C497
10P_0402_50V8J C2 SUYIN_070549FR015S208CR
+CRT_VCC CRT_HSYNC_2 470P_0402_50V7K
1 2 CRT_DET (15)
L39 FCM1608C-121T_0603 2
1 2 2 1 DSUB_12
C492 0.1U_0402_16V4Z R297 10K_0402_5% 1 2 CRT_VSYNC_2
L38 FCM1608C-121T_0603 1
1
U22
1 1 C4
OE#
1 2 CRT_HSYNC 2 4 CRT_HSYNC_1 C491 470P_0402_50V7K
(18) VGA_CRT_HSYNC A Y 2
R301 VGA@ 0_0402_5% C493
G
1 2 10P_0402_50V8K 10P_0402_50V8K DSUB_15
2 (12) UMA_CRT_HSYNC 2 2 2
R300 UMA@ 39_0402_5% SN74AHCT1G125DCKR_SC70-5
3
+CRT_VCC 1
1
U21
OE#
1 2 CRT_VSYNC 2 4 CRT_VSYNC_1
(18) VGA_CRT_VSYNC A Y
R298 VGA@ 0_0402_5%
G
1 2 +3VS
(12) UMA_CRT_VSYNC +CRT_VCC
R299 UMA@ 39_0402_5% SN74AHCT1G125DCKR_SC70-5
1
Place closed to chipset
R11
+3VS 4.7K_0402_5%
1
UMA@
2
TV-OUT Conn. D6 D9 D10
R7
4.7K_0402_5% R1
1 2 R12
VGA@ 0_0402_5% VGA_DDC_DATA (18)
2
<BOM Structure>
G
DAN217_SC59 DAN217_SC59 DAN217_SC59 4.7K_0402_5% R13 UMA@ 0_0402_5%
DSUB_12 1 3 2 1
1
UMA_CRT_DATA (12)
S
Q2
2
2N7002_SOT23
G
DSUB_15 1 3 2 1
R2 UMA_CRT_CLK (12)
Place closed to chipset
S
2
3
Q1 UMA@ 0_0402_5%
3 2N7002_SOT23 3
+3VS
1 2 R3 VGA_DDC_CLK (18)
1 2 VGA@ 0_0402_5%
(18) VGA_TV_LUMA
R76 VGA@ 0_0402_5% JP24
1 2 TV_LUMA 1 2 3
(12) UMA_TV_LUMA
2
R391 UMA&TV@ 0_0402_5% L33 TV@ FCM1608C-121T_0603 TV_CRMA_1 6
1 2 TV_COMPS_1 7 R4
(18) VGA_TV_CRMA
R75 VGA@ 0_0402_5% TV_CRMA 1 2 5 4.7K_0402_5%
1 2 L31 TV@ FCM1608C-121T_0603 2 UMA@
(12) UMA_TV_CRMA
R393 UMA&TV@ 0_0402_5% TV_LUMA_1 4
1
1 2 TV_COMPS 1 2 1
(18) VGA_TV_COMPS
R83 VGA@ 0_0402_5% L29 TV@ FCM1608C-121T_0603 8
1 2 9 +3VS
(12) UMA_TV_COMPS
R392 UMA&TV@ 0_0402_5% C317 C346 C301 C337
1
150_0402_1%
C335 C323
82P_0402_50V8J 82P_0402_50V8J
TV@
4 4
A
Dr-Bios.com B
Security Classification
Issued Date 2006/08/18
Compal Secret Data
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Size
B
D
2007/8/18 Title
Date:
401474
Compal Electronics, Inc.
SCHEMATIC, M/B LA-3581P
Document Number
1
1 TXCLK+ 2 3 VGA_TXCLK+
VGA_TXCLK+ (18)
R19 C10 RP44 VGA@ 0_0404_4P2R_5%
R17 100K_0402_5% TZOUT0- 1 4 VGA_TZOUT0-
D VGA_TZOUT0- (18) D
300_0402_5% 4.7U_0805_10V4Z TZOUT0+ 2 3 VGA_TZOUT0+
2 VGA_TZOUT0+ (18)
RP54 VGA@ 0_0404_4P2R_5%
1 2
2
TZOUT1- 1 4 VGA_TZOUT1-
VGA_TZOUT1- (18)
3
D S
TZOUT1+ VGA_TZOUT1+
G 2 3 VGA_TZOUT1+ (18)
Q4 2 2 1 2 Q3 RP46 VGA@ 0_0404_4P2R_5%
2N7002_SOT23 G R18 1K_0402_5% AO3413_SOT23-3 TZOUT2- 1 4 VGA_TZOUT2-
VGA_TZOUT2- (18)
1
S 1
D TZOUT2+ 2 3 VGA_TZOUT2+
VGA_TZOUT2+ (18)
1
R513 C14 +LCDVDD RP48 VGA@ 0_0404_4P2R_5%
1K_0402_5% W=60mils TZCLK- 1 4 VGA_TZCLK-
VGA_TZCLK- (18)
1
UMA@ D 0.047U_0402_16V7K TZCLK+ VGA_TZCLK+
@ 2 3 VGA_TZCLK+ (18)
R308 1 2
(12) UMA_ENVDD 2 0_0402_5% 2 Q39 RP50 VGA@ 0_0404_4P2R_5%
2
VGA@ G 2N7002_SOT23 1 1
R309 1 2 0_0402_5% S C500 C501
(18) ENVDD
3
1
4.7U_0805_10V4Z 0.1U_0402_16V4Z I2CC_SCL 1 4 UMA_LCD_CLK UMA_LCD_CLK (12)
R310 2 2 I2CC_SDA UMA_LCD_DATA
2 3 UMA_LCD_DATA (12)
100K_0402_5% RP56 UMA@ 0_0404_4P2R_5%
TXOUT0+ 1 4 UMA_TXOUT0+
2 UMA_TXOUT0+ (12)
TXOUT0- 2 3 UMA_TXOUT0-
UMA_TXOUT0- (12)
RP41 UMA@ 0_0404_4P2R_5%
+3VS TXOUT1+ 1 4 UMA_TXOUT1+
UMA_TXOUT1+ (12)
TXOUT1- 2 3 UMA_TXOUT1-
UMA_TXOUT1- (12)
RP53 UMA@ 0_0404_4P2R_5%
1
TXOUT2+ 1 4 UMA_TXOUT2+
UMA_TXOUT2+ (12)
R307 TXOUT2- 2 3 UMA_TXOUT2-
UMA_TXOUT2- (12)
RP43 UMA@ 0_0404_4P2R_5%
4.7K_0402_5% TXCLK+ 1 4 UMA_TXCLK+
UMA_TXCLK+ (12)
D16 TXCLK- 2 3 UMA_TXCLK-
UMA_TXCLK- (12)
2
BKOFF# 1 2 RB751V_SOD323 DISPOFF# RP45 UMA@ 0_0404_4P2R_5%
(27,28) BKOFF#
TZOUT0+ 1 4 UMA_TZOUT0+
UMA_TZOUT0+ (12)
TZOUT0- 2 3 UMA_TZOUT0-
UMA_TZOUT0- (12)
Update Footprint RP55 UMA@ 0_0404_4P2R_5%
C TZOUT1+ UMA_TZOUT1+ C
1 4 UMA_TZOUT1+ (12)
TZOUT1- 2 3 UMA_TZOUT1-
UMA_TZOUT1- (12)
RP47 UMA@ 0_0404_4P2R_5%
TZOUT2+ 1 4 UMA_TZOUT2+
UMA_TZOUT2+ (12)
TZOUT2- 2 3 UMA_TZOUT2-
UMA_TZOUT2- (12)
RP49 UMA@ 0_0404_4P2R_5%
TZCLK+ 1 4 UMA_TZCLK+
UMA_TZCLK+ (12)
TZCLK- 2 3 UMA_TZCLK-
UMA_TZCLK- (12)
RP51 UMA@ 0_0404_4P2R_5%
LCD/PANEL BD. Conn.
JP1 10/2 SWAP PIN
42 GND GND 41
+INVPWR_B+ 40 39 DAC_BRIG W=40mils
40 39 DAC_BRIG (27,28)
38 37 INVTPWM 1 2 INVT_PWM D18
38 37 INVT_PWM (27,28) +DVI_VCC F2
+3VS 36 35 DISPOFF# R15 1 2 0_0402_5% DVI@ RB411D_SOT23
36 35 DPST_PWM (12,27,28)
I2CC_SCL 34 33 R16 @ 0_0402_5% 1.1A_6VDC_FUSE
(18) I2CC_SCL 34 33
I2CC_SDA 32 31 (60 MIL) DVI@ 2 1 1 2 +5VS
(18) I2CC_SDA 32 31
30 29 L4 2 1 +LCDVDD 1
TZOUT0- 30 29 KC FBM-L11-201209-221LMAT_0805
28 28 27 27
TZOUT0+ 26 25 TXOUT0- C502
26 25 TXOUT0+ 0.1U_0402_16V4Z
TZOUT1+
24 24 23 23 9/25 Added for EMI 2
22 21 DVI@
TZOUT1- 22 21 TXOUT1-
20 19
TZOUT2+
18
16
20
18
19
17 17
15
TXOUT1+ DVI-D Connector
TZOUT2- 16 15 TXOUT2+ +3VS
14 14 13 13 +DVI_VCC
12 11 TXOUT2- JP15
12 11
1
TZCLK- 10 9 1 4 DVI_TXD0- 17 14
10 9 (18) VGA_DVI_TXD0- TMDS_DATA0- +5V
@ TZCLK+ 8 7 TXCLK- 2 3 DVI_TXD0+ 18 R327 R331
8 7 (18) VGA_DVI_TXD0+ TMDS_DATA0+
0_0402_5% 6 5 TXCLK+ RP36 DVI@ 0_0404_4P2R_5% 4.7K_0402_5% 4.7K_0402_5%
6 5
2
B R305 USB20_CMOS_N4 DVI_TXD1+ DVI_TXD1- DVI@ DVI@ B
G
(14) USB20_N4 1 2 4 4 3 3 (18) VGA_DVI_TXD1+ 1 4 9 TMDS_DATA1-
R306 1 2 USB20_CMOS_P4 2 1 +3VS 2 3 DVI_TXD1- DVI_TXD1+ 10
(14) USB20_P4 (18) VGA_DVI_TXD1-
2
0_0402_5% 2 1 RP37 DVI@ 0_0404_4P2R_5% TMDS_DATA1+
1 3
@ ACES_88242-4001 1 4 DVI_TXD2- 1
S
(18) VGA_DVI_TXD2- TMDS_DATA2- VGA_DVI_SCLK (18)
2 3 DVI_TXD2+ 2 6 Q44
(18) VGA_DVI_TXD2+ TMDS_DATA2+ DDC_CLOCK
2
RP38 DVI@ 0_0404_4P2R_5% 2N7002_SOT23
G
12 DVI@
TMDS_DATA3-
13 TMDS_DATA3+ DDC_DATA 7 1 3
S
VGA_DVI_SDATA (18)
4 Q45
L3 Fro CMOS Cemera 5
TMDS_DATA4- 2N7002_SOT23
USB20_P4 USB20_CMOS_P4 TMDS_DATA4+ DVI@
4 4 3 3
20 R337
TMDS_DATA5- DVI_DET
21 TMDS_DATA5+ Hot Plug Detect 16 1 2 DVI_DET (18)
USB20_N4 1 2 USB20_CMOS_N4 DAC_BRIG 1 2
1 2
1
C7 @ 220P_0402_50V7K 0_0402_5%
WCM2012F2S-900T04_0805 INVTPWM 1 2 1 4 DVI_TXC+ 23 DVI@ R336
(18) VGA_DVI_TXC+ TMDS_Clock+
CMOS@ C11 @ 220P_0402_50V7K 2 3 DVI_TXC- 24 @ D19
(18) VGA_DVI_TXC- TMDS_Clock-
DISPOFF# 1 2 RP39 DVI@ 0_0404_4P2R_5% 100K_0402_5% SKS10-04AT_TSMA@
9/25 Added for EMI C8 @ 220P_0402_50V7K 3
2
TMDS_DATA2/4 shield
TMDS_DATA1/3 shield 11
25 Shield TMDS_DATA0/5 shield 19
26 Shield TMDS_Clock shield 22
27 Shield
+INVPWR_B+ +LCDVDD 28
+3VS Shield
31 Shield
L1 2 1 32
B+ Shield
KC FBM-L11-201209-221LMAT_0805
1 1 1 8 Analog VSYNC GND 15
L2 2 1 C9 C12 C13
KC FBM-L11-201209-221LMAT_0805
1 1 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z SUYIN_070939FR024S531PL
A C6 C5 2 2 2 DVI@ A
Dr-Bios.com
2 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3581P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401474
Date: Tuesday, November 27, 2007 Sheet 20 of 43
5 4 3 2 1
5 4 3 2 1
+3VS
1
IDE_D[0..15] C311
(13) IDE_D[0..15] +3VS R216 1 2 0.1U_0402_16V4Z
IDE_A[0..2] 4.7K_0402_5%
(13) IDE_A[0..2]
@ @
5
U12
2
IDE_HRESET# 2 B
P
(15) IDE_HRESET#
R203 4.7K_0402_5% 4 IDE_RESET#
IDE_IORDY PCIRST_IDE# Y
1 2 1
CDROM CONN (13) PCIRST_IDE# A
G
D D
IDE_D7 R217 1 2 10K_0402_5% NC7SZ08P5X_NL_SC70-5
3
@
JP25 IDE_IRQ R190 1 2 10K_0402_5%
1 2
3 4 IDE_DREQ R209 1 2 5.6K_0402_5%
IDE_RESET# 5 6 IDE_D8
IDE_D7 7 8 IDE_D9 IDE_PDIAG# R219 1 2 10K_0402_5% @
IDE_D6 9 10 IDE_D10
IDE_D5 11 12 IDE_D11 R389 33_0402_5%
IDE_D4 13 14 IDE_D12 1 2
+5VS IDE_D3 15 16 IDE_D13
IDE_D2 17 18 IDE_D14
IDE_D1 19 20 IDE_D15
IDE_D0 21 22 IDE_DREQ
IDE_DREQ (13)
1
23 24 IDE_IOR#
IDE_IOR# (13)
R187 IDE_IOW# 25 26 +5VS
(13) IDE_IOW#
100K_0402_5% IDE_IORDY 27 28 IDE_DACK#
(13) IDE_IORDY IDE_DACK# (13)
IDE_IRQ 29 30
(13) IDE_IRQ
IDE_A1 31 32 IDE_PDIAG# 0.1U_0402_16V4Z
2
IDE_A0 33 34 IDE_A2
IDE_CS1# 35 36 IDE_CS3# 1 1 1 1
(13) IDE_CS1# IDE_CS3# (13)
IDE_LED# IDE_LED# 37 38 C274 C272
(27,28) IDE_LED# +5VS C273
39 40 80mils C268
+5VS 41 42 10U_0805_10V4Z
R172 2 2 2 2 2
1 10K_0402_5% @ 43 44
+5VS 45 46 1U_0402_6.3V4Z
2 1 SD_CSEL 47 48 1000P_0402_50V7K
R171 470_0402_5% 49 50 1 2 +5VS
C 51 52 R173 C
100K_0402_5% 80mils
OCTEK_CDR-50JD1 @
If CDROM is Slave
then SD_CSEL= Floating
else SD_CSEL= Low
23 10U_0805_10V4Z
SATA_STX_C_DRX_P1 GND 2 2 2 2
(14) SATA_STX_C_DRX_P1 24 HTX1+
SATA_STX_C_DRX_N1 25
(14) SATA_STX_C_DRX_N1 HTX1- 0.1U_0402_16V4Z 1000P_0402_50V7K
26 GND
B SATA_DTX_SRX_N1 B
27 HRX1-
SATA_DTX_SRX_P1 28 HRX1+
29 GND
+5VS
+3VS 8 VCC3.3
9 C567 C566
VCC3.3 10U_0805_10V4Z 0.1U_0402_16V4Z
10 VCC3.3
11 GND 1
12 GND 1 1 1 1
13 +
GND
+5VS 14 VCC5
15 VCC5 2 2 2 2 2
16 VCC5
17 GND
18 C570 C565 C564
RESERVED 150U_D2_6.3VM 0.1U_0402_16V4Z 1000P_0402_50V7K
19 GND
20 @
VCC12
21 VCC12
22 VCC12
Close to SATA HDD
30 GND1
31 GND2
OCTEK_SAS-22CA1G
A A
SATA@
Dr-Bios.com
C581 0.01U_0402_16V7K
SATA_DTX_C_SRX_N0 1 2 SATA_DTX_SRX_N0
(14) SATA_DTX_C_SRX_N0 SATA_DTX_C_SRX_P0 SATA_DTX_SRX_P0
(14) SATA_DTX_C_SRX_P0 C580
1 2
0.01U_0402_16V7K
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
SATA_DTX_C_SRX_N1
C561
1
SATA2@
2
0.01U_0402_16V7K
SATA_DTX_SRX_N1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3581P
(14) SATA_DTX_C_SRX_N1 SATA_DTX_C_SRX_P1 SATA_DTX_SRX_P1 Size Document Number Rev
(14) SATA_DTX_C_SRX_P1 1 2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B C
C560 SATA2@ 0.01U_0402_16V7K DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401474
Date: Tuesday, November 27, 2007 Sheet 21 of 43
5 4 3 2 1
5 4 3 2 1
1 2 RGMII_MDIO
+3VAUX
R181 10K_0402_5% U3 +3VAUX PVT 2007/3/12 +3VAUX
DVDD33 18
TXCTL 29 23
(12) TXCTL TXCTL DVDD33
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Config 5~8 : Auto-Negotiation(NWay) TXCLK 24 34
(12) TXCLK_PHY TXC DVDD33
TXD0 25 42 1.5v & 1.8v output power trace 1 1 1 1
Configuration (12) TXD0 TXD0 DVDD33
TXD1 26 49
(12) TXD1 TXD1 DVDD33 width=40mil
C242
C225
C261
C213
TXD2 27 55
(12) TXD2 TXD2 DVDD33
(RTL8211B:Config for all capability, TXD3 28 L59 MBK1608121YZF_0603
(12) TXD3 TXD3 2 2 2 2
RGMII
8 LAN_AVDD33 2 1 +3VAUX
prefer slave mode) (12) RXCTL RXCTL 16
AVDD33
60
R481 1 33_0402_5% RXCLK_R RXCTL AVDD33
(12) RXCLK 2 22 RXC 1 2
+3VAUX RXD0 17 C164 0.1U_0402_16V4Z
D
(12) RXD0 RXD0 D
(12) RXD1 RXD1 19 1 2
RXD2 RXD1 C188 0.1U_0402_16V4Z
(12) RXD2 20 RXD2
(12) RXD3 RXD3 21 32 LAN_DVDD15 60mil
RXD3 DVDD15
1
R482 4.7K_0402_5% R483 4.7K_0402_5% @ 36
DVDD15 +3VALW
1 2 CONFIG_5 1 2 C659
DVDD15 45 +3VAUX
33P_0402_50V8K TXDLY 51 59
2
R484 4.7K_0402_5% R485 4.7K_0402_5% @ @ RXDLY TXDLY DVDD15 C530 C535 C531
52 U34
RXDLY
1 2 CONFIG_6 1 2 L60 MBK1608121YZF_0603 8 D S 1 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
PWR
0.1U_0402_16V4Z
(12) RGMII_MDC RGMII_MDC 30 63 LAN_AVDD15 2 1 LAN_DVDD15 1 7 2 1 1 1 1 1
R486 4.7K_0402_5% R487 4.7K_0402_5% @ RGMII_MDIO MDC AVDD15 C227 D S
(12) RGMII_MDIO 31 MDIO 1 6 D S 3
1 2 CONFIG_7 1 2 1U_0603_10V4Z 5 D G 4
C253
R488 4.7K_0402_5% R489 4.7K_0402_5% @ 2 SI4800BDY_SO8 2 2 2 2 2
2
1 2 CONFIG_8 1 2 (12) LINK10 LINK10 50 LED_LINK10
C534 C532
LINK100 48 2 LAN_AVDD18 0.1U_0402_16V4Z 0.1U_0402_16V4Z
LED_LINK100 AVDD18
LED
R490 4.7K_0402_5% R491 4.7K_0402_5% @ LINK1000 44 5 +VSB 2 1 +3VAUX_GATE
LED_LINK1000 AVDD18
1 2 CONFIG_9 1 2 43 LED_DUPLEX AVDD18 10 R441 place 0.1u cap close to IC power pin
LAN_ACTIVITY# 1 2 LED_RX 40 13 200K_0402_5% 1
R494 4.7K_0402_5% @ R495 4.7K_0402_5% LED_TX LED_RX AVDD18 C635
1 2 39 LED_TX
1
TXDLY @ R493 0_0402_5% D
1 2 1 2
@ R496 0_0402_5% 9 LAN_CTRL18 +5VALW 2 1WOL_EN# 2 0.1U_0603_25V7K
R497 4.7K_0402_5% @ R498 4.7K_0402_5% CTRL18 LAN_CTRL15 R449 G 2
CTRL15 64
1 2 RXDLY 1 2 RXCLK_R 100K_0402_5% S +3VALW +3VAUX
3
3 LAN_MIDI0+ +3VAUX Q46 L43
MDI0+
PHY Config
R507 4.7K_0402_5% @ R506 4.7K_0402_5% @ 4 LAN_MIDI0- 2N7002_SOT23 1 2
MDI0-
1
1
CLK LAN I/F
@ CONFIG_2 56 11 LAN_MIDI2+
2
1
CONFIG_4 LAN_MIDI3+ 5.1K_0402_1% D
53 CONFIG_4 MDI3+ 14
Config 9 : Interface Mode Select CONFIG_5 47 15 LAN_MIDI3- @ Q50 2 1 2
CRS/CONFIG_5 MDI3- SBPWR_EN (27,28,34,40)
CONFIG_6 46 2N7002_SOT23 G R561 0_0402_5% @
2
C CONFIG_7 COL/CONFIG_6 RSET C
(12) RGMII_INTR 37 1 2 1 S 1 2 SLP_RMGT# (12,15)
3
INTB/CONFIG_7 RSET
1
CONFIG_8 35 38 2.49K_0402_1% R128 1 2 MII_RST (12) R562 0_0402_5%
CONFIG_9 RXER/CONFIG_8 PHYRSTB R566 0_0402_5% R450
33 CONFIG_9
2 100K_0402_5%
LAN_LINK# 2 1 LINK1000 61 LAN_XTAL1 C191
D25 CH751H-40PT _SOD323 X1 LAN_XTAL2 0.1U_0402_16V4Z
62
MP Modify 2007/04/13
2
X2
65 GND Y1 1 @
CLK125 41
LAN_AVDD18 1 2 V_DAC1 2 1
2
R120 RTL8211B-GR_QFN64_9x9 1 1
0_0805_5% R32 25MHZ_20P
@ 6 Via to GND 470_0402_5% C236 C243
27P_0402_50V8J
2
27P_0402_50V8J
2 MP Modify 2007/04/19
1
V_DAC4 1 2 V_DAC3
R509 0_0402_5% @ +3VAUX
V_DAC3 1 2 V_DAC2
R510 0_0402_5% @ +3VAUX
V_DAC2 1 2 V_DAC1
5
R511 0_0402_5% @
LAN_LINK# 2 1 LINK10 LED_RX 1 2 2
P
D26 CH751H-40PT _SOD323 L67 FBM-11-160808-700T_0603 B 4 LAN_ACTIVITY# Update Footprint
LED_TX Y
1 2 1
FBM-11-160808-700T_0603 A MP Modify 2007/04/19
3
LAN_LINK# 2 1 LINK100 L68 NC7SZ08P5X_NL_SC70-5
D27 CH751H-40PT _SOD323 U39 Q18
3
LAN_CTRL18 1 2SB1188T100R_SC62-3
EMI 2007/4/12 Added
place 0.1u cap close to IC power pin
T1 RP7 L70
2
C113 1 2 0.01U_0402_16V7K V_DAC1 1 24 1 8 LAN_AVDD18_R 2 1 LAN_AVDD18
TCT1 MCT1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
LAN_MIDI3- 2 23 RJ45_MDI3- 2 7 MBK1608301YZF_0603
LAN_MIDI3+ TD1+ MX1+ RJ45_MDI3+
B
3 TD1- MX1- 22 3 6 2 1 103mA 1 1 1 1 1
B
C122 1 2 0.01U_0402_16V7K V_DAC2 4 21 4 5 RJ45_GND C161 C185
TCT2 MCT2
C179
C222
C223
C224
C205
LAN_MIDI2- 5 20 RJ45_MDI2- 0.1U_0402_16V4Z 10U_0805_10V4Z
LAN_MIDI2+ TD2+ MX2+ RJ45_MDI2+ 75_1206_8P4R_5%
6 TD2- MX2- 19
C129 1 V_DAC3 1 2 2 2 2 2 2
2 0.01U_0402_16V7K 7 TCT3 MCT3 18
LAN_MIDI1- 8 17 RJ45_MDI1-
LAN_MIDI1+ TD3+ MX3+ RJ45_MDI1+
9 TD3- MX3- 16
C133 1 2 0.01U_0402_16V7K V_DAC4 10 15
LAN_MIDI0- TCT4 MCT4 RJ45_MDI0- +3VAUX
11 TD4+ MX4+ 14
LAN_MIDI0+ 12 13 RJ45_MDI0+
TD4- MX4-
350uH_GSL5009LF
Update Footprint
JP18
R126 2 1 300_0603_5% 12
+3VAUX Amber LED+
3
+3VAUX
LAN_ACTIVITY# 1 2 LAN_ACTIVITY#_R 11 Q21 MP Modify 2007/04/19
L61 MBK1608601YZF 0603 Amber LED- LAN_CTRL15 2SB1188T100R_SC62-3
SHLD2 16 1
RJ45_MDI3- 8 R499 4.7K_0402_5%
LAN_ACTIVITY#_R PR4-
SHLD1 15 1 2 CONFIG_0 place 0.1u cap close to IC power pin
1 RJ45_MDI3+ 7 R500 4.7K_0402_5% L71
2
LAN_LINK#_R PR4+
1 2 CONFIG_1 LAN_DVDD15_R 2 1 LAN_DVDD15
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C685 RJ45_MDI1- 6 R501 4.7K_0402_5% MBK1608301YZF_0603
10P_0402_50V8J PR2-
1 2 CONFIG_2 1 1 241mA 1 1 1 1 1 1 1 1
2 @ RJ45_MDI2- R502 4.7K_0402_5% C257
1 5 PR3-
C247
C251
C256
C265
C264
C263
C262
C260
1 2 CONFIG_3 C254 10U_0805_10V4Z
C686 RJ45_MDI2+ 4 R503 4.7K_0402_5% 0.1U_0402_16V4Z
PR3+ 2 2 2 2 2 2 2 2 2 2
10P_0402_50V8J 1 2 CONFIG_4
2 @ RJ45_MDI1+ 3 PR2+
RJ45_MDI0- 2 @ @ @ @ @ @ @ @
PR1-
SHLD2 14
RJ45_MDI0+ 1
A PR1+ A
SHLD1 13 Config 0~4 : PHY Address
LAN_LINK# 1 2 LAN_LINK#_R 10
L62 MBK1608601YZF 0603 Green LED-
Dr-Bios.com
R129 2 1 300_0603_5% 9
+3VAUX Green LED+
FOX_JM36113-L2R8-7F
+3VS
SD,MMC,MS,XD muti-function pin define
R5C833 5IN1@ 5IN1@ MDIO SD Card MMC Card MS Card XD Card
U14
(13) PCI_AD[0..31]
PCI_AD31 PIN Name PIN Name PIN Name PIN Name PIN Name
10U_0805_10V4Z
0.01U_0402_16V7K
125 AD31 VCC_PCI3V 10 1 1
PCI_AD30 126 20 MDIO00 SDCD# MMCCD# XDCD0#
AD30 VCC_PCI3V
C284
C290
PCI_AD29 127 27
PCI_AD28 AD29 VCC_PCI3V
1 32 MDIO01 MSCD# XDCD1#
PCI_AD27
PCI_AD26
2
3
AD28
AD27 R5C833 VCC_PCI3V
VCC_PCI3V 41
128
2 2 +3VS
MDIO02 XDCE#
PCI_AD25 AD26 VCC_PCI3V
5 AD25
PCI_AD24 6 61 MDIO03 SDWP# XDR/B#
PCI_AD23 AD24 VCC_RIN
9 AD23
PCI_AD22 MDIO04 SDPWR0 MMCPWR MSWR XDPWR
10U_0805_10V4Z
0.01U_0402_16V7K
0.01U_0402_16V7K
0.1U_0402_16V4Z
11 AD22 VCC_ROUT 16
PCI_AD21 12 34 1 1 1 1
D PCI_AD20 AD21 VCC_ROUT D
14 AD20 VCC_ROUT 64 MDIO05 SDPWR1 XDWP#
C331
C338
C359
C367
PCI_AD19
0.01U_0402_16V7K
0.01U_0402_16V7K
15 114
0.47U_0603_16V4Z
0.47U_0603_16V4Z
AD19 VCC_ROUT 1 1 1 1
PCI_AD18 17 120 MDIO06 SDLED# MMCLED# MSLED# XDLED#
AD18 VCC_ROUT 2 2 2 2
C285
C294
C347
C378
PCI_AD17 18
PCI_AD16 AD17
19 AD16 VCC_3V 67 +3VS 2 2 2 2
MDIO07 MSEXTCK
PCI_AD15 36
PCI_AD14 AD15 5IN1@ 5IN1@ 5IN1@ 5IN1@ MDIO08 SDCCMD MMCCMD MSBS XDWE#
10U_0805_10V4Z
0.01U_0402_16V7K
37 AD14 VCC_MD3V 86 1 1
PCI_AD13 38 AD13
C322
C354
PCI_AD12 39 98 +3V_PHY MDIO09 SDCCLK MMCCLK MSCCLK XDRE#
PCI_AD11 AD12 AVCC_PHY3V 5IN1@ 5IN1@ 5IN1@ 5IN1@
40 AD11 AVCC_PHY3V 106
PCI_AD10 2 2
42 AD10 AVCC_PHY3V 110 MDIO10 SDCDAT0 MMCDAT MSCDAT0 XDCDAT0
PCI_AD9 43 112
PCI_AD8 AD9 AVCC_PHY3V
44 AD8 MDIO11 SDCDAT1 MSCDAT1 XDCDAT1
PCI_AD7 46 113 IEEE1394_TPBIAS0 5IN1@ 5IN1@
CLK_PCI_1394 PCI_AD6 AD7 TPBIAS0 +3V_PHY
47 AD6 MDIO12 SDCDAT2 MSCDAT2 XDCDAT2
PCI_AD5 48 109 IEEE1394_TPAP0
PCI_AD4 AD5 TPAP0 IEEE1394_TPAN0 L34 1
49 AD4 TPAN0 108 +3VS 2 MDIO13 SDCDAT3 MSCDAT3 XDCDAT3
1
4.7P_0402_50V8C10_0402_5%
PCI_AD3 50 KC FBM-L11-201209-221LMAT_0805
AD3
R237
1000P_0402_50V7K
1000P_0402_50V7K
MDIO14 XDCDAT4
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
51 AD2 TPBP0 105
PCI_AD1 52 104 IEEE1394_TPBN0
@ PCI_AD0 AD1 TPBN0
53 AD0 1 1 1 1 1 MDIO15 XDCDAT5
80 SDCD#_XDCD0#
SDCD#_XDCD0# (24)
2
MDIO00
C371
C375
C374
C373
C372
79 MSCD#_XDCD1 MDIO16 XDCDAT6
MDIO01 MSCD#_XDCD1 (24)
PCI_CBE#3 7 78 XD_CE#
(13) PCI_CBE#3 C/BE3# MDIO02 XD_CE# (24) 2 2 2 2 2
2 PCI_CBE#2 21 77 SDWP#_XDRB# MDIO17 XDCDAT7
(13) PCI_CBE#2 C/BE2# MDIO03 SDWP#_XDRB# (24)
PCI_CBE#1 35 76 MC_PWREN
(13) PCI_CBE#1 C/BE1# MDIO04
C379
10K_0402_1%
5IN1@
0.01U_0402_16V7K
(13) PCI_PIRQE# 115 INTA#
2
116 72 SERIRQ 2
(13) PCI_PIRQF# INTB# UDIO0/SRIRQ# SERIRQ (13,27,28) 22P_0402_50V8J
2
R241
60 TP_UDIO1 Y2
UDIO1 PAD T2
C377
56 TP_UDIO2 5IN1@ SDDATA1_MSDATA1 R231 2 1 0_0402_5% SD_MSDATA1
UDIO2 PAD T3 SD_MSDATA1 (24)
1 2 69 65 UDIO3 24.576MHZ_16P_X8A024576FG1H 5IN1@
+3VS HWSPND# UDIO3 1 C370
R211 10K_0402_5% 66 59 UDIO4 SDDATA2_MSDATA2 R243 2 1 0_0402_5% SD_MSDATA2
SD_MSDATA2 (24)
1
TEST UDIO4 UDIO5 5IN1@ 5IN1@ R5C832XO 5IN1@
5IN1@ UDIO5 57 1 2
1 2 5IN1@ +VCC_4IN1 R229 1 2 0_0805_5% +VCC_4IN1_XD
(26,27,28,34,38) SUSP#
R212 0_0402_5% @ 111 4 5IN1@
AGND GND 22P_0402_50V8J
107 AGND GND 13
103 AGND GND 22
102 AGND GND 28
99 54 Layout Note: Shield GND for D11
B AGND GND MSCD#_XDCD1 B
GND 62 CBS_CCLK_INTERNAL and CBS_CCLK 2
63 1 XDCD#
GND XDCD# (24)
97 68 SDCD#_XDCD0# 3
RSV GND
GND 118
122 DAN202UT106_SC70-3
GND
5IN1@
R5C833-TQFP128P_TQFP128_14x14
Update Footprint
Layout Note: Place close to R5C832
5IN1@
SDCLK_MSCLK
Memory Card Power Switch
+VCC_4IN1
1
R225
1
C552
R395
U13 40mil
2
1394@ 1394@ @ R238 1 8 SDCMD_MSBS 1 2
10K_0402_5% GND OUT R451 2.7K_0402_5% @
2 7
2
+3VS 2 IN OUT
150K_0402_5%
5IN1@ SDDATA0_MSDATA0
1U_0402_6.3V4Z
3 6 1 2
2
IN OUT
1
MC_PWREN# 4 5 1 R452 2.7K_0402_5% @
EN# FLG
R218
100K_0402_5%
2 SDDATA1_MSDATA1 1 2
1
1
C329
Z3008 1 G528_SO8 R453 2.7K_0402_5% @
R210
C355
C339
5IN1@ 300_0603_5% R454 2.7K_0402_5% @
2
2
1
1 @ D
56.2_0603_1%
56.2_0603_1%
1 2
R396
R394
0.1U_0402_16V4Z
D 1 2
CBS_GRST# S Q27 R456 2.7K_0402_5% @
3
G Q30
1 JP26 S 5IN1@
3
C321 IEEE1394_TPAP0 4
A IEEE1394_TPAN0 4 A
3 3 6 6
1U_0402_6.3V4Z IEEE1394_TPBP0 2 5
2 IEEE1394_TPBN0 2 5
5IN1@ 1 1
FOX_UV31413-4R1-TR
0.33U_0603_10V7K
0.01U_0402_16V7K
1394@
2
2
56.2_0603_1%
56.2_0603_1%
R397
C553
C554
1 1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
Dr-Bios.com
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom C
IEEE1394_TPBIAS0 1394@ 1394@ DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401474
Date: Tuesday, November 27, 2007 Sheet 23 of 43
5 4 3 2 1
5 4 3 2 1
@ @ @ @ @ @ @ @ @
1
H15 H19 H1 H24 H28
H_S354D138 H_C315BC236D138 H_C236BC315D138 H_S354BC140D138 H_C335BC140D138
@ @ @ @ @
1
H6 H7 H16 H17
H_C236D165 H_C236D165 H_C236D165 H_C236D165
1
5IN1@ +VCC_4IN1
C618
10U_0805_10V6M
H13 H21 H32 H33 H31
0.1U_0402_16V4Z
1 1 H_C276BC131D128 H_C276BC131D128 H_C236BC131D128 H_C236BC131D128 H_C236BC131D128
C619
5IN1@
PVT Modify 2007/3/12 @ @ @ @ @
4 IN 1 Socket Push Type
1
2 2
1
SD_MSDATA1 XD-D0 SDCLK 1
9 4 IN 1 CONN 24 2 SDCLK_MSCLK @ @
(23) SD_MSDATA1 H31,H32,H33 :H_C236BC131D128
1
SD_MSDATA2 XD-D1 SD_CLK SDDATA0_MSDATA0
(23) SD_MSDATA2 26 XD-D2 SD-DAT0 25 SDDATA0_MSDATA0 (23)
SDDATA3_MSDATA3 27 29 SD_MSDATA1
(23) SDDATA3_MSDATA3 XD-D3 SD-DAT1 SD_MSDATA1 (23)
XDD4 28 10 SD_MSDATA2
(23) XDD4 XD-D4 SD-DAT2 SD_MSDATA2 (23)
XDD5 30 11 SDDATA3_MSDATA3 H25 H26 H22 H23
(23) XDD5 XD-D5 SD-DAT3 SDDATA3_MSDATA3 (23)
XDD6 31 12 SDCMD_MSBS H_C236D98 H_C236D98 H_O89X58D59X28 H_O89X58D59X28
(23) XDD6 XD-D6 SD-CMD SDCMD_MSBS (23)
XDD7 SDCD#_XDCD0#
(23) XDD7 32 XD-D7 SD-CD-SW 36 SDCD#_XDCD0# (23) For DDR Metal Cage
SDCMD_MSBS 6 35 SDWP#_XDRB# @ @ @ @
(23) SDCMD_MSBS SDWP#_XDRB# (23)
1
XDWP# XD-WE SD-WP-SW
(23) XDWP# 7 XD-WP
XDALE 5 5IN1@ R429 22_0402_5%
(23) XDALE XD-ALE
XDCD# 34 15 MSCLK 1 2 SDCLK_MSCLK
(23) XDCD# XD-CD MS-SCLK SDCLK_MSCLK (23)
SDWP#_XDRB# 1 19 SDDATA0_MSDATA0
(23) SDWP#_XDRB# XD-R/B MS-DATA0 SDDATA0_MSDATA0 (23)
SDCLK_MSCLK 2 20 SDDATA1_MSDATA1
XD-RE MS-DATA1 SDDATA1_MSDATA1 (23)
XD_CE# 3 18 SDDATA2_MSDATA2
(23) XD_CE# XD-CE MS-DATA2 SDDATA2_MSDATA2 (23)
XDCLE 4 16 SDDATA3_MSDATA3
(23) XDCLE XD-CLE MS-DATA3 SDDATA3_MSDATA3 (23)
17 MSCD#_XDCD1 FD1 FD2 FD3 FD4 FD5 FD6
MS-INS MSCD#_XDCD1 (23)
13 21 SDCMD_MSBS
4IN1 GND MS-BS SDCMD_MSBS (23)
22 4IN1 GND @ @ @ @ @ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
37 4IN1 GND
38 4IN1 GND
TAITW_R015-312-LM FD7 FD8 FD9 FD10 FD17 FD18
@ @ @ @ @ @
1
B B
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
FD15 FD16
@ @
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80
+5VALW +5VALW +5VALW +5VS +5VS +3VALW +3VS +3VS +3V +3V
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1 1 1 1 1 1 1 1 1
C641
C642
C643
C644
C645
C646
C647
C648
C649
C650
2 2 2 2 2 2 2 2 2 2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3581P
Size Document Number Rev
Dr-Bios.com
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401474
Date: Tuesday, November 27, 2007 Sheet 24 of 43
5 4 3 2 1
A B C D E
1 1 1 1 1 1
C218 1 1 1 1 1 1
C215 10U_0805_10V4Z C216 C214 C233 C217 C183 C187 C186 C184 C180 C181
MINI1@ 4.7U_0805_10V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 10U_0805_10V4Z
2 2 2 2 2 2 MINI2@ 0.1U_0402_16V4Z MINI2@ 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 MINI2@ 2 2 MINI2@ 2 MINI2@ 2 MINI2@
1 MINI1@ 0.1U_0402_16V4Z 1
MINI1@ MINI1@ MINI1@ MINI1@
17 17 18 18
TV_S_CIN 17 18 19 20 WL_OFF#
17 18 19 20 WL_OFF# (27,28)
TV_S_YIN 19 20 21 22 PCIE_RST1#
19 20 21 22 PCIE_RST1# (11)
21 22 PCIE_RST1# PCIE_MRX_PTX_N2 23 24 1 2 +3VS
21 22 PCIE_RST1# (11) (11) PCIE_MRX_PTX_N2 23 24
(11) PCIE_MRX_PTX_N3 PCIE_MRX_PTX_N3 23 24 PCIE_MRX_PTX_P2 25 26 R531 1 2 0_0402_5% MINI2@ +3V
23 24 (11) PCIE_MRX_PTX_P2 25 26
(11) PCIE_MRX_PTX_P3 PCIE_MRX_PTX_P3 25 26 27 28 R532 0_0402_5% @
25 26 27 28 SMBCLK1_R
27 27 28 28 29 29 30 30
29 30 SMBCLK1_R (11) PCIE_MTX_C_PRX_N2 31 32 SMBDATA1_R
29 30 SMBDATA1_R 31 32
(11) PCIE_MTX_C_PRX_N3 31 31 32 32 (11) PCIE_MTX_C_PRX_P2 33 33 34 34
(11) PCIE_MTX_C_PRX_P3 33 33 34 34 35 35 36 36 USB20_N7 (14)
35 35 36 36 USB20_N6 (14) 37 37 38 38 USB20_P7 (14)
2 2
37 37 38 38 USB20_P6 (14) +3VS 39 39 40 40
+3VS 39 39 40 40 41 41 42 42
41 42 43 44 MINI1_LED# MINI1_LED#
41 42 43 44 MINI1_LED# (30)
43 44 (MINI2_LED#) 45 46
AUDIO_INL 43 44 MINI2@ 45 46
45 45 46 46 47 47 48 48
AUDIO_INR 47 48 E51TXD_P80DATA R177 1 2 0_0402_5% 49 50
47 48 (27,28) E51TXD_P80DATA 49 50
(27,28) TV_THERM# 49 50 E51RXD_P80CLK 1 2 51 52
49 50 (27,28) E51RXD_P80CLK 51 52
TV_CVBSIN 51 52 R176 0_0402_5%
51 52 MINI2@
G1
G2
G3
G3
G1
G2
G3
G3
FOX_AS0B226-S99N-7F
PVT Modify 2007/03/12(+3V,+3VS)
53
54
55
56
FOX_AS0B226-S99N-7F MINI2@
53
54
55
56
MINI1@
JP11
Peak Normal Normal
+5VALW
1 1 +5VALW +3VS 1000 750
2 2
3 3 +3VALW 330 250 250 (wake enable)
4 4 1
5 C420 +1.5VS 500 375 5 (Not wake enable)
5 USB20_N2
6 6 USB20_N2 (14)
3 USB20_P2 4.7U_0805_10V4Z 3
7 7 USB20_P2 (14) 2
8 8
9 USB20_N3
9 USB20_N3 (14)
10 USB20_P3
10 USB20_P3 (14)
11 1 2 SMBDATA1_R
11 +3VS
12 AUDIO_INR R545 2.7K_0402_5%
12 AUDIO_INL +3V SMBCLK1_R
13 13 1 2
14 TV_S_YIN_R R546 2.7K_0402_5%
14 TV_S_CIN_R
15 15
1
16 TV_CVBSIN_R +3VS
16
17 17
18 +3VALW R265 PVT2 Modify 2007/04/12
18 RCIRRX 100K_0402_5%
19 19 RCIRRX (27)
2
G
20 USB_EN# (26,27,28)
2
S
1 Q56
C389 2N7002_SOT23
2
0.1U_0402_16V4Z
G
AV-IN Connector 2
1 3 SMBCLK1_R
CIR (15,26) SMBCLK1
S
Q57
2N7002_SOT23
TV_S_YIN_R 1 2 TV_S_YIN
L54 MBK1608121YZF_0603
4 TV_S_CIN_R TV_S_CIN 4
1 2
L55 MBK1608121YZF_0603
TV_CVBSIN_R 1 2 TV_CVBSIN
Dr-Bios.com
L56 MBK1608121YZF_0603
EMI PVT Modify 2007/03/12 Close JP11 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3581P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401474
Date: Tuesday, November 27, 2007 Sheet 25 of 43
A B C D E
A B C D E
GND
(11,14) CP_PE#
NC1
NC2
NC3
NC4
NC5
CPPE#
1
+3VS 1 18
(11) CLK_PCIE_CARD# REFCLK-
R270 C421 19
(11) CLK_PCIE_CARD REFCLK+
TPS2231PWPR_PWP24 10K_0402_5% 20
11
1
10
12
13
24
GND
1
EXPRESS@ EXPRESS@ 0.1U_0402_16V4Z 21
2 EXPRESS@ (11) PCIE_MRX_PTX_N1 PERn0
R271 22
(11) PCIE_MRX_PTX_P1
2
PERp0
5
10K_0402_5% U20 23
EXPRESS@ CLKREQ1# GND
2 24
G Vcc
B (11) PCIE_MTX_C_PRX_N1 PETn0
4 EXP_CLKREQ# (11) (11) PCIE_MTX_C_PRX_P1 25
2
Y PETp0
1 A 26 GND
1
D NC7SZ32P5X_NL_SC70-5 EXPRESS@ 27 29
3
RCLKEN1 2 Q33 GND GND
28 GND GND 30
G 2N7002_SOT23
+3VS +3V +1.5VS S EXPRESS@ FOX_1CH4110C_LT
3
EXPRESS@
2
R547 2.7K_0402_5% @
G
1 2 SMBCLK1_NEW
(15,25) SMBDATA1 SMBDATA1 1 3 SMBDATA1_NEW R548 2.7K_0402_5% @
S
Q58
2N7002_SOT23
@
USB CONN. 1(Stack-up Type) PVT2 Modify 2007/04/11
2
G
+USB_VCCA
(15,25) SMBCLK1 SMBCLK1 1 3 SMBCLK1_NEW W=80mils
+USB_VCCA
S
Q59 1
+3V 2N7002_SOT23 1 C245 1
@ + 470P_0402_50V7K
+5VALW
1
+USB_VCCA
U6 2 2 2 C244
R158 C537 470P_0402_50V7K
1
2
GND OUT 8
7 100K_0402_5% PVT Modify 2007/03/22 150U_D2_6.3VM JP23
IN OUT
3 6 1
2
L26
USB20_N0 4 3 USB20_N0_R
4 3
USB20_P0 1 2 USB20_P0_R
1 2
WCM2012F2S-900T04_0805
L23
USB20_N1 4 3 USB20_N1_R
4 3
USB20_P1 1 2 USB20_P1_R
1 2
WCM2012F2S900T04_0805
D5 D4
1 GND VCC 4 +USB_VCCA 1 GND VCC 4 +USB_VCCA
SUYIN_020173MR004G533ZR_4P SUYIN_020173MR004G533ZR_4P
A
Dr-Bios.com B
Security Classification
Issued Date 2006/08/18
Compal Secret Data
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Size
B
D
2007/8/18 Title
Date:
401474
Compal Electronics, Inc.
SCHEMATIC, M/B LA-3581P
Document Number
+3VALW KSI[0..7]
KSI[0..7] (28,29,30)
For EC Tools
L30 KSO[0..17]
KSO[0..17] (28,29,30) +3VALW
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2+EC_VCCA +EC_VCCA (28)
1 1 C341 1 1 2 2 FBM-L11-160808-800LMT_0603 JP10
C293 1 1
C368 C380 C376 C384 1 E51RXD_P80CLK
2 2 E51RXD_P80CLK (25,28)
1000P_0402_50V7K 1000P_0402_50V7K C330 C660 100P_0402_50V8J 3 E51TXD_P80DATA
2 2 2 2 1 1 3 E51TXD_P80DATA (25,28)
BATT_TEMP 2 1 4
2 4
ECAGND
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C661 100P_0402_50V8J
BATT_OVP 2 1 @ ACES_85205-0400
C662 100P_0402_50V8J +3VALW
D ACIN 2 1 D
65W/90W# 2 1
ECAGND (28)
111
125
R519 100K_0402_5%
22
33
96
67
9
U15
PVT Modify 2007/03/12
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
+5VALW
USB_EN# 2 1
1 21 INVT_PWM R444 100K_0402_5%
(15,28) EC_GA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F INVT_PWM (20,28)
2 23 BEEP#
(15,28) EC_KBRST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 BEEP# (28,32)
(13,23,28) SERIRQ 3 SERIRQ# FANPWM1/GPIO12 26 ENCODER_DIR (28,33)
4 27 +3VS
(13,14,28) LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF (28,35,38)
C364 LPC_AD3 5 2 1 ECAGND
(13,28) LPC_AD3 LAD3
@ 22P_0402_50V8J LPC_AD2 7 PWM Output C283 0.01U_0402_16V7K
(13,28) LPC_AD2 LAD2
2 1 R233 2 1 @ 33_0402_5% LPC_AD1 8 63 BATT_TEMP
(13,28) LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP (28,37)
LPC_AD0 BATT_OVP TV_THERM#
(13,28) LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64 BATT_OVP (28,38)
R390 R443
2 1
100K_0402_5%
ADP_I/AD2/GPIO3A 65 ADP_I (28,38)
12 AD Input 66 AD_BID0 10K_0402_5%
(13,28) CLK_PCI_LPC PCICLK AD3/GPIO3B
(13,28) PLT_RST# 13 PCIRST#/GPIO05 AD4/GPIO42 75 2 1 DPST_PWM (12,20,28)
(28) EC_RST# 37 ECRST# SELIO2#/AD5/GPIO43 76 POUT (28,41) 1
EC_SCI# 20 C549
(15,28) EC_SCI# SCI#/GPIO0E
+3VALW 2 1 38 0.1U_0402_16V4Z
R201 47K_0402_5% (13,23,28) PM_CLKRUN# CLKRUN#/GPIO1D DAC_BRIG
DAC_BRIG/DA0/GPIO3C 68
EN_DFAN1
DAC_BRIG (20,28) 2 Analog Board ID definition, SKU ID definition,
1 EN_DFAN1/DA1/GPIO3D 70 EN_DFAN1 (4,28)
DA Output 71 IREF
IREF (28,38)
Please see page 3. Please see page 3.
C292 KSI0 IREF/DA2/GPIO3E
55 KSI0/GPIO30 DA3/GPIO3F 72 CHGSEL (28,38)
0.1U_0402_16V4Z KSI1 56
2 KSI2 KSI1/GPIO31 +3VALW +3VALW
KSI3
57
58
KSI2/GPIO32
83 EC_MUTE C-PASE H
KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE (28,33)
C KSI4 USB_EN# C
59 KSI4/GPIO34 PSDAT1/GPIO4B 84 USB_EN# (25,26,28) B-PASE L
2
KSI5 60 85 WL_LED# WL_LED# (28,30) R207
KSI6 KSI5/GPIO35 PSCLK2/GPIO4C BT_LED# R206 100K_0402_5%
61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86 BT_LED# (28,30)
KSI7 62 87 TP_CLK Ra 100K_0402_5% Rc
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK (28,29)
KSO0 39 88 TP_DATA VGA@
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA (28,29)
KSO1 40
1
KSO2 KSO1/GPIO21 AD_BID0 SKU_ID
41 KSO2/GPIO22 AD_BID0 (28)
+3VALW KSO3 42 97 3S/4S#
KSO3/GPIO23 SDICS#/GPXOA00 3S/4S# (28,38)
2
KSO4 43 98 65W/90W# 1 1
KSO4/GPIO24 SDICLK/GPXOA01 65W/90W# (28,38)
KSO5 SBPWR_EN R192 C291 R200 C278
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99 SBPWR_EN (22,28,34,40)
2
1
KSO9 KSO8/GPIO28 EC_SI_SPI_SO/FRD#
48 KSO9/GPIO29 SPIDI/RD# 119 EC_SI_SPI_SO/FRD# (28,29)
KSO10 49 120 EC_SO_SPI_SI/FWR#
EC_SO_SPI_SI/FWR# (28,29)
1
1 2 TP_DATA
R236 4.7K_0402_5% PM_SLP_S3# 6 100
(15,28) PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# (15,28)
PM_SLP_S5# 14 101 EC_LID_OUT#
(15,28) PM_SLP_S5#
EC_SMI# 15
PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04
102 EC_ON
EC_LID_OUT# (15,28) 2007/05/10 Modify
(15,28) EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON (28,31)
LID_SW# 16 103
(28,30,33) LID_SW# LID_SW#/GPIO0A EC_SWI#/GPXO06 EC_SWI# (15,28)
SUSP# 17 104 VGA_ON EC_CRY1 EC_CRY2
(23,26,28,34,38) SUSP# SUSP#/GPIO0B ICH_PWROK/GPXO06 VGA_ON (18) (28) EC_CRY1 EC_CRY2 (28)
PBTN_OUT# 18 GPO 105 BKOFF#
(15,28) PBTN_OUT# PBTN_OUT#/GPIO0C BKOFF#/GPXO08 BKOFF# (20,28)
EC_PME# 19 GPIO 106 WL_OFF# 1 1
+5VALW (13,28) EC_PME# EC_PME#/GPIO0D WL_OFF#/GPXO09 WL_OFF# (25,28)
25 107 MEDIA_LED# MEDIA_LED# (28,30)
(6,15,28) EC_THERM# EC_THERM#/GPIO11 GPXO10
4
RP57 FAN_SPEED1 28 108 C556 C555
(4,28) FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11 CALIBRATE (28,38)
1 8 EC_SMB_CK1 BT_ON# 29 18P_0402_50V8J 18P_0402_50V8J
OUT
IN
(28,30) BT_ON# FANFB2/GPIO15 2 2
2 7 EC_SMB_DA1 E51TXD_P80DATA 30
EC_SMB_CK2 E51RXD_P80CLK EC_TX/GPIO16 SKU_ID
3 6 31 EC_RX/GPIO17 PM_SLP_S4#/GPXID1 110 SKU_ID (28)
4 5 EC_SMB_DA2 ON/OFF 32 112 ENBKL ENBKL (12,18,28)
(28,31) ON/OFF ON_OFF/GPIO18 ENBKL/GPXID2
PWR_SUSP_LED EAPD
NC
NC
(28,30) PWR_SUSP_LED 34 PWR_LED#/GPIO19 GPXID3 114 EAPD (28,32)
4.7K_1206_8P4R_5% NUM_LED# 36 GPI 115 SATA_LED# SATA_LED# (14,28)
(28,30) NUM_LED# NUMLED#/GPIO1A GPXID4
116 MXM_THERM# MXM_THERM# (18,28)
3
GPXID5 IDE_5IN1_LED#
GPXID6 117
GPXID7 118 ARCADE# (28,30) +3VS
EC_CRY2 122
EC_CRY1 XCLK1 X3
123 XCLK0 V18R 124
1 32.768KHZ_12.5P_1TJS125DJ2A073
5
AGND
+3VALW
GND
GND
GND
GND
GND
2 5IN1_LED#
P
B 5IN1_LED# (23,28)
@ IDE_5IN1_LED# 4
KB926QFB1_LQFP128_14X14 2 C692 Y IDE_LED#
1
11
24
35
94
113
69
A IDE_LED# (21,28)
G
20mil 0.1U_0402_16V4Z
L32 U38
3
A A
1 2 EC_PME# ECAGND 2 1 NC7SZ08P5X_NL_SC70-5
@ R224 10K_0402_5% FBM-L11-160808-800LMT_0603
Dr-Bios.com
1 2 EC_PME# For KB926 C0 reversion
(11,25,26) MCP_PCIE_WAKE#
R221 0_0402_5% @
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3581P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 401474
Date: Tuesday, November 27, 2007 Sheet 27 of 43
5 4 3 2 1
5 4 3 2 1
+3VALW
KBA[0..19]
KSI[0..7] KBA[0..19]
KSI[0..7] (27,29,30) +EC_VCCA (27) ADB[0..7]
KSO[0..17] ADB[0..7]
KSO[0..17] (27,29,30)
105
127
141
11
26
37
75
U16
1 71 BATT_TEMP
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
(15,27) EC_GA20 GA20/ GPIO00 AD0/GPI38 BATT_TEMP (27,37)
2 72 BATT_OVP
(15,27) EC_KBRST# KBRST#/GPIO01 AD1/GPI39 BATT_OVP (27,38)
(13,23,27) SERIRQ 3 SERIRQ AD2/GPI3A 73 ADP_I (27,38)
D 5 74 AD_BID0 D
(13,14,27) LPC_FRAME# LFRAME# AD3/GPI3B AD_BID0 (27)
LPC_AD3 6
(13,27) LPC_AD3 LAD3 PWR AD INtput or GPI
LPC_AD2 9
(13,27) LPC_AD2 LAD2
LPC_AD1 10 76 DAC_BRIG
(13,27) LPC_AD1 LAD1 DA0/GPO3C DAC_BRIG (20,27)
LPC_AD0 12 78 EN_DFAN1
(13,27) LPC_AD0 LAD0 Host DA1/GPO3D EN_DFAN1 (4,27)
14 79 IREF
(13,27) CLK_PCI_LPC PCICLK INTERFACE DA2/GPO3E IREF (27,38)
(13,27) PLT_RST# 15 PCIRST#/GPIO05 DA3/GPO3F 80 CHGSEL (27,38)
(27) EC_RST# 42 ECRST#
EC_SCI# 24 DA output or GPO
(15,27) EC_SCI# SCI#/GPIO0E
(13,23,27) PM_CLKRUN# 44 CLKRUN#/GPIO1D
25 INVT_PWM
PWM1/GPIO0F INVT_PWM (20,27)
27 BEEP#
PWM2/GPIO10 BEEP# (27,32)
PWM3/GPIO11 29 EC_THERM# (6,15,27)
KSI0 63 38 PWR_SUSP_LED PWR_SUSP_LED (27,30)
KSI1 KSI0/GPIO30 PWM4/GPIO19
64 KSI1/GPIO31 FANPWM1/GPIO12 30 ENCODER_DIR (27,33)
KSI2 65 FAN/PWM 31
KSI0/GPIO32 FANPWM2/GPIO13 ACOFF (27,35,38)
KSI3 66 32 FAN_SPEED1
KSI4 KSI3/GPIO33 FANFB1/GPIO14 BT_ON# FAN_SPEED1 (4,27)
67 KSI4/GPIO34 FANFB2/GPIO15 33 BT_ON# (27,30)
KSI5 68
KSI6 KSI5/GPIO35
69 KSI6/GPIO36
KSI7 70 91 EC_MUTE
KSI7/GPIO37 PSCLK1/GPIO4A EC_MUTE (27,33)
92 USB_EN#
ps2 PSDAT1/GPIO4B USB_EN# (25,26,27)
KSO0 47 93 WL_LED# WL_LED# (27,30)
KSO1 KSO0/GPIO20 interface PSCLK2/GPIO4C BT_LED#
48 KSO1/GPIO21 PSDAT2/GPIO4D 94 BT_LED# (27,30)
KSO2 49 95 TP_CLK
KSO2/GPIO22 PSCLK3/GPIO4E TP_CLK (27,29)
KSO3 50 96 TP_DATA
KSO3/GPIO23 key Matrix PSDAT3/GPIO4F TP_DATA (27,29)
KSO4 51
KSO5 KSO4/GPIO24 scan ADB0 @ R250 1 0_0402_5%
52 KSO5/GPIO25 ADB0/GPXID0/SDIDI 125 2 TV_THERM# (25,27)
KSO6 53 126 ADB1 @ R439 1 2 0_0402_5% SKU_ID
KSO6/GPIO26 ADB1/GPXID1 SKU_ID (27)
C KSO7 54 128 ADB2 @ R257 1 2 0_0402_5% ENBKL ENBKL (12,18,27) C
KSO8 KSO7/GPIO27 Data ADB2/GPXID2 ADB3 @ R251 1 0_0402_5% IDE_LED#
55 KSO8/GPIO28 ADB3/GPXID3 130 2 IDE_LED# (21,27)
KSO9 56 BUS 131 ADB4 @ R258 1 2 0_0402_5% SATA_LED#
KSO9/GPIO29 ADB4/GPXID4 SATA_LED# (14,27)
KSO10 57 132 ADB5 @ R252 1 2 0_0402_5%
KSO10/GPIO2A ADB5/GPXID5 5IN1_LED# (23,27)
KSO11 58 133 ADB6 @ R259 1 2 0_0402_5% EAPD
KSO11/GPIO2B ADB6/GPXID6 EAPD (27,32)
KSO12 59 134 ADB7 @ R253 1 2 0_0402_5%
KSO12/GPIO2C ADB7/GPXID7 ARCADE# (27,30)
KSO13 60 111 KBA0 @ R244 1 2 0_0402_5%
KSO13/GPIO2D KBA0/GPXOA00/SDICS# 3S/4S# (27,38)
KSO14 61 112 KBA1 @ R260 1 2 0_0402_5%
KSO14/GPIO2E KBA1/GPXOA01/SDICLK 65W/90W# (27,38)
KSO15 62 113 KBA2 @ R256 1 2 0_0402_5% SBPWR_EN SBPWR_EN (22,27,34,40)
KSO16 KSO15/GPIO2F KBA2/GPXOA02/SDIDO KBA3 @ R448 1 0_0402_5%
89 KSO16/GPIO48 KBA3/GPXOA03 114 2 EC_RSMRST# (15,27)
KSO17 90 115 KBA4 @ R261 1 2 0_0402_5% EC_LID_OUT#
KSO17/GPIO49 KBA4/GPXOA04 EC_LID_OUT# (15,27)
116 KBA5 @ R246 1 2 0_0402_5% EC_ON
Address KBA5/GPXOA05 EC_ON (27,31)
117 KBA6 @ R262 1 2 0_0402_5%
BUS KBA6/GPXOA06 EC_SWI# (15,27)
EC_SMB_DA2 88 118 KBA7
(6,27) EC_SMB_DA2 SDA2/GPIO47 KBA7/GPXOA07
EC_SMB_CK2 87 119 KBA8 @ R248 1 2 0_0402_5% BKOFF#
(6,27) EC_SMB_CK2 SCL2/GPIO46 SM BUS KBA8/GPXOA08 BKOFF# (20,27)
EC_SMB_DA1 86 120 KBA9 @ R254 1 2 0_0402_5% WL_OFF#
(18,27,29,37) EC_SMB_DA1 SDA1/GPIO45 KBA9/GPXOA09 WL_OFF# (25,27)
EC_SMB_CK1 85 121 KBA10@ R249 1 2 0_0402_5% MEDIA_LED# MEDIA_LED# (27,30)
(18,27,29,37) EC_SMB_CK1 SCL1/GPIO44 KBA10/GPXOA10
122 KBA11@ R255 1 2 0_0402_5%
KBA11/GPXOA11 CALIBRATE (27,38)
123 KBA12
KBA12/GPXOA12 KBA13
KBA13/GPXOA13 124
E51TXD_P80DATA 34 110 KBA14
(25,27) E51TXD_P80DATA GPIO16/E51TXD KBA14/GPXOA14
E51RXD_P80CLK 35 109 KBA15
(25,27) E51RXD_P80CLK GPIO17/E51CLK/E51RXD KBA15/GPXOA15
NUM_LED# 40 108 KBA16
(27,30) NUM_LED# GPIO1A/NUMLED# KBA16/GPXOA16
(27,30,33) BATT_GRN_LED# BATT_GRN_LED# 99 107 KBA17
CAPS_LED# GPIO52/E51CS# KBA17/GPXOA17 KBA18
(27,30) CAPS_LED# 100 GPIO53/CAPSLED# KBA18/GPXOA18 106
(27,30,33) BATT_AMB_LED# BATT_AMB_LED# 101 98 MXM_THERM# MXM_THERM# (18,27)
PWR_LED GPIO54 KBA19/GPIO51/A19
(27,30) PWR_LED 102 GPIO55/SCORLED#
SYSON 104
(26,27,34,40) SYSON GPIO56
GPIO58/SPICLK 142 EC_SPICLK (27,29)
B @ R245 0_0402_5% EC_SI_SPI_SO/FRD# B
2 1 4 GPIO02 RD#/SPIDI 135 EC_SI_SPI_SO/FRD# (27,29)
(15,27) EC_RSMRST# 7 136 EC_SO_SPI_SI/FWR#
GPIO03 WR#/SPIDO EC_SO_SPI_SI/FWR# (27,29)
PM_SLP_S3# 8 144 EC_SPICS#/FSEL#
(15,27) PM_SLP_S3# GPIO04 SPICS# EC_SPICS#/FSEL# (27,29)
16 GPIO06
PM_SLP_S5# 17 36 ON/OFF
(15,27) PM_SLP_S5# GPIO07 GPIO18 ON/OFF (27,31)
EC_SMI# 18 41 @ R433 1 2 0_0402_5% EC_ON
(15,27) EC_SMI# GPIO08 GPIO1B EC_ON (27,31)
19 43 @ R440 1 2 0_0402_5% SBPWR_EN SBPWR_EN (22,27,34,40)
LID_SW# GPIO09 GPIO1C
(27,30,33) LID_SW# 20 GPIO0A GPIO1E 45
SUSP# 21 46
(23,26,27,34,38) SUSP# GPIO0B/ESB_CLK GPIO1F
PBTN_OUT# 22 83
(15,27) PBTN_OUT# GPIO0C/ESB_DAT GPIO42 DPST_PWM (12,20,27)
EC_PME# 23 84
(13,27) EC_PME# GPIO0D SELIO2#/GPIO43 POUT (27,41)
97 FSTCHG
SELIO#/GPIO50 FSTCHG (27,38)
137 MCP_PWRGD
XCLK32K/GPIO57 MCP_PWRGD (6,15,18,27)
EC_CRY2 138 143
(27) EC_CRY2 XCLKI GPIO59 ACIN (15,18,27,37)
EC_CRY1 139
(27) EC_CRY1 XCLKO
81 EC_RCIRRX
CIR_RX/GPIO40 EC_RCIRRX (27)
AGND
82
GND
GND
GND
GND
GND
77
@ 20mil
ECAGND
ECAGND (27)
A A
5
Dr-Bios.com 4
Security Classification
Issued Date 2006/08/18
Compal Secret Data
Deciphered Date 2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3 2
B
Size
Title
Date:
401474
Compal Electronics, Inc.
SCHEMATIC, M/B LA-3581P
Document Number
1
C259 1 2 0.1U_0402_16V4Z
R182
@ 100K_0402_5%
U8
2
8 1 JP6
VCC A0
7 WP A1 2 +5VS 6
(18,27,28,37) EC_SMB_CK1 6 SCL A2 3 5
5 4 TP_DATA TP_DATA
(18,27,28,37) EC_SMB_DA1 SDA GND (27,28) TP_DATA 4
TP_CLK
(27,28) TP_CLK 3
AT24C16AN-10SI-2.7_SO8 TP_CLK
2
1
3
1
ACES_85201-0605
R196 D3
Update Footprint @
100K_0402_5% PSOT24C_SOT23
+5VS
1
TP_DATA C208 1 2 @ 100P_0402_50V8J
0.1U_0402_16V4Z
Update Footprint
+3VALW
C258 1 2 0.1U_0402_16V4Z
KSI[0..7]
1
U10
8
INT_KBD Conn. KSO[0..17]
KSI[0..7] (27,28,30)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
B
Title
Date:
401474
Compal Electronics, Inc.
SCHEMATIC, M/B LA-3581P
Document Number
1
ACES_85201-16051 2
R538
GND
GND
GND
GND
GND
GND
HDA_SDOUT_MDC 0_0402_5%
JP36
1
ACES_88018-124G
13
14
15
16
17
18
2
12 +3VALW R111
11 MEDIA_LED# (27,28) 1
0_0402_5% C155
10 CAPS_LED# (27,28)
1 2 +3VALW 9 NUM_LED# (27,28) 1 C27 @ Connector for MDC Rev1.5
R317 100K_0402_5% ARCADE_BTN# 1U_0402_6.3V4Z 22P_0402_50V8J
2
D17 8 KSO0 2
7 KSO0 (27,28,29)
2 KSI5 1 C137
ARCADE# (27,28) 6 KSI5 (27,28,29) 2
ARCADE_BTN# 1 10P_0402_50V8J
5 LID_SW# (27,28,33)
3 51ON# +3VALW @
51ON# (31,35) 4
3 +5VS 2
DAN202UT106_SC70-3
2
1
ACES_85201-1205
Update Footprint
1 2 WL_LED#
WL_LED# (27,28)
R520 0_0402_5% @
EMI PVT Modify 2007/3/12 WL_R_LED# 1 2 MINI1_LED#
MINI1_LED# (25)
R521 0_0402_5%
1
1 JP12
KSI3 C677 1 2 @ 100P_0402_50V8J R295 C473 C475 1 9
100K_0402_5% BT@ BT@ 0_0402_5% BT@ 1 GND
2 2
KSI4 C678 1 2 @ 100P_0402_50V8J @ 0.1U_0402_16V4Z 1U_0603_10V4Z R290 1 2 USB20_P5_R 3
(14) USB20_P5 3
3
2
S
R291 1 2 USB20_N5_R 4
(14) USB20_N5
2
G
Q37 0_0402_5% BT@ 4
(27,28) BT_ON# 1 2 2 5 5
R292 10K_0402_5% AO3413_SOT23-3 6
(25) WLAN_BT_DATA 6
BT@ D
BT@ 7
(25) WLAN_BT_CLK
1
7
8 8 GND 10
PWR_SUSP_LED# PWR_LED# C474 W=40mils
BT@ +BT_VCC ACES_87213-0800G
0.1U_0402_16V4Z BT@
1
1
C489 C487
BT@ BT@ R296
1
2
S Q47 S Q40
3
1
D
2 Q38 WCM2012F2S-900T04_0805
G 2N7002_SOT23 @
S BT@
3
9/25 Added for EMI
R293 LED1
300_0402_5%
+5VS 1 2 3 YG 1 PWR_LED# PWR_LED# (33)
R436
BT_LED# (27,28)
453_0402_1%
+5VALW 1 2 4 A 2 PWR_SUSP_LED# PWR_SUSP_LED# (33) @
R522
1
10K_0402_5% D
HT-297DQ/GQ_AMB/YG_0603 +BT_VCC 1 2 2 Q52
G 2N7002_SOT23
S @
3
R294 LED2
300_0402_5%
+5VALW 1 2 3 YG 1 BATT_GRN_LED# BATT_GRN_LED# (27,28,33)
R435
453_0402_1% PVT Modify 2007/3/12
+5VALW 1 2 4 A 2 BATT_AMB_LED# BATT_AMB_LED# (27,28,33)
HT-297DQ/GQ_AMB/YG_0603
Dr-Bios.com
Compal Footprint
4
3
2
1
Security Classification
Issued Date 2006/08/18
Compal Secret Data
Deciphered Date 2007/8/18
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
B
Title
Date:
Document Number
401474
Compal Electronics, Inc.
SCHEMATIC, M/B LA-3581P
2
1 2 R213
R534 @ 10K_0603_5%
Bottom Side 100K_0402_5%
1
D7
2 ON/OFF (27,28)
ON/OFFBTN# 1
(30) ON/OFFBTN#
3 51ON#
51ON# (30,35)
DAN202UT106_SC70-3
Update Footprint
1
2
C325 D8
1000P_0402_50V7K RLZ20A_LL34
1
2
1
D
EC_ON 2N7002_SOT23
(27,28) EC_ON 2
G Q24
R195 S
3
10K_0402_5%
Power ON Circuit
1
1
R279
1
R98 47K_0402_5%
1
2
47K_0402_5% 47K_0402_5% MEM_VLD
MEM_VLD (15,40)
2
HT_VLD Q35
HT_VLD (11,15)
2
1
Q11 BSS138_SOT23 D
2
BSS138_SOT23 D
2
2 G
1
0.1U_0402_16V4Z
G S
3
1
Q36
0.1U_0402_16V4Z
S 2
3
2 Q12 1 MMBT3904_SOT23
1
C430
1 MMBT3904_SOT23
1 C454
3
C69
C70 0.1U_0402_16V4Z
3
0.1U_0402_16V4Z
2 2
2 2
NEAR PU10
1
U29
R418 +5VS L45 1 2 4 VIN VOUT 5 40mil +VDDA
10K_0402_5% KC FBM-L11-201209-221LMAT_0805
2
1 1 2 DELAY SENSE or ADJ 6 1 4.85V
L46 1 2 C605 C602 R408
2
KC FBM-L11-201209-221LMAT_0805 7 1 30K_0402_1% C588
10U_0805_10V4Z ERROR CNOISE 10U_0805_10V4Z
1 2
C612 1U_0603_10V4Z 2 2
0.1U_0402_16V4Z 2
8 3 1
1
SD GND
1
C601
1 R428 SI9182DH-AD_MSOP8 1
1
10K_0402_5%
2
R407
2
C611 0.1U_0402_16V4Z 10K_0402_1%
1 2 MONO_IN
2
1U_0603_10V4Z
1
C 1 2
C634 1 R434 Q42
(27,28) BEEP# 2 1 2 2 R427
1U_0603_10V4Z B
560_0402_5% E 2SC2411K_SOT23 2.4K_0402_5%
3
1 2
R517 47K_0402_5%
C617 1 R431
(15) MCP_SPKR 2 1 2
1U_0603_10V4Z
1
560_0402_5%
1 2 D23
R518 47K_0402_5% R432 RB751V_SOD323
10K_0402_5%
HD Audio Codec
2
L47
+AVDD_AC97 MBK1608301YZF_0603
20mil 0.1U_0402_16V4Z +3VS_DVDD 2 1 +3VS
L44 1 2 0.1U_0402_16V4Z 40mil 1 1 1
+VDDA
FBM-L11-160808-800LMT_0603 1 1 1 C607 C609 C610
<BOM Structure> C590 C586
C589 10U_0805_10V4Z
2 10U_0805_10V4Z 2 2 2 2
25
38
9
2 2 2 U30
0.1U_0402_16V4Z 0.1U_0402_16V4Z
DVDD
AVDD1
AVDD2
DVDD_IO
14 35 HP_LEFT
NC LINE_OUT_L HP_LEFT (33)
PVT Modify 2007/3/12 15 36 HP_RIGHT
NC LINE_OUT_R HP_RIGHT (33)
1 2 MIC2_C_L 16 39 AMP_LEFT
MIC2_L HP_OUT_L AMP_LEFT (33)
C597 4.7U_0805_6.3V6K
1 2 MIC2_C_R 17 41 AMP_RIGHT
(33) INT_MIC_R MIC2_R HP_OUT_R AMP_RIGHT (33)
C594 4.7U_0805_6.3V6K
LINE_L 1 2 LINE_C_L 23 45
(33) LINE_L LINE1_L NC
C583 4.7U_0805_6.3V6K
LINE_R 1 2 LINE_C_R 24 46
(33) LINE_R LINE1_R DMIC_CLK
C582 4.7U_0805_6.3V6K
18 CD_L NC 43
20 44 C608 22P_0402_50V8J
CD_R NC R424 1 2 0_0402_5% 1 2
19 CD_GND
BIT_CLK 6 HDA_BITCLK_AUDIO (14)
MIC1_L 1 2 MIC1_C_L 21
(33) MIC1_L MIC1_L
C587 4.7U_0805_6.3V6K
MIC1_R MIC1_C_R R421 1 2 33_0402_5%
(33) MIC1_R
C584
1 2 22
4.7U_0805_6.3V6K MIC1_R SDATA_IN 8 HDA_SDIN0 (14) EMI Added 2007/4/12
MONO_IN 12 37
PCBEEP MONO_OUT WOOFER_MONO (33)
+3VS
LINE1_VREFO 29
(14) HDA_RST_AUDIO# 11 RESET#
3 C687 1000P_0402_50V7K 3
GPIO1 31
(14) HDA_SYNC_AUDIO 10 SYNC 10mil 1 2
MIC1_VREFO_L 28 MIC1_VREFO_L
(14) HDA_SDOUT_AUDIO 5 C688 1000P_0402_50V7K
SDATA_OUT
MIC1_VREFO_R 32 MIC1_VREFO_R 1 2
2 GPIO0 +5VS
3 GPIO3 MIC2_VREFO 30 MIC2_VREFO
R415 2 1 5.1K_0402_1% SENSE_A 13
(33) HP_PLUG# SENSE A
34 27 CODEC_VREF 10mil C689 1000P_0402_50V7K
R419 1 SENSE B VREF
(33) LINEIN_PLUG# 2 10K_0402_1% 1 1 2
R413 2 1 20K_0402_1% (27,28) EAPD EAPD 47 40
(33) MIC_PLUG# EAPD JDREF C585 C690 1000P_0402_50V7K
1
(33) SPDIF 1 2SPDIF_R 48 SPDIFO NC 33 10U_0805_10V4Z 1 2
FBM-L11-160808-800LMT_0603 R409 2
L53 4 26 20K_0402_1%
DVSS1 AVSS1
1 7 DVSS2 AVSS2 42
2
C387 ALC268-GR_LQFP48_9X9
Sense Pin Impedance Codec Signals 22P_0402_50V8J
1
R404
2
0_0805_5%
2
39.2K PORT-A (PIN 39, 41) DGND AGND
1 2
R406 0_0805_5%
20K PORT-B (PIN 21, 22)
SENSE A
1 2
10K PORT-C (PIN 23, 24) R405 0_0805_5%
Dr-Bios.com
20K PORT-F (PIN 16, 17)
SENSE B
10K PORT-G (PIN 43, 44)
Security Classification Compal Secret Data Compal Electronics, Inc.
5.1K PORT-H (PIN 45, 46) Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3581P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401474
Date: Tuesday, November 27, 2007 Sheet 32 of 43
A B C D E F G H
A B C D E
11
19
20
10
1
1 2 AMP_LEFT_C-1 1 2 AMP_LEFT_C U31
(32) AMP_LEFT C599 C600 1U_0603_10V4Z 3
CVDD
HVDD
PVDD
PVDD
VDD
G1
1
0.47U_0603_16V4Z 20mil 4
R414 R416 G2
ACES_88266-02001
560_0402_5% 560_0402_5% 3 22 SPKR+
INR_A ROUT+ SPKR-
5 21
2
INL_A ROUT- +5VAMP
R423 1 2 100K_0402_5% 27 8 SPKL+ +5VAMP MP Modify 2007/4/12
/AMP EN LOUT+ SPKL-
LOUT- 9
R417 1 2 100K_0402_5% 24 HP_PLUG#
Gain= 14dB +5VAMP HP EN
2
C596 2.2U_0805_10V6K 17 HPOUT_R
HP_R
1
HP_RIGHT 2 1 HP_RIGHT_C 1 2 HP_RIGHT_R 4 18 HPOUT_L R549
(32) HP_RIGHT C593 2.2U_0805_10V6K R412 39K_0402_5% HP_LEFT_R INR_H HP_L R468
6 INL_H 100K_0402_5%
1
+5VAMP HP_LEFT HP_LEFT_C 100K_0402_5% D
(32) HP_LEFT 2 1 1 2
R410 39K_0402_5% VOL_AMP 26 2
1 1
/SD G
15
2
CVSS
1
3
S D Q60
28 S
3
R422 BEEP G
SPDIF_PLUG#
VSS 16 2 2
30K_0402_5% 1 12 1 G 2N7002_SOT23
CP+ C591 Q43 Q61
14 2 D S
3
C592 CP- GND AO3413_SOT23-3 2N7002_SOT23
23 1U_0603_10V4Z
2
PGND
1U_0603_10V4Z 25 BIAS PGND 7 +5VSPDIF
VOL_AMP 2 2
13
C680
0.01U_0402_16V7K C598
1
CGND
GND 29 20mil S/PDIF Out JACK
1
D APA2057A_TSSOP28
R420
100K_0402_1%
1
G
2 EC_MUTE 2.2U_0805_10V6K
2
LINE Out/Headphone Out
S Q53 PVT Modify 2007/3/12 @
3
2 2N7002_SOT23 R5641
2 2 2 0_0402_5% HP_PLUG# (32)
2
2 C468 2
PVT Modify 2007/3/12 C467 R565 1 20_0402_5%
330P_0402_50V7K
1 1 330P_0402_50V7K JP31
R285 51_0402_1% HPP_PLUG# 1
HPOUT_L 1 2 HPOUT_L_1 1 2 HPOUT_L_2 2
R284 51_0402_1% L36 FBM-11-160808-700T_0603 6
+5VSPDIF Int MIC Conn. HPOUT_R 1 2 HPOUT_R_1 1
L35
2 HPOUT_R_2
FBM-11-160808-700T_0603
3
1
HPOUT_L_2 3 4
HPOUT_R_2 3 4 SPDIF R106 C460
5 5 6 6 9
7 8 +5VAMP 2.2K_0402_5%
LINE_R_R 7 8 SPDIF_PLUG# 2 SINGA_2SJ-E373-T01
9 9 10 10
LINE_L_R 11 12 HPP_PLUG# JP4 100P_0402_50V8J
2
11 12 LINEIN_PLUG# MIC_R 1
13 13 14 14 C621
1 1 2 INT_MIC_R INT_MIC_R (32)
MIC2_R_1 15 16 MIC_PLUG# 2 L57 1 2MBK1608121YZF_0603
MIC2_L_1 15 16 0.1U_0402_16V4Z 2 L58 MBK1608121YZF_0603 JP33
17 17 18 18
BATT_GRN_LED#
1
C65
15mil
+5VAMP 19 19 20 20 BATT_GRN_LED# (27,28,30) 8
21 22 BATT_AMB_LED# BATT_AMB_LED# (27,28,30) 3 7
(32) WOOFER_MONO 21 22 PWR_LED# G1 220P_0402_50V7K
23 23 24 24 PWR_LED# (30) G2 4
EC_MUTE PWR_SUSP_LED# 2
(27,28) EC_MUTE 25 25 26 26 PWR_SUSP_LED# (30)
27 28 +3VALW ACES_88266-02001 LINEIN_PLUG# 5
+3VALW 27 28 LID_SW# (27,28,30) (32) LINEIN_PLUG#
29 29 30 30 +5VALW 15mil
4
31 32 S/PDIF Jack C620 L51 FBM-11-160808-700T_0603
GNDGND LINE_R LINE_R_R
(32) LINE_R 1 2 3
3
ACES_88107-30001
LINE-IN Jack 0.1U_0402_16V4Z 6 3
3 220P_0402_50V7K 220P_0402_50V7K
2 2
+3VS @ (HDA Jack)
PSOT24C-LF-T7_SOT23-3
+3VS D28
1
R403 JP32
100K_0402_5% MIC1_VREFO_L MIC1_VREFO_R 8
1
C557 7
4
1
10K_0402_5% 10K_0402_5%
GND
NC
2
2
G
2 MIC2_R_1
(32) MIC1_R 1 2 FBM-11-160808-700T_0603 3
1 U28 NC7SZ14P5X_NL_SC70-5 U27 L49 6
3
COM MIC2_L_1
1 CD1# VCC 14 (32) MIC1_L 1 2 FBM-11-160808-700T_0603 2
2 13 L50 1
D1 CD2#
B 3 1 2 3 CP1 D2 12 <BOM Structure> 1 1
R399 10K_0402_5% 4 11 C558 SINGA_2SJ-E351-S01
SD1# CP2
0.1U_0402_16V4Z
5 10 C616 C615
1 1
MIC JACK
GND
Q1 SD2#
0.01U_0402_16V7K
0.01U_0402_16V7K
2 2 TC74LCX74FT_TSSOP14
4 2 4
Dr-Bios.com
SW1
ENCODER_DIR (27,28)
XRE094PHDINB1-2-12-E-7016_3P
ENCODER_PULSE (27,28)
Volume Control Circuit Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3581P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401474
Date: Tuesday, November 27, 2007 Sheet 33 of 43
A B C D E
A B C D E
+5VALW
+1.2VALW TO +1.2V_HT
+3VALW TO +3VS
2
+1.2V_HT R39
+3VS 10K_0402_5%
+1.2V_HT
1
1 1 +3VS 1 1
2
+3VALW C15 C21 C33 C32 VLDT_EN#
R42
2
U1 10U_0805_10V4Z 1U_0603_10V4Z +1.2VALW 1U_0603_10V4Z 10U_0805_10V4Z 470_0402_5%
1
2 2 R22 2 2 D
8 D S 1
1 7 2 R21 470_0402_5% U2 2 1
(15) VLDT_EN
1
D S 100K_0402_5% G
6 D S 3 8 D S 1
1
5 4 2 1 5VS_GATE 1 2 +VSB 7 2 R326 Q8 S
3
D G D S
1
R28 20K_0402_1% 100K_0402_5% D
6 D S 3
SI4800BDY_SO8 5 4 1.2VHT_GATE 1 2 +VSB 2VLDT_EN# R31 2N7002_SOT23
D G
1
D G 100K_0402_5%
1
1 2 SUSP 1 SI4800BDY_SO8 S Q7
2
2
1
C19 R20 D G C49 R330 D 2N7002_SOT23
C24 @ 1M_0402_1% 2 SUSP S Q6 C505 @ 1M_0402_1% 2 VLDT_EN#
3
10U_0805_10V4Z 0.1U_0603_25V7K G 2N7002_SOT23 10U_0805_10V4Z 0.1U_0603_25V7K G
1
1
2 S Q5 2 S Q41
3
2N7002_SOT23 2N7002_SOT23
+5VALW
2
R273
10K_0402_5%
1
SUSP
(39) SUSP
1
+1.2VS D
U19
8 1 U24 2
D S 2 (23,26,27,28,38) SUSP#
7 2 8 1 +1.2VS G
D S D S
1
6 3 1 1 R267 7 2 Q34 S
3
D S C401 C400 470_0402_5% D S R109
5 D G 4 6 D S 3
2 5 4 1 1 470_0402_5% R272 2N7002_SOT23 2
SI4800BDY_SO8 4.7U_0805_10V4Z 1U_0603_10V4Z D G C521 C517 100K_0402_5%
1
1
2 2 SI4856ADY-T1-E3_SO8
2
C419 1 10U_0805_10V4Z 1U_0603_10V4Z
1
4.7U_0805_10V4Z D C158 2 2
1
2 D
2 SUSP
G 22U_0805_6.3V6M 2 SUSP
5VS_GATE S Q32 2 G
3
3
2N7002_SOT23
2
1 2 R363 5VS_GATE
2
C423 60.4K_0402_1%
0.1U_0603_25V7K R227
1
2
10K_0402_5%
C515
0.1U_0603_25V7K
1
SYSON#
(39) SYSON#
1
D
SYSON 2
(26,27,28,40) SYSON
G
1
Q25 S
+1.8V TO +1.8VS +3VALW TO +3V_SB(MCP67 AUX Power)
3
R223 2N7002_SOT23
+3VALW +3V 100K_0402_5%
+1.8V
2
+1.8VS U35
U17 8 1
3 D S 3
8 D S 1 +1.8VS 7 D S 2
2
2
7 D S 2 6 D S 3 1 1
6 3 R264 1 5 4 C638 C636 R446
D S 470_0402_5% C637 D G 470_0603_5%
5 D G 4 1 1
C391 C390 SI4800BDY_SO8 10U_0805_10V4Z
SI4856ADY-T1-E3_SO8 2 2
1U_0603_10V4Z
1
1
4.7U_0805_10V4Z 1U_0603_10V4Z 2
10U_0805_10V4Z +5VALW
1 2 2
1
1
C395 D D
2
4.7U_0805_10V4Z 2 SUSP 2 SBPWR_EN#
2 G G R457
S Q31 +VSB 2 1 3V_GATE S Q48 10K_0402_5%
3
3
2N7002_SOT23 R447 2N7002_SOT23
1 2 R266 5VS_GATE 200K_0402_5% 1
1
60.4K_0402_1% C639
1
D
2
1
D
(22,27,28,40) SBPWR_EN 2
G
Q51 S
3
1
2N7002_SOT23
+2.5VS +1.5VS +0.9V +1.8V R458
100K_0402_5%
2
2
4 4
R180 R131 R153 R185
470_0402_5% 470_0402_5% 470_0402_5% @ 470_0402_5%
Dr-Bios.com
1
D D D D
2 SUSP 2 SUSP 2 SYSON# 2 SYSON# Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
G G G G SCHEMATIC, M/B LA-3581P
S Q22 S Q17 S Q20 S Q23 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3
2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 @ 2N7002_SOT23 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 34 of 43
A B C D E
A B C D
PJP1
G2 6
PL1
5 ADPIN VIN
G1 FBMA-L18-453215-900LMA90T_1812
1 2
1
4 4
PR1
10_1206_5%
560P_0402_50V7K
12P_0402_50V8J
1 3 PR2 1
3
560P_0402_50V7K
12P_0402_50V8J
1K_1206_5%
1 2
1
1
PC1
1 2
PC2
PC3
PC4
2 2
PD1
2
RLZ24B_LL34 PR3
1 VIN PD2 1K_1206_5% PQ1
1
2 1 1 2 3 TP0610K-T1-E3_SOT23-3
1
B+
2
RLS4148_LLDS2 PR4
E&T_4510-E04C-01R 1K_1206_5%
1 2
100K_0402_5%
100K_0402_5%
1
1
PR5
PR7
PR6
1K_1206_5%
2
1 2
2
VIN
2
PD3
1
PR8
1
PD4 100K_0402_5%
RB751V-40TE17_SOD323-2 RLS4148_LLDS2 PQ2
1 1
2 1 DTC115EUA_SC70-3
1 2
BATT+
2 PR9 (27,28,38) ACOFF 2 2
33_1206_5% VS PQ3
DTC115EUA_SC70-3
PQ4 2 2
3
CHGRTCP 3 TP0610K-T1-E3_SOT23-3
1
0.22U_1206_25V7K
1
3
1
PR10
PC5
100K_0402_5% PC6
0.1U_0603_25V7K
2
PR11
B+
2
22K_0402_5% PR12
(30,31) 51ON# 1 2 VL 2.2M_0402_5%
2 1
1
VS PR13
499K_0402_1%
1
1
PR14
2
RTCVREF PR15 100K_0402_1%
200_0805_5% PU2A
3.3V LM393DR_SO8
8
PU1 G920AT24U_SOT89-3 (6,36,37) MAINPWON PD5
2
PR16 PR17 2 3
P
3 3
+
1 2 1 2 3 OUT IN 2 1 1 O
0.01U_0402_25V7K
+CHGRTC (38) ACON 3 2
-
1
1
560_0603_5% 560_0603_5%
4.7U_0805_6.3V6K
1
1
GND
1000P_0402_50V7K
32.4
PC8
PC9
PC7 RB715F_SOT323-3 PR18
4
1
1
1U_0805_25V4Z 191K_0402_1%
2
PC11
PC10 PR19
2
2
0.1U_0603_25V7K
PRG++ 2
2
499K_0402_1%
ACIN
PR20 PR21
Precharge detector
1
34K_0402_1% D 47K_0402_5%
Min. typ. Max. 2 1 2PQ5 2 1
RTCVREF G RHU002N06_SOT323-3 PACIN (37,38)
1
H-->L 14.589V 14.84V 15.243V S
3
PQ6
1
DTC115EUA_SC70-3
L-->H 15.562V 15.97V 16.388V @ PR22
66.5K_0402_1% 2 +5VALW
BATT ONLY
2
Precharge detector
3
Min. typ. Max.
4
H-->L 6.138V 6.214V 6.359V 4
A
Dr-Bios.com B
Security Classification
Issued Date 2006/09/01
Compal Secret Data
Deciphered Date
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2007/09/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
B
Title
Date:
Compal Electronics, Inc.
Document Number
SCHEMATIC, M/B LA-3581P
401474
Tuesday, November 27, 2007
D
Sheet 35 of 43
Rev
C
A B C D
MAX8744_B+ MAX8744_B+
B+
PL2
FBMA-L18-453215-900LMA90T_1812
1 2
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
1
1
1
PC13
PC12
PC16
SI4800BDY-T1-E3_SO8
8
7
6
5
5
6
7
8
PC14
PC15
1 1
D
D
D
D
D
D
D
D
2
2
PQ8
PQ7
SI4800BDY-T1-E3_SO8
G
S
S
S
S
S
S
1
2
3
4
4
3
2
1
MAX8744ETJ+_TQFN32_5X5
PL3
S COIL 8.2UH +-20% MPL73-8R2 4A PU3 PC17
1 2 1U_1206_25V7K
+3VALWP
PQ9
33 21 1 2 @
EP IN
4.7_1206_5%
PR176
SI4810BDY-T1-E3_SO8
2
5
6
7
8
2.21K_0402_1%
PR177
DH3 25 16 DH5
DH3 DH5
D 8
D 7
D 6
D 5
PR23
PR24 PR25
SI4810BDY-T1-E3_SO8
D
D
D
D
PQ10
6.81K_0402_1%
330U_D3L_6.3VM_R25M
4.7_1206_5%
PC137
1 2.2_0402_5% 2.2_0402_5%
2
A2 modify
PR26
4 G
3 S
2 S
1 S
+ 2.21K_0402_1%
4 G
1
1 S
2 S
3 S
680P_0402_50V7K
PC18
PC138
PR28 0.1U_0603_25V7K 0.1U_0603_25V7K 2 1
1
680P_0402_50V7K
825_0402_1% LX3 24 17 LX5 @
1
LX3 LX5
1
2
2 1 A2 modify
0.22U_0603_16V7K
2
825_0402_1%
DL3 23 18
2
DL3 DL5
PL4
1 2
PR29
2
10K_0402_1%
PC22
PC21 19
PGND
PR30
2 0.22U_0603_16V7K CSH3 29 2
1
CSH3
1
@ PC93
1
28 12 CSH5
CSL3 CSH5
1
0.1U_0603_25V7K CSL3 @ PC97
1
2
13 CSL5
FB3 CSL5 0.1U_0603_25V7K
30 +5VALWP
2
FB3
2VREF_8744
15.4K_0402_1%
PC23
2
1000P_0402_50V7K 1 2 7 11 FB5 PC25
REF FB5
PR31
2 PC24 0.22U_0603_16V7K VL PC26 1000P_0402_50V7K
150U_D2_6.3VM
2 DRVA LDO5 20 1 2
1
4.7U_0805_6.3V6K 1
10 2 1 2VREF_8744
SKIP +
PC27
32 OUTA
2
@ PR32 0_0402_5%
10K_0402_1%
PR33
PGOODA 22 1 2
2
A3 modify 31 FBA
PR34 PR70 0_0402_5%
100K_0402_5% 27
1
PGOOD3 SPOK (37,40)
VS 1 21 2 4 SHDN
2
200K_0402_5%
PGOOD5 14
2
PR35
PZD1 PC28 6
RLZ5.1B_LL34 ON5 PR36
0.22U_0603_10V7K 3 ILM 2 12VREF_8744
1
ILIM
FSEL
5
GND
ONA
1
ON3
499K_0402_1%
0_0402_5%
+3VALWP Ipeak = 8.57A; Imax = 6A
PR37
3 3
0_0402_5%
@ PR38
8
0_0402_5%
+5VALWP Ipeak = 7.49A ; Imax = 5.3A
PR39
DCR = 68m ohm(max) ; Rcs = 16.04m ohm <BOM Structure>
1
2
0_0402_5%
2VREF_8744
1
PR40
@
DCR = 64m ohm(typical) ; Rcs = 15.06m ohm 1 2
PR41
DCR = 64m ohm(typical) ; Rcs = 15.06m ohm
1
@ 47K_0402_5%
Ilimit = 185mV/16.04m ~ 215mV/15.06m
= 11.53A ~ 14.28A Ilimit = 185mV/16.04m ~ 215mV/15.06m
1
Dr-Bios.com
ON3 = REF --->3.3V starts up delay 2ms after 5V starts up
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/09/01 Deciphered Date 2007/09/01 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3581P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 36 of 43
A B C D
A B C D
BATT++ PL7
HCB4532KF-800T90_1812 BATT+
1 2
PH1 under CPU botten side :
CPU thermal protection at 90 degree C
1
PC57 PC56
Recovery at 70 degree C
1000P_0603_50V7K 0.01U_0402_25V7K
2
1 SUYIN_200275MR007G161ZL VL 1
VS VL
PJP2
2
2
1
TSA PC58 PR76 PR73
3 EC_SMC1 0.1U_0603_25V7K 442K_0603_1% 150K_0402_1%
4 EC_SMD1 PR75 1 2
2
5 9.76K_0402_1%
1
6
2
7 PR77
8
100_0603_1%
82.5K_0603_1%
1 2 5
P
+
1
7 MAINPWON (6,35,36)
O
PR78
100K_0603_1%_TH11-4H104FT
TM_REF1 6 -
G
PU2B
1
LM393DR_SO8
4
PJP2 battery connector
2
1
100_0603_1%
PH1
SMART
PR79
1U_0805_16V7K
PR80
2
1
1
PC60
1 2 PC59 PR81
Battery: +3VALWP
1000P_0402_50V7K 150K_0402_1%
2
1.BATT+
6.49K_0603_1% 2 1 VL
2
2.BATT+
1
PR82
1K_0603_1%
3.TS
1
4.SMC PR83
5.SMD
2 2
2
150K_0402_1%
6.GND
7.GND
2
BATT_TEMP (27,28)
EC_SMB_CK1 (18,27,28,29)
EC_SMB_DA1 (18,27,28,29)
PR84
1M_0402_1%
1 2
VIN VIN
PR86
1
10K_0402_5% PR87
PR85 VS 10K_0402_5%
84.5K_0402_1% 1 2 ACIN
ACIN (15,18,27,28)
PR88
2
8
22K_0402_5% PU6A
1 2 3
P
3 3
+ PACIN
O 1 PACIN (35,38)
20K_0402_1%
2 -
G
1
1
PR89
PC61 LM393DR_SO8
4
1000P_0402_50V7K PC62 PZD2 PR90
0.1U_0603_25V7K RLZ4.3B_LL34 10K_0402_5%
2
PQ25
2
B+ 3 TP0610K-T1-E3_SOT23-3
1 +VSBP
2
PR92
1
10K_0402_5%
1
PR91 2 1 RTCVREF
100K_0402_5% PC63 PC64
0.22U_1206_25V7K 0.1U_0603_25V7K
2
PR93
2
22K_0402_5%
VL 1 2
8
PU6B
5
P
+
2
7
PR94 Vin Detector 6
O
-
G
100K_0402_5%
Min. typ. Max. LM393DR_SO8
4
PR95
H-->L 16.976V 17.257V 17.728V
1
0_0402_5% D
1 2 2 PQ26
(36,40) SPOK G RHU002N06_SOT323-3 L-->H 17.430V 17.901V 18.384V
S
3
1
4 4
PC65
0.1U_0603_25V7K
Dr-Bios.com
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3581P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 37 of 43
A B C D
A B C D
Iada=0~4.74A(90W)
ADP_I = 19.9*Iadapter*Rsense CP = 85%*Iada ; CP = 4.07A
PQ11 P2 PQ12
AO4407_SO8 AO4407_SO8 P3
PR42
0.02_2512_1%
B+ PL5
CHG_B+
PQ13
AO4407_SO8
VIN 8 1 1 8 FBMA-L18-453215-900LMA90T_1812 1 8
7 2 2 7 1 4 1 2 2 7
6 3 3 6 3 6
5 5 2 3 CSIN 5
1 1
2200P_0402_25V7K
10U_1206_25V6M
10U_1206_25V6M
0.1U_0603_25V7K
CSIP
4
1
1
PC31
PC32
PQ43 TP0610K-T1-E3_SOT23-3
1
5600P_0402_25V7K
PC33
PC34
PR45
A3 modify
0.1U_0603_25V7K
PR43 P3 3 1 DCIN 47K_0402_1%
2
1
2
47K_0402_1% PR44 1 2 VIN
1
100K_0402_1%
PC35
PC36
200K_0402_1%
PQ44
2
1
PR167
DTC115EUA_SC70-3
2
PD6
PD15 PR46 1 2
2
ACOFF (27,28,35)
3
2
PQ14 2 1 2 1 1SS355_SOD323-2
DTA144EUA_SC70-3 3
1
PD14 1SS355TE-17_SOD323-2 6251VDD 100K_0402_1% 28.2
2 PR47
SUSP# (23,26,27,28,34)
2.2U_0603_6.3V6K
1 2 RB715F_SOT323-3
PC38
1 2 VIN
3
1
A3 modify
1
2 PR48 1 PU4
(27,28) FSTCHG 200K_0402_1%
1
10K_0402_5% PQ15
1
2
PQ16 1 2 1 24 DCIN DTC115EUA_SC70-3
VDD DCIN
1
100K_0402_1%
DTC115EUA_SC70-3 6251VDD 1 2 PC132 PC37 PD8
0.1U_0402_16V7K 0.1U_0603_25V7K 2 1 2
PR50
2 PR49 2 23
2
47K_0402_5% PQ17 ACSET ACPRN 1SS355_SOD323-2
1
DTC115EUA_SC70-3 PR172 20_0603_5% D
1
0.1U_0603_25V7K
6251_EN 3 22 1 2 CSON 2 PACIN
3
EN CSON
1
2
D
PC40
2 @ PC42
@PC42 PC41 G PQ18
(27,28) 3S/4S#
3
5
6
7
8
2 PQ19 PR51 680P_0402_50V7K 0.047U_0603_16V7K S RHU002N06_SOT323-3
3
G RHU002N06_SOT323-3 150K_0402_1% CSON 1 2 4 21 1 2 CSOP
D
D
D
D
1
CELLS CSOP PR52 20_0603_5% PQ20
S
3
2
SI4800BDY-T1-E3_SO8 2
2
3
1 2 5 ICOMP CSIN 20 2 1
G
S
S
S
PC43 6800P_0402_25V7K PR53 20_0603_5%
PC45
4
3
2
1
1 2 1 PR54 2 6 19 PC44 1 2
1
10K_0402_1% VCOMP CSIP 0.1U_0603_25V7K PR173 2.2_0603_5% PL6
0.01U_0402_25V7K 1 2 10UH_PCMB104T-100MS_6A_20% BATT+
PR57 PC46 1 PR55 2 7 18 LX_CHG 1 2 CHG 1 4
ICM PHASE
1
SI4800BDY-T1-E3_SO8
PACIN 1 2 2 PQ21 2 3
(35,37) PACIN
1
G RHU002N06_SOT323-3
(27,28) ADP_I 6251VREF 8 17 DH_CHG 28.2
PC47 VREF UGATE PR175 PR56
S
3
5
6
7
8
PQ22
PR59 1 2 PR58 PC48 4.7_1206_5% 0.02_2512_1%
10U_1206_25V6M
10U_1206_25V6M
80.6K_0402_1% 9 16 BST_CHG 1 2 BST_CHGA 2 1 @
D
D
D
D
CHLIM BOOT
1
ACON 2 1 0.1U_0603_25V7K 2.2_0603_5% 0.1U_0603_25V7K
(35) ACON
2
(27,28) IREF
1
PC49
PC50
PD9
0.01U_0402_25V7K
1
G
S
S
S
2
1
PC51
4
3
2
1
DTC115EUA_SC70-3 100K_0402_1% 11 14 DL_CHG 4.7_0603_5% 680P_0402_50V7K
2
VADJ LGATE
2
PR62 @
2
2
2
1
GND PGND 4.7U_0805_6.3V6K
PR64
274K_0402_1% ISL6251AHAZ-T_QSOP24
3
6251VREF
D
3 1 1 2
1
PQ24
G
2
PR65 SI2301BDS-T1-E3_SOT23-3
1
3
100K_0402_1% 3
PR169
CP mode 274K_0402_1%
OVP voltage :
2
6251VREF
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05) A3 modify LI-4S :18.0V--BATT-OVP=2.677V
2
1
where Vaclm=1.502V, Iinput=4.07A VS BATT+
PR170 BATT-OVP=0.1487*BATT+
1
D 100K_0402_1% 6251_EN
2 PQ45 @ LI-3S :13.50V--BATT-OVP=2.007V
(27,28) Calibrate
1
(27,28) CHGSEL G RHU002N06_SOT323-3 C @
CC=0.6~4.48A S 2 2 PQ46 PR66 BATT-OVP=0.1487*BATT+
3
0.01U_0402_25V7K
@ B 2SC2411K_SOT23-3 845K_0603_1%
0.01U_0402_25V7K
3
1
1
PC133
IREF=0.7224*Icharge
2
1
PC53
@
2
1
PR171 PR60
IREF=0.43V~3.24V
2
CSON 20K_0402_1% PR67 6251VREF 1 2 6251aclim
2
300K_0603_0.1%
11.5K_0402_1%
8
PR68 PU5A
1
2.37K_0402_1%
PR63 UMA@
Charging Voltage VS 10K_0402_5% 3
P
+ PR174
1 2 1
BATT Type 3S/4S# CHGSEL CV mode 0 20K_0402_1%
(0x15) (27,28) BATT_OVP - 2
G
0.01U_0402_25V7K
8
1
PU5B LM358ADR_SO8
2
1
1
PC54
5 PR69 PC55
2800mAH 4S pack 17400mV LOW LOW 17.20V
P
+ 200K_0402_1% 0.01U_0402_25V7K
7 0
1
UMA@ D
6
2
2
-
G
2
LM358ADR_SO8 (27,28) 65W/90W# G
2800mAH 3S pack 13050mV HIGH LOW 12.90V
4
PQ47 S
3
4
RHU002N06_SOT323-3 4
Dr-Bios.com
Normal 4S LI-ON Cells 16800mV LOW HIGH 16.80V
+3VALW
1
PJP3
1
JUMP_43X118
+1.8V
2
2
1
2
10U_0805_6.3V6M
PJP4
PC66
D JUMP_43X118 D
+5VALW
1
2
RTCVREF
+1.8V
2
PU8
PU7 CM8562IS_PSOP8
1 6
VIN VCNTL +3VALW 1 8
VIN PGND
2 GND NC 5
1
1
2
1U_0603_16V6K
PC67 3 7 PC68 2 7
REFEN NC +2.5VSP VFB AGND
PC69
10U_0805_6.3V6M 1U_0603_6.3V6M
2
PR96 4 8
1
1K_0402_1% VOUT NC
3 VTT VCCA 6
10_0603_1%
9
2
GND
AGND
RT9173DPSP_SO8 4 5
VTT REFEN
PR97
2 1
1K_0402_1%
0.1U_0603_25V7K
PR99 PC70
9
+0.9VP
1
2
0_0402_5% D 22U_1206_10V6M PR98
2
1
200K_0402_1%
PR100
PC71
1 2 2 60.4K_0402_1%
2
(34) SYSON#
0.1U_0603_25V7K
G
PR101
PQ27 S PC72 PC73
3
PC74
22U_1206_10V6M 0.047U_0402_16V7K
2
1
RHU002N06_SOT323-3
1
D
2PQ28 1 2
G RHU002N06_SOT323-3 SUSP (34)
C S PR102 C
3
0_0402_5%
+1.8V
JUMP_43X118 JUMP_43X118
1 2 1 2
+3VALWP 1 2
+3VALW +1.8VP 1 2
+1.8V
1
PJP5 PJP6 PJP7
1
JUMP_43X118
2
JUMP_43X118 JUMP_43X118
2
10U_0805_6.3V6M
1 2 1 2
+5VALWP 1 2
+5VALW +2.5VSP 1 2
+2.5VS
PC75
PJP8 PJP9
1
+5VALW
RTCVREF
JUMP_43X118 JUMP_43X118 PU9
CM8562IS_PSOP8
1 2 1 2
+1.2VALWP 1 2
+1.2VALW +1.5VSP 1 2
+1.5VS 1 VIN PGND 8
PJP10 PJP11
2 VFB AGND 7
2
1U_0603_16V6K
JUMP_43X118 JUMP_43X118
+1.5VSP
PC76
B B
1 2 1 2 3 6
1
+0.9VP 1 2
+0.9V +VSBP 1 2
+VSB VTT VCCA
AGND
10_0603_1%
PJP12 PJP13
1
4 VTT REFEN 5
PR103
2 1
9
PC77
2
22U_1206_10V6M PR104
51K_0402_1%
60.4K_0402_1%
2
0.1U_0603_25V7K
1
PR105
PC78
PC79
0.047U_0402_16V7K
1
1
1
D
2PQ29 1 2
G RHU002N06_SOT323-3 SUSP (34)
S PR106
3
0_0402_5%
A A
5
Dr-Bios.com 4
Security Classification
Issued Date 2006/09/01
Compal Secret Data
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Size Document Number
Custom
Date:
2
2007/09/01
401474
Tuesday, November 27, 2007
Title
Compal Electronics, Inc.
SCHEMATIC, M/B LA-3581P
1
Sheet 39 of 43
Rev
C
5 4 3 2 1
+5VALW
D D
1
PC80 PR107 PR108
2.2U_0603_6.3V6K 10_0603_5% 10_0603_5% PD13
2
CHP202UPT_SOT323-3
B+
2
VCCA_1.8 VCCA_1.2
SC413_B+
3
1
1
1U_0603_10V6K
1U_0603_10V6K
PL8 +3VALW
PC81
PC82
1 2 BST_1.8V-1 BST_1.2V-1
2
4.7U_1206_25V6K
FBMA-L11-322513-151LMA50T_1210
1
4.7U_1206_25V6K
@
PR109
1
100K_0402_5%
8
7
6
5
PC83
PC84
PU10
PQ30
D
D
D
D
2
2
SI4800BDY-T1-E3_SO8 1 28 @ PR166
PGND1 VSSA1 0_0402_5%
DL_1.8V 2 27 1 2
G DL1 PGD1 MEM_VLD (15,31)
S
S
S
PC85
PR110
Maximum continuous current=>6A 1 2 +5VALW 3 26 FB_1.8V SC413_B+
1
2
3
4
VDDP1 FB1
4.7U_1206_25V6K
4.7U_1206_25V6K
DH_1.8V-1
1 2 1U_0603_10V6K PC86
1
PC87
PL9 1 2 ILIM_1.8V
4 25 VCCA_1.8 1000P_0402_50V7K
+1.8VP ILIM1 VCCA1
PC88
1UH_SIL104-1R0-R_11A_30% 0_0402_5% PR111 30.1K_0402_1% 1 2 SC413_B+
5
6
7
8
Vout_1.8V 1 2 LX_1.8V 5 24 Vout_1.8V
2
LX1 VOUT1 PR112 PQ31
D
D
D
D
DH_1.8V 6 23 2 1 SI4800BDY-T1-E3_SO8
DH1 TON1
1
26.1K_0402_1%
G
S
S
S
PR113
8 21 1 2
2
4
3
2
1
+ PQ32 EN/PSV2 BST2 2.2_0402_5% 0_0402_5% Maximum continuous current=>6A
D
D
D
D
2
PC92
4 1M_0402_5%
G
15K_0402_1%
PR118 VCCA_1.2 ILIM_1.2V
1 PR119 2
330U_D2_2.5VY_R15M
11 VCCA2 ILIM2 18
1
10K_0402_1% PC94 30.1K_0402_1%
5
6
7
8
S
S
S
1000P_0402_50V7K
PR120
FB_1.2V 12 17 +5VALW PC95 1
2
FB2 VDDP2
PC96
PQ33 33P_0402_50V8K
D
D
D
D
2
1
2
3
2
13 16 DL_1.2V SI4810BDY-T1-E3_SO8 +
PGD2 DL2
2
@ PR165 14 15 FB_1.2V
VSSA2 PGND2
G
2
S
S
S
0_0402_5%
1
1 2 PC98
4
3
2
1
(36,37) SPOK PR122 1U_0603_10V6K PR121
2
0_0402_5% SC413TSTRT_TSSOP28 10K_0402_1%
1 2
(22,27,28,34) SBPWR_EN VFB=0.5V
2
1
+3VALW
PC99
Close to IC Side 0.1U_0603_25V7K
2
1
1
PC100
1 2 0.1U_0603_25V7K
2
@ PR164
0_0402_5%
VFB=0.5V
VFB=0.5V
Vo=VFB*(1+PR120/PR121)=1.25V
Vo=VFB*(1+PR122/PR127)=1.805V
Ipeak=8.54A, Imax=6A
Ipeak=13.82A, Imax=9.68A
Ton=(3.3E-12*(PR116+37K)*(Vout/VBat))+50ns
Ton=(3.3E-12*(PR112+37K)*(Vout/VBat))+50ns
=0.2661us
=3.3E-12*(820K+37K)*(1.805/19)+50ns=0.319us
SI4810BDY:Rds(on)=>Typ:16 mOhm
FDS6670AS:Rds(on)=>Typ:9 mOhm
Max:20 mOhm
Max:11.5 mOhm
Ivalleymin=9E-6*(PR119/Rds(ON)max*1.3)=10.419A
Iocp=Ivalley+"Iripple%/2
Ivalleymax=11E-6*(PR119/Rds(ON)typ*1.1)=18.8125A
Iripple=(vin-vout)*(Ton/L)=5.485A
Iripple=(vin-vout)*(Ton/L)=2.631A
A
Ivalleymin=9E-6*(PR106/Rds(ON)max*1.4)=16.826A A
Iocp=Ivalley+"Iripple%/2
Ivalleymax=11E-6*(PR106/Rds(ON)typ*1.2)=30.657A
Dr-Bios.com
OCP==>11.7345A~20.128A
OCP==>19.5685A~33.3995A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/09/01 Deciphered Date 2007/09/01 Title
SCHEMATIC, M/B LA-3581P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401474 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 27, 2007 Sheet 40 of 43
5 4 3 2 1
5 4 3 2 1
B+
CPU_B+
+5VS
PL11
PR125 10_0402_5%
FBMA-L18-453215-900LMA90T_1812
+3VS
1 2
2200P_0402_50V7K
330P_0402_50V7K
330P_0402_50V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
0.01U_0402_25V7K
1
100U_25V_M
1
PC105
+
D D
PC101
PC102
PC103
PC104
PC134
PC135
2
2
2
1
2
10K_0402_5%
2.2U_0603_6.3V6K
PR126
2
PC106
0.01U_0402_25V7K
2
2
PC107
5
PC108
0.22U_0603_16V7K
2.2U_0603_10V6K
PQ34
1
SI7686DP-T1-E3_SO8
PC109
MAX8774_VCC
19 25
VCC VDD
2
2 1 31 5 PR129 4
(6) VID0 PR127 0_0402_5% D0 THRM 2.2_0402_5%
2 1 32 30 1 2 PR131
(6) VID1 D1 BST1
PR128 0_0402_5% 0_0402_5% +CPU_CORE
2 1 33 29 DH1 1 2 PL12
3
2
1
(6) VID2 PR130 0_0402_5% D2 PU11 DH1 P_0.36H_ETQP4LR36WFC_24A_20%
2 1 34 28 LX1 1 2
(6) VID3 D3 MAX8774GTL+_TQFN40
LX1
2
4.7_1206_5%
PR132 0_0402_5%
PR134
2 1 35 26 DL1
(6) VID4 D4 DL1
5
6
7
8
D 5
D 6
D 7
D 8
4700P_0402_25V7K
4.22K_0402_1%
FDS6676AS_SO8
FDS6676AS_SO8
PR133 0_0402_5%
2 1 36 27
D
D
D
D
(6) VID5 D5 PGND1
1
PQ36
PR137
PR135 0_0402_5% 1 2 PC110
1 1
1
PQ35
PC112
1 2 1 16 220P_0402_50V8J
(15) VGATE PWRGD CSP1
680P_0603_50V7K
PR136 0_0402_5% 1 2 PC111
4 G
S
S
S
3 S
2 S
1 S
+3VS 1 2 17 15 220P_0402_50V8J
2
PHASEGD CSN1
PC113
PR138 100K_0402_1% @ PR139 PH2
4
3
2
1
10_0402_5%
PR141 MAX8774_VCC 37 18 AGND 2.1K_0402_1% 10KB_0603_5%_ERTJ1VR103J
TWO-PH GND
1
0_0402_5% 1 2 1 2 @PC131
@ PC131
2
C C
PR140
(15) VR_ON 1 2 38 40 PR144 PC114 1U_0805_16V7K
@ PR142
@PR142 PR143 71.5K_0402_1% SHDN# IC 2K_0603_1% 4700P_0402_25V7K
2
100_0402_1%
PR145
1 2 2 1 6 11 FB 1 2 1 2 1 2
2
PC116 TIME FB PR146 20K_0402_1%
100K_0402_5% 2 1 8 9 1 2 1 2 PR147 0_0402_5% PC115
PR148 10K_0402_1% CCV CCI PC117 470P_0603_50V8J 0.22U_0603_16V7K
1 2
(27,28) POUT 1 2 150P_0402_50V8J 3 20
POUT BST2 PR149
1 2 1 2 MAX8774_REF 10 21 DH2 0_0402_5%
PC118 PR150 PC119 0.1U_0603_25V7K REF DH2
1 2
0.1U_0603_25V7K CPU_B+ 1 2 7 22 LX2
200K_0402_1% TON LX2
MAX8774_REF1 2 2 24 DL2
PR151 OFS DL2
31.6K_0402_1% PR153 4 23
VRHOT# PGND2
1
2
CPU_B+
2.2_0402_5%
CSN2 14
GNDS
PR154
1 2
2
PC121
EP
D 220P_0402_50V8J
2200P_0402_50V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
0.01U_0402_25V7K
2 PQ37 (6) CPU_VCC_SENSE
+3VS
41
12
1
G RHU002N06_SOT323-3 PQ38
PC125
S SI7686DP-T1-E3_SO8
3
PC122
PC123
PC124
2
2
1
0.22U_0603_16V7K
4
1
1
PR155 PC126 PR156
PC127
PR157 200K_0402_1% 4700P_0603_50V7K 100_0402_1%
2
200K_0402_1% PR158
2
B 0_0402_5% B
2
3
2
1
1 2
2
PL13
1
D P_0.36H_ETQP4LR36WFC_24A_20%
2 PQ39 1 2
4.7_1206_5%
G RHU002N06_SOT323-3
FDS6676AS_SO8
FDS6676AS_SO8
S
3
D 5
D 6
D 7
D 8
D 5
D 6
D 7
D 8
2
PR159
PR160
1
PQ41
PQ42
4.22K_0402_1%
(6) PSI# 2 PQ40 PR161
2 FDV301N_NL_SOT23-3 10_0402_5% PH3
1
1
G
G
S
S
S
S
S
S
680P_0603_50V7K
PC128
3 PR162 10KB_0603_5%_ERTJ1VR103J
3
2.1K_0402_1%
2
4
3
2
1
4
3
2
1
@ PC129
@PC129 1 2 1 2
2
4700P_0402_25V7K
1 2 PC130
(6) CPU_VSS_SENSE 0.22U_0603_16V7K
1 2
CSP2
PR163
1 2
0_0402_5%
A A
5
Dr-Bios.com 4
Security Classification
Issued Date 2006/09/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
2
Title
Date:
Compal Electronics, Inc.
SCHEMATIC, M/B LA-3581P
1
BOM Change. 0.4 12 Remove R144, R372, C160, C528. PVT
2
Added SSC for Lan TXCLK. (EMI Request) 0.4 12 Added U40, R525, R526, R527, R528, C682. PVT
3
Improve Samsung Memory Module compatibility. 0.4 15 Added R540,R541 2.2K pull up +3VS. PVT
4
Design Modify.(SCH Change) 0.4 15 Change CRT_DET form GPIO_5 to LID#, Add R78 10K. (Bios Request) PVT
5
BCIC0172 : When Reset or Cold Boot MCP67 ACIN 會漏電到EC. 0.4 15 D24 反向, 47K Pull High移除.Added R283 200K Pull Down. PVT
6
RTC Battery 電壓過低. 0.4 16 Added R539 1K. PVT
7
Design Modify.(SCH Change) 0.4 22 Change Q50.G Pin Net Name to SBPWR_EN. PVT
8
C C
Added R-C for BUF_25Mhz (EMI Request). 0.4 22 Added R530,C684. PVT
9
Design Modify for EMI. 0.4 22 Added L59, L60, L61, L62, C685, C686. PVT
10
解決+3VS 漏電 when enter S3 Mode. 0.4 25,26 Added Q56, Q57, Q58, Q59, R536, R537. PVT
11
Design Modify for Acer WLAN LED. 0.4 25 JP21.44 Pin Added MINI1_LED# Net, Added R520, R521. PVT
12
防止 BATT_TEMP, BATT_OVP, ACIN 被干擾. 0.4 27 Added C660, C661, C662. PVT
13
Design Modify for Power. (65W/95W Detect Function) 0.4 27 U15.98 Pin Added 65W/95W# Net, Added R519 100K to +3VALW. PVT
14
Design Modify for EMI. 0.4 30 Added C663~C678. PVT
15
For AUDIO EA Test. 0.4 32 Change C582, C583, C584, C587,C594, C597 to 4.7uF. PVT
B B
16
解決關機 bo bo 聲問題. 0.4 33 Added Q53,C680. PVT
17
Design Modify for EMI. 0.4 33 Added L57, L58 for Mic. L63, L64, L65, L66 for SPK. D28 for ESD. PVT
18
Change Codec Amp to APA2057RI-TRL_TSSOP28. 0.4 33 Change U31 to SA00001QD00, added R523,R524. PVT
19
Remove PJP14. 0.4 34 Remove PJP14. PVT
20
Change MCP67-MV form A01 to A02. 0.4 10~17 Change MCP67-MV form A01 to A02. PVT
21
解決系統時間延遲問題. 0.4 15 Change C503, C504 form 18pF to 6.8pF. PVT
22
Improve WLAN Module compatibility. 0.3 11,25 Change WLAN Port form PCIE4 to PCIE2. DVT2
A A
23
Fixed LAN LED work abnormal. 0.3 22 Added D25,D27,D27, U39. DVT2
24
Change LAN to RTL8211B.
5
Dr-Bios.com
4
0.2 22 Change Page 22 all compnent. DVT1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT
EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR
DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3 2
Title
Size
Date:
Compal Electronics, Inc.
SCHEMATIC, M/B LA-3581P
Document Number
401474
Monday, December 03, 2007 Sheet
1
42 of 43
Rev
C
5 4 3 2 1
1
Change L61,L62, L69 to SM010031900. (EMI) 1.0 22 PVT2
2
Remove C247, C251, C256, C265, C264, C263, C262, C260. (EMI) 1.0 22 PVT2
3
Added R32 470E. (For Lan) 1.0 22 PVT2
4
Added R94 10K. (For Lan) 1.0 22 PVT2
5
Change R551,R552 from 1K to 0E. (For PCIE mini Card) 1.0 11 PVT2
6
Remove R268 100K. (For New Card) 1.0 26 PVT2
7
Remove C570 150uF Cap. (Cost Down) 1.0 21 PVT2
8
C C
Added R351,R354 15K. 1.0 14 PVT2
9
Change C555,C556 from 10pF to 18pF. (For ENE request) 1.0 27 PVT2
10
Add R567 . (For LAN 3rd cut SSIC ) 2.0 12 MP
11
Added R530 . (For Lan) 2.0 12 MP
B B
A A
5
Dr-Bios.com
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT
EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR
DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3 2
Title
Size
Date:
Compal Electronics, Inc.
SCHEMATIC, M/B LA-3581P
Document Number
401474
Monday, December 03, 2007 Sheet
1
43 of 43
Rev
C