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When writing to the internal flash memory, there are following two methods to use depending on
situation:
(1) When the write program does not exist in the internal flash memory
(2) When the write program already exists in the internal flash memory
For (1), set the FP pin = high, MOD0 = high, and MOD1 = low to enter boot flash E/W enable mode.
In this case, the reset vector entry is located at the beginning of the boot program area (H'8000
0000). (Normally, the reset vector entry is located at the start address of the internal flash memory.)
Transfer the "flash write program" from the boot area into the internal RAM using a boot program.
After this transfer, jump to the RAM and set the Flash Control Register 1 FENTRY bit to 1 to make
the flash memory ready for write. You now can write to the internal flash memory using the "flash
write program" that has been transferred into the internal RAM.
For (2), set the FP pin = high, MOD0 = low, and MOD1 = low to enter flash E/W enable mode in
single-chip mode. Transfer the "flash write program" from the internal flash memory in which it has
been prepared beforehand into the internal RAM. After this transfer, jump to the RAM and set the
Flash Control Register 1 (FCNT1) FENTRY bit to 1 using a program in the RAM to make the flash
memory ready for write. You now can write to the internal flash memory using the "flash write
program" that has been transferred into the internal RAM. Or you can set the FP pin = high, MOD0
= low, and MOD1 = high to enter flash E/W enable mode in extended external mode.
When in flash E/W enable mode (FP pin = 1, FENTRY bit = 1), the EIT vector entry for External
Interrupt (EI) is moved to the beginning of the internal RAM (H'0080 4000). During normal mode,
the EIT vector entry exists in the flash area (H'0000 0080).
(1) When the write program does not exist in the internal flash memory
Use a program in the boot ROM located on memory map to write to the flash memory. To transfer
the write data, use serial I/O1 in clock-synchronized serial mode. Use this serial transfer when
writing to the flash memory using a flash programmer.
<Step 1>
FP=L or H MOD1= L MOD0=L RESET=L Initial state (where the write program does not
exist in the flash memory.
External device
M32R/ECU
<Step 2>
FP=H MOD1= L MOD0=H RESET=H Set the FP pin high, the MOD0 pin high, and
the MOD1 pin low to place the device in
boot mode + flash E/W enable mode.
Deassert reset and start up using the boot
Flash write program.
RAM program Transfer the flash write program from boot
ROM to RAM.
Jump to the flash write program in RAM.
SIO1
External device
M32R/ECU
<Step 3>
FP=H MOD1= L MOD0=H RESET=H Using the flash write program in RAM, set the
Flash Control Register 1 (FCNT1) FENTRY
bit to 1.
Write data to the internal flash memory using
RAM the flash write program.
When you finished writing, reset MOD0 low
and jump to the flash memory or apply reset to
enter normal mode.
Flash Boot ROM
memory
Flash write
SIO1 Write data
data
External device
M32R/ECU
Figure 6.5.2 Procedure for Writing to Internal Flash Memory (when the write program does not
exist in the flash memory)
Reset deasserted
(Boot program starts)
Reset deasserted
Mode selected
POWER ON Mode selected
RESET
MOD0
MOD1
FP
Settings by boot
program
Figure 6.5.3 Internal Flash Memory Write Timings (when the write program does not exist in the
flash memory)
(2) When the write program already exists in the internal flash memory
Use the flash write program already stored in the internal flash memory to write to the flash
memory. For write to the flash memory, use the internal peripheral circuits according to your
programming system. (The data bus, serial I/O, and ports can be used.)
The following shows an example for writing to the flash memory by using serial I/O0 in single-chip
mode.
<Step 1>
FP=L or H MOD1= L MOD0=L Initial state (where the write program already
exists in the flash memory)
Ordinary program in the flash memory is
being executed.
Boot ROM
External device
M32R/ECU
<Step 2>
FP=H MOD1= L MOD0=L
Set the FP pin high, the MOD1 pin low, and
the MOD0 pin low to place the device in
single-chip + flash E/W enable mode.
Flash write After determining the FP pin and MOD1 pin
RAM program levels, transfer the flash write program from
the flash memory area into RAM.
Jump to the flash write program in RAM.
Boot ROM
SIO0
External device
M32R/ECU
<Step 3>
FP=H MOD1= L MOD0=L Using the flash write program in RAM, set the
Flash Control Register 1 (FCNT1) FENTRY
bit to 1.
Write data to the internal flash memory using
RAM the flash write program in RAM.
When you finished writing, jump to the
program in the flash memory or apply reset to
enter normal mode.
Flash Boot ROM
memory
Flash write
SIO0 Write data
data
External device
M32R/ECU
Figure 6.5.4 Procedure for Writing to Internal Flash Memory (when the write program already
exists in the flash memory)
"L"
MOD0
FP "H" or "L"
FENTRY
Write to flash memory by
flash rewrite program
Figure 6.5.5 Internal Flash Memory Write Timings (when the write program already exists in the
flash memory)
The device's operation modes are set by MOD0, MOD1, and Flash Control Register 1 (FCNT1)
FENTRY bit. The table below lists operation modes that may be set during flash write.
— 1 1 — reserved — —
Note: Indicates the FENTRY bit status of Flash Control Register 1 (FCNT1). The bar "—" denotes "Don't Care."
Flash E/W enable mode is a mode in which the internal flash memory can be programmed or
erased. In flash E/W enable mode, no programs can be executed in the internal flash memory.
Therefore, before entering flash E/W enable mode, you need to transfer the necessary program
into the internal RAM and run the program in RAM.
Flash E/W enable mode can be entered only when the device is operating in single-chip mode or
extended external mode. Namely, you can enter flash E/W enable mode only when the FP pin =
high and the Flash Control Register 1 (FCNT1) FENTRY bit = 1. You cannot enter flash E/W
enable mode when the device is operating in processor mode or the FP pin = low.
The MOD0 and MOD1 pin levels (high or low) can be verified using the P8 Data Register (Port
Data Register, H'00800 0708) MOD0DT and MOD1DT bits.
D0 1 2 3 4 5 6 D7
6 P86DT
7 P87DT
START
OK
END
1 µs wait
(by hardware timer or software timer)
END
Note: For details about each command, refer to Section 6.5.3, "Programming Procedure to
Internal Flash Memory."
To write to the internal flash memory, set the device's operation mode to enter flash E/W enable
mode first and then use the flash write program that has already been transferred from the flash
memory into the internal RAM.
In flash E/W enable mode, no data can be read out from the internal flash memory as in normal
mode, so you cannot execute a program that exists in the internal flash memory. Therefore, the
flash write program must be prepared in the internal RAM before entering flash E/W enable mode.
(Once you've entered flash E/W enable mode, you cannot use any command except flash
commands to access the flash memory.)
To access the internal flash memory in flash memory E/W enable mode, issue commands for the
internal flash memory address to be operated on. The table below lists the commands that can be
issued in flash memory E/W enable mode.
Note : During flash E/W enable mode, the flash memory cannot be accessed for read or write
wordwise.
Note: This command is used in conjunction with Lock Bit Program, Block Erase, and Erase All Unlock Block operations.
Read mode is entered by writing command data H'FFFF to any address of the internal flash
memory. Then read the flash memory address you want to read out, and the content of that
address will be read out.
Before exiting flash E/W enable mode, always be sure to execute the Read Array command.
Flash memory is programmed one page at a time, each page consisting of 256 bytes (lower
addresses H'00 to H'FF). To write data to the flash memory (i.e., to program the flash memory),
write the program command H'4141 to any address of the internal flash memory and then the
program data to the address to which you want to write.
With the Page Program command, you cannot write to the protected blocks.
Page Program is automatically performed by the internal control circuit, and the completion of
programming can be verified by checking the Flash Status Register 1 (FSTAT1) FSTAT bit.
(Refer to Section 6.4.2, "Flash Status Registers.") While the FSTAT bit = 0, the next
programming can not be performed.
Flash memory can be protected against program/erase one block at a time. The Lock Bit
Program command is provided for protecting memory blocks.
Write the Lock Bit Program command data H'7777 to any address of the internal flash memory.
Next, write the Verify command data H'D0D0 to the last even address of the block you want to
protect, and this memory block is protected against program/erase. To remove protection,
disable lock bit-effectuated protection using the Flash Control Register 2 (FCNT2) FPROT bit
(see Section 6.4.3, "Flash Control Registers") and erase the block whose protection you want to
remove. (The content of this memory block is also erased.)
The table below lists the target blocks and their specified addresses when writing the Verify
command data.
0 H'0000 3FFE
1 H'0000 5FFE
2 H'0000 7FFE
3 H'0000 FFFE
4 H'0001 FFFE
5 H'0002 FFFE
6 H'0003 FFFE
7 H'0004 FFFE
8 H'0005 FFFE
9 H'0006 FFFE
10 H'0007 FFFE
11 H'0008 FFFE
12 H'0009 FFFE
13 H'000A FFFE
14 H'000B FFFE
Table 6.5.4 M32170F4 and M32174F4 Target Blocks and Specified Addresses
Target Block Specified Address
0 H'0000 3FFE
1 H'0000 5FFE
2 H'0000 7FFE
3 H'0000 FFFE
4 H'0001 FFFE
5 H'0002 FFFE
6 H'0003 FFFE
7 H'0004 FFFE
8 H'0005 FFFE
9 H'0006 FFFE
10 H'0007 FFFE
Table 6.5.5 M32170F3 and M32174F3 Target Blocks and Specified Addresses
Target Block Specified Address
0 H'0000 3FFE
1 H'0000 5FFE
2 H'0000 7FFE
3 H'0000 FFFE
4 H'0001 FFFE
5 H'0002 FFFE
6 H'0003 FFFE
7 H'0004 FFFE
8 H'0005 FFFE
64KB Block 4
H’0001 FFFF
H’0002 0000
64KB Block 5
H’0002 FFFF
H’0003 0000
64KB Block 6
H’0003 FFFF
H’0004 0000
64KB Block 7
H’0004 FFFF
H’0005 0000
64KB Block 8
H’0005 FFFF
H’0006 0000 Even blocks
64KB Block 9
H’0006 FFFF
H’0007 0000
64KB
Block 10
H’0007 FFFF
H’0008 0000
64KB Block 11
H’0008 FFFF
H’0009 0000
64KB Block 12
H’0009 FFFF
H’000A 0000
64KB Block 13
H’000A FFFF
H’000B 0000
64KB Block 14
H’000B FFFF
64KB Block 5
H’0002 FFFF
H’0003 0000
64KB Block 6
H’0003 FFFF
H’0004 0000
Even blocks
64KB Block 7
H’0004 FFFF
H’0005 0000
64KB Block 8
H’0005 FFFF
H’0006 0000
64KB Block 9
H’0006 FFFF
H’0007 0000
64KB
Block 10
H’0007 FFFF
Figure 6.5.8 Block Configuration of the M32170F4 and M32174F4 Flash Memory
64KB Block 4
H’0001 FFFF
H’0002 0000
64KB Block 5
H’0002 FFFF
H’0003 0000
64KB Block 6 Even blocks
H’0003 FFFF
H’0004 0000
64KB Block 7
H’0004 FFFF
H’0005 0000
64KB Block 8
H’0005 FFFF
Figure 6.5.9 Block Configuration of the M32170F3 and M32174F3 Flash Memory
The Block Erase command erases the contents of internal flash memory one block at a time. For
Block Erase, write the command data H'2020 to any address of the internal flash memory. Next,
write the Verify command data H'D0D0 to the last even address of the memory block you want to
erase (see Table 6.5.3, Table 6.5.4, and Table 6.5.5, "Target Blocks and Specified Addresses").
The content of this memory block is erased.
With the Block Erase command, you cannot erase the protected blocks.
Block Erase is automatically performed by the internal control circuit, and the completion of Block
Erase can be verified by checking the Flash Status Register 1 (FSTAT1) FSTAT bit. (Refer to
Section 6.4.2, "Flash Status Registers.") While the FSTAT bit = 0, you cannot erase the next
block.
The Erase All Unlock Block command erases all memory blocks that are not protected. To erase
all unlock blocks, write the command data H'A7A7 to any address of the internal flash memory.
Next, write the command data H'D0D0 to any address of the internal flash memory, and all of
unprotected memory blocks are erased.
The Read Status Register command reads out the content of Flash Status Register 2 (FSTAT2)
that indicates whether flash memory write or erase operation has terminated normally or not. To
read Flash Status Register 2, write the command data H'7070 to any address of the internal flash
memory. Next, read any address of the internal flash memory, and the content of Flash Status
Register 2 (FSTAT2) is read out.
The Clear Status Register command clears the Flash Status Register 2 (FSTAT2) D10, D11, and
D12 bits to 0. Write the command data H'5050 to any address of the internal flash memory, and
Flash Status Register 2 is cleared to 0.
If an error occurs when programming or erasing the flash memory and the Flash Status Register
2 (FSTAT2) ERASE (Auto Erase operating condition) or WRERR2 (Program operating condition
2) bit is set to 1, you cannot perform the next program or erase operation unless WRERR1
(Program operating condition 1) or WRERR2 (Program operating condition 2) is cleared to 0.
The Read Lock Bit Status command allows you to check whether or not a memory block is
protected against program/erase. Write the command data H'7171 to any address of the internal
flash memory. Next, read the last even address of the block you want to check (see Table 6.5.3,
Table 6.5.4, and Table 6.5.5, "Target Blocks and Specified Addresses"), and the data you read
shows whether or not the target block is protected. If the FLBST0 (lock bit 0) bit and FLBST1 (lock
bit 1) bit of the data you read are 0s, it means that the target memory block is protected. If the
FLBST0 (lock bit 0) bit and FLBST1 (lock bit 1) bit are 1s, it means that the target memory block
is not protected.
FLBST0 FLBST1
D0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 D15
0 No functions assigned ? —
1 FLBST0 0 : Protected —
9 FLBST1 0 : Protected —
10 - 15 No functions assigned ? —
The Lock Bit Status Register is a read-only register, which contains said lock bits independently
for each block.
START
END
START
NO Programmed
for one page ?
YES
1 µs wait
(by hardware timer or software timer)
NO
FSTAT bit = 1
YES
TIME OUT ? NO
Forcibly terminated
NO
Last address ?
YES
END
Note 1: Start writing from the beginning of a 256-byte boundary of the flash memory (lower address H'00).
Note 2: When Program operation starts, you have the Read Status Register command automatically
entered. (You do not need to enter the Read Status Register command until you issue another
command.)
Note 3: Examine the Flash Status Register 2 ERESE (Auto Erase operating condition), WRERR1
(Program operating condition 1), and WRERR2 (Program operating condition 2) bits to check for
program error.
START
1 µs wait
(by hardware timer or software timer)
NO
FSTAT bit = 1
YES
TIME OUT ? NO
0.5s
Read any address of inter nal flash memory YES
to check for program error. (Note 2)
Forcibly terminated
END
Note 1: When Program operation starts, you have the Read Status Register command automatically
entered. (You do not need to enter the Read Status Register command until you issue another
command.)
Note 2: Examine the Flash Status Register 2 ERESE (Auto Erase operating condition), WRERR1
(Program operating condition 1), and WRERR2 (Program operating condition 2) bits to check for
program error.
START
1 µs wait
(by hardware timer or software timer)
NO
FSTAT bit = 1
YES
TIME OUT ? NO
1s
Read any address of internal flash memory YES
to check for erase error. (Note 2)
Forcibly terminated
END
Note 1: When Erase operation starts, you have the Read Status Register command automatically
entered. (You do not need to enter the Read Status Register command until you issue another
command.)
Note 2: Examine the Flash Status Register 2 ERESE (Auto Erase operating condition), WRERR1
(Program operating condition 1), and WRERR2 (Program operating condition 2) bits to check for
erase error.
START
1 µs wait
(by hardware timer or software timer)
NO
FSTAT bit = 1
YES
TIME OUT ? NO
10s
Read any address of internal flash memory YES
to check for erase error. (Note 2)
Forcibly terminated
END
Note 1: When Erase operation starts, you have the Read Status Register command automatically
entered. (You do not need to enter the Read Status Register command until you issue another
command.)
Note 2: Examine the Flash Status Register 2 ERESE (Auto Erase operating condition), WRERR1
(Program operating condition 1), and WRERR2 (Program operating condition 2) bits to check for
erase error.
START
END
START
END
START
END
The time required for writing to the internal flash memory is shown below for your reference.
(1) M32170F6
(a) Transfer time by SIO (for a transfer data size of 768 KB)
.
1/57600 bps × 1 (frame) × 11 (number of transfer bits) × 768 KB =. 150.2 [s]
When writing data to flash memory at high speed by speeding up the serial
communication or by other means, the fastest write time possible is as follows:
.
(b) + (c) =. 25 [s]
(a) Transfer time by SIO (for a transfer data size of 512 KB)
.
1/57600 bps × 1 (frame) × 11 (number of transfer bits) × 512 KB =. 100.2 [s]
When writing data to flash memory at high speed by speeding up the serial
communication or by other means, the fastest write time possible is as follows:
.
(b) + (c) =. 17 [s]
(a) Transfer time by SIO (for a transfer data size of 384 KB)
.
1/57600 bps × 1 (frame) × 11 (number of transfer bits) × 384 KB =. 75.1 [s]
When writing data to flash memory at high speed by speeding up the serial
communication or by other means, the fastest write time possible is as follows:
.
(b) + (c) =. 13 [s]
The table below shows boot memory specifications of the 32170 and 32174.
Capacity 8 Kbytes
Wait insertion Operates with no wait states (with 40 MHz internal CPU memory clock)
Read Can only be read when FP = 1, MOD0 = 1, and MOD1 = 0. When read in other
modes,indeterminate values are read out. Cannot be accessed for write.
Other Because the boot ROM area is a reserved area that can only be used in boot
mode, the program cannot be modified.