PCB Trace Spacing Calculation for Voltage Levels https://www.smps.us/pcbtracespacing.

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CALCULATING SPACING BETWEEN PCB TRACES FOR VARIOUS

VOLTAGE LEVELS
CIRCUIT BOARD LAYOUT GUIDELINES

Proper distances between PCB traces are critical to avoid flashover or tracking between electrical
conductors. Unfortunately, there is no single solution to this issue. There is a variety of industry
and safety standards that prescribe different spacing requirements depending on the voltage,
application and other factors. Here I am providing some considerations and a simple widget that
will help you determine the proper spaces between PCB tracks.

SAFETY REQUIREMENTS Home

When a product has to be Tutorial
recognized by a certain safety Topologies
agency, there may be a legal SMPS design
requirement to meet specific Thermal design
insulations listed in the relevant Software
agency's standard. In this case,
PCB design
finding the required spacing is
Computer PSU
more or less straightforward.
UPS
For example, in the U.S. for
Circuit
most mains-powered or battery-
powered information technology Transformers
equipment, the minimum Formulas
allowed PCB spacing should be EE Reference
determined from IEC/UL Inverters
60950-1 2nd Edition Tables 2K, 2L, 2M or 2N. These tables specify so-called Generators
clearance and "creepage" distances for various grades of insulation as Solar
functions of working voltage, pollution degree, PCB material group and
coating.
The required grade depends on the location of the circuit. The standard specifies functional, basic,
supplementary, double and reinforced insulations. For example, when a breakdown can create a
hazardous voltage on user accessible conductive parts (such as in case of insulation between
mains circuits and low-voltage secondary circuits), a double or reinforced insulation is required. In
this case, to separate such circuits on the PCB you need to double the respective distances
shown in an appropriate table. The diagram below illustrates the clearance and creepage
measurements. It lists as an example the requirements (in mm) for a typical application with AC
mains 250Vrms, peak working voltages under 420V, and peak AC mains transients up to 2.5kV.
Note that 1 mm ≈ 40 mils. If you don't have an access to the UL document, this creepage
calculator will help you find the necessary distance. Of course, you should consult with UL
60950-1 or an applicable standard for final design decisions. Note that for the equipment
manufactured in China and intended for use at altitudes above 2,000m (up to 5,000m), according
to GB 4943.1-2011 the minimum distances has to be multiplied by 1.48.

OPERATIONAL REQUIREMENTS
The distances provided by IEC and UL actually

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greatly exceed the spacing necessary just for

proper operation of the devices. This was done in
order to provide increased protection against
electric shock. For the circuits whose locations do
not require electric shock protection, spacing
between printed circuit tracks can be made smaller.
For the so-called functional insulation, UL
60950-1 permits to use separation distances lesser
than the specified in their charts. They just have to
withstand the electric strength test (casually called
HiPot) per Par.5.2.2 Table 5B. In other words,
where only functional insulation is required, you
don't need to meet any specific clearance between
PC traces for as long as there will be no electric
breakdown between them at the prescribed test
voltage. The latter generally is several times greater
than actual working voltage between separated
traces. Unfortunately, there is no clear information
in the literature on what is actual breakdown voltage between the conductors and how to design a
PCB to pass a specific HiPot. Experiments performed by UL in the
course of analysis of silver PCB surface finish, demonstrated that the
withstand voltage of a pair of parallel conductors is purely a function of
the spacing rather than surface finish. Based on the experiments, UL
specified withstand voltage of 40 volts/mil or about 1.6 kV/mm in their
UL796 Standard for Printed Wiring Boards. In my view, it is reasonable
therefore to use these numbers in designing the board to withstand a
particular test. For example, for working voltage 500V in secondary
circuits you need to withstand 1740 Vrms per UL 60950-1 Table 5B Part
2. Such sinewave has 1740*√2=2461 V peak value. With the 40V/mil
criterion, the required minimum distance would be 2461/40=62 mils (or
1.6 mm).

For products that are not covered Voltage (DC or AC peak)

by UL60950-1 safety standard, to
determine the electrical
clearances the designers normally SPACING mm inches
consult with IPC-2221. It is widely IPC-2221B:
accepted throughout the world as external
a generic PCB design standard for
commercial and industrial internal
applications. The Table 6.1 of coated
IPC-2221B specifies minimum IPC9592
required conductor clearances as
a function of voltage, elevation
level and the coating. Since their
introduction in 1998, these
numbers were never revised. IPC just added the values in inches in
revision A and left them unchanged in rev.B.

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Of course, it is always desirable to

maximize whenever possible the distance between tracks on
individual layers to minimize the possibility of electric breakdown,
reduce parasitic capacitance, and simplify PCB assembly. However,
because of usual shortage of space, spreading out the traces and components more than it is
really necessary may not be feasible. From a technical standpoint, IPC stepwise clearance limits
are mostly baseless. For example, there is no reason whatsoever, why you need 2.5mm for 301V,
while for 300V you can use 1.25mm. An IPC-9592 standard for power conversion circuits
originally provided linear functional spacing requirements: SPACING (mm) = 0.6+Vpeak×0.005.
Linear function of course makes more sense. However, in most cases the above formula resulted
in even higher spacings and in grossly over-designed circuit board. Later revisions of this
document returned to a sort of step function and relaxed the requirements at the low end: 0.13mm
for V<15V, 0.25mm for 15V≤V<30V and 0.1+V×0.01 for 30V≤V<100V (for uninsulated
conductors). Our widget provides rounded numbers based on the above equations.

One would think that a general PCB design standard has to be more liberal than UL requirements.
In reality, for V>150V IPC actually calls for larger spacings between uncoated external conductors
than those you can derive from UL 60950-1 Table 5B in conjunction with the 40V/mil criterion.
Note that generally all IPC doc's are voluntarily rather then mandatory. Particularly, they state that
"Existence of such Standards and Publications shall not in any respect preclude any member or
nonmember of IPC from manufacturing or selling products not conforming to such Standards and
Publication".

Where shortage of space on a PCB is an issue, for non-UL applications you may need to use the
spacing smaller than those that are prescribed by IPC. However, be sure to use an ample safety
factor to withstand the voltages substantially higher than the peak voltage between the copper
traces under any abnormal and transient conditions. It is interesting to note that many major
power supply manufacturers in their low-power off-line designs are widely using 500-800V
MOSFETs in TO220 package operating at 400V and higher. With this package you can get about
30 mils spacing between the pads, while the documents would require at least 100 mils. Even if
you spread the leads on the PWB, you can't do anything with 50-mil spacing between the TO220
leads along the surface of the package.

As a reference, the chart below compares PCB distance limits based on the following three specs
for external layers of uncoated bare boards;
IPC2221B
IPC9592B;
UL60950 for functional insulation in secondaries, designed to meet the test per Table 5B with
the assumption of 40V/mil withstand voltage.
Note the curves below are for functional (not safety!) insulation.

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CONCLUSION
When the product is covered by an UL standard, you need to select the appropriate table in the
UL standard. Particularly, for the products covered by UL60950-1, determine the grade of
insulation depending on the location of the circuits and then find from Tables 2K-2N minimum
required spacing based on working voltage, pollution degree, PCB material group and the coating.
For functional insulation UL permits usage of lesser distance if it withstands the test voltage per
Table 5B. For practical purposes, in my view, you can calculate the distance on the assumption
that the circuit board withstands 40V/mil (1.6kV/mm). Of course, this test voltage is always much
higher than actual operating voltage. Also note that technically the insulation requirements given
in UL 60950 are for frequencies up to 30 kHz. So far, both 60950-1 2nd Edition and IEC 62368-1
permit the same requirements for frequencies above 30 kHz until they will figure out what to do
about it. You can't rule out that in the future IEC and UL would adopt tougher standards for high
frequency circuits based on IEC 60664-1 and IEC 60664-4, which would have a major effect on
most SMPS designs.

If there is no legal requirement to meet UL or any other product control law, try using IPC-2221B
(or IPC-9592B for power circuits) distance recommendations whenever possible. However, where
shortage of space on a PCB is an issue, you may need to choose a smaller spacing, provided it
still withstands test voltages substantially higher than the peak voltage between the traces. The
above analysis takes into account only electrical breakdown issue. There are other criteria that
should be considered when selecting electrical clearance, such as conductor's temperature rise.
Also see general guidelines for printed circuit board design, layout rules for power circuits, and
signal integrity issues.

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LEGAL. The information provided here reflects only a personal opinion of the author and does not constitute a
professional or legal advice. It is not intended to substitute official standards-- consult them for all final decisions.
Also see our general Disclaimer linked below.

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