AIR UNIVERSITY

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

EXPERIMENT NO 3

Lab Title: IUR’s ( Internal Utility Relays )

Student Name: Izza Jamal Reg. No: 191850

LAB ASSESSMENT:

Excellent Good Average Satisfactory Unsatisfactory

Attributes
(5) (4) (3) (2) (1)
Ability to Conduct
Experiment
Ability to assimilate the
results
Effective use of lab
equipment and follows
the lab safety rules

Total Marks: Obtained Marks:

LAB REPORT ASSESSMENT:

Excellent Good Average Satisfactory Unsatisfactory
Attributes
(5) (4) (3) (2) (1)

Data presentation

Experimental results

Conclusion

Total Marks: Obtained Marks:

Date: Signature:
 AIR UNIVERSITY, ISLAMABAD
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING
Electrical Measurements & Instruments Lab

Lab Instructor: Wasim Iqbal

IUR’s ( Internal Utility Relays ) Lab#03

Submitted by
Izza Jamal (191850)

Fall-21

BEEP V-B
DATE:18/10/21
 EXPERIMENT.NO.03
IUR’s ( Internal Utility Relays )
Objective:
 To get familiar with the concept of IUR’s.
 Get to know about the implementation of IUR on the software.

Apparatus:
 PLC Allen Bradley.
 LogixPro software.

Introduction:
As an illustration of the use that can be made of internal relays, consider the following
situation. A system is to be activated when two different sets of input conditions are realized.
We might just program this as an AND logic gate system; however, if a number of inputs have
to be checked in order that each of the input conditions can be realized, it may be simpler to
use an internal relay. The first input conditions then are used to give an output to an internal
relay. This relay has associated contacts that then become part of the input conditions with the
second input.

Example:

Figure 1.1

The above mentioned circuits has 3 ladders each having 2 , 3 & 4 inputs AND gate respectively.
Now if we use IUR then the circuit would be as follows;

Figure 1.2

Here , the output of the first gate is given to the next ladder input inorder to make it a three-input
AND gate and so is the case with 3rd ladder.

LAB TASKS
Half-Adder:

Truth Table:
A B
0 0
0 1
1 0
1 1
OutPut:
Sum Carry
0 0
1 0
1 0
0 1
Full-Adder:

Truth Table:
A B Cin Sum Carry
0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

OutPut:
Binary Multiplier:

Truth Table:
A1 A0 B1 B0 C3 C2 C1 C0

0 0 0 0 0 0 0 0

0 0 0 1 0 0 0 0
0 0 1 0 0 0 0 0

0 0 1 1 0 0 0 0

0 1 0 0 0 0 0 0

0 1 0 1 0 0 0 1

0 1 1 0 0 0 1 0

0 1 1 1 0 0 1 1

1 0 0 0 0 0 0 0

1 0 0 1 0 0 1 0

1 0 1 0 0 1 0 0

1 0 1 1 0 1 1 0

1 1 0 0 0 0 0 0

1 1 0 1 0 0 1 1

1 1 1 0 0 1 1 0

1 1 1 1 1 0 0 1

Output:
CONCLUSIONS:
This lab was about IUR’S i.e Internal Utility Relays.These help us to reduce the number
of inputs which helps us to reduce space ( in physical scenario ).An example of AND gate is
hsow in Figure 1.1 and 1.2 Moreove,we perfomed certain tasks to get better understanding of this
concept.