Intel® IO Margin Tool

Quick Reference Guide

Revision 1.2.11
September 2020
Document Number: 615876
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Quick Guide Contents

• Introduction
• Tool Release package
• Understanding Controller and Target Configurations
• Margining Methodology
• Margin Result Analysis
• Tool UI Walkthrough
• Importing Results from several systems
• Target Controller Configuration Setup
• Debug Tips
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 Intel® IO Margin - Intel® Electrical Margin Tool Next
Generation
• New graphical interface for improved user experience.
• Easier testing of multiple target systems.
• Analysis which provides flexibility in the number of target system tested and guidance.

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 Intel® IO Margin Tool
Tiger Lake
 Intel® IO Margin Tool measures the Interfaces
(UP3/UP4)
functional on-die electrical margin of high-
PCI Express*
speed IO (HSIO) interfaces (PCIe*)

 Usages include:
USB 3.1
 Validating the electrical robustness of HSIO
interfaces.
Serial ATA (SATA)
 Identifying board routing issues.
 Optimizing IO equalization settings. TCSS USB

 Qualifying HSIO interfaces for HVM.

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PCIe* CPU(Gen 4)

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 Tool Release Package

• Tool Executable (*.exe)

• User Guide
• Quick Guide
 Default Tool Installation Path: C:\Intel\IPSS\ipssx.x
 Default Results Path: C:\Intel\IPSS\ipssx.x\Lib\site-packages\evToolsTests\localTestsRepository\iomargin\results

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 Understanding Controller and Target Configurations

 Testing Multiple Connected Targets.

 A system can be a controller, target or both. Controller

 A Controller is used to:

 Configure test settings and flows.
 Store and analyze results.
 A Target is the system being margined
Target Target
… Target

1 2 N
 Targets are connected to the controller through a HTTP/IP connection.
 Targets are registered to a controller during installation.
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 Testing Standalone Targets

 Standalone testing can be  Results from standalone testing can be

performed on a single machine manually imported to a controller
machine

Controller
Controller Manual Manual

and Target Import Import

Controller Controller

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 Margining Methodology

1. System Under Test with IOMT Tool Installed on the system.

2. End Point Devices.
3. Required BIOS setting as called out in User Guide.
4. User Guide understanding for BKM and Tool limitations if any.
5. End Point devices to be in Active state.

READY to Margin!
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 Margin Result Analysis

 Intel® IO Margin introduces a new analysis tool.

• Greater flexibility with the number of systems tested by using a three region eye mask.
• Removes the 5x5 testing requirement (5 systems with 5 repeats).
• Deeper analysis of the results to provide recommendations when margins do not pass the eye
mask.

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 Three Region Eye Mask

 The new eye mask defines three

regions
• Passing region: Margin results are outsize the
grey mask limits
• Grey region: Additional systems or repeat
testing is required
• Failing region: Margin results are within the
red mask limits

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 Three Region Eye Mask (Cont.)
 The limits of the eye mask regions change depending on the number of
systems and number of repeat tests performed per system.

1 System x 1 Repeat 5 Systems x 5 Repeats

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Passing/Additional Testing Requirement/Failing Systems Examples

 Passing System Additional testing required Failing System

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 Other Features

 Ability to run test flows from a Command Line Interface.

 Results are stored in a searchable data repository on the controller.
 Continued output of TSV result files for backwards compatibility.

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Intel® IO Margin Tool UI Walkthrough
 IOMT UI Walkthrough

Select IO Margin System Information is probed for the connected Targets

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IOMT UI Walkthrough

Target Select the Click Probe

connected devices to probe selected devices Recognizing the devices

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IOMT UI Walkthrough

Devices propperly Click Next Select all targets Expanded view of the Interface
recognized
Information

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IOMT UI Walkthrough (Cont.) (PEG, DMI Applicable only for S/H SKUs)

Tag and save the

test flow

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No active PEG ports available

for Margin and loop option
Open an existing Test Flow/Add a new Test not selected in this example. Select the interfaces and ADD

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 IOMT UI Walkthrough (Cont.) (PEG, DMI applicable only for S/H SKUs)

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Save the Flow User Editable Fields

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 IOMT UI Walkthrough (Cont.)

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 IOMT UI Walkthrough (Cont.)

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 IOMT UI Walkthrough (Cont.)

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 IOMT UI Walkthrough (Cont.)

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 IOMT UI Walkthrough (Cont.)

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 IOMT UI Walkthrough (Cont.)

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 IOMT UI Walkthrough (Cont.) (PEG, DMI applicable only for S/H SKUs)

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Adding the Loop Functionality

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 IOMT UI Walkthrough (Cont.)

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Mouse hover to understand the “Margin Type”, “Voltage and Timing Limit” Click Run
terminologies.

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 IOMT UI Walkthrough (Cont.)

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Margining completed Margin Summary

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 IOMT UI Walkthrough (Cont.)
SAVE

Overall

Margining Result

Recommendations

based on margin data

Summary of IO Margin Tool Margin Eye Mask

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Select Create Test Review

Targets Flows Progress
Step- 1 Step- 2 Step- 3

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Controller+ Target Configuration Setup
 Controller + Target Configuration Setup
 Prerequisites:  Steps:
 Intel IOMT/IPSS should not be installed on any 1. Install Intel PSS in the controller machine.
machine. 2. Copy C:/Intel/IPSS/[Link] from controller machine.
 All target and controller machines: 3. Create C:/Intel/IPSS folder if it does not exists in the target machine.

• Should use the same IPSS version. 4. Paste the [Link] copied before to C:/Intel/IPSS folder in the target machine.

• Should have unique names. 5. Install Intel PSS in the target machine. target.

6. Double click Intel PSS icon in the target machine.

• Need to be in the same network.
7. Double click Intel PSS icon in the controller machine. This is what to expect:

a. The browser will open.

b. It should detect 2 systems as below image shows

c. When detection is over, 2 systems should be available: the target and the
controller.

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 Debug Help
 In case of any tool issues submit a IPS ticket with the below set of files for debug along with the requested details-
 Platform Name/SKU
 Tool version number
 Share “msinfo32” file listing the OS and other driver information
 Installation log from the below path:
 C:\Intel\IPSS\[Link]
 Result File logs from the below path:
 C:\Intel\IPSS\ipssx.x\Lib\site-packages\evToolsTests\localTestsRepository\iomargin\results
 Intel PSS log files from the below path:
 C:\Intel\IPSS\ipssx.x\Lib\site-packages\evToolsServer\log\[Link]
 C:\Intel\IPSS\ipssx.x\Lib\site-packages\evToolsServer\log\[Link]
 In case you see detecting issues, send these additional log
 C:\Intel\IPSS\ipssx.x\Lib\site-packages\ssa\tests\{Autogenerated-Number}\ExtractedContent\{[Link]}

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